4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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36 #include <linux/pci_regs.h>
37 #include <sys/eventfd.h>
38 #include <sys/socket.h>
39 #include <sys/ioctl.h>
44 #include <rte_eal_memconfig.h>
45 #include <rte_malloc.h>
47 #include "eal_filesystem.h"
48 #include "eal_pci_init.h"
50 #include "eal_private.h"
54 * PCI probing under linux (VFIO version)
56 * This code tries to determine if the PCI device is bound to VFIO driver,
57 * and initialize it (map BARs, set up interrupts) if that's the case.
59 * This file is only compiled if CONFIG_RTE_EAL_VFIO is set to "y".
64 #define PAGE_SIZE (sysconf(_SC_PAGESIZE))
65 #define PAGE_MASK (~(PAGE_SIZE - 1))
67 static struct rte_tailq_elem rte_vfio_tailq = {
68 .name = "VFIO_RESOURCE_LIST",
70 EAL_REGISTER_TAILQ(rte_vfio_tailq)
72 /* per-process VFIO config */
73 static struct vfio_config vfio_cfg;
76 pci_vfio_read_config(const struct rte_intr_handle *intr_handle,
77 void *buf, size_t len, off_t offs)
79 return pread64(intr_handle->vfio_dev_fd, buf, len,
80 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
84 pci_vfio_write_config(const struct rte_intr_handle *intr_handle,
85 const void *buf, size_t len, off_t offs)
87 return pwrite64(intr_handle->vfio_dev_fd, buf, len,
88 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) + offs);
91 /* get PCI BAR number where MSI-X interrupts are */
93 pci_vfio_get_msix_bar(int fd, int *msix_bar, uint32_t *msix_table_offset,
94 uint32_t *msix_table_size)
99 uint8_t cap_id, cap_offset;
101 /* read PCI capability pointer from config space */
102 ret = pread64(fd, ®, sizeof(reg),
103 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
104 PCI_CAPABILITY_LIST);
105 if (ret != sizeof(reg)) {
106 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
111 /* we need first byte */
112 cap_offset = reg & 0xFF;
116 /* read PCI capability ID */
117 ret = pread64(fd, ®, sizeof(reg),
118 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
120 if (ret != sizeof(reg)) {
121 RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI "
126 /* we need first byte */
129 /* if we haven't reached MSI-X, check next capability */
130 if (cap_id != PCI_CAP_ID_MSIX) {
131 ret = pread64(fd, ®, sizeof(reg),
132 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
134 if (ret != sizeof(reg)) {
135 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
140 /* we need second byte */
141 cap_offset = (reg & 0xFF00) >> 8;
145 /* else, read table offset */
147 /* table offset resides in the next 4 bytes */
148 ret = pread64(fd, ®, sizeof(reg),
149 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
151 if (ret != sizeof(reg)) {
152 RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config "
157 ret = pread64(fd, &flags, sizeof(flags),
158 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
160 if (ret != sizeof(flags)) {
161 RTE_LOG(ERR, EAL, "Cannot read table flags from PCI config "
166 *msix_bar = reg & RTE_PCI_MSIX_TABLE_BIR;
167 *msix_table_offset = reg & RTE_PCI_MSIX_TABLE_OFFSET;
168 *msix_table_size = 16 * (1 + (flags & RTE_PCI_MSIX_FLAGS_QSIZE));
176 /* set PCI bus mastering */
178 pci_vfio_set_bus_master(int dev_fd)
183 ret = pread64(dev_fd, ®, sizeof(reg),
184 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
186 if (ret != sizeof(reg)) {
187 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
191 /* set the master bit */
192 reg |= PCI_COMMAND_MASTER;
194 ret = pwrite64(dev_fd, ®, sizeof(reg),
195 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
198 if (ret != sizeof(reg)) {
199 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
206 /* set up interrupt support (but not enable interrupts) */
208 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
210 int i, ret, intr_idx;
212 /* default to invalid index */
213 intr_idx = VFIO_PCI_NUM_IRQS;
215 /* get interrupt type from internal config (MSI-X by default, can be
216 * overriden from the command line
218 switch (internal_config.vfio_intr_mode) {
219 case RTE_INTR_MODE_MSIX:
220 intr_idx = VFIO_PCI_MSIX_IRQ_INDEX;
222 case RTE_INTR_MODE_MSI:
223 intr_idx = VFIO_PCI_MSI_IRQ_INDEX;
225 case RTE_INTR_MODE_LEGACY:
226 intr_idx = VFIO_PCI_INTX_IRQ_INDEX;
228 /* don't do anything if we want to automatically determine interrupt type */
229 case RTE_INTR_MODE_NONE:
232 RTE_LOG(ERR, EAL, " unknown default interrupt type!\n");
236 /* start from MSI-X interrupt type */
237 for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
238 struct vfio_irq_info irq = { .argsz = sizeof(irq) };
241 /* skip interrupt modes we don't want */
242 if (internal_config.vfio_intr_mode != RTE_INTR_MODE_NONE &&
248 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
250 RTE_LOG(ERR, EAL, " cannot get IRQ info, "
251 "error %i (%s)\n", errno, strerror(errno));
255 /* if this vector cannot be used with eventfd, fail if we explicitly
256 * specified interrupt type, otherwise continue */
257 if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) {
258 if (internal_config.vfio_intr_mode != RTE_INTR_MODE_NONE) {
260 " interrupt vector does not support eventfd!\n");
266 /* set up an eventfd for interrupts */
267 fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
269 RTE_LOG(ERR, EAL, " cannot set up eventfd, "
270 "error %i (%s)\n", errno, strerror(errno));
274 dev->intr_handle.fd = fd;
275 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
278 case VFIO_PCI_MSIX_IRQ_INDEX:
279 internal_config.vfio_intr_mode = RTE_INTR_MODE_MSIX;
280 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
282 case VFIO_PCI_MSI_IRQ_INDEX:
283 internal_config.vfio_intr_mode = RTE_INTR_MODE_MSI;
284 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
286 case VFIO_PCI_INTX_IRQ_INDEX:
287 internal_config.vfio_intr_mode = RTE_INTR_MODE_LEGACY;
288 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
291 RTE_LOG(ERR, EAL, " unknown interrupt type!\n");
298 /* if we're here, we haven't found a suitable interrupt vector */
302 /* open group fd or get an existing one */
304 pci_vfio_get_group_fd(int iommu_group_no)
308 char filename[PATH_MAX];
310 /* check if we already have the group descriptor open */
311 for (i = 0; i < vfio_cfg.vfio_group_idx; i++)
312 if (vfio_cfg.vfio_groups[i].group_no == iommu_group_no)
313 return vfio_cfg.vfio_groups[i].fd;
315 /* if primary, try to open the group */
316 if (internal_config.process_type == RTE_PROC_PRIMARY) {
317 /* try regular group format */
318 snprintf(filename, sizeof(filename),
319 VFIO_GROUP_FMT, iommu_group_no);
320 vfio_group_fd = open(filename, O_RDWR);
321 if (vfio_group_fd < 0) {
322 /* if file not found, it's not an error */
323 if (errno != ENOENT) {
324 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", filename,
329 /* special case: try no-IOMMU path as well */
330 snprintf(filename, sizeof(filename),
331 VFIO_NOIOMMU_GROUP_FMT, iommu_group_no);
332 vfio_group_fd = open(filename, O_RDWR);
333 if (vfio_group_fd < 0) {
334 if (errno != ENOENT) {
335 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", filename,
341 /* noiommu group found */
344 /* if the fd is valid, create a new group for it */
345 if (vfio_cfg.vfio_group_idx == VFIO_MAX_GROUPS) {
346 RTE_LOG(ERR, EAL, "Maximum number of VFIO groups reached!\n");
347 close(vfio_group_fd);
350 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].group_no = iommu_group_no;
351 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].fd = vfio_group_fd;
352 return vfio_group_fd;
354 /* if we're in a secondary process, request group fd from the primary
355 * process via our socket
360 socket_fd = vfio_mp_sync_connect_to_primary();
363 RTE_LOG(ERR, EAL, " cannot connect to primary process!\n");
366 if (vfio_mp_sync_send_request(socket_fd, SOCKET_REQ_GROUP) < 0) {
367 RTE_LOG(ERR, EAL, " cannot request container fd!\n");
371 if (vfio_mp_sync_send_request(socket_fd, iommu_group_no) < 0) {
372 RTE_LOG(ERR, EAL, " cannot send group number!\n");
376 ret = vfio_mp_sync_receive_request(socket_fd);
382 vfio_group_fd = vfio_mp_sync_receive_fd(socket_fd);
383 /* if we got the fd, return it */
384 if (vfio_group_fd > 0) {
386 return vfio_group_fd;
388 /* fall-through on error */
390 RTE_LOG(ERR, EAL, " cannot get container fd!\n");
398 /* parse IOMMU group number for a PCI device
399 * returns 1 on success, -1 for errors, 0 for non-existent group
402 pci_vfio_get_group_no(const char *pci_addr, int *iommu_group_no)
404 return vfio_get_group_no(pci_get_sysfs_path(), pci_addr, iommu_group_no);
408 clear_current_group(void)
410 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].group_no = 0;
411 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].fd = -1;
416 * map the PCI resources of a PCI device in virtual memory (VFIO version).
417 * primary and secondary processes follow almost exactly the same path
420 pci_vfio_map_resource(struct rte_pci_device *dev)
422 struct vfio_group_status group_status = {
423 .argsz = sizeof(group_status)
425 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
426 int vfio_group_fd, vfio_dev_fd;
428 char pci_addr[PATH_MAX] = {0};
429 struct rte_pci_addr *loc = &dev->addr;
430 int i, ret, msix_bar;
431 struct mapped_pci_resource *vfio_res = NULL;
432 struct mapped_pci_res_list *vfio_res_list = RTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);
434 struct pci_map *maps;
435 uint32_t msix_table_offset = 0;
436 uint32_t msix_table_size = 0;
439 dev->intr_handle.fd = -1;
440 dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
442 /* store PCI address string */
443 snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
444 loc->domain, loc->bus, loc->devid, loc->function);
446 /* get group number */
447 ret = pci_vfio_get_group_no(pci_addr, &iommu_group_no);
449 RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
454 /* if negative, something failed */
458 /* get the actual group fd */
459 vfio_group_fd = pci_vfio_get_group_fd(iommu_group_no);
460 if (vfio_group_fd < 0)
464 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].group_no = iommu_group_no;
465 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].fd = vfio_group_fd;
467 /* if group_fd == 0, that means the device isn't managed by VFIO */
468 if (vfio_group_fd == 0) {
469 RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
471 /* we store 0 as group fd to distinguish between existing but
472 * unbound VFIO groups, and groups that don't exist at all.
474 vfio_cfg.vfio_group_idx++;
479 * at this point, we know at least one port on this device is bound to VFIO,
480 * so we can proceed to try and set this particular port up
483 /* check if the group is viable */
484 ret = ioctl(vfio_group_fd, VFIO_GROUP_GET_STATUS, &group_status);
486 RTE_LOG(ERR, EAL, " %s cannot get group status, "
487 "error %i (%s)\n", pci_addr, errno, strerror(errno));
488 close(vfio_group_fd);
489 clear_current_group();
491 } else if (!(group_status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
492 RTE_LOG(ERR, EAL, " %s VFIO group is not viable!\n", pci_addr);
493 close(vfio_group_fd);
494 clear_current_group();
499 * at this point, we know that this group is viable (meaning, all devices
500 * are either bound to VFIO or not bound to anything)
503 /* check if group does not have a container yet */
504 if (!(group_status.flags & VFIO_GROUP_FLAGS_CONTAINER_SET)) {
506 /* add group to a container */
507 ret = ioctl(vfio_group_fd, VFIO_GROUP_SET_CONTAINER,
508 &vfio_cfg.vfio_container_fd);
510 RTE_LOG(ERR, EAL, " %s cannot add VFIO group to container, "
511 "error %i (%s)\n", pci_addr, errno, strerror(errno));
512 close(vfio_group_fd);
513 clear_current_group();
517 * at this point we know that this group has been successfully
518 * initialized, so we increment vfio_group_idx to indicate that we can
521 vfio_cfg.vfio_group_idx++;
525 * pick an IOMMU type and set up DMA mappings for container
527 * needs to be done only once, only when at least one group is assigned to
528 * a container and only in primary process
530 if (internal_config.process_type == RTE_PROC_PRIMARY &&
531 vfio_cfg.vfio_container_has_dma == 0) {
532 /* select an IOMMU type which we will be using */
533 const struct vfio_iommu_type *t =
534 vfio_set_iommu_type(vfio_cfg.vfio_container_fd);
536 RTE_LOG(ERR, EAL, " %s failed to select IOMMU type\n", pci_addr);
539 ret = t->dma_map_func(vfio_cfg.vfio_container_fd);
541 RTE_LOG(ERR, EAL, " %s DMA remapping failed, "
542 "error %i (%s)\n", pci_addr, errno, strerror(errno));
545 vfio_cfg.vfio_container_has_dma = 1;
548 /* get a file descriptor for the device */
549 vfio_dev_fd = ioctl(vfio_group_fd, VFIO_GROUP_GET_DEVICE_FD, pci_addr);
550 if (vfio_dev_fd < 0) {
551 /* if we cannot get a device fd, this simply means that this
552 * particular port is not bound to VFIO
554 RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
559 /* test and setup the device */
560 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_INFO, &device_info);
562 RTE_LOG(ERR, EAL, " %s cannot get device info, "
563 "error %i (%s)\n", pci_addr, errno, strerror(errno));
568 /* get MSI-X BAR, if any (we have to know where it is because we can't
569 * easily mmap it when using VFIO) */
571 ret = pci_vfio_get_msix_bar(vfio_dev_fd, &msix_bar,
572 &msix_table_offset, &msix_table_size);
574 RTE_LOG(ERR, EAL, " %s cannot get MSI-X BAR number!\n", pci_addr);
579 /* if we're in a primary process, allocate vfio_res and get region info */
580 if (internal_config.process_type == RTE_PROC_PRIMARY) {
581 vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
582 if (vfio_res == NULL) {
584 "%s(): cannot store uio mmap details\n", __func__);
588 memcpy(&vfio_res->pci_addr, &dev->addr, sizeof(vfio_res->pci_addr));
590 /* get number of registers (up to BAR5) */
591 vfio_res->nb_maps = RTE_MIN((int) device_info.num_regions,
592 VFIO_PCI_BAR5_REGION_INDEX + 1);
594 /* if we're in a secondary process, just find our tailq entry */
595 TAILQ_FOREACH(vfio_res, vfio_res_list, next) {
596 if (memcmp(&vfio_res->pci_addr, &dev->addr, sizeof(dev->addr)))
600 /* if we haven't found our tailq entry, something's wrong */
601 if (vfio_res == NULL) {
602 RTE_LOG(ERR, EAL, " %s cannot find TAILQ entry for PCI device!\n",
610 maps = vfio_res->maps;
612 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
613 struct vfio_region_info reg = { .argsz = sizeof(reg) };
616 unsigned long offset, size;
621 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®);
624 RTE_LOG(ERR, EAL, " %s cannot get device region info "
625 "error %i (%s)\n", pci_addr, errno, strerror(errno));
627 if (internal_config.process_type == RTE_PROC_PRIMARY)
632 /* chk for io port region */
633 ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
634 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX)
635 + PCI_BASE_ADDRESS_0 + i*4);
637 if (ret != sizeof(ioport_bar)) {
639 "Cannot read command (%x) from config space!\n",
640 PCI_BASE_ADDRESS_0 + i*4);
644 if (ioport_bar & PCI_BASE_ADDRESS_SPACE_IO) {
646 "Ignore mapping IO port bar(%d) addr: %x\n",
651 /* skip non-mmapable BARs */
652 if ((reg.flags & VFIO_REGION_INFO_FLAG_MMAP) == 0)
657 * VFIO will not let us map the MSI-X table,
658 * but we can map around it.
660 uint32_t table_start = msix_table_offset;
661 uint32_t table_end = table_start + msix_table_size;
662 table_end = (table_end + ~PAGE_MASK) & PAGE_MASK;
663 table_start &= PAGE_MASK;
665 if (table_start == 0 && table_end >= reg.size) {
666 /* Cannot map this BAR */
667 RTE_LOG(DEBUG, EAL, "Skipping BAR %d\n", i);
670 memreg[0].offset = reg.offset;
671 memreg[0].size = table_start;
672 memreg[1].offset = table_end;
673 memreg[1].size = reg.size - table_end;
676 "Trying to map BAR %d that contains the MSI-X "
677 "table. Trying offsets: "
678 "0x%04lx:0x%04lx, 0x%04lx:0x%04lx\n", i,
679 memreg[0].offset, memreg[0].size,
680 memreg[1].offset, memreg[1].size);
683 memreg[0].offset = reg.offset;
684 memreg[0].size = reg.size;
687 /* try to figure out an address */
688 if (internal_config.process_type == RTE_PROC_PRIMARY) {
689 /* try mapping somewhere close to the end of hugepages */
690 if (pci_map_addr == NULL)
691 pci_map_addr = pci_find_max_end_va();
693 bar_addr = pci_map_addr;
694 pci_map_addr = RTE_PTR_ADD(bar_addr, (size_t) reg.size);
696 bar_addr = maps[i].addr;
699 /* reserve the address using an inaccessible mapping */
700 bar_addr = mmap(bar_addr, reg.size, 0, MAP_PRIVATE |
701 MAP_ANONYMOUS, -1, 0);
702 if (bar_addr != MAP_FAILED) {
703 void *map_addr = NULL;
704 if (memreg[0].size) {
705 /* actual map of first part */
706 map_addr = pci_map_resource(bar_addr, vfio_dev_fd,
712 /* if there's a second part, try to map it */
713 if (map_addr != MAP_FAILED
714 && memreg[1].offset && memreg[1].size) {
715 void *second_addr = RTE_PTR_ADD(bar_addr, memreg[1].offset);
716 map_addr = pci_map_resource(second_addr,
717 vfio_dev_fd, memreg[1].offset,
722 if (map_addr == MAP_FAILED || !map_addr) {
723 munmap(bar_addr, reg.size);
724 bar_addr = MAP_FAILED;
728 if (bar_addr == MAP_FAILED ||
729 (internal_config.process_type == RTE_PROC_SECONDARY &&
730 bar_addr != maps[i].addr)) {
731 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n", pci_addr, i,
734 if (internal_config.process_type == RTE_PROC_PRIMARY)
739 maps[i].addr = bar_addr;
740 maps[i].offset = reg.offset;
741 maps[i].size = reg.size;
742 maps[i].path = NULL; /* vfio doesn't have per-resource paths */
743 dev->mem_resource[i].addr = bar_addr;
746 /* if secondary process, do not set up interrupts */
747 if (internal_config.process_type == RTE_PROC_PRIMARY) {
748 if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) {
749 RTE_LOG(ERR, EAL, " %s error setting up interrupts!\n", pci_addr);
755 /* set bus mastering for the device */
756 if (pci_vfio_set_bus_master(vfio_dev_fd)) {
757 RTE_LOG(ERR, EAL, " %s cannot set up bus mastering!\n", pci_addr);
763 /* Reset the device */
764 ioctl(vfio_dev_fd, VFIO_DEVICE_RESET);
767 if (internal_config.process_type == RTE_PROC_PRIMARY)
768 TAILQ_INSERT_TAIL(vfio_res_list, vfio_res, next);
774 pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
775 struct rte_pci_ioport *p)
777 if (bar < VFIO_PCI_BAR0_REGION_INDEX ||
778 bar > VFIO_PCI_BAR5_REGION_INDEX) {
779 RTE_LOG(ERR, EAL, "invalid bar (%d)!\n", bar);
784 p->base = VFIO_GET_REGION_ADDR(bar);
789 pci_vfio_ioport_read(struct rte_pci_ioport *p,
790 void *data, size_t len, off_t offset)
792 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
794 if (pread64(intr_handle->vfio_dev_fd, data,
795 len, p->base + offset) <= 0)
797 "Can't read from PCI bar (%" PRIu64 ") : offset (%x)\n",
798 VFIO_GET_REGION_IDX(p->base), (int)offset);
802 pci_vfio_ioport_write(struct rte_pci_ioport *p,
803 const void *data, size_t len, off_t offset)
805 const struct rte_intr_handle *intr_handle = &p->dev->intr_handle;
807 if (pwrite64(intr_handle->vfio_dev_fd, data,
808 len, p->base + offset) <= 0)
810 "Can't write to PCI bar (%" PRIu64 ") : offset (%x)\n",
811 VFIO_GET_REGION_IDX(p->base), (int)offset);
815 pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
822 pci_vfio_enable(void)
824 /* initialize group list */
828 for (i = 0; i < VFIO_MAX_GROUPS; i++) {
829 vfio_cfg.vfio_groups[i].fd = -1;
830 vfio_cfg.vfio_groups[i].group_no = -1;
833 /* inform the user that we are probing for VFIO */
834 RTE_LOG(INFO, EAL, "Probing VFIO support...\n");
836 /* check if vfio-pci module is loaded */
837 vfio_available = rte_eal_check_module("vfio_pci");
839 /* return error directly */
840 if (vfio_available == -1) {
841 RTE_LOG(INFO, EAL, "Could not get loaded module details!\n");
845 /* return 0 if VFIO modules not loaded */
846 if (vfio_available == 0) {
847 RTE_LOG(DEBUG, EAL, "VFIO modules not loaded, "
848 "skipping VFIO support...\n");
852 vfio_cfg.vfio_container_fd = vfio_get_container_fd();
854 /* check if we have VFIO driver enabled */
855 if (vfio_cfg.vfio_container_fd != -1) {
856 RTE_LOG(NOTICE, EAL, "VFIO support initialized\n");
857 vfio_cfg.vfio_enabled = 1;
859 RTE_LOG(NOTICE, EAL, "VFIO support could not be initialized\n");
866 pci_vfio_is_enabled(void)
868 return vfio_cfg.vfio_enabled;