4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * Copyright(c) 2012-2013 6WIND S.A.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * * Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in
16 * the documentation and/or other materials provided with the
18 * * Neither the name of Intel Corporation nor the names of its
19 * contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 #include <sys/queue.h>
47 #include <rte_common.h>
49 #include <rte_cycles.h>
50 #include <rte_tailq.h>
51 #include <rte_memory.h>
52 #include <rte_memzone.h>
54 #include <rte_debug.h>
56 #include "eal_private.h"
57 #include "eal_internal_cfg.h"
59 enum timer_source eal_timer_source = EAL_TIMER_HPET;
61 /* The frequency of the RDTSC timer resolution */
62 static uint64_t eal_tsc_resolution_hz = 0;
64 #ifdef RTE_LIBEAL_USE_HPET
66 #define DEV_HPET "/dev/hpet"
68 /* Maximum number of counters. */
69 #define HPET_TIMER_NUM 3
71 /* General capabilities register */
72 #define CLK_PERIOD_SHIFT 32 /* Clock period shift. */
73 #define CLK_PERIOD_MASK 0xffffffff00000000ULL /* Clock period mask. */
74 #define COUNT_SIZE_CAP_SHIFT 13 /* Count size capa. shift. */
75 #define COUNT_SIZE_CAP_MASK 0x0000000000002000ULL /* Count size capa. mask. */
78 * HPET timer registers. From the Intel IA-PC HPET (High Precision Event
79 * Timers) Specification.
81 struct eal_hpet_regs {
82 /* Memory-mapped, software visible registers */
83 uint64_t capabilities; /**< RO General Capabilities Register. */
84 uint64_t reserved0; /**< Reserved for future use. */
85 uint64_t config; /**< RW General Configuration Register. */
86 uint64_t reserved1; /**< Reserved for future use. */
87 uint64_t isr; /**< RW Clear General Interrupt Status. */
88 uint64_t reserved2[25]; /**< Reserved for future use. */
90 uint64_t counter; /**< RW Main Counter Value Register. */
92 uint32_t counter_l; /**< RW Main Counter Low. */
93 uint32_t counter_h; /**< RW Main Counter High. */
96 uint64_t reserved3; /**< Reserved for future use. */
98 uint64_t config; /**< RW Timer Config and Capability Reg. */
99 uint64_t comp; /**< RW Timer Comparator Value Register. */
100 uint64_t fsb; /**< RW FSB Interrupt Route Register. */
101 uint64_t reserved4; /**< Reserved for future use. */
102 } timers[HPET_TIMER_NUM]; /**< Set of HPET timers. */
105 /* Mmap'd hpet registers */
106 static volatile struct eal_hpet_regs *eal_hpet = NULL;
108 /* Period at which the HPET counter increments in
109 * femtoseconds (10^-15 seconds). */
110 static uint32_t eal_hpet_resolution_fs = 0;
112 /* Frequency of the HPET counter in Hz */
113 static uint64_t eal_hpet_resolution_hz = 0;
115 /* Incremented 4 times during one 32bits hpet full count */
116 static uint32_t eal_hpet_msb;
118 static pthread_t msb_inc_thread_id;
121 * This function runs on a specific thread to update a global variable
122 * containing used to process MSB of the HPET (unfortunatelly, we need
123 * this because hpet is 32 bits by default under linux).
126 hpet_msb_inc(__attribute__((unused)) void *arg)
131 t = (eal_hpet->counter_l >> 30);
132 if (t != (eal_hpet_msb & 3))
139 rte_get_hpet_hz(void)
141 if(internal_config.no_hpet)
142 rte_panic("Error, HPET called, but no HPET present\n");
144 return eal_hpet_resolution_hz;
148 rte_get_hpet_cycles(void)
153 if(internal_config.no_hpet)
154 rte_panic("Error, HPET called, but no HPET present\n");
156 t = eal_hpet->counter_l;
158 ret = (msb + 2 - (t >> 30)) / 4;
168 rte_delay_us(unsigned us)
170 const uint64_t start = rte_get_timer_cycles();
171 const uint64_t ticks = (uint64_t)us * rte_get_timer_hz() / 1E6;
172 while ((rte_get_timer_cycles() - start) < ticks)
179 return eal_tsc_resolution_hz;
183 #ifdef RTE_LIBEAL_USE_HPET
185 * Open and mmap /dev/hpet (high precision event timer) that will
186 * provide our time reference.
189 rte_eal_hpet_init(int make_default)
193 if (internal_config.no_hpet) {
194 RTE_LOG(INFO, EAL, "HPET is disabled\n");
198 fd = open(DEV_HPET, O_RDONLY);
200 RTE_LOG(ERR, EAL, "ERROR: Cannot open "DEV_HPET": %s!\n",
202 internal_config.no_hpet = 1;
205 eal_hpet = mmap(NULL, 1024, PROT_READ, MAP_SHARED, fd, 0);
206 if (eal_hpet == MAP_FAILED) {
207 RTE_LOG(ERR, EAL, "ERROR: Cannot mmap "DEV_HPET"!\n"
208 "Please enable CONFIG_HPET_MMAP in your kernel configuration "
209 "to allow HPET support.\n"
210 "To run without using HPET, set CONFIG_RTE_LIBEAL_USE_HPET=n "
211 "in your build configuration or use '--no-hpet' EAL flag.\n");
213 internal_config.no_hpet = 1;
218 eal_hpet_resolution_fs = (uint32_t)((eal_hpet->capabilities &
222 eal_hpet_resolution_hz = (1000ULL*1000ULL*1000ULL*1000ULL*1000ULL) /
223 (uint64_t)eal_hpet_resolution_fs;
225 RTE_LOG(INFO, EAL, "HPET frequency is ~%"PRIu64" kHz\n",
226 eal_hpet_resolution_hz/1000);
228 eal_hpet_msb = (eal_hpet->counter_l >> 30);
230 /* create a thread that will increment a global variable for
231 * msb (hpet is 32 bits by default under linux) */
232 ret = pthread_create(&msb_inc_thread_id, NULL,
233 (void *(*)(void *))hpet_msb_inc, NULL);
235 RTE_LOG(ERR, EAL, "ERROR: Cannot create HPET timer thread!\n");
236 internal_config.no_hpet = 1;
241 eal_timer_source = EAL_TIMER_HPET;
247 check_tsc_flags(void)
252 stream = fopen("/proc/cpuinfo", "r");
254 RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
258 while (fgets(line, sizeof line, stream)) {
262 if (strncmp(line, "flags", 5) != 0)
265 constant_tsc = strstr(line, "constant_tsc");
266 nonstop_tsc = strstr(line, "nonstop_tsc");
267 if (!constant_tsc || !nonstop_tsc)
268 RTE_LOG(WARNING, EAL,
269 "WARNING: cpu flags "
272 "-> using unreliable clock cycles !\n",
273 constant_tsc ? "yes":"no",
274 nonstop_tsc ? "yes":"no");
282 set_tsc_freq_from_clock(void)
284 #ifdef CLOCK_MONOTONIC_RAW
285 #define NS_PER_SEC 1E9
287 struct timespec sleeptime = {.tv_nsec = 5E8 }; /* 1/2 second */
289 struct timespec t_start, t_end;
291 if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
292 uint64_t ns, end, start = rte_rdtsc();
293 nanosleep(&sleeptime,NULL);
294 clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
296 ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
297 ns += (t_end.tv_nsec - t_start.tv_nsec);
299 double secs = (double)ns/NS_PER_SEC;
300 eal_tsc_resolution_hz = (uint64_t)((end - start)/secs);
308 set_tsc_freq_fallback(void)
310 RTE_LOG(WARNING, EAL, "WARNING: clock_gettime cannot use "
311 "CLOCK_MONOTONIC_RAW and HPET is not available"
312 " - clock timings may be less accurate.\n");
313 /* assume that the sleep(1) will sleep for 1 second */
314 uint64_t start = rte_rdtsc();
316 eal_tsc_resolution_hz = rte_rdtsc() - start;
319 * This function measures the TSC frequency. It uses a variety of approaches.
321 * 1. If kernel provides CLOCK_MONOTONIC_RAW we use that to tune the TSC value
322 * 2. If kernel does not provide that, and we have HPET support, tune using HPET
323 * 3. Lastly, if neither of the above can be used, just sleep for 1 second and
324 * tune off that, printing a warning about inaccuracy of timing
329 if (set_tsc_freq_from_clock() < 0)
330 set_tsc_freq_fallback();
332 RTE_LOG(INFO, EAL, "TSC frequency is ~%"PRIu64" KHz\n",
333 eal_tsc_resolution_hz/1000);
337 rte_eal_timer_init(void)
340 eal_timer_source = EAL_TIMER_TSC;