4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution
19 * in the file called LICENSE.GPL.
21 * Contact Information:
25 #include <linux/device.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/uio_driver.h>
30 #include <linux/msi.h>
31 #include <linux/version.h>
33 #ifdef CONFIG_XEN_DOM0
36 #include <rte_pci_dev_features.h>
39 * MSI-X related macros, copy from linux/pci_regs.h in kernel 2.6.39,
40 * but none of them in kernel 2.6.35.
42 #ifndef PCI_MSIX_ENTRY_SIZE
43 #define PCI_MSIX_ENTRY_SIZE 16
44 #define PCI_MSIX_ENTRY_LOWER_ADDR 0
45 #define PCI_MSIX_ENTRY_UPPER_ADDR 4
46 #define PCI_MSIX_ENTRY_DATA 8
47 #define PCI_MSIX_ENTRY_VECTOR_CTRL 12
48 #define PCI_MSIX_ENTRY_CTRL_MASKBIT 1
51 #define IGBUIO_NUM_MSI_VECTORS 1
54 * A structure describing the private information for a uio device.
56 struct rte_uio_pci_dev {
59 spinlock_t lock; /* spinlock for accessing PCI config space or msix data in multi tasks/isr */
60 enum rte_intr_mode mode;
62 msix_entries[IGBUIO_NUM_MSI_VECTORS]; /* pointer to the msix vectors to be allocated later */
65 static char *intr_mode = NULL;
66 static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
68 static inline struct rte_uio_pci_dev *
69 igbuio_get_uio_pci_dev(struct uio_info *info)
71 return container_of(info, struct rte_uio_pci_dev, info);
75 int local_pci_num_vf(struct pci_dev *dev)
77 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
86 } *iov = (struct iov*)dev->sriov;
91 return iov->nr_virtfn;
93 return pci_num_vf(dev);
98 show_max_vfs(struct device *dev, struct device_attribute *attr,
101 return snprintf(buf, 10, "%u\n", local_pci_num_vf(
102 container_of(dev, struct pci_dev, dev)));
106 store_max_vfs(struct device *dev, struct device_attribute *attr,
107 const char *buf, size_t count)
110 unsigned long max_vfs;
111 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
113 if (0 != strict_strtoul(buf, 0, &max_vfs))
117 pci_disable_sriov(pdev);
118 else if (0 == local_pci_num_vf(pdev))
119 err = pci_enable_sriov(pdev, max_vfs);
120 else /* do nothing if change max_vfs number */
123 return err ? err : count;
126 static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs);
127 static struct attribute *dev_attrs[] = {
128 &dev_attr_max_vfs.attr,
132 static const struct attribute_group dev_attr_grp = {
137 pci_lock(struct pci_dev * pdev)
139 /* Some function names changes between 3.2.0 and 3.3.0... */
140 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
141 pci_block_user_cfg_access(pdev);
144 return pci_cfg_access_trylock(pdev);
149 pci_unlock(struct pci_dev * pdev)
151 /* Some function names changes between 3.2.0 and 3.3.0... */
152 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
153 pci_unblock_user_cfg_access(pdev);
155 pci_cfg_access_unlock(pdev);
160 * It masks the msix on/off of generating MSI-X messages.
163 igbuio_msix_mask_irq(struct msi_desc *desc, int32_t state)
165 uint32_t mask_bits = desc->masked;
166 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
167 PCI_MSIX_ENTRY_VECTOR_CTRL;
170 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
172 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
174 if (mask_bits != desc->masked) {
175 writel(mask_bits, desc->mask_base + offset);
176 readl(desc->mask_base);
177 desc->masked = mask_bits;
184 * This function sets/clears the masks for generating LSC interrupts.
187 * The pointer to struct uio_info.
189 * The on/off flag of masking LSC.
191 * -On success, zero value.
192 * -On failure, a negative value.
195 igbuio_set_interrupt_mask(struct rte_uio_pci_dev *udev, int32_t state)
197 struct pci_dev *pdev = udev->pdev;
199 if (udev->mode == RTE_INTR_MODE_MSIX) {
200 struct msi_desc *desc;
202 list_for_each_entry(desc, &pdev->msi_list, list) {
203 igbuio_msix_mask_irq(desc, state);
205 } else if (udev->mode == RTE_INTR_MODE_LEGACY) {
209 pci_read_config_dword(pdev, PCI_COMMAND, &status);
212 new = old & (~PCI_COMMAND_INTX_DISABLE);
214 new = old | PCI_COMMAND_INTX_DISABLE;
217 pci_write_config_word(pdev, PCI_COMMAND, new);
224 * This is the irqcontrol callback to be registered to uio_info.
225 * It can be used to disable/enable interrupt from user space processes.
228 * pointer to uio_info.
230 * state value. 1 to enable interrupt, 0 to disable interrupt.
234 * - On failure, a negative value.
237 igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state)
240 struct rte_uio_pci_dev *udev = igbuio_get_uio_pci_dev(info);
241 struct pci_dev *pdev = udev->pdev;
243 spin_lock_irqsave(&udev->lock, flags);
244 if (!pci_lock(pdev)) {
245 spin_unlock_irqrestore(&udev->lock, flags);
249 igbuio_set_interrupt_mask(udev, irq_state);
252 spin_unlock_irqrestore(&udev->lock, flags);
258 * This is interrupt handler which will check if the interrupt is for the right device.
259 * If yes, disable it here and will be enable later.
262 igbuio_pci_irqhandler(int irq, struct uio_info *info)
264 irqreturn_t ret = IRQ_NONE;
266 struct rte_uio_pci_dev *udev = igbuio_get_uio_pci_dev(info);
267 struct pci_dev *pdev = udev->pdev;
268 uint32_t cmd_status_dword;
271 spin_lock_irqsave(&udev->lock, flags);
272 /* block userspace PCI config reads/writes */
276 /* for legacy mode, interrupt maybe shared */
277 if (udev->mode == RTE_INTR_MODE_LEGACY) {
278 pci_read_config_dword(pdev, PCI_COMMAND, &cmd_status_dword);
279 status = cmd_status_dword >> 16;
280 /* interrupt is not ours, goes to out */
281 if (!(status & PCI_STATUS_INTERRUPT))
285 igbuio_set_interrupt_mask(udev, 0);
288 /* unblock userspace PCI config reads/writes */
291 spin_unlock_irqrestore(&udev->lock, flags);
292 printk(KERN_INFO "irq 0x%x %s\n", irq, (ret == IRQ_HANDLED) ? "handled" : "not handled");
297 #ifdef CONFIG_XEN_DOM0
299 igbuio_dom0_mmap_phys(struct uio_info *info, struct vm_area_struct *vma)
302 idx = (int)vma->vm_pgoff;
303 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
304 vma->vm_page_prot.pgprot |= _PAGE_IOMAP;
306 return remap_pfn_range(vma,
308 info->mem[idx].addr >> PAGE_SHIFT,
309 vma->vm_end - vma->vm_start,
314 * This is uio device mmap method which will use igbuio mmap for Xen
318 igbuio_dom0_pci_mmap(struct uio_info *info, struct vm_area_struct *vma)
322 if (vma->vm_pgoff >= MAX_UIO_MAPS)
324 if(info->mem[vma->vm_pgoff].size == 0)
327 idx = (int)vma->vm_pgoff;
328 switch (info->mem[idx].memtype) {
330 return igbuio_dom0_mmap_phys(info, vma);
331 case UIO_MEM_LOGICAL:
332 case UIO_MEM_VIRTUAL:
339 /* Remap pci resources described by bar #pci_bar in uio resource n. */
341 igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info,
342 int n, int pci_bar, const char *name)
344 unsigned long addr, len;
347 if (sizeof(info->mem) / sizeof (info->mem[0]) <= n)
350 addr = pci_resource_start(dev, pci_bar);
351 len = pci_resource_len(dev, pci_bar);
352 if (addr == 0 || len == 0)
354 internal_addr = ioremap(addr, len);
355 if (internal_addr == NULL)
357 info->mem[n].name = name;
358 info->mem[n].addr = addr;
359 info->mem[n].internal_addr = internal_addr;
360 info->mem[n].size = len;
361 info->mem[n].memtype = UIO_MEM_PHYS;
365 /* Get pci port io resources described by bar #pci_bar in uio resource n. */
367 igbuio_pci_setup_ioport(struct pci_dev *dev, struct uio_info *info,
368 int n, int pci_bar, const char *name)
370 unsigned long addr, len;
372 if (sizeof(info->port) / sizeof (info->port[0]) <= n)
375 addr = pci_resource_start(dev, pci_bar);
376 len = pci_resource_len(dev, pci_bar);
377 if (addr == 0 || len == 0)
380 info->port[n].name = name;
381 info->port[n].start = addr;
382 info->port[n].size = len;
383 info->port[n].porttype = UIO_PORT_X86;
388 /* Unmap previously ioremap'd resources */
390 igbuio_pci_release_iomem(struct uio_info *info)
393 for (i = 0; i < MAX_UIO_MAPS; i++) {
394 if (info->mem[i].internal_addr)
395 iounmap(info->mem[i].internal_addr);
400 igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info)
402 int i, iom, iop, ret;
404 static const char *bar_names[PCI_STD_RESOURCE_END + 1] = {
416 for (i = 0; i != sizeof(bar_names) / sizeof(bar_names[0]); i++) {
417 if (pci_resource_len(dev, i) != 0 &&
418 pci_resource_start(dev, i) != 0) {
419 flags = pci_resource_flags(dev, i);
420 if (flags & IORESOURCE_MEM) {
421 if ((ret = igbuio_pci_setup_iomem(dev, info,
422 iom, i, bar_names[i])) != 0)
425 } else if (flags & IORESOURCE_IO) {
426 if ((ret = igbuio_pci_setup_ioport(dev, info,
427 iop, i, bar_names[i])) != 0)
434 return ((iom != 0) ? ret : ENOENT);
437 #if LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)
442 igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
444 struct rte_uio_pci_dev *udev;
446 udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL);
451 * enable device: ask low-level code to enable I/O and
454 if (pci_enable_device(dev)) {
455 printk(KERN_ERR "Cannot enable PCI device\n");
460 * reserve device's PCI memory regions for use by this
463 if (pci_request_regions(dev, "igb_uio")) {
464 printk(KERN_ERR "Cannot request regions\n");
468 /* enable bus mastering on the device */
471 /* remap IO memory */
472 if (igbuio_setup_bars(dev, &udev->info))
473 goto fail_release_iomem;
475 /* set 64-bit DMA mask */
476 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64))) {
477 printk(KERN_ERR "Cannot set DMA mask\n");
478 goto fail_release_iomem;
479 } else if (pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64))) {
480 printk(KERN_ERR "Cannot set consistent DMA mask\n");
481 goto fail_release_iomem;
485 udev->info.name = "Intel IGB UIO";
486 udev->info.version = "0.1";
487 udev->info.handler = igbuio_pci_irqhandler;
488 udev->info.irqcontrol = igbuio_pci_irqcontrol;
489 #ifdef CONFIG_XEN_DOM0
490 /* check if the driver run on Xen Dom0 */
491 if (xen_initial_domain())
492 udev->info.mmap = igbuio_dom0_pci_mmap;
494 udev->info.priv = udev;
496 udev->mode = RTE_INTR_MODE_LEGACY;
497 spin_lock_init(&udev->lock);
499 /* check if it need to try msix first */
500 if (igbuio_intr_mode_preferred == RTE_INTR_MODE_MSIX) {
503 for (vector = 0; vector < IGBUIO_NUM_MSI_VECTORS; vector ++)
504 udev->msix_entries[vector].entry = vector;
506 if (pci_enable_msix(udev->pdev, udev->msix_entries, IGBUIO_NUM_MSI_VECTORS) == 0) {
507 udev->mode = RTE_INTR_MODE_MSIX;
510 pci_disable_msix(udev->pdev);
511 printk(KERN_INFO "fail to enable pci msix, or not enough msix entries\n");
514 switch (udev->mode) {
515 case RTE_INTR_MODE_MSIX:
516 udev->info.irq_flags = 0;
517 udev->info.irq = udev->msix_entries[0].vector;
519 case RTE_INTR_MODE_MSI:
521 case RTE_INTR_MODE_LEGACY:
522 udev->info.irq_flags = IRQF_SHARED;
523 udev->info.irq = dev->irq;
529 pci_set_drvdata(dev, udev);
530 igbuio_pci_irqcontrol(&udev->info, 0);
532 if (sysfs_create_group(&dev->dev.kobj, &dev_attr_grp))
533 goto fail_release_iomem;
535 /* register uio driver */
536 if (uio_register_device(&dev->dev, &udev->info))
537 goto fail_release_iomem;
539 printk(KERN_INFO "uio device registered with irq %lx\n", udev->info.irq);
544 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
545 igbuio_pci_release_iomem(&udev->info);
546 if (udev->mode == RTE_INTR_MODE_MSIX)
547 pci_disable_msix(udev->pdev);
548 pci_release_regions(dev);
550 pci_disable_device(dev);
558 igbuio_pci_remove(struct pci_dev *dev)
560 struct uio_info *info = pci_get_drvdata(dev);
562 if (info->priv == NULL) {
563 printk(KERN_DEBUG "Not igbuio device\n");
567 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
568 uio_unregister_device(info);
569 igbuio_pci_release_iomem(info);
570 if (((struct rte_uio_pci_dev *)info->priv)->mode ==
572 pci_disable_msix(dev);
573 pci_release_regions(dev);
574 pci_disable_device(dev);
575 pci_set_drvdata(dev, NULL);
580 igbuio_config_intr_mode(char *intr_str)
583 printk(KERN_INFO "Use MSIX interrupt by default\n");
587 if (!strcmp(intr_str, RTE_INTR_MODE_MSIX_NAME)) {
588 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
589 printk(KERN_INFO "Use MSIX interrupt\n");
590 } else if (!strcmp(intr_str, RTE_INTR_MODE_LEGACY_NAME)) {
591 igbuio_intr_mode_preferred = RTE_INTR_MODE_LEGACY;
592 printk(KERN_INFO "Use legacy interrupt\n");
594 printk(KERN_INFO "Error: bad parameter - %s\n", intr_str);
601 static struct pci_driver igbuio_pci_driver = {
604 .probe = igbuio_pci_probe,
605 .remove = igbuio_pci_remove,
609 igbuio_pci_init_module(void)
613 ret = igbuio_config_intr_mode(intr_mode);
617 return pci_register_driver(&igbuio_pci_driver);
621 igbuio_pci_exit_module(void)
623 pci_unregister_driver(&igbuio_pci_driver);
626 module_init(igbuio_pci_init_module);
627 module_exit(igbuio_pci_exit_module);
629 module_param(intr_mode, charp, S_IRUGO | S_IWUSR);
630 MODULE_PARM_DESC(intr_mode,
631 "igb_uio interrupt mode (default=msix):\n"
632 " " RTE_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n"
633 " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n"
636 MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards");
637 MODULE_LICENSE("GPL");
638 MODULE_AUTHOR("Intel Corporation");