4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution
19 * in the file called LICENSE.GPL.
21 * Contact Information:
25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/uio_driver.h>
32 #include <linux/msi.h>
33 #include <linux/version.h>
34 #include <linux/slab.h>
36 #ifdef CONFIG_XEN_DOM0
39 #include <rte_pci_dev_features.h>
44 * A structure describing the private information for a uio device.
46 struct rte_uio_pci_dev {
49 enum rte_intr_mode mode;
52 static char *intr_mode;
53 static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
57 show_max_vfs(struct device *dev, struct device_attribute *attr,
60 return snprintf(buf, 10, "%u\n", dev_num_vf(dev));
64 store_max_vfs(struct device *dev, struct device_attribute *attr,
65 const char *buf, size_t count)
68 unsigned long max_vfs;
69 struct pci_dev *pdev = to_pci_dev(dev);
71 if (0 != kstrtoul(buf, 0, &max_vfs))
75 pci_disable_sriov(pdev);
76 else if (0 == pci_num_vf(pdev))
77 err = pci_enable_sriov(pdev, max_vfs);
78 else /* do nothing if change max_vfs number */
81 return err ? err : count;
84 static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs);
86 static struct attribute *dev_attrs[] = {
87 &dev_attr_max_vfs.attr,
91 static const struct attribute_group dev_attr_grp = {
96 * This is the irqcontrol callback to be registered to uio_info.
97 * It can be used to disable/enable interrupt from user space processes.
100 * pointer to uio_info.
102 * state value. 1 to enable interrupt, 0 to disable interrupt.
106 * - On failure, a negative value.
109 igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state)
111 struct rte_uio_pci_dev *udev = info->priv;
112 struct pci_dev *pdev = udev->pdev;
115 struct irq_data *irq = irq_get_irq_data(udev->info.irq);
117 unsigned int irq = udev->info.irq;
120 pci_cfg_access_lock(pdev);
122 if (udev->mode == RTE_INTR_MODE_MSIX) {
123 #ifdef HAVE_PCI_MSI_MASK_IRQ
125 pci_msi_unmask_irq(irq);
127 pci_msi_mask_irq(irq);
136 if (udev->mode == RTE_INTR_MODE_LEGACY)
137 pci_intx(pdev, !!irq_state);
139 pci_cfg_access_unlock(pdev);
145 * This is interrupt handler which will check if the interrupt is for the right device.
146 * If yes, disable it here and will be enable later.
149 igbuio_pci_irqhandler(int irq, struct uio_info *info)
151 struct rte_uio_pci_dev *udev = info->priv;
153 /* Legacy mode need to mask in hardware */
154 if (udev->mode == RTE_INTR_MODE_LEGACY &&
155 !pci_check_and_mask_intx(udev->pdev))
158 /* Message signal mode, no share IRQ and automasked */
163 * This gets called while opening uio device file.
166 igbuio_pci_open(struct uio_info *info, struct inode *inode)
168 struct rte_uio_pci_dev *udev = info->priv;
169 struct pci_dev *dev = udev->pdev;
171 pci_reset_function(dev);
173 /* set bus master, which was cleared by the reset function */
180 igbuio_pci_release(struct uio_info *info, struct inode *inode)
182 struct rte_uio_pci_dev *udev = info->priv;
183 struct pci_dev *dev = udev->pdev;
185 /* stop the device from further DMA */
186 pci_clear_master(dev);
188 pci_reset_function(dev);
193 #ifdef CONFIG_XEN_DOM0
195 igbuio_dom0_mmap_phys(struct uio_info *info, struct vm_area_struct *vma)
199 idx = (int)vma->vm_pgoff;
200 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
201 #ifdef HAVE_PTE_MASK_PAGE_IOMAP
202 vma->vm_page_prot.pgprot |= _PAGE_IOMAP;
205 return remap_pfn_range(vma,
207 info->mem[idx].addr >> PAGE_SHIFT,
208 vma->vm_end - vma->vm_start,
213 * This is uio device mmap method which will use igbuio mmap for Xen
217 igbuio_dom0_pci_mmap(struct uio_info *info, struct vm_area_struct *vma)
221 if (vma->vm_pgoff >= MAX_UIO_MAPS)
224 if (info->mem[vma->vm_pgoff].size == 0)
227 idx = (int)vma->vm_pgoff;
228 switch (info->mem[idx].memtype) {
230 return igbuio_dom0_mmap_phys(info, vma);
231 case UIO_MEM_LOGICAL:
232 case UIO_MEM_VIRTUAL:
239 /* Remap pci resources described by bar #pci_bar in uio resource n. */
241 igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info,
242 int n, int pci_bar, const char *name)
244 unsigned long addr, len;
247 if (n >= ARRAY_SIZE(info->mem))
250 addr = pci_resource_start(dev, pci_bar);
251 len = pci_resource_len(dev, pci_bar);
252 if (addr == 0 || len == 0)
254 internal_addr = ioremap(addr, len);
255 if (internal_addr == NULL)
257 info->mem[n].name = name;
258 info->mem[n].addr = addr;
259 info->mem[n].internal_addr = internal_addr;
260 info->mem[n].size = len;
261 info->mem[n].memtype = UIO_MEM_PHYS;
265 /* Get pci port io resources described by bar #pci_bar in uio resource n. */
267 igbuio_pci_setup_ioport(struct pci_dev *dev, struct uio_info *info,
268 int n, int pci_bar, const char *name)
270 unsigned long addr, len;
272 if (n >= ARRAY_SIZE(info->port))
275 addr = pci_resource_start(dev, pci_bar);
276 len = pci_resource_len(dev, pci_bar);
277 if (addr == 0 || len == 0)
280 info->port[n].name = name;
281 info->port[n].start = addr;
282 info->port[n].size = len;
283 info->port[n].porttype = UIO_PORT_X86;
288 /* Unmap previously ioremap'd resources */
290 igbuio_pci_release_iomem(struct uio_info *info)
294 for (i = 0; i < MAX_UIO_MAPS; i++) {
295 if (info->mem[i].internal_addr)
296 iounmap(info->mem[i].internal_addr);
301 igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev)
304 #ifndef HAVE_ALLOC_IRQ_VECTORS
305 struct msix_entry msix_entry;
308 switch (igbuio_intr_mode_preferred) {
309 case RTE_INTR_MODE_MSIX:
310 /* Only 1 msi-x vector needed */
311 #ifndef HAVE_ALLOC_IRQ_VECTORS
312 msix_entry.entry = 0;
313 if (pci_enable_msix(udev->pdev, &msix_entry, 1) == 0) {
314 dev_dbg(&udev->pdev->dev, "using MSI-X");
315 udev->info.irq_flags = IRQF_NO_THREAD;
316 udev->info.irq = msix_entry.vector;
317 udev->mode = RTE_INTR_MODE_MSIX;
321 if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSIX) == 1) {
322 dev_dbg(&udev->pdev->dev, "using MSI-X");
323 udev->info.irq_flags = IRQF_NO_THREAD;
324 udev->info.irq = pci_irq_vector(udev->pdev, 0);
325 udev->mode = RTE_INTR_MODE_MSIX;
329 /* fall back to INTX */
330 case RTE_INTR_MODE_LEGACY:
331 if (pci_intx_mask_supported(udev->pdev)) {
332 dev_dbg(&udev->pdev->dev, "using INTX");
333 udev->info.irq_flags = IRQF_SHARED | IRQF_NO_THREAD;
334 udev->info.irq = udev->pdev->irq;
335 udev->mode = RTE_INTR_MODE_LEGACY;
338 dev_notice(&udev->pdev->dev, "PCI INTX mask not supported\n");
339 /* fall back to no IRQ */
340 case RTE_INTR_MODE_NONE:
341 udev->mode = RTE_INTR_MODE_NONE;
346 dev_err(&udev->pdev->dev, "invalid IRQ mode %u",
347 igbuio_intr_mode_preferred);
355 igbuio_pci_disable_interrupts(struct rte_uio_pci_dev *udev)
357 #ifndef HAVE_ALLOC_IRQ_VECTORS
358 if (udev->mode == RTE_INTR_MODE_MSIX)
359 pci_disable_msix(udev->pdev);
361 if (udev->mode == RTE_INTR_MODE_MSIX)
362 pci_free_irq_vectors(udev->pdev);
367 igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info)
369 int i, iom, iop, ret;
371 static const char *bar_names[PCI_STD_RESOURCE_END + 1] = {
383 for (i = 0; i < ARRAY_SIZE(bar_names); i++) {
384 if (pci_resource_len(dev, i) != 0 &&
385 pci_resource_start(dev, i) != 0) {
386 flags = pci_resource_flags(dev, i);
387 if (flags & IORESOURCE_MEM) {
388 ret = igbuio_pci_setup_iomem(dev, info, iom,
393 } else if (flags & IORESOURCE_IO) {
394 ret = igbuio_pci_setup_ioport(dev, info, iop,
403 return (iom != 0 || iop != 0) ? ret : -ENOENT;
406 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)
411 igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
413 struct rte_uio_pci_dev *udev;
414 dma_addr_t map_dma_addr;
418 udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL);
423 * enable device: ask low-level code to enable I/O and
426 err = pci_enable_device(dev);
428 dev_err(&dev->dev, "Cannot enable PCI device\n");
432 /* enable bus mastering on the device */
435 /* remap IO memory */
436 err = igbuio_setup_bars(dev, &udev->info);
438 goto fail_release_iomem;
440 /* set 64-bit DMA mask */
441 err = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
443 dev_err(&dev->dev, "Cannot set DMA mask\n");
444 goto fail_release_iomem;
447 err = pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64));
449 dev_err(&dev->dev, "Cannot set consistent DMA mask\n");
450 goto fail_release_iomem;
454 udev->info.name = "igb_uio";
455 udev->info.version = "0.1";
456 udev->info.handler = igbuio_pci_irqhandler;
457 udev->info.irqcontrol = igbuio_pci_irqcontrol;
458 udev->info.open = igbuio_pci_open;
459 udev->info.release = igbuio_pci_release;
460 #ifdef CONFIG_XEN_DOM0
461 /* check if the driver run on Xen Dom0 */
462 if (xen_initial_domain())
463 udev->info.mmap = igbuio_dom0_pci_mmap;
465 udev->info.priv = udev;
468 err = igbuio_pci_enable_interrupts(udev);
470 goto fail_release_iomem;
472 err = sysfs_create_group(&dev->dev.kobj, &dev_attr_grp);
474 goto fail_disable_interrupts;
476 /* register uio driver */
477 err = uio_register_device(&dev->dev, &udev->info);
479 goto fail_remove_group;
481 pci_set_drvdata(dev, udev);
483 dev_info(&dev->dev, "uio device registered with irq %lx\n",
487 * Doing a harmless dma mapping for attaching the device to
488 * the iommu identity mapping if kernel boots with iommu=pt.
489 * Note this is not a problem if no IOMMU at all.
491 map_addr = dma_alloc_coherent(&dev->dev, 1024, &map_dma_addr,
494 memset(map_addr, 0, 1024);
497 dev_info(&dev->dev, "dma mapping failed\n");
499 dev_info(&dev->dev, "mapping 1K dma=%#llx host=%p\n",
500 (unsigned long long)map_dma_addr, map_addr);
502 dma_free_coherent(&dev->dev, 1024, map_addr, map_dma_addr);
503 dev_info(&dev->dev, "unmapping 1K dma=%#llx host=%p\n",
504 (unsigned long long)map_dma_addr, map_addr);
510 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
511 fail_disable_interrupts:
512 igbuio_pci_disable_interrupts(udev);
514 igbuio_pci_release_iomem(&udev->info);
515 pci_disable_device(dev);
523 igbuio_pci_remove(struct pci_dev *dev)
525 struct rte_uio_pci_dev *udev = pci_get_drvdata(dev);
527 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
528 uio_unregister_device(&udev->info);
529 igbuio_pci_disable_interrupts(udev);
530 igbuio_pci_release_iomem(&udev->info);
531 pci_disable_device(dev);
532 pci_set_drvdata(dev, NULL);
537 igbuio_config_intr_mode(char *intr_str)
540 pr_info("Use MSIX interrupt by default\n");
544 if (!strcmp(intr_str, RTE_INTR_MODE_MSIX_NAME)) {
545 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
546 pr_info("Use MSIX interrupt\n");
547 } else if (!strcmp(intr_str, RTE_INTR_MODE_LEGACY_NAME)) {
548 igbuio_intr_mode_preferred = RTE_INTR_MODE_LEGACY;
549 pr_info("Use legacy interrupt\n");
551 pr_info("Error: bad parameter - %s\n", intr_str);
558 static struct pci_driver igbuio_pci_driver = {
561 .probe = igbuio_pci_probe,
562 .remove = igbuio_pci_remove,
566 igbuio_pci_init_module(void)
570 ret = igbuio_config_intr_mode(intr_mode);
574 return pci_register_driver(&igbuio_pci_driver);
578 igbuio_pci_exit_module(void)
580 pci_unregister_driver(&igbuio_pci_driver);
583 module_init(igbuio_pci_init_module);
584 module_exit(igbuio_pci_exit_module);
586 module_param(intr_mode, charp, S_IRUGO);
587 MODULE_PARM_DESC(intr_mode,
588 "igb_uio interrupt mode (default=msix):\n"
589 " " RTE_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n"
590 " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n"
593 MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards");
594 MODULE_LICENSE("GPL");
595 MODULE_AUTHOR("Intel Corporation");