1 // SPDX-License-Identifier: GPL-2.0
2 /*******************************************************************************
4 Intel(R) Gigabit Ethernet Linux driver
5 Copyright(c) 2007-2013 Intel Corporation.
8 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
11 *******************************************************************************/
13 #include "e1000_api.h"
16 static s32 e1000_acquire_nvm_i210(struct e1000_hw *hw);
17 static void e1000_release_nvm_i210(struct e1000_hw *hw);
18 static s32 e1000_get_hw_semaphore_i210(struct e1000_hw *hw);
19 static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
21 static s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw);
22 static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
25 * e1000_acquire_nvm_i210 - Request for access to EEPROM
26 * @hw: pointer to the HW structure
28 * Acquire the necessary semaphores for exclusive access to the EEPROM.
29 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
30 * Return successful if access grant bit set, else clear the request for
31 * EEPROM access and return -E1000_ERR_NVM (-1).
33 static s32 e1000_acquire_nvm_i210(struct e1000_hw *hw)
37 DEBUGFUNC("e1000_acquire_nvm_i210");
39 ret_val = e1000_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
45 * e1000_release_nvm_i210 - Release exclusive access to EEPROM
46 * @hw: pointer to the HW structure
48 * Stop any current commands to the EEPROM and clear the EEPROM request bit,
49 * then release the semaphores acquired.
51 static void e1000_release_nvm_i210(struct e1000_hw *hw)
53 DEBUGFUNC("e1000_release_nvm_i210");
55 e1000_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
59 * e1000_acquire_swfw_sync_i210 - Acquire SW/FW semaphore
60 * @hw: pointer to the HW structure
61 * @mask: specifies which semaphore to acquire
63 * Acquire the SW/FW semaphore to access the PHY or NVM. The mask
64 * will also specify which port we're acquiring the lock for.
66 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
70 u32 fwmask = mask << 16;
71 s32 ret_val = E1000_SUCCESS;
72 s32 i = 0, timeout = 200; /* FIXME: find real value to use here */
74 DEBUGFUNC("e1000_acquire_swfw_sync_i210");
77 if (e1000_get_hw_semaphore_i210(hw)) {
78 ret_val = -E1000_ERR_SWFW_SYNC;
82 swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
83 if (!(swfw_sync & (fwmask | swmask)))
87 * Firmware currently using resource (fwmask)
88 * or other software thread using resource (swmask)
90 e1000_put_hw_semaphore_generic(hw);
96 DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
97 ret_val = -E1000_ERR_SWFW_SYNC;
102 E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
104 e1000_put_hw_semaphore_generic(hw);
111 * e1000_release_swfw_sync_i210 - Release SW/FW semaphore
112 * @hw: pointer to the HW structure
113 * @mask: specifies which semaphore to acquire
115 * Release the SW/FW semaphore used to access the PHY or NVM. The mask
116 * will also specify which port we're releasing the lock for.
118 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
122 DEBUGFUNC("e1000_release_swfw_sync_i210");
124 while (e1000_get_hw_semaphore_i210(hw) != E1000_SUCCESS)
127 swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
129 E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
131 e1000_put_hw_semaphore_generic(hw);
135 * e1000_get_hw_semaphore_i210 - Acquire hardware semaphore
136 * @hw: pointer to the HW structure
138 * Acquire the HW semaphore to access the PHY or NVM
140 static s32 e1000_get_hw_semaphore_i210(struct e1000_hw *hw)
143 s32 timeout = hw->nvm.word_size + 1;
146 DEBUGFUNC("e1000_get_hw_semaphore_i210");
148 /* Get the SW semaphore */
149 while (i < timeout) {
150 swsm = E1000_READ_REG(hw, E1000_SWSM);
151 if (!(swsm & E1000_SWSM_SMBI))
159 /* In rare circumstances, the SW semaphore may already be held
160 * unintentionally. Clear the semaphore once before giving up.
162 if (hw->dev_spec._82575.clear_semaphore_once) {
163 hw->dev_spec._82575.clear_semaphore_once = false;
164 e1000_put_hw_semaphore_generic(hw);
165 for (i = 0; i < timeout; i++) {
166 swsm = E1000_READ_REG(hw, E1000_SWSM);
167 if (!(swsm & E1000_SWSM_SMBI))
174 /* If we do not have the semaphore here, we have to give up. */
176 DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
177 return -E1000_ERR_NVM;
181 /* Get the FW semaphore. */
182 for (i = 0; i < timeout; i++) {
183 swsm = E1000_READ_REG(hw, E1000_SWSM);
184 E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
186 /* Semaphore acquired if bit latched */
187 if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
194 /* Release semaphores */
195 e1000_put_hw_semaphore_generic(hw);
196 DEBUGOUT("Driver can't access the NVM\n");
197 return -E1000_ERR_NVM;
200 return E1000_SUCCESS;
204 * e1000_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register
205 * @hw: pointer to the HW structure
206 * @offset: offset of word in the Shadow Ram to read
207 * @words: number of words to read
208 * @data: word read from the Shadow Ram
210 * Reads a 16 bit word from the Shadow Ram using the EERD register.
211 * Uses necessary synchronization semaphores.
213 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,
216 s32 status = E1000_SUCCESS;
219 DEBUGFUNC("e1000_read_nvm_srrd_i210");
221 /* We cannot hold synchronization semaphores for too long,
222 * because of forceful takeover procedure. However it is more efficient
223 * to read in bursts than synchronizing access for each word. */
224 for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
225 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
226 E1000_EERD_EEWR_MAX_COUNT : (words - i);
227 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
228 status = e1000_read_nvm_eerd(hw, offset, count,
230 hw->nvm.ops.release(hw);
232 status = E1000_ERR_SWFW_SYNC;
235 if (status != E1000_SUCCESS)
243 * e1000_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
244 * @hw: pointer to the HW structure
245 * @offset: offset within the Shadow RAM to be written to
246 * @words: number of words to write
247 * @data: 16 bit word(s) to be written to the Shadow RAM
249 * Writes data to Shadow RAM at offset using EEWR register.
251 * If e1000_update_nvm_checksum is not called after this function , the
252 * data will not be committed to FLASH and also Shadow RAM will most likely
253 * contain an invalid checksum.
255 * If error code is returned, data and Shadow RAM may be inconsistent - buffer
258 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
261 s32 status = E1000_SUCCESS;
264 DEBUGFUNC("e1000_write_nvm_srwr_i210");
266 /* We cannot hold synchronization semaphores for too long,
267 * because of forceful takeover procedure. However it is more efficient
268 * to write in bursts than synchronizing access for each word. */
269 for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
270 count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
271 E1000_EERD_EEWR_MAX_COUNT : (words - i);
272 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
273 status = e1000_write_nvm_srwr(hw, offset, count,
275 hw->nvm.ops.release(hw);
277 status = E1000_ERR_SWFW_SYNC;
280 if (status != E1000_SUCCESS)
288 * e1000_write_nvm_srwr - Write to Shadow Ram using EEWR
289 * @hw: pointer to the HW structure
290 * @offset: offset within the Shadow Ram to be written to
291 * @words: number of words to write
292 * @data: 16 bit word(s) to be written to the Shadow Ram
294 * Writes data to Shadow Ram at offset using EEWR register.
296 * If e1000_update_nvm_checksum is not called after this function , the
297 * Shadow Ram will most likely contain an invalid checksum.
299 static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
302 struct e1000_nvm_info *nvm = &hw->nvm;
304 u32 attempts = 100000;
305 s32 ret_val = E1000_SUCCESS;
307 DEBUGFUNC("e1000_write_nvm_srwr");
310 * A check for invalid values: offset too large, too many words,
311 * too many words for the offset, and not enough words.
313 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
315 DEBUGOUT("nvm parameter(s) out of bounds\n");
316 ret_val = -E1000_ERR_NVM;
320 for (i = 0; i < words; i++) {
321 eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
322 (data[i] << E1000_NVM_RW_REG_DATA) |
323 E1000_NVM_RW_REG_START;
325 E1000_WRITE_REG(hw, E1000_SRWR, eewr);
327 for (k = 0; k < attempts; k++) {
328 if (E1000_NVM_RW_REG_DONE &
329 E1000_READ_REG(hw, E1000_SRWR)) {
330 ret_val = E1000_SUCCESS;
336 if (ret_val != E1000_SUCCESS) {
337 DEBUGOUT("Shadow RAM write EEWR timed out\n");
346 /** e1000_read_invm_word_i210 - Reads OTP
347 * @hw: pointer to the HW structure
348 * @address: the word address (aka eeprom offset) to read
349 * @data: pointer to the data read
351 * Reads 16-bit words from the OTP. Return error when the word is not
354 static s32 e1000_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)
356 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
359 u8 record_type, word_address;
361 DEBUGFUNC("e1000_read_invm_word_i210");
363 for (i = 0; i < E1000_INVM_SIZE; i++) {
364 invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
365 /* Get record type */
366 record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
367 if (record_type == E1000_INVM_UNINITIALIZED_STRUCTURE)
369 if (record_type == E1000_INVM_CSR_AUTOLOAD_STRUCTURE)
370 i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
371 if (record_type == E1000_INVM_RSA_KEY_SHA256_STRUCTURE)
372 i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
373 if (record_type == E1000_INVM_WORD_AUTOLOAD_STRUCTURE) {
374 word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
375 if (word_address == address) {
376 *data = INVM_DWORD_TO_WORD_DATA(invm_dword);
377 DEBUGOUT2("Read INVM Word 0x%02x = %x",
379 status = E1000_SUCCESS;
384 if (status != E1000_SUCCESS)
385 DEBUGOUT1("Requested word 0x%02x not found in OTP\n", address);
389 /** e1000_read_invm_i210 - Read invm wrapper function for I210/I211
390 * @hw: pointer to the HW structure
391 * @address: the word address (aka eeprom offset) to read
392 * @data: pointer to the data read
394 * Wrapper function to return data formerly found in the NVM.
396 static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,
397 u16 E1000_UNUSEDARG words, u16 *data)
399 s32 ret_val = E1000_SUCCESS;
401 DEBUGFUNC("e1000_read_invm_i210");
403 /* Only the MAC addr is required to be present in the iNVM */
406 ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
407 ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
409 ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
411 if (ret_val != E1000_SUCCESS)
412 DEBUGOUT("MAC Addr not found in iNVM\n");
414 case NVM_INIT_CTRL_2:
415 ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
416 if (ret_val != E1000_SUCCESS) {
417 *data = NVM_INIT_CTRL_2_DEFAULT_I211;
418 ret_val = E1000_SUCCESS;
421 case NVM_INIT_CTRL_4:
422 ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
423 if (ret_val != E1000_SUCCESS) {
424 *data = NVM_INIT_CTRL_4_DEFAULT_I211;
425 ret_val = E1000_SUCCESS;
429 ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
430 if (ret_val != E1000_SUCCESS) {
431 *data = NVM_LED_1_CFG_DEFAULT_I211;
432 ret_val = E1000_SUCCESS;
435 case NVM_LED_0_2_CFG:
436 ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
437 if (ret_val != E1000_SUCCESS) {
438 *data = NVM_LED_0_2_CFG_DEFAULT_I211;
439 ret_val = E1000_SUCCESS;
442 case NVM_ID_LED_SETTINGS:
443 ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
444 if (ret_val != E1000_SUCCESS) {
445 *data = ID_LED_RESERVED_FFFF;
446 ret_val = E1000_SUCCESS;
450 *data = hw->subsystem_device_id;
453 *data = hw->subsystem_vendor_id;
456 *data = hw->device_id;
459 *data = hw->vendor_id;
462 DEBUGOUT1("NVM word 0x%02x is not mapped.\n", offset);
463 *data = NVM_RESERVED_WORD;
470 * e1000_read_invm_version - Reads iNVM version and image type
471 * @hw: pointer to the HW structure
472 * @invm_ver: version structure for the version read
474 * Reads iNVM version and image type.
476 s32 e1000_read_invm_version(struct e1000_hw *hw,
477 struct e1000_fw_version *invm_ver)
480 u32 *next_record = NULL;
483 u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE /
484 E1000_INVM_RECORD_SIZE_IN_BYTES);
485 u32 buffer[E1000_INVM_SIZE];
486 s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
489 DEBUGFUNC("e1000_read_invm_version");
491 /* Read iNVM memory */
492 for (i = 0; i < E1000_INVM_SIZE; i++) {
493 invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
494 buffer[i] = invm_dword;
497 /* Read version number */
498 for (i = 1; i < invm_blocks; i++) {
499 record = &buffer[invm_blocks - i];
500 next_record = &buffer[invm_blocks - i + 1];
502 /* Check if we have first version location used */
503 if ((i == 1) && ((*record & E1000_INVM_VER_FIELD_ONE) == 0)) {
505 status = E1000_SUCCESS;
508 /* Check if we have second version location used */
510 ((*record & E1000_INVM_VER_FIELD_TWO) == 0)) {
511 version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
512 status = E1000_SUCCESS;
516 * Check if we have odd version location
517 * used and it is the last one used
519 else if ((((*record & E1000_INVM_VER_FIELD_ONE) == 0) &&
520 ((*record & 0x3) == 0)) || (((*record & 0x3) != 0) &&
522 version = (*next_record & E1000_INVM_VER_FIELD_TWO)
524 status = E1000_SUCCESS;
528 * Check if we have even version location
529 * used and it is the last one used
531 else if (((*record & E1000_INVM_VER_FIELD_TWO) == 0) &&
532 ((*record & 0x3) == 0)) {
533 version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
534 status = E1000_SUCCESS;
539 if (status == E1000_SUCCESS) {
540 invm_ver->invm_major = (version & E1000_INVM_MAJOR_MASK)
541 >> E1000_INVM_MAJOR_SHIFT;
542 invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK;
544 /* Read Image Type */
545 for (i = 1; i < invm_blocks; i++) {
546 record = &buffer[invm_blocks - i];
547 next_record = &buffer[invm_blocks - i + 1];
549 /* Check if we have image type in first location used */
550 if ((i == 1) && ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) {
551 invm_ver->invm_img_type = 0;
552 status = E1000_SUCCESS;
555 /* Check if we have image type in first location used */
556 else if ((((*record & 0x3) == 0) &&
557 ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) ||
558 ((((*record & 0x3) != 0) && (i != 1)))) {
559 invm_ver->invm_img_type =
560 (*next_record & E1000_INVM_IMGTYPE_FIELD) >> 23;
561 status = E1000_SUCCESS;
569 * e1000_validate_nvm_checksum_i210 - Validate EEPROM checksum
570 * @hw: pointer to the HW structure
572 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
573 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
575 s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw)
577 s32 status = E1000_SUCCESS;
578 s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *);
580 DEBUGFUNC("e1000_validate_nvm_checksum_i210");
582 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
585 * Replace the read function with semaphore grabbing with
586 * the one that skips this for a while.
587 * We have semaphore taken already here.
589 read_op_ptr = hw->nvm.ops.read;
590 hw->nvm.ops.read = e1000_read_nvm_eerd;
592 status = e1000_validate_nvm_checksum_generic(hw);
594 /* Revert original read operation. */
595 hw->nvm.ops.read = read_op_ptr;
597 hw->nvm.ops.release(hw);
599 status = E1000_ERR_SWFW_SYNC;
607 * e1000_update_nvm_checksum_i210 - Update EEPROM checksum
608 * @hw: pointer to the HW structure
610 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
611 * up to the checksum. Then calculates the EEPROM checksum and writes the
612 * value to the EEPROM. Next commit EEPROM data onto the Flash.
614 s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw)
616 s32 ret_val = E1000_SUCCESS;
620 DEBUGFUNC("e1000_update_nvm_checksum_i210");
623 * Read the first word from the EEPROM. If this times out or fails, do
624 * not continue or we could be in for a very long wait while every
627 ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data);
628 if (ret_val != E1000_SUCCESS) {
629 DEBUGOUT("EEPROM read failed\n");
633 if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
635 * Do not use hw->nvm.ops.write, hw->nvm.ops.read
636 * because we do not want to take the synchronization
637 * semaphores twice here.
640 for (i = 0; i < NVM_CHECKSUM_REG; i++) {
641 ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data);
643 hw->nvm.ops.release(hw);
644 DEBUGOUT("NVM Read Error while updating checksum.\n");
647 checksum += nvm_data;
649 checksum = (u16) NVM_SUM - checksum;
650 ret_val = e1000_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,
652 if (ret_val != E1000_SUCCESS) {
653 hw->nvm.ops.release(hw);
654 DEBUGOUT("NVM Write Error while updating checksum.\n");
658 hw->nvm.ops.release(hw);
660 ret_val = e1000_update_flash_i210(hw);
662 ret_val = E1000_ERR_SWFW_SYNC;
669 * e1000_get_flash_presence_i210 - Check if flash device is detected.
670 * @hw: pointer to the HW structure
673 bool e1000_get_flash_presence_i210(struct e1000_hw *hw)
676 bool ret_val = false;
678 DEBUGFUNC("e1000_get_flash_presence_i210");
680 eec = E1000_READ_REG(hw, E1000_EECD);
682 if (eec & E1000_EECD_FLASH_DETECTED_I210)
689 * e1000_update_flash_i210 - Commit EEPROM to the flash
690 * @hw: pointer to the HW structure
693 s32 e1000_update_flash_i210(struct e1000_hw *hw)
695 s32 ret_val = E1000_SUCCESS;
698 DEBUGFUNC("e1000_update_flash_i210");
700 ret_val = e1000_pool_flash_update_done_i210(hw);
701 if (ret_val == -E1000_ERR_NVM) {
702 DEBUGOUT("Flash update time out\n");
706 flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I210;
707 E1000_WRITE_REG(hw, E1000_EECD, flup);
709 ret_val = e1000_pool_flash_update_done_i210(hw);
710 if (ret_val == E1000_SUCCESS)
711 DEBUGOUT("Flash update complete\n");
713 DEBUGOUT("Flash update time out\n");
720 * e1000_pool_flash_update_done_i210 - Pool FLUDONE status.
721 * @hw: pointer to the HW structure
724 s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw)
726 s32 ret_val = -E1000_ERR_NVM;
729 DEBUGFUNC("e1000_pool_flash_update_done_i210");
731 for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
732 reg = E1000_READ_REG(hw, E1000_EECD);
733 if (reg & E1000_EECD_FLUDONE_I210) {
734 ret_val = E1000_SUCCESS;
744 * e1000_init_nvm_params_i210 - Initialize i210 NVM function pointers
745 * @hw: pointer to the HW structure
747 * Initialize the i210/i211 NVM parameters and function pointers.
749 static s32 e1000_init_nvm_params_i210(struct e1000_hw *hw)
751 s32 ret_val = E1000_SUCCESS;
752 struct e1000_nvm_info *nvm = &hw->nvm;
754 DEBUGFUNC("e1000_init_nvm_params_i210");
756 ret_val = e1000_init_nvm_params_82575(hw);
757 nvm->ops.acquire = e1000_acquire_nvm_i210;
758 nvm->ops.release = e1000_release_nvm_i210;
759 nvm->ops.valid_led_default = e1000_valid_led_default_i210;
760 if (e1000_get_flash_presence_i210(hw)) {
761 hw->nvm.type = e1000_nvm_flash_hw;
762 nvm->ops.read = e1000_read_nvm_srrd_i210;
763 nvm->ops.write = e1000_write_nvm_srwr_i210;
764 nvm->ops.validate = e1000_validate_nvm_checksum_i210;
765 nvm->ops.update = e1000_update_nvm_checksum_i210;
767 hw->nvm.type = e1000_nvm_invm;
768 nvm->ops.read = e1000_read_invm_i210;
769 nvm->ops.write = e1000_null_write_nvm;
770 nvm->ops.validate = e1000_null_ops_generic;
771 nvm->ops.update = e1000_null_ops_generic;
777 * e1000_init_function_pointers_i210 - Init func ptrs.
778 * @hw: pointer to the HW structure
780 * Called to initialize all function pointers and parameters.
782 void e1000_init_function_pointers_i210(struct e1000_hw *hw)
784 e1000_init_function_pointers_82575(hw);
785 hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
791 * e1000_valid_led_default_i210 - Verify a valid default LED config
792 * @hw: pointer to the HW structure
793 * @data: pointer to the NVM (EEPROM)
795 * Read the EEPROM for the current default LED configuration. If the
796 * LED configuration is not valid, set to a valid LED configuration.
798 static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
802 DEBUGFUNC("e1000_valid_led_default_i210");
804 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
806 DEBUGOUT("NVM Read Error\n");
810 if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {
811 switch (hw->phy.media_type) {
812 case e1000_media_type_internal_serdes:
813 *data = ID_LED_DEFAULT_I210_SERDES;
815 case e1000_media_type_copper:
817 *data = ID_LED_DEFAULT_I210;
826 * __e1000_access_xmdio_reg - Read/write XMDIO register
827 * @hw: pointer to the HW structure
828 * @address: XMDIO address to program
829 * @dev_addr: device address to program
830 * @data: pointer to value to read/write from/to the XMDIO address
831 * @read: boolean flag to indicate read or write
833 static s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
834 u8 dev_addr, u16 *data, bool read)
836 s32 ret_val = E1000_SUCCESS;
838 DEBUGFUNC("__e1000_access_xmdio_reg");
840 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
844 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
848 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
854 ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
856 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
860 /* Recalibrate the device back to 0 */
861 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
869 * e1000_read_xmdio_reg - Read XMDIO register
870 * @hw: pointer to the HW structure
871 * @addr: XMDIO address to program
872 * @dev_addr: device address to program
873 * @data: value to be read from the EMI address
875 s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
877 DEBUGFUNC("e1000_read_xmdio_reg");
879 return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
883 * e1000_write_xmdio_reg - Write XMDIO register
884 * @hw: pointer to the HW structure
885 * @addr: XMDIO address to program
886 * @dev_addr: device address to program
887 * @data: value to be written to the XMDIO address
889 s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
891 DEBUGFUNC("e1000_read_xmdio_reg");
893 return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, false);