1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include "e1000_api.h"
31 * e1000_calculate_checksum - Calculate checksum for buffer
32 * @buffer: pointer to EEPROM
33 * @length: size of EEPROM to calculate a checksum for
35 * Calculates the checksum for some buffer on a specified length. The
36 * checksum calculated is returned.
38 u8 e1000_calculate_checksum(u8 *buffer, u32 length)
43 DEBUGFUNC("e1000_calculate_checksum");
48 for (i = 0; i < length; i++)
51 return (u8) (0 - sum);
55 * e1000_mng_enable_host_if_generic - Checks host interface is enabled
56 * @hw: pointer to the HW structure
58 * Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
60 * This function checks whether the HOST IF is enabled for command operation
61 * and also checks whether the previous command is completed. It busy waits
62 * in case of previous command is not completed.
64 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
69 DEBUGFUNC("e1000_mng_enable_host_if_generic");
71 if (!hw->mac.arc_subsystem_valid) {
72 DEBUGOUT("ARC subsystem not valid.\n");
73 return -E1000_ERR_HOST_INTERFACE_COMMAND;
76 /* Check that the host interface is enabled. */
77 hicr = E1000_READ_REG(hw, E1000_HICR);
78 if ((hicr & E1000_HICR_EN) == 0) {
79 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
80 return -E1000_ERR_HOST_INTERFACE_COMMAND;
82 /* check the previous command is completed */
83 for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
84 hicr = E1000_READ_REG(hw, E1000_HICR);
85 if (!(hicr & E1000_HICR_C))
90 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
91 DEBUGOUT("Previous command timeout failed .\n");
92 return -E1000_ERR_HOST_INTERFACE_COMMAND;
99 * e1000_check_mng_mode_generic - Generic check management mode
100 * @hw: pointer to the HW structure
102 * Reads the firmware semaphore register and returns true (>0) if
103 * manageability is enabled, else false (0).
105 bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
107 u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);
109 DEBUGFUNC("e1000_check_mng_mode_generic");
112 return (fwsm & E1000_FWSM_MODE_MASK) ==
113 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
117 * e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on Tx
118 * @hw: pointer to the HW structure
120 * Enables packet filtering on transmit packets if manageability is enabled
121 * and host interface is enabled.
123 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
125 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
126 u32 *buffer = (u32 *)&hw->mng_cookie;
128 s32 ret_val, hdr_csum, csum;
131 DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
133 hw->mac.tx_pkt_filtering = true;
135 /* No manageability, no filtering */
136 if (!hw->mac.ops.check_mng_mode(hw)) {
137 hw->mac.tx_pkt_filtering = false;
138 return hw->mac.tx_pkt_filtering;
142 * If we can't read from the host interface for whatever
143 * reason, disable filtering.
145 ret_val = hw->mac.ops.mng_enable_host_if(hw);
146 if (ret_val != E1000_SUCCESS) {
147 hw->mac.tx_pkt_filtering = false;
148 return hw->mac.tx_pkt_filtering;
151 /* Read in the header. Length and offset are in dwords. */
152 len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
153 offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
154 for (i = 0; i < len; i++)
155 *(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF,
157 hdr_csum = hdr->checksum;
159 csum = e1000_calculate_checksum((u8 *)hdr,
160 E1000_MNG_DHCP_COOKIE_LENGTH);
162 * If either the checksums or signature don't match, then
163 * the cookie area isn't considered valid, in which case we
164 * take the safe route of assuming Tx filtering is enabled.
166 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
167 hw->mac.tx_pkt_filtering = true;
168 return hw->mac.tx_pkt_filtering;
171 /* Cookie area is valid, make the final check for filtering. */
172 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
173 hw->mac.tx_pkt_filtering = false;
175 return hw->mac.tx_pkt_filtering;
179 * e1000_mng_write_cmd_header_generic - Writes manageability command header
180 * @hw: pointer to the HW structure
181 * @hdr: pointer to the host interface command header
183 * Writes the command header after does the checksum calculation.
185 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
186 struct e1000_host_mng_command_header *hdr)
188 u16 i, length = sizeof(struct e1000_host_mng_command_header);
190 DEBUGFUNC("e1000_mng_write_cmd_header_generic");
192 /* Write the whole command header structure with new checksum. */
194 hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
197 /* Write the relevant command block into the ram area. */
198 for (i = 0; i < length; i++) {
199 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
201 E1000_WRITE_FLUSH(hw);
204 return E1000_SUCCESS;
208 * e1000_mng_host_if_write_generic - Write to the manageability host interface
209 * @hw: pointer to the HW structure
210 * @buffer: pointer to the host interface buffer
211 * @length: size of the buffer
212 * @offset: location in the buffer to write to
213 * @sum: sum of the data (not checksum)
215 * This function writes the buffer content at the offset given on the host if.
216 * It also does alignment considerations to do the writes in most efficient
217 * way. Also fills up the sum of the buffer in *buffer parameter.
219 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
220 u16 length, u16 offset, u8 *sum)
225 u16 remaining, i, j, prev_bytes;
227 DEBUGFUNC("e1000_mng_host_if_write_generic");
229 /* sum = only sum of the data and it is not checksum */
231 if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH)
232 return -E1000_ERR_PARAM;
235 prev_bytes = offset & 0x3;
239 data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
240 for (j = prev_bytes; j < sizeof(u32); j++) {
241 *(tmp + j) = *bufptr++;
244 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
245 length -= j - prev_bytes;
249 remaining = length & 0x3;
252 /* Calculate length in DWORDs */
256 * The device driver writes the relevant command block into the
259 for (i = 0; i < length; i++) {
260 for (j = 0; j < sizeof(u32); j++) {
261 *(tmp + j) = *bufptr++;
265 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
269 for (j = 0; j < sizeof(u32); j++) {
271 *(tmp + j) = *bufptr++;
277 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
281 return E1000_SUCCESS;
285 * e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
286 * @hw: pointer to the HW structure
287 * @buffer: pointer to the host interface
288 * @length: size of the buffer
290 * Writes the DHCP information to the host interface.
292 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
295 struct e1000_host_mng_command_header hdr;
299 DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
301 hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
302 hdr.command_length = length;
307 /* Enable the host interface */
308 ret_val = hw->mac.ops.mng_enable_host_if(hw);
312 /* Populate the host interface with the contents of "buffer". */
313 ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
314 sizeof(hdr), &(hdr.checksum));
318 /* Write the manageability command header */
319 ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
323 /* Tell the ARC a new command is pending. */
324 hicr = E1000_READ_REG(hw, E1000_HICR);
325 E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
327 return E1000_SUCCESS;
331 * e1000_enable_mng_pass_thru - Check if management passthrough is needed
332 * @hw: pointer to the HW structure
334 * Verifies the hardware needs to leave interface enabled so that frames can
335 * be directed to and from the management interface.
337 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
342 DEBUGFUNC("e1000_enable_mng_pass_thru");
344 if (!hw->mac.asf_firmware_present)
347 manc = E1000_READ_REG(hw, E1000_MANC);
349 if (!(manc & E1000_MANC_RCV_TCO_EN))
352 if (hw->mac.has_fwsm) {
353 fwsm = E1000_READ_REG(hw, E1000_FWSM);
354 factps = E1000_READ_REG(hw, E1000_FACTPS);
356 if (!(factps & E1000_FACTPS_MNGCG) &&
357 ((fwsm & E1000_FWSM_MODE_MASK) ==
358 (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT)))
360 } else if ((manc & E1000_MANC_SMBUS_EN) &&
361 !(manc & E1000_MANC_ASF_EN)) {
369 * e1000_host_interface_command - Writes buffer to host interface
370 * @hw: pointer to the HW structure
371 * @buffer: contains a command to write
372 * @length: the byte length of the buffer, must be multiple of 4 bytes
374 * Writes a buffer to the Host Interface. Upon success, returns E1000_SUCCESS
375 * else returns E1000_ERR_HOST_INTERFACE_COMMAND.
377 s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
381 DEBUGFUNC("e1000_host_interface_command");
383 if (!(hw->mac.arc_subsystem_valid)) {
384 DEBUGOUT("Hardware doesn't support host interface command.\n");
385 return E1000_SUCCESS;
388 if (!hw->mac.asf_firmware_present) {
389 DEBUGOUT("Firmware is not present.\n");
390 return E1000_SUCCESS;
393 if (length == 0 || length & 0x3 ||
394 length > E1000_HI_MAX_BLOCK_BYTE_LENGTH) {
395 DEBUGOUT("Buffer length failure.\n");
396 return -E1000_ERR_HOST_INTERFACE_COMMAND;
399 /* Check that the host interface is enabled. */
400 hicr = E1000_READ_REG(hw, E1000_HICR);
401 if ((hicr & E1000_HICR_EN) == 0) {
402 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
403 return -E1000_ERR_HOST_INTERFACE_COMMAND;
406 /* Calculate length in DWORDs */
410 * The device driver writes the relevant command block
413 for (i = 0; i < length; i++)
414 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
415 *((u32 *)buffer + i));
417 /* Setting this bit tells the ARC that a new command is pending. */
418 E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
420 for (i = 0; i < E1000_HI_COMMAND_TIMEOUT; i++) {
421 hicr = E1000_READ_REG(hw, E1000_HICR);
422 if (!(hicr & E1000_HICR_C))
427 /* Check command successful completion. */
428 if (i == E1000_HI_COMMAND_TIMEOUT ||
429 (!(E1000_READ_REG(hw, E1000_HICR) & E1000_HICR_SV))) {
430 DEBUGOUT("Command has failed with no status valid.\n");
431 return -E1000_ERR_HOST_INTERFACE_COMMAND;
434 for (i = 0; i < length; i++)
435 *((u32 *)buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
439 return E1000_SUCCESS;