1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "LICENSE.GPL".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
29 /* glue for the OS independent part of e1000
30 * includes register access macros
33 #ifndef _E1000_OSDEP_H_
34 #define _E1000_OSDEP_H_
36 #include <linux/pci.h>
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/if_ether.h>
40 #include <linux/sched.h>
43 #ifndef __INTEL_COMPILER
44 #pragma GCC diagnostic ignored "-Wunused-function"
47 #define usec_delay(x) udelay(x)
48 #define usec_delay_irq(x) udelay(x)
50 #define msec_delay(x) do { \
51 /* Don't mdelay in interrupt context! */ \
58 /* Some workarounds require millisecond delays and are run during interrupt
59 * context. Most notably, when establishing link, the phy may need tweaking
60 * but cannot process phy register reads/writes faster than millisecond
61 * intervals...and we establish link due to a "link status change" interrupt.
63 #define msec_delay_irq(x) mdelay(x)
66 #define PCI_COMMAND_REGISTER PCI_COMMAND
67 #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
68 #define ETH_ADDR_LEN ETH_ALEN
71 #define E1000_BIG_ENDIAN __BIG_ENDIAN
76 #define DEBUGOUT(S) printk(KERN_DEBUG S)
77 #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S, ## A)
80 #define DEBUGOUT1(S, A...)
84 #define DEBUGFUNC(F) DEBUGOUT(F "\n")
88 #define DEBUGOUT2 DEBUGOUT1
89 #define DEBUGOUT3 DEBUGOUT2
90 #define DEBUGOUT7 DEBUGOUT3
92 #define E1000_REGISTER(a, reg) reg
94 #define E1000_WRITE_REG(a, reg, value) ( \
95 writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg))))
97 #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_REGISTER(a, reg)))
99 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
100 writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))))
102 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
103 readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
105 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
106 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
108 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
109 writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
111 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
112 readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
114 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
115 writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
117 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
118 readb((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))
120 #define E1000_WRITE_REG_IO(a, reg, offset) do { \
121 outl(reg, ((a)->io_base)); \
122 outl(offset, ((a)->io_base + 4)); } while (0)
124 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
126 #define E1000_WRITE_FLASH_REG(a, reg, value) ( \
127 writel((value), ((a)->flash_address + reg)))
129 #define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
130 writew((value), ((a)->flash_address + reg)))
132 #define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
134 #define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
136 #endif /* _E1000_OSDEP_H_ */