1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* Linux PRO/1000 Ethernet Driver main header file */
33 #include <linux/kobject.h>
39 #include <linux/pci.h>
40 #include <linux/netdevice.h>
41 #include <linux/vmalloc.h>
44 #include <linux/ethtool.h>
47 #ifdef HAVE_HW_TIME_STAMP
48 #include <linux/clocksource.h>
49 #include <linux/timecompare.h>
50 #include <linux/net_tstamp.h>
55 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
59 #include <linux/dca.h>
62 #ifndef HAVE_HW_TIME_STAMP
63 #undef IGB_PER_PKT_TIMESTAMP
70 #include <linux/sctp.h>
73 #include "e1000_api.h"
74 #include "e1000_82575.h"
75 #include "e1000_manage.h"
76 #include "e1000_mbx.h"
78 #define IGB_ERR(args...) printk(KERN_ERR "igb: " args)
81 #define DPRINTK(nlevel, klevel, fmt, args...) \
82 (void)((NETIF_MSG_##nlevel & adapter->msg_enable) && \
83 printk(KERN_##klevel PFX "%s: %s: " fmt, adapter->netdev->name, \
84 __FUNCTION__ , ## args))
86 /* Interrupt defines */
87 #define IGB_START_ITR 648 /* ~6000 ints/sec */
88 #define IGB_4K_ITR 980
89 #define IGB_20K_ITR 196
90 #define IGB_70K_ITR 56
92 /* Interrupt modes, as used by the IntMode paramter */
93 #define IGB_INT_MODE_LEGACY 0
94 #define IGB_INT_MODE_MSI 1
95 #define IGB_INT_MODE_MSIX 2
97 /* TX/RX descriptor defines */
98 #define IGB_DEFAULT_TXD 256
99 #define IGB_DEFAULT_TX_WORK 128
100 #define IGB_MIN_TXD 80
101 #define IGB_MAX_TXD 4096
103 #define IGB_DEFAULT_RXD 256
104 #define IGB_MIN_RXD 80
105 #define IGB_MAX_RXD 4096
107 #define IGB_MIN_ITR_USECS 10 /* 100k irq/sec */
108 #define IGB_MAX_ITR_USECS 8191 /* 120 irq/sec */
110 #define NON_Q_VECTORS 1
111 #define MAX_Q_VECTORS 10
113 /* Transmit and receive queues */
114 #define IGB_MAX_RX_QUEUES 16
115 #define IGB_MAX_TX_QUEUES 16
117 #define IGB_MAX_VF_MC_ENTRIES 30
118 #define IGB_MAX_VF_FUNCTIONS 8
119 #define IGB_82576_VF_DEV_ID 0x10CA
120 #define IGB_I350_VF_DEV_ID 0x1520
121 #define IGB_MAX_UTA_ENTRIES 128
122 #define MAX_EMULATION_MAC_ADDRS 16
124 #define IGB_MAX_VMDQ_QUEUES 8
127 struct vf_data_storage {
128 unsigned char vf_mac_addresses[ETH_ALEN];
129 u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
130 u16 num_vf_mc_hashes;
131 u16 default_vf_vlan_id;
133 unsigned char em_mac_addresses[MAX_EMULATION_MAC_ADDRS * ETH_ALEN];
134 u32 uta_table_copy[IGB_MAX_UTA_ENTRIES];
136 unsigned long last_nack;
138 u16 pf_vlan; /* When set, guest VLAN config not allowed. */
142 struct pci_dev *vfdev;
145 #define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */
146 #define IGB_VF_FLAG_UNI_PROMISC 0x00000002 /* VF has unicast promisc */
147 #define IGB_VF_FLAG_MULTI_PROMISC 0x00000004 /* VF has multicast promisc */
148 #define IGB_VF_FLAG_PF_SET_MAC 0x00000008 /* PF has set MAC address */
150 /* RX descriptor control thresholds.
151 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
152 * descriptors available in its onboard memory.
153 * Setting this to 0 disables RX descriptor prefetch.
154 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
155 * available in host memory.
156 * If PTHRESH is 0, this should also be 0.
157 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
158 * descriptors until either it has this many to write back, or the
161 #define IGB_RX_PTHRESH 8
162 #define IGB_RX_HTHRESH 8
163 #define IGB_TX_PTHRESH 8
164 #define IGB_TX_HTHRESH 1
165 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
166 adapter->msix_entries) ? 1 : 4)
167 #define IGB_TX_WTHRESH ((hw->mac.type == e1000_82576 && \
168 adapter->msix_entries) ? 1 : 16)
170 /* this is the size past which hardware will drop packets when setting LPE=0 */
171 #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
173 /* NOTE: netdev_alloc_skb reserves 16 bytes, NET_IP_ALIGN means we
174 * reserve 2 more, and skb_shared_info adds an additional 384 more,
175 * this adds roughly 448 bytes of extra data meaning the smallest
176 * allocation we could have is 1K.
177 * i.e. RXBUFFER_512 --> size-1024 slab
179 /* Supported Rx Buffer Sizes */
180 #define IGB_RXBUFFER_512 512
181 #define IGB_RXBUFFER_16384 16384
182 #define IGB_RX_HDR_LEN IGB_RXBUFFER_512
185 /* Packet Buffer allocations */
186 #define IGB_PBA_BYTES_SHIFT 0xA
187 #define IGB_TX_HEAD_ADDR_SHIFT 7
188 #define IGB_PBA_TX_MASK 0xFFFF0000
190 #define IGB_FC_PAUSE_TIME 0x0680 /* 858 usec */
192 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
193 #define IGB_TX_QUEUE_WAKE 32
194 /* How many Rx Buffers do we bundle into one write to the hardware ? */
195 #define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */
197 #define IGB_EEPROM_APME 0x0400
199 #define AUTO_ALL_MODES 0
202 #ifndef IGB_MASTER_SLAVE
203 /* Switch to override PHY master/slave setting */
204 #define IGB_MASTER_SLAVE e1000_ms_hw_default
207 #define IGB_MNG_VLAN_NONE -1
210 #define IGB_LRO_MAX 32 /*Maximum number of LRO descriptors*/
211 struct igb_lro_stats {
218 * igb_lro_header - header format to be aggregated by LRO
219 * @iph: IP header without options
221 * @ts: Optional TCP timestamp data in TCP options
223 * This structure relies on the check above that verifies that the header
224 * is IPv4 and does not contain any options.
232 struct igb_lro_list {
233 struct sk_buff_head active;
234 struct igb_lro_stats stats;
237 #endif /* IGB_NO_LRO */
240 union { /* Union defining head/tail partner */
241 struct sk_buff *head;
242 struct sk_buff *tail;
244 __be32 tsecr; /* timestamp echo response */
245 u32 tsval; /* timestamp value in host order */
246 u32 next_seq; /* next expected sequence number */
247 u16 free; /* 65521 minus total size */
248 u16 mss; /* size of data portion of packet */
249 u16 append_cnt; /* number of skb's appended */
250 #endif /* IGB_NO_LRO */
251 #ifdef HAVE_VLAN_RX_REGISTER
252 u16 vid; /* VLAN tag */
255 #define IGB_CB(skb) ((struct igb_cb *)(skb)->cb)
257 #define IGB_TX_FLAGS_CSUM 0x00000001
258 #define IGB_TX_FLAGS_VLAN 0x00000002
259 #define IGB_TX_FLAGS_TSO 0x00000004
260 #define IGB_TX_FLAGS_IPV4 0x00000008
261 #define IGB_TX_FLAGS_TSTAMP 0x00000010
262 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
263 #define IGB_TX_FLAGS_VLAN_SHIFT 16
265 /* wrapper around a pointer to a socket buffer,
266 * so a DMA handle can be stored along with the buffer */
267 struct igb_tx_buffer {
268 union e1000_adv_tx_desc *next_to_watch;
269 unsigned long time_stamp;
271 unsigned int bytecount;
274 DEFINE_DMA_UNMAP_ADDR(dma);
275 DEFINE_DMA_UNMAP_LEN(len);
279 struct igb_rx_buffer {
282 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
289 struct igb_tx_queue_stats {
295 struct igb_rx_queue_stats {
303 struct igb_ring_container {
304 struct igb_ring *ring; /* pointer to linked list of rings */
305 unsigned int total_bytes; /* total bytes processed this int */
306 unsigned int total_packets; /* total packets processed this int */
307 u16 work_limit; /* total work allowed per interrupt */
308 u8 count; /* total number of rings in vector */
309 u8 itr; /* current ITR setting for ring */
312 struct igb_q_vector {
313 struct igb_adapter *adapter; /* backlink */
314 int cpu; /* CPU for DCA */
315 u32 eims_value; /* EIMS mask value */
317 struct igb_ring_container rx, tx;
319 struct napi_struct napi;
324 void __iomem *itr_register;
327 struct igb_lro_list *lrolist; /* LRO list for queue vector*/
329 char name[IFNAMSIZ + 9];
330 #ifndef HAVE_NETDEV_NAPI_LIST
331 struct net_device poll_dev;
333 } ____cacheline_internodealigned_in_smp;
336 struct igb_q_vector *q_vector; /* backlink to q_vector */
337 struct net_device *netdev; /* back pointer to net_device */
338 struct device *dev; /* device for dma mapping */
339 union { /* array of buffer info structs */
340 struct igb_tx_buffer *tx_buffer_info;
341 struct igb_rx_buffer *rx_buffer_info;
343 void *desc; /* descriptor ring memory */
344 unsigned long flags; /* ring specific flags */
345 void __iomem *tail; /* pointer to ring tail register */
347 u16 count; /* number of desc. in the ring */
348 u8 queue_index; /* logical index of the ring*/
349 u8 reg_idx; /* physical index of the ring */
350 u32 size; /* length of desc. ring in bytes */
352 /* everything past this point are written often */
353 u16 next_to_clean ____cacheline_aligned_in_smp;
359 struct igb_tx_queue_stats tx_stats;
363 struct igb_rx_queue_stats rx_stats;
364 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
369 #ifdef CONFIG_IGB_VMDQ_NETDEV
370 struct net_device *vmdq_netdev;
371 int vqueue_index; /* queue index for virtual netdev */
373 /* Items past this point are only used during ring alloc / free */
374 dma_addr_t dma; /* phys address of the ring */
375 int numa_node; /* node to alloc ring memory on */
377 } ____cacheline_internodealigned_in_smp;
379 enum e1000_ring_flags_t {
380 #ifndef HAVE_NDO_SET_FEATURES
381 IGB_RING_FLAG_RX_CSUM,
383 IGB_RING_FLAG_RX_SCTP_CSUM,
384 IGB_RING_FLAG_RX_LB_VLAN_BSWAP,
385 IGB_RING_FLAG_TX_CTX_IDX,
386 IGB_RING_FLAG_TX_DETECT_HANG,
388 struct igb_mac_addr {
391 u16 state; /* bitmask */
393 #define IGB_MAC_STATE_DEFAULT 0x1
394 #define IGB_MAC_STATE_MODIFIED 0x2
395 #define IGB_MAC_STATE_IN_USE 0x4
397 #define IGB_TXD_DCMD (E1000_ADVTXD_DCMD_EOP | E1000_ADVTXD_DCMD_RS)
399 #define IGB_RX_DESC(R, i) \
400 (&(((union e1000_adv_rx_desc *)((R)->desc))[i]))
401 #define IGB_TX_DESC(R, i) \
402 (&(((union e1000_adv_tx_desc *)((R)->desc))[i]))
403 #define IGB_TX_CTXTDESC(R, i) \
404 (&(((struct e1000_adv_tx_context_desc *)((R)->desc))[i]))
406 #ifdef CONFIG_IGB_VMDQ_NETDEV
407 #define netdev_ring(ring) \
408 ((ring->vmdq_netdev ? ring->vmdq_netdev : ring->netdev))
409 #define ring_queue_index(ring) \
410 ((ring->vmdq_netdev ? ring->vqueue_index : ring->queue_index))
412 #define netdev_ring(ring) (ring->netdev)
413 #define ring_queue_index(ring) (ring->queue_index)
414 #endif /* CONFIG_IGB_VMDQ_NETDEV */
416 /* igb_test_staterr - tests bits within Rx descriptor status and error fields */
417 static inline __le32 igb_test_staterr(union e1000_adv_rx_desc *rx_desc,
418 const u32 stat_err_bits)
420 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
423 /* igb_desc_unused - calculate if we have unused descriptors */
424 static inline u16 igb_desc_unused(const struct igb_ring *ring)
426 u16 ntc = ring->next_to_clean;
427 u16 ntu = ring->next_to_use;
429 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
433 static inline struct netdev_queue *txring_txq(const struct igb_ring *tx_ring)
435 return netdev_get_tx_queue(tx_ring->netdev, tx_ring->queue_index);
437 #endif /* CONFIG_BQL */
439 // #ifdef EXT_THERMAL_SENSOR_SUPPORT
441 struct igb_therm_proc_data
444 struct e1000_thermal_diode_data *sensor_data;
447 // #endif /* IGB_PROCFS */
448 // #endif /* EXT_THERMAL_SENSOR_SUPPORT */
450 /* board specific private data structure */
452 #ifdef HAVE_VLAN_RX_REGISTER
453 /* vlgrp must be first member of structure */
454 struct vlan_group *vlgrp;
456 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
458 struct net_device *netdev;
463 unsigned int num_q_vectors;
464 struct msix_entry *msix_entries;
469 u32 tx_timeout_count;
471 struct igb_ring *tx_ring[IGB_MAX_TX_QUEUES];
475 struct igb_ring *rx_ring[IGB_MAX_RX_QUEUES];
477 struct timer_list watchdog_timer;
478 struct timer_list dma_err_timer;
479 struct timer_list phy_info_timer;
488 /* Interrupt Throttle Rate */
492 struct work_struct reset_task;
493 struct work_struct watchdog_task;
494 struct work_struct dma_err_task;
496 u8 tx_timeout_factor;
500 /* OS defined structs */
501 struct pci_dev *pdev;
502 #ifndef HAVE_NETDEV_STATS_IN_NETDEV
503 struct net_device_stats net_stats;
506 struct igb_lro_stats lro_stats;
508 #ifdef HAVE_HW_TIME_STAMP
509 struct cyclecounter cycles;
510 struct timecounter clock;
511 struct timecompare compare;
512 struct hwtstamp_config hwtstamp_config;
515 /* structs defined in e1000_hw.h */
517 struct e1000_hw_stats stats;
518 struct e1000_phy_info phy_info;
519 struct e1000_phy_stats phy_stats;
523 struct igb_ring test_tx_ring;
524 struct igb_ring test_rx_ring;
529 struct igb_q_vector *q_vector[MAX_Q_VECTORS];
530 u32 eims_enable_mask;
533 /* to not mess up cache alignment, always add to the bottom */
539 struct vf_data_storage *vf_data;
541 int vf_rate_link_speed;
545 unsigned int vfs_allocated_count;
546 /* Malicious Driver Detection flag. Valid only when SR-IOV is enabled */
554 struct igb_mac_addr *mac_table;
555 #ifdef CONFIG_IGB_VMDQ_NETDEV
556 struct net_device *vmdq_netdev[IGB_MAX_VMDQ_QUEUES];
562 /* External Thermal Sensor support flag */
565 struct kobject *info_kobj;
566 struct kobject *therm_kobj[E1000_MAX_SENSORS];
567 #else /* IGB_SYSFS */
569 struct proc_dir_entry *eth_dir;
570 struct proc_dir_entry *info_dir;
571 struct proc_dir_entry *therm_dir[E1000_MAX_SENSORS];
572 struct igb_therm_proc_data therm_data[E1000_MAX_SENSORS];
573 #endif /* IGB_PROCFS */
574 #endif /* IGB_SYSFS */
577 #ifdef CONFIG_IGB_VMDQ_NETDEV
578 struct igb_vmdq_adapter {
579 #ifdef HAVE_VLAN_RX_REGISTER
580 /* vlgrp must be first member of structure */
581 struct vlan_group *vlgrp;
583 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
585 struct igb_adapter *real_adapter;
586 struct net_device *vnetdev;
587 struct net_device_stats net_stats;
588 struct igb_ring *tx_ring;
589 struct igb_ring *rx_ring;
594 #define IGB_FLAG_HAS_MSI (1 << 0)
595 #define IGB_FLAG_MSI_ENABLE (1 << 1)
596 #define IGB_FLAG_DCA_ENABLED (1 << 2)
597 #define IGB_FLAG_LLI_PUSH (1 << 3)
598 #define IGB_FLAG_QUAD_PORT_A (1 << 4)
599 #define IGB_FLAG_QUEUE_PAIRS (1 << 5)
600 #define IGB_FLAG_EEE (1 << 6)
601 #define IGB_FLAG_DMAC (1 << 7)
602 #define IGB_FLAG_DETECT_BAD_DMA (1 << 8)
604 #define IGB_MIN_TXPBSIZE 20408
605 #define IGB_TX_BUF_4096 4096
607 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coal Flush */
609 /* DMA Coalescing defines */
610 #define IGB_DMAC_DISABLE 0
611 #define IGB_DMAC_MIN 250
612 #define IGB_DMAC_500 500
613 #define IGB_DMAC_EN_DEFAULT 1000
614 #define IGB_DMAC_2000 2000
615 #define IGB_DMAC_3000 3000
616 #define IGB_DMAC_4000 4000
617 #define IGB_DMAC_5000 5000
618 #define IGB_DMAC_6000 6000
619 #define IGB_DMAC_7000 7000
620 #define IGB_DMAC_8000 8000
621 #define IGB_DMAC_9000 9000
622 #define IGB_DMAC_MAX 10000
625 #define IGB_82576_TSYNC_SHIFT 19
626 #define IGB_82580_TSYNC_SHIFT 24
627 #define IGB_TS_HDR_LEN 16
630 #define FW_HDR_LEN 0x4
631 #define FW_CMD_DRV_INFO 0xDD
632 #define FW_CMD_DRV_INFO_LEN 0x5
633 #define FW_CMD_RESERVED 0X0
634 #define FW_RESP_SUCCESS 0x1
635 #define FW_UNUSED_VER 0x0
636 #define FW_MAX_RETRIES 3
637 #define FW_STATUS_SUCCESS 0x1
638 #define FW_FAMILY_DRV_VER 0Xffffffff
640 #define IGB_MAX_LINK_TRIES 20
642 struct e1000_fw_hdr {
652 struct e1000_fw_drv_info {
653 struct e1000_fw_hdr hdr;
656 u16 pad; /* end spacing to ensure length is mult. of dword */
657 u8 pad2; /* end spacing to ensure length is mult. of dword2 */
665 extern char igb_driver_name[];
666 extern char igb_driver_version[];
668 extern int igb_up(struct igb_adapter *);
669 extern void igb_down(struct igb_adapter *);
670 extern void igb_reinit_locked(struct igb_adapter *);
671 extern void igb_reset(struct igb_adapter *);
672 extern int igb_set_spd_dplx(struct igb_adapter *, u16);
673 extern int igb_setup_tx_resources(struct igb_ring *);
674 extern int igb_setup_rx_resources(struct igb_ring *);
675 extern void igb_free_tx_resources(struct igb_ring *);
676 extern void igb_free_rx_resources(struct igb_ring *);
677 extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *);
678 extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *);
679 extern void igb_setup_tctl(struct igb_adapter *);
680 extern void igb_setup_rctl(struct igb_adapter *);
681 extern netdev_tx_t igb_xmit_frame_ring(struct sk_buff *, struct igb_ring *);
682 extern void igb_unmap_and_free_tx_resource(struct igb_ring *,
683 struct igb_tx_buffer *);
684 extern void igb_alloc_rx_buffers(struct igb_ring *, u16);
685 extern void igb_clean_rx_ring(struct igb_ring *);
686 extern void igb_update_stats(struct igb_adapter *);
687 extern bool igb_has_link(struct igb_adapter *adapter);
688 extern void igb_set_ethtool_ops(struct net_device *);
689 extern void igb_check_options(struct igb_adapter *);
690 extern void igb_power_up_link(struct igb_adapter *);
691 #ifdef ETHTOOL_OPS_COMPAT
692 extern int ethtool_ioctl(struct ifreq *);
694 extern int igb_write_mc_addr_list(struct net_device *netdev);
695 extern int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue);
696 extern int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue);
697 extern int igb_available_rars(struct igb_adapter *adapter);
698 extern s32 igb_vlvf_set(struct igb_adapter *, u32, bool, u32);
699 extern void igb_configure_vt_default_pool(struct igb_adapter *adapter);
700 extern void igb_enable_vlan_tags(struct igb_adapter *adapter);
701 #ifndef HAVE_VLAN_RX_REGISTER
702 extern void igb_vlan_mode(struct net_device *, u32);
707 void igb_sysfs_exit(struct igb_adapter *adapter);
708 int igb_sysfs_init(struct igb_adapter *adapter);
711 int igb_procfs_init(struct igb_adapter* adapter);
712 void igb_procfs_exit(struct igb_adapter* adapter);
713 int igb_procfs_topdir_init(void);
714 void igb_procfs_topdir_exit(void);
715 #endif /* IGB_PROCFS */
716 #endif /* IGB_SYSFS */