1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/tcp.h>
36 #include <net/checksum.h>
38 #include <linux/ipv6.h>
39 #include <net/ip6_checksum.h>
43 #include <linux/mii.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #ifdef CONFIG_PM_RUNTIME
50 #include <linux/pm_runtime.h>
51 #endif /* CONFIG_PM_RUNTIME */
53 #include <linux/if_bridge.h>
57 #include <linux/uio_driver.h>
59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
60 #define DRV_DEBUG "_debug"
65 #define VERSION_SUFFIX
70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
72 char igb_driver_name[] = "igb";
73 char igb_driver_version[] = DRV_VERSION;
74 static const char igb_driver_string[] =
75 "Intel(R) Gigabit Ethernet Network Driver";
76 static const char igb_copyright[] =
77 "Copyright (c) 2007-2013 Intel Corporation.";
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
115 /* required last entry */
119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
121 void igb_reset(struct igb_adapter *);
122 static int igb_setup_all_tx_resources(struct igb_adapter *);
123 static int igb_setup_all_rx_resources(struct igb_adapter *);
124 static void igb_free_all_tx_resources(struct igb_adapter *);
125 static void igb_free_all_rx_resources(struct igb_adapter *);
126 static void igb_setup_mrqc(struct igb_adapter *);
127 void igb_update_stats(struct igb_adapter *);
128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
129 static void __devexit igb_remove(struct pci_dev *pdev);
130 static int igb_sw_init(struct igb_adapter *);
131 static int igb_open(struct net_device *);
132 static int igb_close(struct net_device *);
133 static void igb_configure(struct igb_adapter *);
134 static void igb_configure_tx(struct igb_adapter *);
135 static void igb_configure_rx(struct igb_adapter *);
136 static void igb_clean_all_tx_rings(struct igb_adapter *);
137 static void igb_clean_all_rx_rings(struct igb_adapter *);
138 static void igb_clean_tx_ring(struct igb_ring *);
139 static void igb_set_rx_mode(struct net_device *);
140 static void igb_update_phy_info(unsigned long);
141 static void igb_watchdog(unsigned long);
142 static void igb_watchdog_task(struct work_struct *);
143 static void igb_dma_err_task(struct work_struct *);
144 static void igb_dma_err_timer(unsigned long data);
145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
146 static struct net_device_stats *igb_get_stats(struct net_device *);
147 static int igb_change_mtu(struct net_device *, int);
148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
149 static int igb_set_mac(struct net_device *, void *);
150 static void igb_set_uta(struct igb_adapter *adapter);
151 static irqreturn_t igb_intr(int irq, void *);
152 static irqreturn_t igb_intr_msi(int irq, void *);
153 static irqreturn_t igb_msix_other(int irq, void *);
154 static irqreturn_t igb_msix_ring(int irq, void *);
156 static void igb_update_dca(struct igb_q_vector *);
157 static void igb_setup_dca(struct igb_adapter *);
159 static int igb_poll(struct napi_struct *, int);
160 static bool igb_clean_tx_irq(struct igb_q_vector *);
161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
163 static void igb_tx_timeout(struct net_device *);
164 static void igb_reset_task(struct work_struct *);
165 #ifdef HAVE_VLAN_RX_REGISTER
166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
168 #ifdef HAVE_VLAN_PROTOCOL
169 static int igb_vlan_rx_add_vid(struct net_device *,
171 static int igb_vlan_rx_kill_vid(struct net_device *,
173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
175 static int igb_vlan_rx_add_vid(struct net_device *,
176 __always_unused __be16 proto, u16);
177 static int igb_vlan_rx_kill_vid(struct net_device *,
178 __always_unused __be16 proto, u16);
180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
187 static void igb_restore_vlan(struct igb_adapter *);
188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
189 static void igb_ping_all_vfs(struct igb_adapter *);
190 static void igb_msg_task(struct igb_adapter *);
191 static void igb_vmm_control(struct igb_adapter *);
192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
194 static void igb_process_mdd_event(struct igb_adapter *);
196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
198 int vf, u16 vlan, u8 qos);
199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
203 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
204 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
205 struct ifla_vf_info *ivi);
206 static void igb_check_vf_rate_limit(struct igb_adapter *);
208 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
210 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
211 static int igb_suspend(struct device *dev);
212 static int igb_resume(struct device *dev);
213 #ifdef CONFIG_PM_RUNTIME
214 static int igb_runtime_suspend(struct device *dev);
215 static int igb_runtime_resume(struct device *dev);
216 static int igb_runtime_idle(struct device *dev);
217 #endif /* CONFIG_PM_RUNTIME */
218 static const struct dev_pm_ops igb_pm_ops = {
219 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
220 .suspend = igb_suspend,
221 .resume = igb_resume,
222 .freeze = igb_suspend,
224 .poweroff = igb_suspend,
225 .restore = igb_resume,
226 #ifdef CONFIG_PM_RUNTIME
227 .runtime_suspend = igb_runtime_suspend,
228 .runtime_resume = igb_runtime_resume,
229 .runtime_idle = igb_runtime_idle,
231 #else /* Linux >= 2.6.34 */
232 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
233 #ifdef CONFIG_PM_RUNTIME
234 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
236 #endif /* CONFIG_PM_RUNTIME */
237 #endif /* Linux version */
240 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
241 static int igb_resume(struct pci_dev *pdev);
242 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
243 #endif /* CONFIG_PM */
244 #ifndef USE_REBOOT_NOTIFIER
245 static void igb_shutdown(struct pci_dev *);
247 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
248 static struct notifier_block igb_notifier_reboot = {
249 .notifier_call = igb_notify_reboot,
255 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
256 static struct notifier_block dca_notifier = {
257 .notifier_call = igb_notify_dca,
262 #ifdef CONFIG_NET_POLL_CONTROLLER
263 /* for netdump / net console */
264 static void igb_netpoll(struct net_device *);
268 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
269 pci_channel_state_t);
270 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
271 static void igb_io_resume(struct pci_dev *);
273 static struct pci_error_handlers igb_err_handler = {
274 .error_detected = igb_io_error_detected,
275 .slot_reset = igb_io_slot_reset,
276 .resume = igb_io_resume,
280 static void igb_init_fw(struct igb_adapter *adapter);
281 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
283 static struct pci_driver igb_driver = {
284 .name = igb_driver_name,
285 .id_table = igb_pci_tbl,
287 .remove = __devexit_p(igb_remove),
289 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
290 .driver.pm = &igb_pm_ops,
292 .suspend = igb_suspend,
293 .resume = igb_resume,
294 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
295 #endif /* CONFIG_PM */
296 #ifndef USE_REBOOT_NOTIFIER
297 .shutdown = igb_shutdown,
300 .err_handler = &igb_err_handler
304 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
305 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
306 //MODULE_LICENSE("GPL");
307 //MODULE_VERSION(DRV_VERSION);
309 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
311 struct e1000_hw *hw = &adapter->hw;
312 struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
313 u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
314 u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
318 * if this is the management vlan the only option is to add it in so
319 * that the management pass through will continue to work
321 if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
322 (vid == mng_cookie->vlan_id))
325 vfta = adapter->shadow_vfta[index];
332 e1000_write_vfta(hw, index, vfta);
333 adapter->shadow_vfta[index] = vfta;
336 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
337 //module_param(debug, int, 0);
338 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
341 * igb_init_module - Driver Registration Routine
343 * igb_init_module is the first routine called when the driver is
344 * loaded. All it does is register with the PCI subsystem.
346 static int __init igb_init_module(void)
350 printk(KERN_INFO "%s - version %s\n",
351 igb_driver_string, igb_driver_version);
353 printk(KERN_INFO "%s\n", igb_copyright);
355 /* only use IGB_PROCFS if IGB_HWMON is not defined */
358 if (igb_procfs_topdir_init())
359 printk(KERN_INFO "Procfs failed to initialize topdir\n");
360 #endif /* IGB_PROCFS */
361 #endif /* IGB_HWMON */
364 dca_register_notify(&dca_notifier);
366 ret = pci_register_driver(&igb_driver);
367 #ifdef USE_REBOOT_NOTIFIER
369 register_reboot_notifier(&igb_notifier_reboot);
376 #define module_init(x) static int x(void) __attribute__((__unused__));
377 module_init(igb_init_module);
380 * igb_exit_module - Driver Exit Cleanup Routine
382 * igb_exit_module is called just before the driver is removed
385 static void __exit igb_exit_module(void)
388 dca_unregister_notify(&dca_notifier);
390 #ifdef USE_REBOOT_NOTIFIER
391 unregister_reboot_notifier(&igb_notifier_reboot);
393 pci_unregister_driver(&igb_driver);
396 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
399 igb_procfs_topdir_exit();
400 #endif /* IGB_PROCFS */
401 #endif /* IGB_HWMON */
405 #define module_exit(x) static void x(void) __attribute__((__unused__));
406 module_exit(igb_exit_module);
408 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
410 * igb_cache_ring_register - Descriptor ring to register mapping
411 * @adapter: board private structure to initialize
413 * Once we know the feature-set enabled for the device, we'll cache
414 * the register offset the descriptor ring is assigned to.
416 static void igb_cache_ring_register(struct igb_adapter *adapter)
419 u32 rbase_offset = adapter->vfs_allocated_count;
421 switch (adapter->hw.mac.type) {
423 /* The queues are allocated for virtualization such that VF 0
424 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
425 * In order to avoid collision we start at the first free queue
426 * and continue consuming queues in the same sequence
428 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
429 for (; i < adapter->rss_queues; i++)
430 adapter->rx_ring[i]->reg_idx = rbase_offset +
440 for (; i < adapter->num_rx_queues; i++)
441 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
442 for (; j < adapter->num_tx_queues; j++)
443 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
448 static void igb_configure_lli(struct igb_adapter *adapter)
450 struct e1000_hw *hw = &adapter->hw;
453 /* LLI should only be enabled for MSI-X or MSI interrupts */
454 if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
457 if (adapter->lli_port) {
458 /* use filter 0 for port */
459 port = htons((u16)adapter->lli_port);
460 E1000_WRITE_REG(hw, E1000_IMIR(0),
461 (port | E1000_IMIR_PORT_IM_EN));
462 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
463 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
466 if (adapter->flags & IGB_FLAG_LLI_PUSH) {
467 /* use filter 1 for push flag */
468 E1000_WRITE_REG(hw, E1000_IMIR(1),
469 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
470 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
471 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
474 if (adapter->lli_size) {
475 /* use filter 2 for size */
476 E1000_WRITE_REG(hw, E1000_IMIR(2),
477 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
478 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
479 (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
485 * igb_write_ivar - configure ivar for given MSI-X vector
486 * @hw: pointer to the HW structure
487 * @msix_vector: vector number we are allocating to a given ring
488 * @index: row index of IVAR register to write within IVAR table
489 * @offset: column offset of in IVAR, should be multiple of 8
491 * This function is intended to handle the writing of the IVAR register
492 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
493 * each containing an cause allocation for an Rx and Tx ring, and a
494 * variable number of rows depending on the number of queues supported.
496 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
497 int index, int offset)
499 u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
501 /* clear any bits that are currently set */
502 ivar &= ~((u32)0xFF << offset);
504 /* write vector and valid bit */
505 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
507 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
510 #define IGB_N0_QUEUE -1
511 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
513 struct igb_adapter *adapter = q_vector->adapter;
514 struct e1000_hw *hw = &adapter->hw;
515 int rx_queue = IGB_N0_QUEUE;
516 int tx_queue = IGB_N0_QUEUE;
519 if (q_vector->rx.ring)
520 rx_queue = q_vector->rx.ring->reg_idx;
521 if (q_vector->tx.ring)
522 tx_queue = q_vector->tx.ring->reg_idx;
524 switch (hw->mac.type) {
526 /* The 82575 assigns vectors using a bitmask, which matches the
527 bitmask for the EICR/EIMS/EIMC registers. To assign one
528 or more queues to a vector, we write the appropriate bits
529 into the MSIXBM register for that vector. */
530 if (rx_queue > IGB_N0_QUEUE)
531 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
532 if (tx_queue > IGB_N0_QUEUE)
533 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
534 if (!adapter->msix_entries && msix_vector == 0)
535 msixbm |= E1000_EIMS_OTHER;
536 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
537 q_vector->eims_value = msixbm;
541 * 82576 uses a table that essentially consists of 2 columns
542 * with 8 rows. The ordering is column-major so we use the
543 * lower 3 bits as the row index, and the 4th bit as the
546 if (rx_queue > IGB_N0_QUEUE)
547 igb_write_ivar(hw, msix_vector,
549 (rx_queue & 0x8) << 1);
550 if (tx_queue > IGB_N0_QUEUE)
551 igb_write_ivar(hw, msix_vector,
553 ((tx_queue & 0x8) << 1) + 8);
554 q_vector->eims_value = 1 << msix_vector;
562 * On 82580 and newer adapters the scheme is similar to 82576
563 * however instead of ordering column-major we have things
564 * ordered row-major. So we traverse the table by using
565 * bit 0 as the column offset, and the remaining bits as the
568 if (rx_queue > IGB_N0_QUEUE)
569 igb_write_ivar(hw, msix_vector,
571 (rx_queue & 0x1) << 4);
572 if (tx_queue > IGB_N0_QUEUE)
573 igb_write_ivar(hw, msix_vector,
575 ((tx_queue & 0x1) << 4) + 8);
576 q_vector->eims_value = 1 << msix_vector;
583 /* add q_vector eims value to global eims_enable_mask */
584 adapter->eims_enable_mask |= q_vector->eims_value;
586 /* configure q_vector to set itr on first interrupt */
587 q_vector->set_itr = 1;
591 * igb_configure_msix - Configure MSI-X hardware
593 * igb_configure_msix sets up the hardware to properly
594 * generate MSI-X interrupts.
596 static void igb_configure_msix(struct igb_adapter *adapter)
600 struct e1000_hw *hw = &adapter->hw;
602 adapter->eims_enable_mask = 0;
604 /* set vector for other causes, i.e. link changes */
605 switch (hw->mac.type) {
607 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
608 /* enable MSI-X PBA support*/
609 tmp |= E1000_CTRL_EXT_PBA_CLR;
611 /* Auto-Mask interrupts upon ICR read. */
612 tmp |= E1000_CTRL_EXT_EIAME;
613 tmp |= E1000_CTRL_EXT_IRCA;
615 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
617 /* enable msix_other interrupt */
618 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
620 adapter->eims_other = E1000_EIMS_OTHER;
630 /* Turn on MSI-X capability first, or our settings
631 * won't stick. And it will take days to debug. */
632 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
633 E1000_GPIE_PBA | E1000_GPIE_EIAME |
636 /* enable msix_other interrupt */
637 adapter->eims_other = 1 << vector;
638 tmp = (vector++ | E1000_IVAR_VALID) << 8;
640 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
643 /* do nothing, since nothing else supports MSI-X */
645 } /* switch (hw->mac.type) */
647 adapter->eims_enable_mask |= adapter->eims_other;
649 for (i = 0; i < adapter->num_q_vectors; i++)
650 igb_assign_vector(adapter->q_vector[i], vector++);
652 E1000_WRITE_FLUSH(hw);
656 * igb_request_msix - Initialize MSI-X interrupts
658 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
661 static int igb_request_msix(struct igb_adapter *adapter)
663 struct net_device *netdev = adapter->netdev;
664 struct e1000_hw *hw = &adapter->hw;
665 int i, err = 0, vector = 0, free_vector = 0;
667 err = request_irq(adapter->msix_entries[vector].vector,
668 &igb_msix_other, 0, netdev->name, adapter);
672 for (i = 0; i < adapter->num_q_vectors; i++) {
673 struct igb_q_vector *q_vector = adapter->q_vector[i];
677 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
679 if (q_vector->rx.ring && q_vector->tx.ring)
680 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
681 q_vector->rx.ring->queue_index);
682 else if (q_vector->tx.ring)
683 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
684 q_vector->tx.ring->queue_index);
685 else if (q_vector->rx.ring)
686 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
687 q_vector->rx.ring->queue_index);
689 sprintf(q_vector->name, "%s-unused", netdev->name);
691 err = request_irq(adapter->msix_entries[vector].vector,
692 igb_msix_ring, 0, q_vector->name,
698 igb_configure_msix(adapter);
702 /* free already assigned IRQs */
703 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
706 for (i = 0; i < vector; i++) {
707 free_irq(adapter->msix_entries[free_vector++].vector,
708 adapter->q_vector[i]);
714 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
716 if (adapter->msix_entries) {
717 pci_disable_msix(adapter->pdev);
718 kfree(adapter->msix_entries);
719 adapter->msix_entries = NULL;
720 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
721 pci_disable_msi(adapter->pdev);
726 * igb_free_q_vector - Free memory allocated for specific interrupt vector
727 * @adapter: board private structure to initialize
728 * @v_idx: Index of vector to be freed
730 * This function frees the memory allocated to the q_vector. In addition if
731 * NAPI is enabled it will delete any references to the NAPI struct prior
732 * to freeing the q_vector.
734 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
736 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
738 if (q_vector->tx.ring)
739 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
741 if (q_vector->rx.ring)
742 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
744 adapter->q_vector[v_idx] = NULL;
745 netif_napi_del(&q_vector->napi);
747 __skb_queue_purge(&q_vector->lrolist.active);
753 * igb_free_q_vectors - Free memory allocated for interrupt vectors
754 * @adapter: board private structure to initialize
756 * This function frees the memory allocated to the q_vectors. In addition if
757 * NAPI is enabled it will delete any references to the NAPI struct prior
758 * to freeing the q_vector.
760 static void igb_free_q_vectors(struct igb_adapter *adapter)
762 int v_idx = adapter->num_q_vectors;
764 adapter->num_tx_queues = 0;
765 adapter->num_rx_queues = 0;
766 adapter->num_q_vectors = 0;
769 igb_free_q_vector(adapter, v_idx);
773 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
775 * This function resets the device so that it has 0 rx queues, tx queues, and
776 * MSI-X interrupts allocated.
778 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
780 igb_free_q_vectors(adapter);
781 igb_reset_interrupt_capability(adapter);
785 * igb_process_mdd_event
786 * @adapter - board private structure
788 * Identify a malicious VF, disable the VF TX/RX queues and log a message.
790 static void igb_process_mdd_event(struct igb_adapter *adapter)
792 struct e1000_hw *hw = &adapter->hw;
793 u32 lvmmc, vfte, vfre, mdfb;
796 lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
797 vf_queue = lvmmc >> 29;
799 /* VF index cannot be bigger or equal to VFs allocated */
800 if (vf_queue >= adapter->vfs_allocated_count)
803 netdev_info(adapter->netdev,
804 "VF %d misbehaved. VF queues are disabled. "
805 "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
807 /* Disable VFTE and VFRE related bits */
808 vfte = E1000_READ_REG(hw, E1000_VFTE);
809 vfte &= ~(1 << vf_queue);
810 E1000_WRITE_REG(hw, E1000_VFTE, vfte);
812 vfre = E1000_READ_REG(hw, E1000_VFRE);
813 vfre &= ~(1 << vf_queue);
814 E1000_WRITE_REG(hw, E1000_VFRE, vfre);
816 /* Disable MDFB related bit. Clear on write */
817 mdfb = E1000_READ_REG(hw, E1000_MDFB);
818 mdfb |= (1 << vf_queue);
819 E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
821 /* Reset the specific VF */
822 E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
827 * @adapter - board private structure
829 * Disable MDD behavior in the HW
831 static void igb_disable_mdd(struct igb_adapter *adapter)
833 struct e1000_hw *hw = &adapter->hw;
836 if ((hw->mac.type != e1000_i350) ||
837 (hw->mac.type != e1000_i354))
840 reg = E1000_READ_REG(hw, E1000_DTXCTL);
841 reg &= (~E1000_DTXCTL_MDP_EN);
842 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
847 * @adapter - board private structure
849 * Enable the HW to detect malicious driver and sends an interrupt to
852 static void igb_enable_mdd(struct igb_adapter *adapter)
854 struct e1000_hw *hw = &adapter->hw;
857 /* Only available on i350 device */
858 if (hw->mac.type != e1000_i350)
861 reg = E1000_READ_REG(hw, E1000_DTXCTL);
862 reg |= E1000_DTXCTL_MDP_EN;
863 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
867 * igb_reset_sriov_capability - disable SR-IOV if enabled
869 * Attempt to disable single root IO virtualization capabilites present in the
872 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
874 struct pci_dev *pdev = adapter->pdev;
875 struct e1000_hw *hw = &adapter->hw;
877 /* reclaim resources allocated to VFs */
878 if (adapter->vf_data) {
879 if (!pci_vfs_assigned(pdev)) {
881 * disable iov and allow time for transactions to
884 pci_disable_sriov(pdev);
887 dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
889 dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
890 "VF(s) are assigned to guests!\n");
892 /* Disable Malicious Driver Detection */
893 igb_disable_mdd(adapter);
895 /* free vf data storage */
896 kfree(adapter->vf_data);
897 adapter->vf_data = NULL;
899 /* switch rings back to PF ownership */
900 E1000_WRITE_REG(hw, E1000_IOVCTL,
901 E1000_IOVCTL_REUSE_VFQ);
902 E1000_WRITE_FLUSH(hw);
906 adapter->vfs_allocated_count = 0;
910 * igb_set_sriov_capability - setup SR-IOV if supported
912 * Attempt to enable single root IO virtualization capabilites present in the
915 static void igb_set_sriov_capability(struct igb_adapter *adapter)
917 struct pci_dev *pdev = adapter->pdev;
921 old_vfs = pci_num_vf(pdev);
923 dev_info(pci_dev_to_dev(pdev),
924 "%d pre-allocated VFs found - override "
925 "max_vfs setting of %d\n", old_vfs,
926 adapter->vfs_allocated_count);
927 adapter->vfs_allocated_count = old_vfs;
929 /* no VFs requested, do nothing */
930 if (!adapter->vfs_allocated_count)
933 /* allocate vf data storage */
934 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
935 sizeof(struct vf_data_storage),
938 if (adapter->vf_data) {
940 if (pci_enable_sriov(pdev,
941 adapter->vfs_allocated_count))
944 for (i = 0; i < adapter->vfs_allocated_count; i++)
945 igb_vf_configure(adapter, i);
947 switch (adapter->hw.mac.type) {
950 /* Enable VM to VM loopback by default */
951 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
954 /* Currently no other hardware supports loopback */
958 /* DMA Coalescing is not supported in IOV mode. */
959 if (adapter->hw.mac.type >= e1000_i350)
960 adapter->dmac = IGB_DMAC_DISABLE;
961 if (adapter->hw.mac.type < e1000_i350)
962 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
968 kfree(adapter->vf_data);
969 adapter->vf_data = NULL;
970 adapter->vfs_allocated_count = 0;
971 dev_warn(pci_dev_to_dev(pdev),
972 "Failed to initialize SR-IOV virtualization\n");
976 * igb_set_interrupt_capability - set MSI or MSI-X if supported
978 * Attempt to configure interrupts using the best available
979 * capabilities of the hardware and kernel.
981 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
983 struct pci_dev *pdev = adapter->pdev;
988 adapter->int_mode = IGB_INT_MODE_MSI;
990 /* Number of supported queues. */
991 adapter->num_rx_queues = adapter->rss_queues;
993 if (adapter->vmdq_pools > 1)
994 adapter->num_rx_queues += adapter->vmdq_pools - 1;
997 if (adapter->vmdq_pools)
998 adapter->num_tx_queues = adapter->vmdq_pools;
1000 adapter->num_tx_queues = adapter->num_rx_queues;
1002 adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1005 switch (adapter->int_mode) {
1006 case IGB_INT_MODE_MSIX:
1007 /* start with one vector for every rx queue */
1008 numvecs = adapter->num_rx_queues;
1010 /* if tx handler is seperate add 1 for every tx queue */
1011 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1012 numvecs += adapter->num_tx_queues;
1014 /* store the number of vectors reserved for queues */
1015 adapter->num_q_vectors = numvecs;
1017 /* add 1 vector for link status interrupts */
1019 adapter->msix_entries = kcalloc(numvecs,
1020 sizeof(struct msix_entry),
1022 if (adapter->msix_entries) {
1023 for (i = 0; i < numvecs; i++)
1024 adapter->msix_entries[i].entry = i;
1026 err = pci_enable_msix(pdev,
1027 adapter->msix_entries, numvecs);
1031 /* MSI-X failed, so fall through and try MSI */
1032 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1033 "Falling back to MSI interrupts.\n");
1034 igb_reset_interrupt_capability(adapter);
1035 case IGB_INT_MODE_MSI:
1036 if (!pci_enable_msi(pdev))
1037 adapter->flags |= IGB_FLAG_HAS_MSI;
1039 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1040 "interrupts. Falling back to legacy "
1043 case IGB_INT_MODE_LEGACY:
1044 /* disable advanced features and set number of queues to 1 */
1045 igb_reset_sriov_capability(adapter);
1046 adapter->vmdq_pools = 0;
1047 adapter->rss_queues = 1;
1048 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1049 adapter->num_rx_queues = 1;
1050 adapter->num_tx_queues = 1;
1051 adapter->num_q_vectors = 1;
1052 /* Don't do anything; this is system default */
1057 static void igb_add_ring(struct igb_ring *ring,
1058 struct igb_ring_container *head)
1065 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1066 * @adapter: board private structure to initialize
1067 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1068 * @v_idx: index of vector in adapter struct
1069 * @txr_count: total number of Tx rings to allocate
1070 * @txr_idx: index of first Tx ring to allocate
1071 * @rxr_count: total number of Rx rings to allocate
1072 * @rxr_idx: index of first Rx ring to allocate
1074 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1076 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1077 unsigned int v_count, unsigned int v_idx,
1078 unsigned int txr_count, unsigned int txr_idx,
1079 unsigned int rxr_count, unsigned int rxr_idx)
1081 struct igb_q_vector *q_vector;
1082 struct igb_ring *ring;
1083 int ring_count, size;
1085 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1086 if (txr_count > 1 || rxr_count > 1)
1089 ring_count = txr_count + rxr_count;
1090 size = sizeof(struct igb_q_vector) +
1091 (sizeof(struct igb_ring) * ring_count);
1093 /* allocate q_vector and rings */
1094 q_vector = kzalloc(size, GFP_KERNEL);
1099 /* initialize LRO */
1100 __skb_queue_head_init(&q_vector->lrolist.active);
1103 /* initialize NAPI */
1104 netif_napi_add(adapter->netdev, &q_vector->napi,
1107 /* tie q_vector and adapter together */
1108 adapter->q_vector[v_idx] = q_vector;
1109 q_vector->adapter = adapter;
1111 /* initialize work limits */
1112 q_vector->tx.work_limit = adapter->tx_work_limit;
1114 /* initialize ITR configuration */
1115 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1116 q_vector->itr_val = IGB_START_ITR;
1118 /* initialize pointer to rings */
1119 ring = q_vector->ring;
1123 /* rx or rx/tx vector */
1124 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1125 q_vector->itr_val = adapter->rx_itr_setting;
1127 /* tx only vector */
1128 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1129 q_vector->itr_val = adapter->tx_itr_setting;
1133 /* assign generic ring traits */
1134 ring->dev = &adapter->pdev->dev;
1135 ring->netdev = adapter->netdev;
1137 /* configure backlink on ring */
1138 ring->q_vector = q_vector;
1140 /* update q_vector Tx values */
1141 igb_add_ring(ring, &q_vector->tx);
1143 /* For 82575, context index must be unique per ring. */
1144 if (adapter->hw.mac.type == e1000_82575)
1145 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1147 /* apply Tx specific ring traits */
1148 ring->count = adapter->tx_ring_count;
1149 ring->queue_index = txr_idx;
1151 /* assign ring to adapter */
1152 adapter->tx_ring[txr_idx] = ring;
1154 /* push pointer to next ring */
1159 /* assign generic ring traits */
1160 ring->dev = &adapter->pdev->dev;
1161 ring->netdev = adapter->netdev;
1163 /* configure backlink on ring */
1164 ring->q_vector = q_vector;
1166 /* update q_vector Rx values */
1167 igb_add_ring(ring, &q_vector->rx);
1169 #ifndef HAVE_NDO_SET_FEATURES
1170 /* enable rx checksum */
1171 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1174 /* set flag indicating ring supports SCTP checksum offload */
1175 if (adapter->hw.mac.type >= e1000_82576)
1176 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1178 if ((adapter->hw.mac.type == e1000_i350) ||
1179 (adapter->hw.mac.type == e1000_i354))
1180 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1182 /* apply Rx specific ring traits */
1183 ring->count = adapter->rx_ring_count;
1184 ring->queue_index = rxr_idx;
1186 /* assign ring to adapter */
1187 adapter->rx_ring[rxr_idx] = ring;
1194 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1195 * @adapter: board private structure to initialize
1197 * We allocate one q_vector per queue interrupt. If allocation fails we
1200 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1202 int q_vectors = adapter->num_q_vectors;
1203 int rxr_remaining = adapter->num_rx_queues;
1204 int txr_remaining = adapter->num_tx_queues;
1205 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1208 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1209 for (; rxr_remaining; v_idx++) {
1210 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1216 /* update counts and index */
1222 for (; v_idx < q_vectors; v_idx++) {
1223 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1224 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1225 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1226 tqpv, txr_idx, rqpv, rxr_idx);
1231 /* update counts and index */
1232 rxr_remaining -= rqpv;
1233 txr_remaining -= tqpv;
1241 adapter->num_tx_queues = 0;
1242 adapter->num_rx_queues = 0;
1243 adapter->num_q_vectors = 0;
1246 igb_free_q_vector(adapter, v_idx);
1252 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1254 * This function initializes the interrupts and allocates all of the queues.
1256 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1258 struct pci_dev *pdev = adapter->pdev;
1261 igb_set_interrupt_capability(adapter, msix);
1263 err = igb_alloc_q_vectors(adapter);
1265 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1266 goto err_alloc_q_vectors;
1269 igb_cache_ring_register(adapter);
1273 err_alloc_q_vectors:
1274 igb_reset_interrupt_capability(adapter);
1279 * igb_request_irq - initialize interrupts
1281 * Attempts to configure interrupts using the best available
1282 * capabilities of the hardware and kernel.
1284 static int igb_request_irq(struct igb_adapter *adapter)
1286 struct net_device *netdev = adapter->netdev;
1287 struct pci_dev *pdev = adapter->pdev;
1290 if (adapter->msix_entries) {
1291 err = igb_request_msix(adapter);
1294 /* fall back to MSI */
1295 igb_free_all_tx_resources(adapter);
1296 igb_free_all_rx_resources(adapter);
1298 igb_clear_interrupt_scheme(adapter);
1299 igb_reset_sriov_capability(adapter);
1300 err = igb_init_interrupt_scheme(adapter, false);
1303 igb_setup_all_tx_resources(adapter);
1304 igb_setup_all_rx_resources(adapter);
1305 igb_configure(adapter);
1308 igb_assign_vector(adapter->q_vector[0], 0);
1310 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1311 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1312 netdev->name, adapter);
1316 /* fall back to legacy interrupts */
1317 igb_reset_interrupt_capability(adapter);
1318 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1321 err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1322 netdev->name, adapter);
1325 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1332 static void igb_free_irq(struct igb_adapter *adapter)
1334 if (adapter->msix_entries) {
1337 free_irq(adapter->msix_entries[vector++].vector, adapter);
1339 for (i = 0; i < adapter->num_q_vectors; i++)
1340 free_irq(adapter->msix_entries[vector++].vector,
1341 adapter->q_vector[i]);
1343 free_irq(adapter->pdev->irq, adapter);
1348 * igb_irq_disable - Mask off interrupt generation on the NIC
1349 * @adapter: board private structure
1351 static void igb_irq_disable(struct igb_adapter *adapter)
1353 struct e1000_hw *hw = &adapter->hw;
1356 * we need to be careful when disabling interrupts. The VFs are also
1357 * mapped into these registers and so clearing the bits can cause
1358 * issues on the VF drivers so we only need to clear what we set
1360 if (adapter->msix_entries) {
1361 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1362 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1363 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1364 regval = E1000_READ_REG(hw, E1000_EIAC);
1365 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1368 E1000_WRITE_REG(hw, E1000_IAM, 0);
1369 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1370 E1000_WRITE_FLUSH(hw);
1372 if (adapter->msix_entries) {
1375 synchronize_irq(adapter->msix_entries[vector++].vector);
1377 for (i = 0; i < adapter->num_q_vectors; i++)
1378 synchronize_irq(adapter->msix_entries[vector++].vector);
1380 synchronize_irq(adapter->pdev->irq);
1385 * igb_irq_enable - Enable default interrupt generation settings
1386 * @adapter: board private structure
1388 static void igb_irq_enable(struct igb_adapter *adapter)
1390 struct e1000_hw *hw = &adapter->hw;
1392 if (adapter->msix_entries) {
1393 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1394 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1395 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1396 regval = E1000_READ_REG(hw, E1000_EIAM);
1397 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1398 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1399 if (adapter->vfs_allocated_count) {
1400 E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1401 ims |= E1000_IMS_VMMB;
1403 if ((adapter->hw.mac.type == e1000_i350) ||
1404 (adapter->hw.mac.type == e1000_i354))
1405 ims |= E1000_IMS_MDDET;
1407 E1000_WRITE_REG(hw, E1000_IMS, ims);
1409 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1411 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1416 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1418 struct e1000_hw *hw = &adapter->hw;
1419 u16 vid = adapter->hw.mng_cookie.vlan_id;
1420 u16 old_vid = adapter->mng_vlan_id;
1422 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1423 /* add VID to filter table */
1424 igb_vfta_set(adapter, vid, TRUE);
1425 adapter->mng_vlan_id = vid;
1427 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1430 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1432 #ifdef HAVE_VLAN_RX_REGISTER
1433 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1435 !test_bit(old_vid, adapter->active_vlans)) {
1437 /* remove VID from filter table */
1438 igb_vfta_set(adapter, old_vid, FALSE);
1443 * igb_release_hw_control - release control of the h/w to f/w
1444 * @adapter: address of board private structure
1446 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1447 * For ASF and Pass Through versions of f/w this means that the
1448 * driver is no longer loaded.
1451 static void igb_release_hw_control(struct igb_adapter *adapter)
1453 struct e1000_hw *hw = &adapter->hw;
1456 /* Let firmware take over control of h/w */
1457 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1458 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1459 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1463 * igb_get_hw_control - get control of the h/w from f/w
1464 * @adapter: address of board private structure
1466 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1467 * For ASF and Pass Through versions of f/w this means that
1468 * the driver is loaded.
1471 static void igb_get_hw_control(struct igb_adapter *adapter)
1473 struct e1000_hw *hw = &adapter->hw;
1476 /* Let firmware know the driver has taken over */
1477 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1478 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1479 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1483 * igb_configure - configure the hardware for RX and TX
1484 * @adapter: private board structure
1486 static void igb_configure(struct igb_adapter *adapter)
1488 struct net_device *netdev = adapter->netdev;
1491 igb_get_hw_control(adapter);
1492 igb_set_rx_mode(netdev);
1494 igb_restore_vlan(adapter);
1496 igb_setup_tctl(adapter);
1497 igb_setup_mrqc(adapter);
1498 igb_setup_rctl(adapter);
1500 igb_configure_tx(adapter);
1501 igb_configure_rx(adapter);
1503 e1000_rx_fifo_flush_82575(&adapter->hw);
1504 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1505 if (adapter->num_tx_queues > 1)
1506 netdev->features |= NETIF_F_MULTI_QUEUE;
1508 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1511 /* call igb_desc_unused which always leaves
1512 * at least 1 descriptor unused to make sure
1513 * next_to_use != next_to_clean */
1514 for (i = 0; i < adapter->num_rx_queues; i++) {
1515 struct igb_ring *ring = adapter->rx_ring[i];
1516 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1521 * igb_power_up_link - Power up the phy/serdes link
1522 * @adapter: address of board private structure
1524 void igb_power_up_link(struct igb_adapter *adapter)
1526 e1000_phy_hw_reset(&adapter->hw);
1528 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1529 e1000_power_up_phy(&adapter->hw);
1531 e1000_power_up_fiber_serdes_link(&adapter->hw);
1535 * igb_power_down_link - Power down the phy/serdes link
1536 * @adapter: address of board private structure
1538 static void igb_power_down_link(struct igb_adapter *adapter)
1540 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1541 e1000_power_down_phy(&adapter->hw);
1543 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1546 /* Detect and switch function for Media Auto Sense */
1547 static void igb_check_swap_media(struct igb_adapter *adapter)
1549 struct e1000_hw *hw = &adapter->hw;
1550 u32 ctrl_ext, connsw;
1551 bool swap_now = false;
1554 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1555 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1556 link = igb_has_link(adapter);
1558 /* need to live swap if current media is copper and we have fiber/serdes
1562 if ((hw->phy.media_type == e1000_media_type_copper) &&
1563 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1565 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1566 /* copper signal takes time to appear */
1567 if (adapter->copper_tries < 2) {
1568 adapter->copper_tries++;
1569 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1570 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1573 adapter->copper_tries = 0;
1574 if ((connsw & E1000_CONNSW_PHYSD) &&
1575 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1577 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1578 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1584 switch (hw->phy.media_type) {
1585 case e1000_media_type_copper:
1586 dev_info(pci_dev_to_dev(adapter->pdev),
1587 "%s:MAS: changing media to fiber/serdes\n",
1588 adapter->netdev->name);
1590 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1591 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1592 adapter->copper_tries = 0;
1594 case e1000_media_type_internal_serdes:
1595 case e1000_media_type_fiber:
1596 dev_info(pci_dev_to_dev(adapter->pdev),
1597 "%s:MAS: changing media to copper\n",
1598 adapter->netdev->name);
1600 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1601 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1604 /* shouldn't get here during regular operation */
1605 dev_err(pci_dev_to_dev(adapter->pdev),
1606 "%s:AMS: Invalid media type found, returning\n",
1607 adapter->netdev->name);
1610 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1614 #ifdef HAVE_I2C_SUPPORT
1615 /* igb_get_i2c_data - Reads the I2C SDA data bit
1616 * @hw: pointer to hardware structure
1617 * @i2cctl: Current value of I2CCTL register
1619 * Returns the I2C data bit value
1621 static int igb_get_i2c_data(void *data)
1623 struct igb_adapter *adapter = (struct igb_adapter *)data;
1624 struct e1000_hw *hw = &adapter->hw;
1625 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1627 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1630 /* igb_set_i2c_data - Sets the I2C data bit
1631 * @data: pointer to hardware structure
1632 * @state: I2C data value (0 or 1) to set
1634 * Sets the I2C data bit
1636 static void igb_set_i2c_data(void *data, int state)
1638 struct igb_adapter *adapter = (struct igb_adapter *)data;
1639 struct e1000_hw *hw = &adapter->hw;
1640 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1643 i2cctl |= E1000_I2C_DATA_OUT;
1645 i2cctl &= ~E1000_I2C_DATA_OUT;
1647 i2cctl &= ~E1000_I2C_DATA_OE_N;
1648 i2cctl |= E1000_I2C_CLK_OE_N;
1650 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1651 E1000_WRITE_FLUSH(hw);
1655 /* igb_set_i2c_clk - Sets the I2C SCL clock
1656 * @data: pointer to hardware structure
1657 * @state: state to set clock
1659 * Sets the I2C clock line to state
1661 static void igb_set_i2c_clk(void *data, int state)
1663 struct igb_adapter *adapter = (struct igb_adapter *)data;
1664 struct e1000_hw *hw = &adapter->hw;
1665 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1668 i2cctl |= E1000_I2C_CLK_OUT;
1669 i2cctl &= ~E1000_I2C_CLK_OE_N;
1671 i2cctl &= ~E1000_I2C_CLK_OUT;
1672 i2cctl &= ~E1000_I2C_CLK_OE_N;
1674 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1675 E1000_WRITE_FLUSH(hw);
1678 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1679 * @data: pointer to hardware structure
1681 * Gets the I2C clock state
1683 static int igb_get_i2c_clk(void *data)
1685 struct igb_adapter *adapter = (struct igb_adapter *)data;
1686 struct e1000_hw *hw = &adapter->hw;
1687 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1689 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1692 static const struct i2c_algo_bit_data igb_i2c_algo = {
1693 .setsda = igb_set_i2c_data,
1694 .setscl = igb_set_i2c_clk,
1695 .getsda = igb_get_i2c_data,
1696 .getscl = igb_get_i2c_clk,
1701 /* igb_init_i2c - Init I2C interface
1702 * @adapter: pointer to adapter structure
1705 static s32 igb_init_i2c(struct igb_adapter *adapter)
1707 s32 status = E1000_SUCCESS;
1709 /* I2C interface supported on i350 devices */
1710 if (adapter->hw.mac.type != e1000_i350)
1711 return E1000_SUCCESS;
1713 /* Initialize the i2c bus which is controlled by the registers.
1714 * This bus will use the i2c_algo_bit structue that implements
1715 * the protocol through toggling of the 4 bits in the register.
1717 adapter->i2c_adap.owner = THIS_MODULE;
1718 adapter->i2c_algo = igb_i2c_algo;
1719 adapter->i2c_algo.data = adapter;
1720 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1721 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1722 strlcpy(adapter->i2c_adap.name, "igb BB",
1723 sizeof(adapter->i2c_adap.name));
1724 status = i2c_bit_add_bus(&adapter->i2c_adap);
1728 #endif /* HAVE_I2C_SUPPORT */
1730 * igb_up - Open the interface and prepare it to handle traffic
1731 * @adapter: board private structure
1733 int igb_up(struct igb_adapter *adapter)
1735 struct e1000_hw *hw = &adapter->hw;
1738 /* hardware has been reset, we need to reload some things */
1739 igb_configure(adapter);
1741 clear_bit(__IGB_DOWN, &adapter->state);
1743 for (i = 0; i < adapter->num_q_vectors; i++)
1744 napi_enable(&(adapter->q_vector[i]->napi));
1746 if (adapter->msix_entries)
1747 igb_configure_msix(adapter);
1749 igb_assign_vector(adapter->q_vector[0], 0);
1751 igb_configure_lli(adapter);
1753 /* Clear any pending interrupts. */
1754 E1000_READ_REG(hw, E1000_ICR);
1755 igb_irq_enable(adapter);
1757 /* notify VFs that reset has been completed */
1758 if (adapter->vfs_allocated_count) {
1759 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1760 reg_data |= E1000_CTRL_EXT_PFRSTD;
1761 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1764 netif_tx_start_all_queues(adapter->netdev);
1766 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1767 schedule_work(&adapter->dma_err_task);
1768 /* start the watchdog. */
1769 hw->mac.get_link_status = 1;
1770 schedule_work(&adapter->watchdog_task);
1772 if ((adapter->flags & IGB_FLAG_EEE) &&
1773 (!hw->dev_spec._82575.eee_disable))
1774 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1779 void igb_down(struct igb_adapter *adapter)
1781 struct net_device *netdev = adapter->netdev;
1782 struct e1000_hw *hw = &adapter->hw;
1786 /* signal that we're down so the interrupt handler does not
1787 * reschedule our watchdog timer */
1788 set_bit(__IGB_DOWN, &adapter->state);
1790 /* disable receives in the hardware */
1791 rctl = E1000_READ_REG(hw, E1000_RCTL);
1792 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1793 /* flush and sleep below */
1795 netif_tx_stop_all_queues(netdev);
1797 /* disable transmits in the hardware */
1798 tctl = E1000_READ_REG(hw, E1000_TCTL);
1799 tctl &= ~E1000_TCTL_EN;
1800 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1801 /* flush both disables and wait for them to finish */
1802 E1000_WRITE_FLUSH(hw);
1803 usleep_range(10000, 20000);
1805 for (i = 0; i < adapter->num_q_vectors; i++)
1806 napi_disable(&(adapter->q_vector[i]->napi));
1808 igb_irq_disable(adapter);
1810 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1812 del_timer_sync(&adapter->watchdog_timer);
1813 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1814 del_timer_sync(&adapter->dma_err_timer);
1815 del_timer_sync(&adapter->phy_info_timer);
1817 netif_carrier_off(netdev);
1819 /* record the stats before reset*/
1820 igb_update_stats(adapter);
1822 adapter->link_speed = 0;
1823 adapter->link_duplex = 0;
1826 if (!pci_channel_offline(adapter->pdev))
1831 igb_clean_all_tx_rings(adapter);
1832 igb_clean_all_rx_rings(adapter);
1834 /* since we reset the hardware DCA settings were cleared */
1835 igb_setup_dca(adapter);
1839 void igb_reinit_locked(struct igb_adapter *adapter)
1841 WARN_ON(in_interrupt());
1842 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1843 usleep_range(1000, 2000);
1846 clear_bit(__IGB_RESETTING, &adapter->state);
1850 * igb_enable_mas - Media Autosense re-enable after swap
1852 * @adapter: adapter struct
1854 static s32 igb_enable_mas(struct igb_adapter *adapter)
1856 struct e1000_hw *hw = &adapter->hw;
1858 s32 ret_val = E1000_SUCCESS;
1860 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1861 if (hw->phy.media_type == e1000_media_type_copper) {
1862 /* configure for SerDes media detect */
1863 if (!(connsw & E1000_CONNSW_SERDESD)) {
1864 connsw |= E1000_CONNSW_ENRGSRC;
1865 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1866 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1867 E1000_WRITE_FLUSH(hw);
1868 } else if (connsw & E1000_CONNSW_SERDESD) {
1869 /* already SerDes, no need to enable anything */
1872 dev_info(pci_dev_to_dev(adapter->pdev),
1873 "%s:MAS: Unable to configure feature, disabling..\n",
1874 adapter->netdev->name);
1875 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1881 void igb_reset(struct igb_adapter *adapter)
1883 struct pci_dev *pdev = adapter->pdev;
1884 struct e1000_hw *hw = &adapter->hw;
1885 struct e1000_mac_info *mac = &hw->mac;
1886 struct e1000_fc_info *fc = &hw->fc;
1887 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1889 /* Repartition Pba for greater than 9k mtu
1890 * To take effect CTRL.RST is required.
1892 switch (mac->type) {
1896 pba = E1000_READ_REG(hw, E1000_RXPBS);
1897 pba = e1000_rxpbs_adjust_82580(pba);
1900 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901 pba &= E1000_RXPBS_SIZE_MASK_82576;
1907 pba = E1000_PBA_34K;
1911 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1912 (mac->type < e1000_82576)) {
1913 /* adjust PBA for jumbo frames */
1914 E1000_WRITE_REG(hw, E1000_PBA, pba);
1916 /* To maintain wire speed transmits, the Tx FIFO should be
1917 * large enough to accommodate two full transmit packets,
1918 * rounded up to the next 1KB and expressed in KB. Likewise,
1919 * the Rx FIFO should be large enough to accommodate at least
1920 * one full receive packet and is similarly rounded up and
1921 * expressed in KB. */
1922 pba = E1000_READ_REG(hw, E1000_PBA);
1923 /* upper 16 bits has Tx packet buffer allocation size in KB */
1924 tx_space = pba >> 16;
1925 /* lower 16 bits has Rx packet buffer allocation size in KB */
1927 /* the tx fifo also stores 16 bytes of information about the tx
1928 * but don't include ethernet FCS because hardware appends it */
1929 min_tx_space = (adapter->max_frame_size +
1930 sizeof(union e1000_adv_tx_desc) -
1932 min_tx_space = ALIGN(min_tx_space, 1024);
1933 min_tx_space >>= 10;
1934 /* software strips receive CRC, so leave room for it */
1935 min_rx_space = adapter->max_frame_size;
1936 min_rx_space = ALIGN(min_rx_space, 1024);
1937 min_rx_space >>= 10;
1939 /* If current Tx allocation is less than the min Tx FIFO size,
1940 * and the min Tx FIFO size is less than the current Rx FIFO
1941 * allocation, take space away from current Rx allocation */
1942 if (tx_space < min_tx_space &&
1943 ((min_tx_space - tx_space) < pba)) {
1944 pba = pba - (min_tx_space - tx_space);
1946 /* if short on rx space, rx wins and must trump tx
1948 if (pba < min_rx_space)
1951 E1000_WRITE_REG(hw, E1000_PBA, pba);
1954 /* flow control settings */
1955 /* The high water mark must be low enough to fit one full frame
1956 * (or the size used for early receive) above it in the Rx FIFO.
1957 * Set it to the lower of:
1958 * - 90% of the Rx FIFO size, or
1959 * - the full Rx FIFO size minus one full frame */
1960 hwm = min(((pba << 10) * 9 / 10),
1961 ((pba << 10) - 2 * adapter->max_frame_size));
1963 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1964 fc->low_water = fc->high_water - 16;
1965 fc->pause_time = 0xFFFF;
1967 fc->current_mode = fc->requested_mode;
1969 /* disable receive for all VFs and wait one second */
1970 if (adapter->vfs_allocated_count) {
1973 * Clear all flags except indication that the PF has set
1974 * the VF MAC addresses administratively
1976 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1977 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1979 /* ping all the active vfs to let them know we are going down */
1980 igb_ping_all_vfs(adapter);
1982 /* disable transmits and receives */
1983 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1984 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1987 /* Allow time for pending master requests to run */
1989 E1000_WRITE_REG(hw, E1000_WUC, 0);
1991 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1992 e1000_setup_init_funcs(hw, TRUE);
1993 igb_check_options(adapter);
1994 e1000_get_bus_info(hw);
1995 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1997 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1998 if (igb_enable_mas(adapter))
1999 dev_err(pci_dev_to_dev(pdev),
2000 "Error enabling Media Auto Sense\n");
2002 if (e1000_init_hw(hw))
2003 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2006 * Flow control settings reset on hardware reset, so guarantee flow
2007 * control is off when forcing speed.
2009 if (!hw->mac.autoneg)
2010 e1000_force_mac_fc(hw);
2012 igb_init_dmac(adapter, pba);
2013 /* Re-initialize the thermal sensor on i350 devices. */
2014 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2016 * If present, re-initialize the external thermal sensor
2020 e1000_set_i2c_bb(hw);
2021 e1000_init_thermal_sensor_thresh(hw);
2024 /*Re-establish EEE setting */
2025 if (hw->phy.media_type == e1000_media_type_copper) {
2026 switch (mac->type) {
2030 e1000_set_eee_i350(hw);
2033 e1000_set_eee_i354(hw);
2040 if (!netif_running(adapter->netdev))
2041 igb_power_down_link(adapter);
2043 igb_update_mng_vlan(adapter);
2045 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2046 E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2049 #ifdef HAVE_PTP_1588_CLOCK
2050 /* Re-enable PTP, where applicable. */
2051 igb_ptp_reset(adapter);
2052 #endif /* HAVE_PTP_1588_CLOCK */
2054 e1000_get_phy_info(hw);
2059 #ifdef HAVE_NDO_SET_FEATURES
2060 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2061 kni_netdev_features_t features)
2064 * Since there is no support for separate tx vlan accel
2065 * enabled make sure tx flag is cleared if rx is.
2067 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2068 if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2069 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2071 if (!(features & NETIF_F_HW_VLAN_RX))
2072 features &= ~NETIF_F_HW_VLAN_TX;
2075 /* If Rx checksum is disabled, then LRO should also be disabled */
2076 if (!(features & NETIF_F_RXCSUM))
2077 features &= ~NETIF_F_LRO;
2082 static int igb_set_features(struct net_device *netdev,
2083 kni_netdev_features_t features)
2085 u32 changed = netdev->features ^ features;
2087 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2088 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2090 if (changed & NETIF_F_HW_VLAN_RX)
2092 igb_vlan_mode(netdev, features);
2098 #ifdef USE_CONST_DEV_UC_CHAR
2099 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2100 struct net_device *dev,
2101 const unsigned char *addr,
2104 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2105 struct net_device *dev,
2106 unsigned char *addr,
2110 struct igb_adapter *adapter = netdev_priv(dev);
2111 struct e1000_hw *hw = &adapter->hw;
2114 if (!(adapter->vfs_allocated_count))
2117 /* Hardware does not support aging addresses so if a
2118 * ndm_state is given only allow permanent addresses
2120 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2121 pr_info("%s: FDB only supports static addresses\n",
2126 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2127 u32 rar_uc_entries = hw->mac.rar_entry_count -
2128 (adapter->vfs_allocated_count + 1);
2130 if (netdev_uc_count(dev) < rar_uc_entries)
2131 err = dev_uc_add_excl(dev, addr);
2134 } else if (is_multicast_ether_addr(addr)) {
2135 err = dev_mc_add_excl(dev, addr);
2140 /* Only return duplicate errors if NLM_F_EXCL is set */
2141 if (err == -EEXIST && !(flags & NLM_F_EXCL))
2147 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2148 #ifdef USE_CONST_DEV_UC_CHAR
2149 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2150 struct net_device *dev,
2151 const unsigned char *addr)
2153 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2154 struct net_device *dev,
2155 unsigned char *addr)
2158 struct igb_adapter *adapter = netdev_priv(dev);
2159 int err = -EOPNOTSUPP;
2161 if (ndm->ndm_state & NUD_PERMANENT) {
2162 pr_info("%s: FDB only supports static addresses\n",
2167 if (adapter->vfs_allocated_count) {
2168 if (is_unicast_ether_addr(addr))
2169 err = dev_uc_del(dev, addr);
2170 else if (is_multicast_ether_addr(addr))
2171 err = dev_mc_del(dev, addr);
2179 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2180 struct netlink_callback *cb,
2181 struct net_device *dev,
2184 struct igb_adapter *adapter = netdev_priv(dev);
2186 if (adapter->vfs_allocated_count)
2187 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2191 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2193 #ifdef HAVE_BRIDGE_ATTRIBS
2194 static int igb_ndo_bridge_setlink(struct net_device *dev,
2195 struct nlmsghdr *nlh)
2197 struct igb_adapter *adapter = netdev_priv(dev);
2198 struct e1000_hw *hw = &adapter->hw;
2199 struct nlattr *attr, *br_spec;
2202 if (!(adapter->vfs_allocated_count))
2205 switch (adapter->hw.mac.type) {
2214 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2216 nla_for_each_nested(attr, br_spec, rem) {
2219 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2222 mode = nla_get_u16(attr);
2223 if (mode == BRIDGE_MODE_VEPA) {
2224 e1000_vmdq_set_loopback_pf(hw, 0);
2225 adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2226 } else if (mode == BRIDGE_MODE_VEB) {
2227 e1000_vmdq_set_loopback_pf(hw, 1);
2228 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2232 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2233 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2239 #ifdef HAVE_BRIDGE_FILTER
2240 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2241 struct net_device *dev, u32 filter_mask)
2243 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2244 struct net_device *dev)
2247 struct igb_adapter *adapter = netdev_priv(dev);
2250 if (!(adapter->vfs_allocated_count))
2253 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2254 mode = BRIDGE_MODE_VEB;
2256 mode = BRIDGE_MODE_VEPA;
2258 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2260 #endif /* HAVE_BRIDGE_ATTRIBS */
2261 #endif /* NTF_SELF */
2263 #endif /* HAVE_NDO_SET_FEATURES */
2264 #ifdef HAVE_NET_DEVICE_OPS
2265 static const struct net_device_ops igb_netdev_ops = {
2266 .ndo_open = igb_open,
2267 .ndo_stop = igb_close,
2268 .ndo_start_xmit = igb_xmit_frame,
2269 .ndo_get_stats = igb_get_stats,
2270 .ndo_set_rx_mode = igb_set_rx_mode,
2271 .ndo_set_mac_address = igb_set_mac,
2272 .ndo_change_mtu = igb_change_mtu,
2273 .ndo_do_ioctl = igb_ioctl,
2274 .ndo_tx_timeout = igb_tx_timeout,
2275 .ndo_validate_addr = eth_validate_addr,
2276 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2277 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2279 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2280 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2281 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
2282 .ndo_get_vf_config = igb_ndo_get_vf_config,
2283 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2284 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2285 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2286 #endif /* IFLA_VF_MAX */
2287 #ifdef CONFIG_NET_POLL_CONTROLLER
2288 .ndo_poll_controller = igb_netpoll,
2290 #ifdef HAVE_NDO_SET_FEATURES
2291 .ndo_fix_features = igb_fix_features,
2292 .ndo_set_features = igb_set_features,
2294 #ifdef HAVE_VLAN_RX_REGISTER
2295 .ndo_vlan_rx_register = igb_vlan_mode,
2298 .ndo_fdb_add = igb_ndo_fdb_add,
2299 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2300 .ndo_fdb_del = igb_ndo_fdb_del,
2301 .ndo_fdb_dump = igb_ndo_fdb_dump,
2303 #ifdef HAVE_BRIDGE_ATTRIBS
2304 .ndo_bridge_setlink = igb_ndo_bridge_setlink,
2305 .ndo_bridge_getlink = igb_ndo_bridge_getlink,
2306 #endif /* HAVE_BRIDGE_ATTRIBS */
2310 #ifdef CONFIG_IGB_VMDQ_NETDEV
2311 static const struct net_device_ops igb_vmdq_ops = {
2312 .ndo_open = &igb_vmdq_open,
2313 .ndo_stop = &igb_vmdq_close,
2314 .ndo_start_xmit = &igb_vmdq_xmit_frame,
2315 .ndo_get_stats = &igb_vmdq_get_stats,
2316 .ndo_set_rx_mode = &igb_vmdq_set_rx_mode,
2317 .ndo_validate_addr = eth_validate_addr,
2318 .ndo_set_mac_address = &igb_vmdq_set_mac,
2319 .ndo_change_mtu = &igb_vmdq_change_mtu,
2320 .ndo_tx_timeout = &igb_vmdq_tx_timeout,
2321 .ndo_vlan_rx_register = &igb_vmdq_vlan_rx_register,
2322 .ndo_vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid,
2323 .ndo_vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid,
2326 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2327 #endif /* HAVE_NET_DEVICE_OPS */
2328 #ifdef CONFIG_IGB_VMDQ_NETDEV
2329 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2331 #ifdef HAVE_NET_DEVICE_OPS
2332 vnetdev->netdev_ops = &igb_vmdq_ops;
2334 dev->open = &igb_vmdq_open;
2335 dev->stop = &igb_vmdq_close;
2336 dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2337 dev->get_stats = &igb_vmdq_get_stats;
2338 #ifdef HAVE_SET_RX_MODE
2339 dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2341 dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2342 dev->set_mac_address = &igb_vmdq_set_mac;
2343 dev->change_mtu = &igb_vmdq_change_mtu;
2344 #ifdef HAVE_TX_TIMEOUT
2345 dev->tx_timeout = &igb_vmdq_tx_timeout;
2347 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2348 dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2349 dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2350 dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2353 igb_vmdq_set_ethtool_ops(vnetdev);
2354 vnetdev->watchdog_timeo = 5 * HZ;
2358 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2360 int pool, err = 0, base_queue;
2361 struct net_device *vnetdev;
2362 struct igb_vmdq_adapter *vmdq_adapter;
2364 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2365 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2366 base_queue = pool * qpp;
2367 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2372 vmdq_adapter = netdev_priv(vnetdev);
2373 vmdq_adapter->vnetdev = vnetdev;
2374 vmdq_adapter->real_adapter = adapter;
2375 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2376 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2377 igb_assign_vmdq_netdev_ops(vnetdev);
2378 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2379 adapter->netdev->name, pool);
2380 vnetdev->features = adapter->netdev->features;
2381 #ifdef HAVE_NETDEV_VLAN_FEATURES
2382 vnetdev->vlan_features = adapter->netdev->vlan_features;
2384 adapter->vmdq_netdev[pool-1] = vnetdev;
2385 err = register_netdev(vnetdev);
2392 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2396 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2397 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2398 free_netdev(adapter->vmdq_netdev[pool-1]);
2399 adapter->vmdq_netdev[pool-1] = NULL;
2403 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2406 * igb_set_fw_version - Configure version string for ethtool
2407 * @adapter: adapter struct
2410 static void igb_set_fw_version(struct igb_adapter *adapter)
2412 struct e1000_hw *hw = &adapter->hw;
2413 struct e1000_fw_version fw;
2415 e1000_get_fw_version(hw, &fw);
2417 switch (hw->mac.type) {
2420 if (!(e1000_get_flash_presence_i210(hw))) {
2421 snprintf(adapter->fw_version,
2422 sizeof(adapter->fw_version),
2424 fw.invm_major, fw.invm_minor, fw.invm_img_type);
2429 /* if option rom is valid, display its version too*/
2431 snprintf(adapter->fw_version,
2432 sizeof(adapter->fw_version),
2433 "%d.%d, 0x%08x, %d.%d.%d",
2434 fw.eep_major, fw.eep_minor, fw.etrack_id,
2435 fw.or_major, fw.or_build, fw.or_patch);
2438 if (fw.etrack_id != 0X0000) {
2439 snprintf(adapter->fw_version,
2440 sizeof(adapter->fw_version),
2442 fw.eep_major, fw.eep_minor, fw.etrack_id);
2444 snprintf(adapter->fw_version,
2445 sizeof(adapter->fw_version),
2447 fw.eep_major, fw.eep_minor, fw.eep_build);
2457 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2459 * @adapter: adapter struct
2461 static void igb_init_mas(struct igb_adapter *adapter)
2463 struct e1000_hw *hw = &adapter->hw;
2466 e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2467 switch (hw->bus.func) {
2469 if (eeprom_data & IGB_MAS_ENABLE_0)
2470 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2473 if (eeprom_data & IGB_MAS_ENABLE_1)
2474 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2477 if (eeprom_data & IGB_MAS_ENABLE_2)
2478 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2481 if (eeprom_data & IGB_MAS_ENABLE_3)
2482 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2485 /* Shouldn't get here */
2486 dev_err(pci_dev_to_dev(adapter->pdev),
2487 "%s:AMS: Invalid port configuration, returning\n",
2488 adapter->netdev->name);
2494 * igb_probe - Device Initialization Routine
2495 * @pdev: PCI device information struct
2496 * @ent: entry in igb_pci_tbl
2498 * Returns 0 on success, negative on failure
2500 * igb_probe initializes an adapter identified by a pci_dev structure.
2501 * The OS initialization, configuring of the adapter private structure,
2502 * and a hardware reset occur.
2504 static int __devinit igb_probe(struct pci_dev *pdev,
2505 const struct pci_device_id *ent)
2507 struct net_device *netdev;
2508 struct igb_adapter *adapter;
2509 struct e1000_hw *hw;
2510 u16 eeprom_data = 0;
2511 u8 pba_str[E1000_PBANUM_LENGTH];
2513 static int global_quad_port_a; /* global quad port a indication */
2514 int i, err, pci_using_dac;
2515 static int cards_found;
2517 err = pci_enable_device_mem(pdev);
2522 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2524 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2528 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2530 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2532 IGB_ERR("No usable DMA configuration, "
2539 #ifndef HAVE_ASPM_QUIRKS
2540 /* 82575 requires that the pci-e link partner disable the L0s state */
2541 switch (pdev->device) {
2542 case E1000_DEV_ID_82575EB_COPPER:
2543 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2544 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2545 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2550 #endif /* HAVE_ASPM_QUIRKS */
2551 err = pci_request_selected_regions(pdev,
2552 pci_select_bars(pdev,
2558 pci_enable_pcie_error_reporting(pdev);
2560 pci_set_master(pdev);
2564 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2567 netdev = alloc_etherdev(sizeof(struct igb_adapter));
2568 #endif /* HAVE_TX_MQ */
2570 goto err_alloc_etherdev;
2572 SET_MODULE_OWNER(netdev);
2573 SET_NETDEV_DEV(netdev, &pdev->dev);
2575 pci_set_drvdata(pdev, netdev);
2576 adapter = netdev_priv(netdev);
2577 adapter->netdev = netdev;
2578 adapter->pdev = pdev;
2581 adapter->port_num = hw->bus.func;
2582 adapter->msg_enable = (1 << debug) - 1;
2585 err = pci_save_state(pdev);
2590 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2591 pci_resource_len(pdev, 0));
2595 #ifdef HAVE_NET_DEVICE_OPS
2596 netdev->netdev_ops = &igb_netdev_ops;
2597 #else /* HAVE_NET_DEVICE_OPS */
2598 netdev->open = &igb_open;
2599 netdev->stop = &igb_close;
2600 netdev->get_stats = &igb_get_stats;
2601 #ifdef HAVE_SET_RX_MODE
2602 netdev->set_rx_mode = &igb_set_rx_mode;
2604 netdev->set_multicast_list = &igb_set_rx_mode;
2605 netdev->set_mac_address = &igb_set_mac;
2606 netdev->change_mtu = &igb_change_mtu;
2607 netdev->do_ioctl = &igb_ioctl;
2608 #ifdef HAVE_TX_TIMEOUT
2609 netdev->tx_timeout = &igb_tx_timeout;
2611 netdev->vlan_rx_register = igb_vlan_mode;
2612 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2613 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2614 #ifdef CONFIG_NET_POLL_CONTROLLER
2615 netdev->poll_controller = igb_netpoll;
2617 netdev->hard_start_xmit = &igb_xmit_frame;
2618 #endif /* HAVE_NET_DEVICE_OPS */
2619 igb_set_ethtool_ops(netdev);
2620 #ifdef HAVE_TX_TIMEOUT
2621 netdev->watchdog_timeo = 5 * HZ;
2624 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2626 adapter->bd_number = cards_found;
2628 /* setup the private structure */
2629 err = igb_sw_init(adapter);
2633 e1000_get_bus_info(hw);
2635 hw->phy.autoneg_wait_to_complete = FALSE;
2636 hw->mac.adaptive_ifs = FALSE;
2638 /* Copper options */
2639 if (hw->phy.media_type == e1000_media_type_copper) {
2640 hw->phy.mdix = AUTO_ALL_MODES;
2641 hw->phy.disable_polarity_correction = FALSE;
2642 hw->phy.ms_type = e1000_ms_hw_default;
2645 if (e1000_check_reset_block(hw))
2646 dev_info(pci_dev_to_dev(pdev),
2647 "PHY reset is blocked due to SOL/IDER session.\n");
2650 * features is initialized to 0 in allocation, it might have bits
2651 * set by igb_sw_init so we should use an or instead of an
2654 netdev->features |= NETIF_F_SG |
2656 #ifdef NETIF_F_IPV6_CSUM
2664 #endif /* NETIF_F_TSO */
2665 #ifdef NETIF_F_RXHASH
2669 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2670 NETIF_F_HW_VLAN_CTAG_RX |
2671 NETIF_F_HW_VLAN_CTAG_TX;
2673 NETIF_F_HW_VLAN_RX |
2677 if (hw->mac.type >= e1000_82576)
2678 netdev->features |= NETIF_F_SCTP_CSUM;
2680 #ifdef HAVE_NDO_SET_FEATURES
2681 /* copy netdev features into list of user selectable features */
2682 netdev->hw_features |= netdev->features;
2685 /* give us the option of enabling LRO later */
2686 netdev->hw_features |= NETIF_F_LRO;
2691 /* this is only needed on kernels prior to 2.6.39 */
2692 netdev->features |= NETIF_F_GRO;
2696 /* set this bit last since it cannot be part of hw_features */
2697 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2698 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2700 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2703 #ifdef HAVE_NETDEV_VLAN_FEATURES
2704 netdev->vlan_features |= NETIF_F_TSO |
2712 netdev->features |= NETIF_F_HIGHDMA;
2714 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2716 if (adapter->dmac != IGB_DMAC_DISABLE)
2717 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2720 /* before reading the NVM, reset the controller to put the device in a
2721 * known good starting state */
2724 /* make sure the NVM is good */
2725 if (e1000_validate_nvm_checksum(hw) < 0) {
2726 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2732 /* copy the MAC address out of the NVM */
2733 if (e1000_read_mac_addr(hw))
2734 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2735 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2736 #ifdef ETHTOOL_GPERMADDR
2737 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2739 if (!is_valid_ether_addr(netdev->perm_addr)) {
2741 if (!is_valid_ether_addr(netdev->dev_addr)) {
2743 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2748 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2749 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2750 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2751 igb_rar_set(adapter, 0);
2753 /* get firmware version for ethtool -i */
2754 igb_set_fw_version(adapter);
2756 /* Check if Media Autosense is enabled */
2757 if (hw->mac.type == e1000_82580)
2758 igb_init_mas(adapter);
2759 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2760 (unsigned long) adapter);
2761 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2762 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2763 (unsigned long) adapter);
2764 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2765 (unsigned long) adapter);
2767 INIT_WORK(&adapter->reset_task, igb_reset_task);
2768 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2769 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2770 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2772 /* Initialize link properties that are user-changeable */
2773 adapter->fc_autoneg = true;
2774 hw->mac.autoneg = true;
2775 hw->phy.autoneg_advertised = 0x2f;
2777 hw->fc.requested_mode = e1000_fc_default;
2778 hw->fc.current_mode = e1000_fc_default;
2780 e1000_validate_mdi_setting(hw);
2782 /* By default, support wake on port A */
2783 if (hw->bus.func == 0)
2784 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2786 /* Check the NVM for wake support for non-port A ports */
2787 if (hw->mac.type >= e1000_82580)
2788 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2789 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2791 else if (hw->bus.func == 1)
2792 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2794 if (eeprom_data & IGB_EEPROM_APME)
2795 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2797 /* now that we have the eeprom settings, apply the special cases where
2798 * the eeprom may be wrong or the board simply won't support wake on
2799 * lan on a particular port */
2800 switch (pdev->device) {
2801 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2802 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2804 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2805 case E1000_DEV_ID_82576_FIBER:
2806 case E1000_DEV_ID_82576_SERDES:
2807 /* Wake events only supported on port A for dual fiber
2808 * regardless of eeprom setting */
2809 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2810 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2812 case E1000_DEV_ID_82576_QUAD_COPPER:
2813 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2814 /* if quad port adapter, disable WoL on all but port A */
2815 if (global_quad_port_a != 0)
2816 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2818 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2819 /* Reset for multiple quad port adapters */
2820 if (++global_quad_port_a == 4)
2821 global_quad_port_a = 0;
2824 /* If the device can't wake, don't set software support */
2825 if (!device_can_wakeup(&adapter->pdev->dev))
2826 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2830 /* initialize the wol settings based on the eeprom settings */
2831 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2832 adapter->wol |= E1000_WUFC_MAG;
2834 /* Some vendors want WoL disabled by default, but still supported */
2835 if ((hw->mac.type == e1000_i350) &&
2836 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2837 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2841 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2842 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2844 /* reset the hardware with the new settings */
2848 #ifdef HAVE_I2C_SUPPORT
2849 /* Init the I2C interface */
2850 err = igb_init_i2c(adapter);
2852 dev_err(&pdev->dev, "failed to init i2c interface\n");
2855 #endif /* HAVE_I2C_SUPPORT */
2857 /* let the f/w know that the h/w is now under the control of the
2859 igb_get_hw_control(adapter);
2861 strncpy(netdev->name, "eth%d", IFNAMSIZ);
2862 err = register_netdev(netdev);
2866 #ifdef CONFIG_IGB_VMDQ_NETDEV
2867 err = igb_init_vmdq_netdevs(adapter);
2871 /* carrier off reporting is important to ethtool even BEFORE open */
2872 netif_carrier_off(netdev);
2875 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2876 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2877 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2878 igb_setup_dca(adapter);
2882 #ifdef HAVE_PTP_1588_CLOCK
2883 /* do hw tstamp init after resetting */
2884 igb_ptp_init(adapter);
2885 #endif /* HAVE_PTP_1588_CLOCK */
2887 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2888 /* print bus type/speed/width info */
2889 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2891 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2892 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2893 (hw->mac.type == e1000_i354) ? "integrated" :
2895 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2896 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2897 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2898 (hw->mac.type == e1000_i354) ? "integrated" :
2900 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2901 for (i = 0; i < 6; i++)
2902 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2904 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2906 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2907 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2911 /* Initialize the thermal sensor on i350 devices. */
2912 if (hw->mac.type == e1000_i350) {
2913 if (hw->bus.func == 0) {
2917 * Read the NVM to determine if this i350 device
2918 * supports an external thermal sensor.
2920 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2921 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2922 adapter->ets = true;
2924 adapter->ets = false;
2928 igb_sysfs_init(adapter);
2932 igb_procfs_init(adapter);
2933 #endif /* IGB_PROCFS */
2934 #endif /* IGB_HWMON */
2936 adapter->ets = false;
2939 if (hw->phy.media_type == e1000_media_type_copper) {
2940 switch (hw->mac.type) {
2944 /* Enable EEE for internal copper PHY devices */
2945 err = e1000_set_eee_i350(hw);
2947 (adapter->flags & IGB_FLAG_EEE))
2948 adapter->eee_advert =
2949 MDIO_EEE_100TX | MDIO_EEE_1000T;
2952 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2953 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2954 err = e1000_set_eee_i354(hw);
2956 (adapter->flags & IGB_FLAG_EEE))
2957 adapter->eee_advert =
2958 MDIO_EEE_100TX | MDIO_EEE_1000T;
2966 /* send driver version info to firmware */
2967 if (hw->mac.type >= e1000_i350)
2968 igb_init_fw(adapter);
2971 if (netdev->features & NETIF_F_LRO)
2972 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
2974 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
2976 dev_info(pci_dev_to_dev(pdev),
2977 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2978 adapter->msix_entries ? "MSI-X" :
2979 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2980 adapter->num_rx_queues, adapter->num_tx_queues);
2984 pm_runtime_put_noidle(&pdev->dev);
2988 igb_release_hw_control(adapter);
2989 #ifdef HAVE_I2C_SUPPORT
2990 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2991 #endif /* HAVE_I2C_SUPPORT */
2993 if (!e1000_check_reset_block(hw))
2994 e1000_phy_hw_reset(hw);
2996 if (hw->flash_address)
2997 iounmap(hw->flash_address);
2999 igb_clear_interrupt_scheme(adapter);
3000 igb_reset_sriov_capability(adapter);
3001 iounmap(hw->hw_addr);
3003 free_netdev(netdev);
3005 pci_release_selected_regions(pdev,
3006 pci_select_bars(pdev, IORESOURCE_MEM));
3009 pci_disable_device(pdev);
3012 #ifdef HAVE_I2C_SUPPORT
3014 * igb_remove_i2c - Cleanup I2C interface
3015 * @adapter: pointer to adapter structure
3018 static void igb_remove_i2c(struct igb_adapter *adapter)
3021 /* free the adapter bus structure */
3022 i2c_del_adapter(&adapter->i2c_adap);
3024 #endif /* HAVE_I2C_SUPPORT */
3027 * igb_remove - Device Removal Routine
3028 * @pdev: PCI device information struct
3030 * igb_remove is called by the PCI subsystem to alert the driver
3031 * that it should release a PCI device. The could be caused by a
3032 * Hot-Plug event, or because the driver is going to be removed from
3035 static void __devexit igb_remove(struct pci_dev *pdev)
3037 struct net_device *netdev = pci_get_drvdata(pdev);
3038 struct igb_adapter *adapter = netdev_priv(netdev);
3039 struct e1000_hw *hw = &adapter->hw;
3041 pm_runtime_get_noresume(&pdev->dev);
3042 #ifdef HAVE_I2C_SUPPORT
3043 igb_remove_i2c(adapter);
3044 #endif /* HAVE_I2C_SUPPORT */
3045 #ifdef HAVE_PTP_1588_CLOCK
3046 igb_ptp_stop(adapter);
3047 #endif /* HAVE_PTP_1588_CLOCK */
3049 /* flush_scheduled work may reschedule our watchdog task, so
3050 * explicitly disable watchdog tasks from being rescheduled */
3051 set_bit(__IGB_DOWN, &adapter->state);
3052 del_timer_sync(&adapter->watchdog_timer);
3053 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3054 del_timer_sync(&adapter->dma_err_timer);
3055 del_timer_sync(&adapter->phy_info_timer);
3057 flush_scheduled_work();
3060 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3061 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3062 dca_remove_requester(&pdev->dev);
3063 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3064 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3068 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3069 * would have already happened in close and is redundant. */
3070 igb_release_hw_control(adapter);
3072 unregister_netdev(netdev);
3073 #ifdef CONFIG_IGB_VMDQ_NETDEV
3074 igb_remove_vmdq_netdevs(adapter);
3077 igb_clear_interrupt_scheme(adapter);
3078 igb_reset_sriov_capability(adapter);
3080 iounmap(hw->hw_addr);
3081 if (hw->flash_address)
3082 iounmap(hw->flash_address);
3083 pci_release_selected_regions(pdev,
3084 pci_select_bars(pdev, IORESOURCE_MEM));
3087 igb_sysfs_exit(adapter);
3090 igb_procfs_exit(adapter);
3091 #endif /* IGB_PROCFS */
3092 #endif /* IGB_HWMON */
3093 kfree(adapter->mac_table);
3094 kfree(adapter->shadow_vfta);
3095 free_netdev(netdev);
3097 pci_disable_pcie_error_reporting(pdev);
3099 pci_disable_device(pdev);
3103 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3104 * @adapter: board private structure to initialize
3106 * igb_sw_init initializes the Adapter private data structure.
3107 * Fields are initialized based on PCI device information and
3108 * OS network device settings (MTU size).
3110 static int igb_sw_init(struct igb_adapter *adapter)
3112 struct e1000_hw *hw = &adapter->hw;
3113 struct net_device *netdev = adapter->netdev;
3114 struct pci_dev *pdev = adapter->pdev;
3116 /* PCI config space info */
3118 hw->vendor_id = pdev->vendor;
3119 hw->device_id = pdev->device;
3120 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3121 hw->subsystem_device_id = pdev->subsystem_device;
3123 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3125 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3127 /* set default ring sizes */
3128 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3129 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3131 /* set default work limits */
3132 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3134 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3137 /* Initialize the hardware-specific values */
3138 if (e1000_setup_init_funcs(hw, TRUE)) {
3139 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3143 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3144 hw->mac.rar_entry_count,
3147 /* Setup and initialize a copy of the hw vlan table array */
3148 adapter->shadow_vfta = (u32 *)kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3151 /* These calls may decrease the number of queues */
3152 if (hw->mac.type < e1000_i210) {
3153 igb_set_sriov_capability(adapter);
3156 if (igb_init_interrupt_scheme(adapter, true)) {
3157 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3161 /* Explicitly disable IRQ since the NIC can be in any state. */
3162 igb_irq_disable(adapter);
3164 set_bit(__IGB_DOWN, &adapter->state);
3170 * igb_open - Called when a network interface is made active
3171 * @netdev: network interface device structure
3173 * Returns 0 on success, negative value on failure
3175 * The open entry point is called when a network interface is made
3176 * active by the system (IFF_UP). At this point all resources needed
3177 * for transmit and receive operations are allocated, the interrupt
3178 * handler is registered with the OS, the watchdog timer is started,
3179 * and the stack is notified that the interface is ready.
3181 static int __igb_open(struct net_device *netdev, bool resuming)
3183 struct igb_adapter *adapter = netdev_priv(netdev);
3184 struct e1000_hw *hw = &adapter->hw;
3185 #ifdef CONFIG_PM_RUNTIME
3186 struct pci_dev *pdev = adapter->pdev;
3187 #endif /* CONFIG_PM_RUNTIME */
3191 /* disallow open during test */
3192 if (test_bit(__IGB_TESTING, &adapter->state)) {
3197 #ifdef CONFIG_PM_RUNTIME
3199 pm_runtime_get_sync(&pdev->dev);
3200 #endif /* CONFIG_PM_RUNTIME */
3202 netif_carrier_off(netdev);
3204 /* allocate transmit descriptors */
3205 err = igb_setup_all_tx_resources(adapter);
3209 /* allocate receive descriptors */
3210 err = igb_setup_all_rx_resources(adapter);
3214 igb_power_up_link(adapter);
3216 /* before we allocate an interrupt, we must be ready to handle it.
3217 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3218 * as soon as we call pci_request_irq, so we have to setup our
3219 * clean_rx handler before we do so. */
3220 igb_configure(adapter);
3222 err = igb_request_irq(adapter);
3226 /* Notify the stack of the actual queue counts. */
3227 netif_set_real_num_tx_queues(netdev,
3228 adapter->vmdq_pools ? 1 :
3229 adapter->num_tx_queues);
3231 err = netif_set_real_num_rx_queues(netdev,
3232 adapter->vmdq_pools ? 1 :
3233 adapter->num_rx_queues);
3235 goto err_set_queues;
3237 /* From here on the code is the same as igb_up() */
3238 clear_bit(__IGB_DOWN, &adapter->state);
3240 for (i = 0; i < adapter->num_q_vectors; i++)
3241 napi_enable(&(adapter->q_vector[i]->napi));
3242 igb_configure_lli(adapter);
3244 /* Clear any pending interrupts. */
3245 E1000_READ_REG(hw, E1000_ICR);
3247 igb_irq_enable(adapter);
3249 /* notify VFs that reset has been completed */
3250 if (adapter->vfs_allocated_count) {
3251 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3252 reg_data |= E1000_CTRL_EXT_PFRSTD;
3253 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3256 netif_tx_start_all_queues(netdev);
3258 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3259 schedule_work(&adapter->dma_err_task);
3261 /* start the watchdog. */
3262 hw->mac.get_link_status = 1;
3263 schedule_work(&adapter->watchdog_task);
3265 return E1000_SUCCESS;
3268 igb_free_irq(adapter);
3270 igb_release_hw_control(adapter);
3271 igb_power_down_link(adapter);
3272 igb_free_all_rx_resources(adapter);
3274 igb_free_all_tx_resources(adapter);
3278 #ifdef CONFIG_PM_RUNTIME
3280 pm_runtime_put(&pdev->dev);
3281 #endif /* CONFIG_PM_RUNTIME */
3286 static int igb_open(struct net_device *netdev)
3288 return __igb_open(netdev, false);
3292 * igb_close - Disables a network interface
3293 * @netdev: network interface device structure
3295 * Returns 0, this is not allowed to fail
3297 * The close entry point is called when an interface is de-activated
3298 * by the OS. The hardware is still under the driver's control, but
3299 * needs to be disabled. A global MAC reset is issued to stop the
3300 * hardware, and all transmit and receive resources are freed.
3302 static int __igb_close(struct net_device *netdev, bool suspending)
3304 struct igb_adapter *adapter = netdev_priv(netdev);
3305 #ifdef CONFIG_PM_RUNTIME
3306 struct pci_dev *pdev = adapter->pdev;
3307 #endif /* CONFIG_PM_RUNTIME */
3309 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3311 #ifdef CONFIG_PM_RUNTIME
3313 pm_runtime_get_sync(&pdev->dev);
3314 #endif /* CONFIG_PM_RUNTIME */
3318 igb_release_hw_control(adapter);
3320 igb_free_irq(adapter);
3322 igb_free_all_tx_resources(adapter);
3323 igb_free_all_rx_resources(adapter);
3325 #ifdef CONFIG_PM_RUNTIME
3327 pm_runtime_put_sync(&pdev->dev);
3328 #endif /* CONFIG_PM_RUNTIME */
3333 static int igb_close(struct net_device *netdev)
3335 return __igb_close(netdev, false);
3339 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3340 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3342 * Return 0 on success, negative on failure
3344 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3346 struct device *dev = tx_ring->dev;
3349 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3350 tx_ring->tx_buffer_info = vzalloc(size);
3351 if (!tx_ring->tx_buffer_info)
3354 /* round up to nearest 4K */
3355 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3356 tx_ring->size = ALIGN(tx_ring->size, 4096);
3358 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3359 &tx_ring->dma, GFP_KERNEL);
3364 tx_ring->next_to_use = 0;
3365 tx_ring->next_to_clean = 0;
3370 vfree(tx_ring->tx_buffer_info);
3372 "Unable to allocate memory for the transmit descriptor ring\n");
3377 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3378 * (Descriptors) for all queues
3379 * @adapter: board private structure
3381 * Return 0 on success, negative on failure
3383 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3385 struct pci_dev *pdev = adapter->pdev;
3388 for (i = 0; i < adapter->num_tx_queues; i++) {
3389 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3391 dev_err(pci_dev_to_dev(pdev),
3392 "Allocation for Tx Queue %u failed\n", i);
3393 for (i--; i >= 0; i--)
3394 igb_free_tx_resources(adapter->tx_ring[i]);
3403 * igb_setup_tctl - configure the transmit control registers
3404 * @adapter: Board private structure
3406 void igb_setup_tctl(struct igb_adapter *adapter)
3408 struct e1000_hw *hw = &adapter->hw;
3411 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3412 E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3414 /* Program the Transmit Control Register */
3415 tctl = E1000_READ_REG(hw, E1000_TCTL);
3416 tctl &= ~E1000_TCTL_CT;
3417 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3418 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3420 e1000_config_collision_dist(hw);
3422 /* Enable transmits */
3423 tctl |= E1000_TCTL_EN;
3425 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3428 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3430 struct e1000_hw *hw = &adapter->hw;
3431 switch (hw->mac.type) {
3435 if (adapter->msix_entries)
3445 * igb_configure_tx_ring - Configure transmit ring after Reset
3446 * @adapter: board private structure
3447 * @ring: tx ring to configure
3449 * Configure a transmit ring after a reset.
3451 void igb_configure_tx_ring(struct igb_adapter *adapter,
3452 struct igb_ring *ring)
3454 struct e1000_hw *hw = &adapter->hw;
3456 u64 tdba = ring->dma;
3457 int reg_idx = ring->reg_idx;
3459 /* disable the queue */
3460 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3461 E1000_WRITE_FLUSH(hw);
3464 E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3465 ring->count * sizeof(union e1000_adv_tx_desc));
3466 E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3467 tdba & 0x00000000ffffffffULL);
3468 E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3470 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3471 E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3472 writel(0, ring->tail);
3474 txdctl |= IGB_TX_PTHRESH;
3475 txdctl |= IGB_TX_HTHRESH << 8;
3476 txdctl |= igb_tx_wthresh(adapter) << 16;
3478 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3479 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3483 * igb_configure_tx - Configure transmit Unit after Reset
3484 * @adapter: board private structure
3486 * Configure the Tx unit of the MAC after a reset.
3488 static void igb_configure_tx(struct igb_adapter *adapter)
3492 for (i = 0; i < adapter->num_tx_queues; i++)
3493 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3497 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3498 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3500 * Returns 0 on success, negative on failure
3502 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3504 struct device *dev = rx_ring->dev;
3507 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3508 rx_ring->rx_buffer_info = vzalloc(size);
3509 if (!rx_ring->rx_buffer_info)
3512 desc_len = sizeof(union e1000_adv_rx_desc);
3514 /* Round up to nearest 4K */
3515 rx_ring->size = rx_ring->count * desc_len;
3516 rx_ring->size = ALIGN(rx_ring->size, 4096);
3518 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3519 &rx_ring->dma, GFP_KERNEL);
3524 rx_ring->next_to_alloc = 0;
3525 rx_ring->next_to_clean = 0;
3526 rx_ring->next_to_use = 0;
3531 vfree(rx_ring->rx_buffer_info);
3532 rx_ring->rx_buffer_info = NULL;
3533 dev_err(dev, "Unable to allocate memory for the receive descriptor"
3539 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3540 * (Descriptors) for all queues
3541 * @adapter: board private structure
3543 * Return 0 on success, negative on failure
3545 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3547 struct pci_dev *pdev = adapter->pdev;
3550 for (i = 0; i < adapter->num_rx_queues; i++) {
3551 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3553 dev_err(pci_dev_to_dev(pdev),
3554 "Allocation for Rx Queue %u failed\n", i);
3555 for (i--; i >= 0; i--)
3556 igb_free_rx_resources(adapter->rx_ring[i]);
3565 * igb_setup_mrqc - configure the multiple receive queue control registers
3566 * @adapter: Board private structure
3568 static void igb_setup_mrqc(struct igb_adapter *adapter)
3570 struct e1000_hw *hw = &adapter->hw;
3572 u32 j, num_rx_queues, shift = 0, shift2 = 0;
3573 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3574 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3575 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3578 /* Fill out hash function seeds */
3579 for (j = 0; j < 10; j++)
3580 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3582 num_rx_queues = adapter->rss_queues;
3584 /* 82575 and 82576 supports 2 RSS queues for VMDq */
3585 switch (hw->mac.type) {
3587 if (adapter->vmdq_pools) {
3595 /* 82576 supports 2 RSS queues for SR-IOV */
3596 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3606 * Populate the redirection table 4 entries at a time. To do this
3607 * we are generating the results for n and n+2 and then interleaving
3608 * those with the results with n+1 and n+3.
3610 for (j = 0; j < 32; j++) {
3611 /* first pass generates n and n+2 */
3612 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3613 u32 reta = (base & 0x07800780) >> (7 - shift);
3615 /* second pass generates n+1 and n+3 */
3616 base += 0x00010001 * num_rx_queues;
3617 reta |= (base & 0x07800780) << (1 + shift);
3619 /* generate 2nd table for 82575 based parts */
3621 reta |= (0x01010101 * num_rx_queues) << shift2;
3623 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3627 * Disable raw packet checksumming so that RSS hash is placed in
3628 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3629 * offloads as they are enabled by default
3631 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3632 rxcsum |= E1000_RXCSUM_PCSD;
3634 if (adapter->hw.mac.type >= e1000_82576)
3635 /* Enable Receive Checksum Offload for SCTP */
3636 rxcsum |= E1000_RXCSUM_CRCOFL;
3638 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3639 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3641 /* Generate RSS hash based on packet types, TCP/UDP
3642 * port numbers and/or IPv4/v6 src and dst addresses
3644 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3645 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3646 E1000_MRQC_RSS_FIELD_IPV6 |
3647 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3648 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3650 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3651 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3652 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3653 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3655 /* If VMDq is enabled then we set the appropriate mode for that, else
3656 * we default to RSS so that an RSS hash is calculated per packet even
3657 * if we are only using one queue */
3658 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3659 if (hw->mac.type > e1000_82575) {
3660 /* Set the default pool for the PF's first queue */
3661 u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3662 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3663 E1000_VT_CTL_DISABLE_DEF_POOL);
3664 vtctl |= adapter->vfs_allocated_count <<
3665 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3666 E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3667 } else if (adapter->rss_queues > 1) {
3668 /* set default queue for pool 1 to queue 2 */
3669 E1000_WRITE_REG(hw, E1000_VT_CTL,
3670 adapter->rss_queues << 7);
3672 if (adapter->rss_queues > 1)
3673 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3675 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3677 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3679 igb_vmm_control(adapter);
3681 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3685 * igb_setup_rctl - configure the receive control registers
3686 * @adapter: Board private structure
3688 void igb_setup_rctl(struct igb_adapter *adapter)
3690 struct e1000_hw *hw = &adapter->hw;
3693 rctl = E1000_READ_REG(hw, E1000_RCTL);
3695 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3696 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3698 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3699 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3702 * enable stripping of CRC. It's unlikely this will break BMC
3703 * redirection as it did with e1000. Newer features require
3704 * that the HW strips the CRC.
3706 rctl |= E1000_RCTL_SECRC;
3708 /* disable store bad packets and clear size bits. */
3709 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3711 /* enable LPE to prevent packets larger than max_frame_size */
3712 rctl |= E1000_RCTL_LPE;
3714 /* disable queue 0 to prevent tail write w/o re-config */
3715 E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3717 /* Attention!!! For SR-IOV PF driver operations you must enable
3718 * queue drop for all VF and PF queues to prevent head of line blocking
3719 * if an un-trusted VF does not provide descriptors to hardware.
3721 if (adapter->vfs_allocated_count) {
3722 /* set all queue drop enable bits */
3723 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3726 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3729 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3732 struct e1000_hw *hw = &adapter->hw;
3735 /* if it isn't the PF check to see if VFs are enabled and
3736 * increase the size to support vlan tags */
3737 if (vfn < adapter->vfs_allocated_count &&
3738 adapter->vf_data[vfn].vlans_enabled)
3741 #ifdef CONFIG_IGB_VMDQ_NETDEV
3742 if (vfn >= adapter->vfs_allocated_count) {
3743 int queue = vfn - adapter->vfs_allocated_count;
3744 struct igb_vmdq_adapter *vadapter;
3746 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3747 if (vadapter->vlgrp)
3751 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3752 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3753 vmolr |= size | E1000_VMOLR_LPE;
3754 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3760 * igb_rlpml_set - set maximum receive packet size
3761 * @adapter: board private structure
3763 * Configure maximum receivable packet size.
3765 static void igb_rlpml_set(struct igb_adapter *adapter)
3767 u32 max_frame_size = adapter->max_frame_size;
3768 struct e1000_hw *hw = &adapter->hw;
3769 u16 pf_id = adapter->vfs_allocated_count;
3771 if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3773 for (i = 0; i < adapter->vmdq_pools; i++)
3774 igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3776 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3777 * to our max jumbo frame size, in case we need to enable
3778 * jumbo frames on one of the rings later.
3779 * This will not pass over-length frames into the default
3780 * queue because it's gated by the VMOLR.RLPML.
3782 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3784 /* Set VF RLPML for the PF device. */
3785 if (adapter->vfs_allocated_count)
3786 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3788 E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3791 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3792 int vfn, bool enable)
3794 struct e1000_hw *hw = &adapter->hw;
3798 if (hw->mac.type < e1000_82576)
3801 if (hw->mac.type == e1000_i350)
3802 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3804 reg = hw->hw_addr + E1000_VMOLR(vfn);
3808 val |= E1000_VMOLR_STRVLAN;
3810 val &= ~(E1000_VMOLR_STRVLAN);
3813 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3816 struct e1000_hw *hw = &adapter->hw;
3820 * This register exists only on 82576 and newer so if we are older then
3821 * we should exit and do nothing
3823 if (hw->mac.type < e1000_82576)
3826 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3829 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3831 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3833 /* clear all bits that might not be set */
3834 vmolr &= ~E1000_VMOLR_RSSE;
3836 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3837 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3839 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3840 vmolr |= E1000_VMOLR_LPE; /* Accept long packets */
3842 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3846 * igb_configure_rx_ring - Configure a receive ring after Reset
3847 * @adapter: board private structure
3848 * @ring: receive ring to be configured
3850 * Configure the Rx unit of the MAC after a reset.
3852 void igb_configure_rx_ring(struct igb_adapter *adapter,
3853 struct igb_ring *ring)
3855 struct e1000_hw *hw = &adapter->hw;
3856 u64 rdba = ring->dma;
3857 int reg_idx = ring->reg_idx;
3858 u32 srrctl = 0, rxdctl = 0;
3860 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3862 * RLPML prevents us from receiving a frame larger than max_frame so
3863 * it is safe to just set the rx_buffer_len to max_frame without the
3864 * risk of an skb over panic.
3866 ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3867 MAXIMUM_ETHERNET_VLAN_SIZE);
3870 /* disable the queue */
3871 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3873 /* Set DMA base address registers */
3874 E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3875 rdba & 0x00000000ffffffffULL);
3876 E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3877 E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3878 ring->count * sizeof(union e1000_adv_rx_desc));
3880 /* initialize head and tail */
3881 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3882 E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3883 writel(0, ring->tail);
3885 /* reset next-to- use/clean to place SW in sync with hardwdare */
3886 ring->next_to_clean = 0;
3887 ring->next_to_use = 0;
3888 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3889 ring->next_to_alloc = 0;
3892 /* set descriptor configuration */
3893 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3894 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3895 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3896 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3897 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3898 E1000_SRRCTL_BSIZEPKT_SHIFT;
3899 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3900 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3901 #ifdef HAVE_PTP_1588_CLOCK
3902 if (hw->mac.type >= e1000_82580)
3903 srrctl |= E1000_SRRCTL_TIMESTAMP;
3904 #endif /* HAVE_PTP_1588_CLOCK */
3906 * We should set the drop enable bit if:
3909 * Flow Control is disabled and number of RX queues > 1
3911 * This allows us to avoid head of line blocking for security
3912 * and performance reasons.
3914 if (adapter->vfs_allocated_count ||
3915 (adapter->num_rx_queues > 1 &&
3916 (hw->fc.requested_mode == e1000_fc_none ||
3917 hw->fc.requested_mode == e1000_fc_rx_pause)))
3918 srrctl |= E1000_SRRCTL_DROP_EN;
3920 E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3922 /* set filtering for VMDQ pools */
3923 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3925 rxdctl |= IGB_RX_PTHRESH;
3926 rxdctl |= IGB_RX_HTHRESH << 8;
3927 rxdctl |= IGB_RX_WTHRESH << 16;
3929 /* enable receive descriptor fetching */
3930 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3931 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3935 * igb_configure_rx - Configure receive Unit after Reset
3936 * @adapter: board private structure
3938 * Configure the Rx unit of the MAC after a reset.
3940 static void igb_configure_rx(struct igb_adapter *adapter)
3944 /* set UTA to appropriate mode */
3945 igb_set_uta(adapter);
3947 igb_full_sync_mac_table(adapter);
3948 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3949 * the Base and Length of the Rx Descriptor Ring */
3950 for (i = 0; i < adapter->num_rx_queues; i++)
3951 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3955 * igb_free_tx_resources - Free Tx Resources per Queue
3956 * @tx_ring: Tx descriptor ring for a specific queue
3958 * Free all transmit software resources
3960 void igb_free_tx_resources(struct igb_ring *tx_ring)
3962 igb_clean_tx_ring(tx_ring);
3964 vfree(tx_ring->tx_buffer_info);
3965 tx_ring->tx_buffer_info = NULL;
3967 /* if not set, then don't free */
3971 dma_free_coherent(tx_ring->dev, tx_ring->size,
3972 tx_ring->desc, tx_ring->dma);
3974 tx_ring->desc = NULL;
3978 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3979 * @adapter: board private structure
3981 * Free all transmit software resources
3983 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3987 for (i = 0; i < adapter->num_tx_queues; i++)
3988 igb_free_tx_resources(adapter->tx_ring[i]);
3991 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3992 struct igb_tx_buffer *tx_buffer)
3994 if (tx_buffer->skb) {
3995 dev_kfree_skb_any(tx_buffer->skb);
3996 if (dma_unmap_len(tx_buffer, len))
3997 dma_unmap_single(ring->dev,
3998 dma_unmap_addr(tx_buffer, dma),
3999 dma_unmap_len(tx_buffer, len),
4001 } else if (dma_unmap_len(tx_buffer, len)) {
4002 dma_unmap_page(ring->dev,
4003 dma_unmap_addr(tx_buffer, dma),
4004 dma_unmap_len(tx_buffer, len),
4007 tx_buffer->next_to_watch = NULL;
4008 tx_buffer->skb = NULL;
4009 dma_unmap_len_set(tx_buffer, len, 0);
4010 /* buffer_info must be completely set up in the transmit path */
4014 * igb_clean_tx_ring - Free Tx Buffers
4015 * @tx_ring: ring to be cleaned
4017 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4019 struct igb_tx_buffer *buffer_info;
4023 if (!tx_ring->tx_buffer_info)
4025 /* Free all the Tx ring sk_buffs */
4027 for (i = 0; i < tx_ring->count; i++) {
4028 buffer_info = &tx_ring->tx_buffer_info[i];
4029 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4032 netdev_tx_reset_queue(txring_txq(tx_ring));
4034 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4035 memset(tx_ring->tx_buffer_info, 0, size);
4037 /* Zero out the descriptor ring */
4038 memset(tx_ring->desc, 0, tx_ring->size);
4040 tx_ring->next_to_use = 0;
4041 tx_ring->next_to_clean = 0;
4045 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4046 * @adapter: board private structure
4048 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4052 for (i = 0; i < adapter->num_tx_queues; i++)
4053 igb_clean_tx_ring(adapter->tx_ring[i]);
4057 * igb_free_rx_resources - Free Rx Resources
4058 * @rx_ring: ring to clean the resources from
4060 * Free all receive software resources
4062 void igb_free_rx_resources(struct igb_ring *rx_ring)
4064 igb_clean_rx_ring(rx_ring);
4066 vfree(rx_ring->rx_buffer_info);
4067 rx_ring->rx_buffer_info = NULL;
4069 /* if not set, then don't free */
4073 dma_free_coherent(rx_ring->dev, rx_ring->size,
4074 rx_ring->desc, rx_ring->dma);
4076 rx_ring->desc = NULL;
4080 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4081 * @adapter: board private structure
4083 * Free all receive software resources
4085 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4089 for (i = 0; i < adapter->num_rx_queues; i++)
4090 igb_free_rx_resources(adapter->rx_ring[i]);
4094 * igb_clean_rx_ring - Free Rx Buffers per Queue
4095 * @rx_ring: ring to free buffers from
4097 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4102 if (!rx_ring->rx_buffer_info)
4105 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4107 dev_kfree_skb(rx_ring->skb);
4108 rx_ring->skb = NULL;
4111 /* Free all the Rx ring sk_buffs */
4112 for (i = 0; i < rx_ring->count; i++) {
4113 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4114 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4115 if (buffer_info->dma) {
4116 dma_unmap_single(rx_ring->dev,
4118 rx_ring->rx_buffer_len,
4120 buffer_info->dma = 0;
4123 if (buffer_info->skb) {
4124 dev_kfree_skb(buffer_info->skb);
4125 buffer_info->skb = NULL;
4128 if (!buffer_info->page)
4131 dma_unmap_page(rx_ring->dev,
4135 __free_page(buffer_info->page);
4137 buffer_info->page = NULL;
4141 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4142 memset(rx_ring->rx_buffer_info, 0, size);
4144 /* Zero out the descriptor ring */
4145 memset(rx_ring->desc, 0, rx_ring->size);
4147 rx_ring->next_to_alloc = 0;
4148 rx_ring->next_to_clean = 0;
4149 rx_ring->next_to_use = 0;
4153 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4154 * @adapter: board private structure
4156 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4160 for (i = 0; i < adapter->num_rx_queues; i++)
4161 igb_clean_rx_ring(adapter->rx_ring[i]);
4165 * igb_set_mac - Change the Ethernet Address of the NIC
4166 * @netdev: network interface device structure
4167 * @p: pointer to an address structure
4169 * Returns 0 on success, negative on failure
4171 static int igb_set_mac(struct net_device *netdev, void *p)
4173 struct igb_adapter *adapter = netdev_priv(netdev);
4174 struct e1000_hw *hw = &adapter->hw;
4175 struct sockaddr *addr = p;
4177 if (!is_valid_ether_addr(addr->sa_data))
4178 return -EADDRNOTAVAIL;
4180 igb_del_mac_filter(adapter, hw->mac.addr,
4181 adapter->vfs_allocated_count);
4182 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4183 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4185 /* set the correct pool for the new PF MAC address in entry 0 */
4186 return igb_add_mac_filter(adapter, hw->mac.addr,
4187 adapter->vfs_allocated_count);
4191 * igb_write_mc_addr_list - write multicast addresses to MTA
4192 * @netdev: network interface device structure
4194 * Writes multicast address list to the MTA hash table.
4195 * Returns: -ENOMEM on failure
4196 * 0 on no addresses written
4197 * X on writing X addresses to MTA
4199 int igb_write_mc_addr_list(struct net_device *netdev)
4201 struct igb_adapter *adapter = netdev_priv(netdev);
4202 struct e1000_hw *hw = &adapter->hw;
4203 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4204 struct netdev_hw_addr *ha;
4206 struct dev_mc_list *ha;
4210 #ifdef CONFIG_IGB_VMDQ_NETDEV
4213 count = netdev_mc_count(netdev);
4214 #ifdef CONFIG_IGB_VMDQ_NETDEV
4215 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4216 if (!adapter->vmdq_netdev[vm])
4218 if (!netif_running(adapter->vmdq_netdev[vm]))
4220 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4225 e1000_update_mc_addr_list(hw, NULL, 0);
4228 mta_list = kzalloc(count * 6, GFP_ATOMIC);
4232 /* The shared function expects a packed array of only addresses. */
4234 netdev_for_each_mc_addr(ha, netdev)
4235 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4236 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4238 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4240 #ifdef CONFIG_IGB_VMDQ_NETDEV
4241 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4242 if (!adapter->vmdq_netdev[vm])
4244 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4245 !netdev_mc_count(adapter->vmdq_netdev[vm]))
4247 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4248 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4249 memcpy(mta_list + (i++ * ETH_ALEN),
4250 ha->addr, ETH_ALEN);
4252 memcpy(mta_list + (i++ * ETH_ALEN),
4253 ha->dmi_addr, ETH_ALEN);
4257 e1000_update_mc_addr_list(hw, mta_list, i);
4263 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4265 u32 rar_low, rar_high;
4266 struct e1000_hw *hw = &adapter->hw;
4267 u8 *addr = adapter->mac_table[index].addr;
4268 /* HW expects these in little endian so we reverse the byte order
4269 * from network order (big endian) to little endian
4271 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4272 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4273 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4275 /* Indicate to hardware the Address is Valid. */
4276 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4277 rar_high |= E1000_RAH_AV;
4279 if (hw->mac.type == e1000_82575)
4280 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4282 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4284 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4285 E1000_WRITE_FLUSH(hw);
4286 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4287 E1000_WRITE_FLUSH(hw);
4290 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4292 struct e1000_hw *hw = &adapter->hw;
4294 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4295 igb_rar_set(adapter, i);
4299 void igb_sync_mac_table(struct igb_adapter *adapter)
4301 struct e1000_hw *hw = &adapter->hw;
4303 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4304 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4305 igb_rar_set(adapter, i);
4306 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4310 int igb_available_rars(struct igb_adapter *adapter)
4312 struct e1000_hw *hw = &adapter->hw;
4315 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4316 if (adapter->mac_table[i].state == 0)
4322 #ifdef HAVE_SET_RX_MODE
4324 * igb_write_uc_addr_list - write unicast addresses to RAR table
4325 * @netdev: network interface device structure
4327 * Writes unicast address list to the RAR table.
4328 * Returns: -ENOMEM on failure/insufficient address space
4329 * 0 on no addresses written
4330 * X on writing X addresses to the RAR table
4332 static int igb_write_uc_addr_list(struct net_device *netdev)
4334 struct igb_adapter *adapter = netdev_priv(netdev);
4335 unsigned int vfn = adapter->vfs_allocated_count;
4338 /* return ENOMEM indicating insufficient memory for addresses */
4339 if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4341 if (!netdev_uc_empty(netdev)) {
4342 #ifdef NETDEV_HW_ADDR_T_UNICAST
4343 struct netdev_hw_addr *ha;
4345 struct dev_mc_list *ha;
4347 netdev_for_each_uc_addr(ha, netdev) {
4348 #ifdef NETDEV_HW_ADDR_T_UNICAST
4349 igb_del_mac_filter(adapter, ha->addr, vfn);
4350 igb_add_mac_filter(adapter, ha->addr, vfn);
4352 igb_del_mac_filter(adapter, ha->da_addr, vfn);
4353 igb_add_mac_filter(adapter, ha->da_addr, vfn);
4361 #endif /* HAVE_SET_RX_MODE */
4363 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4364 * @netdev: network interface device structure
4366 * The set_rx_mode entry point is called whenever the unicast or multicast
4367 * address lists or the network interface flags are updated. This routine is
4368 * responsible for configuring the hardware for proper unicast, multicast,
4369 * promiscuous mode, and all-multi behavior.
4371 static void igb_set_rx_mode(struct net_device *netdev)
4373 struct igb_adapter *adapter = netdev_priv(netdev);
4374 struct e1000_hw *hw = &adapter->hw;
4375 unsigned int vfn = adapter->vfs_allocated_count;
4376 u32 rctl, vmolr = 0;
4379 /* Check for Promiscuous and All Multicast modes */
4380 rctl = E1000_READ_REG(hw, E1000_RCTL);
4382 /* clear the effected bits */
4383 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4385 if (netdev->flags & IFF_PROMISC) {
4386 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4387 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4388 /* retain VLAN HW filtering if in VT mode */
4389 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4390 rctl |= E1000_RCTL_VFE;
4392 if (netdev->flags & IFF_ALLMULTI) {
4393 rctl |= E1000_RCTL_MPE;
4394 vmolr |= E1000_VMOLR_MPME;
4397 * Write addresses to the MTA, if the attempt fails
4398 * then we should just turn on promiscuous mode so
4399 * that we can at least receive multicast traffic
4401 count = igb_write_mc_addr_list(netdev);
4403 rctl |= E1000_RCTL_MPE;
4404 vmolr |= E1000_VMOLR_MPME;
4406 vmolr |= E1000_VMOLR_ROMPE;
4409 #ifdef HAVE_SET_RX_MODE
4411 * Write addresses to available RAR registers, if there is not
4412 * sufficient space to store all the addresses then enable
4413 * unicast promiscuous mode
4415 count = igb_write_uc_addr_list(netdev);
4417 rctl |= E1000_RCTL_UPE;
4418 vmolr |= E1000_VMOLR_ROPE;
4420 #endif /* HAVE_SET_RX_MODE */
4421 rctl |= E1000_RCTL_VFE;
4423 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4426 * In order to support SR-IOV and eventually VMDq it is necessary to set
4427 * the VMOLR to enable the appropriate modes. Without this workaround
4428 * we will have issues with VLAN tag stripping not being done for frames
4429 * that are only arriving because we are the default pool
4431 if (hw->mac.type < e1000_82576)
4434 vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4435 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4436 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4437 igb_restore_vf_multicasts(adapter);
4440 static void igb_check_wvbr(struct igb_adapter *adapter)
4442 struct e1000_hw *hw = &adapter->hw;
4445 switch (hw->mac.type) {
4448 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4455 adapter->wvbr |= wvbr;
4458 #define IGB_STAGGERED_QUEUE_OFFSET 8
4460 static void igb_spoof_check(struct igb_adapter *adapter)
4467 switch (adapter->hw.mac.type) {
4469 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4470 if (adapter->wvbr & (1 << j) ||
4471 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4472 DPRINTK(DRV, WARNING,
4473 "Spoof event(s) detected on VF %d\n", j);
4476 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4481 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4482 if (adapter->wvbr & (1 << j)) {
4483 DPRINTK(DRV, WARNING,
4484 "Spoof event(s) detected on VF %d\n", j);
4485 adapter->wvbr &= ~(1 << j);
4494 /* Need to wait a few seconds after link up to get diagnostic information from
4496 static void igb_update_phy_info(unsigned long data)
4498 struct igb_adapter *adapter = (struct igb_adapter *) data;
4499 e1000_get_phy_info(&adapter->hw);
4503 * igb_has_link - check shared code for link and determine up/down
4504 * @adapter: pointer to driver private info
4506 bool igb_has_link(struct igb_adapter *adapter)
4508 struct e1000_hw *hw = &adapter->hw;
4509 bool link_active = FALSE;
4511 /* get_link_status is set on LSC (link status) interrupt or
4512 * rx sequence error interrupt. get_link_status will stay
4513 * false until the e1000_check_for_link establishes link
4514 * for copper adapters ONLY
4516 switch (hw->phy.media_type) {
4517 case e1000_media_type_copper:
4518 if (!hw->mac.get_link_status)
4520 case e1000_media_type_internal_serdes:
4521 e1000_check_for_link(hw);
4522 link_active = !hw->mac.get_link_status;
4524 case e1000_media_type_unknown:
4529 if (((hw->mac.type == e1000_i210) ||
4530 (hw->mac.type == e1000_i211)) &&
4531 (hw->phy.id == I210_I_PHY_ID)) {
4532 if (!netif_carrier_ok(adapter->netdev)) {
4533 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4534 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4535 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4536 adapter->link_check_timeout = jiffies;
4544 * igb_watchdog - Timer Call-back
4545 * @data: pointer to adapter cast into an unsigned long
4547 static void igb_watchdog(unsigned long data)
4549 struct igb_adapter *adapter = (struct igb_adapter *)data;
4550 /* Do the rest outside of interrupt context */
4551 schedule_work(&adapter->watchdog_task);
4554 static void igb_watchdog_task(struct work_struct *work)
4556 struct igb_adapter *adapter = container_of(work,
4559 struct e1000_hw *hw = &adapter->hw;
4560 struct net_device *netdev = adapter->netdev;
4563 u32 thstat, ctrl_ext;
4566 link = igb_has_link(adapter);
4567 /* Force link down if we have fiber to swap to */
4568 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4569 if (hw->phy.media_type == e1000_media_type_copper) {
4570 connsw = E1000_READ_REG(hw, E1000_CONNSW);
4571 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4576 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4577 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4578 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4584 /* Perform a reset if the media type changed. */
4585 if (hw->dev_spec._82575.media_changed) {
4586 hw->dev_spec._82575.media_changed = false;
4587 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4591 /* Cancel scheduled suspend requests. */
4592 pm_runtime_resume(netdev->dev.parent);
4594 if (!netif_carrier_ok(netdev)) {
4596 e1000_get_speed_and_duplex(hw,
4597 &adapter->link_speed,
4598 &adapter->link_duplex);
4600 ctrl = E1000_READ_REG(hw, E1000_CTRL);
4601 /* Links status message must follow this format */
4602 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4603 "Flow Control: %s\n",
4605 adapter->link_speed,
4606 adapter->link_duplex == FULL_DUPLEX ?
4607 "Full Duplex" : "Half Duplex",
4608 ((ctrl & E1000_CTRL_TFCE) &&
4609 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4610 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4611 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
4612 /* adjust timeout factor according to speed/duplex */
4613 adapter->tx_timeout_factor = 1;
4614 switch (adapter->link_speed) {
4616 adapter->tx_timeout_factor = 14;
4619 /* maybe add some timeout factor ? */
4625 netif_carrier_on(netdev);
4626 netif_tx_wake_all_queues(netdev);
4628 igb_ping_all_vfs(adapter);
4630 igb_check_vf_rate_limit(adapter);
4631 #endif /* IFLA_VF_MAX */
4633 /* link state has changed, schedule phy info update */
4634 if (!test_bit(__IGB_DOWN, &adapter->state))
4635 mod_timer(&adapter->phy_info_timer,
4636 round_jiffies(jiffies + 2 * HZ));
4639 if (netif_carrier_ok(netdev)) {
4640 adapter->link_speed = 0;
4641 adapter->link_duplex = 0;
4642 /* check for thermal sensor event on i350 */
4643 if (hw->mac.type == e1000_i350) {
4644 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4645 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4646 if ((hw->phy.media_type ==
4647 e1000_media_type_copper) &&
4649 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4650 if (thstat & E1000_THSTAT_PWR_DOWN) {
4651 printk(KERN_ERR "igb: %s The "
4652 "network adapter was stopped "
4653 "because it overheated.\n",
4656 if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4658 "igb: %s The network "
4659 "adapter supported "
4669 /* Links status message must follow this format */
4670 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4672 netif_carrier_off(netdev);
4673 netif_tx_stop_all_queues(netdev);
4675 igb_ping_all_vfs(adapter);
4677 /* link state has changed, schedule phy info update */
4678 if (!test_bit(__IGB_DOWN, &adapter->state))
4679 mod_timer(&adapter->phy_info_timer,
4680 round_jiffies(jiffies + 2 * HZ));
4681 /* link is down, time to check for alternate media */
4682 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4683 igb_check_swap_media(adapter);
4684 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4685 schedule_work(&adapter->reset_task);
4686 /* return immediately */
4690 pm_schedule_suspend(netdev->dev.parent,
4693 /* also check for alternate media here */
4694 } else if (!netif_carrier_ok(netdev) &&
4695 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4696 hw->mac.ops.power_up_serdes(hw);
4697 igb_check_swap_media(adapter);
4698 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4699 schedule_work(&adapter->reset_task);
4700 /* return immediately */
4706 igb_update_stats(adapter);
4708 for (i = 0; i < adapter->num_tx_queues; i++) {
4709 struct igb_ring *tx_ring = adapter->tx_ring[i];
4710 if (!netif_carrier_ok(netdev)) {
4711 /* We've lost link, so the controller stops DMA,
4712 * but we've got queued Tx work that's never going
4713 * to get done, so reset controller to flush Tx.
4714 * (Do the reset outside of interrupt context). */
4715 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4716 adapter->tx_timeout_count++;
4717 schedule_work(&adapter->reset_task);
4718 /* return immediately since reset is imminent */
4723 /* Force detection of hung controller every watchdog period */
4724 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4727 /* Cause software interrupt to ensure rx ring is cleaned */
4728 if (adapter->msix_entries) {
4730 for (i = 0; i < adapter->num_q_vectors; i++)
4731 eics |= adapter->q_vector[i]->eims_value;
4732 E1000_WRITE_REG(hw, E1000_EICS, eics);
4734 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4737 igb_spoof_check(adapter);
4739 /* Reset the timer */
4740 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4741 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4742 mod_timer(&adapter->watchdog_timer,
4743 round_jiffies(jiffies + HZ));
4745 mod_timer(&adapter->watchdog_timer,
4746 round_jiffies(jiffies + 2 * HZ));
4750 static void igb_dma_err_task(struct work_struct *work)
4752 struct igb_adapter *adapter = container_of(work,
4756 struct e1000_hw *hw = &adapter->hw;
4757 struct net_device *netdev = adapter->netdev;
4761 hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4762 if (hgptc) /* If incrementing then no need for the check below */
4763 goto dma_timer_reset;
4765 * Check to see if a bad DMA write target from an errant or
4766 * malicious VF has caused a PCIe error. If so then we can
4767 * issue a VFLR to the offending VF(s) and then resume without
4768 * requesting a full slot reset.
4771 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4772 ciaa = (vf << 16) | 0x80000000;
4773 /* 32 bit read so align, we really want status at offset 6 */
4774 ciaa |= PCI_COMMAND;
4775 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4776 ciad = E1000_READ_REG(hw, E1000_CIAD);
4778 /* disable debug mode asap after reading data */
4779 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4780 /* Get the upper 16 bits which will be the PCI status reg */
4782 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4783 PCI_STATUS_REC_TARGET_ABORT |
4784 PCI_STATUS_SIG_SYSTEM_ERROR)) {
4785 netdev_err(netdev, "VF %d suffered error\n", vf);
4787 ciaa = (vf << 16) | 0x80000000;
4789 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4790 ciad = 0x00008000; /* VFLR */
4791 E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4793 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4797 /* Reset the timer */
4798 if (!test_bit(__IGB_DOWN, &adapter->state))
4799 mod_timer(&adapter->dma_err_timer,
4800 round_jiffies(jiffies + HZ / 10));
4804 * igb_dma_err_timer - Timer Call-back
4805 * @data: pointer to adapter cast into an unsigned long
4807 static void igb_dma_err_timer(unsigned long data)
4809 struct igb_adapter *adapter = (struct igb_adapter *)data;
4810 /* Do the rest outside of interrupt context */
4811 schedule_work(&adapter->dma_err_task);
4814 enum latency_range {
4818 latency_invalid = 255
4822 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4824 * Stores a new ITR value based on strictly on packet size. This
4825 * algorithm is less sophisticated than that used in igb_update_itr,
4826 * due to the difficulty of synchronizing statistics across multiple
4827 * receive rings. The divisors and thresholds used by this function
4828 * were determined based on theoretical maximum wire speed and testing
4829 * data, in order to minimize response time while increasing bulk
4831 * This functionality is controlled by the InterruptThrottleRate module
4832 * parameter (see igb_param.c)
4833 * NOTE: This function is called only when operating in a multiqueue
4834 * receive environment.
4835 * @q_vector: pointer to q_vector
4837 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4839 int new_val = q_vector->itr_val;
4840 int avg_wire_size = 0;
4841 struct igb_adapter *adapter = q_vector->adapter;
4842 unsigned int packets;
4844 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4845 * ints/sec - ITR timer value of 120 ticks.
4847 switch (adapter->link_speed) {
4850 new_val = IGB_4K_ITR;
4856 packets = q_vector->rx.total_packets;
4858 avg_wire_size = q_vector->rx.total_bytes / packets;
4860 packets = q_vector->tx.total_packets;
4862 avg_wire_size = max_t(u32, avg_wire_size,
4863 q_vector->tx.total_bytes / packets);
4865 /* if avg_wire_size isn't set no work was done */
4869 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4870 avg_wire_size += 24;
4872 /* Don't starve jumbo frames */
4873 avg_wire_size = min(avg_wire_size, 3000);
4875 /* Give a little boost to mid-size frames */
4876 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4877 new_val = avg_wire_size / 3;
4879 new_val = avg_wire_size / 2;
4881 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4882 if (new_val < IGB_20K_ITR &&
4883 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4884 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4885 new_val = IGB_20K_ITR;
4888 if (new_val != q_vector->itr_val) {
4889 q_vector->itr_val = new_val;
4890 q_vector->set_itr = 1;
4893 q_vector->rx.total_bytes = 0;
4894 q_vector->rx.total_packets = 0;
4895 q_vector->tx.total_bytes = 0;
4896 q_vector->tx.total_packets = 0;
4900 * igb_update_itr - update the dynamic ITR value based on statistics
4901 * Stores a new ITR value based on packets and byte
4902 * counts during the last interrupt. The advantage of per interrupt
4903 * computation is faster updates and more accurate ITR for the current
4904 * traffic pattern. Constants in this function were computed
4905 * based on theoretical maximum wire speed and thresholds were set based
4906 * on testing data as well as attempting to minimize response time
4907 * while increasing bulk throughput.
4908 * this functionality is controlled by the InterruptThrottleRate module
4909 * parameter (see igb_param.c)
4910 * NOTE: These calculations are only valid when operating in a single-
4911 * queue environment.
4912 * @q_vector: pointer to q_vector
4913 * @ring_container: ring info to update the itr for
4915 static void igb_update_itr(struct igb_q_vector *q_vector,
4916 struct igb_ring_container *ring_container)
4918 unsigned int packets = ring_container->total_packets;
4919 unsigned int bytes = ring_container->total_bytes;
4920 u8 itrval = ring_container->itr;
4922 /* no packets, exit with status unchanged */
4927 case lowest_latency:
4928 /* handle TSO and jumbo frames */
4929 if (bytes/packets > 8000)
4930 itrval = bulk_latency;
4931 else if ((packets < 5) && (bytes > 512))
4932 itrval = low_latency;
4934 case low_latency: /* 50 usec aka 20000 ints/s */
4935 if (bytes > 10000) {
4936 /* this if handles the TSO accounting */
4937 if (bytes/packets > 8000) {
4938 itrval = bulk_latency;
4939 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4940 itrval = bulk_latency;
4941 } else if ((packets > 35)) {
4942 itrval = lowest_latency;
4944 } else if (bytes/packets > 2000) {
4945 itrval = bulk_latency;
4946 } else if (packets <= 2 && bytes < 512) {
4947 itrval = lowest_latency;
4950 case bulk_latency: /* 250 usec aka 4000 ints/s */
4951 if (bytes > 25000) {
4953 itrval = low_latency;
4954 } else if (bytes < 1500) {
4955 itrval = low_latency;
4960 /* clear work counters since we have the values we need */
4961 ring_container->total_bytes = 0;
4962 ring_container->total_packets = 0;
4964 /* write updated itr to ring container */
4965 ring_container->itr = itrval;
4968 static void igb_set_itr(struct igb_q_vector *q_vector)
4970 struct igb_adapter *adapter = q_vector->adapter;
4971 u32 new_itr = q_vector->itr_val;
4974 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4975 switch (adapter->link_speed) {
4979 new_itr = IGB_4K_ITR;
4985 igb_update_itr(q_vector, &q_vector->tx);
4986 igb_update_itr(q_vector, &q_vector->rx);
4988 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4990 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4991 if (current_itr == lowest_latency &&
4992 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4993 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4994 current_itr = low_latency;
4996 switch (current_itr) {
4997 /* counts and packets in update_itr are dependent on these numbers */
4998 case lowest_latency:
4999 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5002 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5005 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5012 if (new_itr != q_vector->itr_val) {
5013 /* this attempts to bias the interrupt rate towards Bulk
5014 * by adding intermediate steps when interrupt rate is
5016 new_itr = new_itr > q_vector->itr_val ?
5017 max((new_itr * q_vector->itr_val) /
5018 (new_itr + (q_vector->itr_val >> 2)),
5021 /* Don't write the value here; it resets the adapter's
5022 * internal timer, and causes us to delay far longer than
5023 * we should between interrupts. Instead, we write the ITR
5024 * value at the beginning of the next interrupt so the timing
5025 * ends up being correct.
5027 q_vector->itr_val = new_itr;
5028 q_vector->set_itr = 1;
5032 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5033 u32 type_tucmd, u32 mss_l4len_idx)
5035 struct e1000_adv_tx_context_desc *context_desc;
5036 u16 i = tx_ring->next_to_use;
5038 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5041 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5043 /* set bits to identify this as an advanced context descriptor */
5044 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5046 /* For 82575, context index must be unique per ring. */
5047 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5048 mss_l4len_idx |= tx_ring->reg_idx << 4;
5050 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5051 context_desc->seqnum_seed = 0;
5052 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5053 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5056 static int igb_tso(struct igb_ring *tx_ring,
5057 struct igb_tx_buffer *first,
5061 struct sk_buff *skb = first->skb;
5062 u32 vlan_macip_lens, type_tucmd;
5063 u32 mss_l4len_idx, l4len;
5065 if (skb->ip_summed != CHECKSUM_PARTIAL)
5068 if (!skb_is_gso(skb))
5069 #endif /* NETIF_F_TSO */
5073 if (skb_header_cloned(skb)) {
5074 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5079 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5080 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5082 if (first->protocol == __constant_htons(ETH_P_IP)) {
5083 struct iphdr *iph = ip_hdr(skb);
5086 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5090 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5091 first->tx_flags |= IGB_TX_FLAGS_TSO |
5095 } else if (skb_is_gso_v6(skb)) {
5096 ipv6_hdr(skb)->payload_len = 0;
5097 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5098 &ipv6_hdr(skb)->daddr,
5100 first->tx_flags |= IGB_TX_FLAGS_TSO |
5105 /* compute header lengths */
5106 l4len = tcp_hdrlen(skb);
5107 *hdr_len = skb_transport_offset(skb) + l4len;
5109 /* update gso size and bytecount with header size */
5110 first->gso_segs = skb_shinfo(skb)->gso_segs;
5111 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5114 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5115 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5117 /* VLAN MACLEN IPLEN */
5118 vlan_macip_lens = skb_network_header_len(skb);
5119 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5120 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5122 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5125 #endif /* NETIF_F_TSO */
5128 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5130 struct sk_buff *skb = first->skb;
5131 u32 vlan_macip_lens = 0;
5132 u32 mss_l4len_idx = 0;
5135 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5136 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5140 switch (first->protocol) {
5141 case __constant_htons(ETH_P_IP):
5142 vlan_macip_lens |= skb_network_header_len(skb);
5143 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5144 nexthdr = ip_hdr(skb)->protocol;
5146 #ifdef NETIF_F_IPV6_CSUM
5147 case __constant_htons(ETH_P_IPV6):
5148 vlan_macip_lens |= skb_network_header_len(skb);
5149 nexthdr = ipv6_hdr(skb)->nexthdr;
5153 if (unlikely(net_ratelimit())) {
5154 dev_warn(tx_ring->dev,
5155 "partial checksum but proto=%x!\n",
5163 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5164 mss_l4len_idx = tcp_hdrlen(skb) <<
5165 E1000_ADVTXD_L4LEN_SHIFT;
5169 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5170 mss_l4len_idx = sizeof(struct sctphdr) <<
5171 E1000_ADVTXD_L4LEN_SHIFT;
5175 mss_l4len_idx = sizeof(struct udphdr) <<
5176 E1000_ADVTXD_L4LEN_SHIFT;
5179 if (unlikely(net_ratelimit())) {
5180 dev_warn(tx_ring->dev,
5181 "partial checksum but l4 proto=%x!\n",
5187 /* update TX checksum flag */
5188 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5191 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5192 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5194 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5197 #define IGB_SET_FLAG(_input, _flag, _result) \
5198 ((_flag <= _result) ? \
5199 ((u32)(_input & _flag) * (_result / _flag)) : \
5200 ((u32)(_input & _flag) / (_flag / _result)))
5202 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5204 /* set type for advanced descriptor with frame checksum insertion */
5205 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5206 E1000_ADVTXD_DCMD_DEXT |
5207 E1000_ADVTXD_DCMD_IFCS;
5209 /* set HW vlan bit if vlan is present */
5210 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5211 (E1000_ADVTXD_DCMD_VLE));
5213 /* set segmentation bits for TSO */
5214 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5215 (E1000_ADVTXD_DCMD_TSE));
5217 /* set timestamp bit if present */
5218 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5219 (E1000_ADVTXD_MAC_TSTAMP));
5224 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5225 union e1000_adv_tx_desc *tx_desc,
5226 u32 tx_flags, unsigned int paylen)
5228 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5230 /* 82575 requires a unique index per ring */
5231 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5232 olinfo_status |= tx_ring->reg_idx << 4;
5234 /* insert L4 checksum */
5235 olinfo_status |= IGB_SET_FLAG(tx_flags,
5237 (E1000_TXD_POPTS_TXSM << 8));
5239 /* insert IPv4 checksum */
5240 olinfo_status |= IGB_SET_FLAG(tx_flags,
5242 (E1000_TXD_POPTS_IXSM << 8));
5244 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5247 static void igb_tx_map(struct igb_ring *tx_ring,
5248 struct igb_tx_buffer *first,
5251 struct sk_buff *skb = first->skb;
5252 struct igb_tx_buffer *tx_buffer;
5253 union e1000_adv_tx_desc *tx_desc;
5254 struct skb_frag_struct *frag;
5256 unsigned int data_len, size;
5257 u32 tx_flags = first->tx_flags;
5258 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5259 u16 i = tx_ring->next_to_use;
5261 tx_desc = IGB_TX_DESC(tx_ring, i);
5263 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5265 size = skb_headlen(skb);
5266 data_len = skb->data_len;
5268 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5272 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5273 if (dma_mapping_error(tx_ring->dev, dma))
5276 /* record length, and DMA address */
5277 dma_unmap_len_set(tx_buffer, len, size);
5278 dma_unmap_addr_set(tx_buffer, dma, dma);
5280 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5282 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5283 tx_desc->read.cmd_type_len =
5284 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5288 if (i == tx_ring->count) {
5289 tx_desc = IGB_TX_DESC(tx_ring, 0);
5292 tx_desc->read.olinfo_status = 0;
5294 dma += IGB_MAX_DATA_PER_TXD;
5295 size -= IGB_MAX_DATA_PER_TXD;
5297 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5300 if (likely(!data_len))
5303 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5307 if (i == tx_ring->count) {
5308 tx_desc = IGB_TX_DESC(tx_ring, 0);
5311 tx_desc->read.olinfo_status = 0;
5313 size = skb_frag_size(frag);
5316 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5317 size, DMA_TO_DEVICE);
5319 tx_buffer = &tx_ring->tx_buffer_info[i];
5322 /* write last descriptor with RS and EOP bits */
5323 cmd_type |= size | IGB_TXD_DCMD;
5324 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5326 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5327 /* set the timestamp */
5328 first->time_stamp = jiffies;
5331 * Force memory writes to complete before letting h/w know there
5332 * are new descriptors to fetch. (Only applicable for weak-ordered
5333 * memory model archs, such as IA-64).
5335 * We also need this memory barrier to make certain all of the
5336 * status bits have been updated before next_to_watch is written.
5340 /* set next_to_watch value indicating a packet is present */
5341 first->next_to_watch = tx_desc;
5344 if (i == tx_ring->count)
5347 tx_ring->next_to_use = i;
5349 writel(i, tx_ring->tail);
5351 /* we need this if more than one processor can write to our tail
5352 * at a time, it syncronizes IO on IA64/Altix systems */
5358 dev_err(tx_ring->dev, "TX DMA map failed\n");
5360 /* clear dma mappings for failed tx_buffer_info map */
5362 tx_buffer = &tx_ring->tx_buffer_info[i];
5363 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5364 if (tx_buffer == first)
5371 tx_ring->next_to_use = i;
5374 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5376 struct net_device *netdev = netdev_ring(tx_ring);
5378 if (netif_is_multiqueue(netdev))
5379 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5381 netif_stop_queue(netdev);
5383 /* Herbert's original patch had:
5384 * smp_mb__after_netif_stop_queue();
5385 * but since that doesn't exist yet, just open code it. */
5388 /* We need to check again in a case another CPU has just
5389 * made room available. */
5390 if (igb_desc_unused(tx_ring) < size)
5394 if (netif_is_multiqueue(netdev))
5395 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5397 netif_wake_queue(netdev);
5399 tx_ring->tx_stats.restart_queue++;
5404 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5406 if (igb_desc_unused(tx_ring) >= size)
5408 return __igb_maybe_stop_tx(tx_ring, size);
5411 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5412 struct igb_ring *tx_ring)
5414 struct igb_tx_buffer *first;
5417 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5420 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5421 __be16 protocol = vlan_get_protocol(skb);
5425 * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5426 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5427 * + 2 desc gap to keep tail from touching head,
5428 * + 1 desc for context descriptor,
5429 * otherwise try next time
5431 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5432 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5433 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5435 count += skb_shinfo(skb)->nr_frags;
5437 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5438 /* this is a hard error */
5439 return NETDEV_TX_BUSY;
5442 /* record the location of the first descriptor for this packet */
5443 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5445 first->bytecount = skb->len;
5446 first->gso_segs = 1;
5448 skb_tx_timestamp(skb);
5450 #ifdef HAVE_PTP_1588_CLOCK
5451 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5452 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5453 if (!adapter->ptp_tx_skb) {
5454 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5455 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5457 adapter->ptp_tx_skb = skb_get(skb);
5458 adapter->ptp_tx_start = jiffies;
5459 if (adapter->hw.mac.type == e1000_82576)
5460 schedule_work(&adapter->ptp_tx_work);
5463 #endif /* HAVE_PTP_1588_CLOCK */
5465 if (vlan_tx_tag_present(skb)) {
5466 tx_flags |= IGB_TX_FLAGS_VLAN;
5467 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5470 /* record initial flags and protocol */
5471 first->tx_flags = tx_flags;
5472 first->protocol = protocol;
5474 tso = igb_tso(tx_ring, first, &hdr_len);
5478 igb_tx_csum(tx_ring, first);
5480 igb_tx_map(tx_ring, first, hdr_len);
5482 #ifndef HAVE_TRANS_START_IN_QUEUE
5483 netdev_ring(tx_ring)->trans_start = jiffies;
5486 /* Make sure there is space in the ring for the next send. */
5487 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5489 return NETDEV_TX_OK;
5492 igb_unmap_and_free_tx_resource(tx_ring, first);
5494 return NETDEV_TX_OK;
5498 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5499 struct sk_buff *skb)
5501 unsigned int r_idx = skb->queue_mapping;
5503 if (r_idx >= adapter->num_tx_queues)
5504 r_idx = r_idx % adapter->num_tx_queues;
5506 return adapter->tx_ring[r_idx];
5509 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5512 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5513 struct net_device *netdev)
5515 struct igb_adapter *adapter = netdev_priv(netdev);
5517 if (test_bit(__IGB_DOWN, &adapter->state)) {
5518 dev_kfree_skb_any(skb);
5519 return NETDEV_TX_OK;
5522 if (skb->len <= 0) {
5523 dev_kfree_skb_any(skb);
5524 return NETDEV_TX_OK;
5528 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5529 * in order to meet this minimum size requirement.
5531 if (skb->len < 17) {
5532 if (skb_padto(skb, 17))
5533 return NETDEV_TX_OK;
5537 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5541 * igb_tx_timeout - Respond to a Tx Hang
5542 * @netdev: network interface device structure
5544 static void igb_tx_timeout(struct net_device *netdev)
5546 struct igb_adapter *adapter = netdev_priv(netdev);
5547 struct e1000_hw *hw = &adapter->hw;
5549 /* Do the reset outside of interrupt context */
5550 adapter->tx_timeout_count++;
5552 if (hw->mac.type >= e1000_82580)
5553 hw->dev_spec._82575.global_device_reset = true;
5555 schedule_work(&adapter->reset_task);
5556 E1000_WRITE_REG(hw, E1000_EICS,
5557 (adapter->eims_enable_mask & ~adapter->eims_other));
5560 static void igb_reset_task(struct work_struct *work)
5562 struct igb_adapter *adapter;
5563 adapter = container_of(work, struct igb_adapter, reset_task);
5565 igb_reinit_locked(adapter);
5569 * igb_get_stats - Get System Network Statistics
5570 * @netdev: network interface device structure
5572 * Returns the address of the device statistics structure.
5573 * The statistics are updated here and also from the timer callback.
5575 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5577 struct igb_adapter *adapter = netdev_priv(netdev);
5579 if (!test_bit(__IGB_RESETTING, &adapter->state))
5580 igb_update_stats(adapter);
5582 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5583 /* only return the current stats */
5584 return &netdev->stats;
5586 /* only return the current stats */
5587 return &adapter->net_stats;
5588 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5592 * igb_change_mtu - Change the Maximum Transfer Unit
5593 * @netdev: network interface device structure
5594 * @new_mtu: new value for maximum frame size
5596 * Returns 0 on success, negative on failure
5598 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5600 struct igb_adapter *adapter = netdev_priv(netdev);
5601 struct e1000_hw *hw = &adapter->hw;
5602 struct pci_dev *pdev = adapter->pdev;
5603 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5605 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5606 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5610 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5611 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5612 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5616 /* adjust max frame to be at least the size of a standard frame */
5617 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5618 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5620 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5621 usleep_range(1000, 2000);
5623 /* igb_down has a dependency on max_frame_size */
5624 adapter->max_frame_size = max_frame;
5626 if (netif_running(netdev))
5629 dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5630 netdev->mtu, new_mtu);
5631 netdev->mtu = new_mtu;
5632 hw->dev_spec._82575.mtu = new_mtu;
5634 if (netif_running(netdev))
5639 clear_bit(__IGB_RESETTING, &adapter->state);
5645 * igb_update_stats - Update the board statistics counters
5646 * @adapter: board private structure
5649 void igb_update_stats(struct igb_adapter *adapter)
5651 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5652 struct net_device_stats *net_stats = &adapter->netdev->stats;
5654 struct net_device_stats *net_stats = &adapter->net_stats;
5655 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5656 struct e1000_hw *hw = &adapter->hw;
5658 struct pci_dev *pdev = adapter->pdev;
5665 u32 flushed = 0, coal = 0;
5666 struct igb_q_vector *q_vector;
5669 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5672 * Prevent stats update while adapter is being reset, or if the pci
5673 * connection is down.
5675 if (adapter->link_speed == 0)
5678 if (pci_channel_offline(pdev))
5683 for (i = 0; i < adapter->num_q_vectors; i++) {
5684 q_vector = adapter->q_vector[i];
5687 flushed += q_vector->lrolist.stats.flushed;
5688 coal += q_vector->lrolist.stats.coal;
5690 adapter->lro_stats.flushed = flushed;
5691 adapter->lro_stats.coal = coal;
5696 for (i = 0; i < adapter->num_rx_queues; i++) {
5697 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5698 struct igb_ring *ring = adapter->rx_ring[i];
5699 ring->rx_stats.drops += rqdpc_tmp;
5700 net_stats->rx_fifo_errors += rqdpc_tmp;
5701 #ifdef CONFIG_IGB_VMDQ_NETDEV
5702 if (!ring->vmdq_netdev) {
5703 bytes += ring->rx_stats.bytes;
5704 packets += ring->rx_stats.packets;
5707 bytes += ring->rx_stats.bytes;
5708 packets += ring->rx_stats.packets;
5712 net_stats->rx_bytes = bytes;
5713 net_stats->rx_packets = packets;
5717 for (i = 0; i < adapter->num_tx_queues; i++) {
5718 struct igb_ring *ring = adapter->tx_ring[i];
5719 #ifdef CONFIG_IGB_VMDQ_NETDEV
5720 if (!ring->vmdq_netdev) {
5721 bytes += ring->tx_stats.bytes;
5722 packets += ring->tx_stats.packets;
5725 bytes += ring->tx_stats.bytes;
5726 packets += ring->tx_stats.packets;
5729 net_stats->tx_bytes = bytes;
5730 net_stats->tx_packets = packets;
5732 /* read stats registers */
5733 adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5734 adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5735 adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5736 E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5737 adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5738 adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5739 adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5741 adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5742 adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5743 adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5744 adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5745 adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5746 adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5747 adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5748 adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5750 mpc = E1000_READ_REG(hw, E1000_MPC);
5751 adapter->stats.mpc += mpc;
5752 net_stats->rx_fifo_errors += mpc;
5753 adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5754 adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5755 adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5756 adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5757 adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5758 adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5759 adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5760 adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5761 adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5762 adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5763 adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5764 adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5765 adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5766 E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5767 adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5768 adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5769 adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5770 adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5771 adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5772 adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5773 adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5775 adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5776 adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5777 adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5778 adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5779 adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5780 adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5782 adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5783 adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5785 adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5786 adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5788 adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5789 /* read internal phy sepecific stats */
5790 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5791 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5792 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5794 /* this stat has invalid values on i210/i211 */
5795 if ((hw->mac.type != e1000_i210) &&
5796 (hw->mac.type != e1000_i211))
5797 adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5799 adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5800 adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5802 adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5803 adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5804 adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5805 adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5806 adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5807 adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5808 adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5809 adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5810 adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5812 /* Fill out the OS statistics structure */
5813 net_stats->multicast = adapter->stats.mprc;
5814 net_stats->collisions = adapter->stats.colc;
5818 /* RLEC on some newer hardware can be incorrect so build
5819 * our own version based on RUC and ROC */
5820 net_stats->rx_errors = adapter->stats.rxerrc +
5821 adapter->stats.crcerrs + adapter->stats.algnerrc +
5822 adapter->stats.ruc + adapter->stats.roc +
5823 adapter->stats.cexterr;
5824 net_stats->rx_length_errors = adapter->stats.ruc +
5826 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5827 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5828 net_stats->rx_missed_errors = adapter->stats.mpc;
5831 net_stats->tx_errors = adapter->stats.ecol +
5832 adapter->stats.latecol;
5833 net_stats->tx_aborted_errors = adapter->stats.ecol;
5834 net_stats->tx_window_errors = adapter->stats.latecol;
5835 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5837 /* Tx Dropped needs to be maintained elsewhere */
5840 if (hw->phy.media_type == e1000_media_type_copper) {
5841 if ((adapter->link_speed == SPEED_1000) &&
5842 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5843 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5844 adapter->phy_stats.idle_errors += phy_tmp;
5848 /* Management Stats */
5849 adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5850 adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5851 if (hw->mac.type > e1000_82580) {
5852 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5853 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5854 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5855 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5859 static irqreturn_t igb_msix_other(int irq, void *data)
5861 struct igb_adapter *adapter = data;
5862 struct e1000_hw *hw = &adapter->hw;
5863 u32 icr = E1000_READ_REG(hw, E1000_ICR);
5864 /* reading ICR causes bit 31 of EICR to be cleared */
5866 if (icr & E1000_ICR_DRSTA)
5867 schedule_work(&adapter->reset_task);
5869 if (icr & E1000_ICR_DOUTSYNC) {
5870 /* HW is reporting DMA is out of sync */
5871 adapter->stats.doosync++;
5872 /* The DMA Out of Sync is also indication of a spoof event
5873 * in IOV mode. Check the Wrong VM Behavior register to
5874 * see if it is really a spoof event. */
5875 igb_check_wvbr(adapter);
5878 /* Check for a mailbox event */
5879 if (icr & E1000_ICR_VMMB)
5880 igb_msg_task(adapter);
5882 if (icr & E1000_ICR_LSC) {
5883 hw->mac.get_link_status = 1;
5884 /* guard against interrupt when we're going down */
5885 if (!test_bit(__IGB_DOWN, &adapter->state))
5886 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5889 #ifdef HAVE_PTP_1588_CLOCK
5890 if (icr & E1000_ICR_TS) {
5891 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5893 if (tsicr & E1000_TSICR_TXTS) {
5894 /* acknowledge the interrupt */
5895 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5896 /* retrieve hardware timestamp */
5897 schedule_work(&adapter->ptp_tx_work);
5900 #endif /* HAVE_PTP_1588_CLOCK */
5902 /* Check for MDD event */
5903 if (icr & E1000_ICR_MDDET)
5904 igb_process_mdd_event(adapter);
5906 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5911 static void igb_write_itr(struct igb_q_vector *q_vector)
5913 struct igb_adapter *adapter = q_vector->adapter;
5914 u32 itr_val = q_vector->itr_val & 0x7FFC;
5916 if (!q_vector->set_itr)
5922 if (adapter->hw.mac.type == e1000_82575)
5923 itr_val |= itr_val << 16;
5925 itr_val |= E1000_EITR_CNT_IGNR;
5927 writel(itr_val, q_vector->itr_register);
5928 q_vector->set_itr = 0;
5931 static irqreturn_t igb_msix_ring(int irq, void *data)
5933 struct igb_q_vector *q_vector = data;
5935 /* Write the ITR value calculated from the previous interrupt. */
5936 igb_write_itr(q_vector);
5938 napi_schedule(&q_vector->napi);
5944 static void igb_update_tx_dca(struct igb_adapter *adapter,
5945 struct igb_ring *tx_ring,
5948 struct e1000_hw *hw = &adapter->hw;
5949 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5951 if (hw->mac.type != e1000_82575)
5952 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5955 * We can enable relaxed ordering for reads, but not writes when
5956 * DCA is enabled. This is due to a known issue in some chipsets
5957 * which will cause the DCA tag to be cleared.
5959 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5960 E1000_DCA_TXCTRL_DATA_RRO_EN |
5961 E1000_DCA_TXCTRL_DESC_DCA_EN;
5963 E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5966 static void igb_update_rx_dca(struct igb_adapter *adapter,
5967 struct igb_ring *rx_ring,
5970 struct e1000_hw *hw = &adapter->hw;
5971 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5973 if (hw->mac.type != e1000_82575)
5974 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
5977 * We can enable relaxed ordering for reads, but not writes when
5978 * DCA is enabled. This is due to a known issue in some chipsets
5979 * which will cause the DCA tag to be cleared.
5981 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5982 E1000_DCA_RXCTRL_DESC_DCA_EN;
5984 E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5987 static void igb_update_dca(struct igb_q_vector *q_vector)
5989 struct igb_adapter *adapter = q_vector->adapter;
5990 int cpu = get_cpu();
5992 if (q_vector->cpu == cpu)
5995 if (q_vector->tx.ring)
5996 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5998 if (q_vector->rx.ring)
5999 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6001 q_vector->cpu = cpu;
6006 static void igb_setup_dca(struct igb_adapter *adapter)
6008 struct e1000_hw *hw = &adapter->hw;
6011 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6014 /* Always use CB2 mode, difference is masked in the CB driver. */
6015 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6017 for (i = 0; i < adapter->num_q_vectors; i++) {
6018 adapter->q_vector[i]->cpu = -1;
6019 igb_update_dca(adapter->q_vector[i]);
6023 static int __igb_notify_dca(struct device *dev, void *data)
6025 struct net_device *netdev = dev_get_drvdata(dev);
6026 struct igb_adapter *adapter = netdev_priv(netdev);
6027 struct pci_dev *pdev = adapter->pdev;
6028 struct e1000_hw *hw = &adapter->hw;
6029 unsigned long event = *(unsigned long *)data;
6032 case DCA_PROVIDER_ADD:
6033 /* if already enabled, don't do it again */
6034 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6036 if (dca_add_requester(dev) == E1000_SUCCESS) {
6037 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6038 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6039 igb_setup_dca(adapter);
6042 /* Fall Through since DCA is disabled. */
6043 case DCA_PROVIDER_REMOVE:
6044 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6045 /* without this a class_device is left
6046 * hanging around in the sysfs model */
6047 dca_remove_requester(dev);
6048 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6049 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6050 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6055 return E1000_SUCCESS;
6058 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6063 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6066 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6068 #endif /* IGB_DCA */
6070 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6072 unsigned char mac_addr[ETH_ALEN];
6074 random_ether_addr(mac_addr);
6075 igb_set_vf_mac(adapter, vf, mac_addr);
6078 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6079 /* By default spoof check is enabled for all VFs */
6080 adapter->vf_data[vf].spoofchk_enabled = true;
6087 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6089 struct e1000_hw *hw = &adapter->hw;
6093 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6094 ping = E1000_PF_CONTROL_MSG;
6095 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6096 ping |= E1000_VT_MSGTYPE_CTS;
6097 e1000_write_mbx(hw, &ping, 1, i);
6102 * igb_mta_set_ - Set multicast filter table address
6103 * @adapter: pointer to the adapter structure
6104 * @hash_value: determines the MTA register and bit to set
6106 * The multicast table address is a register array of 32-bit registers.
6107 * The hash_value is used to determine what register the bit is in, the
6108 * current value is read, the new bit is OR'd in and the new value is
6109 * written back into the register.
6111 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6113 struct e1000_hw *hw = &adapter->hw;
6114 u32 hash_bit, hash_reg, mta;
6117 * The MTA is a register array of 32-bit registers. It is
6118 * treated like an array of (32*mta_reg_count) bits. We want to
6119 * set bit BitArray[hash_value]. So we figure out what register
6120 * the bit is in, read it, OR in the new bit, then write
6121 * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
6122 * mask to bits 31:5 of the hash value which gives us the
6123 * register we're modifying. The hash bit within that register
6124 * is determined by the lower 5 bits of the hash value.
6126 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6127 hash_bit = hash_value & 0x1F;
6129 mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6131 mta |= (1 << hash_bit);
6133 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6134 E1000_WRITE_FLUSH(hw);
6137 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6140 struct e1000_hw *hw = &adapter->hw;
6141 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6142 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6144 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6145 IGB_VF_FLAG_MULTI_PROMISC);
6146 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6148 #ifdef IGB_ENABLE_VF_PROMISC
6149 if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6150 vmolr |= E1000_VMOLR_ROPE;
6151 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6152 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6155 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6156 vmolr |= E1000_VMOLR_MPME;
6157 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6158 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6161 * if we have hashes and we are clearing a multicast promisc
6162 * flag we need to write the hashes to the MTA as this step
6163 * was previously skipped
6165 if (vf_data->num_vf_mc_hashes > 30) {
6166 vmolr |= E1000_VMOLR_MPME;
6167 } else if (vf_data->num_vf_mc_hashes) {
6169 vmolr |= E1000_VMOLR_ROMPE;
6170 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6171 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6175 E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6177 /* there are flags left unprocessed, likely not supported */
6178 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6185 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6186 u32 *msgbuf, u32 vf)
6188 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6189 u16 *hash_list = (u16 *)&msgbuf[1];
6190 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6193 /* salt away the number of multicast addresses assigned
6194 * to this VF for later use to restore when the PF multi cast
6197 vf_data->num_vf_mc_hashes = n;
6199 /* only up to 30 hash values supported */
6203 /* store the hashes for later use */
6204 for (i = 0; i < n; i++)
6205 vf_data->vf_mc_hashes[i] = hash_list[i];
6207 /* Flush and reset the mta with the new values */
6208 igb_set_rx_mode(adapter->netdev);
6213 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6215 struct e1000_hw *hw = &adapter->hw;
6216 struct vf_data_storage *vf_data;
6219 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6220 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6221 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6223 vf_data = &adapter->vf_data[i];
6225 if ((vf_data->num_vf_mc_hashes > 30) ||
6226 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6227 vmolr |= E1000_VMOLR_MPME;
6228 } else if (vf_data->num_vf_mc_hashes) {
6229 vmolr |= E1000_VMOLR_ROMPE;
6230 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6231 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6233 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6237 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6239 struct e1000_hw *hw = &adapter->hw;
6240 u32 pool_mask, reg, vid;
6244 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6246 /* Find the vlan filter for this id */
6247 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6248 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6250 /* remove the vf from the pool */
6253 /* if pool is empty then remove entry from vfta */
6254 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6255 (reg & E1000_VLVF_VLANID_ENABLE)) {
6257 vid = reg & E1000_VLVF_VLANID_MASK;
6258 igb_vfta_set(adapter, vid, FALSE);
6261 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6264 adapter->vf_data[vf].vlans_enabled = 0;
6266 vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6268 igb_vlvf_set(adapter, vlan_default, true, vf);
6271 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6273 struct e1000_hw *hw = &adapter->hw;
6276 /* The vlvf table only exists on 82576 hardware and newer */
6277 if (hw->mac.type < e1000_82576)
6280 /* we only need to do this if VMDq is enabled */
6281 if (!adapter->vmdq_pools)
6284 /* Find the vlan filter for this id */
6285 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6286 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6287 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6288 vid == (reg & E1000_VLVF_VLANID_MASK))
6293 if (i == E1000_VLVF_ARRAY_SIZE) {
6294 /* Did not find a matching VLAN ID entry that was
6295 * enabled. Search for a free filter entry, i.e.
6296 * one without the enable bit set
6298 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6299 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6300 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6304 if (i < E1000_VLVF_ARRAY_SIZE) {
6305 /* Found an enabled/available entry */
6306 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6308 /* if !enabled we need to set this up in vfta */
6309 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6310 /* add VID to filter table */
6311 igb_vfta_set(adapter, vid, TRUE);
6312 reg |= E1000_VLVF_VLANID_ENABLE;
6314 reg &= ~E1000_VLVF_VLANID_MASK;
6316 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6318 /* do not modify RLPML for PF devices */
6319 if (vf >= adapter->vfs_allocated_count)
6320 return E1000_SUCCESS;
6322 if (!adapter->vf_data[vf].vlans_enabled) {
6324 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6325 size = reg & E1000_VMOLR_RLPML_MASK;
6327 reg &= ~E1000_VMOLR_RLPML_MASK;
6329 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6332 adapter->vf_data[vf].vlans_enabled++;
6335 if (i < E1000_VLVF_ARRAY_SIZE) {
6336 /* remove vf from the pool */
6337 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6338 /* if pool is empty then remove entry from vfta */
6339 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6341 igb_vfta_set(adapter, vid, FALSE);
6343 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6345 /* do not modify RLPML for PF devices */
6346 if (vf >= adapter->vfs_allocated_count)
6347 return E1000_SUCCESS;
6349 adapter->vf_data[vf].vlans_enabled--;
6350 if (!adapter->vf_data[vf].vlans_enabled) {
6352 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6353 size = reg & E1000_VMOLR_RLPML_MASK;
6355 reg &= ~E1000_VMOLR_RLPML_MASK;
6357 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6361 return E1000_SUCCESS;
6365 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6367 struct e1000_hw *hw = &adapter->hw;
6370 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6372 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6375 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6376 int vf, u16 vlan, u8 qos)
6379 struct igb_adapter *adapter = netdev_priv(netdev);
6381 /* VLAN IDs accepted range 0-4094 */
6382 if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6385 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6388 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6389 igb_set_vmolr(adapter, vf, !vlan);
6390 adapter->vf_data[vf].pf_vlan = vlan;
6391 adapter->vf_data[vf].pf_qos = qos;
6392 igb_set_vf_vlan_strip(adapter, vf, true);
6393 dev_info(&adapter->pdev->dev,
6394 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6395 if (test_bit(__IGB_DOWN, &adapter->state)) {
6396 dev_warn(&adapter->pdev->dev,
6397 "The VF VLAN has been set,"
6398 " but the PF device is not up.\n");
6399 dev_warn(&adapter->pdev->dev,
6400 "Bring the PF device up before"
6401 " attempting to use the VF device.\n");
6404 if (adapter->vf_data[vf].pf_vlan)
6405 dev_info(&adapter->pdev->dev,
6406 "Clearing VLAN on VF %d\n", vf);
6407 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6409 igb_set_vmvir(adapter, vlan, vf);
6410 igb_set_vmolr(adapter, vf, true);
6411 igb_set_vf_vlan_strip(adapter, vf, false);
6412 adapter->vf_data[vf].pf_vlan = 0;
6413 adapter->vf_data[vf].pf_qos = 0;
6419 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6420 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6423 struct igb_adapter *adapter = netdev_priv(netdev);
6424 struct e1000_hw *hw = &adapter->hw;
6425 u32 dtxswc, reg_offset;
6427 if (!adapter->vfs_allocated_count)
6430 if (vf >= adapter->vfs_allocated_count)
6433 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6434 dtxswc = E1000_READ_REG(hw, reg_offset);
6436 dtxswc |= ((1 << vf) |
6437 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6439 dtxswc &= ~((1 << vf) |
6440 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6441 E1000_WRITE_REG(hw, reg_offset, dtxswc);
6443 adapter->vf_data[vf].spoofchk_enabled = setting;
6444 return E1000_SUCCESS;
6446 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6447 #endif /* IFLA_VF_MAX */
6449 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6451 struct e1000_hw *hw = &adapter->hw;
6455 /* Find the vlan filter for this id */
6456 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6457 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6458 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6459 vid == (reg & E1000_VLVF_VLANID_MASK))
6463 if (i >= E1000_VLVF_ARRAY_SIZE)
6469 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6471 struct e1000_hw *hw = &adapter->hw;
6472 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6473 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6477 igb_set_vf_vlan_strip(adapter, vf, true);
6479 igb_set_vf_vlan_strip(adapter, vf, false);
6481 /* If in promiscuous mode we need to make sure the PF also has
6482 * the VLAN filter set.
6484 if (add && (adapter->netdev->flags & IFF_PROMISC))
6485 err = igb_vlvf_set(adapter, vid, add,
6486 adapter->vfs_allocated_count);
6490 err = igb_vlvf_set(adapter, vid, add, vf);
6495 /* Go through all the checks to see if the VLAN filter should
6496 * be wiped completely.
6498 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6501 int regndx = igb_find_vlvf_entry(adapter, vid);
6504 /* See if any other pools are set for this VLAN filter
6505 * entry other than the PF.
6507 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6508 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6509 adapter->vfs_allocated_count);
6510 /* If the filter was removed then ensure PF pool bit
6511 * is cleared if the PF only added itself to the pool
6512 * because the PF is in promiscuous mode.
6514 if ((vlvf & VLAN_VID_MASK) == vid &&
6515 #ifndef HAVE_VLAN_RX_REGISTER
6516 !test_bit(vid, adapter->active_vlans) &&
6519 igb_vlvf_set(adapter, vid, add,
6520 adapter->vfs_allocated_count);
6527 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6529 struct e1000_hw *hw = &adapter->hw;
6531 /* clear flags except flag that the PF has set the MAC */
6532 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6533 adapter->vf_data[vf].last_nack = jiffies;
6535 /* reset offloads to defaults */
6536 igb_set_vmolr(adapter, vf, true);
6538 /* reset vlans for device */
6539 igb_clear_vf_vfta(adapter, vf);
6541 if (adapter->vf_data[vf].pf_vlan)
6542 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6543 adapter->vf_data[vf].pf_vlan,
6544 adapter->vf_data[vf].pf_qos);
6546 igb_clear_vf_vfta(adapter, vf);
6549 /* reset multicast table array for vf */
6550 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6552 /* Flush and reset the mta with the new values */
6553 igb_set_rx_mode(adapter->netdev);
6556 * Reset the VFs TDWBAL and TDWBAH registers which are not
6559 E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6560 E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6561 if (hw->mac.type == e1000_82576) {
6562 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6563 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6567 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6569 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6571 /* generate a new mac address as we were hotplug removed/added */
6572 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6573 random_ether_addr(vf_mac);
6575 /* process remaining reset events */
6576 igb_vf_reset(adapter, vf);
6579 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6581 struct e1000_hw *hw = &adapter->hw;
6582 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6584 u8 *addr = (u8 *)(&msgbuf[1]);
6586 /* process all the same items cleared in a function level reset */
6587 igb_vf_reset(adapter, vf);
6589 /* set vf mac address */
6590 igb_del_mac_filter(adapter, vf_mac, vf);
6591 igb_add_mac_filter(adapter, vf_mac, vf);
6593 /* enable transmit and receive for vf */
6594 reg = E1000_READ_REG(hw, E1000_VFTE);
6595 E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6596 reg = E1000_READ_REG(hw, E1000_VFRE);
6597 E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6599 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6601 /* reply to reset with ack and vf mac address */
6602 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6603 memcpy(addr, vf_mac, 6);
6604 e1000_write_mbx(hw, msgbuf, 3, vf);
6607 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6610 * The VF MAC Address is stored in a packed array of bytes
6611 * starting at the second 32 bit word of the msg array
6613 unsigned char *addr = (unsigned char *)&msg[1];
6616 if (is_valid_ether_addr(addr))
6617 err = igb_set_vf_mac(adapter, vf, addr);
6622 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6624 struct e1000_hw *hw = &adapter->hw;
6625 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6626 u32 msg = E1000_VT_MSGTYPE_NACK;
6628 /* if device isn't clear to send it shouldn't be reading either */
6629 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6630 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6631 e1000_write_mbx(hw, &msg, 1, vf);
6632 vf_data->last_nack = jiffies;
6636 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6638 struct pci_dev *pdev = adapter->pdev;
6639 u32 msgbuf[E1000_VFMAILBOX_SIZE];
6640 struct e1000_hw *hw = &adapter->hw;
6641 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6644 retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6647 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6651 /* this is a message we already processed, do nothing */
6652 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6656 * until the vf completes a reset it should not be
6657 * allowed to start any configuration.
6660 if (msgbuf[0] == E1000_VF_RESET) {
6661 igb_vf_reset_msg(adapter, vf);
6665 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6666 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6667 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6668 e1000_write_mbx(hw, msgbuf, 1, vf);
6669 vf_data->last_nack = jiffies;
6674 switch ((msgbuf[0] & 0xFFFF)) {
6675 case E1000_VF_SET_MAC_ADDR:
6677 #ifndef IGB_DISABLE_VF_MAC_SET
6678 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6679 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6682 "VF %d attempted to override administratively "
6683 "set MAC address\nReload the VF driver to "
6684 "resume operations\n", vf);
6687 case E1000_VF_SET_PROMISC:
6688 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6690 case E1000_VF_SET_MULTICAST:
6691 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6693 case E1000_VF_SET_LPE:
6694 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6696 case E1000_VF_SET_VLAN:
6699 if (vf_data->pf_vlan)
6701 "VF %d attempted to override administratively "
6702 "set VLAN tag\nReload the VF driver to "
6703 "resume operations\n", vf);
6706 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6709 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6710 retval = -E1000_ERR_MBX;
6714 /* notify the VF of the results of what it sent us */
6716 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6718 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6720 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6722 e1000_write_mbx(hw, msgbuf, 1, vf);
6725 static void igb_msg_task(struct igb_adapter *adapter)
6727 struct e1000_hw *hw = &adapter->hw;
6730 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6731 /* process any reset requests */
6732 if (!e1000_check_for_rst(hw, vf))
6733 igb_vf_reset_event(adapter, vf);
6735 /* process any messages pending */
6736 if (!e1000_check_for_msg(hw, vf))
6737 igb_rcv_msg_from_vf(adapter, vf);
6739 /* process any acks */
6740 if (!e1000_check_for_ack(hw, vf))
6741 igb_rcv_ack_from_vf(adapter, vf);
6746 * igb_set_uta - Set unicast filter table address
6747 * @adapter: board private structure
6749 * The unicast table address is a register array of 32-bit registers.
6750 * The table is meant to be used in a way similar to how the MTA is used
6751 * however due to certain limitations in the hardware it is necessary to
6752 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6753 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6755 static void igb_set_uta(struct igb_adapter *adapter)
6757 struct e1000_hw *hw = &adapter->hw;
6760 /* The UTA table only exists on 82576 hardware and newer */
6761 if (hw->mac.type < e1000_82576)
6764 /* we only need to do this if VMDq is enabled */
6765 if (!adapter->vmdq_pools)
6768 for (i = 0; i < hw->mac.uta_reg_count; i++)
6769 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6773 * igb_intr_msi - Interrupt Handler
6774 * @irq: interrupt number
6775 * @data: pointer to a network interface device structure
6777 static irqreturn_t igb_intr_msi(int irq, void *data)
6779 struct igb_adapter *adapter = data;
6780 struct igb_q_vector *q_vector = adapter->q_vector[0];
6781 struct e1000_hw *hw = &adapter->hw;
6782 /* read ICR disables interrupts using IAM */
6783 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6785 igb_write_itr(q_vector);
6787 if (icr & E1000_ICR_DRSTA)
6788 schedule_work(&adapter->reset_task);
6790 if (icr & E1000_ICR_DOUTSYNC) {
6791 /* HW is reporting DMA is out of sync */
6792 adapter->stats.doosync++;
6795 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6796 hw->mac.get_link_status = 1;
6797 if (!test_bit(__IGB_DOWN, &adapter->state))
6798 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6801 #ifdef HAVE_PTP_1588_CLOCK
6802 if (icr & E1000_ICR_TS) {
6803 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6805 if (tsicr & E1000_TSICR_TXTS) {
6806 /* acknowledge the interrupt */
6807 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6808 /* retrieve hardware timestamp */
6809 schedule_work(&adapter->ptp_tx_work);
6812 #endif /* HAVE_PTP_1588_CLOCK */
6814 napi_schedule(&q_vector->napi);
6820 * igb_intr - Legacy Interrupt Handler
6821 * @irq: interrupt number
6822 * @data: pointer to a network interface device structure
6824 static irqreturn_t igb_intr(int irq, void *data)
6826 struct igb_adapter *adapter = data;
6827 struct igb_q_vector *q_vector = adapter->q_vector[0];
6828 struct e1000_hw *hw = &adapter->hw;
6829 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6830 * need for the IMC write */
6831 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6833 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6834 * not set, then the adapter didn't send an interrupt */
6835 if (!(icr & E1000_ICR_INT_ASSERTED))
6838 igb_write_itr(q_vector);
6840 if (icr & E1000_ICR_DRSTA)
6841 schedule_work(&adapter->reset_task);
6843 if (icr & E1000_ICR_DOUTSYNC) {
6844 /* HW is reporting DMA is out of sync */
6845 adapter->stats.doosync++;
6848 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6849 hw->mac.get_link_status = 1;
6850 /* guard against interrupt when we're going down */
6851 if (!test_bit(__IGB_DOWN, &adapter->state))
6852 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6855 #ifdef HAVE_PTP_1588_CLOCK
6856 if (icr & E1000_ICR_TS) {
6857 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6859 if (tsicr & E1000_TSICR_TXTS) {
6860 /* acknowledge the interrupt */
6861 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6862 /* retrieve hardware timestamp */
6863 schedule_work(&adapter->ptp_tx_work);
6866 #endif /* HAVE_PTP_1588_CLOCK */
6868 napi_schedule(&q_vector->napi);
6873 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6875 struct igb_adapter *adapter = q_vector->adapter;
6876 struct e1000_hw *hw = &adapter->hw;
6878 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6879 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6880 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6881 igb_set_itr(q_vector);
6883 igb_update_ring_itr(q_vector);
6886 if (!test_bit(__IGB_DOWN, &adapter->state)) {
6887 if (adapter->msix_entries)
6888 E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6890 igb_irq_enable(adapter);
6895 * igb_poll - NAPI Rx polling callback
6896 * @napi: napi polling structure
6897 * @budget: count of how many packets we should handle
6899 static int igb_poll(struct napi_struct *napi, int budget)
6901 struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6902 bool clean_complete = true;
6905 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6906 igb_update_dca(q_vector);
6908 if (q_vector->tx.ring)
6909 clean_complete = igb_clean_tx_irq(q_vector);
6911 if (q_vector->rx.ring)
6912 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6914 #ifndef HAVE_NETDEV_NAPI_LIST
6915 /* if netdev is disabled we need to stop polling */
6916 if (!netif_running(q_vector->adapter->netdev))
6917 clean_complete = true;
6920 /* If all work not completed, return budget and keep polling */
6921 if (!clean_complete)
6924 /* If not enough Rx work done, exit the polling mode */
6925 napi_complete(napi);
6926 igb_ring_irq_enable(q_vector);
6932 * igb_clean_tx_irq - Reclaim resources after transmit completes
6933 * @q_vector: pointer to q_vector containing needed info
6934 * returns TRUE if ring is completely cleaned
6936 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6938 struct igb_adapter *adapter = q_vector->adapter;
6939 struct igb_ring *tx_ring = q_vector->tx.ring;
6940 struct igb_tx_buffer *tx_buffer;
6941 union e1000_adv_tx_desc *tx_desc;
6942 unsigned int total_bytes = 0, total_packets = 0;
6943 unsigned int budget = q_vector->tx.work_limit;
6944 unsigned int i = tx_ring->next_to_clean;
6946 if (test_bit(__IGB_DOWN, &adapter->state))
6949 tx_buffer = &tx_ring->tx_buffer_info[i];
6950 tx_desc = IGB_TX_DESC(tx_ring, i);
6951 i -= tx_ring->count;
6954 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6956 /* if next_to_watch is not set then there is no work pending */
6960 /* prevent any other reads prior to eop_desc */
6961 read_barrier_depends();
6963 /* if DD is not set pending work has not been completed */
6964 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6967 /* clear next_to_watch to prevent false hangs */
6968 tx_buffer->next_to_watch = NULL;
6970 /* update the statistics for this packet */
6971 total_bytes += tx_buffer->bytecount;
6972 total_packets += tx_buffer->gso_segs;
6975 dev_kfree_skb_any(tx_buffer->skb);
6977 /* unmap skb header data */
6978 dma_unmap_single(tx_ring->dev,
6979 dma_unmap_addr(tx_buffer, dma),
6980 dma_unmap_len(tx_buffer, len),
6983 /* clear tx_buffer data */
6984 tx_buffer->skb = NULL;
6985 dma_unmap_len_set(tx_buffer, len, 0);
6987 /* clear last DMA location and unmap remaining buffers */
6988 while (tx_desc != eop_desc) {
6993 i -= tx_ring->count;
6994 tx_buffer = tx_ring->tx_buffer_info;
6995 tx_desc = IGB_TX_DESC(tx_ring, 0);
6998 /* unmap any remaining paged data */
6999 if (dma_unmap_len(tx_buffer, len)) {
7000 dma_unmap_page(tx_ring->dev,
7001 dma_unmap_addr(tx_buffer, dma),
7002 dma_unmap_len(tx_buffer, len),
7004 dma_unmap_len_set(tx_buffer, len, 0);
7008 /* move us one more past the eop_desc for start of next pkt */
7013 i -= tx_ring->count;
7014 tx_buffer = tx_ring->tx_buffer_info;
7015 tx_desc = IGB_TX_DESC(tx_ring, 0);
7018 /* issue prefetch for next Tx descriptor */
7021 /* update budget accounting */
7023 } while (likely(budget));
7025 netdev_tx_completed_queue(txring_txq(tx_ring),
7026 total_packets, total_bytes);
7028 i += tx_ring->count;
7029 tx_ring->next_to_clean = i;
7030 tx_ring->tx_stats.bytes += total_bytes;
7031 tx_ring->tx_stats.packets += total_packets;
7032 q_vector->tx.total_bytes += total_bytes;
7033 q_vector->tx.total_packets += total_packets;
7036 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7037 !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7039 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7041 struct e1000_hw *hw = &adapter->hw;
7043 /* Detect a transmit hang in hardware, this serializes the
7044 * check with the clearing of time_stamp and movement of i */
7045 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7046 if (tx_buffer->next_to_watch &&
7047 time_after(jiffies, tx_buffer->time_stamp +
7048 (adapter->tx_timeout_factor * HZ))
7049 && !(E1000_READ_REG(hw, E1000_STATUS) &
7050 E1000_STATUS_TXOFF)) {
7052 /* detected Tx unit hang */
7054 adapter->tx_hang_detected = TRUE;
7055 if (adapter->disable_hw_reset) {
7056 DPRINTK(DRV, WARNING,
7057 "Deactivating netdev watchdog timer\n");
7058 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7059 dev_put(netdev_ring(tx_ring));
7060 #ifndef HAVE_NET_DEVICE_OPS
7061 netdev_ring(tx_ring)->tx_timeout = NULL;
7065 dev_err(tx_ring->dev,
7066 "Detected Tx Unit Hang\n"
7070 " next_to_use <%x>\n"
7071 " next_to_clean <%x>\n"
7072 "buffer_info[next_to_clean]\n"
7073 " time_stamp <%lx>\n"
7074 " next_to_watch <%p>\n"
7076 " desc.status <%x>\n",
7077 tx_ring->queue_index,
7078 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7079 readl(tx_ring->tail),
7080 tx_ring->next_to_use,
7081 tx_ring->next_to_clean,
7082 tx_buffer->time_stamp,
7083 tx_buffer->next_to_watch,
7085 tx_buffer->next_to_watch->wb.status);
7086 if (netif_is_multiqueue(netdev_ring(tx_ring)))
7087 netif_stop_subqueue(netdev_ring(tx_ring),
7088 ring_queue_index(tx_ring));
7090 netif_stop_queue(netdev_ring(tx_ring));
7092 /* we are about to reset, no point in enabling stuff */
7097 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7098 if (unlikely(total_packets &&
7099 netif_carrier_ok(netdev_ring(tx_ring)) &&
7100 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7101 /* Make sure that anybody stopping the queue after this
7102 * sees the new next_to_clean.
7105 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7106 if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7107 ring_queue_index(tx_ring)) &&
7108 !(test_bit(__IGB_DOWN, &adapter->state))) {
7109 netif_wake_subqueue(netdev_ring(tx_ring),
7110 ring_queue_index(tx_ring));
7111 tx_ring->tx_stats.restart_queue++;
7114 if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7115 !(test_bit(__IGB_DOWN, &adapter->state))) {
7116 netif_wake_queue(netdev_ring(tx_ring));
7117 tx_ring->tx_stats.restart_queue++;
7125 #ifdef HAVE_VLAN_RX_REGISTER
7127 * igb_receive_skb - helper function to handle rx indications
7128 * @q_vector: structure containing interrupt and ring information
7129 * @skb: packet to send up
7131 static void igb_receive_skb(struct igb_q_vector *q_vector,
7132 struct sk_buff *skb)
7134 struct vlan_group **vlgrp = netdev_priv(skb->dev);
7136 if (IGB_CB(skb)->vid) {
7138 vlan_gro_receive(&q_vector->napi, *vlgrp,
7139 IGB_CB(skb)->vid, skb);
7141 dev_kfree_skb_any(skb);
7144 napi_gro_receive(&q_vector->napi, skb);
7148 #endif /* HAVE_VLAN_RX_REGISTER */
7149 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7151 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7152 * @rx_ring: rx descriptor ring to store buffers on
7153 * @old_buff: donor buffer to have page reused
7155 * Synchronizes page for reuse by the adapter
7157 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7158 struct igb_rx_buffer *old_buff)
7160 struct igb_rx_buffer *new_buff;
7161 u16 nta = rx_ring->next_to_alloc;
7163 new_buff = &rx_ring->rx_buffer_info[nta];
7165 /* update, and store next to alloc */
7167 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7169 /* transfer page from old buffer to new buffer */
7170 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7172 /* sync the buffer for use by the device */
7173 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7174 old_buff->page_offset,
7179 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7181 unsigned int truesize)
7183 /* avoid re-using remote pages */
7184 if (unlikely(page_to_nid(page) != numa_node_id()))
7187 #if (PAGE_SIZE < 8192)
7188 /* if we are only owner of page we can reuse it */
7189 if (unlikely(page_count(page) != 1))
7192 /* flip page offset to other buffer */
7193 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7196 /* move offset up to the next cache line */
7197 rx_buffer->page_offset += truesize;
7199 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7203 /* bump ref count on page before it is given to the stack */
7210 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7211 * @rx_ring: rx descriptor ring to transact packets on
7212 * @rx_buffer: buffer containing page to add
7213 * @rx_desc: descriptor containing length of buffer written by hardware
7214 * @skb: sk_buff to place the data into
7216 * This function will add the data contained in rx_buffer->page to the skb.
7217 * This is done either through a direct copy if the data in the buffer is
7218 * less than the skb header size, otherwise it will just attach the page as
7219 * a frag to the skb.
7221 * The function will then update the page offset if necessary and return
7222 * true if the buffer can be reused by the adapter.
7224 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7225 struct igb_rx_buffer *rx_buffer,
7226 union e1000_adv_rx_desc *rx_desc,
7227 struct sk_buff *skb)
7229 struct page *page = rx_buffer->page;
7230 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7231 #if (PAGE_SIZE < 8192)
7232 unsigned int truesize = IGB_RX_BUFSZ;
7234 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7237 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7238 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7240 #ifdef HAVE_PTP_1588_CLOCK
7241 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7242 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7243 va += IGB_TS_HDR_LEN;
7244 size -= IGB_TS_HDR_LEN;
7246 #endif /* HAVE_PTP_1588_CLOCK */
7248 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7250 /* we can reuse buffer as-is, just make sure it is local */
7251 if (likely(page_to_nid(page) == numa_node_id()))
7254 /* this page cannot be reused so discard it */
7259 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7260 rx_buffer->page_offset, size, truesize);
7262 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7265 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7266 union e1000_adv_rx_desc *rx_desc,
7267 struct sk_buff *skb)
7269 struct igb_rx_buffer *rx_buffer;
7272 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7274 page = rx_buffer->page;
7278 void *page_addr = page_address(page) +
7279 rx_buffer->page_offset;
7281 /* prefetch first cache line of first page */
7282 prefetch(page_addr);
7283 #if L1_CACHE_BYTES < 128
7284 prefetch(page_addr + L1_CACHE_BYTES);
7287 /* allocate a skb to store the frags */
7288 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7290 if (unlikely(!skb)) {
7291 rx_ring->rx_stats.alloc_failed++;
7296 * we will be copying header into skb->data in
7297 * pskb_may_pull so it is in our interest to prefetch
7298 * it now to avoid a possible cache miss
7300 prefetchw(skb->data);
7303 /* we are reusing so sync this buffer for CPU use */
7304 dma_sync_single_range_for_cpu(rx_ring->dev,
7306 rx_buffer->page_offset,
7310 /* pull page into skb */
7311 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7312 /* hand second half of page back to the ring */
7313 igb_reuse_rx_page(rx_ring, rx_buffer);
7315 /* we are not reusing the buffer so unmap it */
7316 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7317 PAGE_SIZE, DMA_FROM_DEVICE);
7320 /* clear contents of rx_buffer */
7321 rx_buffer->page = NULL;
7327 static inline void igb_rx_checksum(struct igb_ring *ring,
7328 union e1000_adv_rx_desc *rx_desc,
7329 struct sk_buff *skb)
7331 skb_checksum_none_assert(skb);
7333 /* Ignore Checksum bit is set */
7334 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7337 /* Rx checksum disabled via ethtool */
7338 if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7341 /* TCP/UDP checksum error bit is set */
7342 if (igb_test_staterr(rx_desc,
7343 E1000_RXDEXT_STATERR_TCPE |
7344 E1000_RXDEXT_STATERR_IPE)) {
7346 * work around errata with sctp packets where the TCPE aka
7347 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7348 * packets, (aka let the stack check the crc32c)
7350 if (!((skb->len == 60) &&
7351 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7352 ring->rx_stats.csum_err++;
7354 /* let the stack verify checksum errors */
7357 /* It must be a TCP or UDP packet with a valid checksum */
7358 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7359 E1000_RXD_STAT_UDPCS))
7360 skb->ip_summed = CHECKSUM_UNNECESSARY;
7363 #ifdef NETIF_F_RXHASH
7364 static inline void igb_rx_hash(struct igb_ring *ring,
7365 union e1000_adv_rx_desc *rx_desc,
7366 struct sk_buff *skb)
7368 if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7369 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7375 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7377 * igb_merge_active_tail - merge active tail into lro skb
7378 * @tail: pointer to active tail in frag_list
7380 * This function merges the length and data of an active tail into the
7381 * skb containing the frag_list. It resets the tail's pointer to the head,
7382 * but it leaves the heads pointer to tail intact.
7384 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7386 struct sk_buff *head = IGB_CB(tail)->head;
7391 head->len += tail->len;
7392 head->data_len += tail->len;
7393 head->truesize += tail->len;
7395 IGB_CB(tail)->head = NULL;
7401 * igb_add_active_tail - adds an active tail into the skb frag_list
7402 * @head: pointer to the start of the skb
7403 * @tail: pointer to active tail to add to frag_list
7405 * This function adds an active tail to the end of the frag list. This tail
7406 * will still be receiving data so we cannot yet ad it's stats to the main
7407 * skb. That is done via igb_merge_active_tail.
7409 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7411 struct sk_buff *old_tail = IGB_CB(head)->tail;
7414 igb_merge_active_tail(old_tail);
7415 old_tail->next = tail;
7417 skb_shinfo(head)->frag_list = tail;
7420 IGB_CB(tail)->head = head;
7421 IGB_CB(head)->tail = tail;
7423 IGB_CB(head)->append_cnt++;
7427 * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7428 * @head: pointer to head of an active frag list
7430 * This function will clear the frag_tail_tracker pointer on an active
7431 * frag_list and returns true if the pointer was actually set
7433 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7435 struct sk_buff *tail = IGB_CB(head)->tail;
7440 igb_merge_active_tail(tail);
7442 IGB_CB(head)->tail = NULL;
7447 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7449 * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7450 * @adapter: board private structure
7451 * @rx_desc: pointer to the rx descriptor
7452 * @skb: pointer to the skb to be merged
7455 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7456 union e1000_adv_rx_desc *rx_desc,
7457 struct sk_buff *skb)
7459 struct iphdr *iph = (struct iphdr *)skb->data;
7460 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7462 /* verify hardware indicates this is IPv4/TCP */
7463 if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7464 !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7467 /* .. and LRO is enabled */
7468 if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7471 /* .. and we are not in promiscuous mode */
7472 if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7475 /* .. and the header is large enough for us to read IP/TCP fields */
7476 if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7479 /* .. and there are no VLANs on packet */
7480 if (skb->protocol != __constant_htons(ETH_P_IP))
7483 /* .. and we are version 4 with no options */
7484 if (*(u8 *)iph != 0x45)
7487 /* .. and the packet is not fragmented */
7488 if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7491 /* .. and that next header is TCP */
7492 if (iph->protocol != IPPROTO_TCP)
7498 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7500 return (struct igb_lrohdr *)skb->data;
7504 * igb_lro_flush - Indicate packets to upper layer.
7506 * Update IP and TCP header part of head skb if more than one
7507 * skb's chained and indicate packets to upper layer.
7509 static void igb_lro_flush(struct igb_q_vector *q_vector,
7510 struct sk_buff *skb)
7512 struct igb_lro_list *lrolist = &q_vector->lrolist;
7514 __skb_unlink(skb, &lrolist->active);
7516 if (IGB_CB(skb)->append_cnt) {
7517 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7519 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7520 /* close any active lro contexts */
7521 igb_close_active_frag_list(skb);
7524 /* incorporate ip header and re-calculate checksum */
7525 lroh->iph.tot_len = ntohs(skb->len);
7526 lroh->iph.check = 0;
7528 /* header length is 5 since we know no options exist */
7529 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7531 /* clear TCP checksum to indicate we are an LRO frame */
7534 /* incorporate latest timestamp into the tcp header */
7535 if (IGB_CB(skb)->tsecr) {
7536 lroh->ts[2] = IGB_CB(skb)->tsecr;
7537 lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7541 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7542 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7546 #ifdef HAVE_VLAN_RX_REGISTER
7547 igb_receive_skb(q_vector, skb);
7549 napi_gro_receive(&q_vector->napi, skb);
7551 lrolist->stats.flushed++;
7554 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7556 struct igb_lro_list *lrolist = &q_vector->lrolist;
7557 struct sk_buff *skb, *tmp;
7559 skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7560 igb_lro_flush(q_vector, skb);
7564 * igb_lro_header_ok - Main LRO function.
7566 static void igb_lro_header_ok(struct sk_buff *skb)
7568 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7569 u16 opt_bytes, data_len;
7571 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7572 IGB_CB(skb)->tail = NULL;
7574 IGB_CB(skb)->tsecr = 0;
7575 IGB_CB(skb)->append_cnt = 0;
7576 IGB_CB(skb)->mss = 0;
7578 /* ensure that the checksum is valid */
7579 if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7582 /* If we see CE codepoint in IP header, packet is not mergeable */
7583 if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7586 /* ensure no bits set besides ack or psh */
7587 if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7588 lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7592 /* store the total packet length */
7593 data_len = ntohs(lroh->iph.tot_len);
7595 /* remove any padding from the end of the skb */
7596 __pskb_trim(skb, data_len);
7598 /* remove header length from data length */
7599 data_len -= sizeof(struct igb_lrohdr);
7602 * check for timestamps. Since the only option we handle are timestamps,
7603 * we only have to handle the simple case of aligned timestamps
7605 opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7606 if (opt_bytes != 0) {
7607 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7608 !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7609 TCPOLEN_TSTAMP_ALIGNED) ||
7610 (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7611 (TCPOPT_NOP << 16) |
7612 (TCPOPT_TIMESTAMP << 8) |
7613 TCPOLEN_TIMESTAMP)) ||
7614 (lroh->ts[2] == 0)) {
7618 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7619 IGB_CB(skb)->tsecr = lroh->ts[2];
7621 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7624 /* record data_len as mss for the packet */
7625 IGB_CB(skb)->mss = data_len;
7626 IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7629 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7630 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7632 struct skb_shared_info *sh_info;
7633 struct skb_shared_info *new_skb_info;
7634 unsigned int data_len;
7636 sh_info = skb_shinfo(lro_skb);
7637 new_skb_info = skb_shinfo(new_skb);
7639 /* copy frags into the last skb */
7640 memcpy(sh_info->frags + sh_info->nr_frags,
7641 new_skb_info->frags,
7642 new_skb_info->nr_frags * sizeof(skb_frag_t));
7644 /* copy size data over */
7645 sh_info->nr_frags += new_skb_info->nr_frags;
7646 data_len = IGB_CB(new_skb)->mss;
7647 lro_skb->len += data_len;
7648 lro_skb->data_len += data_len;
7649 lro_skb->truesize += data_len;
7651 /* wipe record of data from new_skb */
7652 new_skb_info->nr_frags = 0;
7653 new_skb->len = new_skb->data_len = 0;
7654 dev_kfree_skb_any(new_skb);
7657 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7659 * igb_lro_receive - if able, queue skb into lro chain
7660 * @q_vector: structure containing interrupt and ring information
7661 * @new_skb: pointer to current skb being checked
7663 * Checks whether the skb given is eligible for LRO and if that's
7664 * fine chains it to the existing lro_skb based on flowid. If an LRO for
7665 * the flow doesn't exist create one.
7667 static void igb_lro_receive(struct igb_q_vector *q_vector,
7668 struct sk_buff *new_skb)
7670 struct sk_buff *lro_skb;
7671 struct igb_lro_list *lrolist = &q_vector->lrolist;
7672 struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7673 __be32 saddr = lroh->iph.saddr;
7674 __be32 daddr = lroh->iph.daddr;
7675 __be32 tcp_ports = *(__be32 *)&lroh->th;
7677 #ifdef HAVE_VLAN_RX_REGISTER
7678 u16 vid = IGB_CB(new_skb)->vid;
7680 u16 vid = new_skb->vlan_tci;
7683 igb_lro_header_ok(new_skb);
7686 * we have a packet that might be eligible for LRO,
7687 * so see if it matches anything we might expect
7689 skb_queue_walk(&lrolist->active, lro_skb) {
7690 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7691 igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7692 igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7695 #ifdef HAVE_VLAN_RX_REGISTER
7696 if (IGB_CB(lro_skb)->vid != vid)
7698 if (lro_skb->vlan_tci != vid)
7702 /* out of order packet */
7703 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7704 igb_lro_flush(q_vector, lro_skb);
7705 IGB_CB(new_skb)->mss = 0;
7709 /* TCP timestamp options have changed */
7710 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7711 igb_lro_flush(q_vector, lro_skb);
7715 /* make sure timestamp values are increasing */
7716 if (IGB_CB(lro_skb)->tsecr &&
7717 IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7718 igb_lro_flush(q_vector, lro_skb);
7719 IGB_CB(new_skb)->mss = 0;
7723 data_len = IGB_CB(new_skb)->mss;
7725 /* Check for all of the above below
7728 * resultant packet would be too large
7729 * new skb is larger than our current mss
7730 * data would remain in header
7731 * we would consume more frags then the sk_buff contains
7732 * ack sequence numbers changed
7733 * window size has changed
7735 if (data_len == 0 ||
7736 data_len > IGB_CB(lro_skb)->mss ||
7737 data_len > IGB_CB(lro_skb)->free ||
7738 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7739 data_len != new_skb->data_len ||
7740 skb_shinfo(new_skb)->nr_frags >=
7741 (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7743 igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7744 igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7745 igb_lro_flush(q_vector, lro_skb);
7749 /* Remove IP and TCP header*/
7750 skb_pull(new_skb, new_skb->len - data_len);
7752 /* update timestamp and timestamp echo response */
7753 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7754 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7756 /* update sequence and free space */
7757 IGB_CB(lro_skb)->next_seq += data_len;
7758 IGB_CB(lro_skb)->free -= data_len;
7760 /* update append_cnt */
7761 IGB_CB(lro_skb)->append_cnt++;
7763 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7764 /* if header is empty pull pages into current skb */
7765 igb_merge_frags(lro_skb, new_skb);
7767 /* chain this new skb in frag_list */
7768 igb_add_active_tail(lro_skb, new_skb);
7771 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7772 skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7773 igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7774 igb_lro_flush(q_vector, lro_skb);
7777 lrolist->stats.coal++;
7781 if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7782 /* if we are at capacity flush the tail */
7783 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7784 lro_skb = skb_peek_tail(&lrolist->active);
7786 igb_lro_flush(q_vector, lro_skb);
7789 /* update sequence and free space */
7790 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7791 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7793 /* .. and insert at the front of the active list */
7794 __skb_queue_head(&lrolist->active, new_skb);
7796 lrolist->stats.coal++;
7800 /* packet not handled by any of the above, pass it to the stack */
7801 #ifdef HAVE_VLAN_RX_REGISTER
7802 igb_receive_skb(q_vector, new_skb);
7804 napi_gro_receive(&q_vector->napi, new_skb);
7808 #endif /* IGB_NO_LRO */
7810 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7811 * @rx_ring: rx descriptor ring packet is being transacted on
7812 * @rx_desc: pointer to the EOP Rx descriptor
7813 * @skb: pointer to current skb being populated
7815 * This function checks the ring, descriptor, and packet information in
7816 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7817 * other fields within the skb.
7819 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7820 union e1000_adv_rx_desc *rx_desc,
7821 struct sk_buff *skb)
7823 struct net_device *dev = rx_ring->netdev;
7824 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7826 #ifdef NETIF_F_RXHASH
7827 igb_rx_hash(rx_ring, rx_desc, skb);
7830 igb_rx_checksum(rx_ring, rx_desc, skb);
7832 /* update packet type stats */
7833 if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7834 rx_ring->rx_stats.ipv4_packets++;
7835 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7836 rx_ring->rx_stats.ipv4e_packets++;
7837 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7838 rx_ring->rx_stats.ipv6_packets++;
7839 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7840 rx_ring->rx_stats.ipv6e_packets++;
7841 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7842 rx_ring->rx_stats.tcp_packets++;
7843 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7844 rx_ring->rx_stats.udp_packets++;
7845 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7846 rx_ring->rx_stats.sctp_packets++;
7847 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7848 rx_ring->rx_stats.nfs_packets++;
7850 #ifdef HAVE_PTP_1588_CLOCK
7851 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7852 #endif /* HAVE_PTP_1588_CLOCK */
7854 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7855 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7857 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7859 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7861 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7862 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7863 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7865 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7866 #ifdef HAVE_VLAN_RX_REGISTER
7867 IGB_CB(skb)->vid = vid;
7869 IGB_CB(skb)->vid = 0;
7872 #ifdef HAVE_VLAN_PROTOCOL
7873 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7875 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7882 skb_record_rx_queue(skb, rx_ring->queue_index);
7884 skb->protocol = eth_type_trans(skb, dev);
7888 * igb_is_non_eop - process handling of non-EOP buffers
7889 * @rx_ring: Rx ring being processed
7890 * @rx_desc: Rx descriptor for current buffer
7892 * This function updates next to clean. If the buffer is an EOP buffer
7893 * this function exits returning false, otherwise it will place the
7894 * sk_buff in the next buffer to be chained and return true indicating
7895 * that this is in fact a non-EOP buffer.
7897 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7898 union e1000_adv_rx_desc *rx_desc)
7900 u32 ntc = rx_ring->next_to_clean + 1;
7902 /* fetch, update, and store next to clean */
7903 ntc = (ntc < rx_ring->count) ? ntc : 0;
7904 rx_ring->next_to_clean = ntc;
7906 prefetch(IGB_RX_DESC(rx_ring, ntc));
7908 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7914 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7915 /* igb_clean_rx_irq -- * legacy */
7916 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7918 struct igb_ring *rx_ring = q_vector->rx.ring;
7919 unsigned int total_bytes = 0, total_packets = 0;
7920 u16 cleaned_count = igb_desc_unused(rx_ring);
7923 struct igb_rx_buffer *rx_buffer;
7924 union e1000_adv_rx_desc *rx_desc;
7925 struct sk_buff *skb;
7928 /* return some buffers to hardware, one at a time is too slow */
7929 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7930 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7934 ntc = rx_ring->next_to_clean;
7935 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7936 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7938 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7942 * This memory barrier is needed to keep us from reading
7943 * any other fields out of the rx_desc until we know the
7944 * RXD_STAT_DD bit is set
7948 skb = rx_buffer->skb;
7950 prefetch(skb->data);
7952 /* pull the header of the skb in */
7953 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7955 /* clear skb reference in buffer info structure */
7956 rx_buffer->skb = NULL;
7960 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7962 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7963 rx_ring->rx_buffer_len,
7967 if (igb_test_staterr(rx_desc,
7968 E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
7969 dev_kfree_skb_any(skb);
7973 total_bytes += skb->len;
7975 /* populate checksum, timestamp, VLAN, and protocol */
7976 igb_process_skb_fields(rx_ring, rx_desc, skb);
7979 if (igb_can_lro(rx_ring, rx_desc, skb))
7980 igb_lro_receive(q_vector, skb);
7983 #ifdef HAVE_VLAN_RX_REGISTER
7984 igb_receive_skb(q_vector, skb);
7986 napi_gro_receive(&q_vector->napi, skb);
7990 netdev_ring(rx_ring)->last_rx = jiffies;
7993 /* update budget accounting */
7995 } while (likely(total_packets < budget));
7997 rx_ring->rx_stats.packets += total_packets;
7998 rx_ring->rx_stats.bytes += total_bytes;
7999 q_vector->rx.total_packets += total_packets;
8000 q_vector->rx.total_bytes += total_bytes;
8003 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8006 igb_lro_flush_all(q_vector);
8008 #endif /* IGB_NO_LRO */
8009 return (total_packets < budget);
8011 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8013 * igb_get_headlen - determine size of header for LRO/GRO
8014 * @data: pointer to the start of the headers
8015 * @max_len: total length of section to find headers in
8017 * This function is meant to determine the length of headers that will
8018 * be recognized by hardware for LRO, and GRO offloads. The main
8019 * motivation of doing this is to only perform one pull for IPv4 TCP
8020 * packets so that we can do basic things like calculating the gso_size
8021 * based on the average data per packet.
8023 static unsigned int igb_get_headlen(unsigned char *data,
8024 unsigned int max_len)
8027 unsigned char *network;
8030 struct vlan_hdr *vlan;
8033 struct ipv6hdr *ipv6;
8036 u8 nexthdr = 0; /* default to not TCP */
8039 /* this should never happen, but better safe than sorry */
8040 if (max_len < ETH_HLEN)
8043 /* initialize network frame pointer */
8046 /* set first protocol and move network header forward */
8047 protocol = hdr.eth->h_proto;
8048 hdr.network += ETH_HLEN;
8050 /* handle any vlan tag if present */
8051 if (protocol == __constant_htons(ETH_P_8021Q)) {
8052 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8055 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8056 hdr.network += VLAN_HLEN;
8059 /* handle L3 protocols */
8060 if (protocol == __constant_htons(ETH_P_IP)) {
8061 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8064 /* access ihl as a u8 to avoid unaligned access on ia64 */
8065 hlen = (hdr.network[0] & 0x0F) << 2;
8067 /* verify hlen meets minimum size requirements */
8068 if (hlen < sizeof(struct iphdr))
8069 return hdr.network - data;
8071 /* record next protocol if header is present */
8072 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8073 nexthdr = hdr.ipv4->protocol;
8075 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8076 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8079 /* record next protocol */
8080 nexthdr = hdr.ipv6->nexthdr;
8081 hlen = sizeof(struct ipv6hdr);
8082 #endif /* NETIF_F_TSO6 */
8084 return hdr.network - data;
8087 /* relocate pointer to start of L4 header */
8088 hdr.network += hlen;
8090 /* finally sort out TCP */
8091 if (nexthdr == IPPROTO_TCP) {
8092 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8095 /* access doff as a u8 to avoid unaligned access on ia64 */
8096 hlen = (hdr.network[12] & 0xF0) >> 2;
8098 /* verify hlen meets minimum size requirements */
8099 if (hlen < sizeof(struct tcphdr))
8100 return hdr.network - data;
8102 hdr.network += hlen;
8103 } else if (nexthdr == IPPROTO_UDP) {
8104 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8107 hdr.network += sizeof(struct udphdr);
8111 * If everything has gone correctly hdr.network should be the
8112 * data section of the packet and will be the end of the header.
8113 * If not then it probably represents the end of the last recognized
8116 if ((hdr.network - data) < max_len)
8117 return hdr.network - data;
8123 * igb_pull_tail - igb specific version of skb_pull_tail
8124 * @rx_ring: rx descriptor ring packet is being transacted on
8125 * @rx_desc: pointer to the EOP Rx descriptor
8126 * @skb: pointer to current skb being adjusted
8128 * This function is an igb specific version of __pskb_pull_tail. The
8129 * main difference between this version and the original function is that
8130 * this function can make several assumptions about the state of things
8131 * that allow for significant optimizations versus the standard function.
8132 * As a result we can do things like drop a frag and maintain an accurate
8133 * truesize for the skb.
8135 static void igb_pull_tail(struct igb_ring *rx_ring,
8136 union e1000_adv_rx_desc *rx_desc,
8137 struct sk_buff *skb)
8139 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8141 unsigned int pull_len;
8144 * it is valid to use page_address instead of kmap since we are
8145 * working with pages allocated out of the lomem pool per
8146 * alloc_page(GFP_ATOMIC)
8148 va = skb_frag_address(frag);
8150 #ifdef HAVE_PTP_1588_CLOCK
8151 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8152 /* retrieve timestamp from buffer */
8153 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8155 /* update pointers to remove timestamp header */
8156 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8157 frag->page_offset += IGB_TS_HDR_LEN;
8158 skb->data_len -= IGB_TS_HDR_LEN;
8159 skb->len -= IGB_TS_HDR_LEN;
8161 /* move va to start of packet data */
8162 va += IGB_TS_HDR_LEN;
8164 #endif /* HAVE_PTP_1588_CLOCK */
8167 * we need the header to contain the greater of either ETH_HLEN or
8168 * 60 bytes if the skb->len is less than 60 for skb_pad.
8170 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8172 /* align pull length to size of long to optimize memcpy performance */
8173 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8175 /* update all of the pointers */
8176 skb_frag_size_sub(frag, pull_len);
8177 frag->page_offset += pull_len;
8178 skb->data_len -= pull_len;
8179 skb->tail += pull_len;
8183 * igb_cleanup_headers - Correct corrupted or empty headers
8184 * @rx_ring: rx descriptor ring packet is being transacted on
8185 * @rx_desc: pointer to the EOP Rx descriptor
8186 * @skb: pointer to current skb being fixed
8188 * Address the case where we are pulling data in on pages only
8189 * and as such no data is present in the skb header.
8191 * In addition if skb is not at least 60 bytes we need to pad it so that
8192 * it is large enough to qualify as a valid Ethernet frame.
8194 * Returns true if an error was encountered and skb was freed.
8196 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8197 union e1000_adv_rx_desc *rx_desc,
8198 struct sk_buff *skb)
8201 if (unlikely((igb_test_staterr(rx_desc,
8202 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8203 struct net_device *netdev = rx_ring->netdev;
8204 if (!(netdev->features & NETIF_F_RXALL)) {
8205 dev_kfree_skb_any(skb);
8210 /* place header in linear portion of buffer */
8211 if (skb_is_nonlinear(skb))
8212 igb_pull_tail(rx_ring, rx_desc, skb);
8214 /* if skb_pad returns an error the skb was freed */
8215 if (unlikely(skb->len < 60)) {
8216 int pad_len = 60 - skb->len;
8218 if (skb_pad(skb, pad_len))
8220 __skb_put(skb, pad_len);
8226 /* igb_clean_rx_irq -- * packet split */
8227 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8229 struct igb_ring *rx_ring = q_vector->rx.ring;
8230 struct sk_buff *skb = rx_ring->skb;
8231 unsigned int total_bytes = 0, total_packets = 0;
8232 u16 cleaned_count = igb_desc_unused(rx_ring);
8235 union e1000_adv_rx_desc *rx_desc;
8237 /* return some buffers to hardware, one at a time is too slow */
8238 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8239 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8243 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8245 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8249 * This memory barrier is needed to keep us from reading
8250 * any other fields out of the rx_desc until we know the
8251 * RXD_STAT_DD bit is set
8255 /* retrieve a buffer from the ring */
8256 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8258 /* exit if we failed to retrieve a buffer */
8264 /* fetch next buffer in frame if non-eop */
8265 if (igb_is_non_eop(rx_ring, rx_desc))
8268 /* verify the packet layout is correct */
8269 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8274 /* probably a little skewed due to removing CRC */
8275 total_bytes += skb->len;
8277 /* populate checksum, timestamp, VLAN, and protocol */
8278 igb_process_skb_fields(rx_ring, rx_desc, skb);
8281 if (igb_can_lro(rx_ring, rx_desc, skb))
8282 igb_lro_receive(q_vector, skb);
8285 #ifdef HAVE_VLAN_RX_REGISTER
8286 igb_receive_skb(q_vector, skb);
8288 napi_gro_receive(&q_vector->napi, skb);
8292 netdev_ring(rx_ring)->last_rx = jiffies;
8295 /* reset skb pointer */
8298 /* update budget accounting */
8300 } while (likely(total_packets < budget));
8302 /* place incomplete frames back on ring for completion */
8305 rx_ring->rx_stats.packets += total_packets;
8306 rx_ring->rx_stats.bytes += total_bytes;
8307 q_vector->rx.total_packets += total_packets;
8308 q_vector->rx.total_bytes += total_bytes;
8311 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8314 igb_lro_flush_all(q_vector);
8316 #endif /* IGB_NO_LRO */
8317 return (total_packets < budget);
8319 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8321 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8322 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8323 struct igb_rx_buffer *bi)
8325 struct sk_buff *skb = bi->skb;
8326 dma_addr_t dma = bi->dma;
8332 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8333 rx_ring->rx_buffer_len);
8336 rx_ring->rx_stats.alloc_failed++;
8340 /* initialize skb for ring */
8341 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8344 dma = dma_map_single(rx_ring->dev, skb->data,
8345 rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8347 /* if mapping failed free memory back to system since
8348 * there isn't much point in holding memory we can't use
8350 if (dma_mapping_error(rx_ring->dev, dma)) {
8351 dev_kfree_skb_any(skb);
8354 rx_ring->rx_stats.alloc_failed++;
8362 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8363 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8364 struct igb_rx_buffer *bi)
8366 struct page *page = bi->page;
8369 /* since we are recycling buffers we should seldom need to alloc */
8373 /* alloc new page for storage */
8374 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8375 if (unlikely(!page)) {
8376 rx_ring->rx_stats.alloc_failed++;
8380 /* map page for use */
8381 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8384 * if mapping failed free memory back to system since
8385 * there isn't much point in holding memory we can't use
8387 if (dma_mapping_error(rx_ring->dev, dma)) {
8390 rx_ring->rx_stats.alloc_failed++;
8396 bi->page_offset = 0;
8401 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8403 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8404 * @adapter: address of board private structure
8406 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8408 union e1000_adv_rx_desc *rx_desc;
8409 struct igb_rx_buffer *bi;
8410 u16 i = rx_ring->next_to_use;
8416 rx_desc = IGB_RX_DESC(rx_ring, i);
8417 bi = &rx_ring->rx_buffer_info[i];
8418 i -= rx_ring->count;
8421 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8422 if (!igb_alloc_mapped_skb(rx_ring, bi))
8424 if (!igb_alloc_mapped_page(rx_ring, bi))
8425 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8429 * Refresh the desc even if buffer_addrs didn't change
8430 * because each write-back erases this info.
8432 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8433 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8435 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8442 rx_desc = IGB_RX_DESC(rx_ring, 0);
8443 bi = rx_ring->rx_buffer_info;
8444 i -= rx_ring->count;
8447 /* clear the hdr_addr for the next_to_use descriptor */
8448 rx_desc->read.hdr_addr = 0;
8451 } while (cleaned_count);
8453 i += rx_ring->count;
8455 if (rx_ring->next_to_use != i) {
8456 /* record the next descriptor to use */
8457 rx_ring->next_to_use = i;
8459 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8460 /* update next to alloc since we have filled the ring */
8461 rx_ring->next_to_alloc = i;
8465 * Force memory writes to complete before letting h/w
8466 * know there are new descriptors to fetch. (Only
8467 * applicable for weak-ordered memory model archs,
8471 writel(i, rx_ring->tail);
8482 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8484 struct igb_adapter *adapter = netdev_priv(netdev);
8485 struct mii_ioctl_data *data = if_mii(ifr);
8487 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8492 data->phy_id = adapter->hw.phy.addr;
8495 if (!capable(CAP_NET_ADMIN))
8497 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8505 return E1000_SUCCESS;
8515 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8522 return igb_mii_ioctl(netdev, ifr, cmd);
8524 #ifdef HAVE_PTP_1588_CLOCK
8526 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8527 #endif /* HAVE_PTP_1588_CLOCK */
8528 #ifdef ETHTOOL_OPS_COMPAT
8530 return ethtool_ioctl(ifr);
8537 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8539 struct igb_adapter *adapter = hw->back;
8542 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8544 return -E1000_ERR_CONFIG;
8546 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8548 return E1000_SUCCESS;
8551 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8553 struct igb_adapter *adapter = hw->back;
8556 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8558 return -E1000_ERR_CONFIG;
8560 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8562 return E1000_SUCCESS;
8565 #ifdef HAVE_VLAN_RX_REGISTER
8566 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8568 void igb_vlan_mode(struct net_device *netdev, u32 features)
8571 struct igb_adapter *adapter = netdev_priv(netdev);
8572 struct e1000_hw *hw = &adapter->hw;
8575 #ifdef HAVE_VLAN_RX_REGISTER
8576 bool enable = !!vlgrp;
8578 igb_irq_disable(adapter);
8580 adapter->vlgrp = vlgrp;
8582 if (!test_bit(__IGB_DOWN, &adapter->state))
8583 igb_irq_enable(adapter);
8585 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8586 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8588 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8593 /* enable VLAN tag insert/strip */
8594 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8595 ctrl |= E1000_CTRL_VME;
8596 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8598 /* Disable CFI check */
8599 rctl = E1000_READ_REG(hw, E1000_RCTL);
8600 rctl &= ~E1000_RCTL_CFIEN;
8601 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8603 /* disable VLAN tag insert/strip */
8604 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8605 ctrl &= ~E1000_CTRL_VME;
8606 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8609 #ifndef CONFIG_IGB_VMDQ_NETDEV
8610 for (i = 0; i < adapter->vmdq_pools; i++) {
8611 igb_set_vf_vlan_strip(adapter,
8612 adapter->vfs_allocated_count + i,
8617 igb_set_vf_vlan_strip(adapter,
8618 adapter->vfs_allocated_count,
8621 for (i = 1; i < adapter->vmdq_pools; i++) {
8622 #ifdef HAVE_VLAN_RX_REGISTER
8623 struct igb_vmdq_adapter *vadapter;
8624 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8625 enable = !!vadapter->vlgrp;
8627 struct net_device *vnetdev;
8628 vnetdev = adapter->vmdq_netdev[i-1];
8629 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8630 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8632 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8635 igb_set_vf_vlan_strip(adapter,
8636 adapter->vfs_allocated_count + i,
8641 igb_rlpml_set(adapter);
8644 #ifdef HAVE_VLAN_PROTOCOL
8645 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8646 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8647 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8648 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8649 __always_unused __be16 proto, u16 vid)
8651 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8654 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8657 struct igb_adapter *adapter = netdev_priv(netdev);
8658 int pf_id = adapter->vfs_allocated_count;
8660 /* attempt to add filter to vlvf array */
8661 igb_vlvf_set(adapter, vid, TRUE, pf_id);
8663 /* add the filter since PF can receive vlans w/o entry in vlvf */
8664 igb_vfta_set(adapter, vid, TRUE);
8665 #ifndef HAVE_NETDEV_VLAN_FEATURES
8667 /* Copy feature flags from netdev to the vlan netdev for this vid.
8668 * This allows things like TSO to bubble down to our vlan device.
8669 * There is no need to update netdev for vlan 0 (DCB), since it
8670 * wouldn't has v_netdev.
8672 if (adapter->vlgrp) {
8673 struct vlan_group *vlgrp = adapter->vlgrp;
8674 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8676 v_netdev->features |= netdev->features;
8677 vlan_group_set_device(vlgrp, vid, v_netdev);
8681 #ifndef HAVE_VLAN_RX_REGISTER
8683 set_bit(vid, adapter->active_vlans);
8685 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8690 #ifdef HAVE_VLAN_PROTOCOL
8691 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8692 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8693 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8694 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8695 __always_unused __be16 proto, u16 vid)
8697 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8700 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8703 struct igb_adapter *adapter = netdev_priv(netdev);
8704 int pf_id = adapter->vfs_allocated_count;
8707 #ifdef HAVE_VLAN_RX_REGISTER
8708 igb_irq_disable(adapter);
8710 vlan_group_set_device(adapter->vlgrp, vid, NULL);
8712 if (!test_bit(__IGB_DOWN, &adapter->state))
8713 igb_irq_enable(adapter);
8715 #endif /* HAVE_VLAN_RX_REGISTER */
8716 /* remove vlan from VLVF table array */
8717 err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8719 /* if vid was not present in VLVF just remove it from table */
8721 igb_vfta_set(adapter, vid, FALSE);
8722 #ifndef HAVE_VLAN_RX_REGISTER
8724 clear_bit(vid, adapter->active_vlans);
8726 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8731 static void igb_restore_vlan(struct igb_adapter *adapter)
8733 #ifdef HAVE_VLAN_RX_REGISTER
8734 igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8736 if (adapter->vlgrp) {
8738 for (vid = 0; vid < VLAN_N_VID; vid++) {
8739 if (!vlan_group_get_device(adapter->vlgrp, vid))
8741 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8742 igb_vlan_rx_add_vid(adapter->netdev,
8743 htons(ETH_P_8021Q), vid);
8745 igb_vlan_rx_add_vid(adapter->netdev, vid);
8752 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8754 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8755 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8756 igb_vlan_rx_add_vid(adapter->netdev,
8757 htons(ETH_P_8021Q), vid);
8759 igb_vlan_rx_add_vid(adapter->netdev, vid);
8764 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8766 struct pci_dev *pdev = adapter->pdev;
8767 struct e1000_mac_info *mac = &adapter->hw.mac;
8771 /* SerDes device's does not support 10Mbps Full/duplex
8772 * and 100Mbps Half duplex
8774 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8776 case SPEED_10 + DUPLEX_HALF:
8777 case SPEED_10 + DUPLEX_FULL:
8778 case SPEED_100 + DUPLEX_HALF:
8779 dev_err(pci_dev_to_dev(pdev),
8780 "Unsupported Speed/Duplex configuration\n");
8788 case SPEED_10 + DUPLEX_HALF:
8789 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8791 case SPEED_10 + DUPLEX_FULL:
8792 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8794 case SPEED_100 + DUPLEX_HALF:
8795 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8797 case SPEED_100 + DUPLEX_FULL:
8798 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8800 case SPEED_1000 + DUPLEX_FULL:
8802 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8804 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8806 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8810 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8811 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8816 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8819 struct net_device *netdev = pci_get_drvdata(pdev);
8820 struct igb_adapter *adapter = netdev_priv(netdev);
8821 struct e1000_hw *hw = &adapter->hw;
8822 u32 ctrl, rctl, status;
8823 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8828 netif_device_detach(netdev);
8830 status = E1000_READ_REG(hw, E1000_STATUS);
8831 if (status & E1000_STATUS_LU)
8832 wufc &= ~E1000_WUFC_LNKC;
8834 if (netif_running(netdev))
8835 __igb_close(netdev, true);
8837 igb_clear_interrupt_scheme(adapter);
8840 retval = pci_save_state(pdev);
8846 igb_setup_rctl(adapter);
8847 igb_set_rx_mode(netdev);
8849 /* turn on all-multi mode if wake on multicast is enabled */
8850 if (wufc & E1000_WUFC_MC) {
8851 rctl = E1000_READ_REG(hw, E1000_RCTL);
8852 rctl |= E1000_RCTL_MPE;
8853 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8856 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8857 /* phy power management enable */
8858 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8859 ctrl |= E1000_CTRL_ADVD3WUC;
8860 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8862 /* Allow time for pending master requests to run */
8863 e1000_disable_pcie_master(hw);
8865 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8866 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8868 E1000_WRITE_REG(hw, E1000_WUC, 0);
8869 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8872 *enable_wake = wufc || adapter->en_mng_pt;
8874 igb_power_down_link(adapter);
8876 igb_power_up_link(adapter);
8878 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8879 * would have already happened in close and is redundant. */
8880 igb_release_hw_control(adapter);
8882 pci_disable_device(pdev);
8888 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8889 static int igb_suspend(struct device *dev)
8891 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8892 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8894 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8895 struct pci_dev *pdev = to_pci_dev(dev);
8896 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8900 retval = __igb_shutdown(pdev, &wake, 0);
8905 pci_prepare_to_sleep(pdev);
8907 pci_wake_from_d3(pdev, false);
8908 pci_set_power_state(pdev, PCI_D3hot);
8914 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8915 static int igb_resume(struct device *dev)
8917 static int igb_resume(struct pci_dev *pdev)
8918 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8920 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8921 struct pci_dev *pdev = to_pci_dev(dev);
8922 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8923 struct net_device *netdev = pci_get_drvdata(pdev);
8924 struct igb_adapter *adapter = netdev_priv(netdev);
8925 struct e1000_hw *hw = &adapter->hw;
8928 pci_set_power_state(pdev, PCI_D0);
8929 pci_restore_state(pdev);
8930 pci_save_state(pdev);
8932 err = pci_enable_device_mem(pdev);
8934 dev_err(pci_dev_to_dev(pdev),
8935 "igb: Cannot enable PCI device from suspend\n");
8938 pci_set_master(pdev);
8940 pci_enable_wake(pdev, PCI_D3hot, 0);
8941 pci_enable_wake(pdev, PCI_D3cold, 0);
8943 if (igb_init_interrupt_scheme(adapter, true)) {
8944 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8950 /* let the f/w know that the h/w is now under the control of the
8952 igb_get_hw_control(adapter);
8954 E1000_WRITE_REG(hw, E1000_WUS, ~0);
8956 if (netdev->flags & IFF_UP) {
8958 err = __igb_open(netdev, true);
8964 netif_device_attach(netdev);
8969 #ifdef CONFIG_PM_RUNTIME
8970 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8971 static int igb_runtime_idle(struct device *dev)
8973 struct pci_dev *pdev = to_pci_dev(dev);
8974 struct net_device *netdev = pci_get_drvdata(pdev);
8975 struct igb_adapter *adapter = netdev_priv(netdev);
8977 if (!igb_has_link(adapter))
8978 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8983 static int igb_runtime_suspend(struct device *dev)
8985 struct pci_dev *pdev = to_pci_dev(dev);
8989 retval = __igb_shutdown(pdev, &wake, 1);
8994 pci_prepare_to_sleep(pdev);
8996 pci_wake_from_d3(pdev, false);
8997 pci_set_power_state(pdev, PCI_D3hot);
9003 static int igb_runtime_resume(struct device *dev)
9005 return igb_resume(dev);
9007 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9008 #endif /* CONFIG_PM_RUNTIME */
9009 #endif /* CONFIG_PM */
9011 #ifdef USE_REBOOT_NOTIFIER
9012 /* only want to do this for 2.4 kernels? */
9013 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9016 struct pci_dev *pdev = NULL;
9023 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9024 if (pci_dev_driver(pdev) == &igb_driver) {
9025 __igb_shutdown(pdev, &wake, 0);
9026 if (event == SYS_POWER_OFF) {
9027 pci_wake_from_d3(pdev, wake);
9028 pci_set_power_state(pdev, PCI_D3hot);
9036 static void igb_shutdown(struct pci_dev *pdev)
9040 __igb_shutdown(pdev, &wake, 0);
9042 if (system_state == SYSTEM_POWER_OFF) {
9043 pci_wake_from_d3(pdev, wake);
9044 pci_set_power_state(pdev, PCI_D3hot);
9047 #endif /* USE_REBOOT_NOTIFIER */
9049 #ifdef CONFIG_NET_POLL_CONTROLLER
9051 * Polling 'interrupt' - used by things like netconsole to send skbs
9052 * without having to re-enable interrupts. It's not called while
9053 * the interrupt routine is executing.
9055 static void igb_netpoll(struct net_device *netdev)
9057 struct igb_adapter *adapter = netdev_priv(netdev);
9058 struct e1000_hw *hw = &adapter->hw;
9059 struct igb_q_vector *q_vector;
9062 for (i = 0; i < adapter->num_q_vectors; i++) {
9063 q_vector = adapter->q_vector[i];
9064 if (adapter->msix_entries)
9065 E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9067 igb_irq_disable(adapter);
9068 napi_schedule(&q_vector->napi);
9071 #endif /* CONFIG_NET_POLL_CONTROLLER */
9074 #define E1000_DEV_ID_82576_VF 0x10CA
9076 * igb_io_error_detected - called when PCI error is detected
9077 * @pdev: Pointer to PCI device
9078 * @state: The current pci connection state
9080 * This function is called after a PCI bus error affecting
9081 * this device has been detected.
9083 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9084 pci_channel_state_t state)
9086 struct net_device *netdev = pci_get_drvdata(pdev);
9087 struct igb_adapter *adapter = netdev_priv(netdev);
9089 #ifdef CONFIG_PCI_IOV__UNUSED
9090 struct pci_dev *bdev, *vfdev;
9091 u32 dw0, dw1, dw2, dw3;
9093 u16 req_id, pf_func;
9095 if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9096 goto skip_bad_vf_detection;
9098 bdev = pdev->bus->self;
9099 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9100 bdev = bdev->bus->self;
9103 goto skip_bad_vf_detection;
9105 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9107 goto skip_bad_vf_detection;
9109 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9110 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9111 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9112 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9115 /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9116 if (!(req_id & 0x0080))
9117 goto skip_bad_vf_detection;
9119 pf_func = req_id & 0x01;
9120 if ((pf_func & 1) == (pdev->devfn & 1)) {
9122 vf = (req_id & 0x7F) >> 1;
9123 dev_err(pci_dev_to_dev(pdev),
9124 "VF %d has caused a PCIe error\n", vf);
9125 dev_err(pci_dev_to_dev(pdev),
9126 "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9127 "%8.8x\tdw3: %8.8x\n",
9128 dw0, dw1, dw2, dw3);
9130 /* Find the pci device of the offending VF */
9131 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9132 E1000_DEV_ID_82576_VF, NULL);
9134 if (vfdev->devfn == (req_id & 0xFF))
9136 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9137 E1000_DEV_ID_82576_VF, vfdev);
9140 * There's a slim chance the VF could have been hot plugged,
9141 * so if it is no longer present we don't need to issue the
9142 * VFLR. Just clean up the AER in that case.
9145 dev_err(pci_dev_to_dev(pdev),
9146 "Issuing VFLR to VF %d\n", vf);
9147 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9150 pci_cleanup_aer_uncorrect_error_status(pdev);
9154 * Even though the error may have occurred on the other port
9155 * we still need to increment the vf error reference count for
9156 * both ports because the I/O resume function will be called
9159 adapter->vferr_refcount++;
9161 return PCI_ERS_RESULT_RECOVERED;
9163 skip_bad_vf_detection:
9164 #endif /* CONFIG_PCI_IOV */
9166 netif_device_detach(netdev);
9168 if (state == pci_channel_io_perm_failure)
9169 return PCI_ERS_RESULT_DISCONNECT;
9171 if (netif_running(netdev))
9173 pci_disable_device(pdev);
9175 /* Request a slot slot reset. */
9176 return PCI_ERS_RESULT_NEED_RESET;
9180 * igb_io_slot_reset - called after the pci bus has been reset.
9181 * @pdev: Pointer to PCI device
9183 * Restart the card from scratch, as if from a cold-boot. Implementation
9184 * resembles the first-half of the igb_resume routine.
9186 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9188 struct net_device *netdev = pci_get_drvdata(pdev);
9189 struct igb_adapter *adapter = netdev_priv(netdev);
9190 struct e1000_hw *hw = &adapter->hw;
9191 pci_ers_result_t result;
9193 if (pci_enable_device_mem(pdev)) {
9194 dev_err(pci_dev_to_dev(pdev),
9195 "Cannot re-enable PCI device after reset.\n");
9196 result = PCI_ERS_RESULT_DISCONNECT;
9198 pci_set_master(pdev);
9199 pci_restore_state(pdev);
9200 pci_save_state(pdev);
9202 pci_enable_wake(pdev, PCI_D3hot, 0);
9203 pci_enable_wake(pdev, PCI_D3cold, 0);
9205 schedule_work(&adapter->reset_task);
9206 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9207 result = PCI_ERS_RESULT_RECOVERED;
9210 pci_cleanup_aer_uncorrect_error_status(pdev);
9216 * igb_io_resume - called when traffic can start flowing again.
9217 * @pdev: Pointer to PCI device
9219 * This callback is called when the error recovery driver tells us that
9220 * its OK to resume normal operation. Implementation resembles the
9221 * second-half of the igb_resume routine.
9223 static void igb_io_resume(struct pci_dev *pdev)
9225 struct net_device *netdev = pci_get_drvdata(pdev);
9226 struct igb_adapter *adapter = netdev_priv(netdev);
9228 if (adapter->vferr_refcount) {
9229 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9230 adapter->vferr_refcount--;
9234 if (netif_running(netdev)) {
9235 if (igb_up(adapter)) {
9236 dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9241 netif_device_attach(netdev);
9243 /* let the f/w know that the h/w is now under the control of the
9245 igb_get_hw_control(adapter);
9248 #endif /* HAVE_PCI_ERS */
9250 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9252 struct e1000_hw *hw = &adapter->hw;
9255 if (is_zero_ether_addr(addr))
9258 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9259 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9261 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9262 IGB_MAC_STATE_IN_USE);
9263 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9264 adapter->mac_table[i].queue = queue;
9265 igb_sync_mac_table(adapter);
9270 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9272 /* search table for addr, if found, set to 0 and sync */
9274 struct e1000_hw *hw = &adapter->hw;
9276 if (is_zero_ether_addr(addr))
9278 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9279 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9280 adapter->mac_table[i].queue == queue) {
9281 adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9282 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9283 adapter->mac_table[i].queue = 0;
9284 igb_sync_mac_table(adapter);
9290 static int igb_set_vf_mac(struct igb_adapter *adapter,
9291 int vf, unsigned char *mac_addr)
9293 igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9294 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9296 igb_add_mac_filter(adapter, mac_addr, vf);
9302 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9304 struct igb_adapter *adapter = netdev_priv(netdev);
9305 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9307 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9308 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9309 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9310 " change effective.\n");
9311 if (test_bit(__IGB_DOWN, &adapter->state)) {
9312 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9313 " but the PF device is not up.\n");
9314 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9315 " attempting to use the VF device.\n");
9317 return igb_set_vf_mac(adapter, vf, mac);
9320 static int igb_link_mbps(int internal_link_speed)
9322 switch (internal_link_speed) {
9334 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9341 /* Calculate the rate factor values to set */
9342 rf_int = link_speed / tx_rate;
9343 rf_dec = (link_speed - (rf_int * tx_rate));
9344 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9346 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9347 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9348 E1000_RTTBCNRC_RF_INT_MASK);
9349 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9354 E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9356 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9357 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9359 E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9360 E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9363 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9365 int actual_link_speed, i;
9366 bool reset_rate = false;
9368 /* VF TX rate limit was not set */
9369 if ((adapter->vf_rate_link_speed == 0) ||
9370 (adapter->hw.mac.type != e1000_82576))
9373 actual_link_speed = igb_link_mbps(adapter->link_speed);
9374 if (actual_link_speed != adapter->vf_rate_link_speed) {
9376 adapter->vf_rate_link_speed = 0;
9377 dev_info(&adapter->pdev->dev,
9378 "Link speed has been changed. VF Transmit rate is disabled\n");
9381 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9383 adapter->vf_data[i].tx_rate = 0;
9385 igb_set_vf_rate_limit(&adapter->hw, i,
9386 adapter->vf_data[i].tx_rate, actual_link_speed);
9390 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9392 struct igb_adapter *adapter = netdev_priv(netdev);
9393 struct e1000_hw *hw = &adapter->hw;
9394 int actual_link_speed;
9396 if (hw->mac.type != e1000_82576)
9399 actual_link_speed = igb_link_mbps(adapter->link_speed);
9400 if ((vf >= adapter->vfs_allocated_count) ||
9401 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9402 (tx_rate < 0) || (tx_rate > actual_link_speed))
9405 adapter->vf_rate_link_speed = actual_link_speed;
9406 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9407 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9412 static int igb_ndo_get_vf_config(struct net_device *netdev,
9413 int vf, struct ifla_vf_info *ivi)
9415 struct igb_adapter *adapter = netdev_priv(netdev);
9416 if (vf >= adapter->vfs_allocated_count)
9419 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9420 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9421 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9422 ivi->qos = adapter->vf_data[vf].pf_qos;
9423 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9424 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9429 static void igb_vmm_control(struct igb_adapter *adapter)
9431 struct e1000_hw *hw = &adapter->hw;
9435 switch (hw->mac.type) {
9438 /* replication is not supported for 82575 */
9441 /* notify HW that the MAC is adding vlan tags */
9442 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9443 reg |= (E1000_DTXCTL_VLAN_ADDED |
9444 E1000_DTXCTL_SPOOF_INT);
9445 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9447 /* enable replication vlan tag stripping */
9448 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9449 reg |= E1000_RPLOLR_STRVLAN;
9450 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9453 /* none of the above registers are supported by i350 */
9457 /* Enable Malicious Driver Detection */
9458 if ((adapter->vfs_allocated_count) &&
9460 if (hw->mac.type == e1000_i350)
9461 igb_enable_mdd(adapter);
9464 /* enable replication and loopback support */
9465 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9466 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9467 e1000_vmdq_set_loopback_pf(hw, 1);
9468 e1000_vmdq_set_anti_spoofing_pf(hw,
9469 adapter->vfs_allocated_count || adapter->vmdq_pools,
9470 adapter->vfs_allocated_count);
9471 e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9472 adapter->vmdq_pools);
9475 static void igb_init_fw(struct igb_adapter *adapter)
9477 struct e1000_fw_drv_info fw_cmd;
9478 struct e1000_hw *hw = &adapter->hw;
9482 if (hw->mac.type == e1000_i210)
9483 mask = E1000_SWFW_EEP_SM;
9485 mask = E1000_SWFW_PHY0_SM;
9486 /* i211 parts do not support this feature */
9487 if (hw->mac.type == e1000_i211)
9488 hw->mac.arc_subsystem_valid = false;
9490 if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9491 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9492 E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9493 fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9494 fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9495 fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9496 fw_cmd.port_num = hw->bus.func;
9497 fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9498 fw_cmd.hdr.checksum = 0;
9499 fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9501 fw_cmd.hdr.buf_len));
9502 e1000_host_interface_command(hw, (u8*)&fw_cmd,
9504 if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9508 dev_warn(pci_dev_to_dev(adapter->pdev),
9509 "Unable to get semaphore, firmware init failed.\n");
9510 hw->mac.ops.release_swfw_sync(hw, mask);
9513 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9515 struct e1000_hw *hw = &adapter->hw;
9520 if (hw->mac.type == e1000_i211)
9523 if (hw->mac.type > e1000_82580) {
9524 if (adapter->dmac != IGB_DMAC_DISABLE) {
9527 /* force threshold to 0. */
9528 E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9531 * DMA Coalescing high water mark needs to be greater
9532 * than the Rx threshold. Set hwm to PBA - max frame
9533 * size in 16B units, capping it at PBA - 6KB.
9535 hwm = 64 * pba - adapter->max_frame_size / 16;
9536 if (hwm < 64 * (pba - 6))
9537 hwm = 64 * (pba - 6);
9538 reg = E1000_READ_REG(hw, E1000_FCRTC);
9539 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9540 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9541 & E1000_FCRTC_RTH_COAL_MASK);
9542 E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9545 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9546 * frame size, capping it at PBA - 10KB.
9548 dmac_thr = pba - adapter->max_frame_size / 512;
9549 if (dmac_thr < pba - 10)
9550 dmac_thr = pba - 10;
9551 reg = E1000_READ_REG(hw, E1000_DMACR);
9552 reg &= ~E1000_DMACR_DMACTHR_MASK;
9553 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9554 & E1000_DMACR_DMACTHR_MASK);
9556 /* transition to L0x or L1 if available..*/
9557 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9559 /* Check if status is 2.5Gb backplane connection
9560 * before configuration of watchdog timer, which is
9561 * in msec values in 12.8usec intervals
9562 * watchdog timer= msec values in 32usec intervals
9563 * for non 2.5Gb connection
9565 if (hw->mac.type == e1000_i354) {
9566 status = E1000_READ_REG(hw, E1000_STATUS);
9567 if ((status & E1000_STATUS_2P5_SKU) &&
9568 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9569 reg |= ((adapter->dmac * 5) >> 6);
9571 reg |= ((adapter->dmac) >> 5);
9573 reg |= ((adapter->dmac) >> 5);
9577 * Disable BMC-to-OS Watchdog enable
9578 * on devices that support OS-to-BMC
9580 if (hw->mac.type != e1000_i354)
9581 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9582 E1000_WRITE_REG(hw, E1000_DMACR, reg);
9584 /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9585 E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9587 /* This sets the time to wait before requesting
9588 * transition to low power state to number of usecs
9589 * needed to receive 1 512 byte frame at gigabit
9590 * line rate. On i350 device, time to make transition
9591 * to Lx state is delayed by 4 usec with flush disable
9592 * bit set to avoid losing mailbox interrupts
9594 reg = E1000_READ_REG(hw, E1000_DMCTLX);
9595 if (hw->mac.type == e1000_i350)
9596 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9598 /* in 2.5Gb connection, TTLX unit is 0.4 usec
9599 * which is 0x4*2 = 0xA. But delay is still 4 usec
9601 if (hw->mac.type == e1000_i354) {
9602 status = E1000_READ_REG(hw, E1000_STATUS);
9603 if ((status & E1000_STATUS_2P5_SKU) &&
9604 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9611 E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9613 /* free space in tx packet buffer to wake from DMA coal */
9614 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9615 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9617 /* make low power state decision controlled by DMA coal */
9618 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9619 reg &= ~E1000_PCIEMISC_LX_DECISION;
9620 E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9621 } /* endif adapter->dmac is not disabled */
9622 } else if (hw->mac.type == e1000_82580) {
9623 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9624 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9625 reg & ~E1000_PCIEMISC_LX_DECISION);
9626 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9630 #ifdef HAVE_I2C_SUPPORT
9631 /* igb_read_i2c_byte - Reads 8 bit word over I2C
9632 * @hw: pointer to hardware structure
9633 * @byte_offset: byte offset to read
9634 * @dev_addr: device address
9637 * Performs byte read operation over I2C interface at
9638 * a specified device address.
9640 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9641 u8 dev_addr, u8 *data)
9643 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9644 struct i2c_client *this_client = adapter->i2c_client;
9649 return E1000_ERR_I2C;
9651 swfw_mask = E1000_SWFW_PHY0_SM;
9653 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9655 return E1000_ERR_SWFW_SYNC;
9657 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9658 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9661 return E1000_ERR_I2C;
9664 return E1000_SUCCESS;
9668 /* igb_write_i2c_byte - Writes 8 bit word over I2C
9669 * @hw: pointer to hardware structure
9670 * @byte_offset: byte offset to write
9671 * @dev_addr: device address
9672 * @data: value to write
9674 * Performs byte write operation over I2C interface at
9675 * a specified device address.
9677 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9678 u8 dev_addr, u8 data)
9680 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9681 struct i2c_client *this_client = adapter->i2c_client;
9683 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9686 return E1000_ERR_I2C;
9688 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9689 return E1000_ERR_SWFW_SYNC;
9690 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9691 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9694 return E1000_ERR_I2C;
9696 return E1000_SUCCESS;
9698 #endif /* HAVE_I2C_SUPPORT */
9703 * igb_probe - Device Initialization Routine
9704 * @pdev: PCI device information struct
9705 * @ent: entry in igb_pci_tbl
9707 * Returns 0 on success, negative on failure
9709 * igb_probe initializes an adapter identified by a pci_dev structure.
9710 * The OS initialization, configuring of the adapter private structure,
9711 * and a hardware reset occur.
9713 int igb_kni_probe(struct pci_dev *pdev,
9714 struct net_device **lad_dev)
9716 struct net_device *netdev;
9717 struct igb_adapter *adapter;
9718 struct e1000_hw *hw;
9719 u16 eeprom_data = 0;
9720 u8 pba_str[E1000_PBANUM_LENGTH];
9722 static int global_quad_port_a; /* global quad port a indication */
9723 int i, err, pci_using_dac = 0;
9724 static int cards_found;
9726 err = pci_enable_device_mem(pdev);
9732 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9734 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9738 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9740 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9742 IGB_ERR("No usable DMA configuration, "
9749 #ifndef HAVE_ASPM_QUIRKS
9750 /* 82575 requires that the pci-e link partner disable the L0s state */
9751 switch (pdev->device) {
9752 case E1000_DEV_ID_82575EB_COPPER:
9753 case E1000_DEV_ID_82575EB_FIBER_SERDES:
9754 case E1000_DEV_ID_82575GB_QUAD_COPPER:
9755 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9760 #endif /* HAVE_ASPM_QUIRKS */
9761 err = pci_request_selected_regions(pdev,
9762 pci_select_bars(pdev,
9768 pci_enable_pcie_error_reporting(pdev);
9770 pci_set_master(pdev);
9775 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9778 netdev = alloc_etherdev(sizeof(struct igb_adapter));
9779 #endif /* HAVE_TX_MQ */
9781 goto err_alloc_etherdev;
9783 SET_MODULE_OWNER(netdev);
9784 SET_NETDEV_DEV(netdev, &pdev->dev);
9786 //pci_set_drvdata(pdev, netdev);
9787 adapter = netdev_priv(netdev);
9788 adapter->netdev = netdev;
9789 adapter->pdev = pdev;
9792 adapter->port_num = hw->bus.func;
9793 adapter->msg_enable = (1 << debug) - 1;
9796 err = pci_save_state(pdev);
9801 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9802 pci_resource_len(pdev, 0));
9806 #ifdef HAVE_NET_DEVICE_OPS
9807 netdev->netdev_ops = &igb_netdev_ops;
9808 #else /* HAVE_NET_DEVICE_OPS */
9809 netdev->open = &igb_open;
9810 netdev->stop = &igb_close;
9811 netdev->get_stats = &igb_get_stats;
9812 #ifdef HAVE_SET_RX_MODE
9813 netdev->set_rx_mode = &igb_set_rx_mode;
9815 netdev->set_multicast_list = &igb_set_rx_mode;
9816 netdev->set_mac_address = &igb_set_mac;
9817 netdev->change_mtu = &igb_change_mtu;
9818 netdev->do_ioctl = &igb_ioctl;
9819 #ifdef HAVE_TX_TIMEOUT
9820 netdev->tx_timeout = &igb_tx_timeout;
9822 netdev->vlan_rx_register = igb_vlan_mode;
9823 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9824 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9825 #ifdef CONFIG_NET_POLL_CONTROLLER
9826 netdev->poll_controller = igb_netpoll;
9828 netdev->hard_start_xmit = &igb_xmit_frame;
9829 #endif /* HAVE_NET_DEVICE_OPS */
9830 igb_set_ethtool_ops(netdev);
9831 #ifdef HAVE_TX_TIMEOUT
9832 netdev->watchdog_timeo = 5 * HZ;
9835 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9837 adapter->bd_number = cards_found;
9839 /* setup the private structure */
9840 err = igb_sw_init(adapter);
9844 e1000_get_bus_info(hw);
9846 hw->phy.autoneg_wait_to_complete = FALSE;
9847 hw->mac.adaptive_ifs = FALSE;
9849 /* Copper options */
9850 if (hw->phy.media_type == e1000_media_type_copper) {
9851 hw->phy.mdix = AUTO_ALL_MODES;
9852 hw->phy.disable_polarity_correction = FALSE;
9853 hw->phy.ms_type = e1000_ms_hw_default;
9856 if (e1000_check_reset_block(hw))
9857 dev_info(pci_dev_to_dev(pdev),
9858 "PHY reset is blocked due to SOL/IDER session.\n");
9861 * features is initialized to 0 in allocation, it might have bits
9862 * set by igb_sw_init so we should use an or instead of an
9865 netdev->features |= NETIF_F_SG |
9867 #ifdef NETIF_F_IPV6_CSUM
9875 #endif /* NETIF_F_TSO */
9876 #ifdef NETIF_F_RXHASH
9880 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9881 NETIF_F_HW_VLAN_CTAG_RX |
9882 NETIF_F_HW_VLAN_CTAG_TX;
9884 NETIF_F_HW_VLAN_RX |
9888 if (hw->mac.type >= e1000_82576)
9889 netdev->features |= NETIF_F_SCTP_CSUM;
9891 #ifdef HAVE_NDO_SET_FEATURES
9892 /* copy netdev features into list of user selectable features */
9893 netdev->hw_features |= netdev->features;
9896 /* give us the option of enabling LRO later */
9897 netdev->hw_features |= NETIF_F_LRO;
9902 /* this is only needed on kernels prior to 2.6.39 */
9903 netdev->features |= NETIF_F_GRO;
9907 /* set this bit last since it cannot be part of hw_features */
9908 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9909 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9911 netdev->features |= NETIF_F_HW_VLAN_FILTER;
9914 #ifdef HAVE_NETDEV_VLAN_FEATURES
9915 netdev->vlan_features |= NETIF_F_TSO |
9923 netdev->features |= NETIF_F_HIGHDMA;
9926 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9928 if (adapter->dmac != IGB_DMAC_DISABLE)
9929 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9932 /* before reading the NVM, reset the controller to put the device in a
9933 * known good starting state */
9937 /* make sure the NVM is good */
9938 if (e1000_validate_nvm_checksum(hw) < 0) {
9939 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9945 /* copy the MAC address out of the NVM */
9946 if (e1000_read_mac_addr(hw))
9947 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9948 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9949 #ifdef ETHTOOL_GPERMADDR
9950 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9952 if (!is_valid_ether_addr(netdev->perm_addr)) {
9954 if (!is_valid_ether_addr(netdev->dev_addr)) {
9956 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
9961 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
9962 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
9963 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
9964 igb_rar_set(adapter, 0);
9966 /* get firmware version for ethtool -i */
9967 igb_set_fw_version(adapter);
9969 /* Check if Media Autosense is enabled */
9970 if (hw->mac.type == e1000_82580)
9971 igb_init_mas(adapter);
9974 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
9975 (unsigned long) adapter);
9976 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
9977 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
9978 (unsigned long) adapter);
9979 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
9980 (unsigned long) adapter);
9982 INIT_WORK(&adapter->reset_task, igb_reset_task);
9983 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
9984 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
9985 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
9988 /* Initialize link properties that are user-changeable */
9989 adapter->fc_autoneg = true;
9990 hw->mac.autoneg = true;
9991 hw->phy.autoneg_advertised = 0x2f;
9993 hw->fc.requested_mode = e1000_fc_default;
9994 hw->fc.current_mode = e1000_fc_default;
9996 e1000_validate_mdi_setting(hw);
9998 /* By default, support wake on port A */
9999 if (hw->bus.func == 0)
10000 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10002 /* Check the NVM for wake support for non-port A ports */
10003 if (hw->mac.type >= e1000_82580)
10004 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10005 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10007 else if (hw->bus.func == 1)
10008 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10010 if (eeprom_data & IGB_EEPROM_APME)
10011 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10013 /* now that we have the eeprom settings, apply the special cases where
10014 * the eeprom may be wrong or the board simply won't support wake on
10015 * lan on a particular port */
10016 switch (pdev->device) {
10017 case E1000_DEV_ID_82575GB_QUAD_COPPER:
10018 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10020 case E1000_DEV_ID_82575EB_FIBER_SERDES:
10021 case E1000_DEV_ID_82576_FIBER:
10022 case E1000_DEV_ID_82576_SERDES:
10023 /* Wake events only supported on port A for dual fiber
10024 * regardless of eeprom setting */
10025 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10026 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10028 case E1000_DEV_ID_82576_QUAD_COPPER:
10029 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10030 /* if quad port adapter, disable WoL on all but port A */
10031 if (global_quad_port_a != 0)
10032 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10034 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10035 /* Reset for multiple quad port adapters */
10036 if (++global_quad_port_a == 4)
10037 global_quad_port_a = 0;
10040 /* If the device can't wake, don't set software support */
10041 if (!device_can_wakeup(&adapter->pdev->dev))
10042 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10046 /* initialize the wol settings based on the eeprom settings */
10047 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10048 adapter->wol |= E1000_WUFC_MAG;
10050 /* Some vendors want WoL disabled by default, but still supported */
10051 if ((hw->mac.type == e1000_i350) &&
10052 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10053 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10058 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10059 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10061 /* reset the hardware with the new settings */
10062 igb_reset(adapter);
10063 adapter->devrc = 0;
10065 #ifdef HAVE_I2C_SUPPORT
10066 /* Init the I2C interface */
10067 err = igb_init_i2c(adapter);
10069 dev_err(&pdev->dev, "failed to init i2c interface\n");
10072 #endif /* HAVE_I2C_SUPPORT */
10074 /* let the f/w know that the h/w is now under the control of the
10076 igb_get_hw_control(adapter);
10078 strncpy(netdev->name, "eth%d", IFNAMSIZ);
10079 err = register_netdev(netdev);
10083 #ifdef CONFIG_IGB_VMDQ_NETDEV
10084 err = igb_init_vmdq_netdevs(adapter);
10088 /* carrier off reporting is important to ethtool even BEFORE open */
10089 netif_carrier_off(netdev);
10092 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10093 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10094 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10095 igb_setup_dca(adapter);
10099 #ifdef HAVE_PTP_1588_CLOCK
10100 /* do hw tstamp init after resetting */
10101 igb_ptp_init(adapter);
10102 #endif /* HAVE_PTP_1588_CLOCK */
10104 #endif /* NO_KNI */
10105 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10106 /* print bus type/speed/width info */
10107 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10109 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10110 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10111 (hw->mac.type == e1000_i354) ? "integrated" :
10113 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10114 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10115 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10116 (hw->mac.type == e1000_i354) ? "integrated" :
10118 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10119 for (i = 0; i < 6; i++)
10120 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10122 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10124 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10125 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10129 /* Initialize the thermal sensor on i350 devices. */
10130 if (hw->mac.type == e1000_i350) {
10131 if (hw->bus.func == 0) {
10135 * Read the NVM to determine if this i350 device
10136 * supports an external thermal sensor.
10138 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10139 if (ets_word != 0x0000 && ets_word != 0xFFFF)
10140 adapter->ets = true;
10142 adapter->ets = false;
10147 igb_sysfs_init(adapter);
10151 igb_procfs_init(adapter);
10152 #endif /* IGB_PROCFS */
10153 #endif /* IGB_HWMON */
10154 #endif /* NO_KNI */
10156 adapter->ets = false;
10159 if (hw->phy.media_type == e1000_media_type_copper) {
10160 switch (hw->mac.type) {
10164 /* Enable EEE for internal copper PHY devices */
10165 err = e1000_set_eee_i350(hw);
10167 (adapter->flags & IGB_FLAG_EEE))
10168 adapter->eee_advert =
10169 MDIO_EEE_100TX | MDIO_EEE_1000T;
10172 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10173 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10174 err = e1000_set_eee_i354(hw);
10176 (adapter->flags & IGB_FLAG_EEE))
10177 adapter->eee_advert =
10178 MDIO_EEE_100TX | MDIO_EEE_1000T;
10186 /* send driver version info to firmware */
10187 if (hw->mac.type >= e1000_i350)
10188 igb_init_fw(adapter);
10191 if (netdev->features & NETIF_F_LRO)
10192 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10194 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10196 dev_info(pci_dev_to_dev(pdev),
10197 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10198 adapter->msix_entries ? "MSI-X" :
10199 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10200 adapter->num_rx_queues, adapter->num_tx_queues);
10205 pm_runtime_put_noidle(&pdev->dev);
10209 // igb_release_hw_control(adapter);
10210 #ifdef HAVE_I2C_SUPPORT
10211 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10212 #endif /* HAVE_I2C_SUPPORT */
10214 // if (!e1000_check_reset_block(hw))
10215 // e1000_phy_hw_reset(hw);
10217 if (hw->flash_address)
10218 iounmap(hw->flash_address);
10220 // igb_clear_interrupt_scheme(adapter);
10221 // igb_reset_sriov_capability(adapter);
10222 iounmap(hw->hw_addr);
10224 free_netdev(netdev);
10225 err_alloc_etherdev:
10226 // pci_release_selected_regions(pdev,
10227 // pci_select_bars(pdev, IORESOURCE_MEM));
10230 pci_disable_device(pdev);
10235 void igb_kni_remove(struct pci_dev *pdev)
10237 pci_disable_device(pdev);