1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/tcp.h>
36 #include <net/checksum.h>
38 #include <linux/ipv6.h>
39 #include <net/ip6_checksum.h>
43 #include <linux/mii.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #ifdef CONFIG_PM_RUNTIME
50 #include <linux/pm_runtime.h>
51 #endif /* CONFIG_PM_RUNTIME */
53 #include <linux/if_bridge.h>
57 #include <linux/uio_driver.h>
59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
60 #define DRV_DEBUG "_debug"
65 #define VERSION_SUFFIX
70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
72 char igb_driver_name[] = "igb";
73 char igb_driver_version[] = DRV_VERSION;
74 static const char igb_driver_string[] =
75 "Intel(R) Gigabit Ethernet Network Driver";
76 static const char igb_copyright[] =
77 "Copyright (c) 2007-2013 Intel Corporation.";
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
115 /* required last entry */
119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
121 void igb_reset(struct igb_adapter *);
122 static int igb_setup_all_tx_resources(struct igb_adapter *);
123 static int igb_setup_all_rx_resources(struct igb_adapter *);
124 static void igb_free_all_tx_resources(struct igb_adapter *);
125 static void igb_free_all_rx_resources(struct igb_adapter *);
126 static void igb_setup_mrqc(struct igb_adapter *);
127 void igb_update_stats(struct igb_adapter *);
128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
129 static void __devexit igb_remove(struct pci_dev *pdev);
130 static int igb_sw_init(struct igb_adapter *);
131 static int igb_open(struct net_device *);
132 static int igb_close(struct net_device *);
133 static void igb_configure(struct igb_adapter *);
134 static void igb_configure_tx(struct igb_adapter *);
135 static void igb_configure_rx(struct igb_adapter *);
136 static void igb_clean_all_tx_rings(struct igb_adapter *);
137 static void igb_clean_all_rx_rings(struct igb_adapter *);
138 static void igb_clean_tx_ring(struct igb_ring *);
139 static void igb_set_rx_mode(struct net_device *);
140 static void igb_update_phy_info(unsigned long);
141 static void igb_watchdog(unsigned long);
142 static void igb_watchdog_task(struct work_struct *);
143 static void igb_dma_err_task(struct work_struct *);
144 static void igb_dma_err_timer(unsigned long data);
145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
146 static struct net_device_stats *igb_get_stats(struct net_device *);
147 static int igb_change_mtu(struct net_device *, int);
148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
149 static int igb_set_mac(struct net_device *, void *);
150 static void igb_set_uta(struct igb_adapter *adapter);
151 static irqreturn_t igb_intr(int irq, void *);
152 static irqreturn_t igb_intr_msi(int irq, void *);
153 static irqreturn_t igb_msix_other(int irq, void *);
154 static irqreturn_t igb_msix_ring(int irq, void *);
156 static void igb_update_dca(struct igb_q_vector *);
157 static void igb_setup_dca(struct igb_adapter *);
159 static int igb_poll(struct napi_struct *, int);
160 static bool igb_clean_tx_irq(struct igb_q_vector *);
161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
163 static void igb_tx_timeout(struct net_device *);
164 static void igb_reset_task(struct work_struct *);
165 #ifdef HAVE_VLAN_RX_REGISTER
166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
168 #ifdef HAVE_VLAN_PROTOCOL
169 static int igb_vlan_rx_add_vid(struct net_device *,
171 static int igb_vlan_rx_kill_vid(struct net_device *,
173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
175 static int igb_vlan_rx_add_vid(struct net_device *,
176 __always_unused __be16 proto, u16);
177 static int igb_vlan_rx_kill_vid(struct net_device *,
178 __always_unused __be16 proto, u16);
180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
187 static void igb_restore_vlan(struct igb_adapter *);
188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
189 static void igb_ping_all_vfs(struct igb_adapter *);
190 static void igb_msg_task(struct igb_adapter *);
191 static void igb_vmm_control(struct igb_adapter *);
192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
194 static void igb_process_mdd_event(struct igb_adapter *);
196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
198 int vf, u16 vlan, u8 qos);
199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
203 #ifdef HAVE_VF_MIN_MAX_TXRATE
204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
205 #else /* HAVE_VF_MIN_MAX_TXRATE */
206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
209 struct ifla_vf_info *ivi);
210 static void igb_check_vf_rate_limit(struct igb_adapter *);
212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
215 static int igb_suspend(struct device *dev);
216 static int igb_resume(struct device *dev);
217 #ifdef CONFIG_PM_RUNTIME
218 static int igb_runtime_suspend(struct device *dev);
219 static int igb_runtime_resume(struct device *dev);
220 static int igb_runtime_idle(struct device *dev);
221 #endif /* CONFIG_PM_RUNTIME */
222 static const struct dev_pm_ops igb_pm_ops = {
223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
224 .suspend = igb_suspend,
225 .resume = igb_resume,
226 .freeze = igb_suspend,
228 .poweroff = igb_suspend,
229 .restore = igb_resume,
230 #ifdef CONFIG_PM_RUNTIME
231 .runtime_suspend = igb_runtime_suspend,
232 .runtime_resume = igb_runtime_resume,
233 .runtime_idle = igb_runtime_idle,
235 #else /* Linux >= 2.6.34 */
236 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
237 #ifdef CONFIG_PM_RUNTIME
238 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
240 #endif /* CONFIG_PM_RUNTIME */
241 #endif /* Linux version */
244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
245 static int igb_resume(struct pci_dev *pdev);
246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
247 #endif /* CONFIG_PM */
248 #ifndef USE_REBOOT_NOTIFIER
249 static void igb_shutdown(struct pci_dev *);
251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
252 static struct notifier_block igb_notifier_reboot = {
253 .notifier_call = igb_notify_reboot,
259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
260 static struct notifier_block dca_notifier = {
261 .notifier_call = igb_notify_dca,
266 #ifdef CONFIG_NET_POLL_CONTROLLER
267 /* for netdump / net console */
268 static void igb_netpoll(struct net_device *);
272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
273 pci_channel_state_t);
274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
275 static void igb_io_resume(struct pci_dev *);
277 static struct pci_error_handlers igb_err_handler = {
278 .error_detected = igb_io_error_detected,
279 .slot_reset = igb_io_slot_reset,
280 .resume = igb_io_resume,
284 static void igb_init_fw(struct igb_adapter *adapter);
285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
287 static struct pci_driver igb_driver = {
288 .name = igb_driver_name,
289 .id_table = igb_pci_tbl,
291 .remove = __devexit_p(igb_remove),
293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
294 .driver.pm = &igb_pm_ops,
296 .suspend = igb_suspend,
297 .resume = igb_resume,
298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
299 #endif /* CONFIG_PM */
300 #ifndef USE_REBOOT_NOTIFIER
301 .shutdown = igb_shutdown,
304 .err_handler = &igb_err_handler
308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
310 //MODULE_LICENSE("GPL");
311 //MODULE_VERSION(DRV_VERSION);
313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
315 struct e1000_hw *hw = &adapter->hw;
316 struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
317 u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
318 u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
322 * if this is the management vlan the only option is to add it in so
323 * that the management pass through will continue to work
325 if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
326 (vid == mng_cookie->vlan_id))
329 vfta = adapter->shadow_vfta[index];
336 e1000_write_vfta(hw, index, vfta);
337 adapter->shadow_vfta[index] = vfta;
340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
341 //module_param(debug, int, 0);
342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
345 * igb_init_module - Driver Registration Routine
347 * igb_init_module is the first routine called when the driver is
348 * loaded. All it does is register with the PCI subsystem.
350 static int __init igb_init_module(void)
354 printk(KERN_INFO "%s - version %s\n",
355 igb_driver_string, igb_driver_version);
357 printk(KERN_INFO "%s\n", igb_copyright);
359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
362 if (igb_procfs_topdir_init())
363 printk(KERN_INFO "Procfs failed to initialize topdir\n");
364 #endif /* IGB_PROCFS */
365 #endif /* IGB_HWMON */
368 dca_register_notify(&dca_notifier);
370 ret = pci_register_driver(&igb_driver);
371 #ifdef USE_REBOOT_NOTIFIER
373 register_reboot_notifier(&igb_notifier_reboot);
380 #define module_init(x) static int x(void) __attribute__((__unused__));
381 module_init(igb_init_module);
384 * igb_exit_module - Driver Exit Cleanup Routine
386 * igb_exit_module is called just before the driver is removed
389 static void __exit igb_exit_module(void)
392 dca_unregister_notify(&dca_notifier);
394 #ifdef USE_REBOOT_NOTIFIER
395 unregister_reboot_notifier(&igb_notifier_reboot);
397 pci_unregister_driver(&igb_driver);
400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
403 igb_procfs_topdir_exit();
404 #endif /* IGB_PROCFS */
405 #endif /* IGB_HWMON */
409 #define module_exit(x) static void x(void) __attribute__((__unused__));
410 module_exit(igb_exit_module);
412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
414 * igb_cache_ring_register - Descriptor ring to register mapping
415 * @adapter: board private structure to initialize
417 * Once we know the feature-set enabled for the device, we'll cache
418 * the register offset the descriptor ring is assigned to.
420 static void igb_cache_ring_register(struct igb_adapter *adapter)
423 u32 rbase_offset = adapter->vfs_allocated_count;
425 switch (adapter->hw.mac.type) {
427 /* The queues are allocated for virtualization such that VF 0
428 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
429 * In order to avoid collision we start at the first free queue
430 * and continue consuming queues in the same sequence
432 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
433 for (; i < adapter->rss_queues; i++)
434 adapter->rx_ring[i]->reg_idx = rbase_offset +
444 for (; i < adapter->num_rx_queues; i++)
445 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
446 for (; j < adapter->num_tx_queues; j++)
447 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
452 static void igb_configure_lli(struct igb_adapter *adapter)
454 struct e1000_hw *hw = &adapter->hw;
457 /* LLI should only be enabled for MSI-X or MSI interrupts */
458 if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
461 if (adapter->lli_port) {
462 /* use filter 0 for port */
463 port = htons((u16)adapter->lli_port);
464 E1000_WRITE_REG(hw, E1000_IMIR(0),
465 (port | E1000_IMIR_PORT_IM_EN));
466 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
467 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
470 if (adapter->flags & IGB_FLAG_LLI_PUSH) {
471 /* use filter 1 for push flag */
472 E1000_WRITE_REG(hw, E1000_IMIR(1),
473 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
474 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
475 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
478 if (adapter->lli_size) {
479 /* use filter 2 for size */
480 E1000_WRITE_REG(hw, E1000_IMIR(2),
481 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
482 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
483 (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
489 * igb_write_ivar - configure ivar for given MSI-X vector
490 * @hw: pointer to the HW structure
491 * @msix_vector: vector number we are allocating to a given ring
492 * @index: row index of IVAR register to write within IVAR table
493 * @offset: column offset of in IVAR, should be multiple of 8
495 * This function is intended to handle the writing of the IVAR register
496 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
497 * each containing an cause allocation for an Rx and Tx ring, and a
498 * variable number of rows depending on the number of queues supported.
500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
501 int index, int offset)
503 u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
505 /* clear any bits that are currently set */
506 ivar &= ~((u32)0xFF << offset);
508 /* write vector and valid bit */
509 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
511 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
514 #define IGB_N0_QUEUE -1
515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
517 struct igb_adapter *adapter = q_vector->adapter;
518 struct e1000_hw *hw = &adapter->hw;
519 int rx_queue = IGB_N0_QUEUE;
520 int tx_queue = IGB_N0_QUEUE;
523 if (q_vector->rx.ring)
524 rx_queue = q_vector->rx.ring->reg_idx;
525 if (q_vector->tx.ring)
526 tx_queue = q_vector->tx.ring->reg_idx;
528 switch (hw->mac.type) {
530 /* The 82575 assigns vectors using a bitmask, which matches the
531 bitmask for the EICR/EIMS/EIMC registers. To assign one
532 or more queues to a vector, we write the appropriate bits
533 into the MSIXBM register for that vector. */
534 if (rx_queue > IGB_N0_QUEUE)
535 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
536 if (tx_queue > IGB_N0_QUEUE)
537 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
538 if (!adapter->msix_entries && msix_vector == 0)
539 msixbm |= E1000_EIMS_OTHER;
540 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
541 q_vector->eims_value = msixbm;
545 * 82576 uses a table that essentially consists of 2 columns
546 * with 8 rows. The ordering is column-major so we use the
547 * lower 3 bits as the row index, and the 4th bit as the
550 if (rx_queue > IGB_N0_QUEUE)
551 igb_write_ivar(hw, msix_vector,
553 (rx_queue & 0x8) << 1);
554 if (tx_queue > IGB_N0_QUEUE)
555 igb_write_ivar(hw, msix_vector,
557 ((tx_queue & 0x8) << 1) + 8);
558 q_vector->eims_value = 1 << msix_vector;
566 * On 82580 and newer adapters the scheme is similar to 82576
567 * however instead of ordering column-major we have things
568 * ordered row-major. So we traverse the table by using
569 * bit 0 as the column offset, and the remaining bits as the
572 if (rx_queue > IGB_N0_QUEUE)
573 igb_write_ivar(hw, msix_vector,
575 (rx_queue & 0x1) << 4);
576 if (tx_queue > IGB_N0_QUEUE)
577 igb_write_ivar(hw, msix_vector,
579 ((tx_queue & 0x1) << 4) + 8);
580 q_vector->eims_value = 1 << msix_vector;
587 /* add q_vector eims value to global eims_enable_mask */
588 adapter->eims_enable_mask |= q_vector->eims_value;
590 /* configure q_vector to set itr on first interrupt */
591 q_vector->set_itr = 1;
595 * igb_configure_msix - Configure MSI-X hardware
597 * igb_configure_msix sets up the hardware to properly
598 * generate MSI-X interrupts.
600 static void igb_configure_msix(struct igb_adapter *adapter)
604 struct e1000_hw *hw = &adapter->hw;
606 adapter->eims_enable_mask = 0;
608 /* set vector for other causes, i.e. link changes */
609 switch (hw->mac.type) {
611 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
612 /* enable MSI-X PBA support*/
613 tmp |= E1000_CTRL_EXT_PBA_CLR;
615 /* Auto-Mask interrupts upon ICR read. */
616 tmp |= E1000_CTRL_EXT_EIAME;
617 tmp |= E1000_CTRL_EXT_IRCA;
619 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
621 /* enable msix_other interrupt */
622 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
624 adapter->eims_other = E1000_EIMS_OTHER;
634 /* Turn on MSI-X capability first, or our settings
635 * won't stick. And it will take days to debug. */
636 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
637 E1000_GPIE_PBA | E1000_GPIE_EIAME |
640 /* enable msix_other interrupt */
641 adapter->eims_other = 1 << vector;
642 tmp = (vector++ | E1000_IVAR_VALID) << 8;
644 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
647 /* do nothing, since nothing else supports MSI-X */
649 } /* switch (hw->mac.type) */
651 adapter->eims_enable_mask |= adapter->eims_other;
653 for (i = 0; i < adapter->num_q_vectors; i++)
654 igb_assign_vector(adapter->q_vector[i], vector++);
656 E1000_WRITE_FLUSH(hw);
660 * igb_request_msix - Initialize MSI-X interrupts
662 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
665 static int igb_request_msix(struct igb_adapter *adapter)
667 struct net_device *netdev = adapter->netdev;
668 struct e1000_hw *hw = &adapter->hw;
669 int i, err = 0, vector = 0, free_vector = 0;
671 err = request_irq(adapter->msix_entries[vector].vector,
672 &igb_msix_other, 0, netdev->name, adapter);
676 for (i = 0; i < adapter->num_q_vectors; i++) {
677 struct igb_q_vector *q_vector = adapter->q_vector[i];
681 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
683 if (q_vector->rx.ring && q_vector->tx.ring)
684 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
685 q_vector->rx.ring->queue_index);
686 else if (q_vector->tx.ring)
687 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
688 q_vector->tx.ring->queue_index);
689 else if (q_vector->rx.ring)
690 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
691 q_vector->rx.ring->queue_index);
693 sprintf(q_vector->name, "%s-unused", netdev->name);
695 err = request_irq(adapter->msix_entries[vector].vector,
696 igb_msix_ring, 0, q_vector->name,
702 igb_configure_msix(adapter);
706 /* free already assigned IRQs */
707 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
710 for (i = 0; i < vector; i++) {
711 free_irq(adapter->msix_entries[free_vector++].vector,
712 adapter->q_vector[i]);
718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
720 if (adapter->msix_entries) {
721 pci_disable_msix(adapter->pdev);
722 kfree(adapter->msix_entries);
723 adapter->msix_entries = NULL;
724 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
725 pci_disable_msi(adapter->pdev);
730 * igb_free_q_vector - Free memory allocated for specific interrupt vector
731 * @adapter: board private structure to initialize
732 * @v_idx: Index of vector to be freed
734 * This function frees the memory allocated to the q_vector. In addition if
735 * NAPI is enabled it will delete any references to the NAPI struct prior
736 * to freeing the q_vector.
738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
740 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
742 if (q_vector->tx.ring)
743 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
745 if (q_vector->rx.ring)
746 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
748 adapter->q_vector[v_idx] = NULL;
749 netif_napi_del(&q_vector->napi);
751 __skb_queue_purge(&q_vector->lrolist.active);
757 * igb_free_q_vectors - Free memory allocated for interrupt vectors
758 * @adapter: board private structure to initialize
760 * This function frees the memory allocated to the q_vectors. In addition if
761 * NAPI is enabled it will delete any references to the NAPI struct prior
762 * to freeing the q_vector.
764 static void igb_free_q_vectors(struct igb_adapter *adapter)
766 int v_idx = adapter->num_q_vectors;
768 adapter->num_tx_queues = 0;
769 adapter->num_rx_queues = 0;
770 adapter->num_q_vectors = 0;
773 igb_free_q_vector(adapter, v_idx);
777 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
779 * This function resets the device so that it has 0 rx queues, tx queues, and
780 * MSI-X interrupts allocated.
782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
784 igb_free_q_vectors(adapter);
785 igb_reset_interrupt_capability(adapter);
789 * igb_process_mdd_event
790 * @adapter - board private structure
792 * Identify a malicious VF, disable the VF TX/RX queues and log a message.
794 static void igb_process_mdd_event(struct igb_adapter *adapter)
796 struct e1000_hw *hw = &adapter->hw;
797 u32 lvmmc, vfte, vfre, mdfb;
800 lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
801 vf_queue = lvmmc >> 29;
803 /* VF index cannot be bigger or equal to VFs allocated */
804 if (vf_queue >= adapter->vfs_allocated_count)
807 netdev_info(adapter->netdev,
808 "VF %d misbehaved. VF queues are disabled. "
809 "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
811 /* Disable VFTE and VFRE related bits */
812 vfte = E1000_READ_REG(hw, E1000_VFTE);
813 vfte &= ~(1 << vf_queue);
814 E1000_WRITE_REG(hw, E1000_VFTE, vfte);
816 vfre = E1000_READ_REG(hw, E1000_VFRE);
817 vfre &= ~(1 << vf_queue);
818 E1000_WRITE_REG(hw, E1000_VFRE, vfre);
820 /* Disable MDFB related bit. Clear on write */
821 mdfb = E1000_READ_REG(hw, E1000_MDFB);
822 mdfb |= (1 << vf_queue);
823 E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
825 /* Reset the specific VF */
826 E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
831 * @adapter - board private structure
833 * Disable MDD behavior in the HW
835 static void igb_disable_mdd(struct igb_adapter *adapter)
837 struct e1000_hw *hw = &adapter->hw;
840 if ((hw->mac.type != e1000_i350) ||
841 (hw->mac.type != e1000_i354))
844 reg = E1000_READ_REG(hw, E1000_DTXCTL);
845 reg &= (~E1000_DTXCTL_MDP_EN);
846 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
851 * @adapter - board private structure
853 * Enable the HW to detect malicious driver and sends an interrupt to
856 static void igb_enable_mdd(struct igb_adapter *adapter)
858 struct e1000_hw *hw = &adapter->hw;
861 /* Only available on i350 device */
862 if (hw->mac.type != e1000_i350)
865 reg = E1000_READ_REG(hw, E1000_DTXCTL);
866 reg |= E1000_DTXCTL_MDP_EN;
867 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
871 * igb_reset_sriov_capability - disable SR-IOV if enabled
873 * Attempt to disable single root IO virtualization capabilites present in the
876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
878 struct pci_dev *pdev = adapter->pdev;
879 struct e1000_hw *hw = &adapter->hw;
881 /* reclaim resources allocated to VFs */
882 if (adapter->vf_data) {
883 if (!pci_vfs_assigned(pdev)) {
885 * disable iov and allow time for transactions to
888 pci_disable_sriov(pdev);
891 dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
893 dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
894 "VF(s) are assigned to guests!\n");
896 /* Disable Malicious Driver Detection */
897 igb_disable_mdd(adapter);
899 /* free vf data storage */
900 kfree(adapter->vf_data);
901 adapter->vf_data = NULL;
903 /* switch rings back to PF ownership */
904 E1000_WRITE_REG(hw, E1000_IOVCTL,
905 E1000_IOVCTL_REUSE_VFQ);
906 E1000_WRITE_FLUSH(hw);
910 adapter->vfs_allocated_count = 0;
914 * igb_set_sriov_capability - setup SR-IOV if supported
916 * Attempt to enable single root IO virtualization capabilites present in the
919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
921 struct pci_dev *pdev = adapter->pdev;
925 old_vfs = pci_num_vf(pdev);
927 dev_info(pci_dev_to_dev(pdev),
928 "%d pre-allocated VFs found - override "
929 "max_vfs setting of %d\n", old_vfs,
930 adapter->vfs_allocated_count);
931 adapter->vfs_allocated_count = old_vfs;
933 /* no VFs requested, do nothing */
934 if (!adapter->vfs_allocated_count)
937 /* allocate vf data storage */
938 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
939 sizeof(struct vf_data_storage),
942 if (adapter->vf_data) {
944 if (pci_enable_sriov(pdev,
945 adapter->vfs_allocated_count))
948 for (i = 0; i < adapter->vfs_allocated_count; i++)
949 igb_vf_configure(adapter, i);
951 switch (adapter->hw.mac.type) {
954 /* Enable VM to VM loopback by default */
955 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
958 /* Currently no other hardware supports loopback */
962 /* DMA Coalescing is not supported in IOV mode. */
963 if (adapter->hw.mac.type >= e1000_i350)
964 adapter->dmac = IGB_DMAC_DISABLE;
965 if (adapter->hw.mac.type < e1000_i350)
966 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
972 kfree(adapter->vf_data);
973 adapter->vf_data = NULL;
974 adapter->vfs_allocated_count = 0;
975 dev_warn(pci_dev_to_dev(pdev),
976 "Failed to initialize SR-IOV virtualization\n");
980 * igb_set_interrupt_capability - set MSI or MSI-X if supported
982 * Attempt to configure interrupts using the best available
983 * capabilities of the hardware and kernel.
985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
987 struct pci_dev *pdev = adapter->pdev;
992 adapter->int_mode = IGB_INT_MODE_MSI;
994 /* Number of supported queues. */
995 adapter->num_rx_queues = adapter->rss_queues;
997 if (adapter->vmdq_pools > 1)
998 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1001 if (adapter->vmdq_pools)
1002 adapter->num_tx_queues = adapter->vmdq_pools;
1004 adapter->num_tx_queues = adapter->num_rx_queues;
1006 adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1009 switch (adapter->int_mode) {
1010 case IGB_INT_MODE_MSIX:
1011 /* start with one vector for every rx queue */
1012 numvecs = adapter->num_rx_queues;
1014 /* if tx handler is separate add 1 for every tx queue */
1015 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016 numvecs += adapter->num_tx_queues;
1018 /* store the number of vectors reserved for queues */
1019 adapter->num_q_vectors = numvecs;
1021 /* add 1 vector for link status interrupts */
1023 adapter->msix_entries = kcalloc(numvecs,
1024 sizeof(struct msix_entry),
1026 if (adapter->msix_entries) {
1027 for (i = 0; i < numvecs; i++)
1028 adapter->msix_entries[i].entry = i;
1030 err = pci_enable_msix(pdev,
1031 adapter->msix_entries, numvecs);
1035 /* MSI-X failed, so fall through and try MSI */
1036 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037 "Falling back to MSI interrupts.\n");
1038 igb_reset_interrupt_capability(adapter);
1039 case IGB_INT_MODE_MSI:
1040 if (!pci_enable_msi(pdev))
1041 adapter->flags |= IGB_FLAG_HAS_MSI;
1043 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044 "interrupts. Falling back to legacy "
1047 case IGB_INT_MODE_LEGACY:
1048 /* disable advanced features and set number of queues to 1 */
1049 igb_reset_sriov_capability(adapter);
1050 adapter->vmdq_pools = 0;
1051 adapter->rss_queues = 1;
1052 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053 adapter->num_rx_queues = 1;
1054 adapter->num_tx_queues = 1;
1055 adapter->num_q_vectors = 1;
1056 /* Don't do anything; this is system default */
1061 static void igb_add_ring(struct igb_ring *ring,
1062 struct igb_ring_container *head)
1069 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070 * @adapter: board private structure to initialize
1071 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072 * @v_idx: index of vector in adapter struct
1073 * @txr_count: total number of Tx rings to allocate
1074 * @txr_idx: index of first Tx ring to allocate
1075 * @rxr_count: total number of Rx rings to allocate
1076 * @rxr_idx: index of first Rx ring to allocate
1078 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081 unsigned int v_count, unsigned int v_idx,
1082 unsigned int txr_count, unsigned int txr_idx,
1083 unsigned int rxr_count, unsigned int rxr_idx)
1085 struct igb_q_vector *q_vector;
1086 struct igb_ring *ring;
1087 int ring_count, size;
1089 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090 if (txr_count > 1 || rxr_count > 1)
1093 ring_count = txr_count + rxr_count;
1094 size = sizeof(struct igb_q_vector) +
1095 (sizeof(struct igb_ring) * ring_count);
1097 /* allocate q_vector and rings */
1098 q_vector = kzalloc(size, GFP_KERNEL);
1103 /* initialize LRO */
1104 __skb_queue_head_init(&q_vector->lrolist.active);
1107 /* initialize NAPI */
1108 netif_napi_add(adapter->netdev, &q_vector->napi,
1111 /* tie q_vector and adapter together */
1112 adapter->q_vector[v_idx] = q_vector;
1113 q_vector->adapter = adapter;
1115 /* initialize work limits */
1116 q_vector->tx.work_limit = adapter->tx_work_limit;
1118 /* initialize ITR configuration */
1119 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120 q_vector->itr_val = IGB_START_ITR;
1122 /* initialize pointer to rings */
1123 ring = q_vector->ring;
1127 /* rx or rx/tx vector */
1128 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129 q_vector->itr_val = adapter->rx_itr_setting;
1131 /* tx only vector */
1132 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133 q_vector->itr_val = adapter->tx_itr_setting;
1137 /* assign generic ring traits */
1138 ring->dev = &adapter->pdev->dev;
1139 ring->netdev = adapter->netdev;
1141 /* configure backlink on ring */
1142 ring->q_vector = q_vector;
1144 /* update q_vector Tx values */
1145 igb_add_ring(ring, &q_vector->tx);
1147 /* For 82575, context index must be unique per ring. */
1148 if (adapter->hw.mac.type == e1000_82575)
1149 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1151 /* apply Tx specific ring traits */
1152 ring->count = adapter->tx_ring_count;
1153 ring->queue_index = txr_idx;
1155 /* assign ring to adapter */
1156 adapter->tx_ring[txr_idx] = ring;
1158 /* push pointer to next ring */
1163 /* assign generic ring traits */
1164 ring->dev = &adapter->pdev->dev;
1165 ring->netdev = adapter->netdev;
1167 /* configure backlink on ring */
1168 ring->q_vector = q_vector;
1170 /* update q_vector Rx values */
1171 igb_add_ring(ring, &q_vector->rx);
1173 #ifndef HAVE_NDO_SET_FEATURES
1174 /* enable rx checksum */
1175 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1178 /* set flag indicating ring supports SCTP checksum offload */
1179 if (adapter->hw.mac.type >= e1000_82576)
1180 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1182 if ((adapter->hw.mac.type == e1000_i350) ||
1183 (adapter->hw.mac.type == e1000_i354))
1184 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1186 /* apply Rx specific ring traits */
1187 ring->count = adapter->rx_ring_count;
1188 ring->queue_index = rxr_idx;
1190 /* assign ring to adapter */
1191 adapter->rx_ring[rxr_idx] = ring;
1198 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199 * @adapter: board private structure to initialize
1201 * We allocate one q_vector per queue interrupt. If allocation fails we
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1206 int q_vectors = adapter->num_q_vectors;
1207 int rxr_remaining = adapter->num_rx_queues;
1208 int txr_remaining = adapter->num_tx_queues;
1209 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1212 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213 for (; rxr_remaining; v_idx++) {
1214 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1220 /* update counts and index */
1226 for (; v_idx < q_vectors; v_idx++) {
1227 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230 tqpv, txr_idx, rqpv, rxr_idx);
1235 /* update counts and index */
1236 rxr_remaining -= rqpv;
1237 txr_remaining -= tqpv;
1245 adapter->num_tx_queues = 0;
1246 adapter->num_rx_queues = 0;
1247 adapter->num_q_vectors = 0;
1250 igb_free_q_vector(adapter, v_idx);
1256 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1258 * This function initializes the interrupts and allocates all of the queues.
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1262 struct pci_dev *pdev = adapter->pdev;
1265 igb_set_interrupt_capability(adapter, msix);
1267 err = igb_alloc_q_vectors(adapter);
1269 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270 goto err_alloc_q_vectors;
1273 igb_cache_ring_register(adapter);
1277 err_alloc_q_vectors:
1278 igb_reset_interrupt_capability(adapter);
1283 * igb_request_irq - initialize interrupts
1285 * Attempts to configure interrupts using the best available
1286 * capabilities of the hardware and kernel.
1288 static int igb_request_irq(struct igb_adapter *adapter)
1290 struct net_device *netdev = adapter->netdev;
1291 struct pci_dev *pdev = adapter->pdev;
1294 if (adapter->msix_entries) {
1295 err = igb_request_msix(adapter);
1298 /* fall back to MSI */
1299 igb_free_all_tx_resources(adapter);
1300 igb_free_all_rx_resources(adapter);
1302 igb_clear_interrupt_scheme(adapter);
1303 igb_reset_sriov_capability(adapter);
1304 err = igb_init_interrupt_scheme(adapter, false);
1307 igb_setup_all_tx_resources(adapter);
1308 igb_setup_all_rx_resources(adapter);
1309 igb_configure(adapter);
1312 igb_assign_vector(adapter->q_vector[0], 0);
1314 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316 netdev->name, adapter);
1320 /* fall back to legacy interrupts */
1321 igb_reset_interrupt_capability(adapter);
1322 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1325 err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326 netdev->name, adapter);
1329 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1336 static void igb_free_irq(struct igb_adapter *adapter)
1338 if (adapter->msix_entries) {
1341 free_irq(adapter->msix_entries[vector++].vector, adapter);
1343 for (i = 0; i < adapter->num_q_vectors; i++)
1344 free_irq(adapter->msix_entries[vector++].vector,
1345 adapter->q_vector[i]);
1347 free_irq(adapter->pdev->irq, adapter);
1352 * igb_irq_disable - Mask off interrupt generation on the NIC
1353 * @adapter: board private structure
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1357 struct e1000_hw *hw = &adapter->hw;
1360 * we need to be careful when disabling interrupts. The VFs are also
1361 * mapped into these registers and so clearing the bits can cause
1362 * issues on the VF drivers so we only need to clear what we set
1364 if (adapter->msix_entries) {
1365 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368 regval = E1000_READ_REG(hw, E1000_EIAC);
1369 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1372 E1000_WRITE_REG(hw, E1000_IAM, 0);
1373 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374 E1000_WRITE_FLUSH(hw);
1376 if (adapter->msix_entries) {
1379 synchronize_irq(adapter->msix_entries[vector++].vector);
1381 for (i = 0; i < adapter->num_q_vectors; i++)
1382 synchronize_irq(adapter->msix_entries[vector++].vector);
1384 synchronize_irq(adapter->pdev->irq);
1389 * igb_irq_enable - Enable default interrupt generation settings
1390 * @adapter: board private structure
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1394 struct e1000_hw *hw = &adapter->hw;
1396 if (adapter->msix_entries) {
1397 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400 regval = E1000_READ_REG(hw, E1000_EIAM);
1401 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403 if (adapter->vfs_allocated_count) {
1404 E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405 ims |= E1000_IMS_VMMB;
1407 if ((adapter->hw.mac.type == e1000_i350) ||
1408 (adapter->hw.mac.type == e1000_i354))
1409 ims |= E1000_IMS_MDDET;
1411 E1000_WRITE_REG(hw, E1000_IMS, ims);
1413 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1415 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1422 struct e1000_hw *hw = &adapter->hw;
1423 u16 vid = adapter->hw.mng_cookie.vlan_id;
1424 u16 old_vid = adapter->mng_vlan_id;
1426 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427 /* add VID to filter table */
1428 igb_vfta_set(adapter, vid, TRUE);
1429 adapter->mng_vlan_id = vid;
1431 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1434 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1439 !test_bit(old_vid, adapter->active_vlans)) {
1441 /* remove VID from filter table */
1442 igb_vfta_set(adapter, old_vid, FALSE);
1447 * igb_release_hw_control - release control of the h/w to f/w
1448 * @adapter: address of board private structure
1450 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451 * For ASF and Pass Through versions of f/w this means that the
1452 * driver is no longer loaded.
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1457 struct e1000_hw *hw = &adapter->hw;
1460 /* Let firmware take over control of h/w */
1461 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1467 * igb_get_hw_control - get control of the h/w from f/w
1468 * @adapter: address of board private structure
1470 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471 * For ASF and Pass Through versions of f/w this means that
1472 * the driver is loaded.
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1477 struct e1000_hw *hw = &adapter->hw;
1480 /* Let firmware know the driver has taken over */
1481 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1487 * igb_configure - configure the hardware for RX and TX
1488 * @adapter: private board structure
1490 static void igb_configure(struct igb_adapter *adapter)
1492 struct net_device *netdev = adapter->netdev;
1495 igb_get_hw_control(adapter);
1496 igb_set_rx_mode(netdev);
1498 igb_restore_vlan(adapter);
1500 igb_setup_tctl(adapter);
1501 igb_setup_mrqc(adapter);
1502 igb_setup_rctl(adapter);
1504 igb_configure_tx(adapter);
1505 igb_configure_rx(adapter);
1507 e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509 if (adapter->num_tx_queues > 1)
1510 netdev->features |= NETIF_F_MULTI_QUEUE;
1512 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1515 /* call igb_desc_unused which always leaves
1516 * at least 1 descriptor unused to make sure
1517 * next_to_use != next_to_clean */
1518 for (i = 0; i < adapter->num_rx_queues; i++) {
1519 struct igb_ring *ring = adapter->rx_ring[i];
1520 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1525 * igb_power_up_link - Power up the phy/serdes link
1526 * @adapter: address of board private structure
1528 void igb_power_up_link(struct igb_adapter *adapter)
1530 e1000_phy_hw_reset(&adapter->hw);
1532 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533 e1000_power_up_phy(&adapter->hw);
1535 e1000_power_up_fiber_serdes_link(&adapter->hw);
1539 * igb_power_down_link - Power down the phy/serdes link
1540 * @adapter: address of board private structure
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1544 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545 e1000_power_down_phy(&adapter->hw);
1547 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1553 struct e1000_hw *hw = &adapter->hw;
1554 u32 ctrl_ext, connsw;
1555 bool swap_now = false;
1558 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560 link = igb_has_link(adapter);
1562 /* need to live swap if current media is copper and we have fiber/serdes
1566 if ((hw->phy.media_type == e1000_media_type_copper) &&
1567 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1569 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1570 /* copper signal takes time to appear */
1571 if (adapter->copper_tries < 2) {
1572 adapter->copper_tries++;
1573 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1574 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1577 adapter->copper_tries = 0;
1578 if ((connsw & E1000_CONNSW_PHYSD) &&
1579 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1581 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1582 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1588 switch (hw->phy.media_type) {
1589 case e1000_media_type_copper:
1590 dev_info(pci_dev_to_dev(adapter->pdev),
1591 "%s:MAS: changing media to fiber/serdes\n",
1592 adapter->netdev->name);
1594 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1595 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1596 adapter->copper_tries = 0;
1598 case e1000_media_type_internal_serdes:
1599 case e1000_media_type_fiber:
1600 dev_info(pci_dev_to_dev(adapter->pdev),
1601 "%s:MAS: changing media to copper\n",
1602 adapter->netdev->name);
1604 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1605 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1608 /* shouldn't get here during regular operation */
1609 dev_err(pci_dev_to_dev(adapter->pdev),
1610 "%s:AMS: Invalid media type found, returning\n",
1611 adapter->netdev->name);
1614 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1618 #ifdef HAVE_I2C_SUPPORT
1619 /* igb_get_i2c_data - Reads the I2C SDA data bit
1620 * @hw: pointer to hardware structure
1621 * @i2cctl: Current value of I2CCTL register
1623 * Returns the I2C data bit value
1625 static int igb_get_i2c_data(void *data)
1627 struct igb_adapter *adapter = (struct igb_adapter *)data;
1628 struct e1000_hw *hw = &adapter->hw;
1629 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1631 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1634 /* igb_set_i2c_data - Sets the I2C data bit
1635 * @data: pointer to hardware structure
1636 * @state: I2C data value (0 or 1) to set
1638 * Sets the I2C data bit
1640 static void igb_set_i2c_data(void *data, int state)
1642 struct igb_adapter *adapter = (struct igb_adapter *)data;
1643 struct e1000_hw *hw = &adapter->hw;
1644 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1647 i2cctl |= E1000_I2C_DATA_OUT;
1649 i2cctl &= ~E1000_I2C_DATA_OUT;
1651 i2cctl &= ~E1000_I2C_DATA_OE_N;
1652 i2cctl |= E1000_I2C_CLK_OE_N;
1654 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1655 E1000_WRITE_FLUSH(hw);
1659 /* igb_set_i2c_clk - Sets the I2C SCL clock
1660 * @data: pointer to hardware structure
1661 * @state: state to set clock
1663 * Sets the I2C clock line to state
1665 static void igb_set_i2c_clk(void *data, int state)
1667 struct igb_adapter *adapter = (struct igb_adapter *)data;
1668 struct e1000_hw *hw = &adapter->hw;
1669 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1672 i2cctl |= E1000_I2C_CLK_OUT;
1673 i2cctl &= ~E1000_I2C_CLK_OE_N;
1675 i2cctl &= ~E1000_I2C_CLK_OUT;
1676 i2cctl &= ~E1000_I2C_CLK_OE_N;
1678 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1679 E1000_WRITE_FLUSH(hw);
1682 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1683 * @data: pointer to hardware structure
1685 * Gets the I2C clock state
1687 static int igb_get_i2c_clk(void *data)
1689 struct igb_adapter *adapter = (struct igb_adapter *)data;
1690 struct e1000_hw *hw = &adapter->hw;
1691 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1693 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1696 static const struct i2c_algo_bit_data igb_i2c_algo = {
1697 .setsda = igb_set_i2c_data,
1698 .setscl = igb_set_i2c_clk,
1699 .getsda = igb_get_i2c_data,
1700 .getscl = igb_get_i2c_clk,
1705 /* igb_init_i2c - Init I2C interface
1706 * @adapter: pointer to adapter structure
1709 static s32 igb_init_i2c(struct igb_adapter *adapter)
1711 s32 status = E1000_SUCCESS;
1713 /* I2C interface supported on i350 devices */
1714 if (adapter->hw.mac.type != e1000_i350)
1715 return E1000_SUCCESS;
1717 /* Initialize the i2c bus which is controlled by the registers.
1718 * This bus will use the i2c_algo_bit structue that implements
1719 * the protocol through toggling of the 4 bits in the register.
1721 adapter->i2c_adap.owner = THIS_MODULE;
1722 adapter->i2c_algo = igb_i2c_algo;
1723 adapter->i2c_algo.data = adapter;
1724 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1725 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1726 strlcpy(adapter->i2c_adap.name, "igb BB",
1727 sizeof(adapter->i2c_adap.name));
1728 status = i2c_bit_add_bus(&adapter->i2c_adap);
1732 #endif /* HAVE_I2C_SUPPORT */
1734 * igb_up - Open the interface and prepare it to handle traffic
1735 * @adapter: board private structure
1737 int igb_up(struct igb_adapter *adapter)
1739 struct e1000_hw *hw = &adapter->hw;
1742 /* hardware has been reset, we need to reload some things */
1743 igb_configure(adapter);
1745 clear_bit(__IGB_DOWN, &adapter->state);
1747 for (i = 0; i < adapter->num_q_vectors; i++)
1748 napi_enable(&(adapter->q_vector[i]->napi));
1750 if (adapter->msix_entries)
1751 igb_configure_msix(adapter);
1753 igb_assign_vector(adapter->q_vector[0], 0);
1755 igb_configure_lli(adapter);
1757 /* Clear any pending interrupts. */
1758 E1000_READ_REG(hw, E1000_ICR);
1759 igb_irq_enable(adapter);
1761 /* notify VFs that reset has been completed */
1762 if (adapter->vfs_allocated_count) {
1763 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1764 reg_data |= E1000_CTRL_EXT_PFRSTD;
1765 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1768 netif_tx_start_all_queues(adapter->netdev);
1770 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1771 schedule_work(&adapter->dma_err_task);
1772 /* start the watchdog. */
1773 hw->mac.get_link_status = 1;
1774 schedule_work(&adapter->watchdog_task);
1776 if ((adapter->flags & IGB_FLAG_EEE) &&
1777 (!hw->dev_spec._82575.eee_disable))
1778 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1783 void igb_down(struct igb_adapter *adapter)
1785 struct net_device *netdev = adapter->netdev;
1786 struct e1000_hw *hw = &adapter->hw;
1790 /* signal that we're down so the interrupt handler does not
1791 * reschedule our watchdog timer */
1792 set_bit(__IGB_DOWN, &adapter->state);
1794 /* disable receives in the hardware */
1795 rctl = E1000_READ_REG(hw, E1000_RCTL);
1796 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797 /* flush and sleep below */
1799 netif_tx_stop_all_queues(netdev);
1801 /* disable transmits in the hardware */
1802 tctl = E1000_READ_REG(hw, E1000_TCTL);
1803 tctl &= ~E1000_TCTL_EN;
1804 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1805 /* flush both disables and wait for them to finish */
1806 E1000_WRITE_FLUSH(hw);
1807 usleep_range(10000, 20000);
1809 for (i = 0; i < adapter->num_q_vectors; i++)
1810 napi_disable(&(adapter->q_vector[i]->napi));
1812 igb_irq_disable(adapter);
1814 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1816 del_timer_sync(&adapter->watchdog_timer);
1817 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1818 del_timer_sync(&adapter->dma_err_timer);
1819 del_timer_sync(&adapter->phy_info_timer);
1821 netif_carrier_off(netdev);
1823 /* record the stats before reset*/
1824 igb_update_stats(adapter);
1826 adapter->link_speed = 0;
1827 adapter->link_duplex = 0;
1830 if (!pci_channel_offline(adapter->pdev))
1835 igb_clean_all_tx_rings(adapter);
1836 igb_clean_all_rx_rings(adapter);
1838 /* since we reset the hardware DCA settings were cleared */
1839 igb_setup_dca(adapter);
1843 void igb_reinit_locked(struct igb_adapter *adapter)
1845 WARN_ON(in_interrupt());
1846 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1847 usleep_range(1000, 2000);
1850 clear_bit(__IGB_RESETTING, &adapter->state);
1854 * igb_enable_mas - Media Autosense re-enable after swap
1856 * @adapter: adapter struct
1858 static s32 igb_enable_mas(struct igb_adapter *adapter)
1860 struct e1000_hw *hw = &adapter->hw;
1862 s32 ret_val = E1000_SUCCESS;
1864 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1865 if (hw->phy.media_type == e1000_media_type_copper) {
1866 /* configure for SerDes media detect */
1867 if (!(connsw & E1000_CONNSW_SERDESD)) {
1868 connsw |= E1000_CONNSW_ENRGSRC;
1869 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1870 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1871 E1000_WRITE_FLUSH(hw);
1872 } else if (connsw & E1000_CONNSW_SERDESD) {
1873 /* already SerDes, no need to enable anything */
1876 dev_info(pci_dev_to_dev(adapter->pdev),
1877 "%s:MAS: Unable to configure feature, disabling..\n",
1878 adapter->netdev->name);
1879 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1885 void igb_reset(struct igb_adapter *adapter)
1887 struct pci_dev *pdev = adapter->pdev;
1888 struct e1000_hw *hw = &adapter->hw;
1889 struct e1000_mac_info *mac = &hw->mac;
1890 struct e1000_fc_info *fc = &hw->fc;
1891 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1893 /* Repartition Pba for greater than 9k mtu
1894 * To take effect CTRL.RST is required.
1896 switch (mac->type) {
1900 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901 pba = e1000_rxpbs_adjust_82580(pba);
1904 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905 pba &= E1000_RXPBS_SIZE_MASK_82576;
1911 pba = E1000_PBA_34K;
1915 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1916 (mac->type < e1000_82576)) {
1917 /* adjust PBA for jumbo frames */
1918 E1000_WRITE_REG(hw, E1000_PBA, pba);
1920 /* To maintain wire speed transmits, the Tx FIFO should be
1921 * large enough to accommodate two full transmit packets,
1922 * rounded up to the next 1KB and expressed in KB. Likewise,
1923 * the Rx FIFO should be large enough to accommodate at least
1924 * one full receive packet and is similarly rounded up and
1925 * expressed in KB. */
1926 pba = E1000_READ_REG(hw, E1000_PBA);
1927 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928 tx_space = pba >> 16;
1929 /* lower 16 bits has Rx packet buffer allocation size in KB */
1931 /* the tx fifo also stores 16 bytes of information about the tx
1932 * but don't include ethernet FCS because hardware appends it */
1933 min_tx_space = (adapter->max_frame_size +
1934 sizeof(union e1000_adv_tx_desc) -
1936 min_tx_space = ALIGN(min_tx_space, 1024);
1937 min_tx_space >>= 10;
1938 /* software strips receive CRC, so leave room for it */
1939 min_rx_space = adapter->max_frame_size;
1940 min_rx_space = ALIGN(min_rx_space, 1024);
1941 min_rx_space >>= 10;
1943 /* If current Tx allocation is less than the min Tx FIFO size,
1944 * and the min Tx FIFO size is less than the current Rx FIFO
1945 * allocation, take space away from current Rx allocation */
1946 if (tx_space < min_tx_space &&
1947 ((min_tx_space - tx_space) < pba)) {
1948 pba = pba - (min_tx_space - tx_space);
1950 /* if short on rx space, rx wins and must trump tx
1952 if (pba < min_rx_space)
1955 E1000_WRITE_REG(hw, E1000_PBA, pba);
1958 /* flow control settings */
1959 /* The high water mark must be low enough to fit one full frame
1960 * (or the size used for early receive) above it in the Rx FIFO.
1961 * Set it to the lower of:
1962 * - 90% of the Rx FIFO size, or
1963 * - the full Rx FIFO size minus one full frame */
1964 hwm = min(((pba << 10) * 9 / 10),
1965 ((pba << 10) - 2 * adapter->max_frame_size));
1967 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1968 fc->low_water = fc->high_water - 16;
1969 fc->pause_time = 0xFFFF;
1971 fc->current_mode = fc->requested_mode;
1973 /* disable receive for all VFs and wait one second */
1974 if (adapter->vfs_allocated_count) {
1977 * Clear all flags except indication that the PF has set
1978 * the VF MAC addresses administratively
1980 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1983 /* ping all the active vfs to let them know we are going down */
1984 igb_ping_all_vfs(adapter);
1986 /* disable transmits and receives */
1987 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1988 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1991 /* Allow time for pending master requests to run */
1993 E1000_WRITE_REG(hw, E1000_WUC, 0);
1995 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996 e1000_setup_init_funcs(hw, TRUE);
1997 igb_check_options(adapter);
1998 e1000_get_bus_info(hw);
1999 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2001 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2002 if (igb_enable_mas(adapter))
2003 dev_err(pci_dev_to_dev(pdev),
2004 "Error enabling Media Auto Sense\n");
2006 if (e1000_init_hw(hw))
2007 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2010 * Flow control settings reset on hardware reset, so guarantee flow
2011 * control is off when forcing speed.
2013 if (!hw->mac.autoneg)
2014 e1000_force_mac_fc(hw);
2016 igb_init_dmac(adapter, pba);
2017 /* Re-initialize the thermal sensor on i350 devices. */
2018 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2020 * If present, re-initialize the external thermal sensor
2024 e1000_set_i2c_bb(hw);
2025 e1000_init_thermal_sensor_thresh(hw);
2028 /*Re-establish EEE setting */
2029 if (hw->phy.media_type == e1000_media_type_copper) {
2030 switch (mac->type) {
2034 e1000_set_eee_i350(hw);
2037 e1000_set_eee_i354(hw);
2044 if (!netif_running(adapter->netdev))
2045 igb_power_down_link(adapter);
2047 igb_update_mng_vlan(adapter);
2049 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050 E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2053 #ifdef HAVE_PTP_1588_CLOCK
2054 /* Re-enable PTP, where applicable. */
2055 igb_ptp_reset(adapter);
2056 #endif /* HAVE_PTP_1588_CLOCK */
2058 e1000_get_phy_info(hw);
2063 #ifdef HAVE_NDO_SET_FEATURES
2064 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2065 kni_netdev_features_t features)
2068 * Since there is no support for separate tx vlan accel
2069 * enabled make sure tx flag is cleared if rx is.
2071 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2072 if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2073 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2075 if (!(features & NETIF_F_HW_VLAN_RX))
2076 features &= ~NETIF_F_HW_VLAN_TX;
2079 /* If Rx checksum is disabled, then LRO should also be disabled */
2080 if (!(features & NETIF_F_RXCSUM))
2081 features &= ~NETIF_F_LRO;
2086 static int igb_set_features(struct net_device *netdev,
2087 kni_netdev_features_t features)
2089 u32 changed = netdev->features ^ features;
2091 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2092 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2094 if (changed & NETIF_F_HW_VLAN_RX)
2096 igb_vlan_mode(netdev, features);
2102 #ifdef USE_CONST_DEV_UC_CHAR
2103 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2104 struct net_device *dev,
2105 const unsigned char *addr,
2108 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2109 struct net_device *dev,
2110 unsigned char *addr,
2114 struct igb_adapter *adapter = netdev_priv(dev);
2115 struct e1000_hw *hw = &adapter->hw;
2118 if (!(adapter->vfs_allocated_count))
2121 /* Hardware does not support aging addresses so if a
2122 * ndm_state is given only allow permanent addresses
2124 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2125 pr_info("%s: FDB only supports static addresses\n",
2130 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2131 u32 rar_uc_entries = hw->mac.rar_entry_count -
2132 (adapter->vfs_allocated_count + 1);
2134 if (netdev_uc_count(dev) < rar_uc_entries)
2135 err = dev_uc_add_excl(dev, addr);
2138 } else if (is_multicast_ether_addr(addr)) {
2139 err = dev_mc_add_excl(dev, addr);
2144 /* Only return duplicate errors if NLM_F_EXCL is set */
2145 if (err == -EEXIST && !(flags & NLM_F_EXCL))
2151 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2152 #ifdef USE_CONST_DEV_UC_CHAR
2153 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2154 struct net_device *dev,
2155 const unsigned char *addr)
2157 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2158 struct net_device *dev,
2159 unsigned char *addr)
2162 struct igb_adapter *adapter = netdev_priv(dev);
2163 int err = -EOPNOTSUPP;
2165 if (ndm->ndm_state & NUD_PERMANENT) {
2166 pr_info("%s: FDB only supports static addresses\n",
2171 if (adapter->vfs_allocated_count) {
2172 if (is_unicast_ether_addr(addr))
2173 err = dev_uc_del(dev, addr);
2174 else if (is_multicast_ether_addr(addr))
2175 err = dev_mc_del(dev, addr);
2183 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2184 struct netlink_callback *cb,
2185 struct net_device *dev,
2188 struct igb_adapter *adapter = netdev_priv(dev);
2190 if (adapter->vfs_allocated_count)
2191 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2195 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2197 #ifdef HAVE_BRIDGE_ATTRIBS
2198 static int igb_ndo_bridge_setlink(struct net_device *dev,
2199 struct nlmsghdr *nlh)
2201 struct igb_adapter *adapter = netdev_priv(dev);
2202 struct e1000_hw *hw = &adapter->hw;
2203 struct nlattr *attr, *br_spec;
2206 if (!(adapter->vfs_allocated_count))
2209 switch (adapter->hw.mac.type) {
2218 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2220 nla_for_each_nested(attr, br_spec, rem) {
2223 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2226 mode = nla_get_u16(attr);
2227 if (mode == BRIDGE_MODE_VEPA) {
2228 e1000_vmdq_set_loopback_pf(hw, 0);
2229 adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2230 } else if (mode == BRIDGE_MODE_VEB) {
2231 e1000_vmdq_set_loopback_pf(hw, 1);
2232 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2236 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2237 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2243 #ifdef HAVE_BRIDGE_FILTER
2244 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2245 struct net_device *dev, u32 filter_mask)
2247 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2248 struct net_device *dev)
2251 struct igb_adapter *adapter = netdev_priv(dev);
2254 if (!(adapter->vfs_allocated_count))
2257 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2258 mode = BRIDGE_MODE_VEB;
2260 mode = BRIDGE_MODE_VEPA;
2262 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2264 #endif /* HAVE_BRIDGE_ATTRIBS */
2265 #endif /* NTF_SELF */
2267 #endif /* HAVE_NDO_SET_FEATURES */
2268 #ifdef HAVE_NET_DEVICE_OPS
2269 static const struct net_device_ops igb_netdev_ops = {
2270 .ndo_open = igb_open,
2271 .ndo_stop = igb_close,
2272 .ndo_start_xmit = igb_xmit_frame,
2273 .ndo_get_stats = igb_get_stats,
2274 .ndo_set_rx_mode = igb_set_rx_mode,
2275 .ndo_set_mac_address = igb_set_mac,
2276 .ndo_change_mtu = igb_change_mtu,
2277 .ndo_do_ioctl = igb_ioctl,
2278 .ndo_tx_timeout = igb_tx_timeout,
2279 .ndo_validate_addr = eth_validate_addr,
2280 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2281 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2283 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2284 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2285 #ifdef HAVE_VF_MIN_MAX_TXRATE
2286 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
2287 #else /* HAVE_VF_MIN_MAX_TXRATE */
2288 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
2289 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2290 .ndo_get_vf_config = igb_ndo_get_vf_config,
2291 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2292 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2293 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2294 #endif /* IFLA_VF_MAX */
2295 #ifdef CONFIG_NET_POLL_CONTROLLER
2296 .ndo_poll_controller = igb_netpoll,
2298 #ifdef HAVE_NDO_SET_FEATURES
2299 .ndo_fix_features = igb_fix_features,
2300 .ndo_set_features = igb_set_features,
2302 #ifdef HAVE_VLAN_RX_REGISTER
2303 .ndo_vlan_rx_register = igb_vlan_mode,
2305 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2307 .ndo_fdb_add = igb_ndo_fdb_add,
2308 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2309 .ndo_fdb_del = igb_ndo_fdb_del,
2310 .ndo_fdb_dump = igb_ndo_fdb_dump,
2312 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2313 #ifdef HAVE_BRIDGE_ATTRIBS
2314 .ndo_bridge_setlink = igb_ndo_bridge_setlink,
2315 .ndo_bridge_getlink = igb_ndo_bridge_getlink,
2316 #endif /* HAVE_BRIDGE_ATTRIBS */
2320 #ifdef CONFIG_IGB_VMDQ_NETDEV
2321 static const struct net_device_ops igb_vmdq_ops = {
2322 .ndo_open = &igb_vmdq_open,
2323 .ndo_stop = &igb_vmdq_close,
2324 .ndo_start_xmit = &igb_vmdq_xmit_frame,
2325 .ndo_get_stats = &igb_vmdq_get_stats,
2326 .ndo_set_rx_mode = &igb_vmdq_set_rx_mode,
2327 .ndo_validate_addr = eth_validate_addr,
2328 .ndo_set_mac_address = &igb_vmdq_set_mac,
2329 .ndo_change_mtu = &igb_vmdq_change_mtu,
2330 .ndo_tx_timeout = &igb_vmdq_tx_timeout,
2331 .ndo_vlan_rx_register = &igb_vmdq_vlan_rx_register,
2332 .ndo_vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid,
2333 .ndo_vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid,
2336 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2337 #endif /* HAVE_NET_DEVICE_OPS */
2338 #ifdef CONFIG_IGB_VMDQ_NETDEV
2339 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2341 #ifdef HAVE_NET_DEVICE_OPS
2342 vnetdev->netdev_ops = &igb_vmdq_ops;
2344 dev->open = &igb_vmdq_open;
2345 dev->stop = &igb_vmdq_close;
2346 dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2347 dev->get_stats = &igb_vmdq_get_stats;
2348 #ifdef HAVE_SET_RX_MODE
2349 dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2351 dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2352 dev->set_mac_address = &igb_vmdq_set_mac;
2353 dev->change_mtu = &igb_vmdq_change_mtu;
2354 #ifdef HAVE_TX_TIMEOUT
2355 dev->tx_timeout = &igb_vmdq_tx_timeout;
2357 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2358 dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2359 dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2360 dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2363 igb_vmdq_set_ethtool_ops(vnetdev);
2364 vnetdev->watchdog_timeo = 5 * HZ;
2368 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2370 int pool, err = 0, base_queue;
2371 struct net_device *vnetdev;
2372 struct igb_vmdq_adapter *vmdq_adapter;
2374 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2375 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2376 base_queue = pool * qpp;
2377 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2382 vmdq_adapter = netdev_priv(vnetdev);
2383 vmdq_adapter->vnetdev = vnetdev;
2384 vmdq_adapter->real_adapter = adapter;
2385 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2386 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2387 igb_assign_vmdq_netdev_ops(vnetdev);
2388 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2389 adapter->netdev->name, pool);
2390 vnetdev->features = adapter->netdev->features;
2391 #ifdef HAVE_NETDEV_VLAN_FEATURES
2392 vnetdev->vlan_features = adapter->netdev->vlan_features;
2394 adapter->vmdq_netdev[pool-1] = vnetdev;
2395 err = register_netdev(vnetdev);
2402 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2406 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2407 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2408 free_netdev(adapter->vmdq_netdev[pool-1]);
2409 adapter->vmdq_netdev[pool-1] = NULL;
2413 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2416 * igb_set_fw_version - Configure version string for ethtool
2417 * @adapter: adapter struct
2420 static void igb_set_fw_version(struct igb_adapter *adapter)
2422 struct e1000_hw *hw = &adapter->hw;
2423 struct e1000_fw_version fw;
2425 e1000_get_fw_version(hw, &fw);
2427 switch (hw->mac.type) {
2430 if (!(e1000_get_flash_presence_i210(hw))) {
2431 snprintf(adapter->fw_version,
2432 sizeof(adapter->fw_version),
2434 fw.invm_major, fw.invm_minor, fw.invm_img_type);
2439 /* if option rom is valid, display its version too*/
2441 snprintf(adapter->fw_version,
2442 sizeof(adapter->fw_version),
2443 "%d.%d, 0x%08x, %d.%d.%d",
2444 fw.eep_major, fw.eep_minor, fw.etrack_id,
2445 fw.or_major, fw.or_build, fw.or_patch);
2448 if (fw.etrack_id != 0X0000) {
2449 snprintf(adapter->fw_version,
2450 sizeof(adapter->fw_version),
2452 fw.eep_major, fw.eep_minor, fw.etrack_id);
2454 snprintf(adapter->fw_version,
2455 sizeof(adapter->fw_version),
2457 fw.eep_major, fw.eep_minor, fw.eep_build);
2467 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2469 * @adapter: adapter struct
2471 static void igb_init_mas(struct igb_adapter *adapter)
2473 struct e1000_hw *hw = &adapter->hw;
2476 e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2477 switch (hw->bus.func) {
2479 if (eeprom_data & IGB_MAS_ENABLE_0)
2480 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2483 if (eeprom_data & IGB_MAS_ENABLE_1)
2484 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2487 if (eeprom_data & IGB_MAS_ENABLE_2)
2488 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2491 if (eeprom_data & IGB_MAS_ENABLE_3)
2492 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2495 /* Shouldn't get here */
2496 dev_err(pci_dev_to_dev(adapter->pdev),
2497 "%s:AMS: Invalid port configuration, returning\n",
2498 adapter->netdev->name);
2504 * igb_probe - Device Initialization Routine
2505 * @pdev: PCI device information struct
2506 * @ent: entry in igb_pci_tbl
2508 * Returns 0 on success, negative on failure
2510 * igb_probe initializes an adapter identified by a pci_dev structure.
2511 * The OS initialization, configuring of the adapter private structure,
2512 * and a hardware reset occur.
2514 static int __devinit igb_probe(struct pci_dev *pdev,
2515 const struct pci_device_id *ent)
2517 struct net_device *netdev;
2518 struct igb_adapter *adapter;
2519 struct e1000_hw *hw;
2520 u16 eeprom_data = 0;
2521 u8 pba_str[E1000_PBANUM_LENGTH];
2523 static int global_quad_port_a; /* global quad port a indication */
2524 int i, err, pci_using_dac;
2525 static int cards_found;
2527 err = pci_enable_device_mem(pdev);
2532 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2534 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2538 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2540 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2542 IGB_ERR("No usable DMA configuration, "
2549 #ifndef HAVE_ASPM_QUIRKS
2550 /* 82575 requires that the pci-e link partner disable the L0s state */
2551 switch (pdev->device) {
2552 case E1000_DEV_ID_82575EB_COPPER:
2553 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2554 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2555 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2560 #endif /* HAVE_ASPM_QUIRKS */
2561 err = pci_request_selected_regions(pdev,
2562 pci_select_bars(pdev,
2568 pci_enable_pcie_error_reporting(pdev);
2570 pci_set_master(pdev);
2574 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2577 netdev = alloc_etherdev(sizeof(struct igb_adapter));
2578 #endif /* HAVE_TX_MQ */
2580 goto err_alloc_etherdev;
2582 SET_MODULE_OWNER(netdev);
2583 SET_NETDEV_DEV(netdev, &pdev->dev);
2585 pci_set_drvdata(pdev, netdev);
2586 adapter = netdev_priv(netdev);
2587 adapter->netdev = netdev;
2588 adapter->pdev = pdev;
2591 adapter->port_num = hw->bus.func;
2592 adapter->msg_enable = (1 << debug) - 1;
2595 err = pci_save_state(pdev);
2600 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2601 pci_resource_len(pdev, 0));
2605 #ifdef HAVE_NET_DEVICE_OPS
2606 netdev->netdev_ops = &igb_netdev_ops;
2607 #else /* HAVE_NET_DEVICE_OPS */
2608 netdev->open = &igb_open;
2609 netdev->stop = &igb_close;
2610 netdev->get_stats = &igb_get_stats;
2611 #ifdef HAVE_SET_RX_MODE
2612 netdev->set_rx_mode = &igb_set_rx_mode;
2614 netdev->set_multicast_list = &igb_set_rx_mode;
2615 netdev->set_mac_address = &igb_set_mac;
2616 netdev->change_mtu = &igb_change_mtu;
2617 netdev->do_ioctl = &igb_ioctl;
2618 #ifdef HAVE_TX_TIMEOUT
2619 netdev->tx_timeout = &igb_tx_timeout;
2621 netdev->vlan_rx_register = igb_vlan_mode;
2622 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2623 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2624 #ifdef CONFIG_NET_POLL_CONTROLLER
2625 netdev->poll_controller = igb_netpoll;
2627 netdev->hard_start_xmit = &igb_xmit_frame;
2628 #endif /* HAVE_NET_DEVICE_OPS */
2629 igb_set_ethtool_ops(netdev);
2630 #ifdef HAVE_TX_TIMEOUT
2631 netdev->watchdog_timeo = 5 * HZ;
2634 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2636 adapter->bd_number = cards_found;
2638 /* setup the private structure */
2639 err = igb_sw_init(adapter);
2643 e1000_get_bus_info(hw);
2645 hw->phy.autoneg_wait_to_complete = FALSE;
2646 hw->mac.adaptive_ifs = FALSE;
2648 /* Copper options */
2649 if (hw->phy.media_type == e1000_media_type_copper) {
2650 hw->phy.mdix = AUTO_ALL_MODES;
2651 hw->phy.disable_polarity_correction = FALSE;
2652 hw->phy.ms_type = e1000_ms_hw_default;
2655 if (e1000_check_reset_block(hw))
2656 dev_info(pci_dev_to_dev(pdev),
2657 "PHY reset is blocked due to SOL/IDER session.\n");
2660 * features is initialized to 0 in allocation, it might have bits
2661 * set by igb_sw_init so we should use an or instead of an
2664 netdev->features |= NETIF_F_SG |
2666 #ifdef NETIF_F_IPV6_CSUM
2674 #endif /* NETIF_F_TSO */
2675 #ifdef NETIF_F_RXHASH
2679 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2680 NETIF_F_HW_VLAN_CTAG_RX |
2681 NETIF_F_HW_VLAN_CTAG_TX;
2683 NETIF_F_HW_VLAN_RX |
2687 if (hw->mac.type >= e1000_82576)
2688 netdev->features |= NETIF_F_SCTP_CSUM;
2690 #ifdef HAVE_NDO_SET_FEATURES
2691 /* copy netdev features into list of user selectable features */
2692 netdev->hw_features |= netdev->features;
2695 /* give us the option of enabling LRO later */
2696 netdev->hw_features |= NETIF_F_LRO;
2701 /* this is only needed on kernels prior to 2.6.39 */
2702 netdev->features |= NETIF_F_GRO;
2706 /* set this bit last since it cannot be part of hw_features */
2707 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2708 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2710 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2713 #ifdef HAVE_NETDEV_VLAN_FEATURES
2714 netdev->vlan_features |= NETIF_F_TSO |
2722 netdev->features |= NETIF_F_HIGHDMA;
2724 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2726 if (adapter->dmac != IGB_DMAC_DISABLE)
2727 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2730 /* before reading the NVM, reset the controller to put the device in a
2731 * known good starting state */
2734 /* make sure the NVM is good */
2735 if (e1000_validate_nvm_checksum(hw) < 0) {
2736 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2742 /* copy the MAC address out of the NVM */
2743 if (e1000_read_mac_addr(hw))
2744 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2745 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2746 #ifdef ETHTOOL_GPERMADDR
2747 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2749 if (!is_valid_ether_addr(netdev->perm_addr)) {
2751 if (!is_valid_ether_addr(netdev->dev_addr)) {
2753 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2758 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2759 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2760 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2761 igb_rar_set(adapter, 0);
2763 /* get firmware version for ethtool -i */
2764 igb_set_fw_version(adapter);
2766 /* Check if Media Autosense is enabled */
2767 if (hw->mac.type == e1000_82580)
2768 igb_init_mas(adapter);
2769 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2770 (unsigned long) adapter);
2771 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2772 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2773 (unsigned long) adapter);
2774 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2775 (unsigned long) adapter);
2777 INIT_WORK(&adapter->reset_task, igb_reset_task);
2778 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2779 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2780 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2782 /* Initialize link properties that are user-changeable */
2783 adapter->fc_autoneg = true;
2784 hw->mac.autoneg = true;
2785 hw->phy.autoneg_advertised = 0x2f;
2787 hw->fc.requested_mode = e1000_fc_default;
2788 hw->fc.current_mode = e1000_fc_default;
2790 e1000_validate_mdi_setting(hw);
2792 /* By default, support wake on port A */
2793 if (hw->bus.func == 0)
2794 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2796 /* Check the NVM for wake support for non-port A ports */
2797 if (hw->mac.type >= e1000_82580)
2798 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2799 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2801 else if (hw->bus.func == 1)
2802 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2804 if (eeprom_data & IGB_EEPROM_APME)
2805 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2807 /* now that we have the eeprom settings, apply the special cases where
2808 * the eeprom may be wrong or the board simply won't support wake on
2809 * lan on a particular port */
2810 switch (pdev->device) {
2811 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2812 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2814 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2815 case E1000_DEV_ID_82576_FIBER:
2816 case E1000_DEV_ID_82576_SERDES:
2817 /* Wake events only supported on port A for dual fiber
2818 * regardless of eeprom setting */
2819 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2820 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2822 case E1000_DEV_ID_82576_QUAD_COPPER:
2823 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2824 /* if quad port adapter, disable WoL on all but port A */
2825 if (global_quad_port_a != 0)
2826 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2828 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2829 /* Reset for multiple quad port adapters */
2830 if (++global_quad_port_a == 4)
2831 global_quad_port_a = 0;
2834 /* If the device can't wake, don't set software support */
2835 if (!device_can_wakeup(&adapter->pdev->dev))
2836 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2840 /* initialize the wol settings based on the eeprom settings */
2841 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2842 adapter->wol |= E1000_WUFC_MAG;
2844 /* Some vendors want WoL disabled by default, but still supported */
2845 if ((hw->mac.type == e1000_i350) &&
2846 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2847 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2851 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2852 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2854 /* reset the hardware with the new settings */
2858 #ifdef HAVE_I2C_SUPPORT
2859 /* Init the I2C interface */
2860 err = igb_init_i2c(adapter);
2862 dev_err(&pdev->dev, "failed to init i2c interface\n");
2865 #endif /* HAVE_I2C_SUPPORT */
2867 /* let the f/w know that the h/w is now under the control of the
2869 igb_get_hw_control(adapter);
2871 strncpy(netdev->name, "eth%d", IFNAMSIZ);
2872 err = register_netdev(netdev);
2876 #ifdef CONFIG_IGB_VMDQ_NETDEV
2877 err = igb_init_vmdq_netdevs(adapter);
2881 /* carrier off reporting is important to ethtool even BEFORE open */
2882 netif_carrier_off(netdev);
2885 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2886 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2887 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2888 igb_setup_dca(adapter);
2892 #ifdef HAVE_PTP_1588_CLOCK
2893 /* do hw tstamp init after resetting */
2894 igb_ptp_init(adapter);
2895 #endif /* HAVE_PTP_1588_CLOCK */
2897 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2898 /* print bus type/speed/width info */
2899 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2901 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2902 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2903 (hw->mac.type == e1000_i354) ? "integrated" :
2905 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2906 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2907 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2908 (hw->mac.type == e1000_i354) ? "integrated" :
2910 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2911 for (i = 0; i < 6; i++)
2912 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2914 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2916 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2917 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2921 /* Initialize the thermal sensor on i350 devices. */
2922 if (hw->mac.type == e1000_i350) {
2923 if (hw->bus.func == 0) {
2927 * Read the NVM to determine if this i350 device
2928 * supports an external thermal sensor.
2930 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2931 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2932 adapter->ets = true;
2934 adapter->ets = false;
2938 igb_sysfs_init(adapter);
2942 igb_procfs_init(adapter);
2943 #endif /* IGB_PROCFS */
2944 #endif /* IGB_HWMON */
2946 adapter->ets = false;
2949 if (hw->phy.media_type == e1000_media_type_copper) {
2950 switch (hw->mac.type) {
2954 /* Enable EEE for internal copper PHY devices */
2955 err = e1000_set_eee_i350(hw);
2957 (adapter->flags & IGB_FLAG_EEE))
2958 adapter->eee_advert =
2959 MDIO_EEE_100TX | MDIO_EEE_1000T;
2962 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2963 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2964 err = e1000_set_eee_i354(hw);
2966 (adapter->flags & IGB_FLAG_EEE))
2967 adapter->eee_advert =
2968 MDIO_EEE_100TX | MDIO_EEE_1000T;
2976 /* send driver version info to firmware */
2977 if (hw->mac.type >= e1000_i350)
2978 igb_init_fw(adapter);
2981 if (netdev->features & NETIF_F_LRO)
2982 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
2984 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
2986 dev_info(pci_dev_to_dev(pdev),
2987 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2988 adapter->msix_entries ? "MSI-X" :
2989 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2990 adapter->num_rx_queues, adapter->num_tx_queues);
2994 pm_runtime_put_noidle(&pdev->dev);
2998 igb_release_hw_control(adapter);
2999 #ifdef HAVE_I2C_SUPPORT
3000 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3001 #endif /* HAVE_I2C_SUPPORT */
3003 if (!e1000_check_reset_block(hw))
3004 e1000_phy_hw_reset(hw);
3006 if (hw->flash_address)
3007 iounmap(hw->flash_address);
3009 igb_clear_interrupt_scheme(adapter);
3010 igb_reset_sriov_capability(adapter);
3011 iounmap(hw->hw_addr);
3013 free_netdev(netdev);
3015 pci_release_selected_regions(pdev,
3016 pci_select_bars(pdev, IORESOURCE_MEM));
3019 pci_disable_device(pdev);
3022 #ifdef HAVE_I2C_SUPPORT
3024 * igb_remove_i2c - Cleanup I2C interface
3025 * @adapter: pointer to adapter structure
3028 static void igb_remove_i2c(struct igb_adapter *adapter)
3031 /* free the adapter bus structure */
3032 i2c_del_adapter(&adapter->i2c_adap);
3034 #endif /* HAVE_I2C_SUPPORT */
3037 * igb_remove - Device Removal Routine
3038 * @pdev: PCI device information struct
3040 * igb_remove is called by the PCI subsystem to alert the driver
3041 * that it should release a PCI device. The could be caused by a
3042 * Hot-Plug event, or because the driver is going to be removed from
3045 static void __devexit igb_remove(struct pci_dev *pdev)
3047 struct net_device *netdev = pci_get_drvdata(pdev);
3048 struct igb_adapter *adapter = netdev_priv(netdev);
3049 struct e1000_hw *hw = &adapter->hw;
3051 pm_runtime_get_noresume(&pdev->dev);
3052 #ifdef HAVE_I2C_SUPPORT
3053 igb_remove_i2c(adapter);
3054 #endif /* HAVE_I2C_SUPPORT */
3055 #ifdef HAVE_PTP_1588_CLOCK
3056 igb_ptp_stop(adapter);
3057 #endif /* HAVE_PTP_1588_CLOCK */
3059 /* flush_scheduled work may reschedule our watchdog task, so
3060 * explicitly disable watchdog tasks from being rescheduled */
3061 set_bit(__IGB_DOWN, &adapter->state);
3062 del_timer_sync(&adapter->watchdog_timer);
3063 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3064 del_timer_sync(&adapter->dma_err_timer);
3065 del_timer_sync(&adapter->phy_info_timer);
3067 flush_scheduled_work();
3070 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3071 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3072 dca_remove_requester(&pdev->dev);
3073 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3074 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3078 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3079 * would have already happened in close and is redundant. */
3080 igb_release_hw_control(adapter);
3082 unregister_netdev(netdev);
3083 #ifdef CONFIG_IGB_VMDQ_NETDEV
3084 igb_remove_vmdq_netdevs(adapter);
3087 igb_clear_interrupt_scheme(adapter);
3088 igb_reset_sriov_capability(adapter);
3090 iounmap(hw->hw_addr);
3091 if (hw->flash_address)
3092 iounmap(hw->flash_address);
3093 pci_release_selected_regions(pdev,
3094 pci_select_bars(pdev, IORESOURCE_MEM));
3097 igb_sysfs_exit(adapter);
3100 igb_procfs_exit(adapter);
3101 #endif /* IGB_PROCFS */
3102 #endif /* IGB_HWMON */
3103 kfree(adapter->mac_table);
3104 kfree(adapter->shadow_vfta);
3105 free_netdev(netdev);
3107 pci_disable_pcie_error_reporting(pdev);
3109 pci_disable_device(pdev);
3113 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3114 * @adapter: board private structure to initialize
3116 * igb_sw_init initializes the Adapter private data structure.
3117 * Fields are initialized based on PCI device information and
3118 * OS network device settings (MTU size).
3120 static int igb_sw_init(struct igb_adapter *adapter)
3122 struct e1000_hw *hw = &adapter->hw;
3123 struct net_device *netdev = adapter->netdev;
3124 struct pci_dev *pdev = adapter->pdev;
3126 /* PCI config space info */
3128 hw->vendor_id = pdev->vendor;
3129 hw->device_id = pdev->device;
3130 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3131 hw->subsystem_device_id = pdev->subsystem_device;
3133 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3135 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3137 /* set default ring sizes */
3138 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3139 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3141 /* set default work limits */
3142 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3144 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3147 /* Initialize the hardware-specific values */
3148 if (e1000_setup_init_funcs(hw, TRUE)) {
3149 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3153 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3154 hw->mac.rar_entry_count,
3157 /* Setup and initialize a copy of the hw vlan table array */
3158 adapter->shadow_vfta = (u32 *)kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3161 /* These calls may decrease the number of queues */
3162 if (hw->mac.type < e1000_i210) {
3163 igb_set_sriov_capability(adapter);
3166 if (igb_init_interrupt_scheme(adapter, true)) {
3167 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3171 /* Explicitly disable IRQ since the NIC can be in any state. */
3172 igb_irq_disable(adapter);
3174 set_bit(__IGB_DOWN, &adapter->state);
3180 * igb_open - Called when a network interface is made active
3181 * @netdev: network interface device structure
3183 * Returns 0 on success, negative value on failure
3185 * The open entry point is called when a network interface is made
3186 * active by the system (IFF_UP). At this point all resources needed
3187 * for transmit and receive operations are allocated, the interrupt
3188 * handler is registered with the OS, the watchdog timer is started,
3189 * and the stack is notified that the interface is ready.
3191 static int __igb_open(struct net_device *netdev, bool resuming)
3193 struct igb_adapter *adapter = netdev_priv(netdev);
3194 struct e1000_hw *hw = &adapter->hw;
3195 #ifdef CONFIG_PM_RUNTIME
3196 struct pci_dev *pdev = adapter->pdev;
3197 #endif /* CONFIG_PM_RUNTIME */
3201 /* disallow open during test */
3202 if (test_bit(__IGB_TESTING, &adapter->state)) {
3207 #ifdef CONFIG_PM_RUNTIME
3209 pm_runtime_get_sync(&pdev->dev);
3210 #endif /* CONFIG_PM_RUNTIME */
3212 netif_carrier_off(netdev);
3214 /* allocate transmit descriptors */
3215 err = igb_setup_all_tx_resources(adapter);
3219 /* allocate receive descriptors */
3220 err = igb_setup_all_rx_resources(adapter);
3224 igb_power_up_link(adapter);
3226 /* before we allocate an interrupt, we must be ready to handle it.
3227 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3228 * as soon as we call pci_request_irq, so we have to setup our
3229 * clean_rx handler before we do so. */
3230 igb_configure(adapter);
3232 err = igb_request_irq(adapter);
3236 /* Notify the stack of the actual queue counts. */
3237 netif_set_real_num_tx_queues(netdev,
3238 adapter->vmdq_pools ? 1 :
3239 adapter->num_tx_queues);
3241 err = netif_set_real_num_rx_queues(netdev,
3242 adapter->vmdq_pools ? 1 :
3243 adapter->num_rx_queues);
3245 goto err_set_queues;
3247 /* From here on the code is the same as igb_up() */
3248 clear_bit(__IGB_DOWN, &adapter->state);
3250 for (i = 0; i < adapter->num_q_vectors; i++)
3251 napi_enable(&(adapter->q_vector[i]->napi));
3252 igb_configure_lli(adapter);
3254 /* Clear any pending interrupts. */
3255 E1000_READ_REG(hw, E1000_ICR);
3257 igb_irq_enable(adapter);
3259 /* notify VFs that reset has been completed */
3260 if (adapter->vfs_allocated_count) {
3261 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3262 reg_data |= E1000_CTRL_EXT_PFRSTD;
3263 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3266 netif_tx_start_all_queues(netdev);
3268 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3269 schedule_work(&adapter->dma_err_task);
3271 /* start the watchdog. */
3272 hw->mac.get_link_status = 1;
3273 schedule_work(&adapter->watchdog_task);
3275 return E1000_SUCCESS;
3278 igb_free_irq(adapter);
3280 igb_release_hw_control(adapter);
3281 igb_power_down_link(adapter);
3282 igb_free_all_rx_resources(adapter);
3284 igb_free_all_tx_resources(adapter);
3288 #ifdef CONFIG_PM_RUNTIME
3290 pm_runtime_put(&pdev->dev);
3291 #endif /* CONFIG_PM_RUNTIME */
3296 static int igb_open(struct net_device *netdev)
3298 return __igb_open(netdev, false);
3302 * igb_close - Disables a network interface
3303 * @netdev: network interface device structure
3305 * Returns 0, this is not allowed to fail
3307 * The close entry point is called when an interface is de-activated
3308 * by the OS. The hardware is still under the driver's control, but
3309 * needs to be disabled. A global MAC reset is issued to stop the
3310 * hardware, and all transmit and receive resources are freed.
3312 static int __igb_close(struct net_device *netdev, bool suspending)
3314 struct igb_adapter *adapter = netdev_priv(netdev);
3315 #ifdef CONFIG_PM_RUNTIME
3316 struct pci_dev *pdev = adapter->pdev;
3317 #endif /* CONFIG_PM_RUNTIME */
3319 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3321 #ifdef CONFIG_PM_RUNTIME
3323 pm_runtime_get_sync(&pdev->dev);
3324 #endif /* CONFIG_PM_RUNTIME */
3328 igb_release_hw_control(adapter);
3330 igb_free_irq(adapter);
3332 igb_free_all_tx_resources(adapter);
3333 igb_free_all_rx_resources(adapter);
3335 #ifdef CONFIG_PM_RUNTIME
3337 pm_runtime_put_sync(&pdev->dev);
3338 #endif /* CONFIG_PM_RUNTIME */
3343 static int igb_close(struct net_device *netdev)
3345 return __igb_close(netdev, false);
3349 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3350 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3352 * Return 0 on success, negative on failure
3354 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3356 struct device *dev = tx_ring->dev;
3359 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3360 tx_ring->tx_buffer_info = vzalloc(size);
3361 if (!tx_ring->tx_buffer_info)
3364 /* round up to nearest 4K */
3365 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3366 tx_ring->size = ALIGN(tx_ring->size, 4096);
3368 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3369 &tx_ring->dma, GFP_KERNEL);
3374 tx_ring->next_to_use = 0;
3375 tx_ring->next_to_clean = 0;
3380 vfree(tx_ring->tx_buffer_info);
3382 "Unable to allocate memory for the transmit descriptor ring\n");
3387 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3388 * (Descriptors) for all queues
3389 * @adapter: board private structure
3391 * Return 0 on success, negative on failure
3393 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3395 struct pci_dev *pdev = adapter->pdev;
3398 for (i = 0; i < adapter->num_tx_queues; i++) {
3399 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3401 dev_err(pci_dev_to_dev(pdev),
3402 "Allocation for Tx Queue %u failed\n", i);
3403 for (i--; i >= 0; i--)
3404 igb_free_tx_resources(adapter->tx_ring[i]);
3413 * igb_setup_tctl - configure the transmit control registers
3414 * @adapter: Board private structure
3416 void igb_setup_tctl(struct igb_adapter *adapter)
3418 struct e1000_hw *hw = &adapter->hw;
3421 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3422 E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3424 /* Program the Transmit Control Register */
3425 tctl = E1000_READ_REG(hw, E1000_TCTL);
3426 tctl &= ~E1000_TCTL_CT;
3427 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3428 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3430 e1000_config_collision_dist(hw);
3432 /* Enable transmits */
3433 tctl |= E1000_TCTL_EN;
3435 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3438 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3440 struct e1000_hw *hw = &adapter->hw;
3441 switch (hw->mac.type) {
3445 if (adapter->msix_entries)
3455 * igb_configure_tx_ring - Configure transmit ring after Reset
3456 * @adapter: board private structure
3457 * @ring: tx ring to configure
3459 * Configure a transmit ring after a reset.
3461 void igb_configure_tx_ring(struct igb_adapter *adapter,
3462 struct igb_ring *ring)
3464 struct e1000_hw *hw = &adapter->hw;
3466 u64 tdba = ring->dma;
3467 int reg_idx = ring->reg_idx;
3469 /* disable the queue */
3470 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3471 E1000_WRITE_FLUSH(hw);
3474 E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3475 ring->count * sizeof(union e1000_adv_tx_desc));
3476 E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3477 tdba & 0x00000000ffffffffULL);
3478 E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3480 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3481 E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3482 writel(0, ring->tail);
3484 txdctl |= IGB_TX_PTHRESH;
3485 txdctl |= IGB_TX_HTHRESH << 8;
3486 txdctl |= igb_tx_wthresh(adapter) << 16;
3488 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3489 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3493 * igb_configure_tx - Configure transmit Unit after Reset
3494 * @adapter: board private structure
3496 * Configure the Tx unit of the MAC after a reset.
3498 static void igb_configure_tx(struct igb_adapter *adapter)
3502 for (i = 0; i < adapter->num_tx_queues; i++)
3503 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3507 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3508 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3510 * Returns 0 on success, negative on failure
3512 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3514 struct device *dev = rx_ring->dev;
3517 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3518 rx_ring->rx_buffer_info = vzalloc(size);
3519 if (!rx_ring->rx_buffer_info)
3522 desc_len = sizeof(union e1000_adv_rx_desc);
3524 /* Round up to nearest 4K */
3525 rx_ring->size = rx_ring->count * desc_len;
3526 rx_ring->size = ALIGN(rx_ring->size, 4096);
3528 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3529 &rx_ring->dma, GFP_KERNEL);
3534 rx_ring->next_to_alloc = 0;
3535 rx_ring->next_to_clean = 0;
3536 rx_ring->next_to_use = 0;
3541 vfree(rx_ring->rx_buffer_info);
3542 rx_ring->rx_buffer_info = NULL;
3543 dev_err(dev, "Unable to allocate memory for the receive descriptor"
3549 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3550 * (Descriptors) for all queues
3551 * @adapter: board private structure
3553 * Return 0 on success, negative on failure
3555 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3557 struct pci_dev *pdev = adapter->pdev;
3560 for (i = 0; i < adapter->num_rx_queues; i++) {
3561 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3563 dev_err(pci_dev_to_dev(pdev),
3564 "Allocation for Rx Queue %u failed\n", i);
3565 for (i--; i >= 0; i--)
3566 igb_free_rx_resources(adapter->rx_ring[i]);
3575 * igb_setup_mrqc - configure the multiple receive queue control registers
3576 * @adapter: Board private structure
3578 static void igb_setup_mrqc(struct igb_adapter *adapter)
3580 struct e1000_hw *hw = &adapter->hw;
3582 u32 j, num_rx_queues, shift = 0, shift2 = 0;
3583 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3584 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3585 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3588 /* Fill out hash function seeds */
3589 for (j = 0; j < 10; j++)
3590 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3592 num_rx_queues = adapter->rss_queues;
3594 /* 82575 and 82576 supports 2 RSS queues for VMDq */
3595 switch (hw->mac.type) {
3597 if (adapter->vmdq_pools) {
3605 /* 82576 supports 2 RSS queues for SR-IOV */
3606 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3616 * Populate the redirection table 4 entries at a time. To do this
3617 * we are generating the results for n and n+2 and then interleaving
3618 * those with the results with n+1 and n+3.
3620 for (j = 0; j < 32; j++) {
3621 /* first pass generates n and n+2 */
3622 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3623 u32 reta = (base & 0x07800780) >> (7 - shift);
3625 /* second pass generates n+1 and n+3 */
3626 base += 0x00010001 * num_rx_queues;
3627 reta |= (base & 0x07800780) << (1 + shift);
3629 /* generate 2nd table for 82575 based parts */
3631 reta |= (0x01010101 * num_rx_queues) << shift2;
3633 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3637 * Disable raw packet checksumming so that RSS hash is placed in
3638 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3639 * offloads as they are enabled by default
3641 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3642 rxcsum |= E1000_RXCSUM_PCSD;
3644 if (adapter->hw.mac.type >= e1000_82576)
3645 /* Enable Receive Checksum Offload for SCTP */
3646 rxcsum |= E1000_RXCSUM_CRCOFL;
3648 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3649 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3651 /* Generate RSS hash based on packet types, TCP/UDP
3652 * port numbers and/or IPv4/v6 src and dst addresses
3654 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3655 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3656 E1000_MRQC_RSS_FIELD_IPV6 |
3657 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3658 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3660 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3661 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3662 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3663 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3665 /* If VMDq is enabled then we set the appropriate mode for that, else
3666 * we default to RSS so that an RSS hash is calculated per packet even
3667 * if we are only using one queue */
3668 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3669 if (hw->mac.type > e1000_82575) {
3670 /* Set the default pool for the PF's first queue */
3671 u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3672 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3673 E1000_VT_CTL_DISABLE_DEF_POOL);
3674 vtctl |= adapter->vfs_allocated_count <<
3675 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3676 E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3677 } else if (adapter->rss_queues > 1) {
3678 /* set default queue for pool 1 to queue 2 */
3679 E1000_WRITE_REG(hw, E1000_VT_CTL,
3680 adapter->rss_queues << 7);
3682 if (adapter->rss_queues > 1)
3683 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3685 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3687 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3689 igb_vmm_control(adapter);
3691 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3695 * igb_setup_rctl - configure the receive control registers
3696 * @adapter: Board private structure
3698 void igb_setup_rctl(struct igb_adapter *adapter)
3700 struct e1000_hw *hw = &adapter->hw;
3703 rctl = E1000_READ_REG(hw, E1000_RCTL);
3705 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3706 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3708 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3709 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3712 * enable stripping of CRC. It's unlikely this will break BMC
3713 * redirection as it did with e1000. Newer features require
3714 * that the HW strips the CRC.
3716 rctl |= E1000_RCTL_SECRC;
3718 /* disable store bad packets and clear size bits. */
3719 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3721 /* enable LPE to prevent packets larger than max_frame_size */
3722 rctl |= E1000_RCTL_LPE;
3724 /* disable queue 0 to prevent tail write w/o re-config */
3725 E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3727 /* Attention!!! For SR-IOV PF driver operations you must enable
3728 * queue drop for all VF and PF queues to prevent head of line blocking
3729 * if an un-trusted VF does not provide descriptors to hardware.
3731 if (adapter->vfs_allocated_count) {
3732 /* set all queue drop enable bits */
3733 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3736 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3739 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3742 struct e1000_hw *hw = &adapter->hw;
3745 /* if it isn't the PF check to see if VFs are enabled and
3746 * increase the size to support vlan tags */
3747 if (vfn < adapter->vfs_allocated_count &&
3748 adapter->vf_data[vfn].vlans_enabled)
3751 #ifdef CONFIG_IGB_VMDQ_NETDEV
3752 if (vfn >= adapter->vfs_allocated_count) {
3753 int queue = vfn - adapter->vfs_allocated_count;
3754 struct igb_vmdq_adapter *vadapter;
3756 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3757 if (vadapter->vlgrp)
3761 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3762 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3763 vmolr |= size | E1000_VMOLR_LPE;
3764 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3770 * igb_rlpml_set - set maximum receive packet size
3771 * @adapter: board private structure
3773 * Configure maximum receivable packet size.
3775 static void igb_rlpml_set(struct igb_adapter *adapter)
3777 u32 max_frame_size = adapter->max_frame_size;
3778 struct e1000_hw *hw = &adapter->hw;
3779 u16 pf_id = adapter->vfs_allocated_count;
3781 if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3783 for (i = 0; i < adapter->vmdq_pools; i++)
3784 igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3786 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3787 * to our max jumbo frame size, in case we need to enable
3788 * jumbo frames on one of the rings later.
3789 * This will not pass over-length frames into the default
3790 * queue because it's gated by the VMOLR.RLPML.
3792 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3794 /* Set VF RLPML for the PF device. */
3795 if (adapter->vfs_allocated_count)
3796 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3798 E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3801 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3802 int vfn, bool enable)
3804 struct e1000_hw *hw = &adapter->hw;
3808 if (hw->mac.type < e1000_82576)
3811 if (hw->mac.type == e1000_i350)
3812 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3814 reg = hw->hw_addr + E1000_VMOLR(vfn);
3818 val |= E1000_VMOLR_STRVLAN;
3820 val &= ~(E1000_VMOLR_STRVLAN);
3823 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3826 struct e1000_hw *hw = &adapter->hw;
3830 * This register exists only on 82576 and newer so if we are older then
3831 * we should exit and do nothing
3833 if (hw->mac.type < e1000_82576)
3836 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3839 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3841 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3843 /* clear all bits that might not be set */
3844 vmolr &= ~E1000_VMOLR_RSSE;
3846 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3847 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3849 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3850 vmolr |= E1000_VMOLR_LPE; /* Accept long packets */
3852 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3856 * igb_configure_rx_ring - Configure a receive ring after Reset
3857 * @adapter: board private structure
3858 * @ring: receive ring to be configured
3860 * Configure the Rx unit of the MAC after a reset.
3862 void igb_configure_rx_ring(struct igb_adapter *adapter,
3863 struct igb_ring *ring)
3865 struct e1000_hw *hw = &adapter->hw;
3866 u64 rdba = ring->dma;
3867 int reg_idx = ring->reg_idx;
3868 u32 srrctl = 0, rxdctl = 0;
3870 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3872 * RLPML prevents us from receiving a frame larger than max_frame so
3873 * it is safe to just set the rx_buffer_len to max_frame without the
3874 * risk of an skb over panic.
3876 ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3877 MAXIMUM_ETHERNET_VLAN_SIZE);
3880 /* disable the queue */
3881 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3883 /* Set DMA base address registers */
3884 E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3885 rdba & 0x00000000ffffffffULL);
3886 E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3887 E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3888 ring->count * sizeof(union e1000_adv_rx_desc));
3890 /* initialize head and tail */
3891 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3892 E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3893 writel(0, ring->tail);
3895 /* reset next-to- use/clean to place SW in sync with hardwdare */
3896 ring->next_to_clean = 0;
3897 ring->next_to_use = 0;
3898 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3899 ring->next_to_alloc = 0;
3902 /* set descriptor configuration */
3903 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3904 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3905 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3906 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3907 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3908 E1000_SRRCTL_BSIZEPKT_SHIFT;
3909 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3910 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3911 #ifdef HAVE_PTP_1588_CLOCK
3912 if (hw->mac.type >= e1000_82580)
3913 srrctl |= E1000_SRRCTL_TIMESTAMP;
3914 #endif /* HAVE_PTP_1588_CLOCK */
3916 * We should set the drop enable bit if:
3919 * Flow Control is disabled and number of RX queues > 1
3921 * This allows us to avoid head of line blocking for security
3922 * and performance reasons.
3924 if (adapter->vfs_allocated_count ||
3925 (adapter->num_rx_queues > 1 &&
3926 (hw->fc.requested_mode == e1000_fc_none ||
3927 hw->fc.requested_mode == e1000_fc_rx_pause)))
3928 srrctl |= E1000_SRRCTL_DROP_EN;
3930 E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3932 /* set filtering for VMDQ pools */
3933 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3935 rxdctl |= IGB_RX_PTHRESH;
3936 rxdctl |= IGB_RX_HTHRESH << 8;
3937 rxdctl |= IGB_RX_WTHRESH << 16;
3939 /* enable receive descriptor fetching */
3940 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3941 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3945 * igb_configure_rx - Configure receive Unit after Reset
3946 * @adapter: board private structure
3948 * Configure the Rx unit of the MAC after a reset.
3950 static void igb_configure_rx(struct igb_adapter *adapter)
3954 /* set UTA to appropriate mode */
3955 igb_set_uta(adapter);
3957 igb_full_sync_mac_table(adapter);
3958 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3959 * the Base and Length of the Rx Descriptor Ring */
3960 for (i = 0; i < adapter->num_rx_queues; i++)
3961 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3965 * igb_free_tx_resources - Free Tx Resources per Queue
3966 * @tx_ring: Tx descriptor ring for a specific queue
3968 * Free all transmit software resources
3970 void igb_free_tx_resources(struct igb_ring *tx_ring)
3972 igb_clean_tx_ring(tx_ring);
3974 vfree(tx_ring->tx_buffer_info);
3975 tx_ring->tx_buffer_info = NULL;
3977 /* if not set, then don't free */
3981 dma_free_coherent(tx_ring->dev, tx_ring->size,
3982 tx_ring->desc, tx_ring->dma);
3984 tx_ring->desc = NULL;
3988 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3989 * @adapter: board private structure
3991 * Free all transmit software resources
3993 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3997 for (i = 0; i < adapter->num_tx_queues; i++)
3998 igb_free_tx_resources(adapter->tx_ring[i]);
4001 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4002 struct igb_tx_buffer *tx_buffer)
4004 if (tx_buffer->skb) {
4005 dev_kfree_skb_any(tx_buffer->skb);
4006 if (dma_unmap_len(tx_buffer, len))
4007 dma_unmap_single(ring->dev,
4008 dma_unmap_addr(tx_buffer, dma),
4009 dma_unmap_len(tx_buffer, len),
4011 } else if (dma_unmap_len(tx_buffer, len)) {
4012 dma_unmap_page(ring->dev,
4013 dma_unmap_addr(tx_buffer, dma),
4014 dma_unmap_len(tx_buffer, len),
4017 tx_buffer->next_to_watch = NULL;
4018 tx_buffer->skb = NULL;
4019 dma_unmap_len_set(tx_buffer, len, 0);
4020 /* buffer_info must be completely set up in the transmit path */
4024 * igb_clean_tx_ring - Free Tx Buffers
4025 * @tx_ring: ring to be cleaned
4027 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4029 struct igb_tx_buffer *buffer_info;
4033 if (!tx_ring->tx_buffer_info)
4035 /* Free all the Tx ring sk_buffs */
4037 for (i = 0; i < tx_ring->count; i++) {
4038 buffer_info = &tx_ring->tx_buffer_info[i];
4039 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4042 netdev_tx_reset_queue(txring_txq(tx_ring));
4044 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4045 memset(tx_ring->tx_buffer_info, 0, size);
4047 /* Zero out the descriptor ring */
4048 memset(tx_ring->desc, 0, tx_ring->size);
4050 tx_ring->next_to_use = 0;
4051 tx_ring->next_to_clean = 0;
4055 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4056 * @adapter: board private structure
4058 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4062 for (i = 0; i < adapter->num_tx_queues; i++)
4063 igb_clean_tx_ring(adapter->tx_ring[i]);
4067 * igb_free_rx_resources - Free Rx Resources
4068 * @rx_ring: ring to clean the resources from
4070 * Free all receive software resources
4072 void igb_free_rx_resources(struct igb_ring *rx_ring)
4074 igb_clean_rx_ring(rx_ring);
4076 vfree(rx_ring->rx_buffer_info);
4077 rx_ring->rx_buffer_info = NULL;
4079 /* if not set, then don't free */
4083 dma_free_coherent(rx_ring->dev, rx_ring->size,
4084 rx_ring->desc, rx_ring->dma);
4086 rx_ring->desc = NULL;
4090 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4091 * @adapter: board private structure
4093 * Free all receive software resources
4095 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4099 for (i = 0; i < adapter->num_rx_queues; i++)
4100 igb_free_rx_resources(adapter->rx_ring[i]);
4104 * igb_clean_rx_ring - Free Rx Buffers per Queue
4105 * @rx_ring: ring to free buffers from
4107 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4112 if (!rx_ring->rx_buffer_info)
4115 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4117 dev_kfree_skb(rx_ring->skb);
4118 rx_ring->skb = NULL;
4121 /* Free all the Rx ring sk_buffs */
4122 for (i = 0; i < rx_ring->count; i++) {
4123 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4124 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4125 if (buffer_info->dma) {
4126 dma_unmap_single(rx_ring->dev,
4128 rx_ring->rx_buffer_len,
4130 buffer_info->dma = 0;
4133 if (buffer_info->skb) {
4134 dev_kfree_skb(buffer_info->skb);
4135 buffer_info->skb = NULL;
4138 if (!buffer_info->page)
4141 dma_unmap_page(rx_ring->dev,
4145 __free_page(buffer_info->page);
4147 buffer_info->page = NULL;
4151 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4152 memset(rx_ring->rx_buffer_info, 0, size);
4154 /* Zero out the descriptor ring */
4155 memset(rx_ring->desc, 0, rx_ring->size);
4157 rx_ring->next_to_alloc = 0;
4158 rx_ring->next_to_clean = 0;
4159 rx_ring->next_to_use = 0;
4163 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4164 * @adapter: board private structure
4166 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4170 for (i = 0; i < adapter->num_rx_queues; i++)
4171 igb_clean_rx_ring(adapter->rx_ring[i]);
4175 * igb_set_mac - Change the Ethernet Address of the NIC
4176 * @netdev: network interface device structure
4177 * @p: pointer to an address structure
4179 * Returns 0 on success, negative on failure
4181 static int igb_set_mac(struct net_device *netdev, void *p)
4183 struct igb_adapter *adapter = netdev_priv(netdev);
4184 struct e1000_hw *hw = &adapter->hw;
4185 struct sockaddr *addr = p;
4187 if (!is_valid_ether_addr(addr->sa_data))
4188 return -EADDRNOTAVAIL;
4190 igb_del_mac_filter(adapter, hw->mac.addr,
4191 adapter->vfs_allocated_count);
4192 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4193 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4195 /* set the correct pool for the new PF MAC address in entry 0 */
4196 return igb_add_mac_filter(adapter, hw->mac.addr,
4197 adapter->vfs_allocated_count);
4201 * igb_write_mc_addr_list - write multicast addresses to MTA
4202 * @netdev: network interface device structure
4204 * Writes multicast address list to the MTA hash table.
4205 * Returns: -ENOMEM on failure
4206 * 0 on no addresses written
4207 * X on writing X addresses to MTA
4209 int igb_write_mc_addr_list(struct net_device *netdev)
4211 struct igb_adapter *adapter = netdev_priv(netdev);
4212 struct e1000_hw *hw = &adapter->hw;
4213 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4214 struct netdev_hw_addr *ha;
4216 struct dev_mc_list *ha;
4220 #ifdef CONFIG_IGB_VMDQ_NETDEV
4223 count = netdev_mc_count(netdev);
4224 #ifdef CONFIG_IGB_VMDQ_NETDEV
4225 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4226 if (!adapter->vmdq_netdev[vm])
4228 if (!netif_running(adapter->vmdq_netdev[vm]))
4230 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4235 e1000_update_mc_addr_list(hw, NULL, 0);
4238 mta_list = kzalloc(count * 6, GFP_ATOMIC);
4242 /* The shared function expects a packed array of only addresses. */
4244 netdev_for_each_mc_addr(ha, netdev)
4245 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4246 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4248 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4250 #ifdef CONFIG_IGB_VMDQ_NETDEV
4251 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4252 if (!adapter->vmdq_netdev[vm])
4254 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4255 !netdev_mc_count(adapter->vmdq_netdev[vm]))
4257 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4258 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4259 memcpy(mta_list + (i++ * ETH_ALEN),
4260 ha->addr, ETH_ALEN);
4262 memcpy(mta_list + (i++ * ETH_ALEN),
4263 ha->dmi_addr, ETH_ALEN);
4267 e1000_update_mc_addr_list(hw, mta_list, i);
4273 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4275 u32 rar_low, rar_high;
4276 struct e1000_hw *hw = &adapter->hw;
4277 u8 *addr = adapter->mac_table[index].addr;
4278 /* HW expects these in little endian so we reverse the byte order
4279 * from network order (big endian) to little endian
4281 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4282 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4283 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4285 /* Indicate to hardware the Address is Valid. */
4286 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4287 rar_high |= E1000_RAH_AV;
4289 if (hw->mac.type == e1000_82575)
4290 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4292 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4294 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4295 E1000_WRITE_FLUSH(hw);
4296 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4297 E1000_WRITE_FLUSH(hw);
4300 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4302 struct e1000_hw *hw = &adapter->hw;
4304 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4305 igb_rar_set(adapter, i);
4309 void igb_sync_mac_table(struct igb_adapter *adapter)
4311 struct e1000_hw *hw = &adapter->hw;
4313 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4314 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4315 igb_rar_set(adapter, i);
4316 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4320 int igb_available_rars(struct igb_adapter *adapter)
4322 struct e1000_hw *hw = &adapter->hw;
4325 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4326 if (adapter->mac_table[i].state == 0)
4332 #ifdef HAVE_SET_RX_MODE
4334 * igb_write_uc_addr_list - write unicast addresses to RAR table
4335 * @netdev: network interface device structure
4337 * Writes unicast address list to the RAR table.
4338 * Returns: -ENOMEM on failure/insufficient address space
4339 * 0 on no addresses written
4340 * X on writing X addresses to the RAR table
4342 static int igb_write_uc_addr_list(struct net_device *netdev)
4344 struct igb_adapter *adapter = netdev_priv(netdev);
4345 unsigned int vfn = adapter->vfs_allocated_count;
4348 /* return ENOMEM indicating insufficient memory for addresses */
4349 if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4351 if (!netdev_uc_empty(netdev)) {
4352 #ifdef NETDEV_HW_ADDR_T_UNICAST
4353 struct netdev_hw_addr *ha;
4355 struct dev_mc_list *ha;
4357 netdev_for_each_uc_addr(ha, netdev) {
4358 #ifdef NETDEV_HW_ADDR_T_UNICAST
4359 igb_del_mac_filter(adapter, ha->addr, vfn);
4360 igb_add_mac_filter(adapter, ha->addr, vfn);
4362 igb_del_mac_filter(adapter, ha->da_addr, vfn);
4363 igb_add_mac_filter(adapter, ha->da_addr, vfn);
4371 #endif /* HAVE_SET_RX_MODE */
4373 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4374 * @netdev: network interface device structure
4376 * The set_rx_mode entry point is called whenever the unicast or multicast
4377 * address lists or the network interface flags are updated. This routine is
4378 * responsible for configuring the hardware for proper unicast, multicast,
4379 * promiscuous mode, and all-multi behavior.
4381 static void igb_set_rx_mode(struct net_device *netdev)
4383 struct igb_adapter *adapter = netdev_priv(netdev);
4384 struct e1000_hw *hw = &adapter->hw;
4385 unsigned int vfn = adapter->vfs_allocated_count;
4386 u32 rctl, vmolr = 0;
4389 /* Check for Promiscuous and All Multicast modes */
4390 rctl = E1000_READ_REG(hw, E1000_RCTL);
4392 /* clear the effected bits */
4393 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4395 if (netdev->flags & IFF_PROMISC) {
4396 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4397 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4398 /* retain VLAN HW filtering if in VT mode */
4399 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4400 rctl |= E1000_RCTL_VFE;
4402 if (netdev->flags & IFF_ALLMULTI) {
4403 rctl |= E1000_RCTL_MPE;
4404 vmolr |= E1000_VMOLR_MPME;
4407 * Write addresses to the MTA, if the attempt fails
4408 * then we should just turn on promiscuous mode so
4409 * that we can at least receive multicast traffic
4411 count = igb_write_mc_addr_list(netdev);
4413 rctl |= E1000_RCTL_MPE;
4414 vmolr |= E1000_VMOLR_MPME;
4416 vmolr |= E1000_VMOLR_ROMPE;
4419 #ifdef HAVE_SET_RX_MODE
4421 * Write addresses to available RAR registers, if there is not
4422 * sufficient space to store all the addresses then enable
4423 * unicast promiscuous mode
4425 count = igb_write_uc_addr_list(netdev);
4427 rctl |= E1000_RCTL_UPE;
4428 vmolr |= E1000_VMOLR_ROPE;
4430 #endif /* HAVE_SET_RX_MODE */
4431 rctl |= E1000_RCTL_VFE;
4433 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4436 * In order to support SR-IOV and eventually VMDq it is necessary to set
4437 * the VMOLR to enable the appropriate modes. Without this workaround
4438 * we will have issues with VLAN tag stripping not being done for frames
4439 * that are only arriving because we are the default pool
4441 if (hw->mac.type < e1000_82576)
4444 vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4445 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4446 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4447 igb_restore_vf_multicasts(adapter);
4450 static void igb_check_wvbr(struct igb_adapter *adapter)
4452 struct e1000_hw *hw = &adapter->hw;
4455 switch (hw->mac.type) {
4458 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4465 adapter->wvbr |= wvbr;
4468 #define IGB_STAGGERED_QUEUE_OFFSET 8
4470 static void igb_spoof_check(struct igb_adapter *adapter)
4477 switch (adapter->hw.mac.type) {
4479 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4480 if (adapter->wvbr & (1 << j) ||
4481 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4482 DPRINTK(DRV, WARNING,
4483 "Spoof event(s) detected on VF %d\n", j);
4486 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4491 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4492 if (adapter->wvbr & (1 << j)) {
4493 DPRINTK(DRV, WARNING,
4494 "Spoof event(s) detected on VF %d\n", j);
4495 adapter->wvbr &= ~(1 << j);
4504 /* Need to wait a few seconds after link up to get diagnostic information from
4506 static void igb_update_phy_info(unsigned long data)
4508 struct igb_adapter *adapter = (struct igb_adapter *) data;
4509 e1000_get_phy_info(&adapter->hw);
4513 * igb_has_link - check shared code for link and determine up/down
4514 * @adapter: pointer to driver private info
4516 bool igb_has_link(struct igb_adapter *adapter)
4518 struct e1000_hw *hw = &adapter->hw;
4519 bool link_active = FALSE;
4521 /* get_link_status is set on LSC (link status) interrupt or
4522 * rx sequence error interrupt. get_link_status will stay
4523 * false until the e1000_check_for_link establishes link
4524 * for copper adapters ONLY
4526 switch (hw->phy.media_type) {
4527 case e1000_media_type_copper:
4528 if (!hw->mac.get_link_status)
4530 case e1000_media_type_internal_serdes:
4531 e1000_check_for_link(hw);
4532 link_active = !hw->mac.get_link_status;
4534 case e1000_media_type_unknown:
4539 if (((hw->mac.type == e1000_i210) ||
4540 (hw->mac.type == e1000_i211)) &&
4541 (hw->phy.id == I210_I_PHY_ID)) {
4542 if (!netif_carrier_ok(adapter->netdev)) {
4543 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4544 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4545 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4546 adapter->link_check_timeout = jiffies;
4554 * igb_watchdog - Timer Call-back
4555 * @data: pointer to adapter cast into an unsigned long
4557 static void igb_watchdog(unsigned long data)
4559 struct igb_adapter *adapter = (struct igb_adapter *)data;
4560 /* Do the rest outside of interrupt context */
4561 schedule_work(&adapter->watchdog_task);
4564 static void igb_watchdog_task(struct work_struct *work)
4566 struct igb_adapter *adapter = container_of(work,
4569 struct e1000_hw *hw = &adapter->hw;
4570 struct net_device *netdev = adapter->netdev;
4573 u32 thstat, ctrl_ext;
4576 link = igb_has_link(adapter);
4577 /* Force link down if we have fiber to swap to */
4578 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4579 if (hw->phy.media_type == e1000_media_type_copper) {
4580 connsw = E1000_READ_REG(hw, E1000_CONNSW);
4581 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4586 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4587 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4588 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4594 /* Perform a reset if the media type changed. */
4595 if (hw->dev_spec._82575.media_changed) {
4596 hw->dev_spec._82575.media_changed = false;
4597 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4601 /* Cancel scheduled suspend requests. */
4602 pm_runtime_resume(netdev->dev.parent);
4604 if (!netif_carrier_ok(netdev)) {
4606 e1000_get_speed_and_duplex(hw,
4607 &adapter->link_speed,
4608 &adapter->link_duplex);
4610 ctrl = E1000_READ_REG(hw, E1000_CTRL);
4611 /* Links status message must follow this format */
4612 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4613 "Flow Control: %s\n",
4615 adapter->link_speed,
4616 adapter->link_duplex == FULL_DUPLEX ?
4617 "Full Duplex" : "Half Duplex",
4618 ((ctrl & E1000_CTRL_TFCE) &&
4619 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4620 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4621 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
4622 /* adjust timeout factor according to speed/duplex */
4623 adapter->tx_timeout_factor = 1;
4624 switch (adapter->link_speed) {
4626 adapter->tx_timeout_factor = 14;
4629 /* maybe add some timeout factor ? */
4635 netif_carrier_on(netdev);
4636 netif_tx_wake_all_queues(netdev);
4638 igb_ping_all_vfs(adapter);
4640 igb_check_vf_rate_limit(adapter);
4641 #endif /* IFLA_VF_MAX */
4643 /* link state has changed, schedule phy info update */
4644 if (!test_bit(__IGB_DOWN, &adapter->state))
4645 mod_timer(&adapter->phy_info_timer,
4646 round_jiffies(jiffies + 2 * HZ));
4649 if (netif_carrier_ok(netdev)) {
4650 adapter->link_speed = 0;
4651 adapter->link_duplex = 0;
4652 /* check for thermal sensor event on i350 */
4653 if (hw->mac.type == e1000_i350) {
4654 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4655 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4656 if ((hw->phy.media_type ==
4657 e1000_media_type_copper) &&
4659 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4660 if (thstat & E1000_THSTAT_PWR_DOWN) {
4661 printk(KERN_ERR "igb: %s The "
4662 "network adapter was stopped "
4663 "because it overheated.\n",
4666 if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4668 "igb: %s The network "
4669 "adapter supported "
4679 /* Links status message must follow this format */
4680 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4682 netif_carrier_off(netdev);
4683 netif_tx_stop_all_queues(netdev);
4685 igb_ping_all_vfs(adapter);
4687 /* link state has changed, schedule phy info update */
4688 if (!test_bit(__IGB_DOWN, &adapter->state))
4689 mod_timer(&adapter->phy_info_timer,
4690 round_jiffies(jiffies + 2 * HZ));
4691 /* link is down, time to check for alternate media */
4692 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4693 igb_check_swap_media(adapter);
4694 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4695 schedule_work(&adapter->reset_task);
4696 /* return immediately */
4700 pm_schedule_suspend(netdev->dev.parent,
4703 /* also check for alternate media here */
4704 } else if (!netif_carrier_ok(netdev) &&
4705 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4706 hw->mac.ops.power_up_serdes(hw);
4707 igb_check_swap_media(adapter);
4708 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4709 schedule_work(&adapter->reset_task);
4710 /* return immediately */
4716 igb_update_stats(adapter);
4718 for (i = 0; i < adapter->num_tx_queues; i++) {
4719 struct igb_ring *tx_ring = adapter->tx_ring[i];
4720 if (!netif_carrier_ok(netdev)) {
4721 /* We've lost link, so the controller stops DMA,
4722 * but we've got queued Tx work that's never going
4723 * to get done, so reset controller to flush Tx.
4724 * (Do the reset outside of interrupt context). */
4725 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4726 adapter->tx_timeout_count++;
4727 schedule_work(&adapter->reset_task);
4728 /* return immediately since reset is imminent */
4733 /* Force detection of hung controller every watchdog period */
4734 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4737 /* Cause software interrupt to ensure rx ring is cleaned */
4738 if (adapter->msix_entries) {
4740 for (i = 0; i < adapter->num_q_vectors; i++)
4741 eics |= adapter->q_vector[i]->eims_value;
4742 E1000_WRITE_REG(hw, E1000_EICS, eics);
4744 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4747 igb_spoof_check(adapter);
4749 /* Reset the timer */
4750 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4751 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4752 mod_timer(&adapter->watchdog_timer,
4753 round_jiffies(jiffies + HZ));
4755 mod_timer(&adapter->watchdog_timer,
4756 round_jiffies(jiffies + 2 * HZ));
4760 static void igb_dma_err_task(struct work_struct *work)
4762 struct igb_adapter *adapter = container_of(work,
4766 struct e1000_hw *hw = &adapter->hw;
4767 struct net_device *netdev = adapter->netdev;
4771 hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4772 if (hgptc) /* If incrementing then no need for the check below */
4773 goto dma_timer_reset;
4775 * Check to see if a bad DMA write target from an errant or
4776 * malicious VF has caused a PCIe error. If so then we can
4777 * issue a VFLR to the offending VF(s) and then resume without
4778 * requesting a full slot reset.
4781 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4782 ciaa = (vf << 16) | 0x80000000;
4783 /* 32 bit read so align, we really want status at offset 6 */
4784 ciaa |= PCI_COMMAND;
4785 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4786 ciad = E1000_READ_REG(hw, E1000_CIAD);
4788 /* disable debug mode asap after reading data */
4789 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4790 /* Get the upper 16 bits which will be the PCI status reg */
4792 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4793 PCI_STATUS_REC_TARGET_ABORT |
4794 PCI_STATUS_SIG_SYSTEM_ERROR)) {
4795 netdev_err(netdev, "VF %d suffered error\n", vf);
4797 ciaa = (vf << 16) | 0x80000000;
4799 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4800 ciad = 0x00008000; /* VFLR */
4801 E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4803 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4807 /* Reset the timer */
4808 if (!test_bit(__IGB_DOWN, &adapter->state))
4809 mod_timer(&adapter->dma_err_timer,
4810 round_jiffies(jiffies + HZ / 10));
4814 * igb_dma_err_timer - Timer Call-back
4815 * @data: pointer to adapter cast into an unsigned long
4817 static void igb_dma_err_timer(unsigned long data)
4819 struct igb_adapter *adapter = (struct igb_adapter *)data;
4820 /* Do the rest outside of interrupt context */
4821 schedule_work(&adapter->dma_err_task);
4824 enum latency_range {
4828 latency_invalid = 255
4832 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4834 * Stores a new ITR value based on strictly on packet size. This
4835 * algorithm is less sophisticated than that used in igb_update_itr,
4836 * due to the difficulty of synchronizing statistics across multiple
4837 * receive rings. The divisors and thresholds used by this function
4838 * were determined based on theoretical maximum wire speed and testing
4839 * data, in order to minimize response time while increasing bulk
4841 * This functionality is controlled by the InterruptThrottleRate module
4842 * parameter (see igb_param.c)
4843 * NOTE: This function is called only when operating in a multiqueue
4844 * receive environment.
4845 * @q_vector: pointer to q_vector
4847 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4849 int new_val = q_vector->itr_val;
4850 int avg_wire_size = 0;
4851 struct igb_adapter *adapter = q_vector->adapter;
4852 unsigned int packets;
4854 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4855 * ints/sec - ITR timer value of 120 ticks.
4857 switch (adapter->link_speed) {
4860 new_val = IGB_4K_ITR;
4866 packets = q_vector->rx.total_packets;
4868 avg_wire_size = q_vector->rx.total_bytes / packets;
4870 packets = q_vector->tx.total_packets;
4872 avg_wire_size = max_t(u32, avg_wire_size,
4873 q_vector->tx.total_bytes / packets);
4875 /* if avg_wire_size isn't set no work was done */
4879 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4880 avg_wire_size += 24;
4882 /* Don't starve jumbo frames */
4883 avg_wire_size = min(avg_wire_size, 3000);
4885 /* Give a little boost to mid-size frames */
4886 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4887 new_val = avg_wire_size / 3;
4889 new_val = avg_wire_size / 2;
4891 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4892 if (new_val < IGB_20K_ITR &&
4893 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4894 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4895 new_val = IGB_20K_ITR;
4898 if (new_val != q_vector->itr_val) {
4899 q_vector->itr_val = new_val;
4900 q_vector->set_itr = 1;
4903 q_vector->rx.total_bytes = 0;
4904 q_vector->rx.total_packets = 0;
4905 q_vector->tx.total_bytes = 0;
4906 q_vector->tx.total_packets = 0;
4910 * igb_update_itr - update the dynamic ITR value based on statistics
4911 * Stores a new ITR value based on packets and byte
4912 * counts during the last interrupt. The advantage of per interrupt
4913 * computation is faster updates and more accurate ITR for the current
4914 * traffic pattern. Constants in this function were computed
4915 * based on theoretical maximum wire speed and thresholds were set based
4916 * on testing data as well as attempting to minimize response time
4917 * while increasing bulk throughput.
4918 * this functionality is controlled by the InterruptThrottleRate module
4919 * parameter (see igb_param.c)
4920 * NOTE: These calculations are only valid when operating in a single-
4921 * queue environment.
4922 * @q_vector: pointer to q_vector
4923 * @ring_container: ring info to update the itr for
4925 static void igb_update_itr(struct igb_q_vector *q_vector,
4926 struct igb_ring_container *ring_container)
4928 unsigned int packets = ring_container->total_packets;
4929 unsigned int bytes = ring_container->total_bytes;
4930 u8 itrval = ring_container->itr;
4932 /* no packets, exit with status unchanged */
4937 case lowest_latency:
4938 /* handle TSO and jumbo frames */
4939 if (bytes/packets > 8000)
4940 itrval = bulk_latency;
4941 else if ((packets < 5) && (bytes > 512))
4942 itrval = low_latency;
4944 case low_latency: /* 50 usec aka 20000 ints/s */
4945 if (bytes > 10000) {
4946 /* this if handles the TSO accounting */
4947 if (bytes/packets > 8000) {
4948 itrval = bulk_latency;
4949 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4950 itrval = bulk_latency;
4951 } else if ((packets > 35)) {
4952 itrval = lowest_latency;
4954 } else if (bytes/packets > 2000) {
4955 itrval = bulk_latency;
4956 } else if (packets <= 2 && bytes < 512) {
4957 itrval = lowest_latency;
4960 case bulk_latency: /* 250 usec aka 4000 ints/s */
4961 if (bytes > 25000) {
4963 itrval = low_latency;
4964 } else if (bytes < 1500) {
4965 itrval = low_latency;
4970 /* clear work counters since we have the values we need */
4971 ring_container->total_bytes = 0;
4972 ring_container->total_packets = 0;
4974 /* write updated itr to ring container */
4975 ring_container->itr = itrval;
4978 static void igb_set_itr(struct igb_q_vector *q_vector)
4980 struct igb_adapter *adapter = q_vector->adapter;
4981 u32 new_itr = q_vector->itr_val;
4984 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4985 switch (adapter->link_speed) {
4989 new_itr = IGB_4K_ITR;
4995 igb_update_itr(q_vector, &q_vector->tx);
4996 igb_update_itr(q_vector, &q_vector->rx);
4998 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5000 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5001 if (current_itr == lowest_latency &&
5002 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5003 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5004 current_itr = low_latency;
5006 switch (current_itr) {
5007 /* counts and packets in update_itr are dependent on these numbers */
5008 case lowest_latency:
5009 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5012 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5015 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5022 if (new_itr != q_vector->itr_val) {
5023 /* this attempts to bias the interrupt rate towards Bulk
5024 * by adding intermediate steps when interrupt rate is
5026 new_itr = new_itr > q_vector->itr_val ?
5027 max((new_itr * q_vector->itr_val) /
5028 (new_itr + (q_vector->itr_val >> 2)),
5031 /* Don't write the value here; it resets the adapter's
5032 * internal timer, and causes us to delay far longer than
5033 * we should between interrupts. Instead, we write the ITR
5034 * value at the beginning of the next interrupt so the timing
5035 * ends up being correct.
5037 q_vector->itr_val = new_itr;
5038 q_vector->set_itr = 1;
5042 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5043 u32 type_tucmd, u32 mss_l4len_idx)
5045 struct e1000_adv_tx_context_desc *context_desc;
5046 u16 i = tx_ring->next_to_use;
5048 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5051 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5053 /* set bits to identify this as an advanced context descriptor */
5054 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5056 /* For 82575, context index must be unique per ring. */
5057 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5058 mss_l4len_idx |= tx_ring->reg_idx << 4;
5060 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5061 context_desc->seqnum_seed = 0;
5062 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5063 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5066 static int igb_tso(struct igb_ring *tx_ring,
5067 struct igb_tx_buffer *first,
5071 struct sk_buff *skb = first->skb;
5072 u32 vlan_macip_lens, type_tucmd;
5073 u32 mss_l4len_idx, l4len;
5075 if (skb->ip_summed != CHECKSUM_PARTIAL)
5078 if (!skb_is_gso(skb))
5079 #endif /* NETIF_F_TSO */
5083 if (skb_header_cloned(skb)) {
5084 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5089 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5090 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5092 if (first->protocol == __constant_htons(ETH_P_IP)) {
5093 struct iphdr *iph = ip_hdr(skb);
5096 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5100 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5101 first->tx_flags |= IGB_TX_FLAGS_TSO |
5105 } else if (skb_is_gso_v6(skb)) {
5106 ipv6_hdr(skb)->payload_len = 0;
5107 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5108 &ipv6_hdr(skb)->daddr,
5110 first->tx_flags |= IGB_TX_FLAGS_TSO |
5115 /* compute header lengths */
5116 l4len = tcp_hdrlen(skb);
5117 *hdr_len = skb_transport_offset(skb) + l4len;
5119 /* update gso size and bytecount with header size */
5120 first->gso_segs = skb_shinfo(skb)->gso_segs;
5121 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5124 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5125 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5127 /* VLAN MACLEN IPLEN */
5128 vlan_macip_lens = skb_network_header_len(skb);
5129 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5130 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5132 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5135 #endif /* NETIF_F_TSO */
5138 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5140 struct sk_buff *skb = first->skb;
5141 u32 vlan_macip_lens = 0;
5142 u32 mss_l4len_idx = 0;
5145 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5146 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5150 switch (first->protocol) {
5151 case __constant_htons(ETH_P_IP):
5152 vlan_macip_lens |= skb_network_header_len(skb);
5153 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5154 nexthdr = ip_hdr(skb)->protocol;
5156 #ifdef NETIF_F_IPV6_CSUM
5157 case __constant_htons(ETH_P_IPV6):
5158 vlan_macip_lens |= skb_network_header_len(skb);
5159 nexthdr = ipv6_hdr(skb)->nexthdr;
5163 if (unlikely(net_ratelimit())) {
5164 dev_warn(tx_ring->dev,
5165 "partial checksum but proto=%x!\n",
5173 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5174 mss_l4len_idx = tcp_hdrlen(skb) <<
5175 E1000_ADVTXD_L4LEN_SHIFT;
5179 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5180 mss_l4len_idx = sizeof(struct sctphdr) <<
5181 E1000_ADVTXD_L4LEN_SHIFT;
5185 mss_l4len_idx = sizeof(struct udphdr) <<
5186 E1000_ADVTXD_L4LEN_SHIFT;
5189 if (unlikely(net_ratelimit())) {
5190 dev_warn(tx_ring->dev,
5191 "partial checksum but l4 proto=%x!\n",
5197 /* update TX checksum flag */
5198 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5201 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5202 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5204 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5207 #define IGB_SET_FLAG(_input, _flag, _result) \
5208 ((_flag <= _result) ? \
5209 ((u32)(_input & _flag) * (_result / _flag)) : \
5210 ((u32)(_input & _flag) / (_flag / _result)))
5212 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5214 /* set type for advanced descriptor with frame checksum insertion */
5215 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5216 E1000_ADVTXD_DCMD_DEXT |
5217 E1000_ADVTXD_DCMD_IFCS;
5219 /* set HW vlan bit if vlan is present */
5220 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5221 (E1000_ADVTXD_DCMD_VLE));
5223 /* set segmentation bits for TSO */
5224 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5225 (E1000_ADVTXD_DCMD_TSE));
5227 /* set timestamp bit if present */
5228 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5229 (E1000_ADVTXD_MAC_TSTAMP));
5234 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5235 union e1000_adv_tx_desc *tx_desc,
5236 u32 tx_flags, unsigned int paylen)
5238 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5240 /* 82575 requires a unique index per ring */
5241 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5242 olinfo_status |= tx_ring->reg_idx << 4;
5244 /* insert L4 checksum */
5245 olinfo_status |= IGB_SET_FLAG(tx_flags,
5247 (E1000_TXD_POPTS_TXSM << 8));
5249 /* insert IPv4 checksum */
5250 olinfo_status |= IGB_SET_FLAG(tx_flags,
5252 (E1000_TXD_POPTS_IXSM << 8));
5254 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5257 static void igb_tx_map(struct igb_ring *tx_ring,
5258 struct igb_tx_buffer *first,
5261 struct sk_buff *skb = first->skb;
5262 struct igb_tx_buffer *tx_buffer;
5263 union e1000_adv_tx_desc *tx_desc;
5264 struct skb_frag_struct *frag;
5266 unsigned int data_len, size;
5267 u32 tx_flags = first->tx_flags;
5268 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5269 u16 i = tx_ring->next_to_use;
5271 tx_desc = IGB_TX_DESC(tx_ring, i);
5273 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5275 size = skb_headlen(skb);
5276 data_len = skb->data_len;
5278 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5282 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5283 if (dma_mapping_error(tx_ring->dev, dma))
5286 /* record length, and DMA address */
5287 dma_unmap_len_set(tx_buffer, len, size);
5288 dma_unmap_addr_set(tx_buffer, dma, dma);
5290 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5292 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5293 tx_desc->read.cmd_type_len =
5294 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5298 if (i == tx_ring->count) {
5299 tx_desc = IGB_TX_DESC(tx_ring, 0);
5302 tx_desc->read.olinfo_status = 0;
5304 dma += IGB_MAX_DATA_PER_TXD;
5305 size -= IGB_MAX_DATA_PER_TXD;
5307 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5310 if (likely(!data_len))
5313 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5317 if (i == tx_ring->count) {
5318 tx_desc = IGB_TX_DESC(tx_ring, 0);
5321 tx_desc->read.olinfo_status = 0;
5323 size = skb_frag_size(frag);
5326 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5327 size, DMA_TO_DEVICE);
5329 tx_buffer = &tx_ring->tx_buffer_info[i];
5332 /* write last descriptor with RS and EOP bits */
5333 cmd_type |= size | IGB_TXD_DCMD;
5334 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5336 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5337 /* set the timestamp */
5338 first->time_stamp = jiffies;
5341 * Force memory writes to complete before letting h/w know there
5342 * are new descriptors to fetch. (Only applicable for weak-ordered
5343 * memory model archs, such as IA-64).
5345 * We also need this memory barrier to make certain all of the
5346 * status bits have been updated before next_to_watch is written.
5350 /* set next_to_watch value indicating a packet is present */
5351 first->next_to_watch = tx_desc;
5354 if (i == tx_ring->count)
5357 tx_ring->next_to_use = i;
5359 writel(i, tx_ring->tail);
5361 /* we need this if more than one processor can write to our tail
5362 * at a time, it syncronizes IO on IA64/Altix systems */
5368 dev_err(tx_ring->dev, "TX DMA map failed\n");
5370 /* clear dma mappings for failed tx_buffer_info map */
5372 tx_buffer = &tx_ring->tx_buffer_info[i];
5373 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5374 if (tx_buffer == first)
5381 tx_ring->next_to_use = i;
5384 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5386 struct net_device *netdev = netdev_ring(tx_ring);
5388 if (netif_is_multiqueue(netdev))
5389 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5391 netif_stop_queue(netdev);
5393 /* Herbert's original patch had:
5394 * smp_mb__after_netif_stop_queue();
5395 * but since that doesn't exist yet, just open code it. */
5398 /* We need to check again in a case another CPU has just
5399 * made room available. */
5400 if (igb_desc_unused(tx_ring) < size)
5404 if (netif_is_multiqueue(netdev))
5405 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5407 netif_wake_queue(netdev);
5409 tx_ring->tx_stats.restart_queue++;
5414 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5416 if (igb_desc_unused(tx_ring) >= size)
5418 return __igb_maybe_stop_tx(tx_ring, size);
5421 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5422 struct igb_ring *tx_ring)
5424 struct igb_tx_buffer *first;
5427 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5430 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5431 __be16 protocol = vlan_get_protocol(skb);
5435 * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5436 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5437 * + 2 desc gap to keep tail from touching head,
5438 * + 1 desc for context descriptor,
5439 * otherwise try next time
5441 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5442 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5443 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5445 count += skb_shinfo(skb)->nr_frags;
5447 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5448 /* this is a hard error */
5449 return NETDEV_TX_BUSY;
5452 /* record the location of the first descriptor for this packet */
5453 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5455 first->bytecount = skb->len;
5456 first->gso_segs = 1;
5458 skb_tx_timestamp(skb);
5460 #ifdef HAVE_PTP_1588_CLOCK
5461 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5462 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5463 if (!adapter->ptp_tx_skb) {
5464 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5465 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5467 adapter->ptp_tx_skb = skb_get(skb);
5468 adapter->ptp_tx_start = jiffies;
5469 if (adapter->hw.mac.type == e1000_82576)
5470 schedule_work(&adapter->ptp_tx_work);
5473 #endif /* HAVE_PTP_1588_CLOCK */
5475 if (vlan_tx_tag_present(skb)) {
5476 tx_flags |= IGB_TX_FLAGS_VLAN;
5477 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5480 /* record initial flags and protocol */
5481 first->tx_flags = tx_flags;
5482 first->protocol = protocol;
5484 tso = igb_tso(tx_ring, first, &hdr_len);
5488 igb_tx_csum(tx_ring, first);
5490 igb_tx_map(tx_ring, first, hdr_len);
5492 #ifndef HAVE_TRANS_START_IN_QUEUE
5493 netdev_ring(tx_ring)->trans_start = jiffies;
5496 /* Make sure there is space in the ring for the next send. */
5497 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5499 return NETDEV_TX_OK;
5502 igb_unmap_and_free_tx_resource(tx_ring, first);
5504 return NETDEV_TX_OK;
5508 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5509 struct sk_buff *skb)
5511 unsigned int r_idx = skb->queue_mapping;
5513 if (r_idx >= adapter->num_tx_queues)
5514 r_idx = r_idx % adapter->num_tx_queues;
5516 return adapter->tx_ring[r_idx];
5519 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5522 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5523 struct net_device *netdev)
5525 struct igb_adapter *adapter = netdev_priv(netdev);
5527 if (test_bit(__IGB_DOWN, &adapter->state)) {
5528 dev_kfree_skb_any(skb);
5529 return NETDEV_TX_OK;
5532 if (skb->len <= 0) {
5533 dev_kfree_skb_any(skb);
5534 return NETDEV_TX_OK;
5538 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5539 * in order to meet this minimum size requirement.
5541 if (skb->len < 17) {
5542 if (skb_padto(skb, 17))
5543 return NETDEV_TX_OK;
5547 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5551 * igb_tx_timeout - Respond to a Tx Hang
5552 * @netdev: network interface device structure
5554 static void igb_tx_timeout(struct net_device *netdev)
5556 struct igb_adapter *adapter = netdev_priv(netdev);
5557 struct e1000_hw *hw = &adapter->hw;
5559 /* Do the reset outside of interrupt context */
5560 adapter->tx_timeout_count++;
5562 if (hw->mac.type >= e1000_82580)
5563 hw->dev_spec._82575.global_device_reset = true;
5565 schedule_work(&adapter->reset_task);
5566 E1000_WRITE_REG(hw, E1000_EICS,
5567 (adapter->eims_enable_mask & ~adapter->eims_other));
5570 static void igb_reset_task(struct work_struct *work)
5572 struct igb_adapter *adapter;
5573 adapter = container_of(work, struct igb_adapter, reset_task);
5575 igb_reinit_locked(adapter);
5579 * igb_get_stats - Get System Network Statistics
5580 * @netdev: network interface device structure
5582 * Returns the address of the device statistics structure.
5583 * The statistics are updated here and also from the timer callback.
5585 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5587 struct igb_adapter *adapter = netdev_priv(netdev);
5589 if (!test_bit(__IGB_RESETTING, &adapter->state))
5590 igb_update_stats(adapter);
5592 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5593 /* only return the current stats */
5594 return &netdev->stats;
5596 /* only return the current stats */
5597 return &adapter->net_stats;
5598 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5602 * igb_change_mtu - Change the Maximum Transfer Unit
5603 * @netdev: network interface device structure
5604 * @new_mtu: new value for maximum frame size
5606 * Returns 0 on success, negative on failure
5608 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5610 struct igb_adapter *adapter = netdev_priv(netdev);
5611 struct e1000_hw *hw = &adapter->hw;
5612 struct pci_dev *pdev = adapter->pdev;
5613 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5615 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5616 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5620 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5621 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5622 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5626 /* adjust max frame to be at least the size of a standard frame */
5627 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5628 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5630 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5631 usleep_range(1000, 2000);
5633 /* igb_down has a dependency on max_frame_size */
5634 adapter->max_frame_size = max_frame;
5636 if (netif_running(netdev))
5639 dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5640 netdev->mtu, new_mtu);
5641 netdev->mtu = new_mtu;
5642 hw->dev_spec._82575.mtu = new_mtu;
5644 if (netif_running(netdev))
5649 clear_bit(__IGB_RESETTING, &adapter->state);
5655 * igb_update_stats - Update the board statistics counters
5656 * @adapter: board private structure
5659 void igb_update_stats(struct igb_adapter *adapter)
5661 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5662 struct net_device_stats *net_stats = &adapter->netdev->stats;
5664 struct net_device_stats *net_stats = &adapter->net_stats;
5665 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5666 struct e1000_hw *hw = &adapter->hw;
5668 struct pci_dev *pdev = adapter->pdev;
5675 u32 flushed = 0, coal = 0;
5676 struct igb_q_vector *q_vector;
5679 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5682 * Prevent stats update while adapter is being reset, or if the pci
5683 * connection is down.
5685 if (adapter->link_speed == 0)
5688 if (pci_channel_offline(pdev))
5693 for (i = 0; i < adapter->num_q_vectors; i++) {
5694 q_vector = adapter->q_vector[i];
5697 flushed += q_vector->lrolist.stats.flushed;
5698 coal += q_vector->lrolist.stats.coal;
5700 adapter->lro_stats.flushed = flushed;
5701 adapter->lro_stats.coal = coal;
5706 for (i = 0; i < adapter->num_rx_queues; i++) {
5707 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5708 struct igb_ring *ring = adapter->rx_ring[i];
5709 ring->rx_stats.drops += rqdpc_tmp;
5710 net_stats->rx_fifo_errors += rqdpc_tmp;
5711 #ifdef CONFIG_IGB_VMDQ_NETDEV
5712 if (!ring->vmdq_netdev) {
5713 bytes += ring->rx_stats.bytes;
5714 packets += ring->rx_stats.packets;
5717 bytes += ring->rx_stats.bytes;
5718 packets += ring->rx_stats.packets;
5722 net_stats->rx_bytes = bytes;
5723 net_stats->rx_packets = packets;
5727 for (i = 0; i < adapter->num_tx_queues; i++) {
5728 struct igb_ring *ring = adapter->tx_ring[i];
5729 #ifdef CONFIG_IGB_VMDQ_NETDEV
5730 if (!ring->vmdq_netdev) {
5731 bytes += ring->tx_stats.bytes;
5732 packets += ring->tx_stats.packets;
5735 bytes += ring->tx_stats.bytes;
5736 packets += ring->tx_stats.packets;
5739 net_stats->tx_bytes = bytes;
5740 net_stats->tx_packets = packets;
5742 /* read stats registers */
5743 adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5744 adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5745 adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5746 E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5747 adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5748 adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5749 adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5751 adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5752 adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5753 adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5754 adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5755 adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5756 adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5757 adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5758 adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5760 mpc = E1000_READ_REG(hw, E1000_MPC);
5761 adapter->stats.mpc += mpc;
5762 net_stats->rx_fifo_errors += mpc;
5763 adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5764 adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5765 adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5766 adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5767 adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5768 adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5769 adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5770 adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5771 adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5772 adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5773 adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5774 adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5775 adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5776 E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5777 adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5778 adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5779 adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5780 adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5781 adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5782 adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5783 adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5785 adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5786 adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5787 adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5788 adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5789 adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5790 adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5792 adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5793 adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5795 adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5796 adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5798 adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5799 /* read internal phy sepecific stats */
5800 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5801 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5802 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5804 /* this stat has invalid values on i210/i211 */
5805 if ((hw->mac.type != e1000_i210) &&
5806 (hw->mac.type != e1000_i211))
5807 adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5809 adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5810 adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5812 adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5813 adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5814 adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5815 adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5816 adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5817 adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5818 adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5819 adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5820 adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5822 /* Fill out the OS statistics structure */
5823 net_stats->multicast = adapter->stats.mprc;
5824 net_stats->collisions = adapter->stats.colc;
5828 /* RLEC on some newer hardware can be incorrect so build
5829 * our own version based on RUC and ROC */
5830 net_stats->rx_errors = adapter->stats.rxerrc +
5831 adapter->stats.crcerrs + adapter->stats.algnerrc +
5832 adapter->stats.ruc + adapter->stats.roc +
5833 adapter->stats.cexterr;
5834 net_stats->rx_length_errors = adapter->stats.ruc +
5836 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5837 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5838 net_stats->rx_missed_errors = adapter->stats.mpc;
5841 net_stats->tx_errors = adapter->stats.ecol +
5842 adapter->stats.latecol;
5843 net_stats->tx_aborted_errors = adapter->stats.ecol;
5844 net_stats->tx_window_errors = adapter->stats.latecol;
5845 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5847 /* Tx Dropped needs to be maintained elsewhere */
5850 if (hw->phy.media_type == e1000_media_type_copper) {
5851 if ((adapter->link_speed == SPEED_1000) &&
5852 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5853 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5854 adapter->phy_stats.idle_errors += phy_tmp;
5858 /* Management Stats */
5859 adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5860 adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5861 if (hw->mac.type > e1000_82580) {
5862 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5863 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5864 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5865 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5869 static irqreturn_t igb_msix_other(int irq, void *data)
5871 struct igb_adapter *adapter = data;
5872 struct e1000_hw *hw = &adapter->hw;
5873 u32 icr = E1000_READ_REG(hw, E1000_ICR);
5874 /* reading ICR causes bit 31 of EICR to be cleared */
5876 if (icr & E1000_ICR_DRSTA)
5877 schedule_work(&adapter->reset_task);
5879 if (icr & E1000_ICR_DOUTSYNC) {
5880 /* HW is reporting DMA is out of sync */
5881 adapter->stats.doosync++;
5882 /* The DMA Out of Sync is also indication of a spoof event
5883 * in IOV mode. Check the Wrong VM Behavior register to
5884 * see if it is really a spoof event. */
5885 igb_check_wvbr(adapter);
5888 /* Check for a mailbox event */
5889 if (icr & E1000_ICR_VMMB)
5890 igb_msg_task(adapter);
5892 if (icr & E1000_ICR_LSC) {
5893 hw->mac.get_link_status = 1;
5894 /* guard against interrupt when we're going down */
5895 if (!test_bit(__IGB_DOWN, &adapter->state))
5896 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5899 #ifdef HAVE_PTP_1588_CLOCK
5900 if (icr & E1000_ICR_TS) {
5901 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5903 if (tsicr & E1000_TSICR_TXTS) {
5904 /* acknowledge the interrupt */
5905 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5906 /* retrieve hardware timestamp */
5907 schedule_work(&adapter->ptp_tx_work);
5910 #endif /* HAVE_PTP_1588_CLOCK */
5912 /* Check for MDD event */
5913 if (icr & E1000_ICR_MDDET)
5914 igb_process_mdd_event(adapter);
5916 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5921 static void igb_write_itr(struct igb_q_vector *q_vector)
5923 struct igb_adapter *adapter = q_vector->adapter;
5924 u32 itr_val = q_vector->itr_val & 0x7FFC;
5926 if (!q_vector->set_itr)
5932 if (adapter->hw.mac.type == e1000_82575)
5933 itr_val |= itr_val << 16;
5935 itr_val |= E1000_EITR_CNT_IGNR;
5937 writel(itr_val, q_vector->itr_register);
5938 q_vector->set_itr = 0;
5941 static irqreturn_t igb_msix_ring(int irq, void *data)
5943 struct igb_q_vector *q_vector = data;
5945 /* Write the ITR value calculated from the previous interrupt. */
5946 igb_write_itr(q_vector);
5948 napi_schedule(&q_vector->napi);
5954 static void igb_update_tx_dca(struct igb_adapter *adapter,
5955 struct igb_ring *tx_ring,
5958 struct e1000_hw *hw = &adapter->hw;
5959 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5961 if (hw->mac.type != e1000_82575)
5962 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5965 * We can enable relaxed ordering for reads, but not writes when
5966 * DCA is enabled. This is due to a known issue in some chipsets
5967 * which will cause the DCA tag to be cleared.
5969 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5970 E1000_DCA_TXCTRL_DATA_RRO_EN |
5971 E1000_DCA_TXCTRL_DESC_DCA_EN;
5973 E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5976 static void igb_update_rx_dca(struct igb_adapter *adapter,
5977 struct igb_ring *rx_ring,
5980 struct e1000_hw *hw = &adapter->hw;
5981 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5983 if (hw->mac.type != e1000_82575)
5984 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
5987 * We can enable relaxed ordering for reads, but not writes when
5988 * DCA is enabled. This is due to a known issue in some chipsets
5989 * which will cause the DCA tag to be cleared.
5991 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5992 E1000_DCA_RXCTRL_DESC_DCA_EN;
5994 E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5997 static void igb_update_dca(struct igb_q_vector *q_vector)
5999 struct igb_adapter *adapter = q_vector->adapter;
6000 int cpu = get_cpu();
6002 if (q_vector->cpu == cpu)
6005 if (q_vector->tx.ring)
6006 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6008 if (q_vector->rx.ring)
6009 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6011 q_vector->cpu = cpu;
6016 static void igb_setup_dca(struct igb_adapter *adapter)
6018 struct e1000_hw *hw = &adapter->hw;
6021 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6024 /* Always use CB2 mode, difference is masked in the CB driver. */
6025 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6027 for (i = 0; i < adapter->num_q_vectors; i++) {
6028 adapter->q_vector[i]->cpu = -1;
6029 igb_update_dca(adapter->q_vector[i]);
6033 static int __igb_notify_dca(struct device *dev, void *data)
6035 struct net_device *netdev = dev_get_drvdata(dev);
6036 struct igb_adapter *adapter = netdev_priv(netdev);
6037 struct pci_dev *pdev = adapter->pdev;
6038 struct e1000_hw *hw = &adapter->hw;
6039 unsigned long event = *(unsigned long *)data;
6042 case DCA_PROVIDER_ADD:
6043 /* if already enabled, don't do it again */
6044 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6046 if (dca_add_requester(dev) == E1000_SUCCESS) {
6047 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6048 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6049 igb_setup_dca(adapter);
6052 /* Fall Through since DCA is disabled. */
6053 case DCA_PROVIDER_REMOVE:
6054 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6055 /* without this a class_device is left
6056 * hanging around in the sysfs model */
6057 dca_remove_requester(dev);
6058 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6059 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6060 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6065 return E1000_SUCCESS;
6068 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6073 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6076 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6078 #endif /* IGB_DCA */
6080 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6082 unsigned char mac_addr[ETH_ALEN];
6084 random_ether_addr(mac_addr);
6085 igb_set_vf_mac(adapter, vf, mac_addr);
6088 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6089 /* By default spoof check is enabled for all VFs */
6090 adapter->vf_data[vf].spoofchk_enabled = true;
6097 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6099 struct e1000_hw *hw = &adapter->hw;
6103 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6104 ping = E1000_PF_CONTROL_MSG;
6105 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6106 ping |= E1000_VT_MSGTYPE_CTS;
6107 e1000_write_mbx(hw, &ping, 1, i);
6112 * igb_mta_set_ - Set multicast filter table address
6113 * @adapter: pointer to the adapter structure
6114 * @hash_value: determines the MTA register and bit to set
6116 * The multicast table address is a register array of 32-bit registers.
6117 * The hash_value is used to determine what register the bit is in, the
6118 * current value is read, the new bit is OR'd in and the new value is
6119 * written back into the register.
6121 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6123 struct e1000_hw *hw = &adapter->hw;
6124 u32 hash_bit, hash_reg, mta;
6127 * The MTA is a register array of 32-bit registers. It is
6128 * treated like an array of (32*mta_reg_count) bits. We want to
6129 * set bit BitArray[hash_value]. So we figure out what register
6130 * the bit is in, read it, OR in the new bit, then write
6131 * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
6132 * mask to bits 31:5 of the hash value which gives us the
6133 * register we're modifying. The hash bit within that register
6134 * is determined by the lower 5 bits of the hash value.
6136 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6137 hash_bit = hash_value & 0x1F;
6139 mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6141 mta |= (1 << hash_bit);
6143 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6144 E1000_WRITE_FLUSH(hw);
6147 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6150 struct e1000_hw *hw = &adapter->hw;
6151 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6152 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6154 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6155 IGB_VF_FLAG_MULTI_PROMISC);
6156 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6158 #ifdef IGB_ENABLE_VF_PROMISC
6159 if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6160 vmolr |= E1000_VMOLR_ROPE;
6161 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6162 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6165 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6166 vmolr |= E1000_VMOLR_MPME;
6167 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6168 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6171 * if we have hashes and we are clearing a multicast promisc
6172 * flag we need to write the hashes to the MTA as this step
6173 * was previously skipped
6175 if (vf_data->num_vf_mc_hashes > 30) {
6176 vmolr |= E1000_VMOLR_MPME;
6177 } else if (vf_data->num_vf_mc_hashes) {
6179 vmolr |= E1000_VMOLR_ROMPE;
6180 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6181 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6185 E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6187 /* there are flags left unprocessed, likely not supported */
6188 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6195 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6196 u32 *msgbuf, u32 vf)
6198 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6199 u16 *hash_list = (u16 *)&msgbuf[1];
6200 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6203 /* salt away the number of multicast addresses assigned
6204 * to this VF for later use to restore when the PF multi cast
6207 vf_data->num_vf_mc_hashes = n;
6209 /* only up to 30 hash values supported */
6213 /* store the hashes for later use */
6214 for (i = 0; i < n; i++)
6215 vf_data->vf_mc_hashes[i] = hash_list[i];
6217 /* Flush and reset the mta with the new values */
6218 igb_set_rx_mode(adapter->netdev);
6223 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6225 struct e1000_hw *hw = &adapter->hw;
6226 struct vf_data_storage *vf_data;
6229 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6230 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6231 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6233 vf_data = &adapter->vf_data[i];
6235 if ((vf_data->num_vf_mc_hashes > 30) ||
6236 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6237 vmolr |= E1000_VMOLR_MPME;
6238 } else if (vf_data->num_vf_mc_hashes) {
6239 vmolr |= E1000_VMOLR_ROMPE;
6240 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6241 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6243 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6247 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6249 struct e1000_hw *hw = &adapter->hw;
6250 u32 pool_mask, reg, vid;
6254 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6256 /* Find the vlan filter for this id */
6257 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6258 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6260 /* remove the vf from the pool */
6263 /* if pool is empty then remove entry from vfta */
6264 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6265 (reg & E1000_VLVF_VLANID_ENABLE)) {
6267 vid = reg & E1000_VLVF_VLANID_MASK;
6268 igb_vfta_set(adapter, vid, FALSE);
6271 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6274 adapter->vf_data[vf].vlans_enabled = 0;
6276 vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6278 igb_vlvf_set(adapter, vlan_default, true, vf);
6281 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6283 struct e1000_hw *hw = &adapter->hw;
6286 /* The vlvf table only exists on 82576 hardware and newer */
6287 if (hw->mac.type < e1000_82576)
6290 /* we only need to do this if VMDq is enabled */
6291 if (!adapter->vmdq_pools)
6294 /* Find the vlan filter for this id */
6295 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6296 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6297 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6298 vid == (reg & E1000_VLVF_VLANID_MASK))
6303 if (i == E1000_VLVF_ARRAY_SIZE) {
6304 /* Did not find a matching VLAN ID entry that was
6305 * enabled. Search for a free filter entry, i.e.
6306 * one without the enable bit set
6308 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6309 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6310 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6314 if (i < E1000_VLVF_ARRAY_SIZE) {
6315 /* Found an enabled/available entry */
6316 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6318 /* if !enabled we need to set this up in vfta */
6319 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6320 /* add VID to filter table */
6321 igb_vfta_set(adapter, vid, TRUE);
6322 reg |= E1000_VLVF_VLANID_ENABLE;
6324 reg &= ~E1000_VLVF_VLANID_MASK;
6326 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6328 /* do not modify RLPML for PF devices */
6329 if (vf >= adapter->vfs_allocated_count)
6330 return E1000_SUCCESS;
6332 if (!adapter->vf_data[vf].vlans_enabled) {
6334 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6335 size = reg & E1000_VMOLR_RLPML_MASK;
6337 reg &= ~E1000_VMOLR_RLPML_MASK;
6339 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6342 adapter->vf_data[vf].vlans_enabled++;
6345 if (i < E1000_VLVF_ARRAY_SIZE) {
6346 /* remove vf from the pool */
6347 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6348 /* if pool is empty then remove entry from vfta */
6349 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6351 igb_vfta_set(adapter, vid, FALSE);
6353 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6355 /* do not modify RLPML for PF devices */
6356 if (vf >= adapter->vfs_allocated_count)
6357 return E1000_SUCCESS;
6359 adapter->vf_data[vf].vlans_enabled--;
6360 if (!adapter->vf_data[vf].vlans_enabled) {
6362 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6363 size = reg & E1000_VMOLR_RLPML_MASK;
6365 reg &= ~E1000_VMOLR_RLPML_MASK;
6367 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6371 return E1000_SUCCESS;
6375 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6377 struct e1000_hw *hw = &adapter->hw;
6380 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6382 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6385 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6386 int vf, u16 vlan, u8 qos)
6389 struct igb_adapter *adapter = netdev_priv(netdev);
6391 /* VLAN IDs accepted range 0-4094 */
6392 if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6395 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6398 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6399 igb_set_vmolr(adapter, vf, !vlan);
6400 adapter->vf_data[vf].pf_vlan = vlan;
6401 adapter->vf_data[vf].pf_qos = qos;
6402 igb_set_vf_vlan_strip(adapter, vf, true);
6403 dev_info(&adapter->pdev->dev,
6404 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6405 if (test_bit(__IGB_DOWN, &adapter->state)) {
6406 dev_warn(&adapter->pdev->dev,
6407 "The VF VLAN has been set,"
6408 " but the PF device is not up.\n");
6409 dev_warn(&adapter->pdev->dev,
6410 "Bring the PF device up before"
6411 " attempting to use the VF device.\n");
6414 if (adapter->vf_data[vf].pf_vlan)
6415 dev_info(&adapter->pdev->dev,
6416 "Clearing VLAN on VF %d\n", vf);
6417 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6419 igb_set_vmvir(adapter, vlan, vf);
6420 igb_set_vmolr(adapter, vf, true);
6421 igb_set_vf_vlan_strip(adapter, vf, false);
6422 adapter->vf_data[vf].pf_vlan = 0;
6423 adapter->vf_data[vf].pf_qos = 0;
6429 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6430 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6433 struct igb_adapter *adapter = netdev_priv(netdev);
6434 struct e1000_hw *hw = &adapter->hw;
6435 u32 dtxswc, reg_offset;
6437 if (!adapter->vfs_allocated_count)
6440 if (vf >= adapter->vfs_allocated_count)
6443 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6444 dtxswc = E1000_READ_REG(hw, reg_offset);
6446 dtxswc |= ((1 << vf) |
6447 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6449 dtxswc &= ~((1 << vf) |
6450 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6451 E1000_WRITE_REG(hw, reg_offset, dtxswc);
6453 adapter->vf_data[vf].spoofchk_enabled = setting;
6454 return E1000_SUCCESS;
6456 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6457 #endif /* IFLA_VF_MAX */
6459 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6461 struct e1000_hw *hw = &adapter->hw;
6465 /* Find the vlan filter for this id */
6466 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6467 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6468 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6469 vid == (reg & E1000_VLVF_VLANID_MASK))
6473 if (i >= E1000_VLVF_ARRAY_SIZE)
6479 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6481 struct e1000_hw *hw = &adapter->hw;
6482 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6483 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6487 igb_set_vf_vlan_strip(adapter, vf, true);
6489 igb_set_vf_vlan_strip(adapter, vf, false);
6491 /* If in promiscuous mode we need to make sure the PF also has
6492 * the VLAN filter set.
6494 if (add && (adapter->netdev->flags & IFF_PROMISC))
6495 err = igb_vlvf_set(adapter, vid, add,
6496 adapter->vfs_allocated_count);
6500 err = igb_vlvf_set(adapter, vid, add, vf);
6505 /* Go through all the checks to see if the VLAN filter should
6506 * be wiped completely.
6508 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6511 int regndx = igb_find_vlvf_entry(adapter, vid);
6514 /* See if any other pools are set for this VLAN filter
6515 * entry other than the PF.
6517 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6518 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6519 adapter->vfs_allocated_count);
6520 /* If the filter was removed then ensure PF pool bit
6521 * is cleared if the PF only added itself to the pool
6522 * because the PF is in promiscuous mode.
6524 if ((vlvf & VLAN_VID_MASK) == vid &&
6525 #ifndef HAVE_VLAN_RX_REGISTER
6526 !test_bit(vid, adapter->active_vlans) &&
6529 igb_vlvf_set(adapter, vid, add,
6530 adapter->vfs_allocated_count);
6537 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6539 struct e1000_hw *hw = &adapter->hw;
6541 /* clear flags except flag that the PF has set the MAC */
6542 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6543 adapter->vf_data[vf].last_nack = jiffies;
6545 /* reset offloads to defaults */
6546 igb_set_vmolr(adapter, vf, true);
6548 /* reset vlans for device */
6549 igb_clear_vf_vfta(adapter, vf);
6551 if (adapter->vf_data[vf].pf_vlan)
6552 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6553 adapter->vf_data[vf].pf_vlan,
6554 adapter->vf_data[vf].pf_qos);
6556 igb_clear_vf_vfta(adapter, vf);
6559 /* reset multicast table array for vf */
6560 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6562 /* Flush and reset the mta with the new values */
6563 igb_set_rx_mode(adapter->netdev);
6566 * Reset the VFs TDWBAL and TDWBAH registers which are not
6569 E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6570 E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6571 if (hw->mac.type == e1000_82576) {
6572 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6573 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6577 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6579 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6581 /* generate a new mac address as we were hotplug removed/added */
6582 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6583 random_ether_addr(vf_mac);
6585 /* process remaining reset events */
6586 igb_vf_reset(adapter, vf);
6589 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6591 struct e1000_hw *hw = &adapter->hw;
6592 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6594 u8 *addr = (u8 *)(&msgbuf[1]);
6596 /* process all the same items cleared in a function level reset */
6597 igb_vf_reset(adapter, vf);
6599 /* set vf mac address */
6600 igb_del_mac_filter(adapter, vf_mac, vf);
6601 igb_add_mac_filter(adapter, vf_mac, vf);
6603 /* enable transmit and receive for vf */
6604 reg = E1000_READ_REG(hw, E1000_VFTE);
6605 E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6606 reg = E1000_READ_REG(hw, E1000_VFRE);
6607 E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6609 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6611 /* reply to reset with ack and vf mac address */
6612 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6613 memcpy(addr, vf_mac, 6);
6614 e1000_write_mbx(hw, msgbuf, 3, vf);
6617 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6620 * The VF MAC Address is stored in a packed array of bytes
6621 * starting at the second 32 bit word of the msg array
6623 unsigned char *addr = (unsigned char *)&msg[1];
6626 if (is_valid_ether_addr(addr))
6627 err = igb_set_vf_mac(adapter, vf, addr);
6632 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6634 struct e1000_hw *hw = &adapter->hw;
6635 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6636 u32 msg = E1000_VT_MSGTYPE_NACK;
6638 /* if device isn't clear to send it shouldn't be reading either */
6639 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6640 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6641 e1000_write_mbx(hw, &msg, 1, vf);
6642 vf_data->last_nack = jiffies;
6646 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6648 struct pci_dev *pdev = adapter->pdev;
6649 u32 msgbuf[E1000_VFMAILBOX_SIZE];
6650 struct e1000_hw *hw = &adapter->hw;
6651 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6654 retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6657 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6661 /* this is a message we already processed, do nothing */
6662 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6666 * until the vf completes a reset it should not be
6667 * allowed to start any configuration.
6670 if (msgbuf[0] == E1000_VF_RESET) {
6671 igb_vf_reset_msg(adapter, vf);
6675 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6676 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6677 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6678 e1000_write_mbx(hw, msgbuf, 1, vf);
6679 vf_data->last_nack = jiffies;
6684 switch ((msgbuf[0] & 0xFFFF)) {
6685 case E1000_VF_SET_MAC_ADDR:
6687 #ifndef IGB_DISABLE_VF_MAC_SET
6688 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6689 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6692 "VF %d attempted to override administratively "
6693 "set MAC address\nReload the VF driver to "
6694 "resume operations\n", vf);
6697 case E1000_VF_SET_PROMISC:
6698 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6700 case E1000_VF_SET_MULTICAST:
6701 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6703 case E1000_VF_SET_LPE:
6704 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6706 case E1000_VF_SET_VLAN:
6709 if (vf_data->pf_vlan)
6711 "VF %d attempted to override administratively "
6712 "set VLAN tag\nReload the VF driver to "
6713 "resume operations\n", vf);
6716 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6719 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6720 retval = -E1000_ERR_MBX;
6724 /* notify the VF of the results of what it sent us */
6726 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6728 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6730 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6732 e1000_write_mbx(hw, msgbuf, 1, vf);
6735 static void igb_msg_task(struct igb_adapter *adapter)
6737 struct e1000_hw *hw = &adapter->hw;
6740 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6741 /* process any reset requests */
6742 if (!e1000_check_for_rst(hw, vf))
6743 igb_vf_reset_event(adapter, vf);
6745 /* process any messages pending */
6746 if (!e1000_check_for_msg(hw, vf))
6747 igb_rcv_msg_from_vf(adapter, vf);
6749 /* process any acks */
6750 if (!e1000_check_for_ack(hw, vf))
6751 igb_rcv_ack_from_vf(adapter, vf);
6756 * igb_set_uta - Set unicast filter table address
6757 * @adapter: board private structure
6759 * The unicast table address is a register array of 32-bit registers.
6760 * The table is meant to be used in a way similar to how the MTA is used
6761 * however due to certain limitations in the hardware it is necessary to
6762 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6763 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6765 static void igb_set_uta(struct igb_adapter *adapter)
6767 struct e1000_hw *hw = &adapter->hw;
6770 /* The UTA table only exists on 82576 hardware and newer */
6771 if (hw->mac.type < e1000_82576)
6774 /* we only need to do this if VMDq is enabled */
6775 if (!adapter->vmdq_pools)
6778 for (i = 0; i < hw->mac.uta_reg_count; i++)
6779 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6783 * igb_intr_msi - Interrupt Handler
6784 * @irq: interrupt number
6785 * @data: pointer to a network interface device structure
6787 static irqreturn_t igb_intr_msi(int irq, void *data)
6789 struct igb_adapter *adapter = data;
6790 struct igb_q_vector *q_vector = adapter->q_vector[0];
6791 struct e1000_hw *hw = &adapter->hw;
6792 /* read ICR disables interrupts using IAM */
6793 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6795 igb_write_itr(q_vector);
6797 if (icr & E1000_ICR_DRSTA)
6798 schedule_work(&adapter->reset_task);
6800 if (icr & E1000_ICR_DOUTSYNC) {
6801 /* HW is reporting DMA is out of sync */
6802 adapter->stats.doosync++;
6805 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6806 hw->mac.get_link_status = 1;
6807 if (!test_bit(__IGB_DOWN, &adapter->state))
6808 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6811 #ifdef HAVE_PTP_1588_CLOCK
6812 if (icr & E1000_ICR_TS) {
6813 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6815 if (tsicr & E1000_TSICR_TXTS) {
6816 /* acknowledge the interrupt */
6817 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6818 /* retrieve hardware timestamp */
6819 schedule_work(&adapter->ptp_tx_work);
6822 #endif /* HAVE_PTP_1588_CLOCK */
6824 napi_schedule(&q_vector->napi);
6830 * igb_intr - Legacy Interrupt Handler
6831 * @irq: interrupt number
6832 * @data: pointer to a network interface device structure
6834 static irqreturn_t igb_intr(int irq, void *data)
6836 struct igb_adapter *adapter = data;
6837 struct igb_q_vector *q_vector = adapter->q_vector[0];
6838 struct e1000_hw *hw = &adapter->hw;
6839 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6840 * need for the IMC write */
6841 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6843 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6844 * not set, then the adapter didn't send an interrupt */
6845 if (!(icr & E1000_ICR_INT_ASSERTED))
6848 igb_write_itr(q_vector);
6850 if (icr & E1000_ICR_DRSTA)
6851 schedule_work(&adapter->reset_task);
6853 if (icr & E1000_ICR_DOUTSYNC) {
6854 /* HW is reporting DMA is out of sync */
6855 adapter->stats.doosync++;
6858 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6859 hw->mac.get_link_status = 1;
6860 /* guard against interrupt when we're going down */
6861 if (!test_bit(__IGB_DOWN, &adapter->state))
6862 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6865 #ifdef HAVE_PTP_1588_CLOCK
6866 if (icr & E1000_ICR_TS) {
6867 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6869 if (tsicr & E1000_TSICR_TXTS) {
6870 /* acknowledge the interrupt */
6871 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6872 /* retrieve hardware timestamp */
6873 schedule_work(&adapter->ptp_tx_work);
6876 #endif /* HAVE_PTP_1588_CLOCK */
6878 napi_schedule(&q_vector->napi);
6883 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6885 struct igb_adapter *adapter = q_vector->adapter;
6886 struct e1000_hw *hw = &adapter->hw;
6888 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6889 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6890 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6891 igb_set_itr(q_vector);
6893 igb_update_ring_itr(q_vector);
6896 if (!test_bit(__IGB_DOWN, &adapter->state)) {
6897 if (adapter->msix_entries)
6898 E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6900 igb_irq_enable(adapter);
6905 * igb_poll - NAPI Rx polling callback
6906 * @napi: napi polling structure
6907 * @budget: count of how many packets we should handle
6909 static int igb_poll(struct napi_struct *napi, int budget)
6911 struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6912 bool clean_complete = true;
6915 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6916 igb_update_dca(q_vector);
6918 if (q_vector->tx.ring)
6919 clean_complete = igb_clean_tx_irq(q_vector);
6921 if (q_vector->rx.ring)
6922 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6924 #ifndef HAVE_NETDEV_NAPI_LIST
6925 /* if netdev is disabled we need to stop polling */
6926 if (!netif_running(q_vector->adapter->netdev))
6927 clean_complete = true;
6930 /* If all work not completed, return budget and keep polling */
6931 if (!clean_complete)
6934 /* If not enough Rx work done, exit the polling mode */
6935 napi_complete(napi);
6936 igb_ring_irq_enable(q_vector);
6942 * igb_clean_tx_irq - Reclaim resources after transmit completes
6943 * @q_vector: pointer to q_vector containing needed info
6944 * returns TRUE if ring is completely cleaned
6946 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6948 struct igb_adapter *adapter = q_vector->adapter;
6949 struct igb_ring *tx_ring = q_vector->tx.ring;
6950 struct igb_tx_buffer *tx_buffer;
6951 union e1000_adv_tx_desc *tx_desc;
6952 unsigned int total_bytes = 0, total_packets = 0;
6953 unsigned int budget = q_vector->tx.work_limit;
6954 unsigned int i = tx_ring->next_to_clean;
6956 if (test_bit(__IGB_DOWN, &adapter->state))
6959 tx_buffer = &tx_ring->tx_buffer_info[i];
6960 tx_desc = IGB_TX_DESC(tx_ring, i);
6961 i -= tx_ring->count;
6964 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6966 /* if next_to_watch is not set then there is no work pending */
6970 /* prevent any other reads prior to eop_desc */
6971 read_barrier_depends();
6973 /* if DD is not set pending work has not been completed */
6974 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6977 /* clear next_to_watch to prevent false hangs */
6978 tx_buffer->next_to_watch = NULL;
6980 /* update the statistics for this packet */
6981 total_bytes += tx_buffer->bytecount;
6982 total_packets += tx_buffer->gso_segs;
6985 dev_kfree_skb_any(tx_buffer->skb);
6987 /* unmap skb header data */
6988 dma_unmap_single(tx_ring->dev,
6989 dma_unmap_addr(tx_buffer, dma),
6990 dma_unmap_len(tx_buffer, len),
6993 /* clear tx_buffer data */
6994 tx_buffer->skb = NULL;
6995 dma_unmap_len_set(tx_buffer, len, 0);
6997 /* clear last DMA location and unmap remaining buffers */
6998 while (tx_desc != eop_desc) {
7003 i -= tx_ring->count;
7004 tx_buffer = tx_ring->tx_buffer_info;
7005 tx_desc = IGB_TX_DESC(tx_ring, 0);
7008 /* unmap any remaining paged data */
7009 if (dma_unmap_len(tx_buffer, len)) {
7010 dma_unmap_page(tx_ring->dev,
7011 dma_unmap_addr(tx_buffer, dma),
7012 dma_unmap_len(tx_buffer, len),
7014 dma_unmap_len_set(tx_buffer, len, 0);
7018 /* move us one more past the eop_desc for start of next pkt */
7023 i -= tx_ring->count;
7024 tx_buffer = tx_ring->tx_buffer_info;
7025 tx_desc = IGB_TX_DESC(tx_ring, 0);
7028 /* issue prefetch for next Tx descriptor */
7031 /* update budget accounting */
7033 } while (likely(budget));
7035 netdev_tx_completed_queue(txring_txq(tx_ring),
7036 total_packets, total_bytes);
7038 i += tx_ring->count;
7039 tx_ring->next_to_clean = i;
7040 tx_ring->tx_stats.bytes += total_bytes;
7041 tx_ring->tx_stats.packets += total_packets;
7042 q_vector->tx.total_bytes += total_bytes;
7043 q_vector->tx.total_packets += total_packets;
7046 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7047 !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7049 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7051 struct e1000_hw *hw = &adapter->hw;
7053 /* Detect a transmit hang in hardware, this serializes the
7054 * check with the clearing of time_stamp and movement of i */
7055 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7056 if (tx_buffer->next_to_watch &&
7057 time_after(jiffies, tx_buffer->time_stamp +
7058 (adapter->tx_timeout_factor * HZ))
7059 && !(E1000_READ_REG(hw, E1000_STATUS) &
7060 E1000_STATUS_TXOFF)) {
7062 /* detected Tx unit hang */
7064 adapter->tx_hang_detected = TRUE;
7065 if (adapter->disable_hw_reset) {
7066 DPRINTK(DRV, WARNING,
7067 "Deactivating netdev watchdog timer\n");
7068 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7069 dev_put(netdev_ring(tx_ring));
7070 #ifndef HAVE_NET_DEVICE_OPS
7071 netdev_ring(tx_ring)->tx_timeout = NULL;
7075 dev_err(tx_ring->dev,
7076 "Detected Tx Unit Hang\n"
7080 " next_to_use <%x>\n"
7081 " next_to_clean <%x>\n"
7082 "buffer_info[next_to_clean]\n"
7083 " time_stamp <%lx>\n"
7084 " next_to_watch <%p>\n"
7086 " desc.status <%x>\n",
7087 tx_ring->queue_index,
7088 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7089 readl(tx_ring->tail),
7090 tx_ring->next_to_use,
7091 tx_ring->next_to_clean,
7092 tx_buffer->time_stamp,
7093 tx_buffer->next_to_watch,
7095 tx_buffer->next_to_watch->wb.status);
7096 if (netif_is_multiqueue(netdev_ring(tx_ring)))
7097 netif_stop_subqueue(netdev_ring(tx_ring),
7098 ring_queue_index(tx_ring));
7100 netif_stop_queue(netdev_ring(tx_ring));
7102 /* we are about to reset, no point in enabling stuff */
7107 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7108 if (unlikely(total_packets &&
7109 netif_carrier_ok(netdev_ring(tx_ring)) &&
7110 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7111 /* Make sure that anybody stopping the queue after this
7112 * sees the new next_to_clean.
7115 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7116 if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7117 ring_queue_index(tx_ring)) &&
7118 !(test_bit(__IGB_DOWN, &adapter->state))) {
7119 netif_wake_subqueue(netdev_ring(tx_ring),
7120 ring_queue_index(tx_ring));
7121 tx_ring->tx_stats.restart_queue++;
7124 if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7125 !(test_bit(__IGB_DOWN, &adapter->state))) {
7126 netif_wake_queue(netdev_ring(tx_ring));
7127 tx_ring->tx_stats.restart_queue++;
7135 #ifdef HAVE_VLAN_RX_REGISTER
7137 * igb_receive_skb - helper function to handle rx indications
7138 * @q_vector: structure containing interrupt and ring information
7139 * @skb: packet to send up
7141 static void igb_receive_skb(struct igb_q_vector *q_vector,
7142 struct sk_buff *skb)
7144 struct vlan_group **vlgrp = netdev_priv(skb->dev);
7146 if (IGB_CB(skb)->vid) {
7148 vlan_gro_receive(&q_vector->napi, *vlgrp,
7149 IGB_CB(skb)->vid, skb);
7151 dev_kfree_skb_any(skb);
7154 napi_gro_receive(&q_vector->napi, skb);
7158 #endif /* HAVE_VLAN_RX_REGISTER */
7159 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7161 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7162 * @rx_ring: rx descriptor ring to store buffers on
7163 * @old_buff: donor buffer to have page reused
7165 * Synchronizes page for reuse by the adapter
7167 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7168 struct igb_rx_buffer *old_buff)
7170 struct igb_rx_buffer *new_buff;
7171 u16 nta = rx_ring->next_to_alloc;
7173 new_buff = &rx_ring->rx_buffer_info[nta];
7175 /* update, and store next to alloc */
7177 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7179 /* transfer page from old buffer to new buffer */
7180 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7182 /* sync the buffer for use by the device */
7183 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7184 old_buff->page_offset,
7189 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7191 unsigned int truesize)
7193 /* avoid re-using remote pages */
7194 if (unlikely(page_to_nid(page) != numa_node_id()))
7197 #if (PAGE_SIZE < 8192)
7198 /* if we are only owner of page we can reuse it */
7199 if (unlikely(page_count(page) != 1))
7202 /* flip page offset to other buffer */
7203 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7206 /* move offset up to the next cache line */
7207 rx_buffer->page_offset += truesize;
7209 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7213 /* bump ref count on page before it is given to the stack */
7220 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7221 * @rx_ring: rx descriptor ring to transact packets on
7222 * @rx_buffer: buffer containing page to add
7223 * @rx_desc: descriptor containing length of buffer written by hardware
7224 * @skb: sk_buff to place the data into
7226 * This function will add the data contained in rx_buffer->page to the skb.
7227 * This is done either through a direct copy if the data in the buffer is
7228 * less than the skb header size, otherwise it will just attach the page as
7229 * a frag to the skb.
7231 * The function will then update the page offset if necessary and return
7232 * true if the buffer can be reused by the adapter.
7234 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7235 struct igb_rx_buffer *rx_buffer,
7236 union e1000_adv_rx_desc *rx_desc,
7237 struct sk_buff *skb)
7239 struct page *page = rx_buffer->page;
7240 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7241 #if (PAGE_SIZE < 8192)
7242 unsigned int truesize = IGB_RX_BUFSZ;
7244 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7247 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7248 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7250 #ifdef HAVE_PTP_1588_CLOCK
7251 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7252 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7253 va += IGB_TS_HDR_LEN;
7254 size -= IGB_TS_HDR_LEN;
7256 #endif /* HAVE_PTP_1588_CLOCK */
7258 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7260 /* we can reuse buffer as-is, just make sure it is local */
7261 if (likely(page_to_nid(page) == numa_node_id()))
7264 /* this page cannot be reused so discard it */
7269 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7270 rx_buffer->page_offset, size, truesize);
7272 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7275 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7276 union e1000_adv_rx_desc *rx_desc,
7277 struct sk_buff *skb)
7279 struct igb_rx_buffer *rx_buffer;
7282 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7284 page = rx_buffer->page;
7288 void *page_addr = page_address(page) +
7289 rx_buffer->page_offset;
7291 /* prefetch first cache line of first page */
7292 prefetch(page_addr);
7293 #if L1_CACHE_BYTES < 128
7294 prefetch(page_addr + L1_CACHE_BYTES);
7297 /* allocate a skb to store the frags */
7298 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7300 if (unlikely(!skb)) {
7301 rx_ring->rx_stats.alloc_failed++;
7306 * we will be copying header into skb->data in
7307 * pskb_may_pull so it is in our interest to prefetch
7308 * it now to avoid a possible cache miss
7310 prefetchw(skb->data);
7313 /* we are reusing so sync this buffer for CPU use */
7314 dma_sync_single_range_for_cpu(rx_ring->dev,
7316 rx_buffer->page_offset,
7320 /* pull page into skb */
7321 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7322 /* hand second half of page back to the ring */
7323 igb_reuse_rx_page(rx_ring, rx_buffer);
7325 /* we are not reusing the buffer so unmap it */
7326 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7327 PAGE_SIZE, DMA_FROM_DEVICE);
7330 /* clear contents of rx_buffer */
7331 rx_buffer->page = NULL;
7337 static inline void igb_rx_checksum(struct igb_ring *ring,
7338 union e1000_adv_rx_desc *rx_desc,
7339 struct sk_buff *skb)
7341 skb_checksum_none_assert(skb);
7343 /* Ignore Checksum bit is set */
7344 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7347 /* Rx checksum disabled via ethtool */
7348 if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7351 /* TCP/UDP checksum error bit is set */
7352 if (igb_test_staterr(rx_desc,
7353 E1000_RXDEXT_STATERR_TCPE |
7354 E1000_RXDEXT_STATERR_IPE)) {
7356 * work around errata with sctp packets where the TCPE aka
7357 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7358 * packets, (aka let the stack check the crc32c)
7360 if (!((skb->len == 60) &&
7361 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7362 ring->rx_stats.csum_err++;
7364 /* let the stack verify checksum errors */
7367 /* It must be a TCP or UDP packet with a valid checksum */
7368 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7369 E1000_RXD_STAT_UDPCS))
7370 skb->ip_summed = CHECKSUM_UNNECESSARY;
7373 #ifdef NETIF_F_RXHASH
7374 static inline void igb_rx_hash(struct igb_ring *ring,
7375 union e1000_adv_rx_desc *rx_desc,
7376 struct sk_buff *skb)
7378 if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7379 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7385 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7387 * igb_merge_active_tail - merge active tail into lro skb
7388 * @tail: pointer to active tail in frag_list
7390 * This function merges the length and data of an active tail into the
7391 * skb containing the frag_list. It resets the tail's pointer to the head,
7392 * but it leaves the heads pointer to tail intact.
7394 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7396 struct sk_buff *head = IGB_CB(tail)->head;
7401 head->len += tail->len;
7402 head->data_len += tail->len;
7403 head->truesize += tail->len;
7405 IGB_CB(tail)->head = NULL;
7411 * igb_add_active_tail - adds an active tail into the skb frag_list
7412 * @head: pointer to the start of the skb
7413 * @tail: pointer to active tail to add to frag_list
7415 * This function adds an active tail to the end of the frag list. This tail
7416 * will still be receiving data so we cannot yet ad it's stats to the main
7417 * skb. That is done via igb_merge_active_tail.
7419 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7421 struct sk_buff *old_tail = IGB_CB(head)->tail;
7424 igb_merge_active_tail(old_tail);
7425 old_tail->next = tail;
7427 skb_shinfo(head)->frag_list = tail;
7430 IGB_CB(tail)->head = head;
7431 IGB_CB(head)->tail = tail;
7433 IGB_CB(head)->append_cnt++;
7437 * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7438 * @head: pointer to head of an active frag list
7440 * This function will clear the frag_tail_tracker pointer on an active
7441 * frag_list and returns true if the pointer was actually set
7443 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7445 struct sk_buff *tail = IGB_CB(head)->tail;
7450 igb_merge_active_tail(tail);
7452 IGB_CB(head)->tail = NULL;
7457 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7459 * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7460 * @adapter: board private structure
7461 * @rx_desc: pointer to the rx descriptor
7462 * @skb: pointer to the skb to be merged
7465 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7466 union e1000_adv_rx_desc *rx_desc,
7467 struct sk_buff *skb)
7469 struct iphdr *iph = (struct iphdr *)skb->data;
7470 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7472 /* verify hardware indicates this is IPv4/TCP */
7473 if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7474 !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7477 /* .. and LRO is enabled */
7478 if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7481 /* .. and we are not in promiscuous mode */
7482 if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7485 /* .. and the header is large enough for us to read IP/TCP fields */
7486 if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7489 /* .. and there are no VLANs on packet */
7490 if (skb->protocol != __constant_htons(ETH_P_IP))
7493 /* .. and we are version 4 with no options */
7494 if (*(u8 *)iph != 0x45)
7497 /* .. and the packet is not fragmented */
7498 if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7501 /* .. and that next header is TCP */
7502 if (iph->protocol != IPPROTO_TCP)
7508 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7510 return (struct igb_lrohdr *)skb->data;
7514 * igb_lro_flush - Indicate packets to upper layer.
7516 * Update IP and TCP header part of head skb if more than one
7517 * skb's chained and indicate packets to upper layer.
7519 static void igb_lro_flush(struct igb_q_vector *q_vector,
7520 struct sk_buff *skb)
7522 struct igb_lro_list *lrolist = &q_vector->lrolist;
7524 __skb_unlink(skb, &lrolist->active);
7526 if (IGB_CB(skb)->append_cnt) {
7527 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7529 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7530 /* close any active lro contexts */
7531 igb_close_active_frag_list(skb);
7534 /* incorporate ip header and re-calculate checksum */
7535 lroh->iph.tot_len = ntohs(skb->len);
7536 lroh->iph.check = 0;
7538 /* header length is 5 since we know no options exist */
7539 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7541 /* clear TCP checksum to indicate we are an LRO frame */
7544 /* incorporate latest timestamp into the tcp header */
7545 if (IGB_CB(skb)->tsecr) {
7546 lroh->ts[2] = IGB_CB(skb)->tsecr;
7547 lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7551 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7552 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7556 #ifdef HAVE_VLAN_RX_REGISTER
7557 igb_receive_skb(q_vector, skb);
7559 napi_gro_receive(&q_vector->napi, skb);
7561 lrolist->stats.flushed++;
7564 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7566 struct igb_lro_list *lrolist = &q_vector->lrolist;
7567 struct sk_buff *skb, *tmp;
7569 skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7570 igb_lro_flush(q_vector, skb);
7574 * igb_lro_header_ok - Main LRO function.
7576 static void igb_lro_header_ok(struct sk_buff *skb)
7578 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7579 u16 opt_bytes, data_len;
7581 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7582 IGB_CB(skb)->tail = NULL;
7584 IGB_CB(skb)->tsecr = 0;
7585 IGB_CB(skb)->append_cnt = 0;
7586 IGB_CB(skb)->mss = 0;
7588 /* ensure that the checksum is valid */
7589 if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7592 /* If we see CE codepoint in IP header, packet is not mergeable */
7593 if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7596 /* ensure no bits set besides ack or psh */
7597 if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7598 lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7602 /* store the total packet length */
7603 data_len = ntohs(lroh->iph.tot_len);
7605 /* remove any padding from the end of the skb */
7606 __pskb_trim(skb, data_len);
7608 /* remove header length from data length */
7609 data_len -= sizeof(struct igb_lrohdr);
7612 * check for timestamps. Since the only option we handle are timestamps,
7613 * we only have to handle the simple case of aligned timestamps
7615 opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7616 if (opt_bytes != 0) {
7617 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7618 !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7619 TCPOLEN_TSTAMP_ALIGNED) ||
7620 (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7621 (TCPOPT_NOP << 16) |
7622 (TCPOPT_TIMESTAMP << 8) |
7623 TCPOLEN_TIMESTAMP)) ||
7624 (lroh->ts[2] == 0)) {
7628 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7629 IGB_CB(skb)->tsecr = lroh->ts[2];
7631 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7634 /* record data_len as mss for the packet */
7635 IGB_CB(skb)->mss = data_len;
7636 IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7639 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7640 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7642 struct skb_shared_info *sh_info;
7643 struct skb_shared_info *new_skb_info;
7644 unsigned int data_len;
7646 sh_info = skb_shinfo(lro_skb);
7647 new_skb_info = skb_shinfo(new_skb);
7649 /* copy frags into the last skb */
7650 memcpy(sh_info->frags + sh_info->nr_frags,
7651 new_skb_info->frags,
7652 new_skb_info->nr_frags * sizeof(skb_frag_t));
7654 /* copy size data over */
7655 sh_info->nr_frags += new_skb_info->nr_frags;
7656 data_len = IGB_CB(new_skb)->mss;
7657 lro_skb->len += data_len;
7658 lro_skb->data_len += data_len;
7659 lro_skb->truesize += data_len;
7661 /* wipe record of data from new_skb */
7662 new_skb_info->nr_frags = 0;
7663 new_skb->len = new_skb->data_len = 0;
7664 dev_kfree_skb_any(new_skb);
7667 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7669 * igb_lro_receive - if able, queue skb into lro chain
7670 * @q_vector: structure containing interrupt and ring information
7671 * @new_skb: pointer to current skb being checked
7673 * Checks whether the skb given is eligible for LRO and if that's
7674 * fine chains it to the existing lro_skb based on flowid. If an LRO for
7675 * the flow doesn't exist create one.
7677 static void igb_lro_receive(struct igb_q_vector *q_vector,
7678 struct sk_buff *new_skb)
7680 struct sk_buff *lro_skb;
7681 struct igb_lro_list *lrolist = &q_vector->lrolist;
7682 struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7683 __be32 saddr = lroh->iph.saddr;
7684 __be32 daddr = lroh->iph.daddr;
7685 __be32 tcp_ports = *(__be32 *)&lroh->th;
7687 #ifdef HAVE_VLAN_RX_REGISTER
7688 u16 vid = IGB_CB(new_skb)->vid;
7690 u16 vid = new_skb->vlan_tci;
7693 igb_lro_header_ok(new_skb);
7696 * we have a packet that might be eligible for LRO,
7697 * so see if it matches anything we might expect
7699 skb_queue_walk(&lrolist->active, lro_skb) {
7700 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7701 igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7702 igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7705 #ifdef HAVE_VLAN_RX_REGISTER
7706 if (IGB_CB(lro_skb)->vid != vid)
7708 if (lro_skb->vlan_tci != vid)
7712 /* out of order packet */
7713 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7714 igb_lro_flush(q_vector, lro_skb);
7715 IGB_CB(new_skb)->mss = 0;
7719 /* TCP timestamp options have changed */
7720 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7721 igb_lro_flush(q_vector, lro_skb);
7725 /* make sure timestamp values are increasing */
7726 if (IGB_CB(lro_skb)->tsecr &&
7727 IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7728 igb_lro_flush(q_vector, lro_skb);
7729 IGB_CB(new_skb)->mss = 0;
7733 data_len = IGB_CB(new_skb)->mss;
7735 /* Check for all of the above below
7738 * resultant packet would be too large
7739 * new skb is larger than our current mss
7740 * data would remain in header
7741 * we would consume more frags then the sk_buff contains
7742 * ack sequence numbers changed
7743 * window size has changed
7745 if (data_len == 0 ||
7746 data_len > IGB_CB(lro_skb)->mss ||
7747 data_len > IGB_CB(lro_skb)->free ||
7748 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7749 data_len != new_skb->data_len ||
7750 skb_shinfo(new_skb)->nr_frags >=
7751 (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7753 igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7754 igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7755 igb_lro_flush(q_vector, lro_skb);
7759 /* Remove IP and TCP header*/
7760 skb_pull(new_skb, new_skb->len - data_len);
7762 /* update timestamp and timestamp echo response */
7763 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7764 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7766 /* update sequence and free space */
7767 IGB_CB(lro_skb)->next_seq += data_len;
7768 IGB_CB(lro_skb)->free -= data_len;
7770 /* update append_cnt */
7771 IGB_CB(lro_skb)->append_cnt++;
7773 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7774 /* if header is empty pull pages into current skb */
7775 igb_merge_frags(lro_skb, new_skb);
7777 /* chain this new skb in frag_list */
7778 igb_add_active_tail(lro_skb, new_skb);
7781 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7782 skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7783 igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7784 igb_lro_flush(q_vector, lro_skb);
7787 lrolist->stats.coal++;
7791 if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7792 /* if we are at capacity flush the tail */
7793 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7794 lro_skb = skb_peek_tail(&lrolist->active);
7796 igb_lro_flush(q_vector, lro_skb);
7799 /* update sequence and free space */
7800 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7801 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7803 /* .. and insert at the front of the active list */
7804 __skb_queue_head(&lrolist->active, new_skb);
7806 lrolist->stats.coal++;
7810 /* packet not handled by any of the above, pass it to the stack */
7811 #ifdef HAVE_VLAN_RX_REGISTER
7812 igb_receive_skb(q_vector, new_skb);
7814 napi_gro_receive(&q_vector->napi, new_skb);
7818 #endif /* IGB_NO_LRO */
7820 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7821 * @rx_ring: rx descriptor ring packet is being transacted on
7822 * @rx_desc: pointer to the EOP Rx descriptor
7823 * @skb: pointer to current skb being populated
7825 * This function checks the ring, descriptor, and packet information in
7826 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7827 * other fields within the skb.
7829 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7830 union e1000_adv_rx_desc *rx_desc,
7831 struct sk_buff *skb)
7833 struct net_device *dev = rx_ring->netdev;
7834 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7836 #ifdef NETIF_F_RXHASH
7837 igb_rx_hash(rx_ring, rx_desc, skb);
7840 igb_rx_checksum(rx_ring, rx_desc, skb);
7842 /* update packet type stats */
7843 if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7844 rx_ring->rx_stats.ipv4_packets++;
7845 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7846 rx_ring->rx_stats.ipv4e_packets++;
7847 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7848 rx_ring->rx_stats.ipv6_packets++;
7849 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7850 rx_ring->rx_stats.ipv6e_packets++;
7851 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7852 rx_ring->rx_stats.tcp_packets++;
7853 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7854 rx_ring->rx_stats.udp_packets++;
7855 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7856 rx_ring->rx_stats.sctp_packets++;
7857 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7858 rx_ring->rx_stats.nfs_packets++;
7860 #ifdef HAVE_PTP_1588_CLOCK
7861 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7862 #endif /* HAVE_PTP_1588_CLOCK */
7864 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7865 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7867 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7869 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7871 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7872 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7873 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7875 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7876 #ifdef HAVE_VLAN_RX_REGISTER
7877 IGB_CB(skb)->vid = vid;
7879 IGB_CB(skb)->vid = 0;
7882 #ifdef HAVE_VLAN_PROTOCOL
7883 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7885 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7892 skb_record_rx_queue(skb, rx_ring->queue_index);
7894 skb->protocol = eth_type_trans(skb, dev);
7898 * igb_is_non_eop - process handling of non-EOP buffers
7899 * @rx_ring: Rx ring being processed
7900 * @rx_desc: Rx descriptor for current buffer
7902 * This function updates next to clean. If the buffer is an EOP buffer
7903 * this function exits returning false, otherwise it will place the
7904 * sk_buff in the next buffer to be chained and return true indicating
7905 * that this is in fact a non-EOP buffer.
7907 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7908 union e1000_adv_rx_desc *rx_desc)
7910 u32 ntc = rx_ring->next_to_clean + 1;
7912 /* fetch, update, and store next to clean */
7913 ntc = (ntc < rx_ring->count) ? ntc : 0;
7914 rx_ring->next_to_clean = ntc;
7916 prefetch(IGB_RX_DESC(rx_ring, ntc));
7918 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7924 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7925 /* igb_clean_rx_irq -- * legacy */
7926 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7928 struct igb_ring *rx_ring = q_vector->rx.ring;
7929 unsigned int total_bytes = 0, total_packets = 0;
7930 u16 cleaned_count = igb_desc_unused(rx_ring);
7933 struct igb_rx_buffer *rx_buffer;
7934 union e1000_adv_rx_desc *rx_desc;
7935 struct sk_buff *skb;
7938 /* return some buffers to hardware, one at a time is too slow */
7939 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7940 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7944 ntc = rx_ring->next_to_clean;
7945 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7946 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7948 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7952 * This memory barrier is needed to keep us from reading
7953 * any other fields out of the rx_desc until we know the
7954 * RXD_STAT_DD bit is set
7958 skb = rx_buffer->skb;
7960 prefetch(skb->data);
7962 /* pull the header of the skb in */
7963 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7965 /* clear skb reference in buffer info structure */
7966 rx_buffer->skb = NULL;
7970 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7972 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7973 rx_ring->rx_buffer_len,
7977 if (igb_test_staterr(rx_desc,
7978 E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
7979 dev_kfree_skb_any(skb);
7983 total_bytes += skb->len;
7985 /* populate checksum, timestamp, VLAN, and protocol */
7986 igb_process_skb_fields(rx_ring, rx_desc, skb);
7989 if (igb_can_lro(rx_ring, rx_desc, skb))
7990 igb_lro_receive(q_vector, skb);
7993 #ifdef HAVE_VLAN_RX_REGISTER
7994 igb_receive_skb(q_vector, skb);
7996 napi_gro_receive(&q_vector->napi, skb);
8000 netdev_ring(rx_ring)->last_rx = jiffies;
8003 /* update budget accounting */
8005 } while (likely(total_packets < budget));
8007 rx_ring->rx_stats.packets += total_packets;
8008 rx_ring->rx_stats.bytes += total_bytes;
8009 q_vector->rx.total_packets += total_packets;
8010 q_vector->rx.total_bytes += total_bytes;
8013 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8016 igb_lro_flush_all(q_vector);
8018 #endif /* IGB_NO_LRO */
8019 return (total_packets < budget);
8021 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8023 * igb_get_headlen - determine size of header for LRO/GRO
8024 * @data: pointer to the start of the headers
8025 * @max_len: total length of section to find headers in
8027 * This function is meant to determine the length of headers that will
8028 * be recognized by hardware for LRO, and GRO offloads. The main
8029 * motivation of doing this is to only perform one pull for IPv4 TCP
8030 * packets so that we can do basic things like calculating the gso_size
8031 * based on the average data per packet.
8033 static unsigned int igb_get_headlen(unsigned char *data,
8034 unsigned int max_len)
8037 unsigned char *network;
8040 struct vlan_hdr *vlan;
8043 struct ipv6hdr *ipv6;
8046 u8 nexthdr = 0; /* default to not TCP */
8049 /* this should never happen, but better safe than sorry */
8050 if (max_len < ETH_HLEN)
8053 /* initialize network frame pointer */
8056 /* set first protocol and move network header forward */
8057 protocol = hdr.eth->h_proto;
8058 hdr.network += ETH_HLEN;
8060 /* handle any vlan tag if present */
8061 if (protocol == __constant_htons(ETH_P_8021Q)) {
8062 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8065 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8066 hdr.network += VLAN_HLEN;
8069 /* handle L3 protocols */
8070 if (protocol == __constant_htons(ETH_P_IP)) {
8071 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8074 /* access ihl as a u8 to avoid unaligned access on ia64 */
8075 hlen = (hdr.network[0] & 0x0F) << 2;
8077 /* verify hlen meets minimum size requirements */
8078 if (hlen < sizeof(struct iphdr))
8079 return hdr.network - data;
8081 /* record next protocol if header is present */
8082 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8083 nexthdr = hdr.ipv4->protocol;
8085 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8086 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8089 /* record next protocol */
8090 nexthdr = hdr.ipv6->nexthdr;
8091 hlen = sizeof(struct ipv6hdr);
8092 #endif /* NETIF_F_TSO6 */
8094 return hdr.network - data;
8097 /* relocate pointer to start of L4 header */
8098 hdr.network += hlen;
8100 /* finally sort out TCP */
8101 if (nexthdr == IPPROTO_TCP) {
8102 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8105 /* access doff as a u8 to avoid unaligned access on ia64 */
8106 hlen = (hdr.network[12] & 0xF0) >> 2;
8108 /* verify hlen meets minimum size requirements */
8109 if (hlen < sizeof(struct tcphdr))
8110 return hdr.network - data;
8112 hdr.network += hlen;
8113 } else if (nexthdr == IPPROTO_UDP) {
8114 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8117 hdr.network += sizeof(struct udphdr);
8121 * If everything has gone correctly hdr.network should be the
8122 * data section of the packet and will be the end of the header.
8123 * If not then it probably represents the end of the last recognized
8126 if ((hdr.network - data) < max_len)
8127 return hdr.network - data;
8133 * igb_pull_tail - igb specific version of skb_pull_tail
8134 * @rx_ring: rx descriptor ring packet is being transacted on
8135 * @rx_desc: pointer to the EOP Rx descriptor
8136 * @skb: pointer to current skb being adjusted
8138 * This function is an igb specific version of __pskb_pull_tail. The
8139 * main difference between this version and the original function is that
8140 * this function can make several assumptions about the state of things
8141 * that allow for significant optimizations versus the standard function.
8142 * As a result we can do things like drop a frag and maintain an accurate
8143 * truesize for the skb.
8145 static void igb_pull_tail(struct igb_ring *rx_ring,
8146 union e1000_adv_rx_desc *rx_desc,
8147 struct sk_buff *skb)
8149 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8151 unsigned int pull_len;
8154 * it is valid to use page_address instead of kmap since we are
8155 * working with pages allocated out of the lomem pool per
8156 * alloc_page(GFP_ATOMIC)
8158 va = skb_frag_address(frag);
8160 #ifdef HAVE_PTP_1588_CLOCK
8161 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8162 /* retrieve timestamp from buffer */
8163 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8165 /* update pointers to remove timestamp header */
8166 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8167 frag->page_offset += IGB_TS_HDR_LEN;
8168 skb->data_len -= IGB_TS_HDR_LEN;
8169 skb->len -= IGB_TS_HDR_LEN;
8171 /* move va to start of packet data */
8172 va += IGB_TS_HDR_LEN;
8174 #endif /* HAVE_PTP_1588_CLOCK */
8177 * we need the header to contain the greater of either ETH_HLEN or
8178 * 60 bytes if the skb->len is less than 60 for skb_pad.
8180 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8182 /* align pull length to size of long to optimize memcpy performance */
8183 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8185 /* update all of the pointers */
8186 skb_frag_size_sub(frag, pull_len);
8187 frag->page_offset += pull_len;
8188 skb->data_len -= pull_len;
8189 skb->tail += pull_len;
8193 * igb_cleanup_headers - Correct corrupted or empty headers
8194 * @rx_ring: rx descriptor ring packet is being transacted on
8195 * @rx_desc: pointer to the EOP Rx descriptor
8196 * @skb: pointer to current skb being fixed
8198 * Address the case where we are pulling data in on pages only
8199 * and as such no data is present in the skb header.
8201 * In addition if skb is not at least 60 bytes we need to pad it so that
8202 * it is large enough to qualify as a valid Ethernet frame.
8204 * Returns true if an error was encountered and skb was freed.
8206 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8207 union e1000_adv_rx_desc *rx_desc,
8208 struct sk_buff *skb)
8211 if (unlikely((igb_test_staterr(rx_desc,
8212 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8213 struct net_device *netdev = rx_ring->netdev;
8214 if (!(netdev->features & NETIF_F_RXALL)) {
8215 dev_kfree_skb_any(skb);
8220 /* place header in linear portion of buffer */
8221 if (skb_is_nonlinear(skb))
8222 igb_pull_tail(rx_ring, rx_desc, skb);
8224 /* if skb_pad returns an error the skb was freed */
8225 if (unlikely(skb->len < 60)) {
8226 int pad_len = 60 - skb->len;
8228 if (skb_pad(skb, pad_len))
8230 __skb_put(skb, pad_len);
8236 /* igb_clean_rx_irq -- * packet split */
8237 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8239 struct igb_ring *rx_ring = q_vector->rx.ring;
8240 struct sk_buff *skb = rx_ring->skb;
8241 unsigned int total_bytes = 0, total_packets = 0;
8242 u16 cleaned_count = igb_desc_unused(rx_ring);
8245 union e1000_adv_rx_desc *rx_desc;
8247 /* return some buffers to hardware, one at a time is too slow */
8248 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8249 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8253 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8255 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8259 * This memory barrier is needed to keep us from reading
8260 * any other fields out of the rx_desc until we know the
8261 * RXD_STAT_DD bit is set
8265 /* retrieve a buffer from the ring */
8266 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8268 /* exit if we failed to retrieve a buffer */
8274 /* fetch next buffer in frame if non-eop */
8275 if (igb_is_non_eop(rx_ring, rx_desc))
8278 /* verify the packet layout is correct */
8279 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8284 /* probably a little skewed due to removing CRC */
8285 total_bytes += skb->len;
8287 /* populate checksum, timestamp, VLAN, and protocol */
8288 igb_process_skb_fields(rx_ring, rx_desc, skb);
8291 if (igb_can_lro(rx_ring, rx_desc, skb))
8292 igb_lro_receive(q_vector, skb);
8295 #ifdef HAVE_VLAN_RX_REGISTER
8296 igb_receive_skb(q_vector, skb);
8298 napi_gro_receive(&q_vector->napi, skb);
8302 netdev_ring(rx_ring)->last_rx = jiffies;
8305 /* reset skb pointer */
8308 /* update budget accounting */
8310 } while (likely(total_packets < budget));
8312 /* place incomplete frames back on ring for completion */
8315 rx_ring->rx_stats.packets += total_packets;
8316 rx_ring->rx_stats.bytes += total_bytes;
8317 q_vector->rx.total_packets += total_packets;
8318 q_vector->rx.total_bytes += total_bytes;
8321 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8324 igb_lro_flush_all(q_vector);
8326 #endif /* IGB_NO_LRO */
8327 return (total_packets < budget);
8329 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8331 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8332 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8333 struct igb_rx_buffer *bi)
8335 struct sk_buff *skb = bi->skb;
8336 dma_addr_t dma = bi->dma;
8342 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8343 rx_ring->rx_buffer_len);
8346 rx_ring->rx_stats.alloc_failed++;
8350 /* initialize skb for ring */
8351 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8354 dma = dma_map_single(rx_ring->dev, skb->data,
8355 rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8357 /* if mapping failed free memory back to system since
8358 * there isn't much point in holding memory we can't use
8360 if (dma_mapping_error(rx_ring->dev, dma)) {
8361 dev_kfree_skb_any(skb);
8364 rx_ring->rx_stats.alloc_failed++;
8372 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8373 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8374 struct igb_rx_buffer *bi)
8376 struct page *page = bi->page;
8379 /* since we are recycling buffers we should seldom need to alloc */
8383 /* alloc new page for storage */
8384 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8385 if (unlikely(!page)) {
8386 rx_ring->rx_stats.alloc_failed++;
8390 /* map page for use */
8391 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8394 * if mapping failed free memory back to system since
8395 * there isn't much point in holding memory we can't use
8397 if (dma_mapping_error(rx_ring->dev, dma)) {
8400 rx_ring->rx_stats.alloc_failed++;
8406 bi->page_offset = 0;
8411 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8413 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8414 * @adapter: address of board private structure
8416 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8418 union e1000_adv_rx_desc *rx_desc;
8419 struct igb_rx_buffer *bi;
8420 u16 i = rx_ring->next_to_use;
8426 rx_desc = IGB_RX_DESC(rx_ring, i);
8427 bi = &rx_ring->rx_buffer_info[i];
8428 i -= rx_ring->count;
8431 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8432 if (!igb_alloc_mapped_skb(rx_ring, bi))
8434 if (!igb_alloc_mapped_page(rx_ring, bi))
8435 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8439 * Refresh the desc even if buffer_addrs didn't change
8440 * because each write-back erases this info.
8442 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8443 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8445 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8452 rx_desc = IGB_RX_DESC(rx_ring, 0);
8453 bi = rx_ring->rx_buffer_info;
8454 i -= rx_ring->count;
8457 /* clear the hdr_addr for the next_to_use descriptor */
8458 rx_desc->read.hdr_addr = 0;
8461 } while (cleaned_count);
8463 i += rx_ring->count;
8465 if (rx_ring->next_to_use != i) {
8466 /* record the next descriptor to use */
8467 rx_ring->next_to_use = i;
8469 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8470 /* update next to alloc since we have filled the ring */
8471 rx_ring->next_to_alloc = i;
8475 * Force memory writes to complete before letting h/w
8476 * know there are new descriptors to fetch. (Only
8477 * applicable for weak-ordered memory model archs,
8481 writel(i, rx_ring->tail);
8492 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8494 struct igb_adapter *adapter = netdev_priv(netdev);
8495 struct mii_ioctl_data *data = if_mii(ifr);
8497 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8502 data->phy_id = adapter->hw.phy.addr;
8505 if (!capable(CAP_NET_ADMIN))
8507 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8515 return E1000_SUCCESS;
8525 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8532 return igb_mii_ioctl(netdev, ifr, cmd);
8534 #ifdef HAVE_PTP_1588_CLOCK
8536 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8537 #endif /* HAVE_PTP_1588_CLOCK */
8538 #ifdef ETHTOOL_OPS_COMPAT
8540 return ethtool_ioctl(ifr);
8547 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8549 struct igb_adapter *adapter = hw->back;
8552 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8554 return -E1000_ERR_CONFIG;
8556 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8558 return E1000_SUCCESS;
8561 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8563 struct igb_adapter *adapter = hw->back;
8566 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8568 return -E1000_ERR_CONFIG;
8570 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8572 return E1000_SUCCESS;
8575 #ifdef HAVE_VLAN_RX_REGISTER
8576 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8578 void igb_vlan_mode(struct net_device *netdev, u32 features)
8581 struct igb_adapter *adapter = netdev_priv(netdev);
8582 struct e1000_hw *hw = &adapter->hw;
8585 #ifdef HAVE_VLAN_RX_REGISTER
8586 bool enable = !!vlgrp;
8588 igb_irq_disable(adapter);
8590 adapter->vlgrp = vlgrp;
8592 if (!test_bit(__IGB_DOWN, &adapter->state))
8593 igb_irq_enable(adapter);
8595 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8596 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8598 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8603 /* enable VLAN tag insert/strip */
8604 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8605 ctrl |= E1000_CTRL_VME;
8606 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8608 /* Disable CFI check */
8609 rctl = E1000_READ_REG(hw, E1000_RCTL);
8610 rctl &= ~E1000_RCTL_CFIEN;
8611 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8613 /* disable VLAN tag insert/strip */
8614 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8615 ctrl &= ~E1000_CTRL_VME;
8616 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8619 #ifndef CONFIG_IGB_VMDQ_NETDEV
8620 for (i = 0; i < adapter->vmdq_pools; i++) {
8621 igb_set_vf_vlan_strip(adapter,
8622 adapter->vfs_allocated_count + i,
8627 igb_set_vf_vlan_strip(adapter,
8628 adapter->vfs_allocated_count,
8631 for (i = 1; i < adapter->vmdq_pools; i++) {
8632 #ifdef HAVE_VLAN_RX_REGISTER
8633 struct igb_vmdq_adapter *vadapter;
8634 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8635 enable = !!vadapter->vlgrp;
8637 struct net_device *vnetdev;
8638 vnetdev = adapter->vmdq_netdev[i-1];
8639 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8640 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8642 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8645 igb_set_vf_vlan_strip(adapter,
8646 adapter->vfs_allocated_count + i,
8651 igb_rlpml_set(adapter);
8654 #ifdef HAVE_VLAN_PROTOCOL
8655 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8656 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8657 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8658 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8659 __always_unused __be16 proto, u16 vid)
8661 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8664 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8667 struct igb_adapter *adapter = netdev_priv(netdev);
8668 int pf_id = adapter->vfs_allocated_count;
8670 /* attempt to add filter to vlvf array */
8671 igb_vlvf_set(adapter, vid, TRUE, pf_id);
8673 /* add the filter since PF can receive vlans w/o entry in vlvf */
8674 igb_vfta_set(adapter, vid, TRUE);
8675 #ifndef HAVE_NETDEV_VLAN_FEATURES
8677 /* Copy feature flags from netdev to the vlan netdev for this vid.
8678 * This allows things like TSO to bubble down to our vlan device.
8679 * There is no need to update netdev for vlan 0 (DCB), since it
8680 * wouldn't has v_netdev.
8682 if (adapter->vlgrp) {
8683 struct vlan_group *vlgrp = adapter->vlgrp;
8684 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8686 v_netdev->features |= netdev->features;
8687 vlan_group_set_device(vlgrp, vid, v_netdev);
8691 #ifndef HAVE_VLAN_RX_REGISTER
8693 set_bit(vid, adapter->active_vlans);
8695 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8700 #ifdef HAVE_VLAN_PROTOCOL
8701 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8702 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8703 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8704 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8705 __always_unused __be16 proto, u16 vid)
8707 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8710 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8713 struct igb_adapter *adapter = netdev_priv(netdev);
8714 int pf_id = adapter->vfs_allocated_count;
8717 #ifdef HAVE_VLAN_RX_REGISTER
8718 igb_irq_disable(adapter);
8720 vlan_group_set_device(adapter->vlgrp, vid, NULL);
8722 if (!test_bit(__IGB_DOWN, &adapter->state))
8723 igb_irq_enable(adapter);
8725 #endif /* HAVE_VLAN_RX_REGISTER */
8726 /* remove vlan from VLVF table array */
8727 err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8729 /* if vid was not present in VLVF just remove it from table */
8731 igb_vfta_set(adapter, vid, FALSE);
8732 #ifndef HAVE_VLAN_RX_REGISTER
8734 clear_bit(vid, adapter->active_vlans);
8736 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8741 static void igb_restore_vlan(struct igb_adapter *adapter)
8743 #ifdef HAVE_VLAN_RX_REGISTER
8744 igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8746 if (adapter->vlgrp) {
8748 for (vid = 0; vid < VLAN_N_VID; vid++) {
8749 if (!vlan_group_get_device(adapter->vlgrp, vid))
8751 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8752 igb_vlan_rx_add_vid(adapter->netdev,
8753 htons(ETH_P_8021Q), vid);
8755 igb_vlan_rx_add_vid(adapter->netdev, vid);
8762 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8764 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8765 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8766 igb_vlan_rx_add_vid(adapter->netdev,
8767 htons(ETH_P_8021Q), vid);
8769 igb_vlan_rx_add_vid(adapter->netdev, vid);
8774 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8776 struct pci_dev *pdev = adapter->pdev;
8777 struct e1000_mac_info *mac = &adapter->hw.mac;
8781 /* SerDes device's does not support 10Mbps Full/duplex
8782 * and 100Mbps Half duplex
8784 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8786 case SPEED_10 + DUPLEX_HALF:
8787 case SPEED_10 + DUPLEX_FULL:
8788 case SPEED_100 + DUPLEX_HALF:
8789 dev_err(pci_dev_to_dev(pdev),
8790 "Unsupported Speed/Duplex configuration\n");
8798 case SPEED_10 + DUPLEX_HALF:
8799 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8801 case SPEED_10 + DUPLEX_FULL:
8802 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8804 case SPEED_100 + DUPLEX_HALF:
8805 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8807 case SPEED_100 + DUPLEX_FULL:
8808 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8810 case SPEED_1000 + DUPLEX_FULL:
8812 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8814 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8816 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8820 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8821 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8826 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8829 struct net_device *netdev = pci_get_drvdata(pdev);
8830 struct igb_adapter *adapter = netdev_priv(netdev);
8831 struct e1000_hw *hw = &adapter->hw;
8832 u32 ctrl, rctl, status;
8833 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8838 netif_device_detach(netdev);
8840 status = E1000_READ_REG(hw, E1000_STATUS);
8841 if (status & E1000_STATUS_LU)
8842 wufc &= ~E1000_WUFC_LNKC;
8844 if (netif_running(netdev))
8845 __igb_close(netdev, true);
8847 igb_clear_interrupt_scheme(adapter);
8850 retval = pci_save_state(pdev);
8856 igb_setup_rctl(adapter);
8857 igb_set_rx_mode(netdev);
8859 /* turn on all-multi mode if wake on multicast is enabled */
8860 if (wufc & E1000_WUFC_MC) {
8861 rctl = E1000_READ_REG(hw, E1000_RCTL);
8862 rctl |= E1000_RCTL_MPE;
8863 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8866 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8867 /* phy power management enable */
8868 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8869 ctrl |= E1000_CTRL_ADVD3WUC;
8870 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8872 /* Allow time for pending master requests to run */
8873 e1000_disable_pcie_master(hw);
8875 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8876 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8878 E1000_WRITE_REG(hw, E1000_WUC, 0);
8879 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8882 *enable_wake = wufc || adapter->en_mng_pt;
8884 igb_power_down_link(adapter);
8886 igb_power_up_link(adapter);
8888 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8889 * would have already happened in close and is redundant. */
8890 igb_release_hw_control(adapter);
8892 pci_disable_device(pdev);
8898 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8899 static int igb_suspend(struct device *dev)
8901 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8902 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8904 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8905 struct pci_dev *pdev = to_pci_dev(dev);
8906 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8910 retval = __igb_shutdown(pdev, &wake, 0);
8915 pci_prepare_to_sleep(pdev);
8917 pci_wake_from_d3(pdev, false);
8918 pci_set_power_state(pdev, PCI_D3hot);
8924 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8925 static int igb_resume(struct device *dev)
8927 static int igb_resume(struct pci_dev *pdev)
8928 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8930 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8931 struct pci_dev *pdev = to_pci_dev(dev);
8932 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8933 struct net_device *netdev = pci_get_drvdata(pdev);
8934 struct igb_adapter *adapter = netdev_priv(netdev);
8935 struct e1000_hw *hw = &adapter->hw;
8938 pci_set_power_state(pdev, PCI_D0);
8939 pci_restore_state(pdev);
8940 pci_save_state(pdev);
8942 err = pci_enable_device_mem(pdev);
8944 dev_err(pci_dev_to_dev(pdev),
8945 "igb: Cannot enable PCI device from suspend\n");
8948 pci_set_master(pdev);
8950 pci_enable_wake(pdev, PCI_D3hot, 0);
8951 pci_enable_wake(pdev, PCI_D3cold, 0);
8953 if (igb_init_interrupt_scheme(adapter, true)) {
8954 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8960 /* let the f/w know that the h/w is now under the control of the
8962 igb_get_hw_control(adapter);
8964 E1000_WRITE_REG(hw, E1000_WUS, ~0);
8966 if (netdev->flags & IFF_UP) {
8968 err = __igb_open(netdev, true);
8974 netif_device_attach(netdev);
8979 #ifdef CONFIG_PM_RUNTIME
8980 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8981 static int igb_runtime_idle(struct device *dev)
8983 struct pci_dev *pdev = to_pci_dev(dev);
8984 struct net_device *netdev = pci_get_drvdata(pdev);
8985 struct igb_adapter *adapter = netdev_priv(netdev);
8987 if (!igb_has_link(adapter))
8988 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8993 static int igb_runtime_suspend(struct device *dev)
8995 struct pci_dev *pdev = to_pci_dev(dev);
8999 retval = __igb_shutdown(pdev, &wake, 1);
9004 pci_prepare_to_sleep(pdev);
9006 pci_wake_from_d3(pdev, false);
9007 pci_set_power_state(pdev, PCI_D3hot);
9013 static int igb_runtime_resume(struct device *dev)
9015 return igb_resume(dev);
9017 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9018 #endif /* CONFIG_PM_RUNTIME */
9019 #endif /* CONFIG_PM */
9021 #ifdef USE_REBOOT_NOTIFIER
9022 /* only want to do this for 2.4 kernels? */
9023 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9026 struct pci_dev *pdev = NULL;
9033 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9034 if (pci_dev_driver(pdev) == &igb_driver) {
9035 __igb_shutdown(pdev, &wake, 0);
9036 if (event == SYS_POWER_OFF) {
9037 pci_wake_from_d3(pdev, wake);
9038 pci_set_power_state(pdev, PCI_D3hot);
9046 static void igb_shutdown(struct pci_dev *pdev)
9050 __igb_shutdown(pdev, &wake, 0);
9052 if (system_state == SYSTEM_POWER_OFF) {
9053 pci_wake_from_d3(pdev, wake);
9054 pci_set_power_state(pdev, PCI_D3hot);
9057 #endif /* USE_REBOOT_NOTIFIER */
9059 #ifdef CONFIG_NET_POLL_CONTROLLER
9061 * Polling 'interrupt' - used by things like netconsole to send skbs
9062 * without having to re-enable interrupts. It's not called while
9063 * the interrupt routine is executing.
9065 static void igb_netpoll(struct net_device *netdev)
9067 struct igb_adapter *adapter = netdev_priv(netdev);
9068 struct e1000_hw *hw = &adapter->hw;
9069 struct igb_q_vector *q_vector;
9072 for (i = 0; i < adapter->num_q_vectors; i++) {
9073 q_vector = adapter->q_vector[i];
9074 if (adapter->msix_entries)
9075 E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9077 igb_irq_disable(adapter);
9078 napi_schedule(&q_vector->napi);
9081 #endif /* CONFIG_NET_POLL_CONTROLLER */
9084 #define E1000_DEV_ID_82576_VF 0x10CA
9086 * igb_io_error_detected - called when PCI error is detected
9087 * @pdev: Pointer to PCI device
9088 * @state: The current pci connection state
9090 * This function is called after a PCI bus error affecting
9091 * this device has been detected.
9093 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9094 pci_channel_state_t state)
9096 struct net_device *netdev = pci_get_drvdata(pdev);
9097 struct igb_adapter *adapter = netdev_priv(netdev);
9099 #ifdef CONFIG_PCI_IOV__UNUSED
9100 struct pci_dev *bdev, *vfdev;
9101 u32 dw0, dw1, dw2, dw3;
9103 u16 req_id, pf_func;
9105 if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9106 goto skip_bad_vf_detection;
9108 bdev = pdev->bus->self;
9109 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9110 bdev = bdev->bus->self;
9113 goto skip_bad_vf_detection;
9115 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9117 goto skip_bad_vf_detection;
9119 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9120 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9121 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9122 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9125 /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9126 if (!(req_id & 0x0080))
9127 goto skip_bad_vf_detection;
9129 pf_func = req_id & 0x01;
9130 if ((pf_func & 1) == (pdev->devfn & 1)) {
9132 vf = (req_id & 0x7F) >> 1;
9133 dev_err(pci_dev_to_dev(pdev),
9134 "VF %d has caused a PCIe error\n", vf);
9135 dev_err(pci_dev_to_dev(pdev),
9136 "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9137 "%8.8x\tdw3: %8.8x\n",
9138 dw0, dw1, dw2, dw3);
9140 /* Find the pci device of the offending VF */
9141 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9142 E1000_DEV_ID_82576_VF, NULL);
9144 if (vfdev->devfn == (req_id & 0xFF))
9146 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9147 E1000_DEV_ID_82576_VF, vfdev);
9150 * There's a slim chance the VF could have been hot plugged,
9151 * so if it is no longer present we don't need to issue the
9152 * VFLR. Just clean up the AER in that case.
9155 dev_err(pci_dev_to_dev(pdev),
9156 "Issuing VFLR to VF %d\n", vf);
9157 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9160 pci_cleanup_aer_uncorrect_error_status(pdev);
9164 * Even though the error may have occurred on the other port
9165 * we still need to increment the vf error reference count for
9166 * both ports because the I/O resume function will be called
9169 adapter->vferr_refcount++;
9171 return PCI_ERS_RESULT_RECOVERED;
9173 skip_bad_vf_detection:
9174 #endif /* CONFIG_PCI_IOV */
9176 netif_device_detach(netdev);
9178 if (state == pci_channel_io_perm_failure)
9179 return PCI_ERS_RESULT_DISCONNECT;
9181 if (netif_running(netdev))
9183 pci_disable_device(pdev);
9185 /* Request a slot slot reset. */
9186 return PCI_ERS_RESULT_NEED_RESET;
9190 * igb_io_slot_reset - called after the pci bus has been reset.
9191 * @pdev: Pointer to PCI device
9193 * Restart the card from scratch, as if from a cold-boot. Implementation
9194 * resembles the first-half of the igb_resume routine.
9196 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9198 struct net_device *netdev = pci_get_drvdata(pdev);
9199 struct igb_adapter *adapter = netdev_priv(netdev);
9200 struct e1000_hw *hw = &adapter->hw;
9201 pci_ers_result_t result;
9203 if (pci_enable_device_mem(pdev)) {
9204 dev_err(pci_dev_to_dev(pdev),
9205 "Cannot re-enable PCI device after reset.\n");
9206 result = PCI_ERS_RESULT_DISCONNECT;
9208 pci_set_master(pdev);
9209 pci_restore_state(pdev);
9210 pci_save_state(pdev);
9212 pci_enable_wake(pdev, PCI_D3hot, 0);
9213 pci_enable_wake(pdev, PCI_D3cold, 0);
9215 schedule_work(&adapter->reset_task);
9216 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9217 result = PCI_ERS_RESULT_RECOVERED;
9220 pci_cleanup_aer_uncorrect_error_status(pdev);
9226 * igb_io_resume - called when traffic can start flowing again.
9227 * @pdev: Pointer to PCI device
9229 * This callback is called when the error recovery driver tells us that
9230 * its OK to resume normal operation. Implementation resembles the
9231 * second-half of the igb_resume routine.
9233 static void igb_io_resume(struct pci_dev *pdev)
9235 struct net_device *netdev = pci_get_drvdata(pdev);
9236 struct igb_adapter *adapter = netdev_priv(netdev);
9238 if (adapter->vferr_refcount) {
9239 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9240 adapter->vferr_refcount--;
9244 if (netif_running(netdev)) {
9245 if (igb_up(adapter)) {
9246 dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9251 netif_device_attach(netdev);
9253 /* let the f/w know that the h/w is now under the control of the
9255 igb_get_hw_control(adapter);
9258 #endif /* HAVE_PCI_ERS */
9260 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9262 struct e1000_hw *hw = &adapter->hw;
9265 if (is_zero_ether_addr(addr))
9268 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9269 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9271 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9272 IGB_MAC_STATE_IN_USE);
9273 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9274 adapter->mac_table[i].queue = queue;
9275 igb_sync_mac_table(adapter);
9280 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9282 /* search table for addr, if found, set to 0 and sync */
9284 struct e1000_hw *hw = &adapter->hw;
9286 if (is_zero_ether_addr(addr))
9288 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9289 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9290 adapter->mac_table[i].queue == queue) {
9291 adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9292 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9293 adapter->mac_table[i].queue = 0;
9294 igb_sync_mac_table(adapter);
9300 static int igb_set_vf_mac(struct igb_adapter *adapter,
9301 int vf, unsigned char *mac_addr)
9303 igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9304 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9306 igb_add_mac_filter(adapter, mac_addr, vf);
9312 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9314 struct igb_adapter *adapter = netdev_priv(netdev);
9315 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9317 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9318 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9319 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9320 " change effective.\n");
9321 if (test_bit(__IGB_DOWN, &adapter->state)) {
9322 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9323 " but the PF device is not up.\n");
9324 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9325 " attempting to use the VF device.\n");
9327 return igb_set_vf_mac(adapter, vf, mac);
9330 static int igb_link_mbps(int internal_link_speed)
9332 switch (internal_link_speed) {
9344 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9351 /* Calculate the rate factor values to set */
9352 rf_int = link_speed / tx_rate;
9353 rf_dec = (link_speed - (rf_int * tx_rate));
9354 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9356 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9357 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9358 E1000_RTTBCNRC_RF_INT_MASK);
9359 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9364 E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9366 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9367 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9369 E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9370 E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9373 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9375 int actual_link_speed, i;
9376 bool reset_rate = false;
9378 /* VF TX rate limit was not set */
9379 if ((adapter->vf_rate_link_speed == 0) ||
9380 (adapter->hw.mac.type != e1000_82576))
9383 actual_link_speed = igb_link_mbps(adapter->link_speed);
9384 if (actual_link_speed != adapter->vf_rate_link_speed) {
9386 adapter->vf_rate_link_speed = 0;
9387 dev_info(&adapter->pdev->dev,
9388 "Link speed has been changed. VF Transmit rate is disabled\n");
9391 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9393 adapter->vf_data[i].tx_rate = 0;
9395 igb_set_vf_rate_limit(&adapter->hw, i,
9396 adapter->vf_data[i].tx_rate, actual_link_speed);
9400 #ifdef HAVE_VF_MIN_MAX_TXRATE
9401 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9403 #else /* HAVE_VF_MIN_MAX_TXRATE */
9404 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9405 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9407 struct igb_adapter *adapter = netdev_priv(netdev);
9408 struct e1000_hw *hw = &adapter->hw;
9409 int actual_link_speed;
9411 if (hw->mac.type != e1000_82576)
9414 #ifdef HAVE_VF_MIN_MAX_TXRATE
9417 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9419 actual_link_speed = igb_link_mbps(adapter->link_speed);
9420 if ((vf >= adapter->vfs_allocated_count) ||
9421 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9422 (tx_rate < 0) || (tx_rate > actual_link_speed))
9425 adapter->vf_rate_link_speed = actual_link_speed;
9426 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9427 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9432 static int igb_ndo_get_vf_config(struct net_device *netdev,
9433 int vf, struct ifla_vf_info *ivi)
9435 struct igb_adapter *adapter = netdev_priv(netdev);
9436 if (vf >= adapter->vfs_allocated_count)
9439 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9440 #ifdef HAVE_VF_MIN_MAX_TXRATE
9441 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9442 ivi->min_tx_rate = 0;
9443 #else /* HAVE_VF_MIN_MAX_TXRATE */
9444 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9445 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9446 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9447 ivi->qos = adapter->vf_data[vf].pf_qos;
9448 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9449 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9454 static void igb_vmm_control(struct igb_adapter *adapter)
9456 struct e1000_hw *hw = &adapter->hw;
9460 switch (hw->mac.type) {
9463 /* replication is not supported for 82575 */
9466 /* notify HW that the MAC is adding vlan tags */
9467 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9468 reg |= (E1000_DTXCTL_VLAN_ADDED |
9469 E1000_DTXCTL_SPOOF_INT);
9470 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9472 /* enable replication vlan tag stripping */
9473 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9474 reg |= E1000_RPLOLR_STRVLAN;
9475 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9478 /* none of the above registers are supported by i350 */
9482 /* Enable Malicious Driver Detection */
9483 if ((adapter->vfs_allocated_count) &&
9485 if (hw->mac.type == e1000_i350)
9486 igb_enable_mdd(adapter);
9489 /* enable replication and loopback support */
9490 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9491 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9492 e1000_vmdq_set_loopback_pf(hw, 1);
9493 e1000_vmdq_set_anti_spoofing_pf(hw,
9494 adapter->vfs_allocated_count || adapter->vmdq_pools,
9495 adapter->vfs_allocated_count);
9496 e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9497 adapter->vmdq_pools);
9500 static void igb_init_fw(struct igb_adapter *adapter)
9502 struct e1000_fw_drv_info fw_cmd;
9503 struct e1000_hw *hw = &adapter->hw;
9507 if (hw->mac.type == e1000_i210)
9508 mask = E1000_SWFW_EEP_SM;
9510 mask = E1000_SWFW_PHY0_SM;
9511 /* i211 parts do not support this feature */
9512 if (hw->mac.type == e1000_i211)
9513 hw->mac.arc_subsystem_valid = false;
9515 if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9516 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9517 E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9518 fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9519 fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9520 fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9521 fw_cmd.port_num = hw->bus.func;
9522 fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9523 fw_cmd.hdr.checksum = 0;
9524 fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9526 fw_cmd.hdr.buf_len));
9527 e1000_host_interface_command(hw, (u8*)&fw_cmd,
9529 if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9533 dev_warn(pci_dev_to_dev(adapter->pdev),
9534 "Unable to get semaphore, firmware init failed.\n");
9535 hw->mac.ops.release_swfw_sync(hw, mask);
9538 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9540 struct e1000_hw *hw = &adapter->hw;
9545 if (hw->mac.type == e1000_i211)
9548 if (hw->mac.type > e1000_82580) {
9549 if (adapter->dmac != IGB_DMAC_DISABLE) {
9552 /* force threshold to 0. */
9553 E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9556 * DMA Coalescing high water mark needs to be greater
9557 * than the Rx threshold. Set hwm to PBA - max frame
9558 * size in 16B units, capping it at PBA - 6KB.
9560 hwm = 64 * pba - adapter->max_frame_size / 16;
9561 if (hwm < 64 * (pba - 6))
9562 hwm = 64 * (pba - 6);
9563 reg = E1000_READ_REG(hw, E1000_FCRTC);
9564 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9565 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9566 & E1000_FCRTC_RTH_COAL_MASK);
9567 E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9570 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9571 * frame size, capping it at PBA - 10KB.
9573 dmac_thr = pba - adapter->max_frame_size / 512;
9574 if (dmac_thr < pba - 10)
9575 dmac_thr = pba - 10;
9576 reg = E1000_READ_REG(hw, E1000_DMACR);
9577 reg &= ~E1000_DMACR_DMACTHR_MASK;
9578 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9579 & E1000_DMACR_DMACTHR_MASK);
9581 /* transition to L0x or L1 if available..*/
9582 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9584 /* Check if status is 2.5Gb backplane connection
9585 * before configuration of watchdog timer, which is
9586 * in msec values in 12.8usec intervals
9587 * watchdog timer= msec values in 32usec intervals
9588 * for non 2.5Gb connection
9590 if (hw->mac.type == e1000_i354) {
9591 status = E1000_READ_REG(hw, E1000_STATUS);
9592 if ((status & E1000_STATUS_2P5_SKU) &&
9593 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9594 reg |= ((adapter->dmac * 5) >> 6);
9596 reg |= ((adapter->dmac) >> 5);
9598 reg |= ((adapter->dmac) >> 5);
9602 * Disable BMC-to-OS Watchdog enable
9603 * on devices that support OS-to-BMC
9605 if (hw->mac.type != e1000_i354)
9606 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9607 E1000_WRITE_REG(hw, E1000_DMACR, reg);
9609 /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9610 E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9612 /* This sets the time to wait before requesting
9613 * transition to low power state to number of usecs
9614 * needed to receive 1 512 byte frame at gigabit
9615 * line rate. On i350 device, time to make transition
9616 * to Lx state is delayed by 4 usec with flush disable
9617 * bit set to avoid losing mailbox interrupts
9619 reg = E1000_READ_REG(hw, E1000_DMCTLX);
9620 if (hw->mac.type == e1000_i350)
9621 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9623 /* in 2.5Gb connection, TTLX unit is 0.4 usec
9624 * which is 0x4*2 = 0xA. But delay is still 4 usec
9626 if (hw->mac.type == e1000_i354) {
9627 status = E1000_READ_REG(hw, E1000_STATUS);
9628 if ((status & E1000_STATUS_2P5_SKU) &&
9629 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9636 E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9638 /* free space in tx packet buffer to wake from DMA coal */
9639 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9640 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9642 /* make low power state decision controlled by DMA coal */
9643 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9644 reg &= ~E1000_PCIEMISC_LX_DECISION;
9645 E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9646 } /* endif adapter->dmac is not disabled */
9647 } else if (hw->mac.type == e1000_82580) {
9648 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9649 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9650 reg & ~E1000_PCIEMISC_LX_DECISION);
9651 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9655 #ifdef HAVE_I2C_SUPPORT
9656 /* igb_read_i2c_byte - Reads 8 bit word over I2C
9657 * @hw: pointer to hardware structure
9658 * @byte_offset: byte offset to read
9659 * @dev_addr: device address
9662 * Performs byte read operation over I2C interface at
9663 * a specified device address.
9665 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9666 u8 dev_addr, u8 *data)
9668 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9669 struct i2c_client *this_client = adapter->i2c_client;
9674 return E1000_ERR_I2C;
9676 swfw_mask = E1000_SWFW_PHY0_SM;
9678 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9680 return E1000_ERR_SWFW_SYNC;
9682 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9683 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9686 return E1000_ERR_I2C;
9689 return E1000_SUCCESS;
9693 /* igb_write_i2c_byte - Writes 8 bit word over I2C
9694 * @hw: pointer to hardware structure
9695 * @byte_offset: byte offset to write
9696 * @dev_addr: device address
9697 * @data: value to write
9699 * Performs byte write operation over I2C interface at
9700 * a specified device address.
9702 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9703 u8 dev_addr, u8 data)
9705 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9706 struct i2c_client *this_client = adapter->i2c_client;
9708 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9711 return E1000_ERR_I2C;
9713 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9714 return E1000_ERR_SWFW_SYNC;
9715 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9716 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9719 return E1000_ERR_I2C;
9721 return E1000_SUCCESS;
9723 #endif /* HAVE_I2C_SUPPORT */
9728 * igb_probe - Device Initialization Routine
9729 * @pdev: PCI device information struct
9730 * @ent: entry in igb_pci_tbl
9732 * Returns 0 on success, negative on failure
9734 * igb_probe initializes an adapter identified by a pci_dev structure.
9735 * The OS initialization, configuring of the adapter private structure,
9736 * and a hardware reset occur.
9738 int igb_kni_probe(struct pci_dev *pdev,
9739 struct net_device **lad_dev)
9741 struct net_device *netdev;
9742 struct igb_adapter *adapter;
9743 struct e1000_hw *hw;
9744 u16 eeprom_data = 0;
9745 u8 pba_str[E1000_PBANUM_LENGTH];
9747 static int global_quad_port_a; /* global quad port a indication */
9748 int i, err, pci_using_dac = 0;
9749 static int cards_found;
9751 err = pci_enable_device_mem(pdev);
9757 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9759 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9763 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9765 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9767 IGB_ERR("No usable DMA configuration, "
9774 #ifndef HAVE_ASPM_QUIRKS
9775 /* 82575 requires that the pci-e link partner disable the L0s state */
9776 switch (pdev->device) {
9777 case E1000_DEV_ID_82575EB_COPPER:
9778 case E1000_DEV_ID_82575EB_FIBER_SERDES:
9779 case E1000_DEV_ID_82575GB_QUAD_COPPER:
9780 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9785 #endif /* HAVE_ASPM_QUIRKS */
9786 err = pci_request_selected_regions(pdev,
9787 pci_select_bars(pdev,
9793 pci_enable_pcie_error_reporting(pdev);
9795 pci_set_master(pdev);
9800 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9803 netdev = alloc_etherdev(sizeof(struct igb_adapter));
9804 #endif /* HAVE_TX_MQ */
9806 goto err_alloc_etherdev;
9808 SET_MODULE_OWNER(netdev);
9809 SET_NETDEV_DEV(netdev, &pdev->dev);
9811 //pci_set_drvdata(pdev, netdev);
9812 adapter = netdev_priv(netdev);
9813 adapter->netdev = netdev;
9814 adapter->pdev = pdev;
9817 adapter->port_num = hw->bus.func;
9818 adapter->msg_enable = (1 << debug) - 1;
9821 err = pci_save_state(pdev);
9826 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9827 pci_resource_len(pdev, 0));
9831 #ifdef HAVE_NET_DEVICE_OPS
9832 netdev->netdev_ops = &igb_netdev_ops;
9833 #else /* HAVE_NET_DEVICE_OPS */
9834 netdev->open = &igb_open;
9835 netdev->stop = &igb_close;
9836 netdev->get_stats = &igb_get_stats;
9837 #ifdef HAVE_SET_RX_MODE
9838 netdev->set_rx_mode = &igb_set_rx_mode;
9840 netdev->set_multicast_list = &igb_set_rx_mode;
9841 netdev->set_mac_address = &igb_set_mac;
9842 netdev->change_mtu = &igb_change_mtu;
9843 netdev->do_ioctl = &igb_ioctl;
9844 #ifdef HAVE_TX_TIMEOUT
9845 netdev->tx_timeout = &igb_tx_timeout;
9847 netdev->vlan_rx_register = igb_vlan_mode;
9848 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9849 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9850 #ifdef CONFIG_NET_POLL_CONTROLLER
9851 netdev->poll_controller = igb_netpoll;
9853 netdev->hard_start_xmit = &igb_xmit_frame;
9854 #endif /* HAVE_NET_DEVICE_OPS */
9855 igb_set_ethtool_ops(netdev);
9856 #ifdef HAVE_TX_TIMEOUT
9857 netdev->watchdog_timeo = 5 * HZ;
9860 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9862 adapter->bd_number = cards_found;
9864 /* setup the private structure */
9865 err = igb_sw_init(adapter);
9869 e1000_get_bus_info(hw);
9871 hw->phy.autoneg_wait_to_complete = FALSE;
9872 hw->mac.adaptive_ifs = FALSE;
9874 /* Copper options */
9875 if (hw->phy.media_type == e1000_media_type_copper) {
9876 hw->phy.mdix = AUTO_ALL_MODES;
9877 hw->phy.disable_polarity_correction = FALSE;
9878 hw->phy.ms_type = e1000_ms_hw_default;
9881 if (e1000_check_reset_block(hw))
9882 dev_info(pci_dev_to_dev(pdev),
9883 "PHY reset is blocked due to SOL/IDER session.\n");
9886 * features is initialized to 0 in allocation, it might have bits
9887 * set by igb_sw_init so we should use an or instead of an
9890 netdev->features |= NETIF_F_SG |
9892 #ifdef NETIF_F_IPV6_CSUM
9900 #endif /* NETIF_F_TSO */
9901 #ifdef NETIF_F_RXHASH
9905 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9906 NETIF_F_HW_VLAN_CTAG_RX |
9907 NETIF_F_HW_VLAN_CTAG_TX;
9909 NETIF_F_HW_VLAN_RX |
9913 if (hw->mac.type >= e1000_82576)
9914 netdev->features |= NETIF_F_SCTP_CSUM;
9916 #ifdef HAVE_NDO_SET_FEATURES
9917 /* copy netdev features into list of user selectable features */
9918 netdev->hw_features |= netdev->features;
9921 /* give us the option of enabling LRO later */
9922 netdev->hw_features |= NETIF_F_LRO;
9927 /* this is only needed on kernels prior to 2.6.39 */
9928 netdev->features |= NETIF_F_GRO;
9932 /* set this bit last since it cannot be part of hw_features */
9933 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9934 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9936 netdev->features |= NETIF_F_HW_VLAN_FILTER;
9939 #ifdef HAVE_NETDEV_VLAN_FEATURES
9940 netdev->vlan_features |= NETIF_F_TSO |
9948 netdev->features |= NETIF_F_HIGHDMA;
9951 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9953 if (adapter->dmac != IGB_DMAC_DISABLE)
9954 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9957 /* before reading the NVM, reset the controller to put the device in a
9958 * known good starting state */
9962 /* make sure the NVM is good */
9963 if (e1000_validate_nvm_checksum(hw) < 0) {
9964 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9970 /* copy the MAC address out of the NVM */
9971 if (e1000_read_mac_addr(hw))
9972 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9973 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9974 #ifdef ETHTOOL_GPERMADDR
9975 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9977 if (!is_valid_ether_addr(netdev->perm_addr)) {
9979 if (!is_valid_ether_addr(netdev->dev_addr)) {
9981 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
9986 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
9987 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
9988 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
9989 igb_rar_set(adapter, 0);
9991 /* get firmware version for ethtool -i */
9992 igb_set_fw_version(adapter);
9994 /* Check if Media Autosense is enabled */
9995 if (hw->mac.type == e1000_82580)
9996 igb_init_mas(adapter);
9999 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10000 (unsigned long) adapter);
10001 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10002 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10003 (unsigned long) adapter);
10004 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10005 (unsigned long) adapter);
10007 INIT_WORK(&adapter->reset_task, igb_reset_task);
10008 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10009 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10010 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10013 /* Initialize link properties that are user-changeable */
10014 adapter->fc_autoneg = true;
10015 hw->mac.autoneg = true;
10016 hw->phy.autoneg_advertised = 0x2f;
10018 hw->fc.requested_mode = e1000_fc_default;
10019 hw->fc.current_mode = e1000_fc_default;
10021 e1000_validate_mdi_setting(hw);
10023 /* By default, support wake on port A */
10024 if (hw->bus.func == 0)
10025 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10027 /* Check the NVM for wake support for non-port A ports */
10028 if (hw->mac.type >= e1000_82580)
10029 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10030 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10032 else if (hw->bus.func == 1)
10033 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10035 if (eeprom_data & IGB_EEPROM_APME)
10036 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10038 /* now that we have the eeprom settings, apply the special cases where
10039 * the eeprom may be wrong or the board simply won't support wake on
10040 * lan on a particular port */
10041 switch (pdev->device) {
10042 case E1000_DEV_ID_82575GB_QUAD_COPPER:
10043 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10045 case E1000_DEV_ID_82575EB_FIBER_SERDES:
10046 case E1000_DEV_ID_82576_FIBER:
10047 case E1000_DEV_ID_82576_SERDES:
10048 /* Wake events only supported on port A for dual fiber
10049 * regardless of eeprom setting */
10050 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10051 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10053 case E1000_DEV_ID_82576_QUAD_COPPER:
10054 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10055 /* if quad port adapter, disable WoL on all but port A */
10056 if (global_quad_port_a != 0)
10057 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10059 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10060 /* Reset for multiple quad port adapters */
10061 if (++global_quad_port_a == 4)
10062 global_quad_port_a = 0;
10065 /* If the device can't wake, don't set software support */
10066 if (!device_can_wakeup(&adapter->pdev->dev))
10067 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10071 /* initialize the wol settings based on the eeprom settings */
10072 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10073 adapter->wol |= E1000_WUFC_MAG;
10075 /* Some vendors want WoL disabled by default, but still supported */
10076 if ((hw->mac.type == e1000_i350) &&
10077 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10078 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10083 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10084 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10086 /* reset the hardware with the new settings */
10087 igb_reset(adapter);
10088 adapter->devrc = 0;
10090 #ifdef HAVE_I2C_SUPPORT
10091 /* Init the I2C interface */
10092 err = igb_init_i2c(adapter);
10094 dev_err(&pdev->dev, "failed to init i2c interface\n");
10097 #endif /* HAVE_I2C_SUPPORT */
10099 /* let the f/w know that the h/w is now under the control of the
10101 igb_get_hw_control(adapter);
10103 strncpy(netdev->name, "eth%d", IFNAMSIZ);
10104 err = register_netdev(netdev);
10108 #ifdef CONFIG_IGB_VMDQ_NETDEV
10109 err = igb_init_vmdq_netdevs(adapter);
10113 /* carrier off reporting is important to ethtool even BEFORE open */
10114 netif_carrier_off(netdev);
10117 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10118 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10119 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10120 igb_setup_dca(adapter);
10124 #ifdef HAVE_PTP_1588_CLOCK
10125 /* do hw tstamp init after resetting */
10126 igb_ptp_init(adapter);
10127 #endif /* HAVE_PTP_1588_CLOCK */
10129 #endif /* NO_KNI */
10130 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10131 /* print bus type/speed/width info */
10132 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10134 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10135 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10136 (hw->mac.type == e1000_i354) ? "integrated" :
10138 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10139 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10140 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10141 (hw->mac.type == e1000_i354) ? "integrated" :
10143 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10144 for (i = 0; i < 6; i++)
10145 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10147 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10149 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10150 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10154 /* Initialize the thermal sensor on i350 devices. */
10155 if (hw->mac.type == e1000_i350) {
10156 if (hw->bus.func == 0) {
10160 * Read the NVM to determine if this i350 device
10161 * supports an external thermal sensor.
10163 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10164 if (ets_word != 0x0000 && ets_word != 0xFFFF)
10165 adapter->ets = true;
10167 adapter->ets = false;
10172 igb_sysfs_init(adapter);
10176 igb_procfs_init(adapter);
10177 #endif /* IGB_PROCFS */
10178 #endif /* IGB_HWMON */
10179 #endif /* NO_KNI */
10181 adapter->ets = false;
10184 if (hw->phy.media_type == e1000_media_type_copper) {
10185 switch (hw->mac.type) {
10189 /* Enable EEE for internal copper PHY devices */
10190 err = e1000_set_eee_i350(hw);
10192 (adapter->flags & IGB_FLAG_EEE))
10193 adapter->eee_advert =
10194 MDIO_EEE_100TX | MDIO_EEE_1000T;
10197 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10198 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10199 err = e1000_set_eee_i354(hw);
10201 (adapter->flags & IGB_FLAG_EEE))
10202 adapter->eee_advert =
10203 MDIO_EEE_100TX | MDIO_EEE_1000T;
10211 /* send driver version info to firmware */
10212 if (hw->mac.type >= e1000_i350)
10213 igb_init_fw(adapter);
10216 if (netdev->features & NETIF_F_LRO)
10217 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10219 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10221 dev_info(pci_dev_to_dev(pdev),
10222 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10223 adapter->msix_entries ? "MSI-X" :
10224 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10225 adapter->num_rx_queues, adapter->num_tx_queues);
10230 pm_runtime_put_noidle(&pdev->dev);
10234 // igb_release_hw_control(adapter);
10235 #ifdef HAVE_I2C_SUPPORT
10236 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10237 #endif /* HAVE_I2C_SUPPORT */
10239 // if (!e1000_check_reset_block(hw))
10240 // e1000_phy_hw_reset(hw);
10242 if (hw->flash_address)
10243 iounmap(hw->flash_address);
10245 // igb_clear_interrupt_scheme(adapter);
10246 // igb_reset_sriov_capability(adapter);
10247 iounmap(hw->hw_addr);
10249 free_netdev(netdev);
10250 err_alloc_etherdev:
10251 // pci_release_selected_regions(pdev,
10252 // pci_select_bars(pdev, IORESOURCE_MEM));
10255 pci_disable_device(pdev);
10260 void igb_kni_remove(struct pci_dev *pdev)
10262 pci_disable_device(pdev);