1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/tcp.h>
36 #include <net/checksum.h>
38 #include <linux/ipv6.h>
39 #include <net/ip6_checksum.h>
43 #include <linux/mii.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #ifdef CONFIG_PM_RUNTIME
50 #include <linux/pm_runtime.h>
51 #endif /* CONFIG_PM_RUNTIME */
53 #include <linux/if_bridge.h>
57 #include <linux/uio_driver.h>
59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
60 #define DRV_DEBUG "_debug"
65 #define VERSION_SUFFIX
70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
72 char igb_driver_name[] = "igb";
73 char igb_driver_version[] = DRV_VERSION;
74 static const char igb_driver_string[] =
75 "Intel(R) Gigabit Ethernet Network Driver";
76 static const char igb_copyright[] =
77 "Copyright (c) 2007-2013 Intel Corporation.";
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
100 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
101 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
102 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
103 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
104 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
105 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
106 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
107 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
108 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
109 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
110 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
111 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
112 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
113 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
114 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
115 /* required last entry */
119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
121 void igb_reset(struct igb_adapter *);
122 static int igb_setup_all_tx_resources(struct igb_adapter *);
123 static int igb_setup_all_rx_resources(struct igb_adapter *);
124 static void igb_free_all_tx_resources(struct igb_adapter *);
125 static void igb_free_all_rx_resources(struct igb_adapter *);
126 static void igb_setup_mrqc(struct igb_adapter *);
127 void igb_update_stats(struct igb_adapter *);
128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
129 static void __devexit igb_remove(struct pci_dev *pdev);
130 static int igb_sw_init(struct igb_adapter *);
131 static int igb_open(struct net_device *);
132 static int igb_close(struct net_device *);
133 static void igb_configure(struct igb_adapter *);
134 static void igb_configure_tx(struct igb_adapter *);
135 static void igb_configure_rx(struct igb_adapter *);
136 static void igb_clean_all_tx_rings(struct igb_adapter *);
137 static void igb_clean_all_rx_rings(struct igb_adapter *);
138 static void igb_clean_tx_ring(struct igb_ring *);
139 static void igb_set_rx_mode(struct net_device *);
140 static void igb_update_phy_info(unsigned long);
141 static void igb_watchdog(unsigned long);
142 static void igb_watchdog_task(struct work_struct *);
143 static void igb_dma_err_task(struct work_struct *);
144 static void igb_dma_err_timer(unsigned long data);
145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
146 static struct net_device_stats *igb_get_stats(struct net_device *);
147 static int igb_change_mtu(struct net_device *, int);
148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
149 static int igb_set_mac(struct net_device *, void *);
150 static void igb_set_uta(struct igb_adapter *adapter);
151 static irqreturn_t igb_intr(int irq, void *);
152 static irqreturn_t igb_intr_msi(int irq, void *);
153 static irqreturn_t igb_msix_other(int irq, void *);
154 static irqreturn_t igb_msix_ring(int irq, void *);
156 static void igb_update_dca(struct igb_q_vector *);
157 static void igb_setup_dca(struct igb_adapter *);
159 static int igb_poll(struct napi_struct *, int);
160 static bool igb_clean_tx_irq(struct igb_q_vector *);
161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
163 static void igb_tx_timeout(struct net_device *);
164 static void igb_reset_task(struct work_struct *);
165 #ifdef HAVE_VLAN_RX_REGISTER
166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
168 #ifdef HAVE_VLAN_PROTOCOL
169 static int igb_vlan_rx_add_vid(struct net_device *,
171 static int igb_vlan_rx_kill_vid(struct net_device *,
173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
175 static int igb_vlan_rx_add_vid(struct net_device *,
176 __always_unused __be16 proto, u16);
177 static int igb_vlan_rx_kill_vid(struct net_device *,
178 __always_unused __be16 proto, u16);
180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
187 static void igb_restore_vlan(struct igb_adapter *);
188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
189 static void igb_ping_all_vfs(struct igb_adapter *);
190 static void igb_msg_task(struct igb_adapter *);
191 static void igb_vmm_control(struct igb_adapter *);
192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
194 static void igb_process_mdd_event(struct igb_adapter *);
196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
198 int vf, u16 vlan, u8 qos);
199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
203 #ifdef HAVE_VF_MIN_MAX_TXRATE
204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
205 #else /* HAVE_VF_MIN_MAX_TXRATE */
206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
209 struct ifla_vf_info *ivi);
210 static void igb_check_vf_rate_limit(struct igb_adapter *);
212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
215 static int igb_suspend(struct device *dev);
216 static int igb_resume(struct device *dev);
217 #ifdef CONFIG_PM_RUNTIME
218 static int igb_runtime_suspend(struct device *dev);
219 static int igb_runtime_resume(struct device *dev);
220 static int igb_runtime_idle(struct device *dev);
221 #endif /* CONFIG_PM_RUNTIME */
222 static const struct dev_pm_ops igb_pm_ops = {
223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
224 .suspend = igb_suspend,
225 .resume = igb_resume,
226 .freeze = igb_suspend,
228 .poweroff = igb_suspend,
229 .restore = igb_resume,
230 #ifdef CONFIG_PM_RUNTIME
231 .runtime_suspend = igb_runtime_suspend,
232 .runtime_resume = igb_runtime_resume,
233 .runtime_idle = igb_runtime_idle,
235 #else /* Linux >= 2.6.34 */
236 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
237 #ifdef CONFIG_PM_RUNTIME
238 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
240 #endif /* CONFIG_PM_RUNTIME */
241 #endif /* Linux version */
244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
245 static int igb_resume(struct pci_dev *pdev);
246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
247 #endif /* CONFIG_PM */
248 #ifndef USE_REBOOT_NOTIFIER
249 static void igb_shutdown(struct pci_dev *);
251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
252 static struct notifier_block igb_notifier_reboot = {
253 .notifier_call = igb_notify_reboot,
259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
260 static struct notifier_block dca_notifier = {
261 .notifier_call = igb_notify_dca,
266 #ifdef CONFIG_NET_POLL_CONTROLLER
267 /* for netdump / net console */
268 static void igb_netpoll(struct net_device *);
272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
273 pci_channel_state_t);
274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
275 static void igb_io_resume(struct pci_dev *);
277 static struct pci_error_handlers igb_err_handler = {
278 .error_detected = igb_io_error_detected,
279 .slot_reset = igb_io_slot_reset,
280 .resume = igb_io_resume,
284 static void igb_init_fw(struct igb_adapter *adapter);
285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
287 static struct pci_driver igb_driver = {
288 .name = igb_driver_name,
289 .id_table = igb_pci_tbl,
291 .remove = __devexit_p(igb_remove),
293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
294 .driver.pm = &igb_pm_ops,
296 .suspend = igb_suspend,
297 .resume = igb_resume,
298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
299 #endif /* CONFIG_PM */
300 #ifndef USE_REBOOT_NOTIFIER
301 .shutdown = igb_shutdown,
304 .err_handler = &igb_err_handler
308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
310 //MODULE_LICENSE("GPL");
311 //MODULE_VERSION(DRV_VERSION);
313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
315 struct e1000_hw *hw = &adapter->hw;
316 struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
317 u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
318 u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
322 * if this is the management vlan the only option is to add it in so
323 * that the management pass through will continue to work
325 if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
326 (vid == mng_cookie->vlan_id))
329 vfta = adapter->shadow_vfta[index];
336 e1000_write_vfta(hw, index, vfta);
337 adapter->shadow_vfta[index] = vfta;
340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
341 //module_param(debug, int, 0);
342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
345 * igb_init_module - Driver Registration Routine
347 * igb_init_module is the first routine called when the driver is
348 * loaded. All it does is register with the PCI subsystem.
350 static int __init igb_init_module(void)
354 printk(KERN_INFO "%s - version %s\n",
355 igb_driver_string, igb_driver_version);
357 printk(KERN_INFO "%s\n", igb_copyright);
359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
362 if (igb_procfs_topdir_init())
363 printk(KERN_INFO "Procfs failed to initialize topdir\n");
364 #endif /* IGB_PROCFS */
365 #endif /* IGB_HWMON */
368 dca_register_notify(&dca_notifier);
370 ret = pci_register_driver(&igb_driver);
371 #ifdef USE_REBOOT_NOTIFIER
373 register_reboot_notifier(&igb_notifier_reboot);
380 #define module_init(x) static int x(void) __attribute__((__unused__));
381 module_init(igb_init_module);
384 * igb_exit_module - Driver Exit Cleanup Routine
386 * igb_exit_module is called just before the driver is removed
389 static void __exit igb_exit_module(void)
392 dca_unregister_notify(&dca_notifier);
394 #ifdef USE_REBOOT_NOTIFIER
395 unregister_reboot_notifier(&igb_notifier_reboot);
397 pci_unregister_driver(&igb_driver);
400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
403 igb_procfs_topdir_exit();
404 #endif /* IGB_PROCFS */
405 #endif /* IGB_HWMON */
409 #define module_exit(x) static void x(void) __attribute__((__unused__));
410 module_exit(igb_exit_module);
412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
414 * igb_cache_ring_register - Descriptor ring to register mapping
415 * @adapter: board private structure to initialize
417 * Once we know the feature-set enabled for the device, we'll cache
418 * the register offset the descriptor ring is assigned to.
420 static void igb_cache_ring_register(struct igb_adapter *adapter)
423 u32 rbase_offset = adapter->vfs_allocated_count;
425 switch (adapter->hw.mac.type) {
427 /* The queues are allocated for virtualization such that VF 0
428 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
429 * In order to avoid collision we start at the first free queue
430 * and continue consuming queues in the same sequence
432 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
433 for (; i < adapter->rss_queues; i++)
434 adapter->rx_ring[i]->reg_idx = rbase_offset +
444 for (; i < adapter->num_rx_queues; i++)
445 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
446 for (; j < adapter->num_tx_queues; j++)
447 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
452 static void igb_configure_lli(struct igb_adapter *adapter)
454 struct e1000_hw *hw = &adapter->hw;
457 /* LLI should only be enabled for MSI-X or MSI interrupts */
458 if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
461 if (adapter->lli_port) {
462 /* use filter 0 for port */
463 port = htons((u16)adapter->lli_port);
464 E1000_WRITE_REG(hw, E1000_IMIR(0),
465 (port | E1000_IMIR_PORT_IM_EN));
466 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
467 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
470 if (adapter->flags & IGB_FLAG_LLI_PUSH) {
471 /* use filter 1 for push flag */
472 E1000_WRITE_REG(hw, E1000_IMIR(1),
473 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
474 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
475 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
478 if (adapter->lli_size) {
479 /* use filter 2 for size */
480 E1000_WRITE_REG(hw, E1000_IMIR(2),
481 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
482 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
483 (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
489 * igb_write_ivar - configure ivar for given MSI-X vector
490 * @hw: pointer to the HW structure
491 * @msix_vector: vector number we are allocating to a given ring
492 * @index: row index of IVAR register to write within IVAR table
493 * @offset: column offset of in IVAR, should be multiple of 8
495 * This function is intended to handle the writing of the IVAR register
496 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
497 * each containing an cause allocation for an Rx and Tx ring, and a
498 * variable number of rows depending on the number of queues supported.
500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
501 int index, int offset)
503 u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
505 /* clear any bits that are currently set */
506 ivar &= ~((u32)0xFF << offset);
508 /* write vector and valid bit */
509 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
511 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
514 #define IGB_N0_QUEUE -1
515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
517 struct igb_adapter *adapter = q_vector->adapter;
518 struct e1000_hw *hw = &adapter->hw;
519 int rx_queue = IGB_N0_QUEUE;
520 int tx_queue = IGB_N0_QUEUE;
523 if (q_vector->rx.ring)
524 rx_queue = q_vector->rx.ring->reg_idx;
525 if (q_vector->tx.ring)
526 tx_queue = q_vector->tx.ring->reg_idx;
528 switch (hw->mac.type) {
530 /* The 82575 assigns vectors using a bitmask, which matches the
531 bitmask for the EICR/EIMS/EIMC registers. To assign one
532 or more queues to a vector, we write the appropriate bits
533 into the MSIXBM register for that vector. */
534 if (rx_queue > IGB_N0_QUEUE)
535 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
536 if (tx_queue > IGB_N0_QUEUE)
537 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
538 if (!adapter->msix_entries && msix_vector == 0)
539 msixbm |= E1000_EIMS_OTHER;
540 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
541 q_vector->eims_value = msixbm;
545 * 82576 uses a table that essentially consists of 2 columns
546 * with 8 rows. The ordering is column-major so we use the
547 * lower 3 bits as the row index, and the 4th bit as the
550 if (rx_queue > IGB_N0_QUEUE)
551 igb_write_ivar(hw, msix_vector,
553 (rx_queue & 0x8) << 1);
554 if (tx_queue > IGB_N0_QUEUE)
555 igb_write_ivar(hw, msix_vector,
557 ((tx_queue & 0x8) << 1) + 8);
558 q_vector->eims_value = 1 << msix_vector;
566 * On 82580 and newer adapters the scheme is similar to 82576
567 * however instead of ordering column-major we have things
568 * ordered row-major. So we traverse the table by using
569 * bit 0 as the column offset, and the remaining bits as the
572 if (rx_queue > IGB_N0_QUEUE)
573 igb_write_ivar(hw, msix_vector,
575 (rx_queue & 0x1) << 4);
576 if (tx_queue > IGB_N0_QUEUE)
577 igb_write_ivar(hw, msix_vector,
579 ((tx_queue & 0x1) << 4) + 8);
580 q_vector->eims_value = 1 << msix_vector;
587 /* add q_vector eims value to global eims_enable_mask */
588 adapter->eims_enable_mask |= q_vector->eims_value;
590 /* configure q_vector to set itr on first interrupt */
591 q_vector->set_itr = 1;
595 * igb_configure_msix - Configure MSI-X hardware
597 * igb_configure_msix sets up the hardware to properly
598 * generate MSI-X interrupts.
600 static void igb_configure_msix(struct igb_adapter *adapter)
604 struct e1000_hw *hw = &adapter->hw;
606 adapter->eims_enable_mask = 0;
608 /* set vector for other causes, i.e. link changes */
609 switch (hw->mac.type) {
611 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
612 /* enable MSI-X PBA support*/
613 tmp |= E1000_CTRL_EXT_PBA_CLR;
615 /* Auto-Mask interrupts upon ICR read. */
616 tmp |= E1000_CTRL_EXT_EIAME;
617 tmp |= E1000_CTRL_EXT_IRCA;
619 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
621 /* enable msix_other interrupt */
622 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
624 adapter->eims_other = E1000_EIMS_OTHER;
634 /* Turn on MSI-X capability first, or our settings
635 * won't stick. And it will take days to debug. */
636 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
637 E1000_GPIE_PBA | E1000_GPIE_EIAME |
640 /* enable msix_other interrupt */
641 adapter->eims_other = 1 << vector;
642 tmp = (vector++ | E1000_IVAR_VALID) << 8;
644 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
647 /* do nothing, since nothing else supports MSI-X */
649 } /* switch (hw->mac.type) */
651 adapter->eims_enable_mask |= adapter->eims_other;
653 for (i = 0; i < adapter->num_q_vectors; i++)
654 igb_assign_vector(adapter->q_vector[i], vector++);
656 E1000_WRITE_FLUSH(hw);
660 * igb_request_msix - Initialize MSI-X interrupts
662 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
665 static int igb_request_msix(struct igb_adapter *adapter)
667 struct net_device *netdev = adapter->netdev;
668 struct e1000_hw *hw = &adapter->hw;
669 int i, err = 0, vector = 0, free_vector = 0;
671 err = request_irq(adapter->msix_entries[vector].vector,
672 &igb_msix_other, 0, netdev->name, adapter);
676 for (i = 0; i < adapter->num_q_vectors; i++) {
677 struct igb_q_vector *q_vector = adapter->q_vector[i];
681 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
683 if (q_vector->rx.ring && q_vector->tx.ring)
684 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
685 q_vector->rx.ring->queue_index);
686 else if (q_vector->tx.ring)
687 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
688 q_vector->tx.ring->queue_index);
689 else if (q_vector->rx.ring)
690 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
691 q_vector->rx.ring->queue_index);
693 sprintf(q_vector->name, "%s-unused", netdev->name);
695 err = request_irq(adapter->msix_entries[vector].vector,
696 igb_msix_ring, 0, q_vector->name,
702 igb_configure_msix(adapter);
706 /* free already assigned IRQs */
707 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
710 for (i = 0; i < vector; i++) {
711 free_irq(adapter->msix_entries[free_vector++].vector,
712 adapter->q_vector[i]);
718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
720 if (adapter->msix_entries) {
721 pci_disable_msix(adapter->pdev);
722 kfree(adapter->msix_entries);
723 adapter->msix_entries = NULL;
724 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
725 pci_disable_msi(adapter->pdev);
730 * igb_free_q_vector - Free memory allocated for specific interrupt vector
731 * @adapter: board private structure to initialize
732 * @v_idx: Index of vector to be freed
734 * This function frees the memory allocated to the q_vector. In addition if
735 * NAPI is enabled it will delete any references to the NAPI struct prior
736 * to freeing the q_vector.
738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
740 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
742 if (q_vector->tx.ring)
743 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
745 if (q_vector->rx.ring)
746 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
748 adapter->q_vector[v_idx] = NULL;
749 netif_napi_del(&q_vector->napi);
751 __skb_queue_purge(&q_vector->lrolist.active);
757 * igb_free_q_vectors - Free memory allocated for interrupt vectors
758 * @adapter: board private structure to initialize
760 * This function frees the memory allocated to the q_vectors. In addition if
761 * NAPI is enabled it will delete any references to the NAPI struct prior
762 * to freeing the q_vector.
764 static void igb_free_q_vectors(struct igb_adapter *adapter)
766 int v_idx = adapter->num_q_vectors;
768 adapter->num_tx_queues = 0;
769 adapter->num_rx_queues = 0;
770 adapter->num_q_vectors = 0;
773 igb_free_q_vector(adapter, v_idx);
777 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
779 * This function resets the device so that it has 0 rx queues, tx queues, and
780 * MSI-X interrupts allocated.
782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
784 igb_free_q_vectors(adapter);
785 igb_reset_interrupt_capability(adapter);
789 * igb_process_mdd_event
790 * @adapter - board private structure
792 * Identify a malicious VF, disable the VF TX/RX queues and log a message.
794 static void igb_process_mdd_event(struct igb_adapter *adapter)
796 struct e1000_hw *hw = &adapter->hw;
797 u32 lvmmc, vfte, vfre, mdfb;
800 lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
801 vf_queue = lvmmc >> 29;
803 /* VF index cannot be bigger or equal to VFs allocated */
804 if (vf_queue >= adapter->vfs_allocated_count)
807 netdev_info(adapter->netdev,
808 "VF %d misbehaved. VF queues are disabled. "
809 "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
811 /* Disable VFTE and VFRE related bits */
812 vfte = E1000_READ_REG(hw, E1000_VFTE);
813 vfte &= ~(1 << vf_queue);
814 E1000_WRITE_REG(hw, E1000_VFTE, vfte);
816 vfre = E1000_READ_REG(hw, E1000_VFRE);
817 vfre &= ~(1 << vf_queue);
818 E1000_WRITE_REG(hw, E1000_VFRE, vfre);
820 /* Disable MDFB related bit. Clear on write */
821 mdfb = E1000_READ_REG(hw, E1000_MDFB);
822 mdfb |= (1 << vf_queue);
823 E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
825 /* Reset the specific VF */
826 E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
831 * @adapter - board private structure
833 * Disable MDD behavior in the HW
835 static void igb_disable_mdd(struct igb_adapter *adapter)
837 struct e1000_hw *hw = &adapter->hw;
840 if ((hw->mac.type != e1000_i350) ||
841 (hw->mac.type != e1000_i354))
844 reg = E1000_READ_REG(hw, E1000_DTXCTL);
845 reg &= (~E1000_DTXCTL_MDP_EN);
846 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
851 * @adapter - board private structure
853 * Enable the HW to detect malicious driver and sends an interrupt to
856 static void igb_enable_mdd(struct igb_adapter *adapter)
858 struct e1000_hw *hw = &adapter->hw;
861 /* Only available on i350 device */
862 if (hw->mac.type != e1000_i350)
865 reg = E1000_READ_REG(hw, E1000_DTXCTL);
866 reg |= E1000_DTXCTL_MDP_EN;
867 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
871 * igb_reset_sriov_capability - disable SR-IOV if enabled
873 * Attempt to disable single root IO virtualization capabilites present in the
876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
878 struct pci_dev *pdev = adapter->pdev;
879 struct e1000_hw *hw = &adapter->hw;
881 /* reclaim resources allocated to VFs */
882 if (adapter->vf_data) {
883 if (!pci_vfs_assigned(pdev)) {
885 * disable iov and allow time for transactions to
888 pci_disable_sriov(pdev);
891 dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
893 dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
894 "VF(s) are assigned to guests!\n");
896 /* Disable Malicious Driver Detection */
897 igb_disable_mdd(adapter);
899 /* free vf data storage */
900 kfree(adapter->vf_data);
901 adapter->vf_data = NULL;
903 /* switch rings back to PF ownership */
904 E1000_WRITE_REG(hw, E1000_IOVCTL,
905 E1000_IOVCTL_REUSE_VFQ);
906 E1000_WRITE_FLUSH(hw);
910 adapter->vfs_allocated_count = 0;
914 * igb_set_sriov_capability - setup SR-IOV if supported
916 * Attempt to enable single root IO virtualization capabilites present in the
919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
921 struct pci_dev *pdev = adapter->pdev;
925 old_vfs = pci_num_vf(pdev);
927 dev_info(pci_dev_to_dev(pdev),
928 "%d pre-allocated VFs found - override "
929 "max_vfs setting of %d\n", old_vfs,
930 adapter->vfs_allocated_count);
931 adapter->vfs_allocated_count = old_vfs;
933 /* no VFs requested, do nothing */
934 if (!adapter->vfs_allocated_count)
937 /* allocate vf data storage */
938 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
939 sizeof(struct vf_data_storage),
942 if (adapter->vf_data) {
944 if (pci_enable_sriov(pdev,
945 adapter->vfs_allocated_count))
948 for (i = 0; i < adapter->vfs_allocated_count; i++)
949 igb_vf_configure(adapter, i);
951 switch (adapter->hw.mac.type) {
954 /* Enable VM to VM loopback by default */
955 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
958 /* Currently no other hardware supports loopback */
962 /* DMA Coalescing is not supported in IOV mode. */
963 if (adapter->hw.mac.type >= e1000_i350)
964 adapter->dmac = IGB_DMAC_DISABLE;
965 if (adapter->hw.mac.type < e1000_i350)
966 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
972 kfree(adapter->vf_data);
973 adapter->vf_data = NULL;
974 adapter->vfs_allocated_count = 0;
975 dev_warn(pci_dev_to_dev(pdev),
976 "Failed to initialize SR-IOV virtualization\n");
980 * igb_set_interrupt_capability - set MSI or MSI-X if supported
982 * Attempt to configure interrupts using the best available
983 * capabilities of the hardware and kernel.
985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
987 struct pci_dev *pdev = adapter->pdev;
992 adapter->int_mode = IGB_INT_MODE_MSI;
994 /* Number of supported queues. */
995 adapter->num_rx_queues = adapter->rss_queues;
997 if (adapter->vmdq_pools > 1)
998 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1001 if (adapter->vmdq_pools)
1002 adapter->num_tx_queues = adapter->vmdq_pools;
1004 adapter->num_tx_queues = adapter->num_rx_queues;
1006 adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1009 switch (adapter->int_mode) {
1010 case IGB_INT_MODE_MSIX:
1011 /* start with one vector for every rx queue */
1012 numvecs = adapter->num_rx_queues;
1014 /* if tx handler is separate add 1 for every tx queue */
1015 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016 numvecs += adapter->num_tx_queues;
1018 /* store the number of vectors reserved for queues */
1019 adapter->num_q_vectors = numvecs;
1021 /* add 1 vector for link status interrupts */
1023 adapter->msix_entries = kcalloc(numvecs,
1024 sizeof(struct msix_entry),
1026 if (adapter->msix_entries) {
1027 for (i = 0; i < numvecs; i++)
1028 adapter->msix_entries[i].entry = i;
1030 err = pci_enable_msix(pdev,
1031 adapter->msix_entries, numvecs);
1035 /* MSI-X failed, so fall through and try MSI */
1036 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037 "Falling back to MSI interrupts.\n");
1038 igb_reset_interrupt_capability(adapter);
1039 case IGB_INT_MODE_MSI:
1040 if (!pci_enable_msi(pdev))
1041 adapter->flags |= IGB_FLAG_HAS_MSI;
1043 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044 "interrupts. Falling back to legacy "
1047 case IGB_INT_MODE_LEGACY:
1048 /* disable advanced features and set number of queues to 1 */
1049 igb_reset_sriov_capability(adapter);
1050 adapter->vmdq_pools = 0;
1051 adapter->rss_queues = 1;
1052 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053 adapter->num_rx_queues = 1;
1054 adapter->num_tx_queues = 1;
1055 adapter->num_q_vectors = 1;
1056 /* Don't do anything; this is system default */
1061 static void igb_add_ring(struct igb_ring *ring,
1062 struct igb_ring_container *head)
1069 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070 * @adapter: board private structure to initialize
1071 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072 * @v_idx: index of vector in adapter struct
1073 * @txr_count: total number of Tx rings to allocate
1074 * @txr_idx: index of first Tx ring to allocate
1075 * @rxr_count: total number of Rx rings to allocate
1076 * @rxr_idx: index of first Rx ring to allocate
1078 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081 unsigned int v_count, unsigned int v_idx,
1082 unsigned int txr_count, unsigned int txr_idx,
1083 unsigned int rxr_count, unsigned int rxr_idx)
1085 struct igb_q_vector *q_vector;
1086 struct igb_ring *ring;
1087 int ring_count, size;
1089 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090 if (txr_count > 1 || rxr_count > 1)
1093 ring_count = txr_count + rxr_count;
1094 size = sizeof(struct igb_q_vector) +
1095 (sizeof(struct igb_ring) * ring_count);
1097 /* allocate q_vector and rings */
1098 q_vector = kzalloc(size, GFP_KERNEL);
1103 /* initialize LRO */
1104 __skb_queue_head_init(&q_vector->lrolist.active);
1107 /* initialize NAPI */
1108 netif_napi_add(adapter->netdev, &q_vector->napi,
1111 /* tie q_vector and adapter together */
1112 adapter->q_vector[v_idx] = q_vector;
1113 q_vector->adapter = adapter;
1115 /* initialize work limits */
1116 q_vector->tx.work_limit = adapter->tx_work_limit;
1118 /* initialize ITR configuration */
1119 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120 q_vector->itr_val = IGB_START_ITR;
1122 /* initialize pointer to rings */
1123 ring = q_vector->ring;
1127 /* rx or rx/tx vector */
1128 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129 q_vector->itr_val = adapter->rx_itr_setting;
1131 /* tx only vector */
1132 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133 q_vector->itr_val = adapter->tx_itr_setting;
1137 /* assign generic ring traits */
1138 ring->dev = &adapter->pdev->dev;
1139 ring->netdev = adapter->netdev;
1141 /* configure backlink on ring */
1142 ring->q_vector = q_vector;
1144 /* update q_vector Tx values */
1145 igb_add_ring(ring, &q_vector->tx);
1147 /* For 82575, context index must be unique per ring. */
1148 if (adapter->hw.mac.type == e1000_82575)
1149 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1151 /* apply Tx specific ring traits */
1152 ring->count = adapter->tx_ring_count;
1153 ring->queue_index = txr_idx;
1155 /* assign ring to adapter */
1156 adapter->tx_ring[txr_idx] = ring;
1158 /* push pointer to next ring */
1163 /* assign generic ring traits */
1164 ring->dev = &adapter->pdev->dev;
1165 ring->netdev = adapter->netdev;
1167 /* configure backlink on ring */
1168 ring->q_vector = q_vector;
1170 /* update q_vector Rx values */
1171 igb_add_ring(ring, &q_vector->rx);
1173 #ifndef HAVE_NDO_SET_FEATURES
1174 /* enable rx checksum */
1175 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1178 /* set flag indicating ring supports SCTP checksum offload */
1179 if (adapter->hw.mac.type >= e1000_82576)
1180 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1182 if ((adapter->hw.mac.type == e1000_i350) ||
1183 (adapter->hw.mac.type == e1000_i354))
1184 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1186 /* apply Rx specific ring traits */
1187 ring->count = adapter->rx_ring_count;
1188 ring->queue_index = rxr_idx;
1190 /* assign ring to adapter */
1191 adapter->rx_ring[rxr_idx] = ring;
1198 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199 * @adapter: board private structure to initialize
1201 * We allocate one q_vector per queue interrupt. If allocation fails we
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1206 int q_vectors = adapter->num_q_vectors;
1207 int rxr_remaining = adapter->num_rx_queues;
1208 int txr_remaining = adapter->num_tx_queues;
1209 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1212 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213 for (; rxr_remaining; v_idx++) {
1214 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1220 /* update counts and index */
1226 for (; v_idx < q_vectors; v_idx++) {
1227 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230 tqpv, txr_idx, rqpv, rxr_idx);
1235 /* update counts and index */
1236 rxr_remaining -= rqpv;
1237 txr_remaining -= tqpv;
1245 adapter->num_tx_queues = 0;
1246 adapter->num_rx_queues = 0;
1247 adapter->num_q_vectors = 0;
1250 igb_free_q_vector(adapter, v_idx);
1256 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1258 * This function initializes the interrupts and allocates all of the queues.
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1262 struct pci_dev *pdev = adapter->pdev;
1265 igb_set_interrupt_capability(adapter, msix);
1267 err = igb_alloc_q_vectors(adapter);
1269 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270 goto err_alloc_q_vectors;
1273 igb_cache_ring_register(adapter);
1277 err_alloc_q_vectors:
1278 igb_reset_interrupt_capability(adapter);
1283 * igb_request_irq - initialize interrupts
1285 * Attempts to configure interrupts using the best available
1286 * capabilities of the hardware and kernel.
1288 static int igb_request_irq(struct igb_adapter *adapter)
1290 struct net_device *netdev = adapter->netdev;
1291 struct pci_dev *pdev = adapter->pdev;
1294 if (adapter->msix_entries) {
1295 err = igb_request_msix(adapter);
1298 /* fall back to MSI */
1299 igb_free_all_tx_resources(adapter);
1300 igb_free_all_rx_resources(adapter);
1302 igb_clear_interrupt_scheme(adapter);
1303 igb_reset_sriov_capability(adapter);
1304 err = igb_init_interrupt_scheme(adapter, false);
1307 igb_setup_all_tx_resources(adapter);
1308 igb_setup_all_rx_resources(adapter);
1309 igb_configure(adapter);
1312 igb_assign_vector(adapter->q_vector[0], 0);
1314 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316 netdev->name, adapter);
1320 /* fall back to legacy interrupts */
1321 igb_reset_interrupt_capability(adapter);
1322 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1325 err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326 netdev->name, adapter);
1329 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1336 static void igb_free_irq(struct igb_adapter *adapter)
1338 if (adapter->msix_entries) {
1341 free_irq(adapter->msix_entries[vector++].vector, adapter);
1343 for (i = 0; i < adapter->num_q_vectors; i++)
1344 free_irq(adapter->msix_entries[vector++].vector,
1345 adapter->q_vector[i]);
1347 free_irq(adapter->pdev->irq, adapter);
1352 * igb_irq_disable - Mask off interrupt generation on the NIC
1353 * @adapter: board private structure
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1357 struct e1000_hw *hw = &adapter->hw;
1360 * we need to be careful when disabling interrupts. The VFs are also
1361 * mapped into these registers and so clearing the bits can cause
1362 * issues on the VF drivers so we only need to clear what we set
1364 if (adapter->msix_entries) {
1365 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368 regval = E1000_READ_REG(hw, E1000_EIAC);
1369 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1372 E1000_WRITE_REG(hw, E1000_IAM, 0);
1373 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374 E1000_WRITE_FLUSH(hw);
1376 if (adapter->msix_entries) {
1379 synchronize_irq(adapter->msix_entries[vector++].vector);
1381 for (i = 0; i < adapter->num_q_vectors; i++)
1382 synchronize_irq(adapter->msix_entries[vector++].vector);
1384 synchronize_irq(adapter->pdev->irq);
1389 * igb_irq_enable - Enable default interrupt generation settings
1390 * @adapter: board private structure
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1394 struct e1000_hw *hw = &adapter->hw;
1396 if (adapter->msix_entries) {
1397 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400 regval = E1000_READ_REG(hw, E1000_EIAM);
1401 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403 if (adapter->vfs_allocated_count) {
1404 E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405 ims |= E1000_IMS_VMMB;
1407 if ((adapter->hw.mac.type == e1000_i350) ||
1408 (adapter->hw.mac.type == e1000_i354))
1409 ims |= E1000_IMS_MDDET;
1411 E1000_WRITE_REG(hw, E1000_IMS, ims);
1413 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1415 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1422 struct e1000_hw *hw = &adapter->hw;
1423 u16 vid = adapter->hw.mng_cookie.vlan_id;
1424 u16 old_vid = adapter->mng_vlan_id;
1426 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427 /* add VID to filter table */
1428 igb_vfta_set(adapter, vid, TRUE);
1429 adapter->mng_vlan_id = vid;
1431 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1434 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1439 !test_bit(old_vid, adapter->active_vlans)) {
1441 /* remove VID from filter table */
1442 igb_vfta_set(adapter, old_vid, FALSE);
1447 * igb_release_hw_control - release control of the h/w to f/w
1448 * @adapter: address of board private structure
1450 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451 * For ASF and Pass Through versions of f/w this means that the
1452 * driver is no longer loaded.
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1457 struct e1000_hw *hw = &adapter->hw;
1460 /* Let firmware take over control of h/w */
1461 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1467 * igb_get_hw_control - get control of the h/w from f/w
1468 * @adapter: address of board private structure
1470 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471 * For ASF and Pass Through versions of f/w this means that
1472 * the driver is loaded.
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1477 struct e1000_hw *hw = &adapter->hw;
1480 /* Let firmware know the driver has taken over */
1481 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1487 * igb_configure - configure the hardware for RX and TX
1488 * @adapter: private board structure
1490 static void igb_configure(struct igb_adapter *adapter)
1492 struct net_device *netdev = adapter->netdev;
1495 igb_get_hw_control(adapter);
1496 igb_set_rx_mode(netdev);
1498 igb_restore_vlan(adapter);
1500 igb_setup_tctl(adapter);
1501 igb_setup_mrqc(adapter);
1502 igb_setup_rctl(adapter);
1504 igb_configure_tx(adapter);
1505 igb_configure_rx(adapter);
1507 e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509 if (adapter->num_tx_queues > 1)
1510 netdev->features |= NETIF_F_MULTI_QUEUE;
1512 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1515 /* call igb_desc_unused which always leaves
1516 * at least 1 descriptor unused to make sure
1517 * next_to_use != next_to_clean */
1518 for (i = 0; i < adapter->num_rx_queues; i++) {
1519 struct igb_ring *ring = adapter->rx_ring[i];
1520 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1525 * igb_power_up_link - Power up the phy/serdes link
1526 * @adapter: address of board private structure
1528 void igb_power_up_link(struct igb_adapter *adapter)
1530 e1000_phy_hw_reset(&adapter->hw);
1532 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533 e1000_power_up_phy(&adapter->hw);
1535 e1000_power_up_fiber_serdes_link(&adapter->hw);
1539 * igb_power_down_link - Power down the phy/serdes link
1540 * @adapter: address of board private structure
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1544 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545 e1000_power_down_phy(&adapter->hw);
1547 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1553 struct e1000_hw *hw = &adapter->hw;
1554 u32 ctrl_ext, connsw;
1555 bool swap_now = false;
1558 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560 link = igb_has_link(adapter);
1562 /* need to live swap if current media is copper and we have fiber/serdes
1566 if ((hw->phy.media_type == e1000_media_type_copper) &&
1567 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1569 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1570 /* copper signal takes time to appear */
1571 if (adapter->copper_tries < 2) {
1572 adapter->copper_tries++;
1573 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1574 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1577 adapter->copper_tries = 0;
1578 if ((connsw & E1000_CONNSW_PHYSD) &&
1579 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1581 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1582 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1588 switch (hw->phy.media_type) {
1589 case e1000_media_type_copper:
1590 dev_info(pci_dev_to_dev(adapter->pdev),
1591 "%s:MAS: changing media to fiber/serdes\n",
1592 adapter->netdev->name);
1594 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1595 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1596 adapter->copper_tries = 0;
1598 case e1000_media_type_internal_serdes:
1599 case e1000_media_type_fiber:
1600 dev_info(pci_dev_to_dev(adapter->pdev),
1601 "%s:MAS: changing media to copper\n",
1602 adapter->netdev->name);
1604 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1605 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1608 /* shouldn't get here during regular operation */
1609 dev_err(pci_dev_to_dev(adapter->pdev),
1610 "%s:AMS: Invalid media type found, returning\n",
1611 adapter->netdev->name);
1614 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1618 #ifdef HAVE_I2C_SUPPORT
1619 /* igb_get_i2c_data - Reads the I2C SDA data bit
1620 * @hw: pointer to hardware structure
1621 * @i2cctl: Current value of I2CCTL register
1623 * Returns the I2C data bit value
1625 static int igb_get_i2c_data(void *data)
1627 struct igb_adapter *adapter = (struct igb_adapter *)data;
1628 struct e1000_hw *hw = &adapter->hw;
1629 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1631 return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1634 /* igb_set_i2c_data - Sets the I2C data bit
1635 * @data: pointer to hardware structure
1636 * @state: I2C data value (0 or 1) to set
1638 * Sets the I2C data bit
1640 static void igb_set_i2c_data(void *data, int state)
1642 struct igb_adapter *adapter = (struct igb_adapter *)data;
1643 struct e1000_hw *hw = &adapter->hw;
1644 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1647 i2cctl |= E1000_I2C_DATA_OUT;
1649 i2cctl &= ~E1000_I2C_DATA_OUT;
1651 i2cctl &= ~E1000_I2C_DATA_OE_N;
1652 i2cctl |= E1000_I2C_CLK_OE_N;
1654 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1655 E1000_WRITE_FLUSH(hw);
1659 /* igb_set_i2c_clk - Sets the I2C SCL clock
1660 * @data: pointer to hardware structure
1661 * @state: state to set clock
1663 * Sets the I2C clock line to state
1665 static void igb_set_i2c_clk(void *data, int state)
1667 struct igb_adapter *adapter = (struct igb_adapter *)data;
1668 struct e1000_hw *hw = &adapter->hw;
1669 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1672 i2cctl |= E1000_I2C_CLK_OUT;
1673 i2cctl &= ~E1000_I2C_CLK_OE_N;
1675 i2cctl &= ~E1000_I2C_CLK_OUT;
1676 i2cctl &= ~E1000_I2C_CLK_OE_N;
1678 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1679 E1000_WRITE_FLUSH(hw);
1682 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1683 * @data: pointer to hardware structure
1685 * Gets the I2C clock state
1687 static int igb_get_i2c_clk(void *data)
1689 struct igb_adapter *adapter = (struct igb_adapter *)data;
1690 struct e1000_hw *hw = &adapter->hw;
1691 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1693 return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1696 static const struct i2c_algo_bit_data igb_i2c_algo = {
1697 .setsda = igb_set_i2c_data,
1698 .setscl = igb_set_i2c_clk,
1699 .getsda = igb_get_i2c_data,
1700 .getscl = igb_get_i2c_clk,
1705 /* igb_init_i2c - Init I2C interface
1706 * @adapter: pointer to adapter structure
1709 static s32 igb_init_i2c(struct igb_adapter *adapter)
1711 s32 status = E1000_SUCCESS;
1713 /* I2C interface supported on i350 devices */
1714 if (adapter->hw.mac.type != e1000_i350)
1715 return E1000_SUCCESS;
1717 /* Initialize the i2c bus which is controlled by the registers.
1718 * This bus will use the i2c_algo_bit structue that implements
1719 * the protocol through toggling of the 4 bits in the register.
1721 adapter->i2c_adap.owner = THIS_MODULE;
1722 adapter->i2c_algo = igb_i2c_algo;
1723 adapter->i2c_algo.data = adapter;
1724 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1725 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1726 strlcpy(adapter->i2c_adap.name, "igb BB",
1727 sizeof(adapter->i2c_adap.name));
1728 status = i2c_bit_add_bus(&adapter->i2c_adap);
1732 #endif /* HAVE_I2C_SUPPORT */
1734 * igb_up - Open the interface and prepare it to handle traffic
1735 * @adapter: board private structure
1737 int igb_up(struct igb_adapter *adapter)
1739 struct e1000_hw *hw = &adapter->hw;
1742 /* hardware has been reset, we need to reload some things */
1743 igb_configure(adapter);
1745 clear_bit(__IGB_DOWN, &adapter->state);
1747 for (i = 0; i < adapter->num_q_vectors; i++)
1748 napi_enable(&(adapter->q_vector[i]->napi));
1750 if (adapter->msix_entries)
1751 igb_configure_msix(adapter);
1753 igb_assign_vector(adapter->q_vector[0], 0);
1755 igb_configure_lli(adapter);
1757 /* Clear any pending interrupts. */
1758 E1000_READ_REG(hw, E1000_ICR);
1759 igb_irq_enable(adapter);
1761 /* notify VFs that reset has been completed */
1762 if (adapter->vfs_allocated_count) {
1763 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1764 reg_data |= E1000_CTRL_EXT_PFRSTD;
1765 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1768 netif_tx_start_all_queues(adapter->netdev);
1770 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1771 schedule_work(&adapter->dma_err_task);
1772 /* start the watchdog. */
1773 hw->mac.get_link_status = 1;
1774 schedule_work(&adapter->watchdog_task);
1776 if ((adapter->flags & IGB_FLAG_EEE) &&
1777 (!hw->dev_spec._82575.eee_disable))
1778 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1783 void igb_down(struct igb_adapter *adapter)
1785 struct net_device *netdev = adapter->netdev;
1786 struct e1000_hw *hw = &adapter->hw;
1790 /* signal that we're down so the interrupt handler does not
1791 * reschedule our watchdog timer */
1792 set_bit(__IGB_DOWN, &adapter->state);
1794 /* disable receives in the hardware */
1795 rctl = E1000_READ_REG(hw, E1000_RCTL);
1796 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797 /* flush and sleep below */
1799 netif_tx_stop_all_queues(netdev);
1801 /* disable transmits in the hardware */
1802 tctl = E1000_READ_REG(hw, E1000_TCTL);
1803 tctl &= ~E1000_TCTL_EN;
1804 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1805 /* flush both disables and wait for them to finish */
1806 E1000_WRITE_FLUSH(hw);
1807 usleep_range(10000, 20000);
1809 for (i = 0; i < adapter->num_q_vectors; i++)
1810 napi_disable(&(adapter->q_vector[i]->napi));
1812 igb_irq_disable(adapter);
1814 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1816 del_timer_sync(&adapter->watchdog_timer);
1817 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1818 del_timer_sync(&adapter->dma_err_timer);
1819 del_timer_sync(&adapter->phy_info_timer);
1821 netif_carrier_off(netdev);
1823 /* record the stats before reset*/
1824 igb_update_stats(adapter);
1826 adapter->link_speed = 0;
1827 adapter->link_duplex = 0;
1830 if (!pci_channel_offline(adapter->pdev))
1835 igb_clean_all_tx_rings(adapter);
1836 igb_clean_all_rx_rings(adapter);
1838 /* since we reset the hardware DCA settings were cleared */
1839 igb_setup_dca(adapter);
1843 void igb_reinit_locked(struct igb_adapter *adapter)
1845 WARN_ON(in_interrupt());
1846 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1847 usleep_range(1000, 2000);
1850 clear_bit(__IGB_RESETTING, &adapter->state);
1854 * igb_enable_mas - Media Autosense re-enable after swap
1856 * @adapter: adapter struct
1858 static s32 igb_enable_mas(struct igb_adapter *adapter)
1860 struct e1000_hw *hw = &adapter->hw;
1862 s32 ret_val = E1000_SUCCESS;
1864 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1865 if (hw->phy.media_type == e1000_media_type_copper) {
1866 /* configure for SerDes media detect */
1867 if (!(connsw & E1000_CONNSW_SERDESD)) {
1868 connsw |= E1000_CONNSW_ENRGSRC;
1869 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1870 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1871 E1000_WRITE_FLUSH(hw);
1872 } else if (connsw & E1000_CONNSW_SERDESD) {
1873 /* already SerDes, no need to enable anything */
1876 dev_info(pci_dev_to_dev(adapter->pdev),
1877 "%s:MAS: Unable to configure feature, disabling..\n",
1878 adapter->netdev->name);
1879 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1885 void igb_reset(struct igb_adapter *adapter)
1887 struct pci_dev *pdev = adapter->pdev;
1888 struct e1000_hw *hw = &adapter->hw;
1889 struct e1000_mac_info *mac = &hw->mac;
1890 struct e1000_fc_info *fc = &hw->fc;
1891 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1893 /* Repartition Pba for greater than 9k mtu
1894 * To take effect CTRL.RST is required.
1896 switch (mac->type) {
1900 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901 pba = e1000_rxpbs_adjust_82580(pba);
1904 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905 pba &= E1000_RXPBS_SIZE_MASK_82576;
1911 pba = E1000_PBA_34K;
1915 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1916 (mac->type < e1000_82576)) {
1917 /* adjust PBA for jumbo frames */
1918 E1000_WRITE_REG(hw, E1000_PBA, pba);
1920 /* To maintain wire speed transmits, the Tx FIFO should be
1921 * large enough to accommodate two full transmit packets,
1922 * rounded up to the next 1KB and expressed in KB. Likewise,
1923 * the Rx FIFO should be large enough to accommodate at least
1924 * one full receive packet and is similarly rounded up and
1925 * expressed in KB. */
1926 pba = E1000_READ_REG(hw, E1000_PBA);
1927 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928 tx_space = pba >> 16;
1929 /* lower 16 bits has Rx packet buffer allocation size in KB */
1931 /* the tx fifo also stores 16 bytes of information about the tx
1932 * but don't include ethernet FCS because hardware appends it */
1933 min_tx_space = (adapter->max_frame_size +
1934 sizeof(union e1000_adv_tx_desc) -
1936 min_tx_space = ALIGN(min_tx_space, 1024);
1937 min_tx_space >>= 10;
1938 /* software strips receive CRC, so leave room for it */
1939 min_rx_space = adapter->max_frame_size;
1940 min_rx_space = ALIGN(min_rx_space, 1024);
1941 min_rx_space >>= 10;
1943 /* If current Tx allocation is less than the min Tx FIFO size,
1944 * and the min Tx FIFO size is less than the current Rx FIFO
1945 * allocation, take space away from current Rx allocation */
1946 if (tx_space < min_tx_space &&
1947 ((min_tx_space - tx_space) < pba)) {
1948 pba = pba - (min_tx_space - tx_space);
1950 /* if short on rx space, rx wins and must trump tx
1952 if (pba < min_rx_space)
1955 E1000_WRITE_REG(hw, E1000_PBA, pba);
1958 /* flow control settings */
1959 /* The high water mark must be low enough to fit one full frame
1960 * (or the size used for early receive) above it in the Rx FIFO.
1961 * Set it to the lower of:
1962 * - 90% of the Rx FIFO size, or
1963 * - the full Rx FIFO size minus one full frame */
1964 hwm = min(((pba << 10) * 9 / 10),
1965 ((pba << 10) - 2 * adapter->max_frame_size));
1967 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1968 fc->low_water = fc->high_water - 16;
1969 fc->pause_time = 0xFFFF;
1971 fc->current_mode = fc->requested_mode;
1973 /* disable receive for all VFs and wait one second */
1974 if (adapter->vfs_allocated_count) {
1977 * Clear all flags except indication that the PF has set
1978 * the VF MAC addresses administratively
1980 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1983 /* ping all the active vfs to let them know we are going down */
1984 igb_ping_all_vfs(adapter);
1986 /* disable transmits and receives */
1987 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1988 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1991 /* Allow time for pending master requests to run */
1993 E1000_WRITE_REG(hw, E1000_WUC, 0);
1995 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996 e1000_setup_init_funcs(hw, TRUE);
1997 igb_check_options(adapter);
1998 e1000_get_bus_info(hw);
1999 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2001 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2002 if (igb_enable_mas(adapter))
2003 dev_err(pci_dev_to_dev(pdev),
2004 "Error enabling Media Auto Sense\n");
2006 if (e1000_init_hw(hw))
2007 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2010 * Flow control settings reset on hardware reset, so guarantee flow
2011 * control is off when forcing speed.
2013 if (!hw->mac.autoneg)
2014 e1000_force_mac_fc(hw);
2016 igb_init_dmac(adapter, pba);
2017 /* Re-initialize the thermal sensor on i350 devices. */
2018 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2020 * If present, re-initialize the external thermal sensor
2024 e1000_set_i2c_bb(hw);
2025 e1000_init_thermal_sensor_thresh(hw);
2028 /*Re-establish EEE setting */
2029 if (hw->phy.media_type == e1000_media_type_copper) {
2030 switch (mac->type) {
2034 e1000_set_eee_i350(hw);
2037 e1000_set_eee_i354(hw);
2044 if (!netif_running(adapter->netdev))
2045 igb_power_down_link(adapter);
2047 igb_update_mng_vlan(adapter);
2049 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050 E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2053 #ifdef HAVE_PTP_1588_CLOCK
2054 /* Re-enable PTP, where applicable. */
2055 igb_ptp_reset(adapter);
2056 #endif /* HAVE_PTP_1588_CLOCK */
2058 e1000_get_phy_info(hw);
2063 #ifdef HAVE_NDO_SET_FEATURES
2064 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2065 kni_netdev_features_t features)
2068 * Since there is no support for separate tx vlan accel
2069 * enabled make sure tx flag is cleared if rx is.
2071 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2072 if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2073 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2075 if (!(features & NETIF_F_HW_VLAN_RX))
2076 features &= ~NETIF_F_HW_VLAN_TX;
2079 /* If Rx checksum is disabled, then LRO should also be disabled */
2080 if (!(features & NETIF_F_RXCSUM))
2081 features &= ~NETIF_F_LRO;
2086 static int igb_set_features(struct net_device *netdev,
2087 kni_netdev_features_t features)
2089 u32 changed = netdev->features ^ features;
2091 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2092 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2094 if (changed & NETIF_F_HW_VLAN_RX)
2096 igb_vlan_mode(netdev, features);
2102 #ifdef USE_CONST_DEV_UC_CHAR
2103 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2104 struct net_device *dev,
2105 const unsigned char *addr,
2106 #ifdef HAVE_NDO_FDB_ADD_VID
2111 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2112 struct net_device *dev,
2113 unsigned char *addr,
2117 struct igb_adapter *adapter = netdev_priv(dev);
2118 struct e1000_hw *hw = &adapter->hw;
2121 if (!(adapter->vfs_allocated_count))
2124 /* Hardware does not support aging addresses so if a
2125 * ndm_state is given only allow permanent addresses
2127 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2128 pr_info("%s: FDB only supports static addresses\n",
2133 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2134 u32 rar_uc_entries = hw->mac.rar_entry_count -
2135 (adapter->vfs_allocated_count + 1);
2137 if (netdev_uc_count(dev) < rar_uc_entries)
2138 err = dev_uc_add_excl(dev, addr);
2141 } else if (is_multicast_ether_addr(addr)) {
2142 err = dev_mc_add_excl(dev, addr);
2147 /* Only return duplicate errors if NLM_F_EXCL is set */
2148 if (err == -EEXIST && !(flags & NLM_F_EXCL))
2154 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2155 #ifdef USE_CONST_DEV_UC_CHAR
2156 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2157 struct net_device *dev,
2158 const unsigned char *addr)
2160 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2161 struct net_device *dev,
2162 unsigned char *addr)
2165 struct igb_adapter *adapter = netdev_priv(dev);
2166 int err = -EOPNOTSUPP;
2168 if (ndm->ndm_state & NUD_PERMANENT) {
2169 pr_info("%s: FDB only supports static addresses\n",
2174 if (adapter->vfs_allocated_count) {
2175 if (is_unicast_ether_addr(addr))
2176 err = dev_uc_del(dev, addr);
2177 else if (is_multicast_ether_addr(addr))
2178 err = dev_mc_del(dev, addr);
2186 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2187 struct netlink_callback *cb,
2188 struct net_device *dev,
2191 struct igb_adapter *adapter = netdev_priv(dev);
2193 if (adapter->vfs_allocated_count)
2194 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2198 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2200 #ifdef HAVE_BRIDGE_ATTRIBS
2201 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2202 static int igb_ndo_bridge_setlink(struct net_device *dev,
2203 struct nlmsghdr *nlh,
2206 static int igb_ndo_bridge_setlink(struct net_device *dev,
2207 struct nlmsghdr *nlh)
2208 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2210 struct igb_adapter *adapter = netdev_priv(dev);
2211 struct e1000_hw *hw = &adapter->hw;
2212 struct nlattr *attr, *br_spec;
2215 if (!(adapter->vfs_allocated_count))
2218 switch (adapter->hw.mac.type) {
2227 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2229 nla_for_each_nested(attr, br_spec, rem) {
2232 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2235 mode = nla_get_u16(attr);
2236 if (mode == BRIDGE_MODE_VEPA) {
2237 e1000_vmdq_set_loopback_pf(hw, 0);
2238 adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2239 } else if (mode == BRIDGE_MODE_VEB) {
2240 e1000_vmdq_set_loopback_pf(hw, 1);
2241 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2245 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2246 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2252 #ifdef HAVE_BRIDGE_FILTER
2253 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2254 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2255 struct net_device *dev, u32 filter_mask,
2258 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2259 struct net_device *dev, u32 filter_mask)
2260 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2262 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2263 struct net_device *dev)
2266 struct igb_adapter *adapter = netdev_priv(dev);
2269 if (!(adapter->vfs_allocated_count))
2272 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2273 mode = BRIDGE_MODE_VEB;
2275 mode = BRIDGE_MODE_VEPA;
2277 #ifdef HAVE_NDO_FDB_ADD_VID
2278 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2279 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2280 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2281 nlflags, filter_mask, NULL);
2283 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2284 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2286 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2287 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2289 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2290 #endif /* HAVE_NDO_FDB_ADD_VID */
2292 #endif /* HAVE_BRIDGE_ATTRIBS */
2293 #endif /* NTF_SELF */
2295 #endif /* HAVE_NDO_SET_FEATURES */
2296 #ifdef HAVE_NET_DEVICE_OPS
2297 static const struct net_device_ops igb_netdev_ops = {
2298 .ndo_open = igb_open,
2299 .ndo_stop = igb_close,
2300 .ndo_start_xmit = igb_xmit_frame,
2301 .ndo_get_stats = igb_get_stats,
2302 .ndo_set_rx_mode = igb_set_rx_mode,
2303 .ndo_set_mac_address = igb_set_mac,
2304 .ndo_change_mtu = igb_change_mtu,
2305 .ndo_do_ioctl = igb_ioctl,
2306 .ndo_tx_timeout = igb_tx_timeout,
2307 .ndo_validate_addr = eth_validate_addr,
2308 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2309 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2311 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2312 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2313 #ifdef HAVE_VF_MIN_MAX_TXRATE
2314 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
2315 #else /* HAVE_VF_MIN_MAX_TXRATE */
2316 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
2317 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2318 .ndo_get_vf_config = igb_ndo_get_vf_config,
2319 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2320 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2321 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2322 #endif /* IFLA_VF_MAX */
2323 #ifdef CONFIG_NET_POLL_CONTROLLER
2324 .ndo_poll_controller = igb_netpoll,
2326 #ifdef HAVE_NDO_SET_FEATURES
2327 .ndo_fix_features = igb_fix_features,
2328 .ndo_set_features = igb_set_features,
2330 #ifdef HAVE_VLAN_RX_REGISTER
2331 .ndo_vlan_rx_register = igb_vlan_mode,
2333 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2335 .ndo_fdb_add = igb_ndo_fdb_add,
2336 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2337 .ndo_fdb_del = igb_ndo_fdb_del,
2338 .ndo_fdb_dump = igb_ndo_fdb_dump,
2340 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2341 #ifdef HAVE_BRIDGE_ATTRIBS
2342 .ndo_bridge_setlink = igb_ndo_bridge_setlink,
2343 .ndo_bridge_getlink = igb_ndo_bridge_getlink,
2344 #endif /* HAVE_BRIDGE_ATTRIBS */
2348 #ifdef CONFIG_IGB_VMDQ_NETDEV
2349 static const struct net_device_ops igb_vmdq_ops = {
2350 .ndo_open = &igb_vmdq_open,
2351 .ndo_stop = &igb_vmdq_close,
2352 .ndo_start_xmit = &igb_vmdq_xmit_frame,
2353 .ndo_get_stats = &igb_vmdq_get_stats,
2354 .ndo_set_rx_mode = &igb_vmdq_set_rx_mode,
2355 .ndo_validate_addr = eth_validate_addr,
2356 .ndo_set_mac_address = &igb_vmdq_set_mac,
2357 .ndo_change_mtu = &igb_vmdq_change_mtu,
2358 .ndo_tx_timeout = &igb_vmdq_tx_timeout,
2359 .ndo_vlan_rx_register = &igb_vmdq_vlan_rx_register,
2360 .ndo_vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid,
2361 .ndo_vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid,
2364 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2365 #endif /* HAVE_NET_DEVICE_OPS */
2366 #ifdef CONFIG_IGB_VMDQ_NETDEV
2367 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2369 #ifdef HAVE_NET_DEVICE_OPS
2370 vnetdev->netdev_ops = &igb_vmdq_ops;
2372 dev->open = &igb_vmdq_open;
2373 dev->stop = &igb_vmdq_close;
2374 dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2375 dev->get_stats = &igb_vmdq_get_stats;
2376 #ifdef HAVE_SET_RX_MODE
2377 dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2379 dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2380 dev->set_mac_address = &igb_vmdq_set_mac;
2381 dev->change_mtu = &igb_vmdq_change_mtu;
2382 #ifdef HAVE_TX_TIMEOUT
2383 dev->tx_timeout = &igb_vmdq_tx_timeout;
2385 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2386 dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2387 dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2388 dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2391 igb_vmdq_set_ethtool_ops(vnetdev);
2392 vnetdev->watchdog_timeo = 5 * HZ;
2396 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2398 int pool, err = 0, base_queue;
2399 struct net_device *vnetdev;
2400 struct igb_vmdq_adapter *vmdq_adapter;
2402 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2403 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2404 base_queue = pool * qpp;
2405 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2410 vmdq_adapter = netdev_priv(vnetdev);
2411 vmdq_adapter->vnetdev = vnetdev;
2412 vmdq_adapter->real_adapter = adapter;
2413 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2414 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2415 igb_assign_vmdq_netdev_ops(vnetdev);
2416 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2417 adapter->netdev->name, pool);
2418 vnetdev->features = adapter->netdev->features;
2419 #ifdef HAVE_NETDEV_VLAN_FEATURES
2420 vnetdev->vlan_features = adapter->netdev->vlan_features;
2422 adapter->vmdq_netdev[pool-1] = vnetdev;
2423 err = register_netdev(vnetdev);
2430 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2434 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2435 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2436 free_netdev(adapter->vmdq_netdev[pool-1]);
2437 adapter->vmdq_netdev[pool-1] = NULL;
2441 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2444 * igb_set_fw_version - Configure version string for ethtool
2445 * @adapter: adapter struct
2448 static void igb_set_fw_version(struct igb_adapter *adapter)
2450 struct e1000_hw *hw = &adapter->hw;
2451 struct e1000_fw_version fw;
2453 e1000_get_fw_version(hw, &fw);
2455 switch (hw->mac.type) {
2458 if (!(e1000_get_flash_presence_i210(hw))) {
2459 snprintf(adapter->fw_version,
2460 sizeof(adapter->fw_version),
2462 fw.invm_major, fw.invm_minor, fw.invm_img_type);
2467 /* if option rom is valid, display its version too*/
2469 snprintf(adapter->fw_version,
2470 sizeof(adapter->fw_version),
2471 "%d.%d, 0x%08x, %d.%d.%d",
2472 fw.eep_major, fw.eep_minor, fw.etrack_id,
2473 fw.or_major, fw.or_build, fw.or_patch);
2476 if (fw.etrack_id != 0X0000) {
2477 snprintf(adapter->fw_version,
2478 sizeof(adapter->fw_version),
2480 fw.eep_major, fw.eep_minor, fw.etrack_id);
2482 snprintf(adapter->fw_version,
2483 sizeof(adapter->fw_version),
2485 fw.eep_major, fw.eep_minor, fw.eep_build);
2495 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2497 * @adapter: adapter struct
2499 static void igb_init_mas(struct igb_adapter *adapter)
2501 struct e1000_hw *hw = &adapter->hw;
2504 e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2505 switch (hw->bus.func) {
2507 if (eeprom_data & IGB_MAS_ENABLE_0)
2508 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2511 if (eeprom_data & IGB_MAS_ENABLE_1)
2512 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2515 if (eeprom_data & IGB_MAS_ENABLE_2)
2516 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2519 if (eeprom_data & IGB_MAS_ENABLE_3)
2520 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2523 /* Shouldn't get here */
2524 dev_err(pci_dev_to_dev(adapter->pdev),
2525 "%s:AMS: Invalid port configuration, returning\n",
2526 adapter->netdev->name);
2532 * igb_probe - Device Initialization Routine
2533 * @pdev: PCI device information struct
2534 * @ent: entry in igb_pci_tbl
2536 * Returns 0 on success, negative on failure
2538 * igb_probe initializes an adapter identified by a pci_dev structure.
2539 * The OS initialization, configuring of the adapter private structure,
2540 * and a hardware reset occur.
2542 static int __devinit igb_probe(struct pci_dev *pdev,
2543 const struct pci_device_id *ent)
2545 struct net_device *netdev;
2546 struct igb_adapter *adapter;
2547 struct e1000_hw *hw;
2548 u16 eeprom_data = 0;
2549 u8 pba_str[E1000_PBANUM_LENGTH];
2551 static int global_quad_port_a; /* global quad port a indication */
2552 int i, err, pci_using_dac;
2553 static int cards_found;
2555 err = pci_enable_device_mem(pdev);
2560 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2562 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2566 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2568 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2570 IGB_ERR("No usable DMA configuration, "
2577 #ifndef HAVE_ASPM_QUIRKS
2578 /* 82575 requires that the pci-e link partner disable the L0s state */
2579 switch (pdev->device) {
2580 case E1000_DEV_ID_82575EB_COPPER:
2581 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2582 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2583 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2588 #endif /* HAVE_ASPM_QUIRKS */
2589 err = pci_request_selected_regions(pdev,
2590 pci_select_bars(pdev,
2596 pci_enable_pcie_error_reporting(pdev);
2598 pci_set_master(pdev);
2602 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2605 netdev = alloc_etherdev(sizeof(struct igb_adapter));
2606 #endif /* HAVE_TX_MQ */
2608 goto err_alloc_etherdev;
2610 SET_MODULE_OWNER(netdev);
2611 SET_NETDEV_DEV(netdev, &pdev->dev);
2613 pci_set_drvdata(pdev, netdev);
2614 adapter = netdev_priv(netdev);
2615 adapter->netdev = netdev;
2616 adapter->pdev = pdev;
2619 adapter->port_num = hw->bus.func;
2620 adapter->msg_enable = (1 << debug) - 1;
2623 err = pci_save_state(pdev);
2628 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2629 pci_resource_len(pdev, 0));
2633 #ifdef HAVE_NET_DEVICE_OPS
2634 netdev->netdev_ops = &igb_netdev_ops;
2635 #else /* HAVE_NET_DEVICE_OPS */
2636 netdev->open = &igb_open;
2637 netdev->stop = &igb_close;
2638 netdev->get_stats = &igb_get_stats;
2639 #ifdef HAVE_SET_RX_MODE
2640 netdev->set_rx_mode = &igb_set_rx_mode;
2642 netdev->set_multicast_list = &igb_set_rx_mode;
2643 netdev->set_mac_address = &igb_set_mac;
2644 netdev->change_mtu = &igb_change_mtu;
2645 netdev->do_ioctl = &igb_ioctl;
2646 #ifdef HAVE_TX_TIMEOUT
2647 netdev->tx_timeout = &igb_tx_timeout;
2649 netdev->vlan_rx_register = igb_vlan_mode;
2650 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2651 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2652 #ifdef CONFIG_NET_POLL_CONTROLLER
2653 netdev->poll_controller = igb_netpoll;
2655 netdev->hard_start_xmit = &igb_xmit_frame;
2656 #endif /* HAVE_NET_DEVICE_OPS */
2657 igb_set_ethtool_ops(netdev);
2658 #ifdef HAVE_TX_TIMEOUT
2659 netdev->watchdog_timeo = 5 * HZ;
2662 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2664 adapter->bd_number = cards_found;
2666 /* setup the private structure */
2667 err = igb_sw_init(adapter);
2671 e1000_get_bus_info(hw);
2673 hw->phy.autoneg_wait_to_complete = FALSE;
2674 hw->mac.adaptive_ifs = FALSE;
2676 /* Copper options */
2677 if (hw->phy.media_type == e1000_media_type_copper) {
2678 hw->phy.mdix = AUTO_ALL_MODES;
2679 hw->phy.disable_polarity_correction = FALSE;
2680 hw->phy.ms_type = e1000_ms_hw_default;
2683 if (e1000_check_reset_block(hw))
2684 dev_info(pci_dev_to_dev(pdev),
2685 "PHY reset is blocked due to SOL/IDER session.\n");
2688 * features is initialized to 0 in allocation, it might have bits
2689 * set by igb_sw_init so we should use an or instead of an
2692 netdev->features |= NETIF_F_SG |
2694 #ifdef NETIF_F_IPV6_CSUM
2702 #endif /* NETIF_F_TSO */
2703 #ifdef NETIF_F_RXHASH
2707 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2708 NETIF_F_HW_VLAN_CTAG_RX |
2709 NETIF_F_HW_VLAN_CTAG_TX;
2711 NETIF_F_HW_VLAN_RX |
2715 if (hw->mac.type >= e1000_82576)
2716 netdev->features |= NETIF_F_SCTP_CSUM;
2718 #ifdef HAVE_NDO_SET_FEATURES
2719 /* copy netdev features into list of user selectable features */
2720 netdev->hw_features |= netdev->features;
2723 /* give us the option of enabling LRO later */
2724 netdev->hw_features |= NETIF_F_LRO;
2729 /* this is only needed on kernels prior to 2.6.39 */
2730 netdev->features |= NETIF_F_GRO;
2734 /* set this bit last since it cannot be part of hw_features */
2735 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2736 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2738 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2741 #ifdef HAVE_NETDEV_VLAN_FEATURES
2742 netdev->vlan_features |= NETIF_F_TSO |
2750 netdev->features |= NETIF_F_HIGHDMA;
2752 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2754 if (adapter->dmac != IGB_DMAC_DISABLE)
2755 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2758 /* before reading the NVM, reset the controller to put the device in a
2759 * known good starting state */
2762 /* make sure the NVM is good */
2763 if (e1000_validate_nvm_checksum(hw) < 0) {
2764 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2770 /* copy the MAC address out of the NVM */
2771 if (e1000_read_mac_addr(hw))
2772 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2773 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2774 #ifdef ETHTOOL_GPERMADDR
2775 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2777 if (!is_valid_ether_addr(netdev->perm_addr)) {
2779 if (!is_valid_ether_addr(netdev->dev_addr)) {
2781 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2786 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2787 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2788 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2789 igb_rar_set(adapter, 0);
2791 /* get firmware version for ethtool -i */
2792 igb_set_fw_version(adapter);
2794 /* Check if Media Autosense is enabled */
2795 if (hw->mac.type == e1000_82580)
2796 igb_init_mas(adapter);
2797 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2798 (unsigned long) adapter);
2799 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2800 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2801 (unsigned long) adapter);
2802 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2803 (unsigned long) adapter);
2805 INIT_WORK(&adapter->reset_task, igb_reset_task);
2806 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2807 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2808 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2810 /* Initialize link properties that are user-changeable */
2811 adapter->fc_autoneg = true;
2812 hw->mac.autoneg = true;
2813 hw->phy.autoneg_advertised = 0x2f;
2815 hw->fc.requested_mode = e1000_fc_default;
2816 hw->fc.current_mode = e1000_fc_default;
2818 e1000_validate_mdi_setting(hw);
2820 /* By default, support wake on port A */
2821 if (hw->bus.func == 0)
2822 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2824 /* Check the NVM for wake support for non-port A ports */
2825 if (hw->mac.type >= e1000_82580)
2826 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2827 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2829 else if (hw->bus.func == 1)
2830 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2832 if (eeprom_data & IGB_EEPROM_APME)
2833 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2835 /* now that we have the eeprom settings, apply the special cases where
2836 * the eeprom may be wrong or the board simply won't support wake on
2837 * lan on a particular port */
2838 switch (pdev->device) {
2839 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2840 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2842 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2843 case E1000_DEV_ID_82576_FIBER:
2844 case E1000_DEV_ID_82576_SERDES:
2845 /* Wake events only supported on port A for dual fiber
2846 * regardless of eeprom setting */
2847 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2848 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2850 case E1000_DEV_ID_82576_QUAD_COPPER:
2851 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2852 /* if quad port adapter, disable WoL on all but port A */
2853 if (global_quad_port_a != 0)
2854 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2856 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2857 /* Reset for multiple quad port adapters */
2858 if (++global_quad_port_a == 4)
2859 global_quad_port_a = 0;
2862 /* If the device can't wake, don't set software support */
2863 if (!device_can_wakeup(&adapter->pdev->dev))
2864 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2868 /* initialize the wol settings based on the eeprom settings */
2869 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2870 adapter->wol |= E1000_WUFC_MAG;
2872 /* Some vendors want WoL disabled by default, but still supported */
2873 if ((hw->mac.type == e1000_i350) &&
2874 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2875 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2879 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2880 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2882 /* reset the hardware with the new settings */
2886 #ifdef HAVE_I2C_SUPPORT
2887 /* Init the I2C interface */
2888 err = igb_init_i2c(adapter);
2890 dev_err(&pdev->dev, "failed to init i2c interface\n");
2893 #endif /* HAVE_I2C_SUPPORT */
2895 /* let the f/w know that the h/w is now under the control of the
2897 igb_get_hw_control(adapter);
2899 strncpy(netdev->name, "eth%d", IFNAMSIZ);
2900 err = register_netdev(netdev);
2904 #ifdef CONFIG_IGB_VMDQ_NETDEV
2905 err = igb_init_vmdq_netdevs(adapter);
2909 /* carrier off reporting is important to ethtool even BEFORE open */
2910 netif_carrier_off(netdev);
2913 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2914 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2915 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2916 igb_setup_dca(adapter);
2920 #ifdef HAVE_PTP_1588_CLOCK
2921 /* do hw tstamp init after resetting */
2922 igb_ptp_init(adapter);
2923 #endif /* HAVE_PTP_1588_CLOCK */
2925 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2926 /* print bus type/speed/width info */
2927 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2929 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2930 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2931 (hw->mac.type == e1000_i354) ? "integrated" :
2933 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2934 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2935 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2936 (hw->mac.type == e1000_i354) ? "integrated" :
2938 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2939 for (i = 0; i < 6; i++)
2940 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2942 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2944 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2945 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2949 /* Initialize the thermal sensor on i350 devices. */
2950 if (hw->mac.type == e1000_i350) {
2951 if (hw->bus.func == 0) {
2955 * Read the NVM to determine if this i350 device
2956 * supports an external thermal sensor.
2958 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2959 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2960 adapter->ets = true;
2962 adapter->ets = false;
2966 igb_sysfs_init(adapter);
2970 igb_procfs_init(adapter);
2971 #endif /* IGB_PROCFS */
2972 #endif /* IGB_HWMON */
2974 adapter->ets = false;
2977 if (hw->phy.media_type == e1000_media_type_copper) {
2978 switch (hw->mac.type) {
2982 /* Enable EEE for internal copper PHY devices */
2983 err = e1000_set_eee_i350(hw);
2985 (adapter->flags & IGB_FLAG_EEE))
2986 adapter->eee_advert =
2987 MDIO_EEE_100TX | MDIO_EEE_1000T;
2990 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2991 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2992 err = e1000_set_eee_i354(hw);
2994 (adapter->flags & IGB_FLAG_EEE))
2995 adapter->eee_advert =
2996 MDIO_EEE_100TX | MDIO_EEE_1000T;
3004 /* send driver version info to firmware */
3005 if (hw->mac.type >= e1000_i350)
3006 igb_init_fw(adapter);
3009 if (netdev->features & NETIF_F_LRO)
3010 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3012 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3014 dev_info(pci_dev_to_dev(pdev),
3015 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3016 adapter->msix_entries ? "MSI-X" :
3017 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3018 adapter->num_rx_queues, adapter->num_tx_queues);
3022 pm_runtime_put_noidle(&pdev->dev);
3026 igb_release_hw_control(adapter);
3027 #ifdef HAVE_I2C_SUPPORT
3028 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3029 #endif /* HAVE_I2C_SUPPORT */
3031 if (!e1000_check_reset_block(hw))
3032 e1000_phy_hw_reset(hw);
3034 if (hw->flash_address)
3035 iounmap(hw->flash_address);
3037 igb_clear_interrupt_scheme(adapter);
3038 igb_reset_sriov_capability(adapter);
3039 iounmap(hw->hw_addr);
3041 free_netdev(netdev);
3043 pci_release_selected_regions(pdev,
3044 pci_select_bars(pdev, IORESOURCE_MEM));
3047 pci_disable_device(pdev);
3050 #ifdef HAVE_I2C_SUPPORT
3052 * igb_remove_i2c - Cleanup I2C interface
3053 * @adapter: pointer to adapter structure
3056 static void igb_remove_i2c(struct igb_adapter *adapter)
3059 /* free the adapter bus structure */
3060 i2c_del_adapter(&adapter->i2c_adap);
3062 #endif /* HAVE_I2C_SUPPORT */
3065 * igb_remove - Device Removal Routine
3066 * @pdev: PCI device information struct
3068 * igb_remove is called by the PCI subsystem to alert the driver
3069 * that it should release a PCI device. The could be caused by a
3070 * Hot-Plug event, or because the driver is going to be removed from
3073 static void __devexit igb_remove(struct pci_dev *pdev)
3075 struct net_device *netdev = pci_get_drvdata(pdev);
3076 struct igb_adapter *adapter = netdev_priv(netdev);
3077 struct e1000_hw *hw = &adapter->hw;
3079 pm_runtime_get_noresume(&pdev->dev);
3080 #ifdef HAVE_I2C_SUPPORT
3081 igb_remove_i2c(adapter);
3082 #endif /* HAVE_I2C_SUPPORT */
3083 #ifdef HAVE_PTP_1588_CLOCK
3084 igb_ptp_stop(adapter);
3085 #endif /* HAVE_PTP_1588_CLOCK */
3087 /* flush_scheduled work may reschedule our watchdog task, so
3088 * explicitly disable watchdog tasks from being rescheduled */
3089 set_bit(__IGB_DOWN, &adapter->state);
3090 del_timer_sync(&adapter->watchdog_timer);
3091 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3092 del_timer_sync(&adapter->dma_err_timer);
3093 del_timer_sync(&adapter->phy_info_timer);
3095 flush_scheduled_work();
3098 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3099 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3100 dca_remove_requester(&pdev->dev);
3101 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3102 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3106 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3107 * would have already happened in close and is redundant. */
3108 igb_release_hw_control(adapter);
3110 unregister_netdev(netdev);
3111 #ifdef CONFIG_IGB_VMDQ_NETDEV
3112 igb_remove_vmdq_netdevs(adapter);
3115 igb_clear_interrupt_scheme(adapter);
3116 igb_reset_sriov_capability(adapter);
3118 iounmap(hw->hw_addr);
3119 if (hw->flash_address)
3120 iounmap(hw->flash_address);
3121 pci_release_selected_regions(pdev,
3122 pci_select_bars(pdev, IORESOURCE_MEM));
3125 igb_sysfs_exit(adapter);
3128 igb_procfs_exit(adapter);
3129 #endif /* IGB_PROCFS */
3130 #endif /* IGB_HWMON */
3131 kfree(adapter->mac_table);
3132 kfree(adapter->shadow_vfta);
3133 free_netdev(netdev);
3135 pci_disable_pcie_error_reporting(pdev);
3137 pci_disable_device(pdev);
3141 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3142 * @adapter: board private structure to initialize
3144 * igb_sw_init initializes the Adapter private data structure.
3145 * Fields are initialized based on PCI device information and
3146 * OS network device settings (MTU size).
3148 static int igb_sw_init(struct igb_adapter *adapter)
3150 struct e1000_hw *hw = &adapter->hw;
3151 struct net_device *netdev = adapter->netdev;
3152 struct pci_dev *pdev = adapter->pdev;
3154 /* PCI config space info */
3156 hw->vendor_id = pdev->vendor;
3157 hw->device_id = pdev->device;
3158 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3159 hw->subsystem_device_id = pdev->subsystem_device;
3161 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3163 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3165 /* set default ring sizes */
3166 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3167 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3169 /* set default work limits */
3170 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3172 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3175 /* Initialize the hardware-specific values */
3176 if (e1000_setup_init_funcs(hw, TRUE)) {
3177 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3181 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3182 hw->mac.rar_entry_count,
3185 /* Setup and initialize a copy of the hw vlan table array */
3186 adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3189 /* These calls may decrease the number of queues */
3190 if (hw->mac.type < e1000_i210) {
3191 igb_set_sriov_capability(adapter);
3194 if (igb_init_interrupt_scheme(adapter, true)) {
3195 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3199 /* Explicitly disable IRQ since the NIC can be in any state. */
3200 igb_irq_disable(adapter);
3202 set_bit(__IGB_DOWN, &adapter->state);
3208 * igb_open - Called when a network interface is made active
3209 * @netdev: network interface device structure
3211 * Returns 0 on success, negative value on failure
3213 * The open entry point is called when a network interface is made
3214 * active by the system (IFF_UP). At this point all resources needed
3215 * for transmit and receive operations are allocated, the interrupt
3216 * handler is registered with the OS, the watchdog timer is started,
3217 * and the stack is notified that the interface is ready.
3219 static int __igb_open(struct net_device *netdev, bool resuming)
3221 struct igb_adapter *adapter = netdev_priv(netdev);
3222 struct e1000_hw *hw = &adapter->hw;
3223 #ifdef CONFIG_PM_RUNTIME
3224 struct pci_dev *pdev = adapter->pdev;
3225 #endif /* CONFIG_PM_RUNTIME */
3229 /* disallow open during test */
3230 if (test_bit(__IGB_TESTING, &adapter->state)) {
3235 #ifdef CONFIG_PM_RUNTIME
3237 pm_runtime_get_sync(&pdev->dev);
3238 #endif /* CONFIG_PM_RUNTIME */
3240 netif_carrier_off(netdev);
3242 /* allocate transmit descriptors */
3243 err = igb_setup_all_tx_resources(adapter);
3247 /* allocate receive descriptors */
3248 err = igb_setup_all_rx_resources(adapter);
3252 igb_power_up_link(adapter);
3254 /* before we allocate an interrupt, we must be ready to handle it.
3255 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3256 * as soon as we call pci_request_irq, so we have to setup our
3257 * clean_rx handler before we do so. */
3258 igb_configure(adapter);
3260 err = igb_request_irq(adapter);
3264 /* Notify the stack of the actual queue counts. */
3265 netif_set_real_num_tx_queues(netdev,
3266 adapter->vmdq_pools ? 1 :
3267 adapter->num_tx_queues);
3269 err = netif_set_real_num_rx_queues(netdev,
3270 adapter->vmdq_pools ? 1 :
3271 adapter->num_rx_queues);
3273 goto err_set_queues;
3275 /* From here on the code is the same as igb_up() */
3276 clear_bit(__IGB_DOWN, &adapter->state);
3278 for (i = 0; i < adapter->num_q_vectors; i++)
3279 napi_enable(&(adapter->q_vector[i]->napi));
3280 igb_configure_lli(adapter);
3282 /* Clear any pending interrupts. */
3283 E1000_READ_REG(hw, E1000_ICR);
3285 igb_irq_enable(adapter);
3287 /* notify VFs that reset has been completed */
3288 if (adapter->vfs_allocated_count) {
3289 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3290 reg_data |= E1000_CTRL_EXT_PFRSTD;
3291 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3294 netif_tx_start_all_queues(netdev);
3296 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3297 schedule_work(&adapter->dma_err_task);
3299 /* start the watchdog. */
3300 hw->mac.get_link_status = 1;
3301 schedule_work(&adapter->watchdog_task);
3303 return E1000_SUCCESS;
3306 igb_free_irq(adapter);
3308 igb_release_hw_control(adapter);
3309 igb_power_down_link(adapter);
3310 igb_free_all_rx_resources(adapter);
3312 igb_free_all_tx_resources(adapter);
3316 #ifdef CONFIG_PM_RUNTIME
3318 pm_runtime_put(&pdev->dev);
3319 #endif /* CONFIG_PM_RUNTIME */
3324 static int igb_open(struct net_device *netdev)
3326 return __igb_open(netdev, false);
3330 * igb_close - Disables a network interface
3331 * @netdev: network interface device structure
3333 * Returns 0, this is not allowed to fail
3335 * The close entry point is called when an interface is de-activated
3336 * by the OS. The hardware is still under the driver's control, but
3337 * needs to be disabled. A global MAC reset is issued to stop the
3338 * hardware, and all transmit and receive resources are freed.
3340 static int __igb_close(struct net_device *netdev, bool suspending)
3342 struct igb_adapter *adapter = netdev_priv(netdev);
3343 #ifdef CONFIG_PM_RUNTIME
3344 struct pci_dev *pdev = adapter->pdev;
3345 #endif /* CONFIG_PM_RUNTIME */
3347 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3349 #ifdef CONFIG_PM_RUNTIME
3351 pm_runtime_get_sync(&pdev->dev);
3352 #endif /* CONFIG_PM_RUNTIME */
3356 igb_release_hw_control(adapter);
3358 igb_free_irq(adapter);
3360 igb_free_all_tx_resources(adapter);
3361 igb_free_all_rx_resources(adapter);
3363 #ifdef CONFIG_PM_RUNTIME
3365 pm_runtime_put_sync(&pdev->dev);
3366 #endif /* CONFIG_PM_RUNTIME */
3371 static int igb_close(struct net_device *netdev)
3373 return __igb_close(netdev, false);
3377 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3378 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3380 * Return 0 on success, negative on failure
3382 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3384 struct device *dev = tx_ring->dev;
3387 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3388 tx_ring->tx_buffer_info = vzalloc(size);
3389 if (!tx_ring->tx_buffer_info)
3392 /* round up to nearest 4K */
3393 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3394 tx_ring->size = ALIGN(tx_ring->size, 4096);
3396 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3397 &tx_ring->dma, GFP_KERNEL);
3402 tx_ring->next_to_use = 0;
3403 tx_ring->next_to_clean = 0;
3408 vfree(tx_ring->tx_buffer_info);
3410 "Unable to allocate memory for the transmit descriptor ring\n");
3415 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3416 * (Descriptors) for all queues
3417 * @adapter: board private structure
3419 * Return 0 on success, negative on failure
3421 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3423 struct pci_dev *pdev = adapter->pdev;
3426 for (i = 0; i < adapter->num_tx_queues; i++) {
3427 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3429 dev_err(pci_dev_to_dev(pdev),
3430 "Allocation for Tx Queue %u failed\n", i);
3431 for (i--; i >= 0; i--)
3432 igb_free_tx_resources(adapter->tx_ring[i]);
3441 * igb_setup_tctl - configure the transmit control registers
3442 * @adapter: Board private structure
3444 void igb_setup_tctl(struct igb_adapter *adapter)
3446 struct e1000_hw *hw = &adapter->hw;
3449 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3450 E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3452 /* Program the Transmit Control Register */
3453 tctl = E1000_READ_REG(hw, E1000_TCTL);
3454 tctl &= ~E1000_TCTL_CT;
3455 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3456 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3458 e1000_config_collision_dist(hw);
3460 /* Enable transmits */
3461 tctl |= E1000_TCTL_EN;
3463 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3466 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3468 struct e1000_hw *hw = &adapter->hw;
3469 switch (hw->mac.type) {
3473 if (adapter->msix_entries)
3483 * igb_configure_tx_ring - Configure transmit ring after Reset
3484 * @adapter: board private structure
3485 * @ring: tx ring to configure
3487 * Configure a transmit ring after a reset.
3489 void igb_configure_tx_ring(struct igb_adapter *adapter,
3490 struct igb_ring *ring)
3492 struct e1000_hw *hw = &adapter->hw;
3494 u64 tdba = ring->dma;
3495 int reg_idx = ring->reg_idx;
3497 /* disable the queue */
3498 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3499 E1000_WRITE_FLUSH(hw);
3502 E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3503 ring->count * sizeof(union e1000_adv_tx_desc));
3504 E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3505 tdba & 0x00000000ffffffffULL);
3506 E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3508 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3509 E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3510 writel(0, ring->tail);
3512 txdctl |= IGB_TX_PTHRESH;
3513 txdctl |= IGB_TX_HTHRESH << 8;
3514 txdctl |= igb_tx_wthresh(adapter) << 16;
3516 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3517 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3521 * igb_configure_tx - Configure transmit Unit after Reset
3522 * @adapter: board private structure
3524 * Configure the Tx unit of the MAC after a reset.
3526 static void igb_configure_tx(struct igb_adapter *adapter)
3530 for (i = 0; i < adapter->num_tx_queues; i++)
3531 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3535 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3536 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3538 * Returns 0 on success, negative on failure
3540 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3542 struct device *dev = rx_ring->dev;
3545 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3546 rx_ring->rx_buffer_info = vzalloc(size);
3547 if (!rx_ring->rx_buffer_info)
3550 desc_len = sizeof(union e1000_adv_rx_desc);
3552 /* Round up to nearest 4K */
3553 rx_ring->size = rx_ring->count * desc_len;
3554 rx_ring->size = ALIGN(rx_ring->size, 4096);
3556 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3557 &rx_ring->dma, GFP_KERNEL);
3562 rx_ring->next_to_alloc = 0;
3563 rx_ring->next_to_clean = 0;
3564 rx_ring->next_to_use = 0;
3569 vfree(rx_ring->rx_buffer_info);
3570 rx_ring->rx_buffer_info = NULL;
3571 dev_err(dev, "Unable to allocate memory for the receive descriptor"
3577 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3578 * (Descriptors) for all queues
3579 * @adapter: board private structure
3581 * Return 0 on success, negative on failure
3583 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3585 struct pci_dev *pdev = adapter->pdev;
3588 for (i = 0; i < adapter->num_rx_queues; i++) {
3589 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3591 dev_err(pci_dev_to_dev(pdev),
3592 "Allocation for Rx Queue %u failed\n", i);
3593 for (i--; i >= 0; i--)
3594 igb_free_rx_resources(adapter->rx_ring[i]);
3603 * igb_setup_mrqc - configure the multiple receive queue control registers
3604 * @adapter: Board private structure
3606 static void igb_setup_mrqc(struct igb_adapter *adapter)
3608 struct e1000_hw *hw = &adapter->hw;
3610 u32 j, num_rx_queues, shift = 0, shift2 = 0;
3611 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3612 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3613 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3616 /* Fill out hash function seeds */
3617 for (j = 0; j < 10; j++)
3618 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3620 num_rx_queues = adapter->rss_queues;
3622 /* 82575 and 82576 supports 2 RSS queues for VMDq */
3623 switch (hw->mac.type) {
3625 if (adapter->vmdq_pools) {
3633 /* 82576 supports 2 RSS queues for SR-IOV */
3634 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3644 * Populate the redirection table 4 entries at a time. To do this
3645 * we are generating the results for n and n+2 and then interleaving
3646 * those with the results with n+1 and n+3.
3648 for (j = 0; j < 32; j++) {
3649 /* first pass generates n and n+2 */
3650 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3651 u32 reta = (base & 0x07800780) >> (7 - shift);
3653 /* second pass generates n+1 and n+3 */
3654 base += 0x00010001 * num_rx_queues;
3655 reta |= (base & 0x07800780) << (1 + shift);
3657 /* generate 2nd table for 82575 based parts */
3659 reta |= (0x01010101 * num_rx_queues) << shift2;
3661 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3665 * Disable raw packet checksumming so that RSS hash is placed in
3666 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3667 * offloads as they are enabled by default
3669 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3670 rxcsum |= E1000_RXCSUM_PCSD;
3672 if (adapter->hw.mac.type >= e1000_82576)
3673 /* Enable Receive Checksum Offload for SCTP */
3674 rxcsum |= E1000_RXCSUM_CRCOFL;
3676 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3677 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3679 /* Generate RSS hash based on packet types, TCP/UDP
3680 * port numbers and/or IPv4/v6 src and dst addresses
3682 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3683 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3684 E1000_MRQC_RSS_FIELD_IPV6 |
3685 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3686 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3688 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3689 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3690 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3691 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3693 /* If VMDq is enabled then we set the appropriate mode for that, else
3694 * we default to RSS so that an RSS hash is calculated per packet even
3695 * if we are only using one queue */
3696 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3697 if (hw->mac.type > e1000_82575) {
3698 /* Set the default pool for the PF's first queue */
3699 u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3700 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3701 E1000_VT_CTL_DISABLE_DEF_POOL);
3702 vtctl |= adapter->vfs_allocated_count <<
3703 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3704 E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3705 } else if (adapter->rss_queues > 1) {
3706 /* set default queue for pool 1 to queue 2 */
3707 E1000_WRITE_REG(hw, E1000_VT_CTL,
3708 adapter->rss_queues << 7);
3710 if (adapter->rss_queues > 1)
3711 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3713 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3715 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3717 igb_vmm_control(adapter);
3719 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3723 * igb_setup_rctl - configure the receive control registers
3724 * @adapter: Board private structure
3726 void igb_setup_rctl(struct igb_adapter *adapter)
3728 struct e1000_hw *hw = &adapter->hw;
3731 rctl = E1000_READ_REG(hw, E1000_RCTL);
3733 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3734 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3736 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3737 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3740 * enable stripping of CRC. It's unlikely this will break BMC
3741 * redirection as it did with e1000. Newer features require
3742 * that the HW strips the CRC.
3744 rctl |= E1000_RCTL_SECRC;
3746 /* disable store bad packets and clear size bits. */
3747 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3749 /* enable LPE to prevent packets larger than max_frame_size */
3750 rctl |= E1000_RCTL_LPE;
3752 /* disable queue 0 to prevent tail write w/o re-config */
3753 E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3755 /* Attention!!! For SR-IOV PF driver operations you must enable
3756 * queue drop for all VF and PF queues to prevent head of line blocking
3757 * if an un-trusted VF does not provide descriptors to hardware.
3759 if (adapter->vfs_allocated_count) {
3760 /* set all queue drop enable bits */
3761 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3764 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3767 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3770 struct e1000_hw *hw = &adapter->hw;
3773 /* if it isn't the PF check to see if VFs are enabled and
3774 * increase the size to support vlan tags */
3775 if (vfn < adapter->vfs_allocated_count &&
3776 adapter->vf_data[vfn].vlans_enabled)
3779 #ifdef CONFIG_IGB_VMDQ_NETDEV
3780 if (vfn >= adapter->vfs_allocated_count) {
3781 int queue = vfn - adapter->vfs_allocated_count;
3782 struct igb_vmdq_adapter *vadapter;
3784 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3785 if (vadapter->vlgrp)
3789 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3790 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3791 vmolr |= size | E1000_VMOLR_LPE;
3792 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3798 * igb_rlpml_set - set maximum receive packet size
3799 * @adapter: board private structure
3801 * Configure maximum receivable packet size.
3803 static void igb_rlpml_set(struct igb_adapter *adapter)
3805 u32 max_frame_size = adapter->max_frame_size;
3806 struct e1000_hw *hw = &adapter->hw;
3807 u16 pf_id = adapter->vfs_allocated_count;
3809 if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3811 for (i = 0; i < adapter->vmdq_pools; i++)
3812 igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3814 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3815 * to our max jumbo frame size, in case we need to enable
3816 * jumbo frames on one of the rings later.
3817 * This will not pass over-length frames into the default
3818 * queue because it's gated by the VMOLR.RLPML.
3820 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3822 /* Set VF RLPML for the PF device. */
3823 if (adapter->vfs_allocated_count)
3824 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3826 E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3829 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3830 int vfn, bool enable)
3832 struct e1000_hw *hw = &adapter->hw;
3836 if (hw->mac.type < e1000_82576)
3839 if (hw->mac.type == e1000_i350)
3840 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3842 reg = hw->hw_addr + E1000_VMOLR(vfn);
3846 val |= E1000_VMOLR_STRVLAN;
3848 val &= ~(E1000_VMOLR_STRVLAN);
3851 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3854 struct e1000_hw *hw = &adapter->hw;
3858 * This register exists only on 82576 and newer so if we are older then
3859 * we should exit and do nothing
3861 if (hw->mac.type < e1000_82576)
3864 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3867 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3869 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3871 /* clear all bits that might not be set */
3872 vmolr &= ~E1000_VMOLR_RSSE;
3874 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3875 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3877 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3878 vmolr |= E1000_VMOLR_LPE; /* Accept long packets */
3880 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3884 * igb_configure_rx_ring - Configure a receive ring after Reset
3885 * @adapter: board private structure
3886 * @ring: receive ring to be configured
3888 * Configure the Rx unit of the MAC after a reset.
3890 void igb_configure_rx_ring(struct igb_adapter *adapter,
3891 struct igb_ring *ring)
3893 struct e1000_hw *hw = &adapter->hw;
3894 u64 rdba = ring->dma;
3895 int reg_idx = ring->reg_idx;
3896 u32 srrctl = 0, rxdctl = 0;
3898 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3900 * RLPML prevents us from receiving a frame larger than max_frame so
3901 * it is safe to just set the rx_buffer_len to max_frame without the
3902 * risk of an skb over panic.
3904 ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3905 MAXIMUM_ETHERNET_VLAN_SIZE);
3908 /* disable the queue */
3909 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3911 /* Set DMA base address registers */
3912 E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3913 rdba & 0x00000000ffffffffULL);
3914 E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3915 E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3916 ring->count * sizeof(union e1000_adv_rx_desc));
3918 /* initialize head and tail */
3919 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3920 E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3921 writel(0, ring->tail);
3923 /* reset next-to- use/clean to place SW in sync with hardwdare */
3924 ring->next_to_clean = 0;
3925 ring->next_to_use = 0;
3926 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3927 ring->next_to_alloc = 0;
3930 /* set descriptor configuration */
3931 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3932 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3933 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3934 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3935 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3936 E1000_SRRCTL_BSIZEPKT_SHIFT;
3937 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3938 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3939 #ifdef HAVE_PTP_1588_CLOCK
3940 if (hw->mac.type >= e1000_82580)
3941 srrctl |= E1000_SRRCTL_TIMESTAMP;
3942 #endif /* HAVE_PTP_1588_CLOCK */
3944 * We should set the drop enable bit if:
3947 * Flow Control is disabled and number of RX queues > 1
3949 * This allows us to avoid head of line blocking for security
3950 * and performance reasons.
3952 if (adapter->vfs_allocated_count ||
3953 (adapter->num_rx_queues > 1 &&
3954 (hw->fc.requested_mode == e1000_fc_none ||
3955 hw->fc.requested_mode == e1000_fc_rx_pause)))
3956 srrctl |= E1000_SRRCTL_DROP_EN;
3958 E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3960 /* set filtering for VMDQ pools */
3961 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3963 rxdctl |= IGB_RX_PTHRESH;
3964 rxdctl |= IGB_RX_HTHRESH << 8;
3965 rxdctl |= IGB_RX_WTHRESH << 16;
3967 /* enable receive descriptor fetching */
3968 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3969 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3973 * igb_configure_rx - Configure receive Unit after Reset
3974 * @adapter: board private structure
3976 * Configure the Rx unit of the MAC after a reset.
3978 static void igb_configure_rx(struct igb_adapter *adapter)
3982 /* set UTA to appropriate mode */
3983 igb_set_uta(adapter);
3985 igb_full_sync_mac_table(adapter);
3986 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3987 * the Base and Length of the Rx Descriptor Ring */
3988 for (i = 0; i < adapter->num_rx_queues; i++)
3989 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3993 * igb_free_tx_resources - Free Tx Resources per Queue
3994 * @tx_ring: Tx descriptor ring for a specific queue
3996 * Free all transmit software resources
3998 void igb_free_tx_resources(struct igb_ring *tx_ring)
4000 igb_clean_tx_ring(tx_ring);
4002 vfree(tx_ring->tx_buffer_info);
4003 tx_ring->tx_buffer_info = NULL;
4005 /* if not set, then don't free */
4009 dma_free_coherent(tx_ring->dev, tx_ring->size,
4010 tx_ring->desc, tx_ring->dma);
4012 tx_ring->desc = NULL;
4016 * igb_free_all_tx_resources - Free Tx Resources for All Queues
4017 * @adapter: board private structure
4019 * Free all transmit software resources
4021 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4025 for (i = 0; i < adapter->num_tx_queues; i++)
4026 igb_free_tx_resources(adapter->tx_ring[i]);
4029 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4030 struct igb_tx_buffer *tx_buffer)
4032 if (tx_buffer->skb) {
4033 dev_kfree_skb_any(tx_buffer->skb);
4034 if (dma_unmap_len(tx_buffer, len))
4035 dma_unmap_single(ring->dev,
4036 dma_unmap_addr(tx_buffer, dma),
4037 dma_unmap_len(tx_buffer, len),
4039 } else if (dma_unmap_len(tx_buffer, len)) {
4040 dma_unmap_page(ring->dev,
4041 dma_unmap_addr(tx_buffer, dma),
4042 dma_unmap_len(tx_buffer, len),
4045 tx_buffer->next_to_watch = NULL;
4046 tx_buffer->skb = NULL;
4047 dma_unmap_len_set(tx_buffer, len, 0);
4048 /* buffer_info must be completely set up in the transmit path */
4052 * igb_clean_tx_ring - Free Tx Buffers
4053 * @tx_ring: ring to be cleaned
4055 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4057 struct igb_tx_buffer *buffer_info;
4061 if (!tx_ring->tx_buffer_info)
4063 /* Free all the Tx ring sk_buffs */
4065 for (i = 0; i < tx_ring->count; i++) {
4066 buffer_info = &tx_ring->tx_buffer_info[i];
4067 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4070 netdev_tx_reset_queue(txring_txq(tx_ring));
4072 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4073 memset(tx_ring->tx_buffer_info, 0, size);
4075 /* Zero out the descriptor ring */
4076 memset(tx_ring->desc, 0, tx_ring->size);
4078 tx_ring->next_to_use = 0;
4079 tx_ring->next_to_clean = 0;
4083 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4084 * @adapter: board private structure
4086 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4090 for (i = 0; i < adapter->num_tx_queues; i++)
4091 igb_clean_tx_ring(adapter->tx_ring[i]);
4095 * igb_free_rx_resources - Free Rx Resources
4096 * @rx_ring: ring to clean the resources from
4098 * Free all receive software resources
4100 void igb_free_rx_resources(struct igb_ring *rx_ring)
4102 igb_clean_rx_ring(rx_ring);
4104 vfree(rx_ring->rx_buffer_info);
4105 rx_ring->rx_buffer_info = NULL;
4107 /* if not set, then don't free */
4111 dma_free_coherent(rx_ring->dev, rx_ring->size,
4112 rx_ring->desc, rx_ring->dma);
4114 rx_ring->desc = NULL;
4118 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4119 * @adapter: board private structure
4121 * Free all receive software resources
4123 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4127 for (i = 0; i < adapter->num_rx_queues; i++)
4128 igb_free_rx_resources(adapter->rx_ring[i]);
4132 * igb_clean_rx_ring - Free Rx Buffers per Queue
4133 * @rx_ring: ring to free buffers from
4135 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4140 if (!rx_ring->rx_buffer_info)
4143 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4145 dev_kfree_skb(rx_ring->skb);
4146 rx_ring->skb = NULL;
4149 /* Free all the Rx ring sk_buffs */
4150 for (i = 0; i < rx_ring->count; i++) {
4151 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4152 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4153 if (buffer_info->dma) {
4154 dma_unmap_single(rx_ring->dev,
4156 rx_ring->rx_buffer_len,
4158 buffer_info->dma = 0;
4161 if (buffer_info->skb) {
4162 dev_kfree_skb(buffer_info->skb);
4163 buffer_info->skb = NULL;
4166 if (!buffer_info->page)
4169 dma_unmap_page(rx_ring->dev,
4173 __free_page(buffer_info->page);
4175 buffer_info->page = NULL;
4179 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4180 memset(rx_ring->rx_buffer_info, 0, size);
4182 /* Zero out the descriptor ring */
4183 memset(rx_ring->desc, 0, rx_ring->size);
4185 rx_ring->next_to_alloc = 0;
4186 rx_ring->next_to_clean = 0;
4187 rx_ring->next_to_use = 0;
4191 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4192 * @adapter: board private structure
4194 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4198 for (i = 0; i < adapter->num_rx_queues; i++)
4199 igb_clean_rx_ring(adapter->rx_ring[i]);
4203 * igb_set_mac - Change the Ethernet Address of the NIC
4204 * @netdev: network interface device structure
4205 * @p: pointer to an address structure
4207 * Returns 0 on success, negative on failure
4209 static int igb_set_mac(struct net_device *netdev, void *p)
4211 struct igb_adapter *adapter = netdev_priv(netdev);
4212 struct e1000_hw *hw = &adapter->hw;
4213 struct sockaddr *addr = p;
4215 if (!is_valid_ether_addr(addr->sa_data))
4216 return -EADDRNOTAVAIL;
4218 igb_del_mac_filter(adapter, hw->mac.addr,
4219 adapter->vfs_allocated_count);
4220 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4221 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4223 /* set the correct pool for the new PF MAC address in entry 0 */
4224 return igb_add_mac_filter(adapter, hw->mac.addr,
4225 adapter->vfs_allocated_count);
4229 * igb_write_mc_addr_list - write multicast addresses to MTA
4230 * @netdev: network interface device structure
4232 * Writes multicast address list to the MTA hash table.
4233 * Returns: -ENOMEM on failure
4234 * 0 on no addresses written
4235 * X on writing X addresses to MTA
4237 int igb_write_mc_addr_list(struct net_device *netdev)
4239 struct igb_adapter *adapter = netdev_priv(netdev);
4240 struct e1000_hw *hw = &adapter->hw;
4241 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4242 struct netdev_hw_addr *ha;
4244 struct dev_mc_list *ha;
4248 #ifdef CONFIG_IGB_VMDQ_NETDEV
4251 count = netdev_mc_count(netdev);
4252 #ifdef CONFIG_IGB_VMDQ_NETDEV
4253 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4254 if (!adapter->vmdq_netdev[vm])
4256 if (!netif_running(adapter->vmdq_netdev[vm]))
4258 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4263 e1000_update_mc_addr_list(hw, NULL, 0);
4266 mta_list = kzalloc(count * 6, GFP_ATOMIC);
4270 /* The shared function expects a packed array of only addresses. */
4272 netdev_for_each_mc_addr(ha, netdev)
4273 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4274 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4276 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4278 #ifdef CONFIG_IGB_VMDQ_NETDEV
4279 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4280 if (!adapter->vmdq_netdev[vm])
4282 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4283 !netdev_mc_count(adapter->vmdq_netdev[vm]))
4285 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4286 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4287 memcpy(mta_list + (i++ * ETH_ALEN),
4288 ha->addr, ETH_ALEN);
4290 memcpy(mta_list + (i++ * ETH_ALEN),
4291 ha->dmi_addr, ETH_ALEN);
4295 e1000_update_mc_addr_list(hw, mta_list, i);
4301 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4303 u32 rar_low, rar_high;
4304 struct e1000_hw *hw = &adapter->hw;
4305 u8 *addr = adapter->mac_table[index].addr;
4306 /* HW expects these in little endian so we reverse the byte order
4307 * from network order (big endian) to little endian
4309 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4310 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4311 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4313 /* Indicate to hardware the Address is Valid. */
4314 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4315 rar_high |= E1000_RAH_AV;
4317 if (hw->mac.type == e1000_82575)
4318 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4320 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4322 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4323 E1000_WRITE_FLUSH(hw);
4324 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4325 E1000_WRITE_FLUSH(hw);
4328 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4330 struct e1000_hw *hw = &adapter->hw;
4332 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4333 igb_rar_set(adapter, i);
4337 void igb_sync_mac_table(struct igb_adapter *adapter)
4339 struct e1000_hw *hw = &adapter->hw;
4341 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4342 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4343 igb_rar_set(adapter, i);
4344 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4348 int igb_available_rars(struct igb_adapter *adapter)
4350 struct e1000_hw *hw = &adapter->hw;
4353 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4354 if (adapter->mac_table[i].state == 0)
4360 #ifdef HAVE_SET_RX_MODE
4362 * igb_write_uc_addr_list - write unicast addresses to RAR table
4363 * @netdev: network interface device structure
4365 * Writes unicast address list to the RAR table.
4366 * Returns: -ENOMEM on failure/insufficient address space
4367 * 0 on no addresses written
4368 * X on writing X addresses to the RAR table
4370 static int igb_write_uc_addr_list(struct net_device *netdev)
4372 struct igb_adapter *adapter = netdev_priv(netdev);
4373 unsigned int vfn = adapter->vfs_allocated_count;
4376 /* return ENOMEM indicating insufficient memory for addresses */
4377 if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4379 if (!netdev_uc_empty(netdev)) {
4380 #ifdef NETDEV_HW_ADDR_T_UNICAST
4381 struct netdev_hw_addr *ha;
4383 struct dev_mc_list *ha;
4385 netdev_for_each_uc_addr(ha, netdev) {
4386 #ifdef NETDEV_HW_ADDR_T_UNICAST
4387 igb_del_mac_filter(adapter, ha->addr, vfn);
4388 igb_add_mac_filter(adapter, ha->addr, vfn);
4390 igb_del_mac_filter(adapter, ha->da_addr, vfn);
4391 igb_add_mac_filter(adapter, ha->da_addr, vfn);
4399 #endif /* HAVE_SET_RX_MODE */
4401 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4402 * @netdev: network interface device structure
4404 * The set_rx_mode entry point is called whenever the unicast or multicast
4405 * address lists or the network interface flags are updated. This routine is
4406 * responsible for configuring the hardware for proper unicast, multicast,
4407 * promiscuous mode, and all-multi behavior.
4409 static void igb_set_rx_mode(struct net_device *netdev)
4411 struct igb_adapter *adapter = netdev_priv(netdev);
4412 struct e1000_hw *hw = &adapter->hw;
4413 unsigned int vfn = adapter->vfs_allocated_count;
4414 u32 rctl, vmolr = 0;
4417 /* Check for Promiscuous and All Multicast modes */
4418 rctl = E1000_READ_REG(hw, E1000_RCTL);
4420 /* clear the effected bits */
4421 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4423 if (netdev->flags & IFF_PROMISC) {
4424 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4425 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4426 /* retain VLAN HW filtering if in VT mode */
4427 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4428 rctl |= E1000_RCTL_VFE;
4430 if (netdev->flags & IFF_ALLMULTI) {
4431 rctl |= E1000_RCTL_MPE;
4432 vmolr |= E1000_VMOLR_MPME;
4435 * Write addresses to the MTA, if the attempt fails
4436 * then we should just turn on promiscuous mode so
4437 * that we can at least receive multicast traffic
4439 count = igb_write_mc_addr_list(netdev);
4441 rctl |= E1000_RCTL_MPE;
4442 vmolr |= E1000_VMOLR_MPME;
4444 vmolr |= E1000_VMOLR_ROMPE;
4447 #ifdef HAVE_SET_RX_MODE
4449 * Write addresses to available RAR registers, if there is not
4450 * sufficient space to store all the addresses then enable
4451 * unicast promiscuous mode
4453 count = igb_write_uc_addr_list(netdev);
4455 rctl |= E1000_RCTL_UPE;
4456 vmolr |= E1000_VMOLR_ROPE;
4458 #endif /* HAVE_SET_RX_MODE */
4459 rctl |= E1000_RCTL_VFE;
4461 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4464 * In order to support SR-IOV and eventually VMDq it is necessary to set
4465 * the VMOLR to enable the appropriate modes. Without this workaround
4466 * we will have issues with VLAN tag stripping not being done for frames
4467 * that are only arriving because we are the default pool
4469 if (hw->mac.type < e1000_82576)
4472 vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4473 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4474 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4475 igb_restore_vf_multicasts(adapter);
4478 static void igb_check_wvbr(struct igb_adapter *adapter)
4480 struct e1000_hw *hw = &adapter->hw;
4483 switch (hw->mac.type) {
4486 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4493 adapter->wvbr |= wvbr;
4496 #define IGB_STAGGERED_QUEUE_OFFSET 8
4498 static void igb_spoof_check(struct igb_adapter *adapter)
4505 switch (adapter->hw.mac.type) {
4507 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4508 if (adapter->wvbr & (1 << j) ||
4509 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4510 DPRINTK(DRV, WARNING,
4511 "Spoof event(s) detected on VF %d\n", j);
4514 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4519 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4520 if (adapter->wvbr & (1 << j)) {
4521 DPRINTK(DRV, WARNING,
4522 "Spoof event(s) detected on VF %d\n", j);
4523 adapter->wvbr &= ~(1 << j);
4532 /* Need to wait a few seconds after link up to get diagnostic information from
4534 static void igb_update_phy_info(unsigned long data)
4536 struct igb_adapter *adapter = (struct igb_adapter *) data;
4537 e1000_get_phy_info(&adapter->hw);
4541 * igb_has_link - check shared code for link and determine up/down
4542 * @adapter: pointer to driver private info
4544 bool igb_has_link(struct igb_adapter *adapter)
4546 struct e1000_hw *hw = &adapter->hw;
4547 bool link_active = FALSE;
4549 /* get_link_status is set on LSC (link status) interrupt or
4550 * rx sequence error interrupt. get_link_status will stay
4551 * false until the e1000_check_for_link establishes link
4552 * for copper adapters ONLY
4554 switch (hw->phy.media_type) {
4555 case e1000_media_type_copper:
4556 if (!hw->mac.get_link_status)
4558 case e1000_media_type_internal_serdes:
4559 e1000_check_for_link(hw);
4560 link_active = !hw->mac.get_link_status;
4562 case e1000_media_type_unknown:
4567 if (((hw->mac.type == e1000_i210) ||
4568 (hw->mac.type == e1000_i211)) &&
4569 (hw->phy.id == I210_I_PHY_ID)) {
4570 if (!netif_carrier_ok(adapter->netdev)) {
4571 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4572 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4573 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4574 adapter->link_check_timeout = jiffies;
4582 * igb_watchdog - Timer Call-back
4583 * @data: pointer to adapter cast into an unsigned long
4585 static void igb_watchdog(unsigned long data)
4587 struct igb_adapter *adapter = (struct igb_adapter *)data;
4588 /* Do the rest outside of interrupt context */
4589 schedule_work(&adapter->watchdog_task);
4592 static void igb_watchdog_task(struct work_struct *work)
4594 struct igb_adapter *adapter = container_of(work,
4597 struct e1000_hw *hw = &adapter->hw;
4598 struct net_device *netdev = adapter->netdev;
4601 u32 thstat, ctrl_ext;
4604 link = igb_has_link(adapter);
4605 /* Force link down if we have fiber to swap to */
4606 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4607 if (hw->phy.media_type == e1000_media_type_copper) {
4608 connsw = E1000_READ_REG(hw, E1000_CONNSW);
4609 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4614 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4615 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4616 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4622 /* Perform a reset if the media type changed. */
4623 if (hw->dev_spec._82575.media_changed) {
4624 hw->dev_spec._82575.media_changed = false;
4625 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4629 /* Cancel scheduled suspend requests. */
4630 pm_runtime_resume(netdev->dev.parent);
4632 if (!netif_carrier_ok(netdev)) {
4634 e1000_get_speed_and_duplex(hw,
4635 &adapter->link_speed,
4636 &adapter->link_duplex);
4638 ctrl = E1000_READ_REG(hw, E1000_CTRL);
4639 /* Links status message must follow this format */
4640 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4641 "Flow Control: %s\n",
4643 adapter->link_speed,
4644 adapter->link_duplex == FULL_DUPLEX ?
4645 "Full Duplex" : "Half Duplex",
4646 ((ctrl & E1000_CTRL_TFCE) &&
4647 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4648 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4649 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
4650 /* adjust timeout factor according to speed/duplex */
4651 adapter->tx_timeout_factor = 1;
4652 switch (adapter->link_speed) {
4654 adapter->tx_timeout_factor = 14;
4657 /* maybe add some timeout factor ? */
4663 netif_carrier_on(netdev);
4664 netif_tx_wake_all_queues(netdev);
4666 igb_ping_all_vfs(adapter);
4668 igb_check_vf_rate_limit(adapter);
4669 #endif /* IFLA_VF_MAX */
4671 /* link state has changed, schedule phy info update */
4672 if (!test_bit(__IGB_DOWN, &adapter->state))
4673 mod_timer(&adapter->phy_info_timer,
4674 round_jiffies(jiffies + 2 * HZ));
4677 if (netif_carrier_ok(netdev)) {
4678 adapter->link_speed = 0;
4679 adapter->link_duplex = 0;
4680 /* check for thermal sensor event on i350 */
4681 if (hw->mac.type == e1000_i350) {
4682 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4683 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4684 if ((hw->phy.media_type ==
4685 e1000_media_type_copper) &&
4687 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4688 if (thstat & E1000_THSTAT_PWR_DOWN) {
4689 printk(KERN_ERR "igb: %s The "
4690 "network adapter was stopped "
4691 "because it overheated.\n",
4694 if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4696 "igb: %s The network "
4697 "adapter supported "
4707 /* Links status message must follow this format */
4708 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4710 netif_carrier_off(netdev);
4711 netif_tx_stop_all_queues(netdev);
4713 igb_ping_all_vfs(adapter);
4715 /* link state has changed, schedule phy info update */
4716 if (!test_bit(__IGB_DOWN, &adapter->state))
4717 mod_timer(&adapter->phy_info_timer,
4718 round_jiffies(jiffies + 2 * HZ));
4719 /* link is down, time to check for alternate media */
4720 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4721 igb_check_swap_media(adapter);
4722 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4723 schedule_work(&adapter->reset_task);
4724 /* return immediately */
4728 pm_schedule_suspend(netdev->dev.parent,
4731 /* also check for alternate media here */
4732 } else if (!netif_carrier_ok(netdev) &&
4733 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4734 hw->mac.ops.power_up_serdes(hw);
4735 igb_check_swap_media(adapter);
4736 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4737 schedule_work(&adapter->reset_task);
4738 /* return immediately */
4744 igb_update_stats(adapter);
4746 for (i = 0; i < adapter->num_tx_queues; i++) {
4747 struct igb_ring *tx_ring = adapter->tx_ring[i];
4748 if (!netif_carrier_ok(netdev)) {
4749 /* We've lost link, so the controller stops DMA,
4750 * but we've got queued Tx work that's never going
4751 * to get done, so reset controller to flush Tx.
4752 * (Do the reset outside of interrupt context). */
4753 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4754 adapter->tx_timeout_count++;
4755 schedule_work(&adapter->reset_task);
4756 /* return immediately since reset is imminent */
4761 /* Force detection of hung controller every watchdog period */
4762 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4765 /* Cause software interrupt to ensure rx ring is cleaned */
4766 if (adapter->msix_entries) {
4768 for (i = 0; i < adapter->num_q_vectors; i++)
4769 eics |= adapter->q_vector[i]->eims_value;
4770 E1000_WRITE_REG(hw, E1000_EICS, eics);
4772 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4775 igb_spoof_check(adapter);
4777 /* Reset the timer */
4778 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4779 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4780 mod_timer(&adapter->watchdog_timer,
4781 round_jiffies(jiffies + HZ));
4783 mod_timer(&adapter->watchdog_timer,
4784 round_jiffies(jiffies + 2 * HZ));
4788 static void igb_dma_err_task(struct work_struct *work)
4790 struct igb_adapter *adapter = container_of(work,
4794 struct e1000_hw *hw = &adapter->hw;
4795 struct net_device *netdev = adapter->netdev;
4799 hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4800 if (hgptc) /* If incrementing then no need for the check below */
4801 goto dma_timer_reset;
4803 * Check to see if a bad DMA write target from an errant or
4804 * malicious VF has caused a PCIe error. If so then we can
4805 * issue a VFLR to the offending VF(s) and then resume without
4806 * requesting a full slot reset.
4809 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4810 ciaa = (vf << 16) | 0x80000000;
4811 /* 32 bit read so align, we really want status at offset 6 */
4812 ciaa |= PCI_COMMAND;
4813 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4814 ciad = E1000_READ_REG(hw, E1000_CIAD);
4816 /* disable debug mode asap after reading data */
4817 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4818 /* Get the upper 16 bits which will be the PCI status reg */
4820 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4821 PCI_STATUS_REC_TARGET_ABORT |
4822 PCI_STATUS_SIG_SYSTEM_ERROR)) {
4823 netdev_err(netdev, "VF %d suffered error\n", vf);
4825 ciaa = (vf << 16) | 0x80000000;
4827 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4828 ciad = 0x00008000; /* VFLR */
4829 E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4831 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4835 /* Reset the timer */
4836 if (!test_bit(__IGB_DOWN, &adapter->state))
4837 mod_timer(&adapter->dma_err_timer,
4838 round_jiffies(jiffies + HZ / 10));
4842 * igb_dma_err_timer - Timer Call-back
4843 * @data: pointer to adapter cast into an unsigned long
4845 static void igb_dma_err_timer(unsigned long data)
4847 struct igb_adapter *adapter = (struct igb_adapter *)data;
4848 /* Do the rest outside of interrupt context */
4849 schedule_work(&adapter->dma_err_task);
4852 enum latency_range {
4856 latency_invalid = 255
4860 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4862 * Stores a new ITR value based on strictly on packet size. This
4863 * algorithm is less sophisticated than that used in igb_update_itr,
4864 * due to the difficulty of synchronizing statistics across multiple
4865 * receive rings. The divisors and thresholds used by this function
4866 * were determined based on theoretical maximum wire speed and testing
4867 * data, in order to minimize response time while increasing bulk
4869 * This functionality is controlled by the InterruptThrottleRate module
4870 * parameter (see igb_param.c)
4871 * NOTE: This function is called only when operating in a multiqueue
4872 * receive environment.
4873 * @q_vector: pointer to q_vector
4875 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4877 int new_val = q_vector->itr_val;
4878 int avg_wire_size = 0;
4879 struct igb_adapter *adapter = q_vector->adapter;
4880 unsigned int packets;
4882 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4883 * ints/sec - ITR timer value of 120 ticks.
4885 switch (adapter->link_speed) {
4888 new_val = IGB_4K_ITR;
4894 packets = q_vector->rx.total_packets;
4896 avg_wire_size = q_vector->rx.total_bytes / packets;
4898 packets = q_vector->tx.total_packets;
4900 avg_wire_size = max_t(u32, avg_wire_size,
4901 q_vector->tx.total_bytes / packets);
4903 /* if avg_wire_size isn't set no work was done */
4907 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4908 avg_wire_size += 24;
4910 /* Don't starve jumbo frames */
4911 avg_wire_size = min(avg_wire_size, 3000);
4913 /* Give a little boost to mid-size frames */
4914 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4915 new_val = avg_wire_size / 3;
4917 new_val = avg_wire_size / 2;
4919 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4920 if (new_val < IGB_20K_ITR &&
4921 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4922 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4923 new_val = IGB_20K_ITR;
4926 if (new_val != q_vector->itr_val) {
4927 q_vector->itr_val = new_val;
4928 q_vector->set_itr = 1;
4931 q_vector->rx.total_bytes = 0;
4932 q_vector->rx.total_packets = 0;
4933 q_vector->tx.total_bytes = 0;
4934 q_vector->tx.total_packets = 0;
4938 * igb_update_itr - update the dynamic ITR value based on statistics
4939 * Stores a new ITR value based on packets and byte
4940 * counts during the last interrupt. The advantage of per interrupt
4941 * computation is faster updates and more accurate ITR for the current
4942 * traffic pattern. Constants in this function were computed
4943 * based on theoretical maximum wire speed and thresholds were set based
4944 * on testing data as well as attempting to minimize response time
4945 * while increasing bulk throughput.
4946 * this functionality is controlled by the InterruptThrottleRate module
4947 * parameter (see igb_param.c)
4948 * NOTE: These calculations are only valid when operating in a single-
4949 * queue environment.
4950 * @q_vector: pointer to q_vector
4951 * @ring_container: ring info to update the itr for
4953 static void igb_update_itr(struct igb_q_vector *q_vector,
4954 struct igb_ring_container *ring_container)
4956 unsigned int packets = ring_container->total_packets;
4957 unsigned int bytes = ring_container->total_bytes;
4958 u8 itrval = ring_container->itr;
4960 /* no packets, exit with status unchanged */
4965 case lowest_latency:
4966 /* handle TSO and jumbo frames */
4967 if (bytes/packets > 8000)
4968 itrval = bulk_latency;
4969 else if ((packets < 5) && (bytes > 512))
4970 itrval = low_latency;
4972 case low_latency: /* 50 usec aka 20000 ints/s */
4973 if (bytes > 10000) {
4974 /* this if handles the TSO accounting */
4975 if (bytes/packets > 8000) {
4976 itrval = bulk_latency;
4977 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4978 itrval = bulk_latency;
4979 } else if ((packets > 35)) {
4980 itrval = lowest_latency;
4982 } else if (bytes/packets > 2000) {
4983 itrval = bulk_latency;
4984 } else if (packets <= 2 && bytes < 512) {
4985 itrval = lowest_latency;
4988 case bulk_latency: /* 250 usec aka 4000 ints/s */
4989 if (bytes > 25000) {
4991 itrval = low_latency;
4992 } else if (bytes < 1500) {
4993 itrval = low_latency;
4998 /* clear work counters since we have the values we need */
4999 ring_container->total_bytes = 0;
5000 ring_container->total_packets = 0;
5002 /* write updated itr to ring container */
5003 ring_container->itr = itrval;
5006 static void igb_set_itr(struct igb_q_vector *q_vector)
5008 struct igb_adapter *adapter = q_vector->adapter;
5009 u32 new_itr = q_vector->itr_val;
5012 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5013 switch (adapter->link_speed) {
5017 new_itr = IGB_4K_ITR;
5023 igb_update_itr(q_vector, &q_vector->tx);
5024 igb_update_itr(q_vector, &q_vector->rx);
5026 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5028 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5029 if (current_itr == lowest_latency &&
5030 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5031 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5032 current_itr = low_latency;
5034 switch (current_itr) {
5035 /* counts and packets in update_itr are dependent on these numbers */
5036 case lowest_latency:
5037 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5040 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5043 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5050 if (new_itr != q_vector->itr_val) {
5051 /* this attempts to bias the interrupt rate towards Bulk
5052 * by adding intermediate steps when interrupt rate is
5054 new_itr = new_itr > q_vector->itr_val ?
5055 max((new_itr * q_vector->itr_val) /
5056 (new_itr + (q_vector->itr_val >> 2)),
5059 /* Don't write the value here; it resets the adapter's
5060 * internal timer, and causes us to delay far longer than
5061 * we should between interrupts. Instead, we write the ITR
5062 * value at the beginning of the next interrupt so the timing
5063 * ends up being correct.
5065 q_vector->itr_val = new_itr;
5066 q_vector->set_itr = 1;
5070 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5071 u32 type_tucmd, u32 mss_l4len_idx)
5073 struct e1000_adv_tx_context_desc *context_desc;
5074 u16 i = tx_ring->next_to_use;
5076 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5079 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5081 /* set bits to identify this as an advanced context descriptor */
5082 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5084 /* For 82575, context index must be unique per ring. */
5085 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5086 mss_l4len_idx |= tx_ring->reg_idx << 4;
5088 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5089 context_desc->seqnum_seed = 0;
5090 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5091 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5094 static int igb_tso(struct igb_ring *tx_ring,
5095 struct igb_tx_buffer *first,
5099 struct sk_buff *skb = first->skb;
5100 u32 vlan_macip_lens, type_tucmd;
5101 u32 mss_l4len_idx, l4len;
5103 if (skb->ip_summed != CHECKSUM_PARTIAL)
5106 if (!skb_is_gso(skb))
5107 #endif /* NETIF_F_TSO */
5111 if (skb_header_cloned(skb)) {
5112 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5117 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5118 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5120 if (first->protocol == __constant_htons(ETH_P_IP)) {
5121 struct iphdr *iph = ip_hdr(skb);
5124 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5128 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5129 first->tx_flags |= IGB_TX_FLAGS_TSO |
5133 } else if (skb_is_gso_v6(skb)) {
5134 ipv6_hdr(skb)->payload_len = 0;
5135 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5136 &ipv6_hdr(skb)->daddr,
5138 first->tx_flags |= IGB_TX_FLAGS_TSO |
5143 /* compute header lengths */
5144 l4len = tcp_hdrlen(skb);
5145 *hdr_len = skb_transport_offset(skb) + l4len;
5147 /* update gso size and bytecount with header size */
5148 first->gso_segs = skb_shinfo(skb)->gso_segs;
5149 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5152 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5153 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5155 /* VLAN MACLEN IPLEN */
5156 vlan_macip_lens = skb_network_header_len(skb);
5157 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5158 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5160 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5163 #endif /* NETIF_F_TSO */
5166 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5168 struct sk_buff *skb = first->skb;
5169 u32 vlan_macip_lens = 0;
5170 u32 mss_l4len_idx = 0;
5173 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5174 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5178 switch (first->protocol) {
5179 case __constant_htons(ETH_P_IP):
5180 vlan_macip_lens |= skb_network_header_len(skb);
5181 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5182 nexthdr = ip_hdr(skb)->protocol;
5184 #ifdef NETIF_F_IPV6_CSUM
5185 case __constant_htons(ETH_P_IPV6):
5186 vlan_macip_lens |= skb_network_header_len(skb);
5187 nexthdr = ipv6_hdr(skb)->nexthdr;
5191 if (unlikely(net_ratelimit())) {
5192 dev_warn(tx_ring->dev,
5193 "partial checksum but proto=%x!\n",
5201 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5202 mss_l4len_idx = tcp_hdrlen(skb) <<
5203 E1000_ADVTXD_L4LEN_SHIFT;
5207 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5208 mss_l4len_idx = sizeof(struct sctphdr) <<
5209 E1000_ADVTXD_L4LEN_SHIFT;
5213 mss_l4len_idx = sizeof(struct udphdr) <<
5214 E1000_ADVTXD_L4LEN_SHIFT;
5217 if (unlikely(net_ratelimit())) {
5218 dev_warn(tx_ring->dev,
5219 "partial checksum but l4 proto=%x!\n",
5225 /* update TX checksum flag */
5226 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5229 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5230 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5232 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5235 #define IGB_SET_FLAG(_input, _flag, _result) \
5236 ((_flag <= _result) ? \
5237 ((u32)(_input & _flag) * (_result / _flag)) : \
5238 ((u32)(_input & _flag) / (_flag / _result)))
5240 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5242 /* set type for advanced descriptor with frame checksum insertion */
5243 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5244 E1000_ADVTXD_DCMD_DEXT |
5245 E1000_ADVTXD_DCMD_IFCS;
5247 /* set HW vlan bit if vlan is present */
5248 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5249 (E1000_ADVTXD_DCMD_VLE));
5251 /* set segmentation bits for TSO */
5252 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5253 (E1000_ADVTXD_DCMD_TSE));
5255 /* set timestamp bit if present */
5256 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5257 (E1000_ADVTXD_MAC_TSTAMP));
5262 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5263 union e1000_adv_tx_desc *tx_desc,
5264 u32 tx_flags, unsigned int paylen)
5266 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5268 /* 82575 requires a unique index per ring */
5269 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5270 olinfo_status |= tx_ring->reg_idx << 4;
5272 /* insert L4 checksum */
5273 olinfo_status |= IGB_SET_FLAG(tx_flags,
5275 (E1000_TXD_POPTS_TXSM << 8));
5277 /* insert IPv4 checksum */
5278 olinfo_status |= IGB_SET_FLAG(tx_flags,
5280 (E1000_TXD_POPTS_IXSM << 8));
5282 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5285 static void igb_tx_map(struct igb_ring *tx_ring,
5286 struct igb_tx_buffer *first,
5289 struct sk_buff *skb = first->skb;
5290 struct igb_tx_buffer *tx_buffer;
5291 union e1000_adv_tx_desc *tx_desc;
5292 struct skb_frag_struct *frag;
5294 unsigned int data_len, size;
5295 u32 tx_flags = first->tx_flags;
5296 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5297 u16 i = tx_ring->next_to_use;
5299 tx_desc = IGB_TX_DESC(tx_ring, i);
5301 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5303 size = skb_headlen(skb);
5304 data_len = skb->data_len;
5306 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5310 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5311 if (dma_mapping_error(tx_ring->dev, dma))
5314 /* record length, and DMA address */
5315 dma_unmap_len_set(tx_buffer, len, size);
5316 dma_unmap_addr_set(tx_buffer, dma, dma);
5318 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5320 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5321 tx_desc->read.cmd_type_len =
5322 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5326 if (i == tx_ring->count) {
5327 tx_desc = IGB_TX_DESC(tx_ring, 0);
5330 tx_desc->read.olinfo_status = 0;
5332 dma += IGB_MAX_DATA_PER_TXD;
5333 size -= IGB_MAX_DATA_PER_TXD;
5335 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5338 if (likely(!data_len))
5341 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5345 if (i == tx_ring->count) {
5346 tx_desc = IGB_TX_DESC(tx_ring, 0);
5349 tx_desc->read.olinfo_status = 0;
5351 size = skb_frag_size(frag);
5354 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5355 size, DMA_TO_DEVICE);
5357 tx_buffer = &tx_ring->tx_buffer_info[i];
5360 /* write last descriptor with RS and EOP bits */
5361 cmd_type |= size | IGB_TXD_DCMD;
5362 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5364 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5365 /* set the timestamp */
5366 first->time_stamp = jiffies;
5369 * Force memory writes to complete before letting h/w know there
5370 * are new descriptors to fetch. (Only applicable for weak-ordered
5371 * memory model archs, such as IA-64).
5373 * We also need this memory barrier to make certain all of the
5374 * status bits have been updated before next_to_watch is written.
5378 /* set next_to_watch value indicating a packet is present */
5379 first->next_to_watch = tx_desc;
5382 if (i == tx_ring->count)
5385 tx_ring->next_to_use = i;
5387 writel(i, tx_ring->tail);
5389 /* we need this if more than one processor can write to our tail
5390 * at a time, it syncronizes IO on IA64/Altix systems */
5396 dev_err(tx_ring->dev, "TX DMA map failed\n");
5398 /* clear dma mappings for failed tx_buffer_info map */
5400 tx_buffer = &tx_ring->tx_buffer_info[i];
5401 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5402 if (tx_buffer == first)
5409 tx_ring->next_to_use = i;
5412 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5414 struct net_device *netdev = netdev_ring(tx_ring);
5416 if (netif_is_multiqueue(netdev))
5417 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5419 netif_stop_queue(netdev);
5421 /* Herbert's original patch had:
5422 * smp_mb__after_netif_stop_queue();
5423 * but since that doesn't exist yet, just open code it. */
5426 /* We need to check again in a case another CPU has just
5427 * made room available. */
5428 if (igb_desc_unused(tx_ring) < size)
5432 if (netif_is_multiqueue(netdev))
5433 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5435 netif_wake_queue(netdev);
5437 tx_ring->tx_stats.restart_queue++;
5442 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5444 if (igb_desc_unused(tx_ring) >= size)
5446 return __igb_maybe_stop_tx(tx_ring, size);
5449 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5450 struct igb_ring *tx_ring)
5452 struct igb_tx_buffer *first;
5455 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5458 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5459 __be16 protocol = vlan_get_protocol(skb);
5463 * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5464 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5465 * + 2 desc gap to keep tail from touching head,
5466 * + 1 desc for context descriptor,
5467 * otherwise try next time
5469 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5470 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5471 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5473 count += skb_shinfo(skb)->nr_frags;
5475 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5476 /* this is a hard error */
5477 return NETDEV_TX_BUSY;
5480 /* record the location of the first descriptor for this packet */
5481 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5483 first->bytecount = skb->len;
5484 first->gso_segs = 1;
5486 skb_tx_timestamp(skb);
5488 #ifdef HAVE_PTP_1588_CLOCK
5489 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5490 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5491 if (!adapter->ptp_tx_skb) {
5492 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5493 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5495 adapter->ptp_tx_skb = skb_get(skb);
5496 adapter->ptp_tx_start = jiffies;
5497 if (adapter->hw.mac.type == e1000_82576)
5498 schedule_work(&adapter->ptp_tx_work);
5501 #endif /* HAVE_PTP_1588_CLOCK */
5503 if (vlan_tx_tag_present(skb)) {
5504 tx_flags |= IGB_TX_FLAGS_VLAN;
5505 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5508 /* record initial flags and protocol */
5509 first->tx_flags = tx_flags;
5510 first->protocol = protocol;
5512 tso = igb_tso(tx_ring, first, &hdr_len);
5516 igb_tx_csum(tx_ring, first);
5518 igb_tx_map(tx_ring, first, hdr_len);
5520 #ifndef HAVE_TRANS_START_IN_QUEUE
5521 netdev_ring(tx_ring)->trans_start = jiffies;
5524 /* Make sure there is space in the ring for the next send. */
5525 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5527 return NETDEV_TX_OK;
5530 igb_unmap_and_free_tx_resource(tx_ring, first);
5532 return NETDEV_TX_OK;
5536 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5537 struct sk_buff *skb)
5539 unsigned int r_idx = skb->queue_mapping;
5541 if (r_idx >= adapter->num_tx_queues)
5542 r_idx = r_idx % adapter->num_tx_queues;
5544 return adapter->tx_ring[r_idx];
5547 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5550 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5551 struct net_device *netdev)
5553 struct igb_adapter *adapter = netdev_priv(netdev);
5555 if (test_bit(__IGB_DOWN, &adapter->state)) {
5556 dev_kfree_skb_any(skb);
5557 return NETDEV_TX_OK;
5560 if (skb->len <= 0) {
5561 dev_kfree_skb_any(skb);
5562 return NETDEV_TX_OK;
5566 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5567 * in order to meet this minimum size requirement.
5569 if (skb->len < 17) {
5570 if (skb_padto(skb, 17))
5571 return NETDEV_TX_OK;
5575 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5579 * igb_tx_timeout - Respond to a Tx Hang
5580 * @netdev: network interface device structure
5582 static void igb_tx_timeout(struct net_device *netdev)
5584 struct igb_adapter *adapter = netdev_priv(netdev);
5585 struct e1000_hw *hw = &adapter->hw;
5587 /* Do the reset outside of interrupt context */
5588 adapter->tx_timeout_count++;
5590 if (hw->mac.type >= e1000_82580)
5591 hw->dev_spec._82575.global_device_reset = true;
5593 schedule_work(&adapter->reset_task);
5594 E1000_WRITE_REG(hw, E1000_EICS,
5595 (adapter->eims_enable_mask & ~adapter->eims_other));
5598 static void igb_reset_task(struct work_struct *work)
5600 struct igb_adapter *adapter;
5601 adapter = container_of(work, struct igb_adapter, reset_task);
5603 igb_reinit_locked(adapter);
5607 * igb_get_stats - Get System Network Statistics
5608 * @netdev: network interface device structure
5610 * Returns the address of the device statistics structure.
5611 * The statistics are updated here and also from the timer callback.
5613 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5615 struct igb_adapter *adapter = netdev_priv(netdev);
5617 if (!test_bit(__IGB_RESETTING, &adapter->state))
5618 igb_update_stats(adapter);
5620 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5621 /* only return the current stats */
5622 return &netdev->stats;
5624 /* only return the current stats */
5625 return &adapter->net_stats;
5626 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5630 * igb_change_mtu - Change the Maximum Transfer Unit
5631 * @netdev: network interface device structure
5632 * @new_mtu: new value for maximum frame size
5634 * Returns 0 on success, negative on failure
5636 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5638 struct igb_adapter *adapter = netdev_priv(netdev);
5639 struct e1000_hw *hw = &adapter->hw;
5640 struct pci_dev *pdev = adapter->pdev;
5641 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5643 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5644 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5648 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5649 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5650 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5654 /* adjust max frame to be at least the size of a standard frame */
5655 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5656 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5658 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5659 usleep_range(1000, 2000);
5661 /* igb_down has a dependency on max_frame_size */
5662 adapter->max_frame_size = max_frame;
5664 if (netif_running(netdev))
5667 dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5668 netdev->mtu, new_mtu);
5669 netdev->mtu = new_mtu;
5670 hw->dev_spec._82575.mtu = new_mtu;
5672 if (netif_running(netdev))
5677 clear_bit(__IGB_RESETTING, &adapter->state);
5683 * igb_update_stats - Update the board statistics counters
5684 * @adapter: board private structure
5687 void igb_update_stats(struct igb_adapter *adapter)
5689 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5690 struct net_device_stats *net_stats = &adapter->netdev->stats;
5692 struct net_device_stats *net_stats = &adapter->net_stats;
5693 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5694 struct e1000_hw *hw = &adapter->hw;
5696 struct pci_dev *pdev = adapter->pdev;
5703 u32 flushed = 0, coal = 0;
5704 struct igb_q_vector *q_vector;
5707 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5710 * Prevent stats update while adapter is being reset, or if the pci
5711 * connection is down.
5713 if (adapter->link_speed == 0)
5716 if (pci_channel_offline(pdev))
5721 for (i = 0; i < adapter->num_q_vectors; i++) {
5722 q_vector = adapter->q_vector[i];
5725 flushed += q_vector->lrolist.stats.flushed;
5726 coal += q_vector->lrolist.stats.coal;
5728 adapter->lro_stats.flushed = flushed;
5729 adapter->lro_stats.coal = coal;
5734 for (i = 0; i < adapter->num_rx_queues; i++) {
5735 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5736 struct igb_ring *ring = adapter->rx_ring[i];
5737 ring->rx_stats.drops += rqdpc_tmp;
5738 net_stats->rx_fifo_errors += rqdpc_tmp;
5739 #ifdef CONFIG_IGB_VMDQ_NETDEV
5740 if (!ring->vmdq_netdev) {
5741 bytes += ring->rx_stats.bytes;
5742 packets += ring->rx_stats.packets;
5745 bytes += ring->rx_stats.bytes;
5746 packets += ring->rx_stats.packets;
5750 net_stats->rx_bytes = bytes;
5751 net_stats->rx_packets = packets;
5755 for (i = 0; i < adapter->num_tx_queues; i++) {
5756 struct igb_ring *ring = adapter->tx_ring[i];
5757 #ifdef CONFIG_IGB_VMDQ_NETDEV
5758 if (!ring->vmdq_netdev) {
5759 bytes += ring->tx_stats.bytes;
5760 packets += ring->tx_stats.packets;
5763 bytes += ring->tx_stats.bytes;
5764 packets += ring->tx_stats.packets;
5767 net_stats->tx_bytes = bytes;
5768 net_stats->tx_packets = packets;
5770 /* read stats registers */
5771 adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5772 adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5773 adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5774 E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5775 adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5776 adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5777 adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5779 adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5780 adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5781 adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5782 adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5783 adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5784 adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5785 adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5786 adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5788 mpc = E1000_READ_REG(hw, E1000_MPC);
5789 adapter->stats.mpc += mpc;
5790 net_stats->rx_fifo_errors += mpc;
5791 adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5792 adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5793 adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5794 adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5795 adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5796 adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5797 adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5798 adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5799 adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5800 adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5801 adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5802 adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5803 adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5804 E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5805 adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5806 adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5807 adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5808 adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5809 adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5810 adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5811 adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5813 adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5814 adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5815 adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5816 adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5817 adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5818 adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5820 adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5821 adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5823 adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5824 adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5826 adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5827 /* read internal phy sepecific stats */
5828 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5829 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5830 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5832 /* this stat has invalid values on i210/i211 */
5833 if ((hw->mac.type != e1000_i210) &&
5834 (hw->mac.type != e1000_i211))
5835 adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5837 adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5838 adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5840 adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5841 adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5842 adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5843 adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5844 adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5845 adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5846 adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5847 adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5848 adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5850 /* Fill out the OS statistics structure */
5851 net_stats->multicast = adapter->stats.mprc;
5852 net_stats->collisions = adapter->stats.colc;
5856 /* RLEC on some newer hardware can be incorrect so build
5857 * our own version based on RUC and ROC */
5858 net_stats->rx_errors = adapter->stats.rxerrc +
5859 adapter->stats.crcerrs + adapter->stats.algnerrc +
5860 adapter->stats.ruc + adapter->stats.roc +
5861 adapter->stats.cexterr;
5862 net_stats->rx_length_errors = adapter->stats.ruc +
5864 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5865 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5866 net_stats->rx_missed_errors = adapter->stats.mpc;
5869 net_stats->tx_errors = adapter->stats.ecol +
5870 adapter->stats.latecol;
5871 net_stats->tx_aborted_errors = adapter->stats.ecol;
5872 net_stats->tx_window_errors = adapter->stats.latecol;
5873 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5875 /* Tx Dropped needs to be maintained elsewhere */
5878 if (hw->phy.media_type == e1000_media_type_copper) {
5879 if ((adapter->link_speed == SPEED_1000) &&
5880 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5881 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5882 adapter->phy_stats.idle_errors += phy_tmp;
5886 /* Management Stats */
5887 adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5888 adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5889 if (hw->mac.type > e1000_82580) {
5890 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5891 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5892 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5893 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5897 static irqreturn_t igb_msix_other(int irq, void *data)
5899 struct igb_adapter *adapter = data;
5900 struct e1000_hw *hw = &adapter->hw;
5901 u32 icr = E1000_READ_REG(hw, E1000_ICR);
5902 /* reading ICR causes bit 31 of EICR to be cleared */
5904 if (icr & E1000_ICR_DRSTA)
5905 schedule_work(&adapter->reset_task);
5907 if (icr & E1000_ICR_DOUTSYNC) {
5908 /* HW is reporting DMA is out of sync */
5909 adapter->stats.doosync++;
5910 /* The DMA Out of Sync is also indication of a spoof event
5911 * in IOV mode. Check the Wrong VM Behavior register to
5912 * see if it is really a spoof event. */
5913 igb_check_wvbr(adapter);
5916 /* Check for a mailbox event */
5917 if (icr & E1000_ICR_VMMB)
5918 igb_msg_task(adapter);
5920 if (icr & E1000_ICR_LSC) {
5921 hw->mac.get_link_status = 1;
5922 /* guard against interrupt when we're going down */
5923 if (!test_bit(__IGB_DOWN, &adapter->state))
5924 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5927 #ifdef HAVE_PTP_1588_CLOCK
5928 if (icr & E1000_ICR_TS) {
5929 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5931 if (tsicr & E1000_TSICR_TXTS) {
5932 /* acknowledge the interrupt */
5933 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5934 /* retrieve hardware timestamp */
5935 schedule_work(&adapter->ptp_tx_work);
5938 #endif /* HAVE_PTP_1588_CLOCK */
5940 /* Check for MDD event */
5941 if (icr & E1000_ICR_MDDET)
5942 igb_process_mdd_event(adapter);
5944 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5949 static void igb_write_itr(struct igb_q_vector *q_vector)
5951 struct igb_adapter *adapter = q_vector->adapter;
5952 u32 itr_val = q_vector->itr_val & 0x7FFC;
5954 if (!q_vector->set_itr)
5960 if (adapter->hw.mac.type == e1000_82575)
5961 itr_val |= itr_val << 16;
5963 itr_val |= E1000_EITR_CNT_IGNR;
5965 writel(itr_val, q_vector->itr_register);
5966 q_vector->set_itr = 0;
5969 static irqreturn_t igb_msix_ring(int irq, void *data)
5971 struct igb_q_vector *q_vector = data;
5973 /* Write the ITR value calculated from the previous interrupt. */
5974 igb_write_itr(q_vector);
5976 napi_schedule(&q_vector->napi);
5982 static void igb_update_tx_dca(struct igb_adapter *adapter,
5983 struct igb_ring *tx_ring,
5986 struct e1000_hw *hw = &adapter->hw;
5987 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5989 if (hw->mac.type != e1000_82575)
5990 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5993 * We can enable relaxed ordering for reads, but not writes when
5994 * DCA is enabled. This is due to a known issue in some chipsets
5995 * which will cause the DCA tag to be cleared.
5997 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5998 E1000_DCA_TXCTRL_DATA_RRO_EN |
5999 E1000_DCA_TXCTRL_DESC_DCA_EN;
6001 E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6004 static void igb_update_rx_dca(struct igb_adapter *adapter,
6005 struct igb_ring *rx_ring,
6008 struct e1000_hw *hw = &adapter->hw;
6009 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6011 if (hw->mac.type != e1000_82575)
6012 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6015 * We can enable relaxed ordering for reads, but not writes when
6016 * DCA is enabled. This is due to a known issue in some chipsets
6017 * which will cause the DCA tag to be cleared.
6019 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6020 E1000_DCA_RXCTRL_DESC_DCA_EN;
6022 E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6025 static void igb_update_dca(struct igb_q_vector *q_vector)
6027 struct igb_adapter *adapter = q_vector->adapter;
6028 int cpu = get_cpu();
6030 if (q_vector->cpu == cpu)
6033 if (q_vector->tx.ring)
6034 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6036 if (q_vector->rx.ring)
6037 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6039 q_vector->cpu = cpu;
6044 static void igb_setup_dca(struct igb_adapter *adapter)
6046 struct e1000_hw *hw = &adapter->hw;
6049 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6052 /* Always use CB2 mode, difference is masked in the CB driver. */
6053 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6055 for (i = 0; i < adapter->num_q_vectors; i++) {
6056 adapter->q_vector[i]->cpu = -1;
6057 igb_update_dca(adapter->q_vector[i]);
6061 static int __igb_notify_dca(struct device *dev, void *data)
6063 struct net_device *netdev = dev_get_drvdata(dev);
6064 struct igb_adapter *adapter = netdev_priv(netdev);
6065 struct pci_dev *pdev = adapter->pdev;
6066 struct e1000_hw *hw = &adapter->hw;
6067 unsigned long event = *(unsigned long *)data;
6070 case DCA_PROVIDER_ADD:
6071 /* if already enabled, don't do it again */
6072 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6074 if (dca_add_requester(dev) == E1000_SUCCESS) {
6075 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6076 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6077 igb_setup_dca(adapter);
6080 /* Fall Through since DCA is disabled. */
6081 case DCA_PROVIDER_REMOVE:
6082 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6083 /* without this a class_device is left
6084 * hanging around in the sysfs model */
6085 dca_remove_requester(dev);
6086 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6087 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6088 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6093 return E1000_SUCCESS;
6096 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6101 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6104 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6106 #endif /* IGB_DCA */
6108 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6110 unsigned char mac_addr[ETH_ALEN];
6112 random_ether_addr(mac_addr);
6113 igb_set_vf_mac(adapter, vf, mac_addr);
6116 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6117 /* By default spoof check is enabled for all VFs */
6118 adapter->vf_data[vf].spoofchk_enabled = true;
6125 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6127 struct e1000_hw *hw = &adapter->hw;
6131 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6132 ping = E1000_PF_CONTROL_MSG;
6133 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6134 ping |= E1000_VT_MSGTYPE_CTS;
6135 e1000_write_mbx(hw, &ping, 1, i);
6140 * igb_mta_set_ - Set multicast filter table address
6141 * @adapter: pointer to the adapter structure
6142 * @hash_value: determines the MTA register and bit to set
6144 * The multicast table address is a register array of 32-bit registers.
6145 * The hash_value is used to determine what register the bit is in, the
6146 * current value is read, the new bit is OR'd in and the new value is
6147 * written back into the register.
6149 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6151 struct e1000_hw *hw = &adapter->hw;
6152 u32 hash_bit, hash_reg, mta;
6155 * The MTA is a register array of 32-bit registers. It is
6156 * treated like an array of (32*mta_reg_count) bits. We want to
6157 * set bit BitArray[hash_value]. So we figure out what register
6158 * the bit is in, read it, OR in the new bit, then write
6159 * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
6160 * mask to bits 31:5 of the hash value which gives us the
6161 * register we're modifying. The hash bit within that register
6162 * is determined by the lower 5 bits of the hash value.
6164 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6165 hash_bit = hash_value & 0x1F;
6167 mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6169 mta |= (1 << hash_bit);
6171 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6172 E1000_WRITE_FLUSH(hw);
6175 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6178 struct e1000_hw *hw = &adapter->hw;
6179 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6180 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6182 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6183 IGB_VF_FLAG_MULTI_PROMISC);
6184 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6186 #ifdef IGB_ENABLE_VF_PROMISC
6187 if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6188 vmolr |= E1000_VMOLR_ROPE;
6189 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6190 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6193 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6194 vmolr |= E1000_VMOLR_MPME;
6195 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6196 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6199 * if we have hashes and we are clearing a multicast promisc
6200 * flag we need to write the hashes to the MTA as this step
6201 * was previously skipped
6203 if (vf_data->num_vf_mc_hashes > 30) {
6204 vmolr |= E1000_VMOLR_MPME;
6205 } else if (vf_data->num_vf_mc_hashes) {
6207 vmolr |= E1000_VMOLR_ROMPE;
6208 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6209 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6213 E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6215 /* there are flags left unprocessed, likely not supported */
6216 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6223 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6224 u32 *msgbuf, u32 vf)
6226 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6227 u16 *hash_list = (u16 *)&msgbuf[1];
6228 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6231 /* salt away the number of multicast addresses assigned
6232 * to this VF for later use to restore when the PF multi cast
6235 vf_data->num_vf_mc_hashes = n;
6237 /* only up to 30 hash values supported */
6241 /* store the hashes for later use */
6242 for (i = 0; i < n; i++)
6243 vf_data->vf_mc_hashes[i] = hash_list[i];
6245 /* Flush and reset the mta with the new values */
6246 igb_set_rx_mode(adapter->netdev);
6251 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6253 struct e1000_hw *hw = &adapter->hw;
6254 struct vf_data_storage *vf_data;
6257 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6258 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6259 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6261 vf_data = &adapter->vf_data[i];
6263 if ((vf_data->num_vf_mc_hashes > 30) ||
6264 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6265 vmolr |= E1000_VMOLR_MPME;
6266 } else if (vf_data->num_vf_mc_hashes) {
6267 vmolr |= E1000_VMOLR_ROMPE;
6268 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6269 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6271 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6275 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6277 struct e1000_hw *hw = &adapter->hw;
6278 u32 pool_mask, reg, vid;
6282 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6284 /* Find the vlan filter for this id */
6285 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6286 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6288 /* remove the vf from the pool */
6291 /* if pool is empty then remove entry from vfta */
6292 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6293 (reg & E1000_VLVF_VLANID_ENABLE)) {
6295 vid = reg & E1000_VLVF_VLANID_MASK;
6296 igb_vfta_set(adapter, vid, FALSE);
6299 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6302 adapter->vf_data[vf].vlans_enabled = 0;
6304 vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6306 igb_vlvf_set(adapter, vlan_default, true, vf);
6309 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6311 struct e1000_hw *hw = &adapter->hw;
6314 /* The vlvf table only exists on 82576 hardware and newer */
6315 if (hw->mac.type < e1000_82576)
6318 /* we only need to do this if VMDq is enabled */
6319 if (!adapter->vmdq_pools)
6322 /* Find the vlan filter for this id */
6323 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6324 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6325 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6326 vid == (reg & E1000_VLVF_VLANID_MASK))
6331 if (i == E1000_VLVF_ARRAY_SIZE) {
6332 /* Did not find a matching VLAN ID entry that was
6333 * enabled. Search for a free filter entry, i.e.
6334 * one without the enable bit set
6336 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6337 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6338 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6342 if (i < E1000_VLVF_ARRAY_SIZE) {
6343 /* Found an enabled/available entry */
6344 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6346 /* if !enabled we need to set this up in vfta */
6347 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6348 /* add VID to filter table */
6349 igb_vfta_set(adapter, vid, TRUE);
6350 reg |= E1000_VLVF_VLANID_ENABLE;
6352 reg &= ~E1000_VLVF_VLANID_MASK;
6354 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6356 /* do not modify RLPML for PF devices */
6357 if (vf >= adapter->vfs_allocated_count)
6358 return E1000_SUCCESS;
6360 if (!adapter->vf_data[vf].vlans_enabled) {
6362 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6363 size = reg & E1000_VMOLR_RLPML_MASK;
6365 reg &= ~E1000_VMOLR_RLPML_MASK;
6367 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6370 adapter->vf_data[vf].vlans_enabled++;
6373 if (i < E1000_VLVF_ARRAY_SIZE) {
6374 /* remove vf from the pool */
6375 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6376 /* if pool is empty then remove entry from vfta */
6377 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6379 igb_vfta_set(adapter, vid, FALSE);
6381 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6383 /* do not modify RLPML for PF devices */
6384 if (vf >= adapter->vfs_allocated_count)
6385 return E1000_SUCCESS;
6387 adapter->vf_data[vf].vlans_enabled--;
6388 if (!adapter->vf_data[vf].vlans_enabled) {
6390 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6391 size = reg & E1000_VMOLR_RLPML_MASK;
6393 reg &= ~E1000_VMOLR_RLPML_MASK;
6395 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6399 return E1000_SUCCESS;
6403 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6405 struct e1000_hw *hw = &adapter->hw;
6408 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6410 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6413 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6414 int vf, u16 vlan, u8 qos)
6417 struct igb_adapter *adapter = netdev_priv(netdev);
6419 /* VLAN IDs accepted range 0-4094 */
6420 if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6423 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6426 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6427 igb_set_vmolr(adapter, vf, !vlan);
6428 adapter->vf_data[vf].pf_vlan = vlan;
6429 adapter->vf_data[vf].pf_qos = qos;
6430 igb_set_vf_vlan_strip(adapter, vf, true);
6431 dev_info(&adapter->pdev->dev,
6432 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6433 if (test_bit(__IGB_DOWN, &adapter->state)) {
6434 dev_warn(&adapter->pdev->dev,
6435 "The VF VLAN has been set,"
6436 " but the PF device is not up.\n");
6437 dev_warn(&adapter->pdev->dev,
6438 "Bring the PF device up before"
6439 " attempting to use the VF device.\n");
6442 if (adapter->vf_data[vf].pf_vlan)
6443 dev_info(&adapter->pdev->dev,
6444 "Clearing VLAN on VF %d\n", vf);
6445 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6447 igb_set_vmvir(adapter, vlan, vf);
6448 igb_set_vmolr(adapter, vf, true);
6449 igb_set_vf_vlan_strip(adapter, vf, false);
6450 adapter->vf_data[vf].pf_vlan = 0;
6451 adapter->vf_data[vf].pf_qos = 0;
6457 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6458 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6461 struct igb_adapter *adapter = netdev_priv(netdev);
6462 struct e1000_hw *hw = &adapter->hw;
6463 u32 dtxswc, reg_offset;
6465 if (!adapter->vfs_allocated_count)
6468 if (vf >= adapter->vfs_allocated_count)
6471 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6472 dtxswc = E1000_READ_REG(hw, reg_offset);
6474 dtxswc |= ((1 << vf) |
6475 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6477 dtxswc &= ~((1 << vf) |
6478 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6479 E1000_WRITE_REG(hw, reg_offset, dtxswc);
6481 adapter->vf_data[vf].spoofchk_enabled = setting;
6482 return E1000_SUCCESS;
6484 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6485 #endif /* IFLA_VF_MAX */
6487 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6489 struct e1000_hw *hw = &adapter->hw;
6493 /* Find the vlan filter for this id */
6494 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6495 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6496 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6497 vid == (reg & E1000_VLVF_VLANID_MASK))
6501 if (i >= E1000_VLVF_ARRAY_SIZE)
6507 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6509 struct e1000_hw *hw = &adapter->hw;
6510 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6511 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6515 igb_set_vf_vlan_strip(adapter, vf, true);
6517 igb_set_vf_vlan_strip(adapter, vf, false);
6519 /* If in promiscuous mode we need to make sure the PF also has
6520 * the VLAN filter set.
6522 if (add && (adapter->netdev->flags & IFF_PROMISC))
6523 err = igb_vlvf_set(adapter, vid, add,
6524 adapter->vfs_allocated_count);
6528 err = igb_vlvf_set(adapter, vid, add, vf);
6533 /* Go through all the checks to see if the VLAN filter should
6534 * be wiped completely.
6536 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6539 int regndx = igb_find_vlvf_entry(adapter, vid);
6542 /* See if any other pools are set for this VLAN filter
6543 * entry other than the PF.
6545 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6546 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6547 adapter->vfs_allocated_count);
6548 /* If the filter was removed then ensure PF pool bit
6549 * is cleared if the PF only added itself to the pool
6550 * because the PF is in promiscuous mode.
6552 if ((vlvf & VLAN_VID_MASK) == vid &&
6553 #ifndef HAVE_VLAN_RX_REGISTER
6554 !test_bit(vid, adapter->active_vlans) &&
6557 igb_vlvf_set(adapter, vid, add,
6558 adapter->vfs_allocated_count);
6565 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6567 struct e1000_hw *hw = &adapter->hw;
6569 /* clear flags except flag that the PF has set the MAC */
6570 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6571 adapter->vf_data[vf].last_nack = jiffies;
6573 /* reset offloads to defaults */
6574 igb_set_vmolr(adapter, vf, true);
6576 /* reset vlans for device */
6577 igb_clear_vf_vfta(adapter, vf);
6579 if (adapter->vf_data[vf].pf_vlan)
6580 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6581 adapter->vf_data[vf].pf_vlan,
6582 adapter->vf_data[vf].pf_qos);
6584 igb_clear_vf_vfta(adapter, vf);
6587 /* reset multicast table array for vf */
6588 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6590 /* Flush and reset the mta with the new values */
6591 igb_set_rx_mode(adapter->netdev);
6594 * Reset the VFs TDWBAL and TDWBAH registers which are not
6597 E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6598 E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6599 if (hw->mac.type == e1000_82576) {
6600 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6601 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6605 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6607 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6609 /* generate a new mac address as we were hotplug removed/added */
6610 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6611 random_ether_addr(vf_mac);
6613 /* process remaining reset events */
6614 igb_vf_reset(adapter, vf);
6617 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6619 struct e1000_hw *hw = &adapter->hw;
6620 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6622 u8 *addr = (u8 *)(&msgbuf[1]);
6624 /* process all the same items cleared in a function level reset */
6625 igb_vf_reset(adapter, vf);
6627 /* set vf mac address */
6628 igb_del_mac_filter(adapter, vf_mac, vf);
6629 igb_add_mac_filter(adapter, vf_mac, vf);
6631 /* enable transmit and receive for vf */
6632 reg = E1000_READ_REG(hw, E1000_VFTE);
6633 E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6634 reg = E1000_READ_REG(hw, E1000_VFRE);
6635 E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6637 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6639 /* reply to reset with ack and vf mac address */
6640 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6641 memcpy(addr, vf_mac, 6);
6642 e1000_write_mbx(hw, msgbuf, 3, vf);
6645 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6648 * The VF MAC Address is stored in a packed array of bytes
6649 * starting at the second 32 bit word of the msg array
6651 unsigned char *addr = (unsigned char *)&msg[1];
6654 if (is_valid_ether_addr(addr))
6655 err = igb_set_vf_mac(adapter, vf, addr);
6660 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6662 struct e1000_hw *hw = &adapter->hw;
6663 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6664 u32 msg = E1000_VT_MSGTYPE_NACK;
6666 /* if device isn't clear to send it shouldn't be reading either */
6667 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6668 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6669 e1000_write_mbx(hw, &msg, 1, vf);
6670 vf_data->last_nack = jiffies;
6674 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6676 struct pci_dev *pdev = adapter->pdev;
6677 u32 msgbuf[E1000_VFMAILBOX_SIZE];
6678 struct e1000_hw *hw = &adapter->hw;
6679 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6682 retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6685 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6689 /* this is a message we already processed, do nothing */
6690 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6694 * until the vf completes a reset it should not be
6695 * allowed to start any configuration.
6698 if (msgbuf[0] == E1000_VF_RESET) {
6699 igb_vf_reset_msg(adapter, vf);
6703 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6704 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6705 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6706 e1000_write_mbx(hw, msgbuf, 1, vf);
6707 vf_data->last_nack = jiffies;
6712 switch ((msgbuf[0] & 0xFFFF)) {
6713 case E1000_VF_SET_MAC_ADDR:
6715 #ifndef IGB_DISABLE_VF_MAC_SET
6716 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6717 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6720 "VF %d attempted to override administratively "
6721 "set MAC address\nReload the VF driver to "
6722 "resume operations\n", vf);
6725 case E1000_VF_SET_PROMISC:
6726 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6728 case E1000_VF_SET_MULTICAST:
6729 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6731 case E1000_VF_SET_LPE:
6732 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6734 case E1000_VF_SET_VLAN:
6737 if (vf_data->pf_vlan)
6739 "VF %d attempted to override administratively "
6740 "set VLAN tag\nReload the VF driver to "
6741 "resume operations\n", vf);
6744 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6747 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6748 retval = -E1000_ERR_MBX;
6752 /* notify the VF of the results of what it sent us */
6754 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6756 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6758 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6760 e1000_write_mbx(hw, msgbuf, 1, vf);
6763 static void igb_msg_task(struct igb_adapter *adapter)
6765 struct e1000_hw *hw = &adapter->hw;
6768 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6769 /* process any reset requests */
6770 if (!e1000_check_for_rst(hw, vf))
6771 igb_vf_reset_event(adapter, vf);
6773 /* process any messages pending */
6774 if (!e1000_check_for_msg(hw, vf))
6775 igb_rcv_msg_from_vf(adapter, vf);
6777 /* process any acks */
6778 if (!e1000_check_for_ack(hw, vf))
6779 igb_rcv_ack_from_vf(adapter, vf);
6784 * igb_set_uta - Set unicast filter table address
6785 * @adapter: board private structure
6787 * The unicast table address is a register array of 32-bit registers.
6788 * The table is meant to be used in a way similar to how the MTA is used
6789 * however due to certain limitations in the hardware it is necessary to
6790 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6791 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6793 static void igb_set_uta(struct igb_adapter *adapter)
6795 struct e1000_hw *hw = &adapter->hw;
6798 /* The UTA table only exists on 82576 hardware and newer */
6799 if (hw->mac.type < e1000_82576)
6802 /* we only need to do this if VMDq is enabled */
6803 if (!adapter->vmdq_pools)
6806 for (i = 0; i < hw->mac.uta_reg_count; i++)
6807 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6811 * igb_intr_msi - Interrupt Handler
6812 * @irq: interrupt number
6813 * @data: pointer to a network interface device structure
6815 static irqreturn_t igb_intr_msi(int irq, void *data)
6817 struct igb_adapter *adapter = data;
6818 struct igb_q_vector *q_vector = adapter->q_vector[0];
6819 struct e1000_hw *hw = &adapter->hw;
6820 /* read ICR disables interrupts using IAM */
6821 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6823 igb_write_itr(q_vector);
6825 if (icr & E1000_ICR_DRSTA)
6826 schedule_work(&adapter->reset_task);
6828 if (icr & E1000_ICR_DOUTSYNC) {
6829 /* HW is reporting DMA is out of sync */
6830 adapter->stats.doosync++;
6833 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6834 hw->mac.get_link_status = 1;
6835 if (!test_bit(__IGB_DOWN, &adapter->state))
6836 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6839 #ifdef HAVE_PTP_1588_CLOCK
6840 if (icr & E1000_ICR_TS) {
6841 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6843 if (tsicr & E1000_TSICR_TXTS) {
6844 /* acknowledge the interrupt */
6845 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6846 /* retrieve hardware timestamp */
6847 schedule_work(&adapter->ptp_tx_work);
6850 #endif /* HAVE_PTP_1588_CLOCK */
6852 napi_schedule(&q_vector->napi);
6858 * igb_intr - Legacy Interrupt Handler
6859 * @irq: interrupt number
6860 * @data: pointer to a network interface device structure
6862 static irqreturn_t igb_intr(int irq, void *data)
6864 struct igb_adapter *adapter = data;
6865 struct igb_q_vector *q_vector = adapter->q_vector[0];
6866 struct e1000_hw *hw = &adapter->hw;
6867 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6868 * need for the IMC write */
6869 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6871 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6872 * not set, then the adapter didn't send an interrupt */
6873 if (!(icr & E1000_ICR_INT_ASSERTED))
6876 igb_write_itr(q_vector);
6878 if (icr & E1000_ICR_DRSTA)
6879 schedule_work(&adapter->reset_task);
6881 if (icr & E1000_ICR_DOUTSYNC) {
6882 /* HW is reporting DMA is out of sync */
6883 adapter->stats.doosync++;
6886 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6887 hw->mac.get_link_status = 1;
6888 /* guard against interrupt when we're going down */
6889 if (!test_bit(__IGB_DOWN, &adapter->state))
6890 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6893 #ifdef HAVE_PTP_1588_CLOCK
6894 if (icr & E1000_ICR_TS) {
6895 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6897 if (tsicr & E1000_TSICR_TXTS) {
6898 /* acknowledge the interrupt */
6899 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6900 /* retrieve hardware timestamp */
6901 schedule_work(&adapter->ptp_tx_work);
6904 #endif /* HAVE_PTP_1588_CLOCK */
6906 napi_schedule(&q_vector->napi);
6911 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6913 struct igb_adapter *adapter = q_vector->adapter;
6914 struct e1000_hw *hw = &adapter->hw;
6916 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6917 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6918 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6919 igb_set_itr(q_vector);
6921 igb_update_ring_itr(q_vector);
6924 if (!test_bit(__IGB_DOWN, &adapter->state)) {
6925 if (adapter->msix_entries)
6926 E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6928 igb_irq_enable(adapter);
6933 * igb_poll - NAPI Rx polling callback
6934 * @napi: napi polling structure
6935 * @budget: count of how many packets we should handle
6937 static int igb_poll(struct napi_struct *napi, int budget)
6939 struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6940 bool clean_complete = true;
6943 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6944 igb_update_dca(q_vector);
6946 if (q_vector->tx.ring)
6947 clean_complete = igb_clean_tx_irq(q_vector);
6949 if (q_vector->rx.ring)
6950 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6952 #ifndef HAVE_NETDEV_NAPI_LIST
6953 /* if netdev is disabled we need to stop polling */
6954 if (!netif_running(q_vector->adapter->netdev))
6955 clean_complete = true;
6958 /* If all work not completed, return budget and keep polling */
6959 if (!clean_complete)
6962 /* If not enough Rx work done, exit the polling mode */
6963 napi_complete(napi);
6964 igb_ring_irq_enable(q_vector);
6970 * igb_clean_tx_irq - Reclaim resources after transmit completes
6971 * @q_vector: pointer to q_vector containing needed info
6972 * returns TRUE if ring is completely cleaned
6974 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6976 struct igb_adapter *adapter = q_vector->adapter;
6977 struct igb_ring *tx_ring = q_vector->tx.ring;
6978 struct igb_tx_buffer *tx_buffer;
6979 union e1000_adv_tx_desc *tx_desc;
6980 unsigned int total_bytes = 0, total_packets = 0;
6981 unsigned int budget = q_vector->tx.work_limit;
6982 unsigned int i = tx_ring->next_to_clean;
6984 if (test_bit(__IGB_DOWN, &adapter->state))
6987 tx_buffer = &tx_ring->tx_buffer_info[i];
6988 tx_desc = IGB_TX_DESC(tx_ring, i);
6989 i -= tx_ring->count;
6992 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6994 /* if next_to_watch is not set then there is no work pending */
6998 /* prevent any other reads prior to eop_desc */
6999 read_barrier_depends();
7001 /* if DD is not set pending work has not been completed */
7002 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7005 /* clear next_to_watch to prevent false hangs */
7006 tx_buffer->next_to_watch = NULL;
7008 /* update the statistics for this packet */
7009 total_bytes += tx_buffer->bytecount;
7010 total_packets += tx_buffer->gso_segs;
7013 dev_kfree_skb_any(tx_buffer->skb);
7015 /* unmap skb header data */
7016 dma_unmap_single(tx_ring->dev,
7017 dma_unmap_addr(tx_buffer, dma),
7018 dma_unmap_len(tx_buffer, len),
7021 /* clear tx_buffer data */
7022 tx_buffer->skb = NULL;
7023 dma_unmap_len_set(tx_buffer, len, 0);
7025 /* clear last DMA location and unmap remaining buffers */
7026 while (tx_desc != eop_desc) {
7031 i -= tx_ring->count;
7032 tx_buffer = tx_ring->tx_buffer_info;
7033 tx_desc = IGB_TX_DESC(tx_ring, 0);
7036 /* unmap any remaining paged data */
7037 if (dma_unmap_len(tx_buffer, len)) {
7038 dma_unmap_page(tx_ring->dev,
7039 dma_unmap_addr(tx_buffer, dma),
7040 dma_unmap_len(tx_buffer, len),
7042 dma_unmap_len_set(tx_buffer, len, 0);
7046 /* move us one more past the eop_desc for start of next pkt */
7051 i -= tx_ring->count;
7052 tx_buffer = tx_ring->tx_buffer_info;
7053 tx_desc = IGB_TX_DESC(tx_ring, 0);
7056 /* issue prefetch for next Tx descriptor */
7059 /* update budget accounting */
7061 } while (likely(budget));
7063 netdev_tx_completed_queue(txring_txq(tx_ring),
7064 total_packets, total_bytes);
7066 i += tx_ring->count;
7067 tx_ring->next_to_clean = i;
7068 tx_ring->tx_stats.bytes += total_bytes;
7069 tx_ring->tx_stats.packets += total_packets;
7070 q_vector->tx.total_bytes += total_bytes;
7071 q_vector->tx.total_packets += total_packets;
7074 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7075 !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7077 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7079 struct e1000_hw *hw = &adapter->hw;
7081 /* Detect a transmit hang in hardware, this serializes the
7082 * check with the clearing of time_stamp and movement of i */
7083 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7084 if (tx_buffer->next_to_watch &&
7085 time_after(jiffies, tx_buffer->time_stamp +
7086 (adapter->tx_timeout_factor * HZ))
7087 && !(E1000_READ_REG(hw, E1000_STATUS) &
7088 E1000_STATUS_TXOFF)) {
7090 /* detected Tx unit hang */
7092 adapter->tx_hang_detected = TRUE;
7093 if (adapter->disable_hw_reset) {
7094 DPRINTK(DRV, WARNING,
7095 "Deactivating netdev watchdog timer\n");
7096 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7097 dev_put(netdev_ring(tx_ring));
7098 #ifndef HAVE_NET_DEVICE_OPS
7099 netdev_ring(tx_ring)->tx_timeout = NULL;
7103 dev_err(tx_ring->dev,
7104 "Detected Tx Unit Hang\n"
7108 " next_to_use <%x>\n"
7109 " next_to_clean <%x>\n"
7110 "buffer_info[next_to_clean]\n"
7111 " time_stamp <%lx>\n"
7112 " next_to_watch <%p>\n"
7114 " desc.status <%x>\n",
7115 tx_ring->queue_index,
7116 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7117 readl(tx_ring->tail),
7118 tx_ring->next_to_use,
7119 tx_ring->next_to_clean,
7120 tx_buffer->time_stamp,
7121 tx_buffer->next_to_watch,
7123 tx_buffer->next_to_watch->wb.status);
7124 if (netif_is_multiqueue(netdev_ring(tx_ring)))
7125 netif_stop_subqueue(netdev_ring(tx_ring),
7126 ring_queue_index(tx_ring));
7128 netif_stop_queue(netdev_ring(tx_ring));
7130 /* we are about to reset, no point in enabling stuff */
7135 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7136 if (unlikely(total_packets &&
7137 netif_carrier_ok(netdev_ring(tx_ring)) &&
7138 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7139 /* Make sure that anybody stopping the queue after this
7140 * sees the new next_to_clean.
7143 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7144 if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7145 ring_queue_index(tx_ring)) &&
7146 !(test_bit(__IGB_DOWN, &adapter->state))) {
7147 netif_wake_subqueue(netdev_ring(tx_ring),
7148 ring_queue_index(tx_ring));
7149 tx_ring->tx_stats.restart_queue++;
7152 if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7153 !(test_bit(__IGB_DOWN, &adapter->state))) {
7154 netif_wake_queue(netdev_ring(tx_ring));
7155 tx_ring->tx_stats.restart_queue++;
7163 #ifdef HAVE_VLAN_RX_REGISTER
7165 * igb_receive_skb - helper function to handle rx indications
7166 * @q_vector: structure containing interrupt and ring information
7167 * @skb: packet to send up
7169 static void igb_receive_skb(struct igb_q_vector *q_vector,
7170 struct sk_buff *skb)
7172 struct vlan_group **vlgrp = netdev_priv(skb->dev);
7174 if (IGB_CB(skb)->vid) {
7176 vlan_gro_receive(&q_vector->napi, *vlgrp,
7177 IGB_CB(skb)->vid, skb);
7179 dev_kfree_skb_any(skb);
7182 napi_gro_receive(&q_vector->napi, skb);
7186 #endif /* HAVE_VLAN_RX_REGISTER */
7187 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7189 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7190 * @rx_ring: rx descriptor ring to store buffers on
7191 * @old_buff: donor buffer to have page reused
7193 * Synchronizes page for reuse by the adapter
7195 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7196 struct igb_rx_buffer *old_buff)
7198 struct igb_rx_buffer *new_buff;
7199 u16 nta = rx_ring->next_to_alloc;
7201 new_buff = &rx_ring->rx_buffer_info[nta];
7203 /* update, and store next to alloc */
7205 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7207 /* transfer page from old buffer to new buffer */
7208 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7210 /* sync the buffer for use by the device */
7211 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7212 old_buff->page_offset,
7217 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7219 unsigned int truesize)
7221 /* avoid re-using remote pages */
7222 if (unlikely(page_to_nid(page) != numa_node_id()))
7225 #if (PAGE_SIZE < 8192)
7226 /* if we are only owner of page we can reuse it */
7227 if (unlikely(page_count(page) != 1))
7230 /* flip page offset to other buffer */
7231 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7234 /* move offset up to the next cache line */
7235 rx_buffer->page_offset += truesize;
7237 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7241 /* bump ref count on page before it is given to the stack */
7248 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7249 * @rx_ring: rx descriptor ring to transact packets on
7250 * @rx_buffer: buffer containing page to add
7251 * @rx_desc: descriptor containing length of buffer written by hardware
7252 * @skb: sk_buff to place the data into
7254 * This function will add the data contained in rx_buffer->page to the skb.
7255 * This is done either through a direct copy if the data in the buffer is
7256 * less than the skb header size, otherwise it will just attach the page as
7257 * a frag to the skb.
7259 * The function will then update the page offset if necessary and return
7260 * true if the buffer can be reused by the adapter.
7262 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7263 struct igb_rx_buffer *rx_buffer,
7264 union e1000_adv_rx_desc *rx_desc,
7265 struct sk_buff *skb)
7267 struct page *page = rx_buffer->page;
7268 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7269 #if (PAGE_SIZE < 8192)
7270 unsigned int truesize = IGB_RX_BUFSZ;
7272 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7275 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7276 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7278 #ifdef HAVE_PTP_1588_CLOCK
7279 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7280 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7281 va += IGB_TS_HDR_LEN;
7282 size -= IGB_TS_HDR_LEN;
7284 #endif /* HAVE_PTP_1588_CLOCK */
7286 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7288 /* we can reuse buffer as-is, just make sure it is local */
7289 if (likely(page_to_nid(page) == numa_node_id()))
7292 /* this page cannot be reused so discard it */
7297 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7298 rx_buffer->page_offset, size, truesize);
7300 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7303 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7304 union e1000_adv_rx_desc *rx_desc,
7305 struct sk_buff *skb)
7307 struct igb_rx_buffer *rx_buffer;
7310 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7312 page = rx_buffer->page;
7316 void *page_addr = page_address(page) +
7317 rx_buffer->page_offset;
7319 /* prefetch first cache line of first page */
7320 prefetch(page_addr);
7321 #if L1_CACHE_BYTES < 128
7322 prefetch(page_addr + L1_CACHE_BYTES);
7325 /* allocate a skb to store the frags */
7326 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7328 if (unlikely(!skb)) {
7329 rx_ring->rx_stats.alloc_failed++;
7334 * we will be copying header into skb->data in
7335 * pskb_may_pull so it is in our interest to prefetch
7336 * it now to avoid a possible cache miss
7338 prefetchw(skb->data);
7341 /* we are reusing so sync this buffer for CPU use */
7342 dma_sync_single_range_for_cpu(rx_ring->dev,
7344 rx_buffer->page_offset,
7348 /* pull page into skb */
7349 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7350 /* hand second half of page back to the ring */
7351 igb_reuse_rx_page(rx_ring, rx_buffer);
7353 /* we are not reusing the buffer so unmap it */
7354 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7355 PAGE_SIZE, DMA_FROM_DEVICE);
7358 /* clear contents of rx_buffer */
7359 rx_buffer->page = NULL;
7365 static inline void igb_rx_checksum(struct igb_ring *ring,
7366 union e1000_adv_rx_desc *rx_desc,
7367 struct sk_buff *skb)
7369 skb_checksum_none_assert(skb);
7371 /* Ignore Checksum bit is set */
7372 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7375 /* Rx checksum disabled via ethtool */
7376 if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7379 /* TCP/UDP checksum error bit is set */
7380 if (igb_test_staterr(rx_desc,
7381 E1000_RXDEXT_STATERR_TCPE |
7382 E1000_RXDEXT_STATERR_IPE)) {
7384 * work around errata with sctp packets where the TCPE aka
7385 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7386 * packets, (aka let the stack check the crc32c)
7388 if (!((skb->len == 60) &&
7389 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7390 ring->rx_stats.csum_err++;
7392 /* let the stack verify checksum errors */
7395 /* It must be a TCP or UDP packet with a valid checksum */
7396 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7397 E1000_RXD_STAT_UDPCS))
7398 skb->ip_summed = CHECKSUM_UNNECESSARY;
7401 #ifdef NETIF_F_RXHASH
7402 static inline void igb_rx_hash(struct igb_ring *ring,
7403 union e1000_adv_rx_desc *rx_desc,
7404 struct sk_buff *skb)
7406 if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7407 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7413 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7415 * igb_merge_active_tail - merge active tail into lro skb
7416 * @tail: pointer to active tail in frag_list
7418 * This function merges the length and data of an active tail into the
7419 * skb containing the frag_list. It resets the tail's pointer to the head,
7420 * but it leaves the heads pointer to tail intact.
7422 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7424 struct sk_buff *head = IGB_CB(tail)->head;
7429 head->len += tail->len;
7430 head->data_len += tail->len;
7431 head->truesize += tail->len;
7433 IGB_CB(tail)->head = NULL;
7439 * igb_add_active_tail - adds an active tail into the skb frag_list
7440 * @head: pointer to the start of the skb
7441 * @tail: pointer to active tail to add to frag_list
7443 * This function adds an active tail to the end of the frag list. This tail
7444 * will still be receiving data so we cannot yet ad it's stats to the main
7445 * skb. That is done via igb_merge_active_tail.
7447 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7449 struct sk_buff *old_tail = IGB_CB(head)->tail;
7452 igb_merge_active_tail(old_tail);
7453 old_tail->next = tail;
7455 skb_shinfo(head)->frag_list = tail;
7458 IGB_CB(tail)->head = head;
7459 IGB_CB(head)->tail = tail;
7461 IGB_CB(head)->append_cnt++;
7465 * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7466 * @head: pointer to head of an active frag list
7468 * This function will clear the frag_tail_tracker pointer on an active
7469 * frag_list and returns true if the pointer was actually set
7471 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7473 struct sk_buff *tail = IGB_CB(head)->tail;
7478 igb_merge_active_tail(tail);
7480 IGB_CB(head)->tail = NULL;
7485 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7487 * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7488 * @adapter: board private structure
7489 * @rx_desc: pointer to the rx descriptor
7490 * @skb: pointer to the skb to be merged
7493 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7494 union e1000_adv_rx_desc *rx_desc,
7495 struct sk_buff *skb)
7497 struct iphdr *iph = (struct iphdr *)skb->data;
7498 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7500 /* verify hardware indicates this is IPv4/TCP */
7501 if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7502 !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7505 /* .. and LRO is enabled */
7506 if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7509 /* .. and we are not in promiscuous mode */
7510 if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7513 /* .. and the header is large enough for us to read IP/TCP fields */
7514 if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7517 /* .. and there are no VLANs on packet */
7518 if (skb->protocol != __constant_htons(ETH_P_IP))
7521 /* .. and we are version 4 with no options */
7522 if (*(u8 *)iph != 0x45)
7525 /* .. and the packet is not fragmented */
7526 if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7529 /* .. and that next header is TCP */
7530 if (iph->protocol != IPPROTO_TCP)
7536 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7538 return (struct igb_lrohdr *)skb->data;
7542 * igb_lro_flush - Indicate packets to upper layer.
7544 * Update IP and TCP header part of head skb if more than one
7545 * skb's chained and indicate packets to upper layer.
7547 static void igb_lro_flush(struct igb_q_vector *q_vector,
7548 struct sk_buff *skb)
7550 struct igb_lro_list *lrolist = &q_vector->lrolist;
7552 __skb_unlink(skb, &lrolist->active);
7554 if (IGB_CB(skb)->append_cnt) {
7555 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7557 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7558 /* close any active lro contexts */
7559 igb_close_active_frag_list(skb);
7562 /* incorporate ip header and re-calculate checksum */
7563 lroh->iph.tot_len = ntohs(skb->len);
7564 lroh->iph.check = 0;
7566 /* header length is 5 since we know no options exist */
7567 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7569 /* clear TCP checksum to indicate we are an LRO frame */
7572 /* incorporate latest timestamp into the tcp header */
7573 if (IGB_CB(skb)->tsecr) {
7574 lroh->ts[2] = IGB_CB(skb)->tsecr;
7575 lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7579 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7580 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7584 #ifdef HAVE_VLAN_RX_REGISTER
7585 igb_receive_skb(q_vector, skb);
7587 napi_gro_receive(&q_vector->napi, skb);
7589 lrolist->stats.flushed++;
7592 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7594 struct igb_lro_list *lrolist = &q_vector->lrolist;
7595 struct sk_buff *skb, *tmp;
7597 skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7598 igb_lro_flush(q_vector, skb);
7602 * igb_lro_header_ok - Main LRO function.
7604 static void igb_lro_header_ok(struct sk_buff *skb)
7606 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7607 u16 opt_bytes, data_len;
7609 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7610 IGB_CB(skb)->tail = NULL;
7612 IGB_CB(skb)->tsecr = 0;
7613 IGB_CB(skb)->append_cnt = 0;
7614 IGB_CB(skb)->mss = 0;
7616 /* ensure that the checksum is valid */
7617 if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7620 /* If we see CE codepoint in IP header, packet is not mergeable */
7621 if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7624 /* ensure no bits set besides ack or psh */
7625 if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7626 lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7630 /* store the total packet length */
7631 data_len = ntohs(lroh->iph.tot_len);
7633 /* remove any padding from the end of the skb */
7634 __pskb_trim(skb, data_len);
7636 /* remove header length from data length */
7637 data_len -= sizeof(struct igb_lrohdr);
7640 * check for timestamps. Since the only option we handle are timestamps,
7641 * we only have to handle the simple case of aligned timestamps
7643 opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7644 if (opt_bytes != 0) {
7645 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7646 !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7647 TCPOLEN_TSTAMP_ALIGNED) ||
7648 (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7649 (TCPOPT_NOP << 16) |
7650 (TCPOPT_TIMESTAMP << 8) |
7651 TCPOLEN_TIMESTAMP)) ||
7652 (lroh->ts[2] == 0)) {
7656 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7657 IGB_CB(skb)->tsecr = lroh->ts[2];
7659 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7662 /* record data_len as mss for the packet */
7663 IGB_CB(skb)->mss = data_len;
7664 IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7667 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7668 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7670 struct skb_shared_info *sh_info;
7671 struct skb_shared_info *new_skb_info;
7672 unsigned int data_len;
7674 sh_info = skb_shinfo(lro_skb);
7675 new_skb_info = skb_shinfo(new_skb);
7677 /* copy frags into the last skb */
7678 memcpy(sh_info->frags + sh_info->nr_frags,
7679 new_skb_info->frags,
7680 new_skb_info->nr_frags * sizeof(skb_frag_t));
7682 /* copy size data over */
7683 sh_info->nr_frags += new_skb_info->nr_frags;
7684 data_len = IGB_CB(new_skb)->mss;
7685 lro_skb->len += data_len;
7686 lro_skb->data_len += data_len;
7687 lro_skb->truesize += data_len;
7689 /* wipe record of data from new_skb */
7690 new_skb_info->nr_frags = 0;
7691 new_skb->len = new_skb->data_len = 0;
7692 dev_kfree_skb_any(new_skb);
7695 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7697 * igb_lro_receive - if able, queue skb into lro chain
7698 * @q_vector: structure containing interrupt and ring information
7699 * @new_skb: pointer to current skb being checked
7701 * Checks whether the skb given is eligible for LRO and if that's
7702 * fine chains it to the existing lro_skb based on flowid. If an LRO for
7703 * the flow doesn't exist create one.
7705 static void igb_lro_receive(struct igb_q_vector *q_vector,
7706 struct sk_buff *new_skb)
7708 struct sk_buff *lro_skb;
7709 struct igb_lro_list *lrolist = &q_vector->lrolist;
7710 struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7711 __be32 saddr = lroh->iph.saddr;
7712 __be32 daddr = lroh->iph.daddr;
7713 __be32 tcp_ports = *(__be32 *)&lroh->th;
7715 #ifdef HAVE_VLAN_RX_REGISTER
7716 u16 vid = IGB_CB(new_skb)->vid;
7718 u16 vid = new_skb->vlan_tci;
7721 igb_lro_header_ok(new_skb);
7724 * we have a packet that might be eligible for LRO,
7725 * so see if it matches anything we might expect
7727 skb_queue_walk(&lrolist->active, lro_skb) {
7728 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7729 igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7730 igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7733 #ifdef HAVE_VLAN_RX_REGISTER
7734 if (IGB_CB(lro_skb)->vid != vid)
7736 if (lro_skb->vlan_tci != vid)
7740 /* out of order packet */
7741 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7742 igb_lro_flush(q_vector, lro_skb);
7743 IGB_CB(new_skb)->mss = 0;
7747 /* TCP timestamp options have changed */
7748 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7749 igb_lro_flush(q_vector, lro_skb);
7753 /* make sure timestamp values are increasing */
7754 if (IGB_CB(lro_skb)->tsecr &&
7755 IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7756 igb_lro_flush(q_vector, lro_skb);
7757 IGB_CB(new_skb)->mss = 0;
7761 data_len = IGB_CB(new_skb)->mss;
7763 /* Check for all of the above below
7766 * resultant packet would be too large
7767 * new skb is larger than our current mss
7768 * data would remain in header
7769 * we would consume more frags then the sk_buff contains
7770 * ack sequence numbers changed
7771 * window size has changed
7773 if (data_len == 0 ||
7774 data_len > IGB_CB(lro_skb)->mss ||
7775 data_len > IGB_CB(lro_skb)->free ||
7776 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7777 data_len != new_skb->data_len ||
7778 skb_shinfo(new_skb)->nr_frags >=
7779 (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7781 igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7782 igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7783 igb_lro_flush(q_vector, lro_skb);
7787 /* Remove IP and TCP header*/
7788 skb_pull(new_skb, new_skb->len - data_len);
7790 /* update timestamp and timestamp echo response */
7791 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7792 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7794 /* update sequence and free space */
7795 IGB_CB(lro_skb)->next_seq += data_len;
7796 IGB_CB(lro_skb)->free -= data_len;
7798 /* update append_cnt */
7799 IGB_CB(lro_skb)->append_cnt++;
7801 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7802 /* if header is empty pull pages into current skb */
7803 igb_merge_frags(lro_skb, new_skb);
7805 /* chain this new skb in frag_list */
7806 igb_add_active_tail(lro_skb, new_skb);
7809 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7810 skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7811 igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7812 igb_lro_flush(q_vector, lro_skb);
7815 lrolist->stats.coal++;
7819 if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7820 /* if we are at capacity flush the tail */
7821 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7822 lro_skb = skb_peek_tail(&lrolist->active);
7824 igb_lro_flush(q_vector, lro_skb);
7827 /* update sequence and free space */
7828 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7829 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7831 /* .. and insert at the front of the active list */
7832 __skb_queue_head(&lrolist->active, new_skb);
7834 lrolist->stats.coal++;
7838 /* packet not handled by any of the above, pass it to the stack */
7839 #ifdef HAVE_VLAN_RX_REGISTER
7840 igb_receive_skb(q_vector, new_skb);
7842 napi_gro_receive(&q_vector->napi, new_skb);
7846 #endif /* IGB_NO_LRO */
7848 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7849 * @rx_ring: rx descriptor ring packet is being transacted on
7850 * @rx_desc: pointer to the EOP Rx descriptor
7851 * @skb: pointer to current skb being populated
7853 * This function checks the ring, descriptor, and packet information in
7854 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7855 * other fields within the skb.
7857 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7858 union e1000_adv_rx_desc *rx_desc,
7859 struct sk_buff *skb)
7861 struct net_device *dev = rx_ring->netdev;
7862 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7864 #ifdef NETIF_F_RXHASH
7865 igb_rx_hash(rx_ring, rx_desc, skb);
7868 igb_rx_checksum(rx_ring, rx_desc, skb);
7870 /* update packet type stats */
7871 if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7872 rx_ring->rx_stats.ipv4_packets++;
7873 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7874 rx_ring->rx_stats.ipv4e_packets++;
7875 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7876 rx_ring->rx_stats.ipv6_packets++;
7877 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7878 rx_ring->rx_stats.ipv6e_packets++;
7879 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7880 rx_ring->rx_stats.tcp_packets++;
7881 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7882 rx_ring->rx_stats.udp_packets++;
7883 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7884 rx_ring->rx_stats.sctp_packets++;
7885 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7886 rx_ring->rx_stats.nfs_packets++;
7888 #ifdef HAVE_PTP_1588_CLOCK
7889 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7890 #endif /* HAVE_PTP_1588_CLOCK */
7892 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7893 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7895 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7897 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7899 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7900 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7901 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7903 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7904 #ifdef HAVE_VLAN_RX_REGISTER
7905 IGB_CB(skb)->vid = vid;
7907 IGB_CB(skb)->vid = 0;
7910 #ifdef HAVE_VLAN_PROTOCOL
7911 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7913 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7920 skb_record_rx_queue(skb, rx_ring->queue_index);
7922 skb->protocol = eth_type_trans(skb, dev);
7926 * igb_is_non_eop - process handling of non-EOP buffers
7927 * @rx_ring: Rx ring being processed
7928 * @rx_desc: Rx descriptor for current buffer
7930 * This function updates next to clean. If the buffer is an EOP buffer
7931 * this function exits returning false, otherwise it will place the
7932 * sk_buff in the next buffer to be chained and return true indicating
7933 * that this is in fact a non-EOP buffer.
7935 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7936 union e1000_adv_rx_desc *rx_desc)
7938 u32 ntc = rx_ring->next_to_clean + 1;
7940 /* fetch, update, and store next to clean */
7941 ntc = (ntc < rx_ring->count) ? ntc : 0;
7942 rx_ring->next_to_clean = ntc;
7944 prefetch(IGB_RX_DESC(rx_ring, ntc));
7946 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7952 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7953 /* igb_clean_rx_irq -- * legacy */
7954 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7956 struct igb_ring *rx_ring = q_vector->rx.ring;
7957 unsigned int total_bytes = 0, total_packets = 0;
7958 u16 cleaned_count = igb_desc_unused(rx_ring);
7961 struct igb_rx_buffer *rx_buffer;
7962 union e1000_adv_rx_desc *rx_desc;
7963 struct sk_buff *skb;
7966 /* return some buffers to hardware, one at a time is too slow */
7967 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7968 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7972 ntc = rx_ring->next_to_clean;
7973 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7974 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7976 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7980 * This memory barrier is needed to keep us from reading
7981 * any other fields out of the rx_desc until we know the
7982 * RXD_STAT_DD bit is set
7986 skb = rx_buffer->skb;
7988 prefetch(skb->data);
7990 /* pull the header of the skb in */
7991 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7993 /* clear skb reference in buffer info structure */
7994 rx_buffer->skb = NULL;
7998 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8000 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8001 rx_ring->rx_buffer_len,
8005 if (igb_test_staterr(rx_desc,
8006 E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8007 dev_kfree_skb_any(skb);
8011 total_bytes += skb->len;
8013 /* populate checksum, timestamp, VLAN, and protocol */
8014 igb_process_skb_fields(rx_ring, rx_desc, skb);
8017 if (igb_can_lro(rx_ring, rx_desc, skb))
8018 igb_lro_receive(q_vector, skb);
8021 #ifdef HAVE_VLAN_RX_REGISTER
8022 igb_receive_skb(q_vector, skb);
8024 napi_gro_receive(&q_vector->napi, skb);
8028 netdev_ring(rx_ring)->last_rx = jiffies;
8031 /* update budget accounting */
8033 } while (likely(total_packets < budget));
8035 rx_ring->rx_stats.packets += total_packets;
8036 rx_ring->rx_stats.bytes += total_bytes;
8037 q_vector->rx.total_packets += total_packets;
8038 q_vector->rx.total_bytes += total_bytes;
8041 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8044 igb_lro_flush_all(q_vector);
8046 #endif /* IGB_NO_LRO */
8047 return (total_packets < budget);
8049 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8051 * igb_get_headlen - determine size of header for LRO/GRO
8052 * @data: pointer to the start of the headers
8053 * @max_len: total length of section to find headers in
8055 * This function is meant to determine the length of headers that will
8056 * be recognized by hardware for LRO, and GRO offloads. The main
8057 * motivation of doing this is to only perform one pull for IPv4 TCP
8058 * packets so that we can do basic things like calculating the gso_size
8059 * based on the average data per packet.
8061 static unsigned int igb_get_headlen(unsigned char *data,
8062 unsigned int max_len)
8065 unsigned char *network;
8068 struct vlan_hdr *vlan;
8071 struct ipv6hdr *ipv6;
8074 u8 nexthdr = 0; /* default to not TCP */
8077 /* this should never happen, but better safe than sorry */
8078 if (max_len < ETH_HLEN)
8081 /* initialize network frame pointer */
8084 /* set first protocol and move network header forward */
8085 protocol = hdr.eth->h_proto;
8086 hdr.network += ETH_HLEN;
8088 /* handle any vlan tag if present */
8089 if (protocol == __constant_htons(ETH_P_8021Q)) {
8090 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8093 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8094 hdr.network += VLAN_HLEN;
8097 /* handle L3 protocols */
8098 if (protocol == __constant_htons(ETH_P_IP)) {
8099 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8102 /* access ihl as a u8 to avoid unaligned access on ia64 */
8103 hlen = (hdr.network[0] & 0x0F) << 2;
8105 /* verify hlen meets minimum size requirements */
8106 if (hlen < sizeof(struct iphdr))
8107 return hdr.network - data;
8109 /* record next protocol if header is present */
8110 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8111 nexthdr = hdr.ipv4->protocol;
8113 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8114 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8117 /* record next protocol */
8118 nexthdr = hdr.ipv6->nexthdr;
8119 hlen = sizeof(struct ipv6hdr);
8120 #endif /* NETIF_F_TSO6 */
8122 return hdr.network - data;
8125 /* relocate pointer to start of L4 header */
8126 hdr.network += hlen;
8128 /* finally sort out TCP */
8129 if (nexthdr == IPPROTO_TCP) {
8130 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8133 /* access doff as a u8 to avoid unaligned access on ia64 */
8134 hlen = (hdr.network[12] & 0xF0) >> 2;
8136 /* verify hlen meets minimum size requirements */
8137 if (hlen < sizeof(struct tcphdr))
8138 return hdr.network - data;
8140 hdr.network += hlen;
8141 } else if (nexthdr == IPPROTO_UDP) {
8142 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8145 hdr.network += sizeof(struct udphdr);
8149 * If everything has gone correctly hdr.network should be the
8150 * data section of the packet and will be the end of the header.
8151 * If not then it probably represents the end of the last recognized
8154 if ((hdr.network - data) < max_len)
8155 return hdr.network - data;
8161 * igb_pull_tail - igb specific version of skb_pull_tail
8162 * @rx_ring: rx descriptor ring packet is being transacted on
8163 * @rx_desc: pointer to the EOP Rx descriptor
8164 * @skb: pointer to current skb being adjusted
8166 * This function is an igb specific version of __pskb_pull_tail. The
8167 * main difference between this version and the original function is that
8168 * this function can make several assumptions about the state of things
8169 * that allow for significant optimizations versus the standard function.
8170 * As a result we can do things like drop a frag and maintain an accurate
8171 * truesize for the skb.
8173 static void igb_pull_tail(struct igb_ring *rx_ring,
8174 union e1000_adv_rx_desc *rx_desc,
8175 struct sk_buff *skb)
8177 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8179 unsigned int pull_len;
8182 * it is valid to use page_address instead of kmap since we are
8183 * working with pages allocated out of the lomem pool per
8184 * alloc_page(GFP_ATOMIC)
8186 va = skb_frag_address(frag);
8188 #ifdef HAVE_PTP_1588_CLOCK
8189 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8190 /* retrieve timestamp from buffer */
8191 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8193 /* update pointers to remove timestamp header */
8194 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8195 frag->page_offset += IGB_TS_HDR_LEN;
8196 skb->data_len -= IGB_TS_HDR_LEN;
8197 skb->len -= IGB_TS_HDR_LEN;
8199 /* move va to start of packet data */
8200 va += IGB_TS_HDR_LEN;
8202 #endif /* HAVE_PTP_1588_CLOCK */
8205 * we need the header to contain the greater of either ETH_HLEN or
8206 * 60 bytes if the skb->len is less than 60 for skb_pad.
8208 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8210 /* align pull length to size of long to optimize memcpy performance */
8211 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8213 /* update all of the pointers */
8214 skb_frag_size_sub(frag, pull_len);
8215 frag->page_offset += pull_len;
8216 skb->data_len -= pull_len;
8217 skb->tail += pull_len;
8221 * igb_cleanup_headers - Correct corrupted or empty headers
8222 * @rx_ring: rx descriptor ring packet is being transacted on
8223 * @rx_desc: pointer to the EOP Rx descriptor
8224 * @skb: pointer to current skb being fixed
8226 * Address the case where we are pulling data in on pages only
8227 * and as such no data is present in the skb header.
8229 * In addition if skb is not at least 60 bytes we need to pad it so that
8230 * it is large enough to qualify as a valid Ethernet frame.
8232 * Returns true if an error was encountered and skb was freed.
8234 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8235 union e1000_adv_rx_desc *rx_desc,
8236 struct sk_buff *skb)
8239 if (unlikely((igb_test_staterr(rx_desc,
8240 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8241 struct net_device *netdev = rx_ring->netdev;
8242 if (!(netdev->features & NETIF_F_RXALL)) {
8243 dev_kfree_skb_any(skb);
8248 /* place header in linear portion of buffer */
8249 if (skb_is_nonlinear(skb))
8250 igb_pull_tail(rx_ring, rx_desc, skb);
8252 /* if skb_pad returns an error the skb was freed */
8253 if (unlikely(skb->len < 60)) {
8254 int pad_len = 60 - skb->len;
8256 if (skb_pad(skb, pad_len))
8258 __skb_put(skb, pad_len);
8264 /* igb_clean_rx_irq -- * packet split */
8265 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8267 struct igb_ring *rx_ring = q_vector->rx.ring;
8268 struct sk_buff *skb = rx_ring->skb;
8269 unsigned int total_bytes = 0, total_packets = 0;
8270 u16 cleaned_count = igb_desc_unused(rx_ring);
8273 union e1000_adv_rx_desc *rx_desc;
8275 /* return some buffers to hardware, one at a time is too slow */
8276 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8277 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8281 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8283 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8287 * This memory barrier is needed to keep us from reading
8288 * any other fields out of the rx_desc until we know the
8289 * RXD_STAT_DD bit is set
8293 /* retrieve a buffer from the ring */
8294 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8296 /* exit if we failed to retrieve a buffer */
8302 /* fetch next buffer in frame if non-eop */
8303 if (igb_is_non_eop(rx_ring, rx_desc))
8306 /* verify the packet layout is correct */
8307 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8312 /* probably a little skewed due to removing CRC */
8313 total_bytes += skb->len;
8315 /* populate checksum, timestamp, VLAN, and protocol */
8316 igb_process_skb_fields(rx_ring, rx_desc, skb);
8319 if (igb_can_lro(rx_ring, rx_desc, skb))
8320 igb_lro_receive(q_vector, skb);
8323 #ifdef HAVE_VLAN_RX_REGISTER
8324 igb_receive_skb(q_vector, skb);
8326 napi_gro_receive(&q_vector->napi, skb);
8330 netdev_ring(rx_ring)->last_rx = jiffies;
8333 /* reset skb pointer */
8336 /* update budget accounting */
8338 } while (likely(total_packets < budget));
8340 /* place incomplete frames back on ring for completion */
8343 rx_ring->rx_stats.packets += total_packets;
8344 rx_ring->rx_stats.bytes += total_bytes;
8345 q_vector->rx.total_packets += total_packets;
8346 q_vector->rx.total_bytes += total_bytes;
8349 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8352 igb_lro_flush_all(q_vector);
8354 #endif /* IGB_NO_LRO */
8355 return (total_packets < budget);
8357 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8359 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8360 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8361 struct igb_rx_buffer *bi)
8363 struct sk_buff *skb = bi->skb;
8364 dma_addr_t dma = bi->dma;
8370 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8371 rx_ring->rx_buffer_len);
8374 rx_ring->rx_stats.alloc_failed++;
8378 /* initialize skb for ring */
8379 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8382 dma = dma_map_single(rx_ring->dev, skb->data,
8383 rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8385 /* if mapping failed free memory back to system since
8386 * there isn't much point in holding memory we can't use
8388 if (dma_mapping_error(rx_ring->dev, dma)) {
8389 dev_kfree_skb_any(skb);
8392 rx_ring->rx_stats.alloc_failed++;
8400 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8401 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8402 struct igb_rx_buffer *bi)
8404 struct page *page = bi->page;
8407 /* since we are recycling buffers we should seldom need to alloc */
8411 /* alloc new page for storage */
8412 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8413 if (unlikely(!page)) {
8414 rx_ring->rx_stats.alloc_failed++;
8418 /* map page for use */
8419 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8422 * if mapping failed free memory back to system since
8423 * there isn't much point in holding memory we can't use
8425 if (dma_mapping_error(rx_ring->dev, dma)) {
8428 rx_ring->rx_stats.alloc_failed++;
8434 bi->page_offset = 0;
8439 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8441 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8442 * @adapter: address of board private structure
8444 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8446 union e1000_adv_rx_desc *rx_desc;
8447 struct igb_rx_buffer *bi;
8448 u16 i = rx_ring->next_to_use;
8454 rx_desc = IGB_RX_DESC(rx_ring, i);
8455 bi = &rx_ring->rx_buffer_info[i];
8456 i -= rx_ring->count;
8459 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8460 if (!igb_alloc_mapped_skb(rx_ring, bi))
8462 if (!igb_alloc_mapped_page(rx_ring, bi))
8463 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8467 * Refresh the desc even if buffer_addrs didn't change
8468 * because each write-back erases this info.
8470 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8471 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8473 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8480 rx_desc = IGB_RX_DESC(rx_ring, 0);
8481 bi = rx_ring->rx_buffer_info;
8482 i -= rx_ring->count;
8485 /* clear the hdr_addr for the next_to_use descriptor */
8486 rx_desc->read.hdr_addr = 0;
8489 } while (cleaned_count);
8491 i += rx_ring->count;
8493 if (rx_ring->next_to_use != i) {
8494 /* record the next descriptor to use */
8495 rx_ring->next_to_use = i;
8497 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8498 /* update next to alloc since we have filled the ring */
8499 rx_ring->next_to_alloc = i;
8503 * Force memory writes to complete before letting h/w
8504 * know there are new descriptors to fetch. (Only
8505 * applicable for weak-ordered memory model archs,
8509 writel(i, rx_ring->tail);
8520 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8522 struct igb_adapter *adapter = netdev_priv(netdev);
8523 struct mii_ioctl_data *data = if_mii(ifr);
8525 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8530 data->phy_id = adapter->hw.phy.addr;
8533 if (!capable(CAP_NET_ADMIN))
8535 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8543 return E1000_SUCCESS;
8553 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8560 return igb_mii_ioctl(netdev, ifr, cmd);
8562 #ifdef HAVE_PTP_1588_CLOCK
8564 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8565 #endif /* HAVE_PTP_1588_CLOCK */
8566 #ifdef ETHTOOL_OPS_COMPAT
8568 return ethtool_ioctl(ifr);
8575 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8577 struct igb_adapter *adapter = hw->back;
8580 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8582 return -E1000_ERR_CONFIG;
8584 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8586 return E1000_SUCCESS;
8589 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8591 struct igb_adapter *adapter = hw->back;
8594 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8596 return -E1000_ERR_CONFIG;
8598 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8600 return E1000_SUCCESS;
8603 #ifdef HAVE_VLAN_RX_REGISTER
8604 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8606 void igb_vlan_mode(struct net_device *netdev, u32 features)
8609 struct igb_adapter *adapter = netdev_priv(netdev);
8610 struct e1000_hw *hw = &adapter->hw;
8613 #ifdef HAVE_VLAN_RX_REGISTER
8614 bool enable = !!vlgrp;
8616 igb_irq_disable(adapter);
8618 adapter->vlgrp = vlgrp;
8620 if (!test_bit(__IGB_DOWN, &adapter->state))
8621 igb_irq_enable(adapter);
8623 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8624 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8626 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8631 /* enable VLAN tag insert/strip */
8632 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8633 ctrl |= E1000_CTRL_VME;
8634 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8636 /* Disable CFI check */
8637 rctl = E1000_READ_REG(hw, E1000_RCTL);
8638 rctl &= ~E1000_RCTL_CFIEN;
8639 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8641 /* disable VLAN tag insert/strip */
8642 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8643 ctrl &= ~E1000_CTRL_VME;
8644 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8647 #ifndef CONFIG_IGB_VMDQ_NETDEV
8648 for (i = 0; i < adapter->vmdq_pools; i++) {
8649 igb_set_vf_vlan_strip(adapter,
8650 adapter->vfs_allocated_count + i,
8655 igb_set_vf_vlan_strip(adapter,
8656 adapter->vfs_allocated_count,
8659 for (i = 1; i < adapter->vmdq_pools; i++) {
8660 #ifdef HAVE_VLAN_RX_REGISTER
8661 struct igb_vmdq_adapter *vadapter;
8662 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8663 enable = !!vadapter->vlgrp;
8665 struct net_device *vnetdev;
8666 vnetdev = adapter->vmdq_netdev[i-1];
8667 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8668 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8670 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8673 igb_set_vf_vlan_strip(adapter,
8674 adapter->vfs_allocated_count + i,
8679 igb_rlpml_set(adapter);
8682 #ifdef HAVE_VLAN_PROTOCOL
8683 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8684 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8685 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8686 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8687 __always_unused __be16 proto, u16 vid)
8689 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8692 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8695 struct igb_adapter *adapter = netdev_priv(netdev);
8696 int pf_id = adapter->vfs_allocated_count;
8698 /* attempt to add filter to vlvf array */
8699 igb_vlvf_set(adapter, vid, TRUE, pf_id);
8701 /* add the filter since PF can receive vlans w/o entry in vlvf */
8702 igb_vfta_set(adapter, vid, TRUE);
8703 #ifndef HAVE_NETDEV_VLAN_FEATURES
8705 /* Copy feature flags from netdev to the vlan netdev for this vid.
8706 * This allows things like TSO to bubble down to our vlan device.
8707 * There is no need to update netdev for vlan 0 (DCB), since it
8708 * wouldn't has v_netdev.
8710 if (adapter->vlgrp) {
8711 struct vlan_group *vlgrp = adapter->vlgrp;
8712 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8714 v_netdev->features |= netdev->features;
8715 vlan_group_set_device(vlgrp, vid, v_netdev);
8719 #ifndef HAVE_VLAN_RX_REGISTER
8721 set_bit(vid, adapter->active_vlans);
8723 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8728 #ifdef HAVE_VLAN_PROTOCOL
8729 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8730 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8731 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8732 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8733 __always_unused __be16 proto, u16 vid)
8735 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8738 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8741 struct igb_adapter *adapter = netdev_priv(netdev);
8742 int pf_id = adapter->vfs_allocated_count;
8745 #ifdef HAVE_VLAN_RX_REGISTER
8746 igb_irq_disable(adapter);
8748 vlan_group_set_device(adapter->vlgrp, vid, NULL);
8750 if (!test_bit(__IGB_DOWN, &adapter->state))
8751 igb_irq_enable(adapter);
8753 #endif /* HAVE_VLAN_RX_REGISTER */
8754 /* remove vlan from VLVF table array */
8755 err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8757 /* if vid was not present in VLVF just remove it from table */
8759 igb_vfta_set(adapter, vid, FALSE);
8760 #ifndef HAVE_VLAN_RX_REGISTER
8762 clear_bit(vid, adapter->active_vlans);
8764 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8769 static void igb_restore_vlan(struct igb_adapter *adapter)
8771 #ifdef HAVE_VLAN_RX_REGISTER
8772 igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8774 if (adapter->vlgrp) {
8776 for (vid = 0; vid < VLAN_N_VID; vid++) {
8777 if (!vlan_group_get_device(adapter->vlgrp, vid))
8779 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8780 igb_vlan_rx_add_vid(adapter->netdev,
8781 htons(ETH_P_8021Q), vid);
8783 igb_vlan_rx_add_vid(adapter->netdev, vid);
8790 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8792 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8793 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8794 igb_vlan_rx_add_vid(adapter->netdev,
8795 htons(ETH_P_8021Q), vid);
8797 igb_vlan_rx_add_vid(adapter->netdev, vid);
8802 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8804 struct pci_dev *pdev = adapter->pdev;
8805 struct e1000_mac_info *mac = &adapter->hw.mac;
8809 /* SerDes device's does not support 10Mbps Full/duplex
8810 * and 100Mbps Half duplex
8812 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8814 case SPEED_10 + DUPLEX_HALF:
8815 case SPEED_10 + DUPLEX_FULL:
8816 case SPEED_100 + DUPLEX_HALF:
8817 dev_err(pci_dev_to_dev(pdev),
8818 "Unsupported Speed/Duplex configuration\n");
8826 case SPEED_10 + DUPLEX_HALF:
8827 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8829 case SPEED_10 + DUPLEX_FULL:
8830 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8832 case SPEED_100 + DUPLEX_HALF:
8833 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8835 case SPEED_100 + DUPLEX_FULL:
8836 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8838 case SPEED_1000 + DUPLEX_FULL:
8840 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8842 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8844 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8848 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8849 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8854 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8857 struct net_device *netdev = pci_get_drvdata(pdev);
8858 struct igb_adapter *adapter = netdev_priv(netdev);
8859 struct e1000_hw *hw = &adapter->hw;
8860 u32 ctrl, rctl, status;
8861 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8866 netif_device_detach(netdev);
8868 status = E1000_READ_REG(hw, E1000_STATUS);
8869 if (status & E1000_STATUS_LU)
8870 wufc &= ~E1000_WUFC_LNKC;
8872 if (netif_running(netdev))
8873 __igb_close(netdev, true);
8875 igb_clear_interrupt_scheme(adapter);
8878 retval = pci_save_state(pdev);
8884 igb_setup_rctl(adapter);
8885 igb_set_rx_mode(netdev);
8887 /* turn on all-multi mode if wake on multicast is enabled */
8888 if (wufc & E1000_WUFC_MC) {
8889 rctl = E1000_READ_REG(hw, E1000_RCTL);
8890 rctl |= E1000_RCTL_MPE;
8891 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8894 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8895 /* phy power management enable */
8896 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8897 ctrl |= E1000_CTRL_ADVD3WUC;
8898 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8900 /* Allow time for pending master requests to run */
8901 e1000_disable_pcie_master(hw);
8903 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8904 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8906 E1000_WRITE_REG(hw, E1000_WUC, 0);
8907 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8910 *enable_wake = wufc || adapter->en_mng_pt;
8912 igb_power_down_link(adapter);
8914 igb_power_up_link(adapter);
8916 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8917 * would have already happened in close and is redundant. */
8918 igb_release_hw_control(adapter);
8920 pci_disable_device(pdev);
8926 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8927 static int igb_suspend(struct device *dev)
8929 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8930 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8932 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8933 struct pci_dev *pdev = to_pci_dev(dev);
8934 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8938 retval = __igb_shutdown(pdev, &wake, 0);
8943 pci_prepare_to_sleep(pdev);
8945 pci_wake_from_d3(pdev, false);
8946 pci_set_power_state(pdev, PCI_D3hot);
8952 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8953 static int igb_resume(struct device *dev)
8955 static int igb_resume(struct pci_dev *pdev)
8956 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8958 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8959 struct pci_dev *pdev = to_pci_dev(dev);
8960 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8961 struct net_device *netdev = pci_get_drvdata(pdev);
8962 struct igb_adapter *adapter = netdev_priv(netdev);
8963 struct e1000_hw *hw = &adapter->hw;
8966 pci_set_power_state(pdev, PCI_D0);
8967 pci_restore_state(pdev);
8968 pci_save_state(pdev);
8970 err = pci_enable_device_mem(pdev);
8972 dev_err(pci_dev_to_dev(pdev),
8973 "igb: Cannot enable PCI device from suspend\n");
8976 pci_set_master(pdev);
8978 pci_enable_wake(pdev, PCI_D3hot, 0);
8979 pci_enable_wake(pdev, PCI_D3cold, 0);
8981 if (igb_init_interrupt_scheme(adapter, true)) {
8982 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8988 /* let the f/w know that the h/w is now under the control of the
8990 igb_get_hw_control(adapter);
8992 E1000_WRITE_REG(hw, E1000_WUS, ~0);
8994 if (netdev->flags & IFF_UP) {
8996 err = __igb_open(netdev, true);
9002 netif_device_attach(netdev);
9007 #ifdef CONFIG_PM_RUNTIME
9008 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9009 static int igb_runtime_idle(struct device *dev)
9011 struct pci_dev *pdev = to_pci_dev(dev);
9012 struct net_device *netdev = pci_get_drvdata(pdev);
9013 struct igb_adapter *adapter = netdev_priv(netdev);
9015 if (!igb_has_link(adapter))
9016 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9021 static int igb_runtime_suspend(struct device *dev)
9023 struct pci_dev *pdev = to_pci_dev(dev);
9027 retval = __igb_shutdown(pdev, &wake, 1);
9032 pci_prepare_to_sleep(pdev);
9034 pci_wake_from_d3(pdev, false);
9035 pci_set_power_state(pdev, PCI_D3hot);
9041 static int igb_runtime_resume(struct device *dev)
9043 return igb_resume(dev);
9045 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9046 #endif /* CONFIG_PM_RUNTIME */
9047 #endif /* CONFIG_PM */
9049 #ifdef USE_REBOOT_NOTIFIER
9050 /* only want to do this for 2.4 kernels? */
9051 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9054 struct pci_dev *pdev = NULL;
9061 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9062 if (pci_dev_driver(pdev) == &igb_driver) {
9063 __igb_shutdown(pdev, &wake, 0);
9064 if (event == SYS_POWER_OFF) {
9065 pci_wake_from_d3(pdev, wake);
9066 pci_set_power_state(pdev, PCI_D3hot);
9074 static void igb_shutdown(struct pci_dev *pdev)
9078 __igb_shutdown(pdev, &wake, 0);
9080 if (system_state == SYSTEM_POWER_OFF) {
9081 pci_wake_from_d3(pdev, wake);
9082 pci_set_power_state(pdev, PCI_D3hot);
9085 #endif /* USE_REBOOT_NOTIFIER */
9087 #ifdef CONFIG_NET_POLL_CONTROLLER
9089 * Polling 'interrupt' - used by things like netconsole to send skbs
9090 * without having to re-enable interrupts. It's not called while
9091 * the interrupt routine is executing.
9093 static void igb_netpoll(struct net_device *netdev)
9095 struct igb_adapter *adapter = netdev_priv(netdev);
9096 struct e1000_hw *hw = &adapter->hw;
9097 struct igb_q_vector *q_vector;
9100 for (i = 0; i < adapter->num_q_vectors; i++) {
9101 q_vector = adapter->q_vector[i];
9102 if (adapter->msix_entries)
9103 E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9105 igb_irq_disable(adapter);
9106 napi_schedule(&q_vector->napi);
9109 #endif /* CONFIG_NET_POLL_CONTROLLER */
9112 #define E1000_DEV_ID_82576_VF 0x10CA
9114 * igb_io_error_detected - called when PCI error is detected
9115 * @pdev: Pointer to PCI device
9116 * @state: The current pci connection state
9118 * This function is called after a PCI bus error affecting
9119 * this device has been detected.
9121 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9122 pci_channel_state_t state)
9124 struct net_device *netdev = pci_get_drvdata(pdev);
9125 struct igb_adapter *adapter = netdev_priv(netdev);
9127 #ifdef CONFIG_PCI_IOV__UNUSED
9128 struct pci_dev *bdev, *vfdev;
9129 u32 dw0, dw1, dw2, dw3;
9131 u16 req_id, pf_func;
9133 if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9134 goto skip_bad_vf_detection;
9136 bdev = pdev->bus->self;
9137 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9138 bdev = bdev->bus->self;
9141 goto skip_bad_vf_detection;
9143 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9145 goto skip_bad_vf_detection;
9147 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9148 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9149 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9150 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9153 /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9154 if (!(req_id & 0x0080))
9155 goto skip_bad_vf_detection;
9157 pf_func = req_id & 0x01;
9158 if ((pf_func & 1) == (pdev->devfn & 1)) {
9160 vf = (req_id & 0x7F) >> 1;
9161 dev_err(pci_dev_to_dev(pdev),
9162 "VF %d has caused a PCIe error\n", vf);
9163 dev_err(pci_dev_to_dev(pdev),
9164 "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9165 "%8.8x\tdw3: %8.8x\n",
9166 dw0, dw1, dw2, dw3);
9168 /* Find the pci device of the offending VF */
9169 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9170 E1000_DEV_ID_82576_VF, NULL);
9172 if (vfdev->devfn == (req_id & 0xFF))
9174 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9175 E1000_DEV_ID_82576_VF, vfdev);
9178 * There's a slim chance the VF could have been hot plugged,
9179 * so if it is no longer present we don't need to issue the
9180 * VFLR. Just clean up the AER in that case.
9183 dev_err(pci_dev_to_dev(pdev),
9184 "Issuing VFLR to VF %d\n", vf);
9185 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9188 pci_cleanup_aer_uncorrect_error_status(pdev);
9192 * Even though the error may have occurred on the other port
9193 * we still need to increment the vf error reference count for
9194 * both ports because the I/O resume function will be called
9197 adapter->vferr_refcount++;
9199 return PCI_ERS_RESULT_RECOVERED;
9201 skip_bad_vf_detection:
9202 #endif /* CONFIG_PCI_IOV */
9204 netif_device_detach(netdev);
9206 if (state == pci_channel_io_perm_failure)
9207 return PCI_ERS_RESULT_DISCONNECT;
9209 if (netif_running(netdev))
9211 pci_disable_device(pdev);
9213 /* Request a slot slot reset. */
9214 return PCI_ERS_RESULT_NEED_RESET;
9218 * igb_io_slot_reset - called after the pci bus has been reset.
9219 * @pdev: Pointer to PCI device
9221 * Restart the card from scratch, as if from a cold-boot. Implementation
9222 * resembles the first-half of the igb_resume routine.
9224 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9226 struct net_device *netdev = pci_get_drvdata(pdev);
9227 struct igb_adapter *adapter = netdev_priv(netdev);
9228 struct e1000_hw *hw = &adapter->hw;
9229 pci_ers_result_t result;
9231 if (pci_enable_device_mem(pdev)) {
9232 dev_err(pci_dev_to_dev(pdev),
9233 "Cannot re-enable PCI device after reset.\n");
9234 result = PCI_ERS_RESULT_DISCONNECT;
9236 pci_set_master(pdev);
9237 pci_restore_state(pdev);
9238 pci_save_state(pdev);
9240 pci_enable_wake(pdev, PCI_D3hot, 0);
9241 pci_enable_wake(pdev, PCI_D3cold, 0);
9243 schedule_work(&adapter->reset_task);
9244 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9245 result = PCI_ERS_RESULT_RECOVERED;
9248 pci_cleanup_aer_uncorrect_error_status(pdev);
9254 * igb_io_resume - called when traffic can start flowing again.
9255 * @pdev: Pointer to PCI device
9257 * This callback is called when the error recovery driver tells us that
9258 * its OK to resume normal operation. Implementation resembles the
9259 * second-half of the igb_resume routine.
9261 static void igb_io_resume(struct pci_dev *pdev)
9263 struct net_device *netdev = pci_get_drvdata(pdev);
9264 struct igb_adapter *adapter = netdev_priv(netdev);
9266 if (adapter->vferr_refcount) {
9267 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9268 adapter->vferr_refcount--;
9272 if (netif_running(netdev)) {
9273 if (igb_up(adapter)) {
9274 dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9279 netif_device_attach(netdev);
9281 /* let the f/w know that the h/w is now under the control of the
9283 igb_get_hw_control(adapter);
9286 #endif /* HAVE_PCI_ERS */
9288 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9290 struct e1000_hw *hw = &adapter->hw;
9293 if (is_zero_ether_addr(addr))
9296 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9297 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9299 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9300 IGB_MAC_STATE_IN_USE);
9301 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9302 adapter->mac_table[i].queue = queue;
9303 igb_sync_mac_table(adapter);
9308 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9310 /* search table for addr, if found, set to 0 and sync */
9312 struct e1000_hw *hw = &adapter->hw;
9314 if (is_zero_ether_addr(addr))
9316 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9317 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9318 adapter->mac_table[i].queue == queue) {
9319 adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9320 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9321 adapter->mac_table[i].queue = 0;
9322 igb_sync_mac_table(adapter);
9328 static int igb_set_vf_mac(struct igb_adapter *adapter,
9329 int vf, unsigned char *mac_addr)
9331 igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9332 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9334 igb_add_mac_filter(adapter, mac_addr, vf);
9340 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9342 struct igb_adapter *adapter = netdev_priv(netdev);
9343 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9345 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9346 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9347 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9348 " change effective.\n");
9349 if (test_bit(__IGB_DOWN, &adapter->state)) {
9350 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9351 " but the PF device is not up.\n");
9352 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9353 " attempting to use the VF device.\n");
9355 return igb_set_vf_mac(adapter, vf, mac);
9358 static int igb_link_mbps(int internal_link_speed)
9360 switch (internal_link_speed) {
9372 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9379 /* Calculate the rate factor values to set */
9380 rf_int = link_speed / tx_rate;
9381 rf_dec = (link_speed - (rf_int * tx_rate));
9382 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9384 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9385 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9386 E1000_RTTBCNRC_RF_INT_MASK);
9387 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9392 E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9394 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9395 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9397 E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9398 E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9401 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9403 int actual_link_speed, i;
9404 bool reset_rate = false;
9406 /* VF TX rate limit was not set */
9407 if ((adapter->vf_rate_link_speed == 0) ||
9408 (adapter->hw.mac.type != e1000_82576))
9411 actual_link_speed = igb_link_mbps(adapter->link_speed);
9412 if (actual_link_speed != adapter->vf_rate_link_speed) {
9414 adapter->vf_rate_link_speed = 0;
9415 dev_info(&adapter->pdev->dev,
9416 "Link speed has been changed. VF Transmit rate is disabled\n");
9419 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9421 adapter->vf_data[i].tx_rate = 0;
9423 igb_set_vf_rate_limit(&adapter->hw, i,
9424 adapter->vf_data[i].tx_rate, actual_link_speed);
9428 #ifdef HAVE_VF_MIN_MAX_TXRATE
9429 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9431 #else /* HAVE_VF_MIN_MAX_TXRATE */
9432 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9433 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9435 struct igb_adapter *adapter = netdev_priv(netdev);
9436 struct e1000_hw *hw = &adapter->hw;
9437 int actual_link_speed;
9439 if (hw->mac.type != e1000_82576)
9442 #ifdef HAVE_VF_MIN_MAX_TXRATE
9445 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9447 actual_link_speed = igb_link_mbps(adapter->link_speed);
9448 if ((vf >= adapter->vfs_allocated_count) ||
9449 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9450 (tx_rate < 0) || (tx_rate > actual_link_speed))
9453 adapter->vf_rate_link_speed = actual_link_speed;
9454 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9455 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9460 static int igb_ndo_get_vf_config(struct net_device *netdev,
9461 int vf, struct ifla_vf_info *ivi)
9463 struct igb_adapter *adapter = netdev_priv(netdev);
9464 if (vf >= adapter->vfs_allocated_count)
9467 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9468 #ifdef HAVE_VF_MIN_MAX_TXRATE
9469 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9470 ivi->min_tx_rate = 0;
9471 #else /* HAVE_VF_MIN_MAX_TXRATE */
9472 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9473 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9474 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9475 ivi->qos = adapter->vf_data[vf].pf_qos;
9476 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9477 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9482 static void igb_vmm_control(struct igb_adapter *adapter)
9484 struct e1000_hw *hw = &adapter->hw;
9488 switch (hw->mac.type) {
9491 /* replication is not supported for 82575 */
9494 /* notify HW that the MAC is adding vlan tags */
9495 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9496 reg |= (E1000_DTXCTL_VLAN_ADDED |
9497 E1000_DTXCTL_SPOOF_INT);
9498 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9500 /* enable replication vlan tag stripping */
9501 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9502 reg |= E1000_RPLOLR_STRVLAN;
9503 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9506 /* none of the above registers are supported by i350 */
9510 /* Enable Malicious Driver Detection */
9511 if ((adapter->vfs_allocated_count) &&
9513 if (hw->mac.type == e1000_i350)
9514 igb_enable_mdd(adapter);
9517 /* enable replication and loopback support */
9518 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9519 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9520 e1000_vmdq_set_loopback_pf(hw, 1);
9521 e1000_vmdq_set_anti_spoofing_pf(hw,
9522 adapter->vfs_allocated_count || adapter->vmdq_pools,
9523 adapter->vfs_allocated_count);
9524 e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9525 adapter->vmdq_pools);
9528 static void igb_init_fw(struct igb_adapter *adapter)
9530 struct e1000_fw_drv_info fw_cmd;
9531 struct e1000_hw *hw = &adapter->hw;
9535 if (hw->mac.type == e1000_i210)
9536 mask = E1000_SWFW_EEP_SM;
9538 mask = E1000_SWFW_PHY0_SM;
9539 /* i211 parts do not support this feature */
9540 if (hw->mac.type == e1000_i211)
9541 hw->mac.arc_subsystem_valid = false;
9543 if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9544 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9545 E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9546 fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9547 fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9548 fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9549 fw_cmd.port_num = hw->bus.func;
9550 fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9551 fw_cmd.hdr.checksum = 0;
9552 fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9554 fw_cmd.hdr.buf_len));
9555 e1000_host_interface_command(hw, (u8*)&fw_cmd,
9557 if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9561 dev_warn(pci_dev_to_dev(adapter->pdev),
9562 "Unable to get semaphore, firmware init failed.\n");
9563 hw->mac.ops.release_swfw_sync(hw, mask);
9566 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9568 struct e1000_hw *hw = &adapter->hw;
9573 if (hw->mac.type == e1000_i211)
9576 if (hw->mac.type > e1000_82580) {
9577 if (adapter->dmac != IGB_DMAC_DISABLE) {
9580 /* force threshold to 0. */
9581 E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9584 * DMA Coalescing high water mark needs to be greater
9585 * than the Rx threshold. Set hwm to PBA - max frame
9586 * size in 16B units, capping it at PBA - 6KB.
9588 hwm = 64 * pba - adapter->max_frame_size / 16;
9589 if (hwm < 64 * (pba - 6))
9590 hwm = 64 * (pba - 6);
9591 reg = E1000_READ_REG(hw, E1000_FCRTC);
9592 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9593 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9594 & E1000_FCRTC_RTH_COAL_MASK);
9595 E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9598 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9599 * frame size, capping it at PBA - 10KB.
9601 dmac_thr = pba - adapter->max_frame_size / 512;
9602 if (dmac_thr < pba - 10)
9603 dmac_thr = pba - 10;
9604 reg = E1000_READ_REG(hw, E1000_DMACR);
9605 reg &= ~E1000_DMACR_DMACTHR_MASK;
9606 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9607 & E1000_DMACR_DMACTHR_MASK);
9609 /* transition to L0x or L1 if available..*/
9610 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9612 /* Check if status is 2.5Gb backplane connection
9613 * before configuration of watchdog timer, which is
9614 * in msec values in 12.8usec intervals
9615 * watchdog timer= msec values in 32usec intervals
9616 * for non 2.5Gb connection
9618 if (hw->mac.type == e1000_i354) {
9619 status = E1000_READ_REG(hw, E1000_STATUS);
9620 if ((status & E1000_STATUS_2P5_SKU) &&
9621 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9622 reg |= ((adapter->dmac * 5) >> 6);
9624 reg |= ((adapter->dmac) >> 5);
9626 reg |= ((adapter->dmac) >> 5);
9630 * Disable BMC-to-OS Watchdog enable
9631 * on devices that support OS-to-BMC
9633 if (hw->mac.type != e1000_i354)
9634 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9635 E1000_WRITE_REG(hw, E1000_DMACR, reg);
9637 /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9638 E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9640 /* This sets the time to wait before requesting
9641 * transition to low power state to number of usecs
9642 * needed to receive 1 512 byte frame at gigabit
9643 * line rate. On i350 device, time to make transition
9644 * to Lx state is delayed by 4 usec with flush disable
9645 * bit set to avoid losing mailbox interrupts
9647 reg = E1000_READ_REG(hw, E1000_DMCTLX);
9648 if (hw->mac.type == e1000_i350)
9649 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9651 /* in 2.5Gb connection, TTLX unit is 0.4 usec
9652 * which is 0x4*2 = 0xA. But delay is still 4 usec
9654 if (hw->mac.type == e1000_i354) {
9655 status = E1000_READ_REG(hw, E1000_STATUS);
9656 if ((status & E1000_STATUS_2P5_SKU) &&
9657 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9664 E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9666 /* free space in tx packet buffer to wake from DMA coal */
9667 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9668 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9670 /* make low power state decision controlled by DMA coal */
9671 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9672 reg &= ~E1000_PCIEMISC_LX_DECISION;
9673 E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9674 } /* endif adapter->dmac is not disabled */
9675 } else if (hw->mac.type == e1000_82580) {
9676 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9677 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9678 reg & ~E1000_PCIEMISC_LX_DECISION);
9679 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9683 #ifdef HAVE_I2C_SUPPORT
9684 /* igb_read_i2c_byte - Reads 8 bit word over I2C
9685 * @hw: pointer to hardware structure
9686 * @byte_offset: byte offset to read
9687 * @dev_addr: device address
9690 * Performs byte read operation over I2C interface at
9691 * a specified device address.
9693 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9694 u8 dev_addr, u8 *data)
9696 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9697 struct i2c_client *this_client = adapter->i2c_client;
9702 return E1000_ERR_I2C;
9704 swfw_mask = E1000_SWFW_PHY0_SM;
9706 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9708 return E1000_ERR_SWFW_SYNC;
9710 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9711 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9714 return E1000_ERR_I2C;
9717 return E1000_SUCCESS;
9721 /* igb_write_i2c_byte - Writes 8 bit word over I2C
9722 * @hw: pointer to hardware structure
9723 * @byte_offset: byte offset to write
9724 * @dev_addr: device address
9725 * @data: value to write
9727 * Performs byte write operation over I2C interface at
9728 * a specified device address.
9730 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9731 u8 dev_addr, u8 data)
9733 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9734 struct i2c_client *this_client = adapter->i2c_client;
9736 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9739 return E1000_ERR_I2C;
9741 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9742 return E1000_ERR_SWFW_SYNC;
9743 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9744 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9747 return E1000_ERR_I2C;
9749 return E1000_SUCCESS;
9751 #endif /* HAVE_I2C_SUPPORT */
9756 * igb_probe - Device Initialization Routine
9757 * @pdev: PCI device information struct
9758 * @ent: entry in igb_pci_tbl
9760 * Returns 0 on success, negative on failure
9762 * igb_probe initializes an adapter identified by a pci_dev structure.
9763 * The OS initialization, configuring of the adapter private structure,
9764 * and a hardware reset occur.
9766 int igb_kni_probe(struct pci_dev *pdev,
9767 struct net_device **lad_dev)
9769 struct net_device *netdev;
9770 struct igb_adapter *adapter;
9771 struct e1000_hw *hw;
9772 u16 eeprom_data = 0;
9773 u8 pba_str[E1000_PBANUM_LENGTH];
9775 static int global_quad_port_a; /* global quad port a indication */
9776 int i, err, pci_using_dac = 0;
9777 static int cards_found;
9779 err = pci_enable_device_mem(pdev);
9785 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9787 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9791 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9793 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9795 IGB_ERR("No usable DMA configuration, "
9802 #ifndef HAVE_ASPM_QUIRKS
9803 /* 82575 requires that the pci-e link partner disable the L0s state */
9804 switch (pdev->device) {
9805 case E1000_DEV_ID_82575EB_COPPER:
9806 case E1000_DEV_ID_82575EB_FIBER_SERDES:
9807 case E1000_DEV_ID_82575GB_QUAD_COPPER:
9808 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9813 #endif /* HAVE_ASPM_QUIRKS */
9814 err = pci_request_selected_regions(pdev,
9815 pci_select_bars(pdev,
9821 pci_enable_pcie_error_reporting(pdev);
9823 pci_set_master(pdev);
9828 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9831 netdev = alloc_etherdev(sizeof(struct igb_adapter));
9832 #endif /* HAVE_TX_MQ */
9834 goto err_alloc_etherdev;
9836 SET_MODULE_OWNER(netdev);
9837 SET_NETDEV_DEV(netdev, &pdev->dev);
9839 //pci_set_drvdata(pdev, netdev);
9840 adapter = netdev_priv(netdev);
9841 adapter->netdev = netdev;
9842 adapter->pdev = pdev;
9845 adapter->port_num = hw->bus.func;
9846 adapter->msg_enable = (1 << debug) - 1;
9849 err = pci_save_state(pdev);
9854 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9855 pci_resource_len(pdev, 0));
9859 #ifdef HAVE_NET_DEVICE_OPS
9860 netdev->netdev_ops = &igb_netdev_ops;
9861 #else /* HAVE_NET_DEVICE_OPS */
9862 netdev->open = &igb_open;
9863 netdev->stop = &igb_close;
9864 netdev->get_stats = &igb_get_stats;
9865 #ifdef HAVE_SET_RX_MODE
9866 netdev->set_rx_mode = &igb_set_rx_mode;
9868 netdev->set_multicast_list = &igb_set_rx_mode;
9869 netdev->set_mac_address = &igb_set_mac;
9870 netdev->change_mtu = &igb_change_mtu;
9871 netdev->do_ioctl = &igb_ioctl;
9872 #ifdef HAVE_TX_TIMEOUT
9873 netdev->tx_timeout = &igb_tx_timeout;
9875 netdev->vlan_rx_register = igb_vlan_mode;
9876 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9877 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9878 #ifdef CONFIG_NET_POLL_CONTROLLER
9879 netdev->poll_controller = igb_netpoll;
9881 netdev->hard_start_xmit = &igb_xmit_frame;
9882 #endif /* HAVE_NET_DEVICE_OPS */
9883 igb_set_ethtool_ops(netdev);
9884 #ifdef HAVE_TX_TIMEOUT
9885 netdev->watchdog_timeo = 5 * HZ;
9888 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9890 adapter->bd_number = cards_found;
9892 /* setup the private structure */
9893 err = igb_sw_init(adapter);
9897 e1000_get_bus_info(hw);
9899 hw->phy.autoneg_wait_to_complete = FALSE;
9900 hw->mac.adaptive_ifs = FALSE;
9902 /* Copper options */
9903 if (hw->phy.media_type == e1000_media_type_copper) {
9904 hw->phy.mdix = AUTO_ALL_MODES;
9905 hw->phy.disable_polarity_correction = FALSE;
9906 hw->phy.ms_type = e1000_ms_hw_default;
9909 if (e1000_check_reset_block(hw))
9910 dev_info(pci_dev_to_dev(pdev),
9911 "PHY reset is blocked due to SOL/IDER session.\n");
9914 * features is initialized to 0 in allocation, it might have bits
9915 * set by igb_sw_init so we should use an or instead of an
9918 netdev->features |= NETIF_F_SG |
9920 #ifdef NETIF_F_IPV6_CSUM
9928 #endif /* NETIF_F_TSO */
9929 #ifdef NETIF_F_RXHASH
9933 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9934 NETIF_F_HW_VLAN_CTAG_RX |
9935 NETIF_F_HW_VLAN_CTAG_TX;
9937 NETIF_F_HW_VLAN_RX |
9941 if (hw->mac.type >= e1000_82576)
9942 netdev->features |= NETIF_F_SCTP_CSUM;
9944 #ifdef HAVE_NDO_SET_FEATURES
9945 /* copy netdev features into list of user selectable features */
9946 netdev->hw_features |= netdev->features;
9949 /* give us the option of enabling LRO later */
9950 netdev->hw_features |= NETIF_F_LRO;
9955 /* this is only needed on kernels prior to 2.6.39 */
9956 netdev->features |= NETIF_F_GRO;
9960 /* set this bit last since it cannot be part of hw_features */
9961 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9962 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9964 netdev->features |= NETIF_F_HW_VLAN_FILTER;
9967 #ifdef HAVE_NETDEV_VLAN_FEATURES
9968 netdev->vlan_features |= NETIF_F_TSO |
9976 netdev->features |= NETIF_F_HIGHDMA;
9979 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9981 if (adapter->dmac != IGB_DMAC_DISABLE)
9982 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9985 /* before reading the NVM, reset the controller to put the device in a
9986 * known good starting state */
9990 /* make sure the NVM is good */
9991 if (e1000_validate_nvm_checksum(hw) < 0) {
9992 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9998 /* copy the MAC address out of the NVM */
9999 if (e1000_read_mac_addr(hw))
10000 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10001 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10002 #ifdef ETHTOOL_GPERMADDR
10003 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10005 if (!is_valid_ether_addr(netdev->perm_addr)) {
10007 if (!is_valid_ether_addr(netdev->dev_addr)) {
10009 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10014 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10015 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10016 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10017 igb_rar_set(adapter, 0);
10019 /* get firmware version for ethtool -i */
10020 igb_set_fw_version(adapter);
10022 /* Check if Media Autosense is enabled */
10023 if (hw->mac.type == e1000_82580)
10024 igb_init_mas(adapter);
10027 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10028 (unsigned long) adapter);
10029 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10030 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10031 (unsigned long) adapter);
10032 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10033 (unsigned long) adapter);
10035 INIT_WORK(&adapter->reset_task, igb_reset_task);
10036 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10037 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10038 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10041 /* Initialize link properties that are user-changeable */
10042 adapter->fc_autoneg = true;
10043 hw->mac.autoneg = true;
10044 hw->phy.autoneg_advertised = 0x2f;
10046 hw->fc.requested_mode = e1000_fc_default;
10047 hw->fc.current_mode = e1000_fc_default;
10049 e1000_validate_mdi_setting(hw);
10051 /* By default, support wake on port A */
10052 if (hw->bus.func == 0)
10053 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10055 /* Check the NVM for wake support for non-port A ports */
10056 if (hw->mac.type >= e1000_82580)
10057 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10058 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10060 else if (hw->bus.func == 1)
10061 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10063 if (eeprom_data & IGB_EEPROM_APME)
10064 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10066 /* now that we have the eeprom settings, apply the special cases where
10067 * the eeprom may be wrong or the board simply won't support wake on
10068 * lan on a particular port */
10069 switch (pdev->device) {
10070 case E1000_DEV_ID_82575GB_QUAD_COPPER:
10071 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10073 case E1000_DEV_ID_82575EB_FIBER_SERDES:
10074 case E1000_DEV_ID_82576_FIBER:
10075 case E1000_DEV_ID_82576_SERDES:
10076 /* Wake events only supported on port A for dual fiber
10077 * regardless of eeprom setting */
10078 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10079 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10081 case E1000_DEV_ID_82576_QUAD_COPPER:
10082 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10083 /* if quad port adapter, disable WoL on all but port A */
10084 if (global_quad_port_a != 0)
10085 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10087 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10088 /* Reset for multiple quad port adapters */
10089 if (++global_quad_port_a == 4)
10090 global_quad_port_a = 0;
10093 /* If the device can't wake, don't set software support */
10094 if (!device_can_wakeup(&adapter->pdev->dev))
10095 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10099 /* initialize the wol settings based on the eeprom settings */
10100 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10101 adapter->wol |= E1000_WUFC_MAG;
10103 /* Some vendors want WoL disabled by default, but still supported */
10104 if ((hw->mac.type == e1000_i350) &&
10105 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10106 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10111 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10112 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10114 /* reset the hardware with the new settings */
10115 igb_reset(adapter);
10116 adapter->devrc = 0;
10118 #ifdef HAVE_I2C_SUPPORT
10119 /* Init the I2C interface */
10120 err = igb_init_i2c(adapter);
10122 dev_err(&pdev->dev, "failed to init i2c interface\n");
10125 #endif /* HAVE_I2C_SUPPORT */
10127 /* let the f/w know that the h/w is now under the control of the
10129 igb_get_hw_control(adapter);
10131 strncpy(netdev->name, "eth%d", IFNAMSIZ);
10132 err = register_netdev(netdev);
10136 #ifdef CONFIG_IGB_VMDQ_NETDEV
10137 err = igb_init_vmdq_netdevs(adapter);
10141 /* carrier off reporting is important to ethtool even BEFORE open */
10142 netif_carrier_off(netdev);
10145 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10146 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10147 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10148 igb_setup_dca(adapter);
10152 #ifdef HAVE_PTP_1588_CLOCK
10153 /* do hw tstamp init after resetting */
10154 igb_ptp_init(adapter);
10155 #endif /* HAVE_PTP_1588_CLOCK */
10157 #endif /* NO_KNI */
10158 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10159 /* print bus type/speed/width info */
10160 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10162 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10163 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10164 (hw->mac.type == e1000_i354) ? "integrated" :
10166 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10167 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10168 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10169 (hw->mac.type == e1000_i354) ? "integrated" :
10171 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10172 for (i = 0; i < 6; i++)
10173 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10175 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10177 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10178 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10182 /* Initialize the thermal sensor on i350 devices. */
10183 if (hw->mac.type == e1000_i350) {
10184 if (hw->bus.func == 0) {
10188 * Read the NVM to determine if this i350 device
10189 * supports an external thermal sensor.
10191 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10192 if (ets_word != 0x0000 && ets_word != 0xFFFF)
10193 adapter->ets = true;
10195 adapter->ets = false;
10200 igb_sysfs_init(adapter);
10204 igb_procfs_init(adapter);
10205 #endif /* IGB_PROCFS */
10206 #endif /* IGB_HWMON */
10207 #endif /* NO_KNI */
10209 adapter->ets = false;
10212 if (hw->phy.media_type == e1000_media_type_copper) {
10213 switch (hw->mac.type) {
10217 /* Enable EEE for internal copper PHY devices */
10218 err = e1000_set_eee_i350(hw);
10220 (adapter->flags & IGB_FLAG_EEE))
10221 adapter->eee_advert =
10222 MDIO_EEE_100TX | MDIO_EEE_1000T;
10225 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10226 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10227 err = e1000_set_eee_i354(hw);
10229 (adapter->flags & IGB_FLAG_EEE))
10230 adapter->eee_advert =
10231 MDIO_EEE_100TX | MDIO_EEE_1000T;
10239 /* send driver version info to firmware */
10240 if (hw->mac.type >= e1000_i350)
10241 igb_init_fw(adapter);
10244 if (netdev->features & NETIF_F_LRO)
10245 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10247 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10249 dev_info(pci_dev_to_dev(pdev),
10250 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10251 adapter->msix_entries ? "MSI-X" :
10252 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10253 adapter->num_rx_queues, adapter->num_tx_queues);
10258 pm_runtime_put_noidle(&pdev->dev);
10262 // igb_release_hw_control(adapter);
10263 #ifdef HAVE_I2C_SUPPORT
10264 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10265 #endif /* HAVE_I2C_SUPPORT */
10267 // if (!e1000_check_reset_block(hw))
10268 // e1000_phy_hw_reset(hw);
10270 if (hw->flash_address)
10271 iounmap(hw->flash_address);
10273 // igb_clear_interrupt_scheme(adapter);
10274 // igb_reset_sriov_capability(adapter);
10275 iounmap(hw->hw_addr);
10277 free_netdev(netdev);
10278 err_alloc_etherdev:
10279 // pci_release_selected_regions(pdev,
10280 // pci_select_bars(pdev, IORESOURCE_MEM));
10283 pci_disable_device(pdev);
10288 void igb_kni_remove(struct pci_dev *pdev)
10290 pci_disable_device(pdev);