lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "LICENSE.GPL".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 const struct pci_device_id igb_pci_tbl[] = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198                                 int vf, u16 vlan, u8 qos);
 199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 201                                 bool setting);
 202 #endif
 203 #ifdef HAVE_VF_MIN_MAX_TXRATE
 204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 205 #else /* HAVE_VF_MIN_MAX_TXRATE */
 206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 209                                  struct ifla_vf_info *ivi);
 210 static void igb_check_vf_rate_limit(struct igb_adapter *);
 211 #endif
 212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 213 #ifdef CONFIG_PM
 214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 215 static int igb_suspend(struct device *dev);
 216 static int igb_resume(struct device *dev);
 217 #ifdef CONFIG_PM_RUNTIME
 218 static int igb_runtime_suspend(struct device *dev);
 219 static int igb_runtime_resume(struct device *dev);
 220 static int igb_runtime_idle(struct device *dev);
 221 #endif /* CONFIG_PM_RUNTIME */
 222 static const struct dev_pm_ops igb_pm_ops = {
 223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 224         .suspend = igb_suspend,
 225         .resume = igb_resume,
 226         .freeze = igb_suspend,
 227         .thaw = igb_resume,
 228         .poweroff = igb_suspend,
 229         .restore = igb_resume,
 230 #ifdef CONFIG_PM_RUNTIME
 231         .runtime_suspend = igb_runtime_suspend,
 232         .runtime_resume = igb_runtime_resume,
 233         .runtime_idle = igb_runtime_idle,
 234 #endif
 235 #else /* Linux >= 2.6.34 */
 236         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 237 #ifdef CONFIG_PM_RUNTIME
 238         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 239                         igb_runtime_idle)
 240 #endif /* CONFIG_PM_RUNTIME */
 241 #endif /* Linux version */
 242 };
 243 #else
 244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 245 static int igb_resume(struct pci_dev *pdev);
 246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 247 #endif /* CONFIG_PM */
 248 #ifndef USE_REBOOT_NOTIFIER
 249 static void igb_shutdown(struct pci_dev *);
 250 #else
 251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 252 static struct notifier_block igb_notifier_reboot = {
 253         .notifier_call  = igb_notify_reboot,
 254         .next           = NULL,
 255         .priority       = 0
 256 };
 257 #endif
 258 #ifdef IGB_DCA
 259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 260 static struct notifier_block dca_notifier = {
 261         .notifier_call  = igb_notify_dca,
 262         .next           = NULL,
 263         .priority       = 0
 264 };
 265 #endif
 266 #ifdef CONFIG_NET_POLL_CONTROLLER
 267 /* for netdump / net console */
 268 static void igb_netpoll(struct net_device *);
 269 #endif
 270
 271 #ifdef HAVE_PCI_ERS
 272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 273                      pci_channel_state_t);
 274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 275 static void igb_io_resume(struct pci_dev *);
 276
 277 static struct pci_error_handlers igb_err_handler = {
 278         .error_detected = igb_io_error_detected,
 279         .slot_reset = igb_io_slot_reset,
 280         .resume = igb_io_resume,
 281 };
 282 #endif
 283
 284 static void igb_init_fw(struct igb_adapter *adapter);
 285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 286
 287 static struct pci_driver igb_driver = {
 288         .name     = igb_driver_name,
 289         .id_table = igb_pci_tbl,
 290         .probe    = igb_probe,
 291         .remove   = __devexit_p(igb_remove),
 292 #ifdef CONFIG_PM
 293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 294         .driver.pm = &igb_pm_ops,
 295 #else
 296         .suspend  = igb_suspend,
 297         .resume   = igb_resume,
 298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 299 #endif /* CONFIG_PM */
 300 #ifndef USE_REBOOT_NOTIFIER
 301         .shutdown = igb_shutdown,
 302 #endif
 303 #ifdef HAVE_PCI_ERS
 304         .err_handler = &igb_err_handler
 305 #endif
 306 };
 307
 308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 310 //MODULE_LICENSE("GPL");
 311 //MODULE_VERSION(DRV_VERSION);
 312
 313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 314 {
 315         struct e1000_hw *hw = &adapter->hw;
 316         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 317         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 318         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 319         u32 vfta;
 320
 321         /*
 322          * if this is the management vlan the only option is to add it in so
 323          * that the management pass through will continue to work
 324          */
 325         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 326             (vid == mng_cookie->vlan_id))
 327                 add = TRUE;
 328
 329         vfta = adapter->shadow_vfta[index];
 330
 331         if (add)
 332                 vfta |= mask;
 333         else
 334                 vfta &= ~mask;
 335
 336         e1000_write_vfta(hw, index, vfta);
 337         adapter->shadow_vfta[index] = vfta;
 338 }
 339
 340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 341 //module_param(debug, int, 0);
 342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 343
 344 /**
 345  * igb_init_module - Driver Registration Routine
 346  *
 347  * igb_init_module is the first routine called when the driver is
 348  * loaded. All it does is register with the PCI subsystem.
 349  **/
 350 static int __init igb_init_module(void)
 351 {
 352         int ret;
 353
 354         printk(KERN_INFO "%s - version %s\n",
 355                igb_driver_string, igb_driver_version);
 356
 357         printk(KERN_INFO "%s\n", igb_copyright);
 358 #ifdef IGB_HWMON
 359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 360 #else
 361 #ifdef IGB_PROCFS
 362         if (igb_procfs_topdir_init())
 363                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 364 #endif /* IGB_PROCFS */
 365 #endif /* IGB_HWMON  */
 366
 367 #ifdef IGB_DCA
 368         dca_register_notify(&dca_notifier);
 369 #endif
 370         ret = pci_register_driver(&igb_driver);
 371 #ifdef USE_REBOOT_NOTIFIER
 372         if (ret >= 0) {
 373                 register_reboot_notifier(&igb_notifier_reboot);
 374         }
 375 #endif
 376         return ret;
 377 }
 378
 379 #undef module_init
 380 #define module_init(x) static int x(void)  __attribute__((__unused__));
 381 module_init(igb_init_module);
 382
 383 /**
 384  * igb_exit_module - Driver Exit Cleanup Routine
 385  *
 386  * igb_exit_module is called just before the driver is removed
 387  * from memory.
 388  **/
 389 static void __exit igb_exit_module(void)
 390 {
 391 #ifdef IGB_DCA
 392         dca_unregister_notify(&dca_notifier);
 393 #endif
 394 #ifdef USE_REBOOT_NOTIFIER
 395         unregister_reboot_notifier(&igb_notifier_reboot);
 396 #endif
 397         pci_unregister_driver(&igb_driver);
 398
 399 #ifdef IGB_HWMON
 400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 401 #else
 402 #ifdef IGB_PROCFS
 403         igb_procfs_topdir_exit();
 404 #endif /* IGB_PROCFS */
 405 #endif /* IGB_HWMON */
 406 }
 407
 408 #undef module_exit
 409 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 410 module_exit(igb_exit_module);
 411
 412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 413 /**
 414  * igb_cache_ring_register - Descriptor ring to register mapping
 415  * @adapter: board private structure to initialize
 416  *
 417  * Once we know the feature-set enabled for the device, we'll cache
 418  * the register offset the descriptor ring is assigned to.
 419  **/
 420 static void igb_cache_ring_register(struct igb_adapter *adapter)
 421 {
 422         int i = 0, j = 0;
 423         u32 rbase_offset = adapter->vfs_allocated_count;
 424
 425         switch (adapter->hw.mac.type) {
 426         case e1000_82576:
 427                 /* The queues are allocated for virtualization such that VF 0
 428                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 429                  * In order to avoid collision we start at the first free queue
 430                  * and continue consuming queues in the same sequence
 431                  */
 432                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 433                         for (; i < adapter->rss_queues; i++)
 434                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 435                                                                Q_IDX_82576(i);
 436                 }
 437         case e1000_82575:
 438         case e1000_82580:
 439         case e1000_i350:
 440         case e1000_i354:
 441         case e1000_i210:
 442         case e1000_i211:
 443         default:
 444                 for (; i < adapter->num_rx_queues; i++)
 445                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 446                 for (; j < adapter->num_tx_queues; j++)
 447                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 448                 break;
 449         }
 450 }
 451
 452 static void igb_configure_lli(struct igb_adapter *adapter)
 453 {
 454         struct e1000_hw *hw = &adapter->hw;
 455         u16 port;
 456
 457         /* LLI should only be enabled for MSI-X or MSI interrupts */
 458         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 459                 return;
 460
 461         if (adapter->lli_port) {
 462                 /* use filter 0 for port */
 463                 port = htons((u16)adapter->lli_port);
 464                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 465                         (port | E1000_IMIR_PORT_IM_EN));
 466                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 467                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 468         }
 469
 470         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 471                 /* use filter 1 for push flag */
 472                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 473                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 474                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 475                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 476         }
 477
 478         if (adapter->lli_size) {
 479                 /* use filter 2 for size */
 480                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 481                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 482                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 483                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 484         }
 485
 486 }
 487
 488 /**
 489  *  igb_write_ivar - configure ivar for given MSI-X vector
 490  *  @hw: pointer to the HW structure
 491  *  @msix_vector: vector number we are allocating to a given ring
 492  *  @index: row index of IVAR register to write within IVAR table
 493  *  @offset: column offset of in IVAR, should be multiple of 8
 494  *
 495  *  This function is intended to handle the writing of the IVAR register
 496  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 497  *  each containing an cause allocation for an Rx and Tx ring, and a
 498  *  variable number of rows depending on the number of queues supported.
 499  **/
 500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 501                            int index, int offset)
 502 {
 503         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 504
 505         /* clear any bits that are currently set */
 506         ivar &= ~((u32)0xFF << offset);
 507
 508         /* write vector and valid bit */
 509         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 510
 511         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 512 }
 513
 514 #define IGB_N0_QUEUE -1
 515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 516 {
 517         struct igb_adapter *adapter = q_vector->adapter;
 518         struct e1000_hw *hw = &adapter->hw;
 519         int rx_queue = IGB_N0_QUEUE;
 520         int tx_queue = IGB_N0_QUEUE;
 521         u32 msixbm = 0;
 522
 523         if (q_vector->rx.ring)
 524                 rx_queue = q_vector->rx.ring->reg_idx;
 525         if (q_vector->tx.ring)
 526                 tx_queue = q_vector->tx.ring->reg_idx;
 527
 528         switch (hw->mac.type) {
 529         case e1000_82575:
 530                 /* The 82575 assigns vectors using a bitmask, which matches the
 531                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 532                    or more queues to a vector, we write the appropriate bits
 533                    into the MSIXBM register for that vector. */
 534                 if (rx_queue > IGB_N0_QUEUE)
 535                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 536                 if (tx_queue > IGB_N0_QUEUE)
 537                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 538                 if (!adapter->msix_entries && msix_vector == 0)
 539                         msixbm |= E1000_EIMS_OTHER;
 540                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 541                 q_vector->eims_value = msixbm;
 542                 break;
 543         case e1000_82576:
 544                 /*
 545                  * 82576 uses a table that essentially consists of 2 columns
 546                  * with 8 rows.  The ordering is column-major so we use the
 547                  * lower 3 bits as the row index, and the 4th bit as the
 548                  * column offset.
 549                  */
 550                 if (rx_queue > IGB_N0_QUEUE)
 551                         igb_write_ivar(hw, msix_vector,
 552                                        rx_queue & 0x7,
 553                                        (rx_queue & 0x8) << 1);
 554                 if (tx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        tx_queue & 0x7,
 557                                        ((tx_queue & 0x8) << 1) + 8);
 558                 q_vector->eims_value = 1 << msix_vector;
 559                 break;
 560         case e1000_82580:
 561         case e1000_i350:
 562         case e1000_i354:
 563         case e1000_i210:
 564         case e1000_i211:
 565                 /*
 566                  * On 82580 and newer adapters the scheme is similar to 82576
 567                  * however instead of ordering column-major we have things
 568                  * ordered row-major.  So we traverse the table by using
 569                  * bit 0 as the column offset, and the remaining bits as the
 570                  * row index.
 571                  */
 572                 if (rx_queue > IGB_N0_QUEUE)
 573                         igb_write_ivar(hw, msix_vector,
 574                                        rx_queue >> 1,
 575                                        (rx_queue & 0x1) << 4);
 576                 if (tx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        tx_queue >> 1,
 579                                        ((tx_queue & 0x1) << 4) + 8);
 580                 q_vector->eims_value = 1 << msix_vector;
 581                 break;
 582         default:
 583                 BUG();
 584                 break;
 585         }
 586
 587         /* add q_vector eims value to global eims_enable_mask */
 588         adapter->eims_enable_mask |= q_vector->eims_value;
 589
 590         /* configure q_vector to set itr on first interrupt */
 591         q_vector->set_itr = 1;
 592 }
 593
 594 /**
 595  * igb_configure_msix - Configure MSI-X hardware
 596  *
 597  * igb_configure_msix sets up the hardware to properly
 598  * generate MSI-X interrupts.
 599  **/
 600 static void igb_configure_msix(struct igb_adapter *adapter)
 601 {
 602         u32 tmp;
 603         int i, vector = 0;
 604         struct e1000_hw *hw = &adapter->hw;
 605
 606         adapter->eims_enable_mask = 0;
 607
 608         /* set vector for other causes, i.e. link changes */
 609         switch (hw->mac.type) {
 610         case e1000_82575:
 611                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 612                 /* enable MSI-X PBA support*/
 613                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 614
 615                 /* Auto-Mask interrupts upon ICR read. */
 616                 tmp |= E1000_CTRL_EXT_EIAME;
 617                 tmp |= E1000_CTRL_EXT_IRCA;
 618
 619                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 620
 621                 /* enable msix_other interrupt */
 622                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 623                                       E1000_EIMS_OTHER);
 624                 adapter->eims_other = E1000_EIMS_OTHER;
 625
 626                 break;
 627
 628         case e1000_82576:
 629         case e1000_82580:
 630         case e1000_i350:
 631         case e1000_i354:
 632         case e1000_i210:
 633         case e1000_i211:
 634                 /* Turn on MSI-X capability first, or our settings
 635                  * won't stick.  And it will take days to debug. */
 636                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 637                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 638                                 E1000_GPIE_NSICR);
 639
 640                 /* enable msix_other interrupt */
 641                 adapter->eims_other = 1 << vector;
 642                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 643
 644                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 645                 break;
 646         default:
 647                 /* do nothing, since nothing else supports MSI-X */
 648                 break;
 649         } /* switch (hw->mac.type) */
 650
 651         adapter->eims_enable_mask |= adapter->eims_other;
 652
 653         for (i = 0; i < adapter->num_q_vectors; i++)
 654                 igb_assign_vector(adapter->q_vector[i], vector++);
 655
 656         E1000_WRITE_FLUSH(hw);
 657 }
 658
 659 /**
 660  * igb_request_msix - Initialize MSI-X interrupts
 661  *
 662  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 663  * kernel.
 664  **/
 665 static int igb_request_msix(struct igb_adapter *adapter)
 666 {
 667         struct net_device *netdev = adapter->netdev;
 668         struct e1000_hw *hw = &adapter->hw;
 669         int i, err = 0, vector = 0, free_vector = 0;
 670
 671         err = request_irq(adapter->msix_entries[vector].vector,
 672                           &igb_msix_other, 0, netdev->name, adapter);
 673         if (err)
 674                 goto err_out;
 675
 676         for (i = 0; i < adapter->num_q_vectors; i++) {
 677                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 678
 679                 vector++;
 680
 681                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 682
 683                 if (q_vector->rx.ring && q_vector->tx.ring)
 684                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 685                                 q_vector->rx.ring->queue_index);
 686                 else if (q_vector->tx.ring)
 687                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 688                                 q_vector->tx.ring->queue_index);
 689                 else if (q_vector->rx.ring)
 690                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 691                                 q_vector->rx.ring->queue_index);
 692                 else
 693                         sprintf(q_vector->name, "%s-unused", netdev->name);
 694
 695                 err = request_irq(adapter->msix_entries[vector].vector,
 696                                   igb_msix_ring, 0, q_vector->name,
 697                                   q_vector);
 698                 if (err)
 699                         goto err_free;
 700         }
 701
 702         igb_configure_msix(adapter);
 703         return 0;
 704
 705 err_free:
 706         /* free already assigned IRQs */
 707         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 708
 709         vector--;
 710         for (i = 0; i < vector; i++) {
 711                 free_irq(adapter->msix_entries[free_vector++].vector,
 712                          adapter->q_vector[i]);
 713         }
 714 err_out:
 715         return err;
 716 }
 717
 718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 719 {
 720         if (adapter->msix_entries) {
 721                 pci_disable_msix(adapter->pdev);
 722                 kfree(adapter->msix_entries);
 723                 adapter->msix_entries = NULL;
 724         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 725                 pci_disable_msi(adapter->pdev);
 726         }
 727 }
 728
 729 /**
 730  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 731  * @adapter: board private structure to initialize
 732  * @v_idx: Index of vector to be freed
 733  *
 734  * This function frees the memory allocated to the q_vector.  In addition if
 735  * NAPI is enabled it will delete any references to the NAPI struct prior
 736  * to freeing the q_vector.
 737  **/
 738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 739 {
 740         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 741
 742         if (q_vector->tx.ring)
 743                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 744
 745         if (q_vector->rx.ring)
 746                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 747
 748         adapter->q_vector[v_idx] = NULL;
 749         netif_napi_del(&q_vector->napi);
 750 #ifndef IGB_NO_LRO
 751         __skb_queue_purge(&q_vector->lrolist.active);
 752 #endif
 753         kfree(q_vector);
 754 }
 755
 756 /**
 757  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 758  * @adapter: board private structure to initialize
 759  *
 760  * This function frees the memory allocated to the q_vectors.  In addition if
 761  * NAPI is enabled it will delete any references to the NAPI struct prior
 762  * to freeing the q_vector.
 763  **/
 764 static void igb_free_q_vectors(struct igb_adapter *adapter)
 765 {
 766         int v_idx = adapter->num_q_vectors;
 767
 768         adapter->num_tx_queues = 0;
 769         adapter->num_rx_queues = 0;
 770         adapter->num_q_vectors = 0;
 771
 772         while (v_idx--)
 773                 igb_free_q_vector(adapter, v_idx);
 774 }
 775
 776 /**
 777  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 778  *
 779  * This function resets the device so that it has 0 rx queues, tx queues, and
 780  * MSI-X interrupts allocated.
 781  */
 782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 783 {
 784         igb_free_q_vectors(adapter);
 785         igb_reset_interrupt_capability(adapter);
 786 }
 787
 788 /**
 789  * igb_process_mdd_event
 790  * @adapter - board private structure
 791  *
 792  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 793  */
 794 static void igb_process_mdd_event(struct igb_adapter *adapter)
 795 {
 796         struct e1000_hw *hw = &adapter->hw;
 797         u32 lvmmc, vfte, vfre, mdfb;
 798         u8 vf_queue;
 799
 800         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 801         vf_queue = lvmmc >> 29;
 802
 803         /* VF index cannot be bigger or equal to VFs allocated */
 804         if (vf_queue >= adapter->vfs_allocated_count)
 805                 return;
 806
 807         netdev_info(adapter->netdev,
 808                     "VF %d misbehaved. VF queues are disabled. "
 809                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 810
 811         /* Disable VFTE and VFRE related bits */
 812         vfte = E1000_READ_REG(hw, E1000_VFTE);
 813         vfte &= ~(1 << vf_queue);
 814         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 815
 816         vfre = E1000_READ_REG(hw, E1000_VFRE);
 817         vfre &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 819
 820         /* Disable MDFB related bit. Clear on write */
 821         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 822         mdfb |= (1 << vf_queue);
 823         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 824
 825         /* Reset the specific VF */
 826         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 827 }
 828
 829 /**
 830  * igb_disable_mdd
 831  * @adapter - board private structure
 832  *
 833  * Disable MDD behavior in the HW
 834  **/
 835 static void igb_disable_mdd(struct igb_adapter *adapter)
 836 {
 837         struct e1000_hw *hw = &adapter->hw;
 838         u32 reg;
 839
 840         if ((hw->mac.type != e1000_i350) ||
 841             (hw->mac.type != e1000_i354))
 842                 return;
 843
 844         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 845         reg &= (~E1000_DTXCTL_MDP_EN);
 846         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 847 }
 848
 849 /**
 850  * igb_enable_mdd
 851  * @adapter - board private structure
 852  *
 853  * Enable the HW to detect malicious driver and sends an interrupt to
 854  * the driver.
 855  **/
 856 static void igb_enable_mdd(struct igb_adapter *adapter)
 857 {
 858         struct e1000_hw *hw = &adapter->hw;
 859         u32 reg;
 860
 861         /* Only available on i350 device */
 862         if (hw->mac.type != e1000_i350)
 863                 return;
 864
 865         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 866         reg |= E1000_DTXCTL_MDP_EN;
 867         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 868 }
 869
 870 /**
 871  * igb_reset_sriov_capability - disable SR-IOV if enabled
 872  *
 873  * Attempt to disable single root IO virtualization capabilites present in the
 874  * kernel.
 875  **/
 876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 877 {
 878         struct pci_dev *pdev = adapter->pdev;
 879         struct e1000_hw *hw = &adapter->hw;
 880
 881         /* reclaim resources allocated to VFs */
 882         if (adapter->vf_data) {
 883                 if (!pci_vfs_assigned(pdev)) {
 884                         /*
 885                          * disable iov and allow time for transactions to
 886                          * clear
 887                          */
 888                         pci_disable_sriov(pdev);
 889                         msleep(500);
 890
 891                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 892                 } else {
 893                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 894                                         "VF(s) are assigned to guests!\n");
 895                 }
 896                 /* Disable Malicious Driver Detection */
 897                 igb_disable_mdd(adapter);
 898
 899                 /* free vf data storage */
 900                 kfree(adapter->vf_data);
 901                 adapter->vf_data = NULL;
 902
 903                 /* switch rings back to PF ownership */
 904                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 905                                 E1000_IOVCTL_REUSE_VFQ);
 906                 E1000_WRITE_FLUSH(hw);
 907                 msleep(100);
 908         }
 909
 910         adapter->vfs_allocated_count = 0;
 911 }
 912
 913 /**
 914  * igb_set_sriov_capability - setup SR-IOV if supported
 915  *
 916  * Attempt to enable single root IO virtualization capabilites present in the
 917  * kernel.
 918  **/
 919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 920 {
 921         struct pci_dev *pdev = adapter->pdev;
 922         int old_vfs = 0;
 923         int i;
 924
 925         old_vfs = pci_num_vf(pdev);
 926         if (old_vfs) {
 927                 dev_info(pci_dev_to_dev(pdev),
 928                                 "%d pre-allocated VFs found - override "
 929                                 "max_vfs setting of %d\n", old_vfs,
 930                                 adapter->vfs_allocated_count);
 931                 adapter->vfs_allocated_count = old_vfs;
 932         }
 933         /* no VFs requested, do nothing */
 934         if (!adapter->vfs_allocated_count)
 935                 return;
 936
 937         /* allocate vf data storage */
 938         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 939                                    sizeof(struct vf_data_storage),
 940                                    GFP_KERNEL);
 941
 942         if (adapter->vf_data) {
 943                 if (!old_vfs) {
 944                         if (pci_enable_sriov(pdev,
 945                                         adapter->vfs_allocated_count))
 946                                 goto err_out;
 947                 }
 948                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 949                         igb_vf_configure(adapter, i);
 950
 951                 switch (adapter->hw.mac.type) {
 952                 case e1000_82576:
 953                 case e1000_i350:
 954                         /* Enable VM to VM loopback by default */
 955                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 956                         break;
 957                 default:
 958                         /* Currently no other hardware supports loopback */
 959                         break;
 960                 }
 961
 962                 /* DMA Coalescing is not supported in IOV mode. */
 963                 if (adapter->hw.mac.type >= e1000_i350)
 964                 adapter->dmac = IGB_DMAC_DISABLE;
 965                 if (adapter->hw.mac.type < e1000_i350)
 966                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 967                 return;
 968
 969         }
 970
 971 err_out:
 972         kfree(adapter->vf_data);
 973         adapter->vf_data = NULL;
 974         adapter->vfs_allocated_count = 0;
 975         dev_warn(pci_dev_to_dev(pdev),
 976                         "Failed to initialize SR-IOV virtualization\n");
 977 }
 978
 979 /**
 980  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 981  *
 982  * Attempt to configure interrupts using the best available
 983  * capabilities of the hardware and kernel.
 984  **/
 985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 986 {
 987         struct pci_dev *pdev = adapter->pdev;
 988         int err;
 989         int numvecs, i;
 990
 991         if (!msix)
 992                 adapter->int_mode = IGB_INT_MODE_MSI;
 993
 994         /* Number of supported queues. */
 995         adapter->num_rx_queues = adapter->rss_queues;
 996
 997         if (adapter->vmdq_pools > 1)
 998                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
 999
1000 #ifdef HAVE_TX_MQ
1001         if (adapter->vmdq_pools)
1002                 adapter->num_tx_queues = adapter->vmdq_pools;
1003         else
1004                 adapter->num_tx_queues = adapter->num_rx_queues;
1005 #else
1006         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1007 #endif
1008
1009         switch (adapter->int_mode) {
1010         case IGB_INT_MODE_MSIX:
1011                 /* start with one vector for every rx queue */
1012                 numvecs = adapter->num_rx_queues;
1013
1014                 /* if tx handler is separate add 1 for every tx queue */
1015                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016                         numvecs += adapter->num_tx_queues;
1017
1018                 /* store the number of vectors reserved for queues */
1019                 adapter->num_q_vectors = numvecs;
1020
1021                 /* add 1 vector for link status interrupts */
1022                 numvecs++;
1023                 adapter->msix_entries = kcalloc(numvecs,
1024                                                 sizeof(struct msix_entry),
1025                                                 GFP_KERNEL);
1026                 if (adapter->msix_entries) {
1027                         for (i = 0; i < numvecs; i++)
1028                                 adapter->msix_entries[i].entry = i;
1029
1030                         err = pci_enable_msix(pdev,
1031                                               adapter->msix_entries, numvecs);
1032                         if (err == 0)
1033                                 break;
1034                 }
1035                 /* MSI-X failed, so fall through and try MSI */
1036                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037                          "Falling back to MSI interrupts.\n");
1038                 igb_reset_interrupt_capability(adapter);
1039         case IGB_INT_MODE_MSI:
1040                 if (!pci_enable_msi(pdev))
1041                         adapter->flags |= IGB_FLAG_HAS_MSI;
1042                 else
1043                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044                                  "interrupts.  Falling back to legacy "
1045                                  "interrupts.\n");
1046                 /* Fall through */
1047         case IGB_INT_MODE_LEGACY:
1048                 /* disable advanced features and set number of queues to 1 */
1049                 igb_reset_sriov_capability(adapter);
1050                 adapter->vmdq_pools = 0;
1051                 adapter->rss_queues = 1;
1052                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053                 adapter->num_rx_queues = 1;
1054                 adapter->num_tx_queues = 1;
1055                 adapter->num_q_vectors = 1;
1056                 /* Don't do anything; this is system default */
1057                 break;
1058         }
1059 }
1060
1061 static void igb_add_ring(struct igb_ring *ring,
1062                          struct igb_ring_container *head)
1063 {
1064         head->ring = ring;
1065         head->count++;
1066 }
1067
1068 /**
1069  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070  * @adapter: board private structure to initialize
1071  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072  * @v_idx: index of vector in adapter struct
1073  * @txr_count: total number of Tx rings to allocate
1074  * @txr_idx: index of first Tx ring to allocate
1075  * @rxr_count: total number of Rx rings to allocate
1076  * @rxr_idx: index of first Rx ring to allocate
1077  *
1078  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1079  **/
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081                               unsigned int v_count, unsigned int v_idx,
1082                               unsigned int txr_count, unsigned int txr_idx,
1083                               unsigned int rxr_count, unsigned int rxr_idx)
1084 {
1085         struct igb_q_vector *q_vector;
1086         struct igb_ring *ring;
1087         int ring_count, size;
1088
1089         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090         if (txr_count > 1 || rxr_count > 1)
1091                 return -ENOMEM;
1092
1093         ring_count = txr_count + rxr_count;
1094         size = sizeof(struct igb_q_vector) +
1095                (sizeof(struct igb_ring) * ring_count);
1096
1097         /* allocate q_vector and rings */
1098         q_vector = kzalloc(size, GFP_KERNEL);
1099         if (!q_vector)
1100                 return -ENOMEM;
1101
1102 #ifndef IGB_NO_LRO
1103         /* initialize LRO */
1104         __skb_queue_head_init(&q_vector->lrolist.active);
1105
1106 #endif
1107         /* initialize NAPI */
1108         netif_napi_add(adapter->netdev, &q_vector->napi,
1109                        igb_poll, 64);
1110
1111         /* tie q_vector and adapter together */
1112         adapter->q_vector[v_idx] = q_vector;
1113         q_vector->adapter = adapter;
1114
1115         /* initialize work limits */
1116         q_vector->tx.work_limit = adapter->tx_work_limit;
1117
1118         /* initialize ITR configuration */
1119         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120         q_vector->itr_val = IGB_START_ITR;
1121
1122         /* initialize pointer to rings */
1123         ring = q_vector->ring;
1124
1125         /* intialize ITR */
1126         if (rxr_count) {
1127                 /* rx or rx/tx vector */
1128                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129                         q_vector->itr_val = adapter->rx_itr_setting;
1130         } else {
1131                 /* tx only vector */
1132                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133                         q_vector->itr_val = adapter->tx_itr_setting;
1134         }
1135
1136         if (txr_count) {
1137                 /* assign generic ring traits */
1138                 ring->dev = &adapter->pdev->dev;
1139                 ring->netdev = adapter->netdev;
1140
1141                 /* configure backlink on ring */
1142                 ring->q_vector = q_vector;
1143
1144                 /* update q_vector Tx values */
1145                 igb_add_ring(ring, &q_vector->tx);
1146
1147                 /* For 82575, context index must be unique per ring. */
1148                 if (adapter->hw.mac.type == e1000_82575)
1149                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1150
1151                 /* apply Tx specific ring traits */
1152                 ring->count = adapter->tx_ring_count;
1153                 ring->queue_index = txr_idx;
1154
1155                 /* assign ring to adapter */
1156                 adapter->tx_ring[txr_idx] = ring;
1157
1158                 /* push pointer to next ring */
1159                 ring++;
1160         }
1161
1162         if (rxr_count) {
1163                 /* assign generic ring traits */
1164                 ring->dev = &adapter->pdev->dev;
1165                 ring->netdev = adapter->netdev;
1166
1167                 /* configure backlink on ring */
1168                 ring->q_vector = q_vector;
1169
1170                 /* update q_vector Rx values */
1171                 igb_add_ring(ring, &q_vector->rx);
1172
1173 #ifndef HAVE_NDO_SET_FEATURES
1174                 /* enable rx checksum */
1175                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1176
1177 #endif
1178                 /* set flag indicating ring supports SCTP checksum offload */
1179                 if (adapter->hw.mac.type >= e1000_82576)
1180                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1181
1182                 if ((adapter->hw.mac.type == e1000_i350) ||
1183                     (adapter->hw.mac.type == e1000_i354))
1184                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1185
1186                 /* apply Rx specific ring traits */
1187                 ring->count = adapter->rx_ring_count;
1188                 ring->queue_index = rxr_idx;
1189
1190                 /* assign ring to adapter */
1191                 adapter->rx_ring[rxr_idx] = ring;
1192         }
1193
1194         return 0;
1195 }
1196
1197 /**
1198  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199  * @adapter: board private structure to initialize
1200  *
1201  * We allocate one q_vector per queue interrupt.  If allocation fails we
1202  * return -ENOMEM.
1203  **/
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1205 {
1206         int q_vectors = adapter->num_q_vectors;
1207         int rxr_remaining = adapter->num_rx_queues;
1208         int txr_remaining = adapter->num_tx_queues;
1209         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1210         int err;
1211
1212         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213                 for (; rxr_remaining; v_idx++) {
1214                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1215                                                  0, 0, 1, rxr_idx);
1216
1217                         if (err)
1218                                 goto err_out;
1219
1220                         /* update counts and index */
1221                         rxr_remaining--;
1222                         rxr_idx++;
1223                 }
1224         }
1225
1226         for (; v_idx < q_vectors; v_idx++) {
1227                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230                                          tqpv, txr_idx, rqpv, rxr_idx);
1231
1232                 if (err)
1233                         goto err_out;
1234
1235                 /* update counts and index */
1236                 rxr_remaining -= rqpv;
1237                 txr_remaining -= tqpv;
1238                 rxr_idx++;
1239                 txr_idx++;
1240         }
1241
1242         return 0;
1243
1244 err_out:
1245         adapter->num_tx_queues = 0;
1246         adapter->num_rx_queues = 0;
1247         adapter->num_q_vectors = 0;
1248
1249         while (v_idx--)
1250                 igb_free_q_vector(adapter, v_idx);
1251
1252         return -ENOMEM;
1253 }
1254
1255 /**
1256  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1257  *
1258  * This function initializes the interrupts and allocates all of the queues.
1259  **/
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1261 {
1262         struct pci_dev *pdev = adapter->pdev;
1263         int err;
1264
1265         igb_set_interrupt_capability(adapter, msix);
1266
1267         err = igb_alloc_q_vectors(adapter);
1268         if (err) {
1269                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270                 goto err_alloc_q_vectors;
1271         }
1272
1273         igb_cache_ring_register(adapter);
1274
1275         return 0;
1276
1277 err_alloc_q_vectors:
1278         igb_reset_interrupt_capability(adapter);
1279         return err;
1280 }
1281
1282 /**
1283  * igb_request_irq - initialize interrupts
1284  *
1285  * Attempts to configure interrupts using the best available
1286  * capabilities of the hardware and kernel.
1287  **/
1288 static int igb_request_irq(struct igb_adapter *adapter)
1289 {
1290         struct net_device *netdev = adapter->netdev;
1291         struct pci_dev *pdev = adapter->pdev;
1292         int err = 0;
1293
1294         if (adapter->msix_entries) {
1295                 err = igb_request_msix(adapter);
1296                 if (!err)
1297                         goto request_done;
1298                 /* fall back to MSI */
1299                 igb_free_all_tx_resources(adapter);
1300                 igb_free_all_rx_resources(adapter);
1301
1302                 igb_clear_interrupt_scheme(adapter);
1303                 igb_reset_sriov_capability(adapter);
1304                 err = igb_init_interrupt_scheme(adapter, false);
1305                 if (err)
1306                         goto request_done;
1307                 igb_setup_all_tx_resources(adapter);
1308                 igb_setup_all_rx_resources(adapter);
1309                 igb_configure(adapter);
1310         }
1311
1312         igb_assign_vector(adapter->q_vector[0], 0);
1313
1314         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316                                   netdev->name, adapter);
1317                 if (!err)
1318                         goto request_done;
1319
1320                 /* fall back to legacy interrupts */
1321                 igb_reset_interrupt_capability(adapter);
1322                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1323         }
1324
1325         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326                           netdev->name, adapter);
1327
1328         if (err)
1329                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1330                         err);
1331
1332 request_done:
1333         return err;
1334 }
1335
1336 static void igb_free_irq(struct igb_adapter *adapter)
1337 {
1338         if (adapter->msix_entries) {
1339                 int vector = 0, i;
1340
1341                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1342
1343                 for (i = 0; i < adapter->num_q_vectors; i++)
1344                         free_irq(adapter->msix_entries[vector++].vector,
1345                                  adapter->q_vector[i]);
1346         } else {
1347                 free_irq(adapter->pdev->irq, adapter);
1348         }
1349 }
1350
1351 /**
1352  * igb_irq_disable - Mask off interrupt generation on the NIC
1353  * @adapter: board private structure
1354  **/
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1356 {
1357         struct e1000_hw *hw = &adapter->hw;
1358
1359         /*
1360          * we need to be careful when disabling interrupts.  The VFs are also
1361          * mapped into these registers and so clearing the bits can cause
1362          * issues on the VF drivers so we only need to clear what we set
1363          */
1364         if (adapter->msix_entries) {
1365                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368                 regval = E1000_READ_REG(hw, E1000_EIAC);
1369                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1370         }
1371
1372         E1000_WRITE_REG(hw, E1000_IAM, 0);
1373         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374         E1000_WRITE_FLUSH(hw);
1375
1376         if (adapter->msix_entries) {
1377                 int vector = 0, i;
1378
1379                 synchronize_irq(adapter->msix_entries[vector++].vector);
1380
1381                 for (i = 0; i < adapter->num_q_vectors; i++)
1382                         synchronize_irq(adapter->msix_entries[vector++].vector);
1383         } else {
1384                 synchronize_irq(adapter->pdev->irq);
1385         }
1386 }
1387
1388 /**
1389  * igb_irq_enable - Enable default interrupt generation settings
1390  * @adapter: board private structure
1391  **/
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1393 {
1394         struct e1000_hw *hw = &adapter->hw;
1395
1396         if (adapter->msix_entries) {
1397                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400                 regval = E1000_READ_REG(hw, E1000_EIAM);
1401                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403                 if (adapter->vfs_allocated_count) {
1404                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405                         ims |= E1000_IMS_VMMB;
1406                         if (adapter->mdd)
1407                                 if ((adapter->hw.mac.type == e1000_i350) ||
1408                                     (adapter->hw.mac.type == e1000_i354))
1409                                 ims |= E1000_IMS_MDDET;
1410                 }
1411                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1412         } else {
1413                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1414                                 E1000_IMS_DRSTA);
1415                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1416                                 E1000_IMS_DRSTA);
1417         }
1418 }
1419
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1421 {
1422         struct e1000_hw *hw = &adapter->hw;
1423         u16 vid = adapter->hw.mng_cookie.vlan_id;
1424         u16 old_vid = adapter->mng_vlan_id;
1425
1426         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427                 /* add VID to filter table */
1428                 igb_vfta_set(adapter, vid, TRUE);
1429                 adapter->mng_vlan_id = vid;
1430         } else {
1431                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1432         }
1433
1434         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1435             (vid != old_vid) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1438 #else
1439             !test_bit(old_vid, adapter->active_vlans)) {
1440 #endif
1441                 /* remove VID from filter table */
1442                 igb_vfta_set(adapter, old_vid, FALSE);
1443         }
1444 }
1445
1446 /**
1447  * igb_release_hw_control - release control of the h/w to f/w
1448  * @adapter: address of board private structure
1449  *
1450  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451  * For ASF and Pass Through versions of f/w this means that the
1452  * driver is no longer loaded.
1453  *
1454  **/
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1456 {
1457         struct e1000_hw *hw = &adapter->hw;
1458         u32 ctrl_ext;
1459
1460         /* Let firmware take over control of h/w */
1461         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1464 }
1465
1466 /**
1467  * igb_get_hw_control - get control of the h/w from f/w
1468  * @adapter: address of board private structure
1469  *
1470  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471  * For ASF and Pass Through versions of f/w this means that
1472  * the driver is loaded.
1473  *
1474  **/
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1476 {
1477         struct e1000_hw *hw = &adapter->hw;
1478         u32 ctrl_ext;
1479
1480         /* Let firmware know the driver has taken over */
1481         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1484 }
1485
1486 /**
1487  * igb_configure - configure the hardware for RX and TX
1488  * @adapter: private board structure
1489  **/
1490 static void igb_configure(struct igb_adapter *adapter)
1491 {
1492         struct net_device *netdev = adapter->netdev;
1493         int i;
1494
1495         igb_get_hw_control(adapter);
1496         igb_set_rx_mode(netdev);
1497
1498         igb_restore_vlan(adapter);
1499
1500         igb_setup_tctl(adapter);
1501         igb_setup_mrqc(adapter);
1502         igb_setup_rctl(adapter);
1503
1504         igb_configure_tx(adapter);
1505         igb_configure_rx(adapter);
1506
1507         e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509         if (adapter->num_tx_queues > 1)
1510                 netdev->features |= NETIF_F_MULTI_QUEUE;
1511         else
1512                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1513 #endif
1514
1515         /* call igb_desc_unused which always leaves
1516          * at least 1 descriptor unused to make sure
1517          * next_to_use != next_to_clean */
1518         for (i = 0; i < adapter->num_rx_queues; i++) {
1519                 struct igb_ring *ring = adapter->rx_ring[i];
1520                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1521         }
1522 }
1523
1524 /**
1525  * igb_power_up_link - Power up the phy/serdes link
1526  * @adapter: address of board private structure
1527  **/
1528 void igb_power_up_link(struct igb_adapter *adapter)
1529 {
1530         e1000_phy_hw_reset(&adapter->hw);
1531
1532         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533                 e1000_power_up_phy(&adapter->hw);
1534         else
1535                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1536 }
1537
1538 /**
1539  * igb_power_down_link - Power down the phy/serdes link
1540  * @adapter: address of board private structure
1541  */
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1543 {
1544         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545                 e1000_power_down_phy(&adapter->hw);
1546         else
1547                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1548 }
1549
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1552 {
1553         struct e1000_hw *hw = &adapter->hw;
1554         u32 ctrl_ext, connsw;
1555         bool swap_now = false;
1556         bool link;
1557
1558         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560         link = igb_has_link(adapter);
1561         (void) link;
1562
1563         /* need to live swap if current media is copper and we have fiber/serdes
1564          * to go to.
1565          */
1566
1567         if ((hw->phy.media_type == e1000_media_type_copper) &&
1568             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1569                 swap_now = true;
1570         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1571                 /* copper signal takes time to appear */
1572                 if (adapter->copper_tries < 2) {
1573                         adapter->copper_tries++;
1574                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1575                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1576                         return;
1577                 } else {
1578                         adapter->copper_tries = 0;
1579                         if ((connsw & E1000_CONNSW_PHYSD) &&
1580                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1581                                 swap_now = true;
1582                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1583                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1584                         }
1585                 }
1586         }
1587
1588         if (swap_now) {
1589                 switch (hw->phy.media_type) {
1590                 case e1000_media_type_copper:
1591                         dev_info(pci_dev_to_dev(adapter->pdev),
1592                                  "%s:MAS: changing media to fiber/serdes\n",
1593                         adapter->netdev->name);
1594                         ctrl_ext |=
1595                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1596                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1597                         adapter->copper_tries = 0;
1598                         break;
1599                 case e1000_media_type_internal_serdes:
1600                 case e1000_media_type_fiber:
1601                         dev_info(pci_dev_to_dev(adapter->pdev),
1602                                  "%s:MAS: changing media to copper\n",
1603                                  adapter->netdev->name);
1604                         ctrl_ext &=
1605                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1606                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1607                         break;
1608                 default:
1609                         /* shouldn't get here during regular operation */
1610                         dev_err(pci_dev_to_dev(adapter->pdev),
1611                                 "%s:AMS: Invalid media type found, returning\n",
1612                                 adapter->netdev->name);
1613                         break;
1614                 }
1615                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1616         }
1617 }
1618
1619 #ifdef HAVE_I2C_SUPPORT
1620 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1621  *  @hw: pointer to hardware structure
1622  *  @i2cctl: Current value of I2CCTL register
1623  *
1624  *  Returns the I2C data bit value
1625  */
1626 static int igb_get_i2c_data(void *data)
1627 {
1628         struct igb_adapter *adapter = (struct igb_adapter *)data;
1629         struct e1000_hw *hw = &adapter->hw;
1630         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1631
1632         return (i2cctl & E1000_I2C_DATA_IN) != 0;
1633 }
1634
1635 /* igb_set_i2c_data - Sets the I2C data bit
1636  *  @data: pointer to hardware structure
1637  *  @state: I2C data value (0 or 1) to set
1638  *
1639  *  Sets the I2C data bit
1640  */
1641 static void igb_set_i2c_data(void *data, int state)
1642 {
1643         struct igb_adapter *adapter = (struct igb_adapter *)data;
1644         struct e1000_hw *hw = &adapter->hw;
1645         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1646
1647         if (state)
1648                 i2cctl |= E1000_I2C_DATA_OUT;
1649         else
1650                 i2cctl &= ~E1000_I2C_DATA_OUT;
1651
1652         i2cctl &= ~E1000_I2C_DATA_OE_N;
1653         i2cctl |= E1000_I2C_CLK_OE_N;
1654
1655         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1656         E1000_WRITE_FLUSH(hw);
1657
1658 }
1659
1660 /* igb_set_i2c_clk - Sets the I2C SCL clock
1661  *  @data: pointer to hardware structure
1662  *  @state: state to set clock
1663  *
1664  *  Sets the I2C clock line to state
1665  */
1666 static void igb_set_i2c_clk(void *data, int state)
1667 {
1668         struct igb_adapter *adapter = (struct igb_adapter *)data;
1669         struct e1000_hw *hw = &adapter->hw;
1670         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1671
1672         if (state) {
1673                 i2cctl |= E1000_I2C_CLK_OUT;
1674                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1675         } else {
1676                 i2cctl &= ~E1000_I2C_CLK_OUT;
1677                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1678         }
1679         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1680         E1000_WRITE_FLUSH(hw);
1681 }
1682
1683 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1684  *  @data: pointer to hardware structure
1685  *
1686  *  Gets the I2C clock state
1687  */
1688 static int igb_get_i2c_clk(void *data)
1689 {
1690         struct igb_adapter *adapter = (struct igb_adapter *)data;
1691         struct e1000_hw *hw = &adapter->hw;
1692         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1693
1694         return (i2cctl & E1000_I2C_CLK_IN) != 0;
1695 }
1696
1697 static const struct i2c_algo_bit_data igb_i2c_algo = {
1698         .setsda         = igb_set_i2c_data,
1699         .setscl         = igb_set_i2c_clk,
1700         .getsda         = igb_get_i2c_data,
1701         .getscl         = igb_get_i2c_clk,
1702         .udelay         = 5,
1703         .timeout        = 20,
1704 };
1705
1706 /*  igb_init_i2c - Init I2C interface
1707  *  @adapter: pointer to adapter structure
1708  *
1709  */
1710 static s32 igb_init_i2c(struct igb_adapter *adapter)
1711 {
1712         s32 status = E1000_SUCCESS;
1713
1714         /* I2C interface supported on i350 devices */
1715         if (adapter->hw.mac.type != e1000_i350)
1716                 return E1000_SUCCESS;
1717
1718         /* Initialize the i2c bus which is controlled by the registers.
1719          * This bus will use the i2c_algo_bit structue that implements
1720          * the protocol through toggling of the 4 bits in the register.
1721          */
1722         adapter->i2c_adap.owner = THIS_MODULE;
1723         adapter->i2c_algo = igb_i2c_algo;
1724         adapter->i2c_algo.data = adapter;
1725         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1726         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1727         strlcpy(adapter->i2c_adap.name, "igb BB",
1728                 sizeof(adapter->i2c_adap.name));
1729         status = i2c_bit_add_bus(&adapter->i2c_adap);
1730         return status;
1731 }
1732
1733 #endif /* HAVE_I2C_SUPPORT */
1734 /**
1735  * igb_up - Open the interface and prepare it to handle traffic
1736  * @adapter: board private structure
1737  **/
1738 int igb_up(struct igb_adapter *adapter)
1739 {
1740         struct e1000_hw *hw = &adapter->hw;
1741         int i;
1742
1743         /* hardware has been reset, we need to reload some things */
1744         igb_configure(adapter);
1745
1746         clear_bit(__IGB_DOWN, &adapter->state);
1747
1748         for (i = 0; i < adapter->num_q_vectors; i++)
1749                 napi_enable(&(adapter->q_vector[i]->napi));
1750
1751         if (adapter->msix_entries)
1752                 igb_configure_msix(adapter);
1753         else
1754                 igb_assign_vector(adapter->q_vector[0], 0);
1755
1756         igb_configure_lli(adapter);
1757
1758         /* Clear any pending interrupts. */
1759         E1000_READ_REG(hw, E1000_ICR);
1760         igb_irq_enable(adapter);
1761
1762         /* notify VFs that reset has been completed */
1763         if (adapter->vfs_allocated_count) {
1764                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1765                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1766                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1767         }
1768
1769         netif_tx_start_all_queues(adapter->netdev);
1770
1771         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1772                 schedule_work(&adapter->dma_err_task);
1773         /* start the watchdog. */
1774         hw->mac.get_link_status = 1;
1775         schedule_work(&adapter->watchdog_task);
1776
1777         if ((adapter->flags & IGB_FLAG_EEE) &&
1778             (!hw->dev_spec._82575.eee_disable))
1779                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1780
1781         return 0;
1782 }
1783
1784 void igb_down(struct igb_adapter *adapter)
1785 {
1786         struct net_device *netdev = adapter->netdev;
1787         struct e1000_hw *hw = &adapter->hw;
1788         u32 tctl, rctl;
1789         int i;
1790
1791         /* signal that we're down so the interrupt handler does not
1792          * reschedule our watchdog timer */
1793         set_bit(__IGB_DOWN, &adapter->state);
1794
1795         /* disable receives in the hardware */
1796         rctl = E1000_READ_REG(hw, E1000_RCTL);
1797         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1798         /* flush and sleep below */
1799
1800         netif_tx_stop_all_queues(netdev);
1801
1802         /* disable transmits in the hardware */
1803         tctl = E1000_READ_REG(hw, E1000_TCTL);
1804         tctl &= ~E1000_TCTL_EN;
1805         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1806         /* flush both disables and wait for them to finish */
1807         E1000_WRITE_FLUSH(hw);
1808         usleep_range(10000, 20000);
1809
1810         for (i = 0; i < adapter->num_q_vectors; i++)
1811                 napi_disable(&(adapter->q_vector[i]->napi));
1812
1813         igb_irq_disable(adapter);
1814
1815         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1816
1817         del_timer_sync(&adapter->watchdog_timer);
1818         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1819                 del_timer_sync(&adapter->dma_err_timer);
1820         del_timer_sync(&adapter->phy_info_timer);
1821
1822         netif_carrier_off(netdev);
1823
1824         /* record the stats before reset*/
1825         igb_update_stats(adapter);
1826
1827         adapter->link_speed = 0;
1828         adapter->link_duplex = 0;
1829
1830 #ifdef HAVE_PCI_ERS
1831         if (!pci_channel_offline(adapter->pdev))
1832                 igb_reset(adapter);
1833 #else
1834         igb_reset(adapter);
1835 #endif
1836         igb_clean_all_tx_rings(adapter);
1837         igb_clean_all_rx_rings(adapter);
1838 #ifdef IGB_DCA
1839         /* since we reset the hardware DCA settings were cleared */
1840         igb_setup_dca(adapter);
1841 #endif
1842 }
1843
1844 void igb_reinit_locked(struct igb_adapter *adapter)
1845 {
1846         WARN_ON(in_interrupt());
1847         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1848                 usleep_range(1000, 2000);
1849         igb_down(adapter);
1850         igb_up(adapter);
1851         clear_bit(__IGB_RESETTING, &adapter->state);
1852 }
1853
1854 /**
1855  * igb_enable_mas - Media Autosense re-enable after swap
1856  *
1857  * @adapter: adapter struct
1858  **/
1859 static s32  igb_enable_mas(struct igb_adapter *adapter)
1860 {
1861         struct e1000_hw *hw = &adapter->hw;
1862         u32 connsw;
1863         s32 ret_val = E1000_SUCCESS;
1864
1865         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1866         if (hw->phy.media_type == e1000_media_type_copper) {
1867                 /* configure for SerDes media detect */
1868                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1869                         connsw |= E1000_CONNSW_ENRGSRC;
1870                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1871                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1872                         E1000_WRITE_FLUSH(hw);
1873                 } else if (connsw & E1000_CONNSW_SERDESD) {
1874                         /* already SerDes, no need to enable anything */
1875                         return ret_val;
1876                 } else {
1877                         dev_info(pci_dev_to_dev(adapter->pdev),
1878                         "%s:MAS: Unable to configure feature, disabling..\n",
1879                         adapter->netdev->name);
1880                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1881                 }
1882         }
1883         return ret_val;
1884 }
1885
1886 void igb_reset(struct igb_adapter *adapter)
1887 {
1888         struct pci_dev *pdev = adapter->pdev;
1889         struct e1000_hw *hw = &adapter->hw;
1890         struct e1000_mac_info *mac = &hw->mac;
1891         struct e1000_fc_info *fc = &hw->fc;
1892         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1893
1894         /* Repartition Pba for greater than 9k mtu
1895          * To take effect CTRL.RST is required.
1896          */
1897         switch (mac->type) {
1898         case e1000_i350:
1899         case e1000_82580:
1900         case e1000_i354:
1901                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1902                 pba = e1000_rxpbs_adjust_82580(pba);
1903                 break;
1904         case e1000_82576:
1905                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1906                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1907                 break;
1908         case e1000_82575:
1909         case e1000_i210:
1910         case e1000_i211:
1911         default:
1912                 pba = E1000_PBA_34K;
1913                 break;
1914         }
1915
1916         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1917             (mac->type < e1000_82576)) {
1918                 /* adjust PBA for jumbo frames */
1919                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1920
1921                 /* To maintain wire speed transmits, the Tx FIFO should be
1922                  * large enough to accommodate two full transmit packets,
1923                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1924                  * the Rx FIFO should be large enough to accommodate at least
1925                  * one full receive packet and is similarly rounded up and
1926                  * expressed in KB. */
1927                 pba = E1000_READ_REG(hw, E1000_PBA);
1928                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1929                 tx_space = pba >> 16;
1930                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1931                 pba &= 0xffff;
1932                 /* the tx fifo also stores 16 bytes of information about the tx
1933                  * but don't include ethernet FCS because hardware appends it */
1934                 min_tx_space = (adapter->max_frame_size +
1935                                 sizeof(union e1000_adv_tx_desc) -
1936                                 ETH_FCS_LEN) * 2;
1937                 min_tx_space = ALIGN(min_tx_space, 1024);
1938                 min_tx_space >>= 10;
1939                 /* software strips receive CRC, so leave room for it */
1940                 min_rx_space = adapter->max_frame_size;
1941                 min_rx_space = ALIGN(min_rx_space, 1024);
1942                 min_rx_space >>= 10;
1943
1944                 /* If current Tx allocation is less than the min Tx FIFO size,
1945                  * and the min Tx FIFO size is less than the current Rx FIFO
1946                  * allocation, take space away from current Rx allocation */
1947                 if (tx_space < min_tx_space &&
1948                     ((min_tx_space - tx_space) < pba)) {
1949                         pba = pba - (min_tx_space - tx_space);
1950
1951                         /* if short on rx space, rx wins and must trump tx
1952                          * adjustment */
1953                         if (pba < min_rx_space)
1954                                 pba = min_rx_space;
1955                 }
1956                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1957         }
1958
1959         /* flow control settings */
1960         /* The high water mark must be low enough to fit one full frame
1961          * (or the size used for early receive) above it in the Rx FIFO.
1962          * Set it to the lower of:
1963          * - 90% of the Rx FIFO size, or
1964          * - the full Rx FIFO size minus one full frame */
1965         hwm = min(((pba << 10) * 9 / 10),
1966                         ((pba << 10) - 2 * adapter->max_frame_size));
1967
1968         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1969         fc->low_water = fc->high_water - 16;
1970         fc->pause_time = 0xFFFF;
1971         fc->send_xon = 1;
1972         fc->current_mode = fc->requested_mode;
1973
1974         /* disable receive for all VFs and wait one second */
1975         if (adapter->vfs_allocated_count) {
1976                 int i;
1977                 /*
1978                  * Clear all flags except indication that the PF has set
1979                  * the VF MAC addresses administratively
1980                  */
1981                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1982                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1983
1984                 /* ping all the active vfs to let them know we are going down */
1985                 igb_ping_all_vfs(adapter);
1986
1987                 /* disable transmits and receives */
1988                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1989                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1990         }
1991
1992         /* Allow time for pending master requests to run */
1993         e1000_reset_hw(hw);
1994         E1000_WRITE_REG(hw, E1000_WUC, 0);
1995
1996         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1997                 e1000_setup_init_funcs(hw, TRUE);
1998                 igb_check_options(adapter);
1999                 e1000_get_bus_info(hw);
2000                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2001         }
2002         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2003                 if (igb_enable_mas(adapter))
2004                         dev_err(pci_dev_to_dev(pdev),
2005                                 "Error enabling Media Auto Sense\n");
2006         }
2007         if (e1000_init_hw(hw))
2008                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2009
2010         /*
2011          * Flow control settings reset on hardware reset, so guarantee flow
2012          * control is off when forcing speed.
2013          */
2014         if (!hw->mac.autoneg)
2015                 e1000_force_mac_fc(hw);
2016
2017         igb_init_dmac(adapter, pba);
2018         /* Re-initialize the thermal sensor on i350 devices. */
2019         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2020                 /*
2021                  * If present, re-initialize the external thermal sensor
2022                  * interface.
2023                  */
2024                 if (adapter->ets)
2025                         e1000_set_i2c_bb(hw);
2026                 e1000_init_thermal_sensor_thresh(hw);
2027         }
2028
2029         /*Re-establish EEE setting */
2030         if (hw->phy.media_type == e1000_media_type_copper) {
2031                 switch (mac->type) {
2032                 case e1000_i350:
2033                 case e1000_i210:
2034                 case e1000_i211:
2035                         e1000_set_eee_i350(hw);
2036                         break;
2037                 case e1000_i354:
2038                         e1000_set_eee_i354(hw);
2039                         break;
2040                 default:
2041                         break;
2042                 }
2043         }
2044
2045         if (!netif_running(adapter->netdev))
2046                 igb_power_down_link(adapter);
2047
2048         igb_update_mng_vlan(adapter);
2049
2050         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2051         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2052
2053
2054 #ifdef HAVE_PTP_1588_CLOCK
2055         /* Re-enable PTP, where applicable. */
2056         igb_ptp_reset(adapter);
2057 #endif /* HAVE_PTP_1588_CLOCK */
2058
2059         e1000_get_phy_info(hw);
2060
2061         adapter->devrc++;
2062 }
2063
2064 #ifdef HAVE_NDO_SET_FEATURES
2065 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2066                                               kni_netdev_features_t features)
2067 {
2068         /*
2069          * Since there is no support for separate tx vlan accel
2070          * enabled make sure tx flag is cleared if rx is.
2071          */
2072 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2073         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2074                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2075 #else
2076         if (!(features & NETIF_F_HW_VLAN_RX))
2077                 features &= ~NETIF_F_HW_VLAN_TX;
2078 #endif
2079
2080         /* If Rx checksum is disabled, then LRO should also be disabled */
2081         if (!(features & NETIF_F_RXCSUM))
2082                 features &= ~NETIF_F_LRO;
2083
2084         return features;
2085 }
2086
2087 static int igb_set_features(struct net_device *netdev,
2088                             kni_netdev_features_t features)
2089 {
2090         u32 changed = netdev->features ^ features;
2091
2092 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2093         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2094 #else
2095         if (changed & NETIF_F_HW_VLAN_RX)
2096 #endif
2097                 igb_vlan_mode(netdev, features);
2098
2099         return 0;
2100 }
2101
2102 #ifdef NTF_SELF
2103 #ifdef USE_CONST_DEV_UC_CHAR
2104 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2105                            struct net_device *dev,
2106                            const unsigned char *addr,
2107 #ifdef HAVE_NDO_FDB_ADD_VID
2108                            u16 vid,
2109 #endif
2110                            u16 flags)
2111 #else
2112 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2113                            struct net_device *dev,
2114                            unsigned char *addr,
2115                            u16 flags)
2116 #endif
2117 {
2118         struct igb_adapter *adapter = netdev_priv(dev);
2119         struct e1000_hw *hw = &adapter->hw;
2120         int err;
2121
2122         if (!(adapter->vfs_allocated_count))
2123                 return -EOPNOTSUPP;
2124
2125         /* Hardware does not support aging addresses so if a
2126          * ndm_state is given only allow permanent addresses
2127          */
2128         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2129                 pr_info("%s: FDB only supports static addresses\n",
2130                         igb_driver_name);
2131                 return -EINVAL;
2132         }
2133
2134         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2135                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2136                                         (adapter->vfs_allocated_count + 1);
2137
2138                 if (netdev_uc_count(dev) < rar_uc_entries)
2139                         err = dev_uc_add_excl(dev, addr);
2140                 else
2141                         err = -ENOMEM;
2142         } else if (is_multicast_ether_addr(addr)) {
2143                 err = dev_mc_add_excl(dev, addr);
2144         } else {
2145                 err = -EINVAL;
2146         }
2147
2148         /* Only return duplicate errors if NLM_F_EXCL is set */
2149         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2150                 err = 0;
2151
2152         return err;
2153 }
2154
2155 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2156 #ifdef USE_CONST_DEV_UC_CHAR
2157 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2158                            struct net_device *dev,
2159                            const unsigned char *addr)
2160 #else
2161 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2162                            struct net_device *dev,
2163                            unsigned char *addr)
2164 #endif
2165 {
2166         struct igb_adapter *adapter = netdev_priv(dev);
2167         int err = -EOPNOTSUPP;
2168
2169         if (ndm->ndm_state & NUD_PERMANENT) {
2170                 pr_info("%s: FDB only supports static addresses\n",
2171                         igb_driver_name);
2172                 return -EINVAL;
2173         }
2174
2175         if (adapter->vfs_allocated_count) {
2176                 if (is_unicast_ether_addr(addr))
2177                         err = dev_uc_del(dev, addr);
2178                 else if (is_multicast_ether_addr(addr))
2179                         err = dev_mc_del(dev, addr);
2180                 else
2181                         err = -EINVAL;
2182         }
2183
2184         return err;
2185 }
2186
2187 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2188                             struct netlink_callback *cb,
2189                             struct net_device *dev,
2190                             int idx)
2191 {
2192         struct igb_adapter *adapter = netdev_priv(dev);
2193
2194         if (adapter->vfs_allocated_count)
2195                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2196
2197         return idx;
2198 }
2199 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2200
2201 #ifdef HAVE_BRIDGE_ATTRIBS
2202 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2203 static int igb_ndo_bridge_setlink(struct net_device *dev,
2204                                   struct nlmsghdr *nlh,
2205                                   u16 flags)
2206 #else
2207 static int igb_ndo_bridge_setlink(struct net_device *dev,
2208                                   struct nlmsghdr *nlh)
2209 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2210 {
2211         struct igb_adapter *adapter = netdev_priv(dev);
2212         struct e1000_hw *hw = &adapter->hw;
2213         struct nlattr *attr, *br_spec;
2214         int rem;
2215
2216         if (!(adapter->vfs_allocated_count))
2217                 return -EOPNOTSUPP;
2218
2219         switch (adapter->hw.mac.type) {
2220         case e1000_82576:
2221         case e1000_i350:
2222         case e1000_i354:
2223                 break;
2224         default:
2225                 return -EOPNOTSUPP;
2226         }
2227
2228         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2229
2230         nla_for_each_nested(attr, br_spec, rem) {
2231                 __u16 mode;
2232
2233                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2234                         continue;
2235
2236                 mode = nla_get_u16(attr);
2237                 if (mode == BRIDGE_MODE_VEPA) {
2238                         e1000_vmdq_set_loopback_pf(hw, 0);
2239                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2240                 } else if (mode == BRIDGE_MODE_VEB) {
2241                         e1000_vmdq_set_loopback_pf(hw, 1);
2242                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2243                 } else
2244                         return -EINVAL;
2245
2246                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2247                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2248         }
2249
2250         return 0;
2251 }
2252
2253 #ifdef HAVE_BRIDGE_FILTER
2254 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2255 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2256                                   struct net_device *dev, u32 filter_mask,
2257                                   int nlflags)
2258 #else
2259 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2260                                   struct net_device *dev, u32 filter_mask)
2261 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2262 #else
2263 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2264                                   struct net_device *dev)
2265 #endif
2266 {
2267         struct igb_adapter *adapter = netdev_priv(dev);
2268         u16 mode;
2269
2270         if (!(adapter->vfs_allocated_count))
2271                 return -EOPNOTSUPP;
2272
2273         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2274                 mode = BRIDGE_MODE_VEB;
2275         else
2276                 mode = BRIDGE_MODE_VEPA;
2277
2278 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2279 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2280 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2281         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2282                                 nlflags, filter_mask, NULL);
2283 #else
2284         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2285 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2286 #else
2287         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2288 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2289 #else
2290         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2291 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2292 }
2293 #endif /* HAVE_BRIDGE_ATTRIBS */
2294 #endif /* NTF_SELF */
2295
2296 #endif /* HAVE_NDO_SET_FEATURES */
2297 #ifdef HAVE_NET_DEVICE_OPS
2298 static const struct net_device_ops igb_netdev_ops = {
2299         .ndo_open               = igb_open,
2300         .ndo_stop               = igb_close,
2301         .ndo_start_xmit         = igb_xmit_frame,
2302         .ndo_get_stats          = igb_get_stats,
2303         .ndo_set_rx_mode        = igb_set_rx_mode,
2304         .ndo_set_mac_address    = igb_set_mac,
2305         .ndo_change_mtu         = igb_change_mtu,
2306         .ndo_do_ioctl           = igb_ioctl,
2307         .ndo_tx_timeout         = igb_tx_timeout,
2308         .ndo_validate_addr      = eth_validate_addr,
2309         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2310         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2311 #ifdef IFLA_VF_MAX
2312         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2313         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2314 #ifdef HAVE_VF_MIN_MAX_TXRATE
2315         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2316 #else /* HAVE_VF_MIN_MAX_TXRATE */
2317         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2318 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2319         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2320 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2321         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2322 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2323 #endif /* IFLA_VF_MAX */
2324 #ifdef CONFIG_NET_POLL_CONTROLLER
2325         .ndo_poll_controller    = igb_netpoll,
2326 #endif
2327 #ifdef HAVE_NDO_SET_FEATURES
2328         .ndo_fix_features       = igb_fix_features,
2329         .ndo_set_features       = igb_set_features,
2330 #endif
2331 #ifdef HAVE_VLAN_RX_REGISTER
2332         .ndo_vlan_rx_register   = igb_vlan_mode,
2333 #endif
2334 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2335 #ifdef NTF_SELF
2336         .ndo_fdb_add            = igb_ndo_fdb_add,
2337 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2338         .ndo_fdb_del            = igb_ndo_fdb_del,
2339         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2340 #endif
2341 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2342 #ifdef HAVE_BRIDGE_ATTRIBS
2343         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2344         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2345 #endif /* HAVE_BRIDGE_ATTRIBS */
2346 #endif
2347 };
2348
2349 #ifdef CONFIG_IGB_VMDQ_NETDEV
2350 static const struct net_device_ops igb_vmdq_ops = {
2351         .ndo_open               = &igb_vmdq_open,
2352         .ndo_stop               = &igb_vmdq_close,
2353         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2354         .ndo_get_stats          = &igb_vmdq_get_stats,
2355         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2356         .ndo_validate_addr      = eth_validate_addr,
2357         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2358         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2359         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2360         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2361         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2362         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2363 };
2364
2365 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2366 #endif /* HAVE_NET_DEVICE_OPS */
2367 #ifdef CONFIG_IGB_VMDQ_NETDEV
2368 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2369 {
2370 #ifdef HAVE_NET_DEVICE_OPS
2371         vnetdev->netdev_ops = &igb_vmdq_ops;
2372 #else
2373         dev->open = &igb_vmdq_open;
2374         dev->stop = &igb_vmdq_close;
2375         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2376         dev->get_stats = &igb_vmdq_get_stats;
2377 #ifdef HAVE_SET_RX_MODE
2378         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2379 #endif
2380         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2381         dev->set_mac_address = &igb_vmdq_set_mac;
2382         dev->change_mtu = &igb_vmdq_change_mtu;
2383 #ifdef HAVE_TX_TIMEOUT
2384         dev->tx_timeout = &igb_vmdq_tx_timeout;
2385 #endif
2386 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2387         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2388         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2389         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2390 #endif
2391 #endif
2392         igb_vmdq_set_ethtool_ops(vnetdev);
2393         vnetdev->watchdog_timeo = 5 * HZ;
2394
2395 }
2396
2397 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2398 {
2399         int pool, err = 0, base_queue;
2400         struct net_device *vnetdev;
2401         struct igb_vmdq_adapter *vmdq_adapter;
2402
2403         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2404                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2405                 base_queue = pool * qpp;
2406                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2407                 if (!vnetdev) {
2408                         err = -ENOMEM;
2409                         break;
2410                 }
2411                 vmdq_adapter = netdev_priv(vnetdev);
2412                 vmdq_adapter->vnetdev = vnetdev;
2413                 vmdq_adapter->real_adapter = adapter;
2414                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2415                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2416                 igb_assign_vmdq_netdev_ops(vnetdev);
2417                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2418                          adapter->netdev->name, pool);
2419                 vnetdev->features = adapter->netdev->features;
2420 #ifdef HAVE_NETDEV_VLAN_FEATURES
2421                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2422 #endif
2423                 adapter->vmdq_netdev[pool-1] = vnetdev;
2424                 err = register_netdev(vnetdev);
2425                 if (err)
2426                         break;
2427         }
2428         return err;
2429 }
2430
2431 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2432 {
2433         int pool, err = 0;
2434
2435         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2436                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2437                 free_netdev(adapter->vmdq_netdev[pool-1]);
2438                 adapter->vmdq_netdev[pool-1] = NULL;
2439         }
2440         return err;
2441 }
2442 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2443
2444 /**
2445  * igb_set_fw_version - Configure version string for ethtool
2446  * @adapter: adapter struct
2447  *
2448  **/
2449 static void igb_set_fw_version(struct igb_adapter *adapter)
2450 {
2451         struct e1000_hw *hw = &adapter->hw;
2452         struct e1000_fw_version fw;
2453
2454         e1000_get_fw_version(hw, &fw);
2455
2456         switch (hw->mac.type) {
2457         case e1000_i210:
2458         case e1000_i211:
2459                 if (!(e1000_get_flash_presence_i210(hw))) {
2460                         snprintf(adapter->fw_version,
2461                             sizeof(adapter->fw_version),
2462                             "%2d.%2d-%d",
2463                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2464                         break;
2465                 }
2466                 /* fall through */
2467         default:
2468                 /* if option rom is valid, display its version too*/
2469                 if (fw.or_valid) {
2470                         snprintf(adapter->fw_version,
2471                             sizeof(adapter->fw_version),
2472                             "%d.%d, 0x%08x, %d.%d.%d",
2473                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2474                             fw.or_major, fw.or_build, fw.or_patch);
2475                 /* no option rom */
2476                 } else {
2477                         if (fw.etrack_id != 0X0000) {
2478                         snprintf(adapter->fw_version,
2479                             sizeof(adapter->fw_version),
2480                             "%d.%d, 0x%08x",
2481                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2482                         } else {
2483                         snprintf(adapter->fw_version,
2484                             sizeof(adapter->fw_version),
2485                             "%d.%d.%d",
2486                             fw.eep_major, fw.eep_minor, fw.eep_build);
2487                         }
2488                 }
2489                 break;
2490         }
2491
2492         return;
2493 }
2494
2495 /**
2496  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2497  *
2498  * @adapter: adapter struct
2499  **/
2500 static void igb_init_mas(struct igb_adapter *adapter)
2501 {
2502         struct e1000_hw *hw = &adapter->hw;
2503         u16 eeprom_data;
2504
2505         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2506         switch (hw->bus.func) {
2507         case E1000_FUNC_0:
2508                 if (eeprom_data & IGB_MAS_ENABLE_0)
2509                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2510                 break;
2511         case E1000_FUNC_1:
2512                 if (eeprom_data & IGB_MAS_ENABLE_1)
2513                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2514                 break;
2515         case E1000_FUNC_2:
2516                 if (eeprom_data & IGB_MAS_ENABLE_2)
2517                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2518                 break;
2519         case E1000_FUNC_3:
2520                 if (eeprom_data & IGB_MAS_ENABLE_3)
2521                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2522                 break;
2523         default:
2524                 /* Shouldn't get here */
2525                 dev_err(pci_dev_to_dev(adapter->pdev),
2526                         "%s:AMS: Invalid port configuration, returning\n",
2527                         adapter->netdev->name);
2528                 break;
2529         }
2530 }
2531
2532 /**
2533  * igb_probe - Device Initialization Routine
2534  * @pdev: PCI device information struct
2535  * @ent: entry in igb_pci_tbl
2536  *
2537  * Returns 0 on success, negative on failure
2538  *
2539  * igb_probe initializes an adapter identified by a pci_dev structure.
2540  * The OS initialization, configuring of the adapter private structure,
2541  * and a hardware reset occur.
2542  **/
2543 static int __devinit igb_probe(struct pci_dev *pdev,
2544                                const struct pci_device_id *ent)
2545 {
2546         struct net_device *netdev;
2547         struct igb_adapter *adapter;
2548         struct e1000_hw *hw;
2549         u16 eeprom_data = 0;
2550         u8 pba_str[E1000_PBANUM_LENGTH];
2551         s32 ret_val;
2552         static int global_quad_port_a; /* global quad port a indication */
2553         int i, err, pci_using_dac;
2554         static int cards_found;
2555
2556         err = pci_enable_device_mem(pdev);
2557         if (err)
2558                 return err;
2559
2560         pci_using_dac = 0;
2561         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2562         if (!err) {
2563                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2564                 if (!err)
2565                         pci_using_dac = 1;
2566         } else {
2567                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2568                 if (err) {
2569                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2570                         if (err) {
2571                                 IGB_ERR("No usable DMA configuration, "
2572                                         "aborting\n");
2573                                 goto err_dma;
2574                         }
2575                 }
2576         }
2577
2578 #ifndef HAVE_ASPM_QUIRKS
2579         /* 82575 requires that the pci-e link partner disable the L0s state */
2580         switch (pdev->device) {
2581         case E1000_DEV_ID_82575EB_COPPER:
2582         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2583         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2584                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2585         default:
2586                 break;
2587         }
2588
2589 #endif /* HAVE_ASPM_QUIRKS */
2590         err = pci_request_selected_regions(pdev,
2591                                            pci_select_bars(pdev,
2592                                                            IORESOURCE_MEM),
2593                                            igb_driver_name);
2594         if (err)
2595                 goto err_pci_reg;
2596
2597         pci_enable_pcie_error_reporting(pdev);
2598
2599         pci_set_master(pdev);
2600
2601         err = -ENOMEM;
2602 #ifdef HAVE_TX_MQ
2603         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2604                                    IGB_MAX_TX_QUEUES);
2605 #else
2606         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2607 #endif /* HAVE_TX_MQ */
2608         if (!netdev)
2609                 goto err_alloc_etherdev;
2610
2611         SET_MODULE_OWNER(netdev);
2612         SET_NETDEV_DEV(netdev, &pdev->dev);
2613
2614         pci_set_drvdata(pdev, netdev);
2615         adapter = netdev_priv(netdev);
2616         adapter->netdev = netdev;
2617         adapter->pdev = pdev;
2618         hw = &adapter->hw;
2619         hw->back = adapter;
2620         adapter->port_num = hw->bus.func;
2621         adapter->msg_enable = (1 << debug) - 1;
2622
2623 #ifdef HAVE_PCI_ERS
2624         err = pci_save_state(pdev);
2625         if (err)
2626                 goto err_ioremap;
2627 #endif
2628         err = -EIO;
2629         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2630                               pci_resource_len(pdev, 0));
2631         if (!hw->hw_addr)
2632                 goto err_ioremap;
2633
2634 #ifdef HAVE_NET_DEVICE_OPS
2635         netdev->netdev_ops = &igb_netdev_ops;
2636 #else /* HAVE_NET_DEVICE_OPS */
2637         netdev->open = &igb_open;
2638         netdev->stop = &igb_close;
2639         netdev->get_stats = &igb_get_stats;
2640 #ifdef HAVE_SET_RX_MODE
2641         netdev->set_rx_mode = &igb_set_rx_mode;
2642 #endif
2643         netdev->set_multicast_list = &igb_set_rx_mode;
2644         netdev->set_mac_address = &igb_set_mac;
2645         netdev->change_mtu = &igb_change_mtu;
2646         netdev->do_ioctl = &igb_ioctl;
2647 #ifdef HAVE_TX_TIMEOUT
2648         netdev->tx_timeout = &igb_tx_timeout;
2649 #endif
2650         netdev->vlan_rx_register = igb_vlan_mode;
2651         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2652         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2653 #ifdef CONFIG_NET_POLL_CONTROLLER
2654         netdev->poll_controller = igb_netpoll;
2655 #endif
2656         netdev->hard_start_xmit = &igb_xmit_frame;
2657 #endif /* HAVE_NET_DEVICE_OPS */
2658         igb_set_ethtool_ops(netdev);
2659 #ifdef HAVE_TX_TIMEOUT
2660         netdev->watchdog_timeo = 5 * HZ;
2661 #endif
2662
2663         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2664
2665         adapter->bd_number = cards_found;
2666
2667         /* setup the private structure */
2668         err = igb_sw_init(adapter);
2669         if (err)
2670                 goto err_sw_init;
2671
2672         e1000_get_bus_info(hw);
2673
2674         hw->phy.autoneg_wait_to_complete = FALSE;
2675         hw->mac.adaptive_ifs = FALSE;
2676
2677         /* Copper options */
2678         if (hw->phy.media_type == e1000_media_type_copper) {
2679                 hw->phy.mdix = AUTO_ALL_MODES;
2680                 hw->phy.disable_polarity_correction = FALSE;
2681                 hw->phy.ms_type = e1000_ms_hw_default;
2682         }
2683
2684         if (e1000_check_reset_block(hw))
2685                 dev_info(pci_dev_to_dev(pdev),
2686                         "PHY reset is blocked due to SOL/IDER session.\n");
2687
2688         /*
2689          * features is initialized to 0 in allocation, it might have bits
2690          * set by igb_sw_init so we should use an or instead of an
2691          * assignment.
2692          */
2693         netdev->features |= NETIF_F_SG |
2694                             NETIF_F_IP_CSUM |
2695 #ifdef NETIF_F_IPV6_CSUM
2696                             NETIF_F_IPV6_CSUM |
2697 #endif
2698 #ifdef NETIF_F_TSO
2699                             NETIF_F_TSO |
2700 #ifdef NETIF_F_TSO6
2701                             NETIF_F_TSO6 |
2702 #endif
2703 #endif /* NETIF_F_TSO */
2704 #ifdef NETIF_F_RXHASH
2705                             NETIF_F_RXHASH |
2706 #endif
2707                             NETIF_F_RXCSUM |
2708 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2709                             NETIF_F_HW_VLAN_CTAG_RX |
2710                             NETIF_F_HW_VLAN_CTAG_TX;
2711 #else
2712                             NETIF_F_HW_VLAN_RX |
2713                             NETIF_F_HW_VLAN_TX;
2714 #endif
2715
2716         if (hw->mac.type >= e1000_82576)
2717                 netdev->features |= NETIF_F_SCTP_CSUM;
2718
2719 #ifdef HAVE_NDO_SET_FEATURES
2720         /* copy netdev features into list of user selectable features */
2721         netdev->hw_features |= netdev->features;
2722 #ifndef IGB_NO_LRO
2723
2724         /* give us the option of enabling LRO later */
2725         netdev->hw_features |= NETIF_F_LRO;
2726 #endif
2727 #else
2728 #ifdef NETIF_F_GRO
2729
2730         /* this is only needed on kernels prior to 2.6.39 */
2731         netdev->features |= NETIF_F_GRO;
2732 #endif
2733 #endif
2734
2735         /* set this bit last since it cannot be part of hw_features */
2736 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2737         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2738 #else
2739         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2740 #endif
2741
2742 #ifdef HAVE_NETDEV_VLAN_FEATURES
2743         netdev->vlan_features |= NETIF_F_TSO |
2744                                  NETIF_F_TSO6 |
2745                                  NETIF_F_IP_CSUM |
2746                                  NETIF_F_IPV6_CSUM |
2747                                  NETIF_F_SG;
2748
2749 #endif
2750         if (pci_using_dac)
2751                 netdev->features |= NETIF_F_HIGHDMA;
2752
2753         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2754 #ifdef DEBUG
2755         if (adapter->dmac != IGB_DMAC_DISABLE)
2756                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2757 #endif
2758
2759         /* before reading the NVM, reset the controller to put the device in a
2760          * known good starting state */
2761         e1000_reset_hw(hw);
2762
2763         /* make sure the NVM is good */
2764         if (e1000_validate_nvm_checksum(hw) < 0) {
2765                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2766                         " Valid\n");
2767                 err = -EIO;
2768                 goto err_eeprom;
2769         }
2770
2771         /* copy the MAC address out of the NVM */
2772         if (e1000_read_mac_addr(hw))
2773                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2774         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2775 #ifdef ETHTOOL_GPERMADDR
2776         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2777
2778         if (!is_valid_ether_addr(netdev->perm_addr)) {
2779 #else
2780         if (!is_valid_ether_addr(netdev->dev_addr)) {
2781 #endif
2782                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2783                 err = -EIO;
2784                 goto err_eeprom;
2785         }
2786
2787         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2788         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2789         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2790         igb_rar_set(adapter, 0);
2791
2792         /* get firmware version for ethtool -i */
2793         igb_set_fw_version(adapter);
2794
2795         /* Check if Media Autosense is enabled */
2796         if (hw->mac.type == e1000_82580)
2797                 igb_init_mas(adapter);
2798         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2799                     (unsigned long) adapter);
2800         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2801                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2802                             (unsigned long) adapter);
2803         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2804                     (unsigned long) adapter);
2805
2806         INIT_WORK(&adapter->reset_task, igb_reset_task);
2807         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2808         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2809                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2810
2811         /* Initialize link properties that are user-changeable */
2812         adapter->fc_autoneg = true;
2813         hw->mac.autoneg = true;
2814         hw->phy.autoneg_advertised = 0x2f;
2815
2816         hw->fc.requested_mode = e1000_fc_default;
2817         hw->fc.current_mode = e1000_fc_default;
2818
2819         e1000_validate_mdi_setting(hw);
2820
2821         /* By default, support wake on port A */
2822         if (hw->bus.func == 0)
2823                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2824
2825         /* Check the NVM for wake support for non-port A ports */
2826         if (hw->mac.type >= e1000_82580)
2827                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2828                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2829                                  &eeprom_data);
2830         else if (hw->bus.func == 1)
2831                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2832
2833         if (eeprom_data & IGB_EEPROM_APME)
2834                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2835
2836         /* now that we have the eeprom settings, apply the special cases where
2837          * the eeprom may be wrong or the board simply won't support wake on
2838          * lan on a particular port */
2839         switch (pdev->device) {
2840         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2841                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2842                 break;
2843         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2844         case E1000_DEV_ID_82576_FIBER:
2845         case E1000_DEV_ID_82576_SERDES:
2846                 /* Wake events only supported on port A for dual fiber
2847                  * regardless of eeprom setting */
2848                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2849                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2850                 break;
2851         case E1000_DEV_ID_82576_QUAD_COPPER:
2852         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2853                 /* if quad port adapter, disable WoL on all but port A */
2854                 if (global_quad_port_a != 0)
2855                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2856                 else
2857                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2858                 /* Reset for multiple quad port adapters */
2859                 if (++global_quad_port_a == 4)
2860                         global_quad_port_a = 0;
2861                 break;
2862         default:
2863                 /* If the device can't wake, don't set software support */
2864                 if (!device_can_wakeup(&adapter->pdev->dev))
2865                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2866                 break;
2867         }
2868
2869         /* initialize the wol settings based on the eeprom settings */
2870         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2871                 adapter->wol |= E1000_WUFC_MAG;
2872
2873         /* Some vendors want WoL disabled by default, but still supported */
2874         if ((hw->mac.type == e1000_i350) &&
2875             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2876                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2877                 adapter->wol = 0;
2878         }
2879
2880         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2881                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2882
2883         /* reset the hardware with the new settings */
2884         igb_reset(adapter);
2885         adapter->devrc = 0;
2886
2887 #ifdef HAVE_I2C_SUPPORT
2888         /* Init the I2C interface */
2889         err = igb_init_i2c(adapter);
2890         if (err) {
2891                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2892                 goto err_eeprom;
2893         }
2894 #endif /* HAVE_I2C_SUPPORT */
2895
2896         /* let the f/w know that the h/w is now under the control of the
2897          * driver. */
2898         igb_get_hw_control(adapter);
2899
2900         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2901         err = register_netdev(netdev);
2902         if (err)
2903                 goto err_register;
2904
2905 #ifdef CONFIG_IGB_VMDQ_NETDEV
2906         err = igb_init_vmdq_netdevs(adapter);
2907         if (err)
2908                 goto err_register;
2909 #endif
2910         /* carrier off reporting is important to ethtool even BEFORE open */
2911         netif_carrier_off(netdev);
2912
2913 #ifdef IGB_DCA
2914         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2915                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2916                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2917                 igb_setup_dca(adapter);
2918         }
2919
2920 #endif
2921 #ifdef HAVE_PTP_1588_CLOCK
2922         /* do hw tstamp init after resetting */
2923         igb_ptp_init(adapter);
2924 #endif /* HAVE_PTP_1588_CLOCK */
2925
2926         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2927         /* print bus type/speed/width info */
2928         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2929                  netdev->name,
2930                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2931                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2932                   (hw->mac.type == e1000_i354) ? "integrated" :
2933                                                             "unknown"),
2934                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2935                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2936                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2937                   (hw->mac.type == e1000_i354) ? "integrated" :
2938                    "unknown"));
2939         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2940         for (i = 0; i < 6; i++)
2941                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2942
2943         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2944         if (ret_val)
2945                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2946         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2947                  pba_str);
2948
2949
2950         /* Initialize the thermal sensor on i350 devices. */
2951         if (hw->mac.type == e1000_i350) {
2952                 if (hw->bus.func == 0) {
2953                         u16 ets_word;
2954
2955                         /*
2956                          * Read the NVM to determine if this i350 device
2957                          * supports an external thermal sensor.
2958                          */
2959                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2960                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2961                                 adapter->ets = true;
2962                         else
2963                                 adapter->ets = false;
2964                 }
2965 #ifdef IGB_HWMON
2966
2967                 igb_sysfs_init(adapter);
2968 #else
2969 #ifdef IGB_PROCFS
2970
2971                 igb_procfs_init(adapter);
2972 #endif /* IGB_PROCFS */
2973 #endif /* IGB_HWMON */
2974         } else {
2975                 adapter->ets = false;
2976         }
2977
2978         if (hw->phy.media_type == e1000_media_type_copper) {
2979                 switch (hw->mac.type) {
2980                 case e1000_i350:
2981                 case e1000_i210:
2982                 case e1000_i211:
2983                         /* Enable EEE for internal copper PHY devices */
2984                         err = e1000_set_eee_i350(hw);
2985                         if ((!err) &&
2986                             (adapter->flags & IGB_FLAG_EEE))
2987                                 adapter->eee_advert =
2988                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2989                         break;
2990                 case e1000_i354:
2991                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2992                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2993                                 err = e1000_set_eee_i354(hw);
2994                                 if ((!err) &&
2995                                     (adapter->flags & IGB_FLAG_EEE))
2996                                         adapter->eee_advert =
2997                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2998                         }
2999                         break;
3000                 default:
3001                         break;
3002                 }
3003         }
3004
3005         /* send driver version info to firmware */
3006         if (hw->mac.type >= e1000_i350)
3007                 igb_init_fw(adapter);
3008
3009 #ifndef IGB_NO_LRO
3010         if (netdev->features & NETIF_F_LRO)
3011                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3012         else
3013                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3014 #endif
3015         dev_info(pci_dev_to_dev(pdev),
3016                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3017                  adapter->msix_entries ? "MSI-X" :
3018                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3019                  adapter->num_rx_queues, adapter->num_tx_queues);
3020
3021         cards_found++;
3022
3023         pm_runtime_put_noidle(&pdev->dev);
3024         return 0;
3025
3026 err_register:
3027         igb_release_hw_control(adapter);
3028 #ifdef HAVE_I2C_SUPPORT
3029         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3030 #endif /* HAVE_I2C_SUPPORT */
3031 err_eeprom:
3032         if (!e1000_check_reset_block(hw))
3033                 e1000_phy_hw_reset(hw);
3034
3035         if (hw->flash_address)
3036                 iounmap(hw->flash_address);
3037 err_sw_init:
3038         igb_clear_interrupt_scheme(adapter);
3039         igb_reset_sriov_capability(adapter);
3040         iounmap(hw->hw_addr);
3041 err_ioremap:
3042         free_netdev(netdev);
3043 err_alloc_etherdev:
3044         pci_release_selected_regions(pdev,
3045                                      pci_select_bars(pdev, IORESOURCE_MEM));
3046 err_pci_reg:
3047 err_dma:
3048         pci_disable_device(pdev);
3049         return err;
3050 }
3051 #ifdef HAVE_I2C_SUPPORT
3052 /*
3053  *  igb_remove_i2c - Cleanup  I2C interface
3054  *  @adapter: pointer to adapter structure
3055  *
3056  */
3057 static void igb_remove_i2c(struct igb_adapter *adapter)
3058 {
3059
3060         /* free the adapter bus structure */
3061         i2c_del_adapter(&adapter->i2c_adap);
3062 }
3063 #endif /* HAVE_I2C_SUPPORT */
3064
3065 /**
3066  * igb_remove - Device Removal Routine
3067  * @pdev: PCI device information struct
3068  *
3069  * igb_remove is called by the PCI subsystem to alert the driver
3070  * that it should release a PCI device.  The could be caused by a
3071  * Hot-Plug event, or because the driver is going to be removed from
3072  * memory.
3073  **/
3074 static void __devexit igb_remove(struct pci_dev *pdev)
3075 {
3076         struct net_device *netdev = pci_get_drvdata(pdev);
3077         struct igb_adapter *adapter = netdev_priv(netdev);
3078         struct e1000_hw *hw = &adapter->hw;
3079
3080         pm_runtime_get_noresume(&pdev->dev);
3081 #ifdef HAVE_I2C_SUPPORT
3082         igb_remove_i2c(adapter);
3083 #endif /* HAVE_I2C_SUPPORT */
3084 #ifdef HAVE_PTP_1588_CLOCK
3085         igb_ptp_stop(adapter);
3086 #endif /* HAVE_PTP_1588_CLOCK */
3087
3088         /* flush_scheduled work may reschedule our watchdog task, so
3089          * explicitly disable watchdog tasks from being rescheduled  */
3090         set_bit(__IGB_DOWN, &adapter->state);
3091         del_timer_sync(&adapter->watchdog_timer);
3092         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3093                 del_timer_sync(&adapter->dma_err_timer);
3094         del_timer_sync(&adapter->phy_info_timer);
3095
3096         flush_scheduled_work();
3097
3098 #ifdef IGB_DCA
3099         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3100                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3101                 dca_remove_requester(&pdev->dev);
3102                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3103                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3104         }
3105 #endif
3106
3107         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3108          * would have already happened in close and is redundant. */
3109         igb_release_hw_control(adapter);
3110
3111         unregister_netdev(netdev);
3112 #ifdef CONFIG_IGB_VMDQ_NETDEV
3113         igb_remove_vmdq_netdevs(adapter);
3114 #endif
3115
3116         igb_clear_interrupt_scheme(adapter);
3117         igb_reset_sriov_capability(adapter);
3118
3119         iounmap(hw->hw_addr);
3120         if (hw->flash_address)
3121                 iounmap(hw->flash_address);
3122         pci_release_selected_regions(pdev,
3123                                      pci_select_bars(pdev, IORESOURCE_MEM));
3124
3125 #ifdef IGB_HWMON
3126         igb_sysfs_exit(adapter);
3127 #else
3128 #ifdef IGB_PROCFS
3129         igb_procfs_exit(adapter);
3130 #endif /* IGB_PROCFS */
3131 #endif /* IGB_HWMON */
3132         kfree(adapter->mac_table);
3133         kfree(adapter->shadow_vfta);
3134         free_netdev(netdev);
3135
3136         pci_disable_pcie_error_reporting(pdev);
3137
3138         pci_disable_device(pdev);
3139 }
3140
3141 /**
3142  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3143  * @adapter: board private structure to initialize
3144  *
3145  * igb_sw_init initializes the Adapter private data structure.
3146  * Fields are initialized based on PCI device information and
3147  * OS network device settings (MTU size).
3148  **/
3149 static int igb_sw_init(struct igb_adapter *adapter)
3150 {
3151         struct e1000_hw *hw = &adapter->hw;
3152         struct net_device *netdev = adapter->netdev;
3153         struct pci_dev *pdev = adapter->pdev;
3154
3155         /* PCI config space info */
3156
3157         hw->vendor_id = pdev->vendor;
3158         hw->device_id = pdev->device;
3159         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3160         hw->subsystem_device_id = pdev->subsystem_device;
3161
3162         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3163
3164         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3165
3166         /* set default ring sizes */
3167         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3168         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3169
3170         /* set default work limits */
3171         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3172
3173         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3174                                               VLAN_HLEN;
3175
3176         /* Initialize the hardware-specific values */
3177         if (e1000_setup_init_funcs(hw, TRUE)) {
3178                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3179                 return -EIO;
3180         }
3181
3182         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3183                                      hw->mac.rar_entry_count,
3184                                      GFP_ATOMIC);
3185
3186         /* Setup and initialize a copy of the hw vlan table array */
3187         adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3188                                        GFP_ATOMIC);
3189 #ifdef NO_KNI
3190         /* These calls may decrease the number of queues */
3191         if (hw->mac.type < e1000_i210) {
3192                 igb_set_sriov_capability(adapter);
3193         }
3194
3195         if (igb_init_interrupt_scheme(adapter, true)) {
3196                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3197                 return -ENOMEM;
3198         }
3199
3200         /* Explicitly disable IRQ since the NIC can be in any state. */
3201         igb_irq_disable(adapter);
3202
3203         set_bit(__IGB_DOWN, &adapter->state);
3204 #endif
3205         return 0;
3206 }
3207
3208 /**
3209  * igb_open - Called when a network interface is made active
3210  * @netdev: network interface device structure
3211  *
3212  * Returns 0 on success, negative value on failure
3213  *
3214  * The open entry point is called when a network interface is made
3215  * active by the system (IFF_UP).  At this point all resources needed
3216  * for transmit and receive operations are allocated, the interrupt
3217  * handler is registered with the OS, the watchdog timer is started,
3218  * and the stack is notified that the interface is ready.
3219  **/
3220 static int __igb_open(struct net_device *netdev, bool resuming)
3221 {
3222         struct igb_adapter *adapter = netdev_priv(netdev);
3223         struct e1000_hw *hw = &adapter->hw;
3224 #ifdef CONFIG_PM_RUNTIME
3225         struct pci_dev *pdev = adapter->pdev;
3226 #endif /* CONFIG_PM_RUNTIME */
3227         int err;
3228         int i;
3229
3230         /* disallow open during test */
3231         if (test_bit(__IGB_TESTING, &adapter->state)) {
3232                 WARN_ON(resuming);
3233                 return -EBUSY;
3234         }
3235
3236 #ifdef CONFIG_PM_RUNTIME
3237         if (!resuming)
3238                 pm_runtime_get_sync(&pdev->dev);
3239 #endif /* CONFIG_PM_RUNTIME */
3240
3241         netif_carrier_off(netdev);
3242
3243         /* allocate transmit descriptors */
3244         err = igb_setup_all_tx_resources(adapter);
3245         if (err)
3246                 goto err_setup_tx;
3247
3248         /* allocate receive descriptors */
3249         err = igb_setup_all_rx_resources(adapter);
3250         if (err)
3251                 goto err_setup_rx;
3252
3253         igb_power_up_link(adapter);
3254
3255         /* before we allocate an interrupt, we must be ready to handle it.
3256          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3257          * as soon as we call pci_request_irq, so we have to setup our
3258          * clean_rx handler before we do so.  */
3259         igb_configure(adapter);
3260
3261         err = igb_request_irq(adapter);
3262         if (err)
3263                 goto err_req_irq;
3264
3265         /* Notify the stack of the actual queue counts. */
3266         netif_set_real_num_tx_queues(netdev,
3267                                      adapter->vmdq_pools ? 1 :
3268                                      adapter->num_tx_queues);
3269
3270         err = netif_set_real_num_rx_queues(netdev,
3271                                            adapter->vmdq_pools ? 1 :
3272                                            adapter->num_rx_queues);
3273         if (err)
3274                 goto err_set_queues;
3275
3276         /* From here on the code is the same as igb_up() */
3277         clear_bit(__IGB_DOWN, &adapter->state);
3278
3279         for (i = 0; i < adapter->num_q_vectors; i++)
3280                 napi_enable(&(adapter->q_vector[i]->napi));
3281         igb_configure_lli(adapter);
3282
3283         /* Clear any pending interrupts. */
3284         E1000_READ_REG(hw, E1000_ICR);
3285
3286         igb_irq_enable(adapter);
3287
3288         /* notify VFs that reset has been completed */
3289         if (adapter->vfs_allocated_count) {
3290                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3291                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3292                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3293         }
3294
3295         netif_tx_start_all_queues(netdev);
3296
3297         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3298                 schedule_work(&adapter->dma_err_task);
3299
3300         /* start the watchdog. */
3301         hw->mac.get_link_status = 1;
3302         schedule_work(&adapter->watchdog_task);
3303
3304         return E1000_SUCCESS;
3305
3306 err_set_queues:
3307         igb_free_irq(adapter);
3308 err_req_irq:
3309         igb_release_hw_control(adapter);
3310         igb_power_down_link(adapter);
3311         igb_free_all_rx_resources(adapter);
3312 err_setup_rx:
3313         igb_free_all_tx_resources(adapter);
3314 err_setup_tx:
3315         igb_reset(adapter);
3316
3317 #ifdef CONFIG_PM_RUNTIME
3318         if (!resuming)
3319                 pm_runtime_put(&pdev->dev);
3320 #endif /* CONFIG_PM_RUNTIME */
3321
3322         return err;
3323 }
3324
3325 static int igb_open(struct net_device *netdev)
3326 {
3327         return __igb_open(netdev, false);
3328 }
3329
3330 /**
3331  * igb_close - Disables a network interface
3332  * @netdev: network interface device structure
3333  *
3334  * Returns 0, this is not allowed to fail
3335  *
3336  * The close entry point is called when an interface is de-activated
3337  * by the OS.  The hardware is still under the driver's control, but
3338  * needs to be disabled.  A global MAC reset is issued to stop the
3339  * hardware, and all transmit and receive resources are freed.
3340  **/
3341 static int __igb_close(struct net_device *netdev, bool suspending)
3342 {
3343         struct igb_adapter *adapter = netdev_priv(netdev);
3344 #ifdef CONFIG_PM_RUNTIME
3345         struct pci_dev *pdev = adapter->pdev;
3346 #endif /* CONFIG_PM_RUNTIME */
3347
3348         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3349
3350 #ifdef CONFIG_PM_RUNTIME
3351         if (!suspending)
3352                 pm_runtime_get_sync(&pdev->dev);
3353 #endif /* CONFIG_PM_RUNTIME */
3354
3355         igb_down(adapter);
3356
3357         igb_release_hw_control(adapter);
3358
3359         igb_free_irq(adapter);
3360
3361         igb_free_all_tx_resources(adapter);
3362         igb_free_all_rx_resources(adapter);
3363
3364 #ifdef CONFIG_PM_RUNTIME
3365         if (!suspending)
3366                 pm_runtime_put_sync(&pdev->dev);
3367 #endif /* CONFIG_PM_RUNTIME */
3368
3369         return 0;
3370 }
3371
3372 static int igb_close(struct net_device *netdev)
3373 {
3374         return __igb_close(netdev, false);
3375 }
3376
3377 /**
3378  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3379  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3380  *
3381  * Return 0 on success, negative on failure
3382  **/
3383 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3384 {
3385         struct device *dev = tx_ring->dev;
3386         int size;
3387
3388         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3389         tx_ring->tx_buffer_info = vzalloc(size);
3390         if (!tx_ring->tx_buffer_info)
3391                 goto err;
3392
3393         /* round up to nearest 4K */
3394         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3395         tx_ring->size = ALIGN(tx_ring->size, 4096);
3396
3397         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3398                                            &tx_ring->dma, GFP_KERNEL);
3399
3400         if (!tx_ring->desc)
3401                 goto err;
3402
3403         tx_ring->next_to_use = 0;
3404         tx_ring->next_to_clean = 0;
3405
3406         return 0;
3407
3408 err:
3409         vfree(tx_ring->tx_buffer_info);
3410         dev_err(dev,
3411                 "Unable to allocate memory for the transmit descriptor ring\n");
3412         return -ENOMEM;
3413 }
3414
3415 /**
3416  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3417  *                                (Descriptors) for all queues
3418  * @adapter: board private structure
3419  *
3420  * Return 0 on success, negative on failure
3421  **/
3422 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3423 {
3424         struct pci_dev *pdev = adapter->pdev;
3425         int i, err = 0;
3426
3427         for (i = 0; i < adapter->num_tx_queues; i++) {
3428                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3429                 if (err) {
3430                         dev_err(pci_dev_to_dev(pdev),
3431                                 "Allocation for Tx Queue %u failed\n", i);
3432                         for (i--; i >= 0; i--)
3433                                 igb_free_tx_resources(adapter->tx_ring[i]);
3434                         break;
3435                 }
3436         }
3437
3438         return err;
3439 }
3440
3441 /**
3442  * igb_setup_tctl - configure the transmit control registers
3443  * @adapter: Board private structure
3444  **/
3445 void igb_setup_tctl(struct igb_adapter *adapter)
3446 {
3447         struct e1000_hw *hw = &adapter->hw;
3448         u32 tctl;
3449
3450         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3451         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3452
3453         /* Program the Transmit Control Register */
3454         tctl = E1000_READ_REG(hw, E1000_TCTL);
3455         tctl &= ~E1000_TCTL_CT;
3456         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3457                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3458
3459         e1000_config_collision_dist(hw);
3460
3461         /* Enable transmits */
3462         tctl |= E1000_TCTL_EN;
3463
3464         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3465 }
3466
3467 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3468 {
3469         struct e1000_hw *hw = &adapter->hw;
3470         switch (hw->mac.type) {
3471         case e1000_i354:
3472                 return 4;
3473         case e1000_82576:
3474                 if (adapter->msix_entries)
3475                         return 1;
3476         default:
3477                 break;
3478         }
3479
3480         return 16;
3481 }
3482
3483 /**
3484  * igb_configure_tx_ring - Configure transmit ring after Reset
3485  * @adapter: board private structure
3486  * @ring: tx ring to configure
3487  *
3488  * Configure a transmit ring after a reset.
3489  **/
3490 void igb_configure_tx_ring(struct igb_adapter *adapter,
3491                            struct igb_ring *ring)
3492 {
3493         struct e1000_hw *hw = &adapter->hw;
3494         u32 txdctl = 0;
3495         u64 tdba = ring->dma;
3496         int reg_idx = ring->reg_idx;
3497
3498         /* disable the queue */
3499         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3500         E1000_WRITE_FLUSH(hw);
3501         mdelay(10);
3502
3503         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3504                         ring->count * sizeof(union e1000_adv_tx_desc));
3505         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3506                         tdba & 0x00000000ffffffffULL);
3507         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3508
3509         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3510         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3511         writel(0, ring->tail);
3512
3513         txdctl |= IGB_TX_PTHRESH;
3514         txdctl |= IGB_TX_HTHRESH << 8;
3515         txdctl |= igb_tx_wthresh(adapter) << 16;
3516
3517         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3518         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3519 }
3520
3521 /**
3522  * igb_configure_tx - Configure transmit Unit after Reset
3523  * @adapter: board private structure
3524  *
3525  * Configure the Tx unit of the MAC after a reset.
3526  **/
3527 static void igb_configure_tx(struct igb_adapter *adapter)
3528 {
3529         int i;
3530
3531         for (i = 0; i < adapter->num_tx_queues; i++)
3532                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3533 }
3534
3535 /**
3536  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3537  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3538  *
3539  * Returns 0 on success, negative on failure
3540  **/
3541 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3542 {
3543         struct device *dev = rx_ring->dev;
3544         int size, desc_len;
3545
3546         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3547         rx_ring->rx_buffer_info = vzalloc(size);
3548         if (!rx_ring->rx_buffer_info)
3549                 goto err;
3550
3551         desc_len = sizeof(union e1000_adv_rx_desc);
3552
3553         /* Round up to nearest 4K */
3554         rx_ring->size = rx_ring->count * desc_len;
3555         rx_ring->size = ALIGN(rx_ring->size, 4096);
3556
3557         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3558                                            &rx_ring->dma, GFP_KERNEL);
3559
3560         if (!rx_ring->desc)
3561                 goto err;
3562
3563         rx_ring->next_to_alloc = 0;
3564         rx_ring->next_to_clean = 0;
3565         rx_ring->next_to_use = 0;
3566
3567         return 0;
3568
3569 err:
3570         vfree(rx_ring->rx_buffer_info);
3571         rx_ring->rx_buffer_info = NULL;
3572         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3573                 " ring\n");
3574         return -ENOMEM;
3575 }
3576
3577 /**
3578  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3579  *                                (Descriptors) for all queues
3580  * @adapter: board private structure
3581  *
3582  * Return 0 on success, negative on failure
3583  **/
3584 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3585 {
3586         struct pci_dev *pdev = adapter->pdev;
3587         int i, err = 0;
3588
3589         for (i = 0; i < adapter->num_rx_queues; i++) {
3590                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3591                 if (err) {
3592                         dev_err(pci_dev_to_dev(pdev),
3593                                 "Allocation for Rx Queue %u failed\n", i);
3594                         for (i--; i >= 0; i--)
3595                                 igb_free_rx_resources(adapter->rx_ring[i]);
3596                         break;
3597                 }
3598         }
3599
3600         return err;
3601 }
3602
3603 /**
3604  * igb_setup_mrqc - configure the multiple receive queue control registers
3605  * @adapter: Board private structure
3606  **/
3607 static void igb_setup_mrqc(struct igb_adapter *adapter)
3608 {
3609         struct e1000_hw *hw = &adapter->hw;
3610         u32 mrqc, rxcsum;
3611         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3612         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3613                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3614                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3615                                         0xFA01ACBE };
3616
3617         /* Fill out hash function seeds */
3618         for (j = 0; j < 10; j++)
3619                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3620
3621         num_rx_queues = adapter->rss_queues;
3622
3623         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3624         switch (hw->mac.type) {
3625         case e1000_82575:
3626                 if (adapter->vmdq_pools) {
3627                         shift = 2;
3628                         shift2 = 6;
3629                         break;
3630                 }
3631                 shift = 6;
3632                 break;
3633         case e1000_82576:
3634                 /* 82576 supports 2 RSS queues for SR-IOV */
3635                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3636                         shift = 3;
3637                         num_rx_queues = 2;
3638                 }
3639                 break;
3640         default:
3641                 break;
3642         }
3643
3644         /*
3645          * Populate the redirection table 4 entries at a time.  To do this
3646          * we are generating the results for n and n+2 and then interleaving
3647          * those with the results with n+1 and n+3.
3648          */
3649         for (j = 0; j < 32; j++) {
3650                 /* first pass generates n and n+2 */
3651                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3652                 u32 reta = (base & 0x07800780) >> (7 - shift);
3653
3654                 /* second pass generates n+1 and n+3 */
3655                 base += 0x00010001 * num_rx_queues;
3656                 reta |= (base & 0x07800780) << (1 + shift);
3657
3658                 /* generate 2nd table for 82575 based parts */
3659                 if (shift2)
3660                         reta |= (0x01010101 * num_rx_queues) << shift2;
3661
3662                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3663         }
3664
3665         /*
3666          * Disable raw packet checksumming so that RSS hash is placed in
3667          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3668          * offloads as they are enabled by default
3669          */
3670         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3671         rxcsum |= E1000_RXCSUM_PCSD;
3672
3673         if (adapter->hw.mac.type >= e1000_82576)
3674                 /* Enable Receive Checksum Offload for SCTP */
3675                 rxcsum |= E1000_RXCSUM_CRCOFL;
3676
3677         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3678         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3679
3680         /* Generate RSS hash based on packet types, TCP/UDP
3681          * port numbers and/or IPv4/v6 src and dst addresses
3682          */
3683         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3684                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3685                E1000_MRQC_RSS_FIELD_IPV6 |
3686                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3687                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3688
3689         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3690                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3691         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3692                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3693
3694         /* If VMDq is enabled then we set the appropriate mode for that, else
3695          * we default to RSS so that an RSS hash is calculated per packet even
3696          * if we are only using one queue */
3697         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3698                 if (hw->mac.type > e1000_82575) {
3699                         /* Set the default pool for the PF's first queue */
3700                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3701                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3702                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3703                         vtctl |= adapter->vfs_allocated_count <<
3704                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3705                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3706                 } else if (adapter->rss_queues > 1) {
3707                         /* set default queue for pool 1 to queue 2 */
3708                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3709                                         adapter->rss_queues << 7);
3710                 }
3711                 if (adapter->rss_queues > 1)
3712                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3713                 else
3714                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3715         } else {
3716                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3717         }
3718         igb_vmm_control(adapter);
3719
3720         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3721 }
3722
3723 /**
3724  * igb_setup_rctl - configure the receive control registers
3725  * @adapter: Board private structure
3726  **/
3727 void igb_setup_rctl(struct igb_adapter *adapter)
3728 {
3729         struct e1000_hw *hw = &adapter->hw;
3730         u32 rctl;
3731
3732         rctl = E1000_READ_REG(hw, E1000_RCTL);
3733
3734         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3735         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3736
3737         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3738                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3739
3740         /*
3741          * enable stripping of CRC. It's unlikely this will break BMC
3742          * redirection as it did with e1000. Newer features require
3743          * that the HW strips the CRC.
3744          */
3745         rctl |= E1000_RCTL_SECRC;
3746
3747         /* disable store bad packets and clear size bits. */
3748         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3749
3750         /* enable LPE to prevent packets larger than max_frame_size */
3751         rctl |= E1000_RCTL_LPE;
3752
3753         /* disable queue 0 to prevent tail write w/o re-config */
3754         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3755
3756         /* Attention!!!  For SR-IOV PF driver operations you must enable
3757          * queue drop for all VF and PF queues to prevent head of line blocking
3758          * if an un-trusted VF does not provide descriptors to hardware.
3759          */
3760         if (adapter->vfs_allocated_count) {
3761                 /* set all queue drop enable bits */
3762                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3763         }
3764
3765         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3766 }
3767
3768 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3769                                    int vfn)
3770 {
3771         struct e1000_hw *hw = &adapter->hw;
3772         u32 vmolr;
3773
3774         /* if it isn't the PF check to see if VFs are enabled and
3775          * increase the size to support vlan tags */
3776         if (vfn < adapter->vfs_allocated_count &&
3777             adapter->vf_data[vfn].vlans_enabled)
3778                 size += VLAN_HLEN;
3779
3780 #ifdef CONFIG_IGB_VMDQ_NETDEV
3781         if (vfn >= adapter->vfs_allocated_count) {
3782                 int queue = vfn - adapter->vfs_allocated_count;
3783                 struct igb_vmdq_adapter *vadapter;
3784
3785                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3786                 if (vadapter->vlgrp)
3787                         size += VLAN_HLEN;
3788         }
3789 #endif
3790         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3791         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3792         vmolr |= size | E1000_VMOLR_LPE;
3793         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3794
3795         return 0;
3796 }
3797
3798 /**
3799  * igb_rlpml_set - set maximum receive packet size
3800  * @adapter: board private structure
3801  *
3802  * Configure maximum receivable packet size.
3803  **/
3804 static void igb_rlpml_set(struct igb_adapter *adapter)
3805 {
3806         u32 max_frame_size = adapter->max_frame_size;
3807         struct e1000_hw *hw = &adapter->hw;
3808         u16 pf_id = adapter->vfs_allocated_count;
3809
3810         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3811                 int i;
3812                 for (i = 0; i < adapter->vmdq_pools; i++)
3813                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3814                 /*
3815                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3816                  * to our max jumbo frame size, in case we need to enable
3817                  * jumbo frames on one of the rings later.
3818                  * This will not pass over-length frames into the default
3819                  * queue because it's gated by the VMOLR.RLPML.
3820                  */
3821                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3822         }
3823         /* Set VF RLPML for the PF device. */
3824         if (adapter->vfs_allocated_count)
3825                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3826
3827         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3828 }
3829
3830 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3831                                         int vfn, bool enable)
3832 {
3833         struct e1000_hw *hw = &adapter->hw;
3834         u32 val;
3835         void __iomem *reg;
3836
3837         if (hw->mac.type < e1000_82576)
3838                 return;
3839
3840         if (hw->mac.type == e1000_i350)
3841                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3842         else
3843                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3844
3845         val = readl(reg);
3846         if (enable)
3847                 val |= E1000_VMOLR_STRVLAN;
3848         else
3849                 val &= ~(E1000_VMOLR_STRVLAN);
3850         writel(val, reg);
3851 }
3852 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3853                                  int vfn, bool aupe)
3854 {
3855         struct e1000_hw *hw = &adapter->hw;
3856         u32 vmolr;
3857
3858         /*
3859          * This register exists only on 82576 and newer so if we are older then
3860          * we should exit and do nothing
3861          */
3862         if (hw->mac.type < e1000_82576)
3863                 return;
3864
3865         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3866
3867         if (aupe)
3868                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3869         else
3870                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3871
3872         /* clear all bits that might not be set */
3873         vmolr &= ~E1000_VMOLR_RSSE;
3874
3875         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3876                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3877
3878         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3879         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3880
3881         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3882 }
3883
3884 /**
3885  * igb_configure_rx_ring - Configure a receive ring after Reset
3886  * @adapter: board private structure
3887  * @ring: receive ring to be configured
3888  *
3889  * Configure the Rx unit of the MAC after a reset.
3890  **/
3891 void igb_configure_rx_ring(struct igb_adapter *adapter,
3892                            struct igb_ring *ring)
3893 {
3894         struct e1000_hw *hw = &adapter->hw;
3895         u64 rdba = ring->dma;
3896         int reg_idx = ring->reg_idx;
3897         u32 srrctl = 0, rxdctl = 0;
3898
3899 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3900         /*
3901          * RLPML prevents us from receiving a frame larger than max_frame so
3902          * it is safe to just set the rx_buffer_len to max_frame without the
3903          * risk of an skb over panic.
3904          */
3905         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3906                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3907
3908 #endif
3909         /* disable the queue */
3910         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3911
3912         /* Set DMA base address registers */
3913         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3914                         rdba & 0x00000000ffffffffULL);
3915         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3916         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3917                        ring->count * sizeof(union e1000_adv_rx_desc));
3918
3919         /* initialize head and tail */
3920         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3921         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3922         writel(0, ring->tail);
3923
3924         /* reset next-to- use/clean to place SW in sync with hardwdare */
3925         ring->next_to_clean = 0;
3926         ring->next_to_use = 0;
3927 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3928         ring->next_to_alloc = 0;
3929
3930 #endif
3931         /* set descriptor configuration */
3932 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3933         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3934         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3935 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3936         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3937                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3938 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3939         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3940 #ifdef HAVE_PTP_1588_CLOCK
3941         if (hw->mac.type >= e1000_82580)
3942                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3943 #endif /* HAVE_PTP_1588_CLOCK */
3944         /*
3945          * We should set the drop enable bit if:
3946          *  SR-IOV is enabled
3947          *   or
3948          *  Flow Control is disabled and number of RX queues > 1
3949          *
3950          *  This allows us to avoid head of line blocking for security
3951          *  and performance reasons.
3952          */
3953         if (adapter->vfs_allocated_count ||
3954             (adapter->num_rx_queues > 1 &&
3955              (hw->fc.requested_mode == e1000_fc_none ||
3956               hw->fc.requested_mode == e1000_fc_rx_pause)))
3957                 srrctl |= E1000_SRRCTL_DROP_EN;
3958
3959         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3960
3961         /* set filtering for VMDQ pools */
3962         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3963
3964         rxdctl |= IGB_RX_PTHRESH;
3965         rxdctl |= IGB_RX_HTHRESH << 8;
3966         rxdctl |= IGB_RX_WTHRESH << 16;
3967
3968         /* enable receive descriptor fetching */
3969         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3970         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3971 }
3972
3973 /**
3974  * igb_configure_rx - Configure receive Unit after Reset
3975  * @adapter: board private structure
3976  *
3977  * Configure the Rx unit of the MAC after a reset.
3978  **/
3979 static void igb_configure_rx(struct igb_adapter *adapter)
3980 {
3981         int i;
3982
3983         /* set UTA to appropriate mode */
3984         igb_set_uta(adapter);
3985
3986         igb_full_sync_mac_table(adapter);
3987         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3988          * the Base and Length of the Rx Descriptor Ring */
3989         for (i = 0; i < adapter->num_rx_queues; i++)
3990                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3991 }
3992
3993 /**
3994  * igb_free_tx_resources - Free Tx Resources per Queue
3995  * @tx_ring: Tx descriptor ring for a specific queue
3996  *
3997  * Free all transmit software resources
3998  **/
3999 void igb_free_tx_resources(struct igb_ring *tx_ring)
4000 {
4001         igb_clean_tx_ring(tx_ring);
4002
4003         vfree(tx_ring->tx_buffer_info);
4004         tx_ring->tx_buffer_info = NULL;
4005
4006         /* if not set, then don't free */
4007         if (!tx_ring->desc)
4008                 return;
4009
4010         dma_free_coherent(tx_ring->dev, tx_ring->size,
4011                           tx_ring->desc, tx_ring->dma);
4012
4013         tx_ring->desc = NULL;
4014 }
4015
4016 /**
4017  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4018  * @adapter: board private structure
4019  *
4020  * Free all transmit software resources
4021  **/
4022 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4023 {
4024         int i;
4025
4026         for (i = 0; i < adapter->num_tx_queues; i++)
4027                 igb_free_tx_resources(adapter->tx_ring[i]);
4028 }
4029
4030 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4031                                     struct igb_tx_buffer *tx_buffer)
4032 {
4033         if (tx_buffer->skb) {
4034                 dev_kfree_skb_any(tx_buffer->skb);
4035                 if (dma_unmap_len(tx_buffer, len))
4036                         dma_unmap_single(ring->dev,
4037                                          dma_unmap_addr(tx_buffer, dma),
4038                                          dma_unmap_len(tx_buffer, len),
4039                                          DMA_TO_DEVICE);
4040         } else if (dma_unmap_len(tx_buffer, len)) {
4041                 dma_unmap_page(ring->dev,
4042                                dma_unmap_addr(tx_buffer, dma),
4043                                dma_unmap_len(tx_buffer, len),
4044                                DMA_TO_DEVICE);
4045         }
4046         tx_buffer->next_to_watch = NULL;
4047         tx_buffer->skb = NULL;
4048         dma_unmap_len_set(tx_buffer, len, 0);
4049         /* buffer_info must be completely set up in the transmit path */
4050 }
4051
4052 /**
4053  * igb_clean_tx_ring - Free Tx Buffers
4054  * @tx_ring: ring to be cleaned
4055  **/
4056 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4057 {
4058         struct igb_tx_buffer *buffer_info;
4059         unsigned long size;
4060         u16 i;
4061
4062         if (!tx_ring->tx_buffer_info)
4063                 return;
4064         /* Free all the Tx ring sk_buffs */
4065
4066         for (i = 0; i < tx_ring->count; i++) {
4067                 buffer_info = &tx_ring->tx_buffer_info[i];
4068                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4069         }
4070
4071         netdev_tx_reset_queue(txring_txq(tx_ring));
4072
4073         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4074         memset(tx_ring->tx_buffer_info, 0, size);
4075
4076         /* Zero out the descriptor ring */
4077         memset(tx_ring->desc, 0, tx_ring->size);
4078
4079         tx_ring->next_to_use = 0;
4080         tx_ring->next_to_clean = 0;
4081 }
4082
4083 /**
4084  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4085  * @adapter: board private structure
4086  **/
4087 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4088 {
4089         int i;
4090
4091         for (i = 0; i < adapter->num_tx_queues; i++)
4092                 igb_clean_tx_ring(adapter->tx_ring[i]);
4093 }
4094
4095 /**
4096  * igb_free_rx_resources - Free Rx Resources
4097  * @rx_ring: ring to clean the resources from
4098  *
4099  * Free all receive software resources
4100  **/
4101 void igb_free_rx_resources(struct igb_ring *rx_ring)
4102 {
4103         igb_clean_rx_ring(rx_ring);
4104
4105         vfree(rx_ring->rx_buffer_info);
4106         rx_ring->rx_buffer_info = NULL;
4107
4108         /* if not set, then don't free */
4109         if (!rx_ring->desc)
4110                 return;
4111
4112         dma_free_coherent(rx_ring->dev, rx_ring->size,
4113                           rx_ring->desc, rx_ring->dma);
4114
4115         rx_ring->desc = NULL;
4116 }
4117
4118 /**
4119  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4120  * @adapter: board private structure
4121  *
4122  * Free all receive software resources
4123  **/
4124 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4125 {
4126         int i;
4127
4128         for (i = 0; i < adapter->num_rx_queues; i++)
4129                 igb_free_rx_resources(adapter->rx_ring[i]);
4130 }
4131
4132 /**
4133  * igb_clean_rx_ring - Free Rx Buffers per Queue
4134  * @rx_ring: ring to free buffers from
4135  **/
4136 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4137 {
4138         unsigned long size;
4139         u16 i;
4140
4141         if (!rx_ring->rx_buffer_info)
4142                 return;
4143
4144 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4145         if (rx_ring->skb)
4146                 dev_kfree_skb(rx_ring->skb);
4147         rx_ring->skb = NULL;
4148
4149 #endif
4150         /* Free all the Rx ring sk_buffs */
4151         for (i = 0; i < rx_ring->count; i++) {
4152                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4153 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4154                 if (buffer_info->dma) {
4155                         dma_unmap_single(rx_ring->dev,
4156                                          buffer_info->dma,
4157                                          rx_ring->rx_buffer_len,
4158                                          DMA_FROM_DEVICE);
4159                         buffer_info->dma = 0;
4160                 }
4161
4162                 if (buffer_info->skb) {
4163                         dev_kfree_skb(buffer_info->skb);
4164                         buffer_info->skb = NULL;
4165                 }
4166 #else
4167                 if (!buffer_info->page)
4168                         continue;
4169
4170                 dma_unmap_page(rx_ring->dev,
4171                                buffer_info->dma,
4172                                PAGE_SIZE,
4173                                DMA_FROM_DEVICE);
4174                 __free_page(buffer_info->page);
4175
4176                 buffer_info->page = NULL;
4177 #endif
4178         }
4179
4180         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4181         memset(rx_ring->rx_buffer_info, 0, size);
4182
4183         /* Zero out the descriptor ring */
4184         memset(rx_ring->desc, 0, rx_ring->size);
4185
4186         rx_ring->next_to_alloc = 0;
4187         rx_ring->next_to_clean = 0;
4188         rx_ring->next_to_use = 0;
4189 }
4190
4191 /**
4192  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4193  * @adapter: board private structure
4194  **/
4195 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4196 {
4197         int i;
4198
4199         for (i = 0; i < adapter->num_rx_queues; i++)
4200                 igb_clean_rx_ring(adapter->rx_ring[i]);
4201 }
4202
4203 /**
4204  * igb_set_mac - Change the Ethernet Address of the NIC
4205  * @netdev: network interface device structure
4206  * @p: pointer to an address structure
4207  *
4208  * Returns 0 on success, negative on failure
4209  **/
4210 static int igb_set_mac(struct net_device *netdev, void *p)
4211 {
4212         struct igb_adapter *adapter = netdev_priv(netdev);
4213         struct e1000_hw *hw = &adapter->hw;
4214         struct sockaddr *addr = p;
4215
4216         if (!is_valid_ether_addr(addr->sa_data))
4217                 return -EADDRNOTAVAIL;
4218
4219         igb_del_mac_filter(adapter, hw->mac.addr,
4220                            adapter->vfs_allocated_count);
4221         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4222         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4223
4224         /* set the correct pool for the new PF MAC address in entry 0 */
4225         return igb_add_mac_filter(adapter, hw->mac.addr,
4226                            adapter->vfs_allocated_count);
4227 }
4228
4229 /**
4230  * igb_write_mc_addr_list - write multicast addresses to MTA
4231  * @netdev: network interface device structure
4232  *
4233  * Writes multicast address list to the MTA hash table.
4234  * Returns: -ENOMEM on failure
4235  *                0 on no addresses written
4236  *                X on writing X addresses to MTA
4237  **/
4238 int igb_write_mc_addr_list(struct net_device *netdev)
4239 {
4240         struct igb_adapter *adapter = netdev_priv(netdev);
4241         struct e1000_hw *hw = &adapter->hw;
4242 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4243         struct netdev_hw_addr *ha;
4244 #else
4245         struct dev_mc_list *ha;
4246 #endif
4247         u8  *mta_list;
4248         int i, count;
4249 #ifdef CONFIG_IGB_VMDQ_NETDEV
4250         int vm;
4251 #endif
4252         count = netdev_mc_count(netdev);
4253 #ifdef CONFIG_IGB_VMDQ_NETDEV
4254         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4255                 if (!adapter->vmdq_netdev[vm])
4256                         break;
4257                 if (!netif_running(adapter->vmdq_netdev[vm]))
4258                         continue;
4259                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4260         }
4261 #endif
4262
4263         if (!count) {
4264                 e1000_update_mc_addr_list(hw, NULL, 0);
4265                 return 0;
4266         }
4267         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4268         if (!mta_list)
4269                 return -ENOMEM;
4270
4271         /* The shared function expects a packed array of only addresses. */
4272         i = 0;
4273         netdev_for_each_mc_addr(ha, netdev)
4274 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4275                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4276 #else
4277                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4278 #endif
4279 #ifdef CONFIG_IGB_VMDQ_NETDEV
4280         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4281                 if (!adapter->vmdq_netdev[vm])
4282                         break;
4283                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4284                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4285                         continue;
4286                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4287 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4288                         memcpy(mta_list + (i++ * ETH_ALEN),
4289                                ha->addr, ETH_ALEN);
4290 #else
4291                         memcpy(mta_list + (i++ * ETH_ALEN),
4292                                ha->dmi_addr, ETH_ALEN);
4293 #endif
4294         }
4295 #endif
4296         e1000_update_mc_addr_list(hw, mta_list, i);
4297         kfree(mta_list);
4298
4299         return count;
4300 }
4301
4302 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4303 {
4304         u32 rar_low, rar_high;
4305         struct e1000_hw *hw = &adapter->hw;
4306         u8 *addr = adapter->mac_table[index].addr;
4307         /* HW expects these in little endian so we reverse the byte order
4308          * from network order (big endian) to little endian
4309          */
4310         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4311                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4312         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4313
4314         /* Indicate to hardware the Address is Valid. */
4315         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4316                 rar_high |= E1000_RAH_AV;
4317
4318         if (hw->mac.type == e1000_82575)
4319                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4320         else
4321                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4322
4323         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4324         E1000_WRITE_FLUSH(hw);
4325         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4326         E1000_WRITE_FLUSH(hw);
4327 }
4328
4329 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4330 {
4331         struct e1000_hw *hw = &adapter->hw;
4332         int i;
4333         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4334                         igb_rar_set(adapter, i);
4335         }
4336 }
4337
4338 void igb_sync_mac_table(struct igb_adapter *adapter)
4339 {
4340         struct e1000_hw *hw = &adapter->hw;
4341         int i;
4342         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4343                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4344                         igb_rar_set(adapter, i);
4345                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4346         }
4347 }
4348
4349 int igb_available_rars(struct igb_adapter *adapter)
4350 {
4351         struct e1000_hw *hw = &adapter->hw;
4352         int i, count = 0;
4353
4354         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4355                 if (adapter->mac_table[i].state == 0)
4356                         count++;
4357         }
4358         return count;
4359 }
4360
4361 #ifdef HAVE_SET_RX_MODE
4362 /**
4363  * igb_write_uc_addr_list - write unicast addresses to RAR table
4364  * @netdev: network interface device structure
4365  *
4366  * Writes unicast address list to the RAR table.
4367  * Returns: -ENOMEM on failure/insufficient address space
4368  *                0 on no addresses written
4369  *                X on writing X addresses to the RAR table
4370  **/
4371 static int igb_write_uc_addr_list(struct net_device *netdev)
4372 {
4373         struct igb_adapter *adapter = netdev_priv(netdev);
4374         unsigned int vfn = adapter->vfs_allocated_count;
4375         int count = 0;
4376
4377         /* return ENOMEM indicating insufficient memory for addresses */
4378         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4379                 return -ENOMEM;
4380         if (!netdev_uc_empty(netdev)) {
4381 #ifdef NETDEV_HW_ADDR_T_UNICAST
4382                 struct netdev_hw_addr *ha;
4383 #else
4384                 struct dev_mc_list *ha;
4385 #endif
4386                 netdev_for_each_uc_addr(ha, netdev) {
4387 #ifdef NETDEV_HW_ADDR_T_UNICAST
4388                         igb_del_mac_filter(adapter, ha->addr, vfn);
4389                         igb_add_mac_filter(adapter, ha->addr, vfn);
4390 #else
4391                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4392                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4393 #endif
4394                         count++;
4395                 }
4396         }
4397         return count;
4398 }
4399
4400 #endif /* HAVE_SET_RX_MODE */
4401 /**
4402  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4403  * @netdev: network interface device structure
4404  *
4405  * The set_rx_mode entry point is called whenever the unicast or multicast
4406  * address lists or the network interface flags are updated.  This routine is
4407  * responsible for configuring the hardware for proper unicast, multicast,
4408  * promiscuous mode, and all-multi behavior.
4409  **/
4410 static void igb_set_rx_mode(struct net_device *netdev)
4411 {
4412         struct igb_adapter *adapter = netdev_priv(netdev);
4413         struct e1000_hw *hw = &adapter->hw;
4414         unsigned int vfn = adapter->vfs_allocated_count;
4415         u32 rctl, vmolr = 0;
4416         int count;
4417
4418         /* Check for Promiscuous and All Multicast modes */
4419         rctl = E1000_READ_REG(hw, E1000_RCTL);
4420
4421         /* clear the effected bits */
4422         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4423
4424         if (netdev->flags & IFF_PROMISC) {
4425                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4426                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4427                 /* retain VLAN HW filtering if in VT mode */
4428                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4429                         rctl |= E1000_RCTL_VFE;
4430         } else {
4431                 if (netdev->flags & IFF_ALLMULTI) {
4432                         rctl |= E1000_RCTL_MPE;
4433                         vmolr |= E1000_VMOLR_MPME;
4434                 } else {
4435                         /*
4436                          * Write addresses to the MTA, if the attempt fails
4437                          * then we should just turn on promiscuous mode so
4438                          * that we can at least receive multicast traffic
4439                          */
4440                         count = igb_write_mc_addr_list(netdev);
4441                         if (count < 0) {
4442                                 rctl |= E1000_RCTL_MPE;
4443                                 vmolr |= E1000_VMOLR_MPME;
4444                         } else if (count) {
4445                                 vmolr |= E1000_VMOLR_ROMPE;
4446                         }
4447                 }
4448 #ifdef HAVE_SET_RX_MODE
4449                 /*
4450                  * Write addresses to available RAR registers, if there is not
4451                  * sufficient space to store all the addresses then enable
4452                  * unicast promiscuous mode
4453                  */
4454                 count = igb_write_uc_addr_list(netdev);
4455                 if (count < 0) {
4456                         rctl |= E1000_RCTL_UPE;
4457                         vmolr |= E1000_VMOLR_ROPE;
4458                 }
4459 #endif /* HAVE_SET_RX_MODE */
4460                 rctl |= E1000_RCTL_VFE;
4461         }
4462         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4463
4464         /*
4465          * In order to support SR-IOV and eventually VMDq it is necessary to set
4466          * the VMOLR to enable the appropriate modes.  Without this workaround
4467          * we will have issues with VLAN tag stripping not being done for frames
4468          * that are only arriving because we are the default pool
4469          */
4470         if (hw->mac.type < e1000_82576)
4471                 return;
4472
4473         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4474                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4475         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4476         igb_restore_vf_multicasts(adapter);
4477 }
4478
4479 static void igb_check_wvbr(struct igb_adapter *adapter)
4480 {
4481         struct e1000_hw *hw = &adapter->hw;
4482         u32 wvbr = 0;
4483
4484         switch (hw->mac.type) {
4485         case e1000_82576:
4486         case e1000_i350:
4487                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4488                         return;
4489                 break;
4490         default:
4491                 break;
4492         }
4493
4494         adapter->wvbr |= wvbr;
4495 }
4496
4497 #define IGB_STAGGERED_QUEUE_OFFSET 8
4498
4499 static void igb_spoof_check(struct igb_adapter *adapter)
4500 {
4501         int j;
4502
4503         if (!adapter->wvbr)
4504                 return;
4505
4506         switch (adapter->hw.mac.type) {
4507         case e1000_82576:
4508                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4509                         if (adapter->wvbr & (1 << j) ||
4510                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4511                                 DPRINTK(DRV, WARNING,
4512                                         "Spoof event(s) detected on VF %d\n", j);
4513                                 adapter->wvbr &=
4514                                         ~((1 << j) |
4515                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4516                         }
4517                 }
4518                 break;
4519         case e1000_i350:
4520                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4521                         if (adapter->wvbr & (1 << j)) {
4522                                 DPRINTK(DRV, WARNING,
4523                                         "Spoof event(s) detected on VF %d\n", j);
4524                                 adapter->wvbr &= ~(1 << j);
4525                         }
4526                 }
4527                 break;
4528         default:
4529                 break;
4530         }
4531 }
4532
4533 /* Need to wait a few seconds after link up to get diagnostic information from
4534  * the phy */
4535 static void igb_update_phy_info(unsigned long data)
4536 {
4537         struct igb_adapter *adapter = (struct igb_adapter *) data;
4538         e1000_get_phy_info(&adapter->hw);
4539 }
4540
4541 /**
4542  * igb_has_link - check shared code for link and determine up/down
4543  * @adapter: pointer to driver private info
4544  **/
4545 bool igb_has_link(struct igb_adapter *adapter)
4546 {
4547         struct e1000_hw *hw = &adapter->hw;
4548         bool link_active = FALSE;
4549
4550         /* get_link_status is set on LSC (link status) interrupt or
4551          * rx sequence error interrupt.  get_link_status will stay
4552          * false until the e1000_check_for_link establishes link
4553          * for copper adapters ONLY
4554          */
4555         switch (hw->phy.media_type) {
4556         case e1000_media_type_copper:
4557                 if (!hw->mac.get_link_status)
4558                         return true;
4559         case e1000_media_type_internal_serdes:
4560                 e1000_check_for_link(hw);
4561                 link_active = !hw->mac.get_link_status;
4562                 break;
4563         case e1000_media_type_unknown:
4564         default:
4565                 break;
4566         }
4567
4568         if (((hw->mac.type == e1000_i210) ||
4569              (hw->mac.type == e1000_i211)) &&
4570              (hw->phy.id == I210_I_PHY_ID)) {
4571                 if (!netif_carrier_ok(adapter->netdev)) {
4572                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4573                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4574                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4575                         adapter->link_check_timeout = jiffies;
4576                 }
4577         }
4578
4579         return link_active;
4580 }
4581
4582 /**
4583  * igb_watchdog - Timer Call-back
4584  * @data: pointer to adapter cast into an unsigned long
4585  **/
4586 static void igb_watchdog(unsigned long data)
4587 {
4588         struct igb_adapter *adapter = (struct igb_adapter *)data;
4589         /* Do the rest outside of interrupt context */
4590         schedule_work(&adapter->watchdog_task);
4591 }
4592
4593 static void igb_watchdog_task(struct work_struct *work)
4594 {
4595         struct igb_adapter *adapter = container_of(work,
4596                                                    struct igb_adapter,
4597                                                    watchdog_task);
4598         struct e1000_hw *hw = &adapter->hw;
4599         struct net_device *netdev = adapter->netdev;
4600         u32 link;
4601         int i;
4602         u32 thstat, ctrl_ext;
4603         u32 connsw;
4604
4605         link = igb_has_link(adapter);
4606         /* Force link down if we have fiber to swap to */
4607         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4608                 if (hw->phy.media_type == e1000_media_type_copper) {
4609                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4610                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4611                                 link = 0;
4612                 }
4613         }
4614
4615         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4616                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4617                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4618                 else
4619                         link = FALSE;
4620         }
4621
4622         if (link) {
4623                 /* Perform a reset if the media type changed. */
4624                 if (hw->dev_spec._82575.media_changed) {
4625                         hw->dev_spec._82575.media_changed = false;
4626                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4627                         igb_reset(adapter);
4628                 }
4629
4630                 /* Cancel scheduled suspend requests. */
4631                 pm_runtime_resume(netdev->dev.parent);
4632
4633                 if (!netif_carrier_ok(netdev)) {
4634                         u32 ctrl;
4635                         e1000_get_speed_and_duplex(hw,
4636                                                    &adapter->link_speed,
4637                                                    &adapter->link_duplex);
4638
4639                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4640                         /* Links status message must follow this format */
4641                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4642                                  "Flow Control: %s\n",
4643                                netdev->name,
4644                                adapter->link_speed,
4645                                adapter->link_duplex == FULL_DUPLEX ?
4646                                  "Full Duplex" : "Half Duplex",
4647                                ((ctrl & E1000_CTRL_TFCE) &&
4648                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4649                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4650                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4651                         /* adjust timeout factor according to speed/duplex */
4652                         adapter->tx_timeout_factor = 1;
4653                         switch (adapter->link_speed) {
4654                         case SPEED_10:
4655                                 adapter->tx_timeout_factor = 14;
4656                                 break;
4657                         case SPEED_100:
4658                                 /* maybe add some timeout factor ? */
4659                                 break;
4660                         default:
4661                                 break;
4662                         }
4663
4664                         netif_carrier_on(netdev);
4665                         netif_tx_wake_all_queues(netdev);
4666
4667                         igb_ping_all_vfs(adapter);
4668 #ifdef IFLA_VF_MAX
4669                         igb_check_vf_rate_limit(adapter);
4670 #endif /* IFLA_VF_MAX */
4671
4672                         /* link state has changed, schedule phy info update */
4673                         if (!test_bit(__IGB_DOWN, &adapter->state))
4674                                 mod_timer(&adapter->phy_info_timer,
4675                                           round_jiffies(jiffies + 2 * HZ));
4676                 }
4677         } else {
4678                 if (netif_carrier_ok(netdev)) {
4679                         adapter->link_speed = 0;
4680                         adapter->link_duplex = 0;
4681                         /* check for thermal sensor event on i350 */
4682                         if (hw->mac.type == e1000_i350) {
4683                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4684                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4685                                 if ((hw->phy.media_type ==
4686                                         e1000_media_type_copper) &&
4687                                         !(ctrl_ext &
4688                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4689                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4690                                                 printk(KERN_ERR "igb: %s The "
4691                                                 "network adapter was stopped "
4692                                                 "because it overheated.\n",
4693                                                 netdev->name);
4694                                         }
4695                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4696                                                 printk(KERN_INFO
4697                                                         "igb: %s The network "
4698                                                         "adapter supported "
4699                                                         "link speed "
4700                                                         "was downshifted "
4701                                                         "because it "
4702                                                         "overheated.\n",
4703                                                         netdev->name);
4704                                         }
4705                                 }
4706                         }
4707
4708                         /* Links status message must follow this format */
4709                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4710                                netdev->name);
4711                         netif_carrier_off(netdev);
4712                         netif_tx_stop_all_queues(netdev);
4713
4714                         igb_ping_all_vfs(adapter);
4715
4716                         /* link state has changed, schedule phy info update */
4717                         if (!test_bit(__IGB_DOWN, &adapter->state))
4718                                 mod_timer(&adapter->phy_info_timer,
4719                                           round_jiffies(jiffies + 2 * HZ));
4720                         /* link is down, time to check for alternate media */
4721                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4722                                 igb_check_swap_media(adapter);
4723                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4724                                         schedule_work(&adapter->reset_task);
4725                                         /* return immediately */
4726                                         return;
4727                                 }
4728                         }
4729                         pm_schedule_suspend(netdev->dev.parent,
4730                                             MSEC_PER_SEC * 5);
4731
4732                 /* also check for alternate media here */
4733                 } else if (!netif_carrier_ok(netdev) &&
4734                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4735                         hw->mac.ops.power_up_serdes(hw);
4736                         igb_check_swap_media(adapter);
4737                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4738                                 schedule_work(&adapter->reset_task);
4739                                 /* return immediately */
4740                                 return;
4741                         }
4742                 }
4743         }
4744
4745         igb_update_stats(adapter);
4746
4747         for (i = 0; i < adapter->num_tx_queues; i++) {
4748                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4749                 if (!netif_carrier_ok(netdev)) {
4750                         /* We've lost link, so the controller stops DMA,
4751                          * but we've got queued Tx work that's never going
4752                          * to get done, so reset controller to flush Tx.
4753                          * (Do the reset outside of interrupt context). */
4754                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4755                                 adapter->tx_timeout_count++;
4756                                 schedule_work(&adapter->reset_task);
4757                                 /* return immediately since reset is imminent */
4758                                 return;
4759                         }
4760                 }
4761
4762                 /* Force detection of hung controller every watchdog period */
4763                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4764         }
4765
4766         /* Cause software interrupt to ensure rx ring is cleaned */
4767         if (adapter->msix_entries) {
4768                 u32 eics = 0;
4769                 for (i = 0; i < adapter->num_q_vectors; i++)
4770                         eics |= adapter->q_vector[i]->eims_value;
4771                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4772         } else {
4773                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4774         }
4775
4776         igb_spoof_check(adapter);
4777
4778         /* Reset the timer */
4779         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4780                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4781                         mod_timer(&adapter->watchdog_timer,
4782                                   round_jiffies(jiffies +  HZ));
4783                 else
4784                         mod_timer(&adapter->watchdog_timer,
4785                                   round_jiffies(jiffies + 2 * HZ));
4786         }
4787 }
4788
4789 static void igb_dma_err_task(struct work_struct *work)
4790 {
4791         struct igb_adapter *adapter = container_of(work,
4792                                                    struct igb_adapter,
4793                                                    dma_err_task);
4794         int vf;
4795         struct e1000_hw *hw = &adapter->hw;
4796         struct net_device *netdev = adapter->netdev;
4797         u32 hgptc;
4798         u32 ciaa, ciad;
4799
4800         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4801         if (hgptc) /* If incrementing then no need for the check below */
4802                 goto dma_timer_reset;
4803         /*
4804          * Check to see if a bad DMA write target from an errant or
4805          * malicious VF has caused a PCIe error.  If so then we can
4806          * issue a VFLR to the offending VF(s) and then resume without
4807          * requesting a full slot reset.
4808          */
4809
4810         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4811                 ciaa = (vf << 16) | 0x80000000;
4812                 /* 32 bit read so align, we really want status at offset 6 */
4813                 ciaa |= PCI_COMMAND;
4814                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4815                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4816                 ciaa &= 0x7FFFFFFF;
4817                 /* disable debug mode asap after reading data */
4818                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4819                 /* Get the upper 16 bits which will be the PCI status reg */
4820                 ciad >>= 16;
4821                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4822                             PCI_STATUS_REC_TARGET_ABORT |
4823                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4824                         netdev_err(netdev, "VF %d suffered error\n", vf);
4825                         /* Issue VFLR */
4826                         ciaa = (vf << 16) | 0x80000000;
4827                         ciaa |= 0xA8;
4828                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4829                         ciad = 0x00008000;  /* VFLR */
4830                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4831                         ciaa &= 0x7FFFFFFF;
4832                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4833                 }
4834         }
4835 dma_timer_reset:
4836         /* Reset the timer */
4837         if (!test_bit(__IGB_DOWN, &adapter->state))
4838                 mod_timer(&adapter->dma_err_timer,
4839                           round_jiffies(jiffies + HZ / 10));
4840 }
4841
4842 /**
4843  * igb_dma_err_timer - Timer Call-back
4844  * @data: pointer to adapter cast into an unsigned long
4845  **/
4846 static void igb_dma_err_timer(unsigned long data)
4847 {
4848         struct igb_adapter *adapter = (struct igb_adapter *)data;
4849         /* Do the rest outside of interrupt context */
4850         schedule_work(&adapter->dma_err_task);
4851 }
4852
4853 enum latency_range {
4854         lowest_latency = 0,
4855         low_latency = 1,
4856         bulk_latency = 2,
4857         latency_invalid = 255
4858 };
4859
4860 /**
4861  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4862  *
4863  *      Stores a new ITR value based on strictly on packet size.  This
4864  *      algorithm is less sophisticated than that used in igb_update_itr,
4865  *      due to the difficulty of synchronizing statistics across multiple
4866  *      receive rings.  The divisors and thresholds used by this function
4867  *      were determined based on theoretical maximum wire speed and testing
4868  *      data, in order to minimize response time while increasing bulk
4869  *      throughput.
4870  *      This functionality is controlled by the InterruptThrottleRate module
4871  *      parameter (see igb_param.c)
4872  *      NOTE:  This function is called only when operating in a multiqueue
4873  *             receive environment.
4874  * @q_vector: pointer to q_vector
4875  **/
4876 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4877 {
4878         int new_val = q_vector->itr_val;
4879         int avg_wire_size = 0;
4880         struct igb_adapter *adapter = q_vector->adapter;
4881         unsigned int packets;
4882
4883         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4884          * ints/sec - ITR timer value of 120 ticks.
4885          */
4886         switch (adapter->link_speed) {
4887         case SPEED_10:
4888         case SPEED_100:
4889                 new_val = IGB_4K_ITR;
4890                 goto set_itr_val;
4891         default:
4892                 break;
4893         }
4894
4895         packets = q_vector->rx.total_packets;
4896         if (packets)
4897                 avg_wire_size = q_vector->rx.total_bytes / packets;
4898
4899         packets = q_vector->tx.total_packets;
4900         if (packets)
4901                 avg_wire_size = max_t(u32, avg_wire_size,
4902                                       q_vector->tx.total_bytes / packets);
4903
4904         /* if avg_wire_size isn't set no work was done */
4905         if (!avg_wire_size)
4906                 goto clear_counts;
4907
4908         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4909         avg_wire_size += 24;
4910
4911         /* Don't starve jumbo frames */
4912         avg_wire_size = min(avg_wire_size, 3000);
4913
4914         /* Give a little boost to mid-size frames */
4915         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4916                 new_val = avg_wire_size / 3;
4917         else
4918                 new_val = avg_wire_size / 2;
4919
4920         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4921         if (new_val < IGB_20K_ITR &&
4922             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4923              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4924                 new_val = IGB_20K_ITR;
4925
4926 set_itr_val:
4927         if (new_val != q_vector->itr_val) {
4928                 q_vector->itr_val = new_val;
4929                 q_vector->set_itr = 1;
4930         }
4931 clear_counts:
4932         q_vector->rx.total_bytes = 0;
4933         q_vector->rx.total_packets = 0;
4934         q_vector->tx.total_bytes = 0;
4935         q_vector->tx.total_packets = 0;
4936 }
4937
4938 /**
4939  * igb_update_itr - update the dynamic ITR value based on statistics
4940  *      Stores a new ITR value based on packets and byte
4941  *      counts during the last interrupt.  The advantage of per interrupt
4942  *      computation is faster updates and more accurate ITR for the current
4943  *      traffic pattern.  Constants in this function were computed
4944  *      based on theoretical maximum wire speed and thresholds were set based
4945  *      on testing data as well as attempting to minimize response time
4946  *      while increasing bulk throughput.
4947  *      this functionality is controlled by the InterruptThrottleRate module
4948  *      parameter (see igb_param.c)
4949  *      NOTE:  These calculations are only valid when operating in a single-
4950  *             queue environment.
4951  * @q_vector: pointer to q_vector
4952  * @ring_container: ring info to update the itr for
4953  **/
4954 static void igb_update_itr(struct igb_q_vector *q_vector,
4955                            struct igb_ring_container *ring_container)
4956 {
4957         unsigned int packets = ring_container->total_packets;
4958         unsigned int bytes = ring_container->total_bytes;
4959         u8 itrval = ring_container->itr;
4960
4961         /* no packets, exit with status unchanged */
4962         if (packets == 0)
4963                 return;
4964
4965         switch (itrval) {
4966         case lowest_latency:
4967                 /* handle TSO and jumbo frames */
4968                 if (bytes/packets > 8000)
4969                         itrval = bulk_latency;
4970                 else if ((packets < 5) && (bytes > 512))
4971                         itrval = low_latency;
4972                 break;
4973         case low_latency:  /* 50 usec aka 20000 ints/s */
4974                 if (bytes > 10000) {
4975                         /* this if handles the TSO accounting */
4976                         if (bytes/packets > 8000) {
4977                                 itrval = bulk_latency;
4978                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4979                                 itrval = bulk_latency;
4980                         } else if ((packets > 35)) {
4981                                 itrval = lowest_latency;
4982                         }
4983                 } else if (bytes/packets > 2000) {
4984                         itrval = bulk_latency;
4985                 } else if (packets <= 2 && bytes < 512) {
4986                         itrval = lowest_latency;
4987                 }
4988                 break;
4989         case bulk_latency: /* 250 usec aka 4000 ints/s */
4990                 if (bytes > 25000) {
4991                         if (packets > 35)
4992                                 itrval = low_latency;
4993                 } else if (bytes < 1500) {
4994                         itrval = low_latency;
4995                 }
4996                 break;
4997         }
4998
4999         /* clear work counters since we have the values we need */
5000         ring_container->total_bytes = 0;
5001         ring_container->total_packets = 0;
5002
5003         /* write updated itr to ring container */
5004         ring_container->itr = itrval;
5005 }
5006
5007 static void igb_set_itr(struct igb_q_vector *q_vector)
5008 {
5009         struct igb_adapter *adapter = q_vector->adapter;
5010         u32 new_itr = q_vector->itr_val;
5011         u8 current_itr = 0;
5012
5013         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5014         switch (adapter->link_speed) {
5015         case SPEED_10:
5016         case SPEED_100:
5017                 current_itr = 0;
5018                 new_itr = IGB_4K_ITR;
5019                 goto set_itr_now;
5020         default:
5021                 break;
5022         }
5023
5024         igb_update_itr(q_vector, &q_vector->tx);
5025         igb_update_itr(q_vector, &q_vector->rx);
5026
5027         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5028
5029         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5030         if (current_itr == lowest_latency &&
5031             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5032              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5033                 current_itr = low_latency;
5034
5035         switch (current_itr) {
5036         /* counts and packets in update_itr are dependent on these numbers */
5037         case lowest_latency:
5038                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5039                 break;
5040         case low_latency:
5041                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5042                 break;
5043         case bulk_latency:
5044                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5045                 break;
5046         default:
5047                 break;
5048         }
5049
5050 set_itr_now:
5051         if (new_itr != q_vector->itr_val) {
5052                 /* this attempts to bias the interrupt rate towards Bulk
5053                  * by adding intermediate steps when interrupt rate is
5054                  * increasing */
5055                 new_itr = new_itr > q_vector->itr_val ?
5056                              max((new_itr * q_vector->itr_val) /
5057                                  (new_itr + (q_vector->itr_val >> 2)),
5058                                  new_itr) :
5059                              new_itr;
5060                 /* Don't write the value here; it resets the adapter's
5061                  * internal timer, and causes us to delay far longer than
5062                  * we should between interrupts.  Instead, we write the ITR
5063                  * value at the beginning of the next interrupt so the timing
5064                  * ends up being correct.
5065                  */
5066                 q_vector->itr_val = new_itr;
5067                 q_vector->set_itr = 1;
5068         }
5069 }
5070
5071 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5072                      u32 type_tucmd, u32 mss_l4len_idx)
5073 {
5074         struct e1000_adv_tx_context_desc *context_desc;
5075         u16 i = tx_ring->next_to_use;
5076
5077         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5078
5079         i++;
5080         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5081
5082         /* set bits to identify this as an advanced context descriptor */
5083         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5084
5085         /* For 82575, context index must be unique per ring. */
5086         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5087                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5088
5089         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5090         context_desc->seqnum_seed       = 0;
5091         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5092         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5093 }
5094
5095 static int igb_tso(struct igb_ring *tx_ring,
5096                    struct igb_tx_buffer *first,
5097                    u8 *hdr_len)
5098 {
5099 #ifdef NETIF_F_TSO
5100         struct sk_buff *skb = first->skb;
5101         u32 vlan_macip_lens, type_tucmd;
5102         u32 mss_l4len_idx, l4len;
5103
5104         if (skb->ip_summed != CHECKSUM_PARTIAL)
5105                 return 0;
5106
5107         if (!skb_is_gso(skb))
5108 #endif /* NETIF_F_TSO */
5109                 return 0;
5110 #ifdef NETIF_F_TSO
5111
5112         if (skb_header_cloned(skb)) {
5113                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5114                 if (err)
5115                         return err;
5116         }
5117
5118         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5119         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5120
5121         if (first->protocol == __constant_htons(ETH_P_IP)) {
5122                 struct iphdr *iph = ip_hdr(skb);
5123                 iph->tot_len = 0;
5124                 iph->check = 0;
5125                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5126                                                          iph->daddr, 0,
5127                                                          IPPROTO_TCP,
5128                                                          0);
5129                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5130                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5131                                    IGB_TX_FLAGS_CSUM |
5132                                    IGB_TX_FLAGS_IPV4;
5133 #ifdef NETIF_F_TSO6
5134         } else if (skb_is_gso_v6(skb)) {
5135                 ipv6_hdr(skb)->payload_len = 0;
5136                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5137                                                        &ipv6_hdr(skb)->daddr,
5138                                                        0, IPPROTO_TCP, 0);
5139                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5140                                    IGB_TX_FLAGS_CSUM;
5141 #endif
5142         }
5143
5144         /* compute header lengths */
5145         l4len = tcp_hdrlen(skb);
5146         *hdr_len = skb_transport_offset(skb) + l4len;
5147
5148         /* update gso size and bytecount with header size */
5149         first->gso_segs = skb_shinfo(skb)->gso_segs;
5150         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5151
5152         /* MSS L4LEN IDX */
5153         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5154         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5155
5156         /* VLAN MACLEN IPLEN */
5157         vlan_macip_lens = skb_network_header_len(skb);
5158         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5159         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5160
5161         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5162
5163         return 1;
5164 #endif  /* NETIF_F_TSO */
5165 }
5166
5167 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5168 {
5169         struct sk_buff *skb = first->skb;
5170         u32 vlan_macip_lens = 0;
5171         u32 mss_l4len_idx = 0;
5172         u32 type_tucmd = 0;
5173
5174         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5175                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5176                         return;
5177         } else {
5178                 u8 nexthdr = 0;
5179                 switch (first->protocol) {
5180                 case __constant_htons(ETH_P_IP):
5181                         vlan_macip_lens |= skb_network_header_len(skb);
5182                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5183                         nexthdr = ip_hdr(skb)->protocol;
5184                         break;
5185 #ifdef NETIF_F_IPV6_CSUM
5186                 case __constant_htons(ETH_P_IPV6):
5187                         vlan_macip_lens |= skb_network_header_len(skb);
5188                         nexthdr = ipv6_hdr(skb)->nexthdr;
5189                         break;
5190 #endif
5191                 default:
5192                         if (unlikely(net_ratelimit())) {
5193                                 dev_warn(tx_ring->dev,
5194                                  "partial checksum but proto=%x!\n",
5195                                  first->protocol);
5196                         }
5197                         break;
5198                 }
5199
5200                 switch (nexthdr) {
5201                 case IPPROTO_TCP:
5202                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5203                         mss_l4len_idx = tcp_hdrlen(skb) <<
5204                                         E1000_ADVTXD_L4LEN_SHIFT;
5205                         break;
5206 #ifdef HAVE_SCTP
5207                 case IPPROTO_SCTP:
5208                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5209                         mss_l4len_idx = sizeof(struct sctphdr) <<
5210                                         E1000_ADVTXD_L4LEN_SHIFT;
5211                         break;
5212 #endif
5213                 case IPPROTO_UDP:
5214                         mss_l4len_idx = sizeof(struct udphdr) <<
5215                                         E1000_ADVTXD_L4LEN_SHIFT;
5216                         break;
5217                 default:
5218                         if (unlikely(net_ratelimit())) {
5219                                 dev_warn(tx_ring->dev,
5220                                  "partial checksum but l4 proto=%x!\n",
5221                                  nexthdr);
5222                         }
5223                         break;
5224                 }
5225
5226                 /* update TX checksum flag */
5227                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5228         }
5229
5230         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5231         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5232
5233         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5234 }
5235
5236 #define IGB_SET_FLAG(_input, _flag, _result) \
5237         ((_flag <= _result) ? \
5238          ((u32)(_input & _flag) * (_result / _flag)) : \
5239          ((u32)(_input & _flag) / (_flag / _result)))
5240
5241 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5242 {
5243         /* set type for advanced descriptor with frame checksum insertion */
5244         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5245                        E1000_ADVTXD_DCMD_DEXT |
5246                        E1000_ADVTXD_DCMD_IFCS;
5247
5248         /* set HW vlan bit if vlan is present */
5249         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5250                                  (E1000_ADVTXD_DCMD_VLE));
5251
5252         /* set segmentation bits for TSO */
5253         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5254                                  (E1000_ADVTXD_DCMD_TSE));
5255
5256         /* set timestamp bit if present */
5257         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5258                                  (E1000_ADVTXD_MAC_TSTAMP));
5259
5260         return cmd_type;
5261 }
5262
5263 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5264                                  union e1000_adv_tx_desc *tx_desc,
5265                                  u32 tx_flags, unsigned int paylen)
5266 {
5267         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5268
5269         /* 82575 requires a unique index per ring */
5270         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5271                 olinfo_status |= tx_ring->reg_idx << 4;
5272
5273         /* insert L4 checksum */
5274         olinfo_status |= IGB_SET_FLAG(tx_flags,
5275                                       IGB_TX_FLAGS_CSUM,
5276                                       (E1000_TXD_POPTS_TXSM << 8));
5277
5278         /* insert IPv4 checksum */
5279         olinfo_status |= IGB_SET_FLAG(tx_flags,
5280                                       IGB_TX_FLAGS_IPV4,
5281                                       (E1000_TXD_POPTS_IXSM << 8));
5282
5283         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5284 }
5285
5286 static void igb_tx_map(struct igb_ring *tx_ring,
5287                        struct igb_tx_buffer *first,
5288                        const u8 hdr_len)
5289 {
5290         struct sk_buff *skb = first->skb;
5291         struct igb_tx_buffer *tx_buffer;
5292         union e1000_adv_tx_desc *tx_desc;
5293         struct skb_frag_struct *frag;
5294         dma_addr_t dma;
5295         unsigned int data_len, size;
5296         u32 tx_flags = first->tx_flags;
5297         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5298         u16 i = tx_ring->next_to_use;
5299
5300         tx_desc = IGB_TX_DESC(tx_ring, i);
5301
5302         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5303
5304         size = skb_headlen(skb);
5305         data_len = skb->data_len;
5306
5307         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5308
5309         tx_buffer = first;
5310
5311         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5312                 if (dma_mapping_error(tx_ring->dev, dma))
5313                         goto dma_error;
5314
5315                 /* record length, and DMA address */
5316                 dma_unmap_len_set(tx_buffer, len, size);
5317                 dma_unmap_addr_set(tx_buffer, dma, dma);
5318
5319                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5320
5321                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5322                         tx_desc->read.cmd_type_len =
5323                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5324
5325                         i++;
5326                         tx_desc++;
5327                         if (i == tx_ring->count) {
5328                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5329                                 i = 0;
5330                         }
5331                         tx_desc->read.olinfo_status = 0;
5332
5333                         dma += IGB_MAX_DATA_PER_TXD;
5334                         size -= IGB_MAX_DATA_PER_TXD;
5335
5336                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5337                 }
5338
5339                 if (likely(!data_len))
5340                         break;
5341
5342                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5343
5344                 i++;
5345                 tx_desc++;
5346                 if (i == tx_ring->count) {
5347                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5348                         i = 0;
5349                 }
5350                 tx_desc->read.olinfo_status = 0;
5351
5352                 size = skb_frag_size(frag);
5353                 data_len -= size;
5354
5355                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5356                                        size, DMA_TO_DEVICE);
5357
5358                 tx_buffer = &tx_ring->tx_buffer_info[i];
5359         }
5360
5361         /* write last descriptor with RS and EOP bits */
5362         cmd_type |= size | IGB_TXD_DCMD;
5363         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5364
5365         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5366         /* set the timestamp */
5367         first->time_stamp = jiffies;
5368
5369         /*
5370          * Force memory writes to complete before letting h/w know there
5371          * are new descriptors to fetch.  (Only applicable for weak-ordered
5372          * memory model archs, such as IA-64).
5373          *
5374          * We also need this memory barrier to make certain all of the
5375          * status bits have been updated before next_to_watch is written.
5376          */
5377         wmb();
5378
5379         /* set next_to_watch value indicating a packet is present */
5380         first->next_to_watch = tx_desc;
5381
5382         i++;
5383         if (i == tx_ring->count)
5384                 i = 0;
5385
5386         tx_ring->next_to_use = i;
5387
5388         writel(i, tx_ring->tail);
5389
5390         /* we need this if more than one processor can write to our tail
5391          * at a time, it syncronizes IO on IA64/Altix systems */
5392         mmiowb();
5393
5394         return;
5395
5396 dma_error:
5397         dev_err(tx_ring->dev, "TX DMA map failed\n");
5398
5399         /* clear dma mappings for failed tx_buffer_info map */
5400         for (;;) {
5401                 tx_buffer = &tx_ring->tx_buffer_info[i];
5402                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5403                 if (tx_buffer == first)
5404                         break;
5405                 if (i == 0)
5406                         i = tx_ring->count;
5407                 i--;
5408         }
5409
5410         tx_ring->next_to_use = i;
5411 }
5412
5413 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5414 {
5415         struct net_device *netdev = netdev_ring(tx_ring);
5416
5417         if (netif_is_multiqueue(netdev))
5418                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5419         else
5420                 netif_stop_queue(netdev);
5421
5422         /* Herbert's original patch had:
5423          *  smp_mb__after_netif_stop_queue();
5424          * but since that doesn't exist yet, just open code it. */
5425         smp_mb();
5426
5427         /* We need to check again in a case another CPU has just
5428          * made room available. */
5429         if (igb_desc_unused(tx_ring) < size)
5430                 return -EBUSY;
5431
5432         /* A reprieve! */
5433         if (netif_is_multiqueue(netdev))
5434                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5435         else
5436                 netif_wake_queue(netdev);
5437
5438         tx_ring->tx_stats.restart_queue++;
5439
5440         return 0;
5441 }
5442
5443 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5444 {
5445         if (igb_desc_unused(tx_ring) >= size)
5446                 return 0;
5447         return __igb_maybe_stop_tx(tx_ring, size);
5448 }
5449
5450 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5451                                 struct igb_ring *tx_ring)
5452 {
5453         struct igb_tx_buffer *first;
5454         int tso;
5455         u32 tx_flags = 0;
5456 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5457         unsigned short f;
5458 #endif
5459         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5460         __be16 protocol = vlan_get_protocol(skb);
5461         u8 hdr_len = 0;
5462
5463         /*
5464          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5465          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5466          *       + 2 desc gap to keep tail from touching head,
5467          *       + 1 desc for context descriptor,
5468          * otherwise try next time
5469          */
5470 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5471         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5472                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5473 #else
5474         count += skb_shinfo(skb)->nr_frags;
5475 #endif
5476         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5477                 /* this is a hard error */
5478                 return NETDEV_TX_BUSY;
5479         }
5480
5481         /* record the location of the first descriptor for this packet */
5482         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5483         first->skb = skb;
5484         first->bytecount = skb->len;
5485         first->gso_segs = 1;
5486
5487         skb_tx_timestamp(skb);
5488
5489 #ifdef HAVE_PTP_1588_CLOCK
5490         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5491                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5492                 if (!adapter->ptp_tx_skb) {
5493                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5494                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5495
5496                         adapter->ptp_tx_skb = skb_get(skb);
5497                         adapter->ptp_tx_start = jiffies;
5498                         if (adapter->hw.mac.type == e1000_82576)
5499                                 schedule_work(&adapter->ptp_tx_work);
5500                 }
5501         }
5502 #endif /* HAVE_PTP_1588_CLOCK */
5503
5504         if (vlan_tx_tag_present(skb)) {
5505                 tx_flags |= IGB_TX_FLAGS_VLAN;
5506                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5507         }
5508
5509         /* record initial flags and protocol */
5510         first->tx_flags = tx_flags;
5511         first->protocol = protocol;
5512
5513         tso = igb_tso(tx_ring, first, &hdr_len);
5514         if (tso < 0)
5515                 goto out_drop;
5516         else if (!tso)
5517                 igb_tx_csum(tx_ring, first);
5518
5519         igb_tx_map(tx_ring, first, hdr_len);
5520
5521 #ifndef HAVE_TRANS_START_IN_QUEUE
5522         netdev_ring(tx_ring)->trans_start = jiffies;
5523
5524 #endif
5525         /* Make sure there is space in the ring for the next send. */
5526         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5527
5528         return NETDEV_TX_OK;
5529
5530 out_drop:
5531         igb_unmap_and_free_tx_resource(tx_ring, first);
5532
5533         return NETDEV_TX_OK;
5534 }
5535
5536 #ifdef HAVE_TX_MQ
5537 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5538                                                     struct sk_buff *skb)
5539 {
5540         unsigned int r_idx = skb->queue_mapping;
5541
5542         if (r_idx >= adapter->num_tx_queues)
5543                 r_idx = r_idx % adapter->num_tx_queues;
5544
5545         return adapter->tx_ring[r_idx];
5546 }
5547 #else
5548 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5549 #endif
5550
5551 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5552                                   struct net_device *netdev)
5553 {
5554         struct igb_adapter *adapter = netdev_priv(netdev);
5555
5556         if (test_bit(__IGB_DOWN, &adapter->state)) {
5557                 dev_kfree_skb_any(skb);
5558                 return NETDEV_TX_OK;
5559         }
5560
5561         if (skb->len <= 0) {
5562                 dev_kfree_skb_any(skb);
5563                 return NETDEV_TX_OK;
5564         }
5565
5566         /*
5567          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5568          * in order to meet this minimum size requirement.
5569          */
5570         if (skb->len < 17) {
5571                 if (skb_padto(skb, 17))
5572                         return NETDEV_TX_OK;
5573                 skb->len = 17;
5574         }
5575
5576         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5577 }
5578
5579 /**
5580  * igb_tx_timeout - Respond to a Tx Hang
5581  * @netdev: network interface device structure
5582  **/
5583 static void igb_tx_timeout(struct net_device *netdev)
5584 {
5585         struct igb_adapter *adapter = netdev_priv(netdev);
5586         struct e1000_hw *hw = &adapter->hw;
5587
5588         /* Do the reset outside of interrupt context */
5589         adapter->tx_timeout_count++;
5590
5591         if (hw->mac.type >= e1000_82580)
5592                 hw->dev_spec._82575.global_device_reset = true;
5593
5594         schedule_work(&adapter->reset_task);
5595         E1000_WRITE_REG(hw, E1000_EICS,
5596                         (adapter->eims_enable_mask & ~adapter->eims_other));
5597 }
5598
5599 static void igb_reset_task(struct work_struct *work)
5600 {
5601         struct igb_adapter *adapter;
5602         adapter = container_of(work, struct igb_adapter, reset_task);
5603
5604         igb_reinit_locked(adapter);
5605 }
5606
5607 /**
5608  * igb_get_stats - Get System Network Statistics
5609  * @netdev: network interface device structure
5610  *
5611  * Returns the address of the device statistics structure.
5612  * The statistics are updated here and also from the timer callback.
5613  **/
5614 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5615 {
5616         struct igb_adapter *adapter = netdev_priv(netdev);
5617
5618         if (!test_bit(__IGB_RESETTING, &adapter->state))
5619                 igb_update_stats(adapter);
5620
5621 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5622         /* only return the current stats */
5623         return &netdev->stats;
5624 #else
5625         /* only return the current stats */
5626         return &adapter->net_stats;
5627 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5628 }
5629
5630 /**
5631  * igb_change_mtu - Change the Maximum Transfer Unit
5632  * @netdev: network interface device structure
5633  * @new_mtu: new value for maximum frame size
5634  *
5635  * Returns 0 on success, negative on failure
5636  **/
5637 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5638 {
5639         struct igb_adapter *adapter = netdev_priv(netdev);
5640         struct e1000_hw *hw = &adapter->hw;
5641         struct pci_dev *pdev = adapter->pdev;
5642         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5643
5644         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5645                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5646                 return -EINVAL;
5647         }
5648
5649 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5650         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5651                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5652                 return -EINVAL;
5653         }
5654
5655         /* adjust max frame to be at least the size of a standard frame */
5656         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5657                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5658
5659         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5660                 usleep_range(1000, 2000);
5661
5662         /* igb_down has a dependency on max_frame_size */
5663         adapter->max_frame_size = max_frame;
5664
5665         if (netif_running(netdev))
5666                 igb_down(adapter);
5667
5668         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5669                 netdev->mtu, new_mtu);
5670         netdev->mtu = new_mtu;
5671         hw->dev_spec._82575.mtu = new_mtu;
5672
5673         if (netif_running(netdev))
5674                 igb_up(adapter);
5675         else
5676                 igb_reset(adapter);
5677
5678         clear_bit(__IGB_RESETTING, &adapter->state);
5679
5680         return 0;
5681 }
5682
5683 /**
5684  * igb_update_stats - Update the board statistics counters
5685  * @adapter: board private structure
5686  **/
5687
5688 void igb_update_stats(struct igb_adapter *adapter)
5689 {
5690 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5691         struct net_device_stats *net_stats = &adapter->netdev->stats;
5692 #else
5693         struct net_device_stats *net_stats = &adapter->net_stats;
5694 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5695         struct e1000_hw *hw = &adapter->hw;
5696 #ifdef HAVE_PCI_ERS
5697         struct pci_dev *pdev = adapter->pdev;
5698 #endif
5699         u32 reg, mpc;
5700         u16 phy_tmp;
5701         int i;
5702         u64 bytes, packets;
5703 #ifndef IGB_NO_LRO
5704         u32 flushed = 0, coal = 0;
5705         struct igb_q_vector *q_vector;
5706 #endif
5707
5708 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5709
5710         /*
5711          * Prevent stats update while adapter is being reset, or if the pci
5712          * connection is down.
5713          */
5714         if (adapter->link_speed == 0)
5715                 return;
5716 #ifdef HAVE_PCI_ERS
5717         if (pci_channel_offline(pdev))
5718                 return;
5719
5720 #endif
5721 #ifndef IGB_NO_LRO
5722         for (i = 0; i < adapter->num_q_vectors; i++) {
5723                 q_vector = adapter->q_vector[i];
5724                 if (!q_vector)
5725                         continue;
5726                 flushed += q_vector->lrolist.stats.flushed;
5727                 coal += q_vector->lrolist.stats.coal;
5728         }
5729         adapter->lro_stats.flushed = flushed;
5730         adapter->lro_stats.coal = coal;
5731
5732 #endif
5733         bytes = 0;
5734         packets = 0;
5735         for (i = 0; i < adapter->num_rx_queues; i++) {
5736                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5737                 struct igb_ring *ring = adapter->rx_ring[i];
5738                 ring->rx_stats.drops += rqdpc_tmp;
5739                 net_stats->rx_fifo_errors += rqdpc_tmp;
5740 #ifdef CONFIG_IGB_VMDQ_NETDEV
5741                 if (!ring->vmdq_netdev) {
5742                         bytes += ring->rx_stats.bytes;
5743                         packets += ring->rx_stats.packets;
5744                 }
5745 #else
5746                 bytes += ring->rx_stats.bytes;
5747                 packets += ring->rx_stats.packets;
5748 #endif
5749         }
5750
5751         net_stats->rx_bytes = bytes;
5752         net_stats->rx_packets = packets;
5753
5754         bytes = 0;
5755         packets = 0;
5756         for (i = 0; i < adapter->num_tx_queues; i++) {
5757                 struct igb_ring *ring = adapter->tx_ring[i];
5758 #ifdef CONFIG_IGB_VMDQ_NETDEV
5759                 if (!ring->vmdq_netdev) {
5760                         bytes += ring->tx_stats.bytes;
5761                         packets += ring->tx_stats.packets;
5762                 }
5763 #else
5764                 bytes += ring->tx_stats.bytes;
5765                 packets += ring->tx_stats.packets;
5766 #endif
5767         }
5768         net_stats->tx_bytes = bytes;
5769         net_stats->tx_packets = packets;
5770
5771         /* read stats registers */
5772         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5773         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5774         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5775         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5776         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5777         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5778         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5779
5780         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5781         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5782         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5783         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5784         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5785         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5786         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5787         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5788
5789         mpc = E1000_READ_REG(hw, E1000_MPC);
5790         adapter->stats.mpc += mpc;
5791         net_stats->rx_fifo_errors += mpc;
5792         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5793         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5794         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5795         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5796         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5797         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5798         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5799         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5800         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5801         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5802         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5803         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5804         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5805         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5806         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5807         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5808         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5809         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5810         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5811         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5812         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5813
5814         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5815         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5816         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5817         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5818         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5819         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5820
5821         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5822         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5823
5824         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5825         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5826
5827         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5828         /* read internal phy sepecific stats */
5829         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5830         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5831                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5832
5833                 /* this stat has invalid values on i210/i211 */
5834                 if ((hw->mac.type != e1000_i210) &&
5835                     (hw->mac.type != e1000_i211))
5836                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5837         }
5838         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5839         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5840
5841         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5842         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5843         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5844         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5845         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5846         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5847         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5848         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5849         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5850
5851         /* Fill out the OS statistics structure */
5852         net_stats->multicast = adapter->stats.mprc;
5853         net_stats->collisions = adapter->stats.colc;
5854
5855         /* Rx Errors */
5856
5857         /* RLEC on some newer hardware can be incorrect so build
5858          * our own version based on RUC and ROC */
5859         net_stats->rx_errors = adapter->stats.rxerrc +
5860                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5861                 adapter->stats.ruc + adapter->stats.roc +
5862                 adapter->stats.cexterr;
5863         net_stats->rx_length_errors = adapter->stats.ruc +
5864                                       adapter->stats.roc;
5865         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5866         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5867         net_stats->rx_missed_errors = adapter->stats.mpc;
5868
5869         /* Tx Errors */
5870         net_stats->tx_errors = adapter->stats.ecol +
5871                                adapter->stats.latecol;
5872         net_stats->tx_aborted_errors = adapter->stats.ecol;
5873         net_stats->tx_window_errors = adapter->stats.latecol;
5874         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5875
5876         /* Tx Dropped needs to be maintained elsewhere */
5877
5878         /* Phy Stats */
5879         if (hw->phy.media_type == e1000_media_type_copper) {
5880                 if ((adapter->link_speed == SPEED_1000) &&
5881                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5882                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5883                         adapter->phy_stats.idle_errors += phy_tmp;
5884                 }
5885         }
5886
5887         /* Management Stats */
5888         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5889         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5890         if (hw->mac.type > e1000_82580) {
5891                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5892                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5893                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5894                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5895         }
5896 }
5897
5898 static irqreturn_t igb_msix_other(int irq, void *data)
5899 {
5900         struct igb_adapter *adapter = data;
5901         struct e1000_hw *hw = &adapter->hw;
5902         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5903         /* reading ICR causes bit 31 of EICR to be cleared */
5904
5905         if (icr & E1000_ICR_DRSTA)
5906                 schedule_work(&adapter->reset_task);
5907
5908         if (icr & E1000_ICR_DOUTSYNC) {
5909                 /* HW is reporting DMA is out of sync */
5910                 adapter->stats.doosync++;
5911                 /* The DMA Out of Sync is also indication of a spoof event
5912                  * in IOV mode. Check the Wrong VM Behavior register to
5913                  * see if it is really a spoof event. */
5914                 igb_check_wvbr(adapter);
5915         }
5916
5917         /* Check for a mailbox event */
5918         if (icr & E1000_ICR_VMMB)
5919                 igb_msg_task(adapter);
5920
5921         if (icr & E1000_ICR_LSC) {
5922                 hw->mac.get_link_status = 1;
5923                 /* guard against interrupt when we're going down */
5924                 if (!test_bit(__IGB_DOWN, &adapter->state))
5925                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5926         }
5927
5928 #ifdef HAVE_PTP_1588_CLOCK
5929         if (icr & E1000_ICR_TS) {
5930                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5931
5932                 if (tsicr & E1000_TSICR_TXTS) {
5933                         /* acknowledge the interrupt */
5934                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5935                         /* retrieve hardware timestamp */
5936                         schedule_work(&adapter->ptp_tx_work);
5937                 }
5938         }
5939 #endif /* HAVE_PTP_1588_CLOCK */
5940
5941         /* Check for MDD event */
5942         if (icr & E1000_ICR_MDDET)
5943                 igb_process_mdd_event(adapter);
5944
5945         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5946
5947         return IRQ_HANDLED;
5948 }
5949
5950 static void igb_write_itr(struct igb_q_vector *q_vector)
5951 {
5952         struct igb_adapter *adapter = q_vector->adapter;
5953         u32 itr_val = q_vector->itr_val & 0x7FFC;
5954
5955         if (!q_vector->set_itr)
5956                 return;
5957
5958         if (!itr_val)
5959                 itr_val = 0x4;
5960
5961         if (adapter->hw.mac.type == e1000_82575)
5962                 itr_val |= itr_val << 16;
5963         else
5964                 itr_val |= E1000_EITR_CNT_IGNR;
5965
5966         writel(itr_val, q_vector->itr_register);
5967         q_vector->set_itr = 0;
5968 }
5969
5970 static irqreturn_t igb_msix_ring(int irq, void *data)
5971 {
5972         struct igb_q_vector *q_vector = data;
5973
5974         /* Write the ITR value calculated from the previous interrupt. */
5975         igb_write_itr(q_vector);
5976
5977         napi_schedule(&q_vector->napi);
5978
5979         return IRQ_HANDLED;
5980 }
5981
5982 #ifdef IGB_DCA
5983 static void igb_update_tx_dca(struct igb_adapter *adapter,
5984                               struct igb_ring *tx_ring,
5985                               int cpu)
5986 {
5987         struct e1000_hw *hw = &adapter->hw;
5988         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5989
5990         if (hw->mac.type != e1000_82575)
5991                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5992
5993         /*
5994          * We can enable relaxed ordering for reads, but not writes when
5995          * DCA is enabled.  This is due to a known issue in some chipsets
5996          * which will cause the DCA tag to be cleared.
5997          */
5998         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5999                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6000                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6001
6002         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6003 }
6004
6005 static void igb_update_rx_dca(struct igb_adapter *adapter,
6006                               struct igb_ring *rx_ring,
6007                               int cpu)
6008 {
6009         struct e1000_hw *hw = &adapter->hw;
6010         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6011
6012         if (hw->mac.type != e1000_82575)
6013                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6014
6015         /*
6016          * We can enable relaxed ordering for reads, but not writes when
6017          * DCA is enabled.  This is due to a known issue in some chipsets
6018          * which will cause the DCA tag to be cleared.
6019          */
6020         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6021                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6022
6023         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6024 }
6025
6026 static void igb_update_dca(struct igb_q_vector *q_vector)
6027 {
6028         struct igb_adapter *adapter = q_vector->adapter;
6029         int cpu = get_cpu();
6030
6031         if (q_vector->cpu == cpu)
6032                 goto out_no_update;
6033
6034         if (q_vector->tx.ring)
6035                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6036
6037         if (q_vector->rx.ring)
6038                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6039
6040         q_vector->cpu = cpu;
6041 out_no_update:
6042         put_cpu();
6043 }
6044
6045 static void igb_setup_dca(struct igb_adapter *adapter)
6046 {
6047         struct e1000_hw *hw = &adapter->hw;
6048         int i;
6049
6050         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6051                 return;
6052
6053         /* Always use CB2 mode, difference is masked in the CB driver. */
6054         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6055
6056         for (i = 0; i < adapter->num_q_vectors; i++) {
6057                 adapter->q_vector[i]->cpu = -1;
6058                 igb_update_dca(adapter->q_vector[i]);
6059         }
6060 }
6061
6062 static int __igb_notify_dca(struct device *dev, void *data)
6063 {
6064         struct net_device *netdev = dev_get_drvdata(dev);
6065         struct igb_adapter *adapter = netdev_priv(netdev);
6066         struct pci_dev *pdev = adapter->pdev;
6067         struct e1000_hw *hw = &adapter->hw;
6068         unsigned long event = *(unsigned long *)data;
6069
6070         switch (event) {
6071         case DCA_PROVIDER_ADD:
6072                 /* if already enabled, don't do it again */
6073                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6074                         break;
6075                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6076                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6077                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6078                         igb_setup_dca(adapter);
6079                         break;
6080                 }
6081                 /* Fall Through since DCA is disabled. */
6082         case DCA_PROVIDER_REMOVE:
6083                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6084                         /* without this a class_device is left
6085                          * hanging around in the sysfs model */
6086                         dca_remove_requester(dev);
6087                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6088                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6089                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6090                 }
6091                 break;
6092         }
6093
6094         return E1000_SUCCESS;
6095 }
6096
6097 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6098                           void *p)
6099 {
6100         int ret_val;
6101
6102         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6103                                          __igb_notify_dca);
6104
6105         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6106 }
6107 #endif /* IGB_DCA */
6108
6109 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6110 {
6111         unsigned char mac_addr[ETH_ALEN];
6112
6113         random_ether_addr(mac_addr);
6114         igb_set_vf_mac(adapter, vf, mac_addr);
6115
6116 #ifdef IFLA_VF_MAX
6117 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6118         /* By default spoof check is enabled for all VFs */
6119         adapter->vf_data[vf].spoofchk_enabled = true;
6120 #endif
6121 #endif
6122
6123         return true;
6124 }
6125
6126 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6127 {
6128         struct e1000_hw *hw = &adapter->hw;
6129         u32 ping;
6130         int i;
6131
6132         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6133                 ping = E1000_PF_CONTROL_MSG;
6134                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6135                         ping |= E1000_VT_MSGTYPE_CTS;
6136                 e1000_write_mbx(hw, &ping, 1, i);
6137         }
6138 }
6139
6140 /**
6141  *  igb_mta_set_ - Set multicast filter table address
6142  *  @adapter: pointer to the adapter structure
6143  *  @hash_value: determines the MTA register and bit to set
6144  *
6145  *  The multicast table address is a register array of 32-bit registers.
6146  *  The hash_value is used to determine what register the bit is in, the
6147  *  current value is read, the new bit is OR'd in and the new value is
6148  *  written back into the register.
6149  **/
6150 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6151 {
6152         struct e1000_hw *hw = &adapter->hw;
6153         u32 hash_bit, hash_reg, mta;
6154
6155         /*
6156          * The MTA is a register array of 32-bit registers. It is
6157          * treated like an array of (32*mta_reg_count) bits.  We want to
6158          * set bit BitArray[hash_value]. So we figure out what register
6159          * the bit is in, read it, OR in the new bit, then write
6160          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6161          * mask to bits 31:5 of the hash value which gives us the
6162          * register we're modifying.  The hash bit within that register
6163          * is determined by the lower 5 bits of the hash value.
6164          */
6165         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6166         hash_bit = hash_value & 0x1F;
6167
6168         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6169
6170         mta |= (1 << hash_bit);
6171
6172         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6173         E1000_WRITE_FLUSH(hw);
6174 }
6175
6176 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6177 {
6178
6179         struct e1000_hw *hw = &adapter->hw;
6180         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6181         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6182
6183         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6184                             IGB_VF_FLAG_MULTI_PROMISC);
6185         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6186
6187 #ifdef IGB_ENABLE_VF_PROMISC
6188         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6189                 vmolr |= E1000_VMOLR_ROPE;
6190                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6191                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6192         }
6193 #endif
6194         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6195                 vmolr |= E1000_VMOLR_MPME;
6196                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6197                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6198         } else {
6199                 /*
6200                  * if we have hashes and we are clearing a multicast promisc
6201                  * flag we need to write the hashes to the MTA as this step
6202                  * was previously skipped
6203                  */
6204                 if (vf_data->num_vf_mc_hashes > 30) {
6205                         vmolr |= E1000_VMOLR_MPME;
6206                 } else if (vf_data->num_vf_mc_hashes) {
6207                         int j;
6208                         vmolr |= E1000_VMOLR_ROMPE;
6209                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6210                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6211                 }
6212         }
6213
6214         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6215
6216         /* there are flags left unprocessed, likely not supported */
6217         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6218                 return -EINVAL;
6219
6220         return 0;
6221
6222 }
6223
6224 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6225                                   u32 *msgbuf, u32 vf)
6226 {
6227         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6228         u16 *hash_list = (u16 *)&msgbuf[1];
6229         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6230         int i;
6231
6232         /* salt away the number of multicast addresses assigned
6233          * to this VF for later use to restore when the PF multi cast
6234          * list changes
6235          */
6236         vf_data->num_vf_mc_hashes = n;
6237
6238         /* only up to 30 hash values supported */
6239         if (n > 30)
6240                 n = 30;
6241
6242         /* store the hashes for later use */
6243         for (i = 0; i < n; i++)
6244                 vf_data->vf_mc_hashes[i] = hash_list[i];
6245
6246         /* Flush and reset the mta with the new values */
6247         igb_set_rx_mode(adapter->netdev);
6248
6249         return 0;
6250 }
6251
6252 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6253 {
6254         struct e1000_hw *hw = &adapter->hw;
6255         struct vf_data_storage *vf_data;
6256         int i, j;
6257
6258         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6259                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6260                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6261
6262                 vf_data = &adapter->vf_data[i];
6263
6264                 if ((vf_data->num_vf_mc_hashes > 30) ||
6265                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6266                         vmolr |= E1000_VMOLR_MPME;
6267                 } else if (vf_data->num_vf_mc_hashes) {
6268                         vmolr |= E1000_VMOLR_ROMPE;
6269                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6270                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6271                 }
6272                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6273         }
6274 }
6275
6276 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6277 {
6278         struct e1000_hw *hw = &adapter->hw;
6279         u32 pool_mask, reg, vid;
6280         u16 vlan_default;
6281         int i;
6282
6283         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6284
6285         /* Find the vlan filter for this id */
6286         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6287                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6288
6289                 /* remove the vf from the pool */
6290                 reg &= ~pool_mask;
6291
6292                 /* if pool is empty then remove entry from vfta */
6293                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6294                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6295                         reg = 0;
6296                         vid = reg & E1000_VLVF_VLANID_MASK;
6297                         igb_vfta_set(adapter, vid, FALSE);
6298                 }
6299
6300                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6301         }
6302
6303         adapter->vf_data[vf].vlans_enabled = 0;
6304
6305         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6306         if (vlan_default)
6307                 igb_vlvf_set(adapter, vlan_default, true, vf);
6308 }
6309
6310 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6311 {
6312         struct e1000_hw *hw = &adapter->hw;
6313         u32 reg, i;
6314
6315         /* The vlvf table only exists on 82576 hardware and newer */
6316         if (hw->mac.type < e1000_82576)
6317                 return -1;
6318
6319         /* we only need to do this if VMDq is enabled */
6320         if (!adapter->vmdq_pools)
6321                 return -1;
6322
6323         /* Find the vlan filter for this id */
6324         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6325                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6326                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6327                     vid == (reg & E1000_VLVF_VLANID_MASK))
6328                         break;
6329         }
6330
6331         if (add) {
6332                 if (i == E1000_VLVF_ARRAY_SIZE) {
6333                         /* Did not find a matching VLAN ID entry that was
6334                          * enabled.  Search for a free filter entry, i.e.
6335                          * one without the enable bit set
6336                          */
6337                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6338                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6339                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6340                                         break;
6341                         }
6342                 }
6343                 if (i < E1000_VLVF_ARRAY_SIZE) {
6344                         /* Found an enabled/available entry */
6345                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6346
6347                         /* if !enabled we need to set this up in vfta */
6348                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6349                                 /* add VID to filter table */
6350                                 igb_vfta_set(adapter, vid, TRUE);
6351                                 reg |= E1000_VLVF_VLANID_ENABLE;
6352                         }
6353                         reg &= ~E1000_VLVF_VLANID_MASK;
6354                         reg |= vid;
6355                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6356
6357                         /* do not modify RLPML for PF devices */
6358                         if (vf >= adapter->vfs_allocated_count)
6359                                 return E1000_SUCCESS;
6360
6361                         if (!adapter->vf_data[vf].vlans_enabled) {
6362                                 u32 size;
6363                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6364                                 size = reg & E1000_VMOLR_RLPML_MASK;
6365                                 size += 4;
6366                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6367                                 reg |= size;
6368                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6369                         }
6370
6371                         adapter->vf_data[vf].vlans_enabled++;
6372                 }
6373         } else {
6374                 if (i < E1000_VLVF_ARRAY_SIZE) {
6375                         /* remove vf from the pool */
6376                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6377                         /* if pool is empty then remove entry from vfta */
6378                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6379                                 reg = 0;
6380                                 igb_vfta_set(adapter, vid, FALSE);
6381                         }
6382                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6383
6384                         /* do not modify RLPML for PF devices */
6385                         if (vf >= adapter->vfs_allocated_count)
6386                                 return E1000_SUCCESS;
6387
6388                         adapter->vf_data[vf].vlans_enabled--;
6389                         if (!adapter->vf_data[vf].vlans_enabled) {
6390                                 u32 size;
6391                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6392                                 size = reg & E1000_VMOLR_RLPML_MASK;
6393                                 size -= 4;
6394                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6395                                 reg |= size;
6396                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6397                         }
6398                 }
6399         }
6400         return E1000_SUCCESS;
6401 }
6402
6403 #ifdef IFLA_VF_MAX
6404 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6405 {
6406         struct e1000_hw *hw = &adapter->hw;
6407
6408         if (vid)
6409                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6410         else
6411                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6412 }
6413
6414 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6415                                int vf, u16 vlan, u8 qos)
6416 {
6417         int err = 0;
6418         struct igb_adapter *adapter = netdev_priv(netdev);
6419
6420         /* VLAN IDs accepted range 0-4094 */
6421         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6422                 return -EINVAL;
6423         if (vlan || qos) {
6424                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6425                 if (err)
6426                         goto out;
6427                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6428                 igb_set_vmolr(adapter, vf, !vlan);
6429                 adapter->vf_data[vf].pf_vlan = vlan;
6430                 adapter->vf_data[vf].pf_qos = qos;
6431                 igb_set_vf_vlan_strip(adapter, vf, true);
6432                 dev_info(&adapter->pdev->dev,
6433                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6434                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6435                         dev_warn(&adapter->pdev->dev,
6436                                  "The VF VLAN has been set,"
6437                                  " but the PF device is not up.\n");
6438                         dev_warn(&adapter->pdev->dev,
6439                                  "Bring the PF device up before"
6440                                  " attempting to use the VF device.\n");
6441                 }
6442         } else {
6443                 if (adapter->vf_data[vf].pf_vlan)
6444                         dev_info(&adapter->pdev->dev,
6445                                  "Clearing VLAN on VF %d\n", vf);
6446                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6447                                    false, vf);
6448                 igb_set_vmvir(adapter, vlan, vf);
6449                 igb_set_vmolr(adapter, vf, true);
6450                 igb_set_vf_vlan_strip(adapter, vf, false);
6451                 adapter->vf_data[vf].pf_vlan = 0;
6452                 adapter->vf_data[vf].pf_qos = 0;
6453        }
6454 out:
6455        return err;
6456 }
6457
6458 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6459 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6460                                 bool setting)
6461 {
6462         struct igb_adapter *adapter = netdev_priv(netdev);
6463         struct e1000_hw *hw = &adapter->hw;
6464         u32 dtxswc, reg_offset;
6465
6466         if (!adapter->vfs_allocated_count)
6467                 return -EOPNOTSUPP;
6468
6469         if (vf >= adapter->vfs_allocated_count)
6470                 return -EINVAL;
6471
6472         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6473         dtxswc = E1000_READ_REG(hw, reg_offset);
6474         if (setting)
6475                 dtxswc |= ((1 << vf) |
6476                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6477         else
6478                 dtxswc &= ~((1 << vf) |
6479                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6480         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6481
6482         adapter->vf_data[vf].spoofchk_enabled = setting;
6483         return E1000_SUCCESS;
6484 }
6485 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6486 #endif /* IFLA_VF_MAX */
6487
6488 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6489 {
6490         struct e1000_hw *hw = &adapter->hw;
6491         int i;
6492         u32 reg;
6493
6494         /* Find the vlan filter for this id */
6495         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6496                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6497                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6498                     vid == (reg & E1000_VLVF_VLANID_MASK))
6499                         break;
6500         }
6501
6502         if (i >= E1000_VLVF_ARRAY_SIZE)
6503                 i = -1;
6504
6505         return i;
6506 }
6507
6508 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6509 {
6510         struct e1000_hw *hw = &adapter->hw;
6511         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6512         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6513         int err = 0;
6514
6515         if (vid)
6516                 igb_set_vf_vlan_strip(adapter, vf, true);
6517         else
6518                 igb_set_vf_vlan_strip(adapter, vf, false);
6519
6520         /* If in promiscuous mode we need to make sure the PF also has
6521          * the VLAN filter set.
6522          */
6523         if (add && (adapter->netdev->flags & IFF_PROMISC))
6524                 err = igb_vlvf_set(adapter, vid, add,
6525                                    adapter->vfs_allocated_count);
6526         if (err)
6527                 goto out;
6528
6529         err = igb_vlvf_set(adapter, vid, add, vf);
6530
6531         if (err)
6532                 goto out;
6533
6534         /* Go through all the checks to see if the VLAN filter should
6535          * be wiped completely.
6536          */
6537         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6538                 u32 vlvf, bits;
6539
6540                 int regndx = igb_find_vlvf_entry(adapter, vid);
6541                 if (regndx < 0)
6542                         goto out;
6543                 /* See if any other pools are set for this VLAN filter
6544                  * entry other than the PF.
6545                  */
6546                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6547                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6548                               adapter->vfs_allocated_count);
6549                 /* If the filter was removed then ensure PF pool bit
6550                  * is cleared if the PF only added itself to the pool
6551                  * because the PF is in promiscuous mode.
6552                  */
6553                 if ((vlvf & VLAN_VID_MASK) == vid &&
6554 #ifndef HAVE_VLAN_RX_REGISTER
6555                     !test_bit(vid, adapter->active_vlans) &&
6556 #endif
6557                     !bits)
6558                         igb_vlvf_set(adapter, vid, add,
6559                                      adapter->vfs_allocated_count);
6560         }
6561
6562 out:
6563         return err;
6564 }
6565
6566 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6567 {
6568         struct e1000_hw *hw = &adapter->hw;
6569
6570         /* clear flags except flag that the PF has set the MAC */
6571         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6572         adapter->vf_data[vf].last_nack = jiffies;
6573
6574         /* reset offloads to defaults */
6575         igb_set_vmolr(adapter, vf, true);
6576
6577         /* reset vlans for device */
6578         igb_clear_vf_vfta(adapter, vf);
6579 #ifdef IFLA_VF_MAX
6580         if (adapter->vf_data[vf].pf_vlan)
6581                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6582                                     adapter->vf_data[vf].pf_vlan,
6583                                     adapter->vf_data[vf].pf_qos);
6584         else
6585                 igb_clear_vf_vfta(adapter, vf);
6586 #endif
6587
6588         /* reset multicast table array for vf */
6589         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6590
6591         /* Flush and reset the mta with the new values */
6592         igb_set_rx_mode(adapter->netdev);
6593
6594         /*
6595          * Reset the VFs TDWBAL and TDWBAH registers which are not
6596          * cleared by a VFLR
6597          */
6598         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6599         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6600         if (hw->mac.type == e1000_82576) {
6601                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6602                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6603         }
6604 }
6605
6606 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6607 {
6608         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6609
6610         /* generate a new mac address as we were hotplug removed/added */
6611         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6612                 random_ether_addr(vf_mac);
6613
6614         /* process remaining reset events */
6615         igb_vf_reset(adapter, vf);
6616 }
6617
6618 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6619 {
6620         struct e1000_hw *hw = &adapter->hw;
6621         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6622         u32 reg, msgbuf[3];
6623         u8 *addr = (u8 *)(&msgbuf[1]);
6624
6625         /* process all the same items cleared in a function level reset */
6626         igb_vf_reset(adapter, vf);
6627
6628         /* set vf mac address */
6629         igb_del_mac_filter(adapter, vf_mac, vf);
6630         igb_add_mac_filter(adapter, vf_mac, vf);
6631
6632         /* enable transmit and receive for vf */
6633         reg = E1000_READ_REG(hw, E1000_VFTE);
6634         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6635         reg = E1000_READ_REG(hw, E1000_VFRE);
6636         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6637
6638         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6639
6640         /* reply to reset with ack and vf mac address */
6641         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6642         memcpy(addr, vf_mac, 6);
6643         e1000_write_mbx(hw, msgbuf, 3, vf);
6644 }
6645
6646 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6647 {
6648         /*
6649          * The VF MAC Address is stored in a packed array of bytes
6650          * starting at the second 32 bit word of the msg array
6651          */
6652         unsigned char *addr = (unsigned char *)&msg[1];
6653         int err = -1;
6654
6655         if (is_valid_ether_addr(addr))
6656                 err = igb_set_vf_mac(adapter, vf, addr);
6657
6658         return err;
6659 }
6660
6661 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6662 {
6663         struct e1000_hw *hw = &adapter->hw;
6664         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6665         u32 msg = E1000_VT_MSGTYPE_NACK;
6666
6667         /* if device isn't clear to send it shouldn't be reading either */
6668         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6669             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6670                 e1000_write_mbx(hw, &msg, 1, vf);
6671                 vf_data->last_nack = jiffies;
6672         }
6673 }
6674
6675 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6676 {
6677         struct pci_dev *pdev = adapter->pdev;
6678         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6679         struct e1000_hw *hw = &adapter->hw;
6680         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6681         s32 retval;
6682
6683         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6684
6685         if (retval) {
6686                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6687                 return;
6688         }
6689
6690         /* this is a message we already processed, do nothing */
6691         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6692                 return;
6693
6694         /*
6695          * until the vf completes a reset it should not be
6696          * allowed to start any configuration.
6697          */
6698
6699         if (msgbuf[0] == E1000_VF_RESET) {
6700                 igb_vf_reset_msg(adapter, vf);
6701                 return;
6702         }
6703
6704         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6705                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6706                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6707                         e1000_write_mbx(hw, msgbuf, 1, vf);
6708                         vf_data->last_nack = jiffies;
6709                 }
6710                 return;
6711         }
6712
6713         switch ((msgbuf[0] & 0xFFFF)) {
6714         case E1000_VF_SET_MAC_ADDR:
6715                 retval = -EINVAL;
6716 #ifndef IGB_DISABLE_VF_MAC_SET
6717                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6718                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6719                 else
6720                         DPRINTK(DRV, INFO,
6721                                 "VF %d attempted to override administratively "
6722                                 "set MAC address\nReload the VF driver to "
6723                                 "resume operations\n", vf);
6724 #endif
6725                 break;
6726         case E1000_VF_SET_PROMISC:
6727                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6728                 break;
6729         case E1000_VF_SET_MULTICAST:
6730                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6731                 break;
6732         case E1000_VF_SET_LPE:
6733                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6734                 break;
6735         case E1000_VF_SET_VLAN:
6736                 retval = -1;
6737 #ifdef IFLA_VF_MAX
6738                 if (vf_data->pf_vlan)
6739                         DPRINTK(DRV, INFO,
6740                                 "VF %d attempted to override administratively "
6741                                 "set VLAN tag\nReload the VF driver to "
6742                                 "resume operations\n", vf);
6743                 else
6744 #endif
6745                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6746                 break;
6747         default:
6748                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6749                 retval = -E1000_ERR_MBX;
6750                 break;
6751         }
6752
6753         /* notify the VF of the results of what it sent us */
6754         if (retval)
6755                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6756         else
6757                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6758
6759         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6760
6761         e1000_write_mbx(hw, msgbuf, 1, vf);
6762 }
6763
6764 static void igb_msg_task(struct igb_adapter *adapter)
6765 {
6766         struct e1000_hw *hw = &adapter->hw;
6767         u32 vf;
6768
6769         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6770                 /* process any reset requests */
6771                 if (!e1000_check_for_rst(hw, vf))
6772                         igb_vf_reset_event(adapter, vf);
6773
6774                 /* process any messages pending */
6775                 if (!e1000_check_for_msg(hw, vf))
6776                         igb_rcv_msg_from_vf(adapter, vf);
6777
6778                 /* process any acks */
6779                 if (!e1000_check_for_ack(hw, vf))
6780                         igb_rcv_ack_from_vf(adapter, vf);
6781         }
6782 }
6783
6784 /**
6785  *  igb_set_uta - Set unicast filter table address
6786  *  @adapter: board private structure
6787  *
6788  *  The unicast table address is a register array of 32-bit registers.
6789  *  The table is meant to be used in a way similar to how the MTA is used
6790  *  however due to certain limitations in the hardware it is necessary to
6791  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6792  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6793  **/
6794 static void igb_set_uta(struct igb_adapter *adapter)
6795 {
6796         struct e1000_hw *hw = &adapter->hw;
6797         int i;
6798
6799         /* The UTA table only exists on 82576 hardware and newer */
6800         if (hw->mac.type < e1000_82576)
6801                 return;
6802
6803         /* we only need to do this if VMDq is enabled */
6804         if (!adapter->vmdq_pools)
6805                 return;
6806
6807         for (i = 0; i < hw->mac.uta_reg_count; i++)
6808                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6809 }
6810
6811 /**
6812  * igb_intr_msi - Interrupt Handler
6813  * @irq: interrupt number
6814  * @data: pointer to a network interface device structure
6815  **/
6816 static irqreturn_t igb_intr_msi(int irq, void *data)
6817 {
6818         struct igb_adapter *adapter = data;
6819         struct igb_q_vector *q_vector = adapter->q_vector[0];
6820         struct e1000_hw *hw = &adapter->hw;
6821         /* read ICR disables interrupts using IAM */
6822         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6823
6824         igb_write_itr(q_vector);
6825
6826         if (icr & E1000_ICR_DRSTA)
6827                 schedule_work(&adapter->reset_task);
6828
6829         if (icr & E1000_ICR_DOUTSYNC) {
6830                 /* HW is reporting DMA is out of sync */
6831                 adapter->stats.doosync++;
6832         }
6833
6834         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6835                 hw->mac.get_link_status = 1;
6836                 if (!test_bit(__IGB_DOWN, &adapter->state))
6837                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6838         }
6839
6840 #ifdef HAVE_PTP_1588_CLOCK
6841         if (icr & E1000_ICR_TS) {
6842                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6843
6844                 if (tsicr & E1000_TSICR_TXTS) {
6845                         /* acknowledge the interrupt */
6846                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6847                         /* retrieve hardware timestamp */
6848                         schedule_work(&adapter->ptp_tx_work);
6849                 }
6850         }
6851 #endif /* HAVE_PTP_1588_CLOCK */
6852
6853         napi_schedule(&q_vector->napi);
6854
6855         return IRQ_HANDLED;
6856 }
6857
6858 /**
6859  * igb_intr - Legacy Interrupt Handler
6860  * @irq: interrupt number
6861  * @data: pointer to a network interface device structure
6862  **/
6863 static irqreturn_t igb_intr(int irq, void *data)
6864 {
6865         struct igb_adapter *adapter = data;
6866         struct igb_q_vector *q_vector = adapter->q_vector[0];
6867         struct e1000_hw *hw = &adapter->hw;
6868         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6869          * need for the IMC write */
6870         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6871
6872         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6873          * not set, then the adapter didn't send an interrupt */
6874         if (!(icr & E1000_ICR_INT_ASSERTED))
6875                 return IRQ_NONE;
6876
6877         igb_write_itr(q_vector);
6878
6879         if (icr & E1000_ICR_DRSTA)
6880                 schedule_work(&adapter->reset_task);
6881
6882         if (icr & E1000_ICR_DOUTSYNC) {
6883                 /* HW is reporting DMA is out of sync */
6884                 adapter->stats.doosync++;
6885         }
6886
6887         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6888                 hw->mac.get_link_status = 1;
6889                 /* guard against interrupt when we're going down */
6890                 if (!test_bit(__IGB_DOWN, &adapter->state))
6891                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6892         }
6893
6894 #ifdef HAVE_PTP_1588_CLOCK
6895         if (icr & E1000_ICR_TS) {
6896                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6897
6898                 if (tsicr & E1000_TSICR_TXTS) {
6899                         /* acknowledge the interrupt */
6900                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6901                         /* retrieve hardware timestamp */
6902                         schedule_work(&adapter->ptp_tx_work);
6903                 }
6904         }
6905 #endif /* HAVE_PTP_1588_CLOCK */
6906
6907         napi_schedule(&q_vector->napi);
6908
6909         return IRQ_HANDLED;
6910 }
6911
6912 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6913 {
6914         struct igb_adapter *adapter = q_vector->adapter;
6915         struct e1000_hw *hw = &adapter->hw;
6916
6917         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6918             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6919                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6920                         igb_set_itr(q_vector);
6921                 else
6922                         igb_update_ring_itr(q_vector);
6923         }
6924
6925         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6926                 if (adapter->msix_entries)
6927                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6928                 else
6929                         igb_irq_enable(adapter);
6930         }
6931 }
6932
6933 /**
6934  * igb_poll - NAPI Rx polling callback
6935  * @napi: napi polling structure
6936  * @budget: count of how many packets we should handle
6937  **/
6938 static int igb_poll(struct napi_struct *napi, int budget)
6939 {
6940         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6941         bool clean_complete = true;
6942
6943 #ifdef IGB_DCA
6944         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6945                 igb_update_dca(q_vector);
6946 #endif
6947         if (q_vector->tx.ring)
6948                 clean_complete = igb_clean_tx_irq(q_vector);
6949
6950         if (q_vector->rx.ring)
6951                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6952
6953 #ifndef HAVE_NETDEV_NAPI_LIST
6954         /* if netdev is disabled we need to stop polling */
6955         if (!netif_running(q_vector->adapter->netdev))
6956                 clean_complete = true;
6957
6958 #endif
6959         /* If all work not completed, return budget and keep polling */
6960         if (!clean_complete)
6961                 return budget;
6962
6963         /* If not enough Rx work done, exit the polling mode */
6964         napi_complete(napi);
6965         igb_ring_irq_enable(q_vector);
6966
6967         return 0;
6968 }
6969
6970 /**
6971  * igb_clean_tx_irq - Reclaim resources after transmit completes
6972  * @q_vector: pointer to q_vector containing needed info
6973  * returns TRUE if ring is completely cleaned
6974  **/
6975 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6976 {
6977         struct igb_adapter *adapter = q_vector->adapter;
6978         struct igb_ring *tx_ring = q_vector->tx.ring;
6979         struct igb_tx_buffer *tx_buffer;
6980         union e1000_adv_tx_desc *tx_desc;
6981         unsigned int total_bytes = 0, total_packets = 0;
6982         unsigned int budget = q_vector->tx.work_limit;
6983         unsigned int i = tx_ring->next_to_clean;
6984
6985         if (test_bit(__IGB_DOWN, &adapter->state))
6986                 return true;
6987
6988         tx_buffer = &tx_ring->tx_buffer_info[i];
6989         tx_desc = IGB_TX_DESC(tx_ring, i);
6990         i -= tx_ring->count;
6991
6992         do {
6993                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6994
6995                 /* if next_to_watch is not set then there is no work pending */
6996                 if (!eop_desc)
6997                         break;
6998
6999                 /* prevent any other reads prior to eop_desc */
7000                 read_barrier_depends();
7001
7002                 /* if DD is not set pending work has not been completed */
7003                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7004                         break;
7005
7006                 /* clear next_to_watch to prevent false hangs */
7007                 tx_buffer->next_to_watch = NULL;
7008
7009                 /* update the statistics for this packet */
7010                 total_bytes += tx_buffer->bytecount;
7011                 total_packets += tx_buffer->gso_segs;
7012
7013                 /* free the skb */
7014                 dev_kfree_skb_any(tx_buffer->skb);
7015
7016                 /* unmap skb header data */
7017                 dma_unmap_single(tx_ring->dev,
7018                                  dma_unmap_addr(tx_buffer, dma),
7019                                  dma_unmap_len(tx_buffer, len),
7020                                  DMA_TO_DEVICE);
7021
7022                 /* clear tx_buffer data */
7023                 tx_buffer->skb = NULL;
7024                 dma_unmap_len_set(tx_buffer, len, 0);
7025
7026                 /* clear last DMA location and unmap remaining buffers */
7027                 while (tx_desc != eop_desc) {
7028                         tx_buffer++;
7029                         tx_desc++;
7030                         i++;
7031                         if (unlikely(!i)) {
7032                                 i -= tx_ring->count;
7033                                 tx_buffer = tx_ring->tx_buffer_info;
7034                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7035                         }
7036
7037                         /* unmap any remaining paged data */
7038                         if (dma_unmap_len(tx_buffer, len)) {
7039                                 dma_unmap_page(tx_ring->dev,
7040                                                dma_unmap_addr(tx_buffer, dma),
7041                                                dma_unmap_len(tx_buffer, len),
7042                                                DMA_TO_DEVICE);
7043                                 dma_unmap_len_set(tx_buffer, len, 0);
7044                         }
7045                 }
7046
7047                 /* move us one more past the eop_desc for start of next pkt */
7048                 tx_buffer++;
7049                 tx_desc++;
7050                 i++;
7051                 if (unlikely(!i)) {
7052                         i -= tx_ring->count;
7053                         tx_buffer = tx_ring->tx_buffer_info;
7054                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7055                 }
7056
7057                 /* issue prefetch for next Tx descriptor */
7058                 prefetch(tx_desc);
7059
7060                 /* update budget accounting */
7061                 budget--;
7062         } while (likely(budget));
7063
7064         netdev_tx_completed_queue(txring_txq(tx_ring),
7065                                   total_packets, total_bytes);
7066
7067         i += tx_ring->count;
7068         tx_ring->next_to_clean = i;
7069         tx_ring->tx_stats.bytes += total_bytes;
7070         tx_ring->tx_stats.packets += total_packets;
7071         q_vector->tx.total_bytes += total_bytes;
7072         q_vector->tx.total_packets += total_packets;
7073
7074 #ifdef DEBUG
7075         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7076             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7077 #else
7078         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7079 #endif
7080                 struct e1000_hw *hw = &adapter->hw;
7081
7082                 /* Detect a transmit hang in hardware, this serializes the
7083                  * check with the clearing of time_stamp and movement of i */
7084                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7085                 if (tx_buffer->next_to_watch &&
7086                     time_after(jiffies, tx_buffer->time_stamp +
7087                                (adapter->tx_timeout_factor * HZ))
7088                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7089                          E1000_STATUS_TXOFF)) {
7090
7091                         /* detected Tx unit hang */
7092 #ifdef DEBUG
7093                         adapter->tx_hang_detected = TRUE;
7094                         if (adapter->disable_hw_reset) {
7095                                 DPRINTK(DRV, WARNING,
7096                                         "Deactivating netdev watchdog timer\n");
7097                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7098                                         dev_put(netdev_ring(tx_ring));
7099 #ifndef HAVE_NET_DEVICE_OPS
7100                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7101 #endif
7102                         }
7103 #endif /* DEBUG */
7104                         dev_err(tx_ring->dev,
7105                                 "Detected Tx Unit Hang\n"
7106                                 "  Tx Queue             <%d>\n"
7107                                 "  TDH                  <%x>\n"
7108                                 "  TDT                  <%x>\n"
7109                                 "  next_to_use          <%x>\n"
7110                                 "  next_to_clean        <%x>\n"
7111                                 "buffer_info[next_to_clean]\n"
7112                                 "  time_stamp           <%lx>\n"
7113                                 "  next_to_watch        <%p>\n"
7114                                 "  jiffies              <%lx>\n"
7115                                 "  desc.status          <%x>\n",
7116                                 tx_ring->queue_index,
7117                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7118                                 readl(tx_ring->tail),
7119                                 tx_ring->next_to_use,
7120                                 tx_ring->next_to_clean,
7121                                 tx_buffer->time_stamp,
7122                                 tx_buffer->next_to_watch,
7123                                 jiffies,
7124                                 tx_buffer->next_to_watch->wb.status);
7125                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7126                                 netif_stop_subqueue(netdev_ring(tx_ring),
7127                                                     ring_queue_index(tx_ring));
7128                         else
7129                                 netif_stop_queue(netdev_ring(tx_ring));
7130
7131                         /* we are about to reset, no point in enabling stuff */
7132                         return true;
7133                 }
7134         }
7135
7136 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7137         if (unlikely(total_packets &&
7138                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7139                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7140                 /* Make sure that anybody stopping the queue after this
7141                  * sees the new next_to_clean.
7142                  */
7143                 smp_mb();
7144                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7145                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7146                                                      ring_queue_index(tx_ring)) &&
7147                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7148                                 netif_wake_subqueue(netdev_ring(tx_ring),
7149                                                     ring_queue_index(tx_ring));
7150                                 tx_ring->tx_stats.restart_queue++;
7151                         }
7152                 } else {
7153                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7154                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7155                                 netif_wake_queue(netdev_ring(tx_ring));
7156                                 tx_ring->tx_stats.restart_queue++;
7157                         }
7158                 }
7159         }
7160
7161         return !!budget;
7162 }
7163
7164 #ifdef HAVE_VLAN_RX_REGISTER
7165 /**
7166  * igb_receive_skb - helper function to handle rx indications
7167  * @q_vector: structure containing interrupt and ring information
7168  * @skb: packet to send up
7169  **/
7170 static void igb_receive_skb(struct igb_q_vector *q_vector,
7171                             struct sk_buff *skb)
7172 {
7173         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7174
7175         if (IGB_CB(skb)->vid) {
7176                 if (*vlgrp) {
7177                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7178                                          IGB_CB(skb)->vid, skb);
7179                 } else {
7180                         dev_kfree_skb_any(skb);
7181                 }
7182         } else {
7183                 napi_gro_receive(&q_vector->napi, skb);
7184         }
7185 }
7186
7187 #endif /* HAVE_VLAN_RX_REGISTER */
7188 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7189 /**
7190  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7191  * @rx_ring: rx descriptor ring to store buffers on
7192  * @old_buff: donor buffer to have page reused
7193  *
7194  * Synchronizes page for reuse by the adapter
7195  **/
7196 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7197                               struct igb_rx_buffer *old_buff)
7198 {
7199         struct igb_rx_buffer *new_buff;
7200         u16 nta = rx_ring->next_to_alloc;
7201
7202         new_buff = &rx_ring->rx_buffer_info[nta];
7203
7204         /* update, and store next to alloc */
7205         nta++;
7206         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7207
7208         /* transfer page from old buffer to new buffer */
7209         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7210
7211         /* sync the buffer for use by the device */
7212         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7213                                          old_buff->page_offset,
7214                                          IGB_RX_BUFSZ,
7215                                          DMA_FROM_DEVICE);
7216 }
7217
7218 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7219                                   struct page *page,
7220                                   unsigned int truesize)
7221 {
7222         /* avoid re-using remote pages */
7223         if (unlikely(page_to_nid(page) != numa_node_id()))
7224                 return false;
7225
7226 #if (PAGE_SIZE < 8192)
7227         /* if we are only owner of page we can reuse it */
7228         if (unlikely(page_count(page) != 1))
7229                 return false;
7230
7231         /* flip page offset to other buffer */
7232         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7233
7234 #else
7235         /* move offset up to the next cache line */
7236         rx_buffer->page_offset += truesize;
7237
7238         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7239                 return false;
7240 #endif
7241
7242         /* bump ref count on page before it is given to the stack */
7243         get_page(page);
7244
7245         return true;
7246 }
7247
7248 /**
7249  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7250  * @rx_ring: rx descriptor ring to transact packets on
7251  * @rx_buffer: buffer containing page to add
7252  * @rx_desc: descriptor containing length of buffer written by hardware
7253  * @skb: sk_buff to place the data into
7254  *
7255  * This function will add the data contained in rx_buffer->page to the skb.
7256  * This is done either through a direct copy if the data in the buffer is
7257  * less than the skb header size, otherwise it will just attach the page as
7258  * a frag to the skb.
7259  *
7260  * The function will then update the page offset if necessary and return
7261  * true if the buffer can be reused by the adapter.
7262  **/
7263 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7264                             struct igb_rx_buffer *rx_buffer,
7265                             union e1000_adv_rx_desc *rx_desc,
7266                             struct sk_buff *skb)
7267 {
7268         struct page *page = rx_buffer->page;
7269         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7270 #if (PAGE_SIZE < 8192)
7271         unsigned int truesize = IGB_RX_BUFSZ;
7272 #else
7273         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7274 #endif
7275
7276         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7277                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7278
7279 #ifdef HAVE_PTP_1588_CLOCK
7280                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7281                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7282                         va += IGB_TS_HDR_LEN;
7283                         size -= IGB_TS_HDR_LEN;
7284                 }
7285 #endif /* HAVE_PTP_1588_CLOCK */
7286
7287                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7288
7289                 /* we can reuse buffer as-is, just make sure it is local */
7290                 if (likely(page_to_nid(page) == numa_node_id()))
7291                         return true;
7292
7293                 /* this page cannot be reused so discard it */
7294                 put_page(page);
7295                 return false;
7296         }
7297
7298         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7299                         rx_buffer->page_offset, size, truesize);
7300
7301         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7302 }
7303
7304 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7305                                            union e1000_adv_rx_desc *rx_desc,
7306                                            struct sk_buff *skb)
7307 {
7308         struct igb_rx_buffer *rx_buffer;
7309         struct page *page;
7310
7311         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7312
7313         page = rx_buffer->page;
7314         prefetchw(page);
7315
7316         if (likely(!skb)) {
7317                 void *page_addr = page_address(page) +
7318                                   rx_buffer->page_offset;
7319
7320                 /* prefetch first cache line of first page */
7321                 prefetch(page_addr);
7322 #if L1_CACHE_BYTES < 128
7323                 prefetch(page_addr + L1_CACHE_BYTES);
7324 #endif
7325
7326                 /* allocate a skb to store the frags */
7327                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7328                                                 IGB_RX_HDR_LEN);
7329                 if (unlikely(!skb)) {
7330                         rx_ring->rx_stats.alloc_failed++;
7331                         return NULL;
7332                 }
7333
7334                 /*
7335                  * we will be copying header into skb->data in
7336                  * pskb_may_pull so it is in our interest to prefetch
7337                  * it now to avoid a possible cache miss
7338                  */
7339                 prefetchw(skb->data);
7340         }
7341
7342         /* we are reusing so sync this buffer for CPU use */
7343         dma_sync_single_range_for_cpu(rx_ring->dev,
7344                                       rx_buffer->dma,
7345                                       rx_buffer->page_offset,
7346                                       IGB_RX_BUFSZ,
7347                                       DMA_FROM_DEVICE);
7348
7349         /* pull page into skb */
7350         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7351                 /* hand second half of page back to the ring */
7352                 igb_reuse_rx_page(rx_ring, rx_buffer);
7353         } else {
7354                 /* we are not reusing the buffer so unmap it */
7355                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7356                                PAGE_SIZE, DMA_FROM_DEVICE);
7357         }
7358
7359         /* clear contents of rx_buffer */
7360         rx_buffer->page = NULL;
7361
7362         return skb;
7363 }
7364
7365 #endif
7366 static inline void igb_rx_checksum(struct igb_ring *ring,
7367                                    union e1000_adv_rx_desc *rx_desc,
7368                                    struct sk_buff *skb)
7369 {
7370         skb_checksum_none_assert(skb);
7371
7372         /* Ignore Checksum bit is set */
7373         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7374                 return;
7375
7376         /* Rx checksum disabled via ethtool */
7377         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7378                 return;
7379
7380         /* TCP/UDP checksum error bit is set */
7381         if (igb_test_staterr(rx_desc,
7382                              E1000_RXDEXT_STATERR_TCPE |
7383                              E1000_RXDEXT_STATERR_IPE)) {
7384                 /*
7385                  * work around errata with sctp packets where the TCPE aka
7386                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7387                  * packets, (aka let the stack check the crc32c)
7388                  */
7389                 if (!((skb->len == 60) &&
7390                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7391                         ring->rx_stats.csum_err++;
7392
7393                 /* let the stack verify checksum errors */
7394                 return;
7395         }
7396         /* It must be a TCP or UDP packet with a valid checksum */
7397         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7398                                       E1000_RXD_STAT_UDPCS))
7399                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7400 }
7401
7402 #ifdef NETIF_F_RXHASH
7403 static inline void igb_rx_hash(struct igb_ring *ring,
7404                                union e1000_adv_rx_desc *rx_desc,
7405                                struct sk_buff *skb)
7406 {
7407         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7408                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7409                              PKT_HASH_TYPE_L3);
7410 }
7411
7412 #endif
7413 #ifndef IGB_NO_LRO
7414 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7415 /**
7416  * igb_merge_active_tail - merge active tail into lro skb
7417  * @tail: pointer to active tail in frag_list
7418  *
7419  * This function merges the length and data of an active tail into the
7420  * skb containing the frag_list.  It resets the tail's pointer to the head,
7421  * but it leaves the heads pointer to tail intact.
7422  **/
7423 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7424 {
7425         struct sk_buff *head = IGB_CB(tail)->head;
7426
7427         if (!head)
7428                 return tail;
7429
7430         head->len += tail->len;
7431         head->data_len += tail->len;
7432         head->truesize += tail->len;
7433
7434         IGB_CB(tail)->head = NULL;
7435
7436         return head;
7437 }
7438
7439 /**
7440  * igb_add_active_tail - adds an active tail into the skb frag_list
7441  * @head: pointer to the start of the skb
7442  * @tail: pointer to active tail to add to frag_list
7443  *
7444  * This function adds an active tail to the end of the frag list.  This tail
7445  * will still be receiving data so we cannot yet ad it's stats to the main
7446  * skb.  That is done via igb_merge_active_tail.
7447  **/
7448 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7449 {
7450         struct sk_buff *old_tail = IGB_CB(head)->tail;
7451
7452         if (old_tail) {
7453                 igb_merge_active_tail(old_tail);
7454                 old_tail->next = tail;
7455         } else {
7456                 skb_shinfo(head)->frag_list = tail;
7457         }
7458
7459         IGB_CB(tail)->head = head;
7460         IGB_CB(head)->tail = tail;
7461
7462         IGB_CB(head)->append_cnt++;
7463 }
7464
7465 /**
7466  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7467  * @head: pointer to head of an active frag list
7468  *
7469  * This function will clear the frag_tail_tracker pointer on an active
7470  * frag_list and returns true if the pointer was actually set
7471  **/
7472 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7473 {
7474         struct sk_buff *tail = IGB_CB(head)->tail;
7475
7476         if (!tail)
7477                 return false;
7478
7479         igb_merge_active_tail(tail);
7480
7481         IGB_CB(head)->tail = NULL;
7482
7483         return true;
7484 }
7485
7486 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7487 /**
7488  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7489  * @adapter: board private structure
7490  * @rx_desc: pointer to the rx descriptor
7491  * @skb: pointer to the skb to be merged
7492  *
7493  **/
7494 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7495                                union e1000_adv_rx_desc *rx_desc,
7496                                struct sk_buff *skb)
7497 {
7498         struct iphdr *iph = (struct iphdr *)skb->data;
7499         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7500
7501         /* verify hardware indicates this is IPv4/TCP */
7502         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7503             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7504                 return false;
7505
7506         /* .. and LRO is enabled */
7507         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7508                 return false;
7509
7510         /* .. and we are not in promiscuous mode */
7511         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7512                 return false;
7513
7514         /* .. and the header is large enough for us to read IP/TCP fields */
7515         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7516                 return false;
7517
7518         /* .. and there are no VLANs on packet */
7519         if (skb->protocol != __constant_htons(ETH_P_IP))
7520                 return false;
7521
7522         /* .. and we are version 4 with no options */
7523         if (*(u8 *)iph != 0x45)
7524                 return false;
7525
7526         /* .. and the packet is not fragmented */
7527         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7528                 return false;
7529
7530         /* .. and that next header is TCP */
7531         if (iph->protocol != IPPROTO_TCP)
7532                 return false;
7533
7534         return true;
7535 }
7536
7537 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7538 {
7539         return (struct igb_lrohdr *)skb->data;
7540 }
7541
7542 /**
7543  * igb_lro_flush - Indicate packets to upper layer.
7544  *
7545  * Update IP and TCP header part of head skb if more than one
7546  * skb's chained and indicate packets to upper layer.
7547  **/
7548 static void igb_lro_flush(struct igb_q_vector *q_vector,
7549                           struct sk_buff *skb)
7550 {
7551         struct igb_lro_list *lrolist = &q_vector->lrolist;
7552
7553         __skb_unlink(skb, &lrolist->active);
7554
7555         if (IGB_CB(skb)->append_cnt) {
7556                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7557
7558 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7559                 /* close any active lro contexts */
7560                 igb_close_active_frag_list(skb);
7561
7562 #endif
7563                 /* incorporate ip header and re-calculate checksum */
7564                 lroh->iph.tot_len = ntohs(skb->len);
7565                 lroh->iph.check = 0;
7566
7567                 /* header length is 5 since we know no options exist */
7568                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7569
7570                 /* clear TCP checksum to indicate we are an LRO frame */
7571                 lroh->th.check = 0;
7572
7573                 /* incorporate latest timestamp into the tcp header */
7574                 if (IGB_CB(skb)->tsecr) {
7575                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7576                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7577                 }
7578 #ifdef NETIF_F_GSO
7579
7580                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7581                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7582 #endif
7583         }
7584
7585 #ifdef HAVE_VLAN_RX_REGISTER
7586         igb_receive_skb(q_vector, skb);
7587 #else
7588         napi_gro_receive(&q_vector->napi, skb);
7589 #endif
7590         lrolist->stats.flushed++;
7591 }
7592
7593 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7594 {
7595         struct igb_lro_list *lrolist = &q_vector->lrolist;
7596         struct sk_buff *skb, *tmp;
7597
7598         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7599                 igb_lro_flush(q_vector, skb);
7600 }
7601
7602 /*
7603  * igb_lro_header_ok - Main LRO function.
7604  **/
7605 static void igb_lro_header_ok(struct sk_buff *skb)
7606 {
7607         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7608         u16 opt_bytes, data_len;
7609
7610 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7611         IGB_CB(skb)->tail = NULL;
7612 #endif
7613         IGB_CB(skb)->tsecr = 0;
7614         IGB_CB(skb)->append_cnt = 0;
7615         IGB_CB(skb)->mss = 0;
7616
7617         /* ensure that the checksum is valid */
7618         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7619                 return;
7620
7621         /* If we see CE codepoint in IP header, packet is not mergeable */
7622         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7623                 return;
7624
7625         /* ensure no bits set besides ack or psh */
7626         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7627             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7628             !lroh->th.ack)
7629                 return;
7630
7631         /* store the total packet length */
7632         data_len = ntohs(lroh->iph.tot_len);
7633
7634         /* remove any padding from the end of the skb */
7635         __pskb_trim(skb, data_len);
7636
7637         /* remove header length from data length */
7638         data_len -= sizeof(struct igb_lrohdr);
7639
7640         /*
7641          * check for timestamps. Since the only option we handle are timestamps,
7642          * we only have to handle the simple case of aligned timestamps
7643          */
7644         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7645         if (opt_bytes != 0) {
7646                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7647                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7648                                         TCPOLEN_TSTAMP_ALIGNED) ||
7649                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7650                                              (TCPOPT_NOP << 16) |
7651                                              (TCPOPT_TIMESTAMP << 8) |
7652                                               TCPOLEN_TIMESTAMP)) ||
7653                     (lroh->ts[2] == 0)) {
7654                         return;
7655                 }
7656
7657                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7658                 IGB_CB(skb)->tsecr = lroh->ts[2];
7659
7660                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7661         }
7662
7663         /* record data_len as mss for the packet */
7664         IGB_CB(skb)->mss = data_len;
7665         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7666 }
7667
7668 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7669 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7670 {
7671         struct skb_shared_info *sh_info;
7672         struct skb_shared_info *new_skb_info;
7673         unsigned int data_len;
7674
7675         sh_info = skb_shinfo(lro_skb);
7676         new_skb_info = skb_shinfo(new_skb);
7677
7678         /* copy frags into the last skb */
7679         memcpy(sh_info->frags + sh_info->nr_frags,
7680                new_skb_info->frags,
7681                new_skb_info->nr_frags * sizeof(skb_frag_t));
7682
7683         /* copy size data over */
7684         sh_info->nr_frags += new_skb_info->nr_frags;
7685         data_len = IGB_CB(new_skb)->mss;
7686         lro_skb->len += data_len;
7687         lro_skb->data_len += data_len;
7688         lro_skb->truesize += data_len;
7689
7690         /* wipe record of data from new_skb */
7691         new_skb_info->nr_frags = 0;
7692         new_skb->len = new_skb->data_len = 0;
7693         dev_kfree_skb_any(new_skb);
7694 }
7695
7696 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7697 /**
7698  * igb_lro_receive - if able, queue skb into lro chain
7699  * @q_vector: structure containing interrupt and ring information
7700  * @new_skb: pointer to current skb being checked
7701  *
7702  * Checks whether the skb given is eligible for LRO and if that's
7703  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7704  * the flow doesn't exist create one.
7705  **/
7706 static void igb_lro_receive(struct igb_q_vector *q_vector,
7707                             struct sk_buff *new_skb)
7708 {
7709         struct sk_buff *lro_skb;
7710         struct igb_lro_list *lrolist = &q_vector->lrolist;
7711         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7712         __be32 saddr = lroh->iph.saddr;
7713         __be32 daddr = lroh->iph.daddr;
7714         __be32 tcp_ports = *(__be32 *)&lroh->th;
7715         u16 data_len;
7716 #ifdef HAVE_VLAN_RX_REGISTER
7717         u16 vid = IGB_CB(new_skb)->vid;
7718 #else
7719         u16 vid = new_skb->vlan_tci;
7720 #endif
7721
7722         igb_lro_header_ok(new_skb);
7723
7724         /*
7725          * we have a packet that might be eligible for LRO,
7726          * so see if it matches anything we might expect
7727          */
7728         skb_queue_walk(&lrolist->active, lro_skb) {
7729                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7730                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7731                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7732                         continue;
7733
7734 #ifdef HAVE_VLAN_RX_REGISTER
7735                 if (IGB_CB(lro_skb)->vid != vid)
7736 #else
7737                 if (lro_skb->vlan_tci != vid)
7738 #endif
7739                         continue;
7740
7741                 /* out of order packet */
7742                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7743                         igb_lro_flush(q_vector, lro_skb);
7744                         IGB_CB(new_skb)->mss = 0;
7745                         break;
7746                 }
7747
7748                 /* TCP timestamp options have changed */
7749                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7750                         igb_lro_flush(q_vector, lro_skb);
7751                         break;
7752                 }
7753
7754                 /* make sure timestamp values are increasing */
7755                 if (IGB_CB(lro_skb)->tsecr &&
7756                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7757                         igb_lro_flush(q_vector, lro_skb);
7758                         IGB_CB(new_skb)->mss = 0;
7759                         break;
7760                 }
7761
7762                 data_len = IGB_CB(new_skb)->mss;
7763
7764                 /* Check for all of the above below
7765                  *   malformed header
7766                  *   no tcp data
7767                  *   resultant packet would be too large
7768                  *   new skb is larger than our current mss
7769                  *   data would remain in header
7770                  *   we would consume more frags then the sk_buff contains
7771                  *   ack sequence numbers changed
7772                  *   window size has changed
7773                  */
7774                 if (data_len == 0 ||
7775                     data_len > IGB_CB(lro_skb)->mss ||
7776                     data_len > IGB_CB(lro_skb)->free ||
7777 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7778                     data_len != new_skb->data_len ||
7779                     skb_shinfo(new_skb)->nr_frags >=
7780                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7781 #endif
7782                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7783                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7784                         igb_lro_flush(q_vector, lro_skb);
7785                         break;
7786                 }
7787
7788                 /* Remove IP and TCP header*/
7789                 skb_pull(new_skb, new_skb->len - data_len);
7790
7791                 /* update timestamp and timestamp echo response */
7792                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7793                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7794
7795                 /* update sequence and free space */
7796                 IGB_CB(lro_skb)->next_seq += data_len;
7797                 IGB_CB(lro_skb)->free -= data_len;
7798
7799                 /* update append_cnt */
7800                 IGB_CB(lro_skb)->append_cnt++;
7801
7802 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7803                 /* if header is empty pull pages into current skb */
7804                 igb_merge_frags(lro_skb, new_skb);
7805 #else
7806                 /* chain this new skb in frag_list */
7807                 igb_add_active_tail(lro_skb, new_skb);
7808 #endif
7809
7810                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7811                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7812                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7813                         igb_lro_flush(q_vector, lro_skb);
7814                 }
7815
7816                 lrolist->stats.coal++;
7817                 return;
7818         }
7819
7820         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7821                 /* if we are at capacity flush the tail */
7822                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7823                         lro_skb = skb_peek_tail(&lrolist->active);
7824                         if (lro_skb)
7825                                 igb_lro_flush(q_vector, lro_skb);
7826                 }
7827
7828                 /* update sequence and free space */
7829                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7830                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7831
7832                 /* .. and insert at the front of the active list */
7833                 __skb_queue_head(&lrolist->active, new_skb);
7834
7835                 lrolist->stats.coal++;
7836                 return;
7837         }
7838
7839         /* packet not handled by any of the above, pass it to the stack */
7840 #ifdef HAVE_VLAN_RX_REGISTER
7841         igb_receive_skb(q_vector, new_skb);
7842 #else
7843         napi_gro_receive(&q_vector->napi, new_skb);
7844 #endif
7845 }
7846
7847 #endif /* IGB_NO_LRO */
7848 /**
7849  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7850  * @rx_ring: rx descriptor ring packet is being transacted on
7851  * @rx_desc: pointer to the EOP Rx descriptor
7852  * @skb: pointer to current skb being populated
7853  *
7854  * This function checks the ring, descriptor, and packet information in
7855  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7856  * other fields within the skb.
7857  **/
7858 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7859                                    union e1000_adv_rx_desc *rx_desc,
7860                                    struct sk_buff *skb)
7861 {
7862         struct net_device *dev = rx_ring->netdev;
7863         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7864
7865 #ifdef NETIF_F_RXHASH
7866         igb_rx_hash(rx_ring, rx_desc, skb);
7867
7868 #endif
7869         igb_rx_checksum(rx_ring, rx_desc, skb);
7870
7871     /* update packet type stats */
7872         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7873                 rx_ring->rx_stats.ipv4_packets++;
7874         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7875                 rx_ring->rx_stats.ipv4e_packets++;
7876         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7877                 rx_ring->rx_stats.ipv6_packets++;
7878         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7879                 rx_ring->rx_stats.ipv6e_packets++;
7880         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7881                 rx_ring->rx_stats.tcp_packets++;
7882         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7883                 rx_ring->rx_stats.udp_packets++;
7884         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7885                 rx_ring->rx_stats.sctp_packets++;
7886         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7887                 rx_ring->rx_stats.nfs_packets++;
7888
7889 #ifdef HAVE_PTP_1588_CLOCK
7890         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7891 #endif /* HAVE_PTP_1588_CLOCK */
7892
7893 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7894         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7895 #else
7896         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7897 #endif
7898             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7899                 u16 vid = 0;
7900                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7901                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7902                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7903                 else
7904                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7905 #ifdef HAVE_VLAN_RX_REGISTER
7906                 IGB_CB(skb)->vid = vid;
7907         } else {
7908                 IGB_CB(skb)->vid = 0;
7909 #else
7910
7911 #ifdef HAVE_VLAN_PROTOCOL
7912                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7913 #else
7914                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7915 #endif
7916
7917
7918 #endif
7919         }
7920
7921         skb_record_rx_queue(skb, rx_ring->queue_index);
7922
7923         skb->protocol = eth_type_trans(skb, dev);
7924 }
7925
7926 /**
7927  * igb_is_non_eop - process handling of non-EOP buffers
7928  * @rx_ring: Rx ring being processed
7929  * @rx_desc: Rx descriptor for current buffer
7930  *
7931  * This function updates next to clean.  If the buffer is an EOP buffer
7932  * this function exits returning false, otherwise it will place the
7933  * sk_buff in the next buffer to be chained and return true indicating
7934  * that this is in fact a non-EOP buffer.
7935  **/
7936 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7937                            union e1000_adv_rx_desc *rx_desc)
7938 {
7939         u32 ntc = rx_ring->next_to_clean + 1;
7940
7941         /* fetch, update, and store next to clean */
7942         ntc = (ntc < rx_ring->count) ? ntc : 0;
7943         rx_ring->next_to_clean = ntc;
7944
7945         prefetch(IGB_RX_DESC(rx_ring, ntc));
7946
7947         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7948                 return false;
7949
7950         return true;
7951 }
7952
7953 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7954 /* igb_clean_rx_irq -- * legacy */
7955 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7956 {
7957         struct igb_ring *rx_ring = q_vector->rx.ring;
7958         unsigned int total_bytes = 0, total_packets = 0;
7959         u16 cleaned_count = igb_desc_unused(rx_ring);
7960
7961         do {
7962                 struct igb_rx_buffer *rx_buffer;
7963                 union e1000_adv_rx_desc *rx_desc;
7964                 struct sk_buff *skb;
7965                 u16 ntc;
7966
7967                 /* return some buffers to hardware, one at a time is too slow */
7968                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7969                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7970                         cleaned_count = 0;
7971                 }
7972
7973                 ntc = rx_ring->next_to_clean;
7974                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7975                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7976
7977                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7978                         break;
7979
7980                 /*
7981                  * This memory barrier is needed to keep us from reading
7982                  * any other fields out of the rx_desc until we know the
7983                  * RXD_STAT_DD bit is set
7984                  */
7985                 rmb();
7986
7987                 skb = rx_buffer->skb;
7988
7989                 prefetch(skb->data);
7990
7991                 /* pull the header of the skb in */
7992                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7993
7994                 /* clear skb reference in buffer info structure */
7995                 rx_buffer->skb = NULL;
7996
7997                 cleaned_count++;
7998
7999                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8000
8001                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8002                                  rx_ring->rx_buffer_len,
8003                                  DMA_FROM_DEVICE);
8004                 rx_buffer->dma = 0;
8005
8006                 if (igb_test_staterr(rx_desc,
8007                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8008                         dev_kfree_skb_any(skb);
8009                         continue;
8010                 }
8011
8012                 total_bytes += skb->len;
8013
8014                 /* populate checksum, timestamp, VLAN, and protocol */
8015                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8016
8017 #ifndef IGB_NO_LRO
8018                 if (igb_can_lro(rx_ring, rx_desc, skb))
8019                         igb_lro_receive(q_vector, skb);
8020                 else
8021 #endif
8022 #ifdef HAVE_VLAN_RX_REGISTER
8023                         igb_receive_skb(q_vector, skb);
8024 #else
8025                         napi_gro_receive(&q_vector->napi, skb);
8026 #endif
8027
8028 #ifndef NETIF_F_GRO
8029                 netdev_ring(rx_ring)->last_rx = jiffies;
8030
8031 #endif
8032                 /* update budget accounting */
8033                 total_packets++;
8034         } while (likely(total_packets < budget));
8035
8036         rx_ring->rx_stats.packets += total_packets;
8037         rx_ring->rx_stats.bytes += total_bytes;
8038         q_vector->rx.total_packets += total_packets;
8039         q_vector->rx.total_bytes += total_bytes;
8040
8041         if (cleaned_count)
8042                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8043
8044 #ifndef IGB_NO_LRO
8045         igb_lro_flush_all(q_vector);
8046
8047 #endif /* IGB_NO_LRO */
8048         return total_packets < budget;
8049 }
8050 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8051 /**
8052  * igb_get_headlen - determine size of header for LRO/GRO
8053  * @data: pointer to the start of the headers
8054  * @max_len: total length of section to find headers in
8055  *
8056  * This function is meant to determine the length of headers that will
8057  * be recognized by hardware for LRO, and GRO offloads.  The main
8058  * motivation of doing this is to only perform one pull for IPv4 TCP
8059  * packets so that we can do basic things like calculating the gso_size
8060  * based on the average data per packet.
8061  **/
8062 static unsigned int igb_get_headlen(unsigned char *data,
8063                                     unsigned int max_len)
8064 {
8065         union {
8066                 unsigned char *network;
8067                 /* l2 headers */
8068                 struct ethhdr *eth;
8069                 struct vlan_hdr *vlan;
8070                 /* l3 headers */
8071                 struct iphdr *ipv4;
8072                 struct ipv6hdr *ipv6;
8073         } hdr;
8074         __be16 protocol;
8075         u8 nexthdr = 0; /* default to not TCP */
8076         u8 hlen;
8077
8078         /* this should never happen, but better safe than sorry */
8079         if (max_len < ETH_HLEN)
8080                 return max_len;
8081
8082         /* initialize network frame pointer */
8083         hdr.network = data;
8084
8085         /* set first protocol and move network header forward */
8086         protocol = hdr.eth->h_proto;
8087         hdr.network += ETH_HLEN;
8088
8089         /* handle any vlan tag if present */
8090         if (protocol == __constant_htons(ETH_P_8021Q)) {
8091                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8092                         return max_len;
8093
8094                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8095                 hdr.network += VLAN_HLEN;
8096         }
8097
8098         /* handle L3 protocols */
8099         if (protocol == __constant_htons(ETH_P_IP)) {
8100                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8101                         return max_len;
8102
8103                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8104                 hlen = (hdr.network[0] & 0x0F) << 2;
8105
8106                 /* verify hlen meets minimum size requirements */
8107                 if (hlen < sizeof(struct iphdr))
8108                         return hdr.network - data;
8109
8110                 /* record next protocol if header is present */
8111                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8112                         nexthdr = hdr.ipv4->protocol;
8113 #ifdef NETIF_F_TSO6
8114         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8115                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8116                         return max_len;
8117
8118                 /* record next protocol */
8119                 nexthdr = hdr.ipv6->nexthdr;
8120                 hlen = sizeof(struct ipv6hdr);
8121 #endif /* NETIF_F_TSO6 */
8122         } else {
8123                 return hdr.network - data;
8124         }
8125
8126         /* relocate pointer to start of L4 header */
8127         hdr.network += hlen;
8128
8129         /* finally sort out TCP */
8130         if (nexthdr == IPPROTO_TCP) {
8131                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8132                         return max_len;
8133
8134                 /* access doff as a u8 to avoid unaligned access on ia64 */
8135                 hlen = (hdr.network[12] & 0xF0) >> 2;
8136
8137                 /* verify hlen meets minimum size requirements */
8138                 if (hlen < sizeof(struct tcphdr))
8139                         return hdr.network - data;
8140
8141                 hdr.network += hlen;
8142         } else if (nexthdr == IPPROTO_UDP) {
8143                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8144                         return max_len;
8145
8146                 hdr.network += sizeof(struct udphdr);
8147         }
8148
8149         /*
8150          * If everything has gone correctly hdr.network should be the
8151          * data section of the packet and will be the end of the header.
8152          * If not then it probably represents the end of the last recognized
8153          * header.
8154          */
8155         if ((hdr.network - data) < max_len)
8156                 return hdr.network - data;
8157         else
8158                 return max_len;
8159 }
8160
8161 /**
8162  * igb_pull_tail - igb specific version of skb_pull_tail
8163  * @rx_ring: rx descriptor ring packet is being transacted on
8164  * @rx_desc: pointer to the EOP Rx descriptor
8165  * @skb: pointer to current skb being adjusted
8166  *
8167  * This function is an igb specific version of __pskb_pull_tail.  The
8168  * main difference between this version and the original function is that
8169  * this function can make several assumptions about the state of things
8170  * that allow for significant optimizations versus the standard function.
8171  * As a result we can do things like drop a frag and maintain an accurate
8172  * truesize for the skb.
8173  */
8174 static void igb_pull_tail(struct igb_ring *rx_ring,
8175                           union e1000_adv_rx_desc *rx_desc,
8176                           struct sk_buff *skb)
8177 {
8178         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8179         unsigned char *va;
8180         unsigned int pull_len;
8181
8182         /*
8183          * it is valid to use page_address instead of kmap since we are
8184          * working with pages allocated out of the lomem pool per
8185          * alloc_page(GFP_ATOMIC)
8186          */
8187         va = skb_frag_address(frag);
8188
8189 #ifdef HAVE_PTP_1588_CLOCK
8190         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8191                 /* retrieve timestamp from buffer */
8192                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8193
8194                 /* update pointers to remove timestamp header */
8195                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8196                 frag->page_offset += IGB_TS_HDR_LEN;
8197                 skb->data_len -= IGB_TS_HDR_LEN;
8198                 skb->len -= IGB_TS_HDR_LEN;
8199
8200                 /* move va to start of packet data */
8201                 va += IGB_TS_HDR_LEN;
8202         }
8203 #endif /* HAVE_PTP_1588_CLOCK */
8204
8205         /*
8206          * we need the header to contain the greater of either ETH_HLEN or
8207          * 60 bytes if the skb->len is less than 60 for skb_pad.
8208          */
8209         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8210
8211         /* align pull length to size of long to optimize memcpy performance */
8212         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8213
8214         /* update all of the pointers */
8215         skb_frag_size_sub(frag, pull_len);
8216         frag->page_offset += pull_len;
8217         skb->data_len -= pull_len;
8218         skb->tail += pull_len;
8219 }
8220
8221 /**
8222  * igb_cleanup_headers - Correct corrupted or empty headers
8223  * @rx_ring: rx descriptor ring packet is being transacted on
8224  * @rx_desc: pointer to the EOP Rx descriptor
8225  * @skb: pointer to current skb being fixed
8226  *
8227  * Address the case where we are pulling data in on pages only
8228  * and as such no data is present in the skb header.
8229  *
8230  * In addition if skb is not at least 60 bytes we need to pad it so that
8231  * it is large enough to qualify as a valid Ethernet frame.
8232  *
8233  * Returns true if an error was encountered and skb was freed.
8234  **/
8235 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8236                                 union e1000_adv_rx_desc *rx_desc,
8237                                 struct sk_buff *skb)
8238 {
8239
8240         if (unlikely((igb_test_staterr(rx_desc,
8241                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8242                 struct net_device *netdev = rx_ring->netdev;
8243                 if (!(netdev->features & NETIF_F_RXALL)) {
8244                         dev_kfree_skb_any(skb);
8245                         return true;
8246                 }
8247         }
8248
8249         /* place header in linear portion of buffer */
8250         if (skb_is_nonlinear(skb))
8251                 igb_pull_tail(rx_ring, rx_desc, skb);
8252
8253         /* if skb_pad returns an error the skb was freed */
8254         if (unlikely(skb->len < 60)) {
8255                 int pad_len = 60 - skb->len;
8256
8257                 if (skb_pad(skb, pad_len))
8258                         return true;
8259                 __skb_put(skb, pad_len);
8260         }
8261
8262         return false;
8263 }
8264
8265 /* igb_clean_rx_irq -- * packet split */
8266 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8267 {
8268         struct igb_ring *rx_ring = q_vector->rx.ring;
8269         struct sk_buff *skb = rx_ring->skb;
8270         unsigned int total_bytes = 0, total_packets = 0;
8271         u16 cleaned_count = igb_desc_unused(rx_ring);
8272
8273         do {
8274                 union e1000_adv_rx_desc *rx_desc;
8275
8276                 /* return some buffers to hardware, one at a time is too slow */
8277                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8278                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8279                         cleaned_count = 0;
8280                 }
8281
8282                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8283
8284                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8285                         break;
8286
8287                 /*
8288                  * This memory barrier is needed to keep us from reading
8289                  * any other fields out of the rx_desc until we know the
8290                  * RXD_STAT_DD bit is set
8291                  */
8292                 rmb();
8293
8294                 /* retrieve a buffer from the ring */
8295                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8296
8297                 /* exit if we failed to retrieve a buffer */
8298                 if (!skb)
8299                         break;
8300
8301                 cleaned_count++;
8302
8303                 /* fetch next buffer in frame if non-eop */
8304                 if (igb_is_non_eop(rx_ring, rx_desc))
8305                         continue;
8306
8307                 /* verify the packet layout is correct */
8308                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8309                         skb = NULL;
8310                         continue;
8311                 }
8312
8313                 /* probably a little skewed due to removing CRC */
8314                 total_bytes += skb->len;
8315
8316                 /* populate checksum, timestamp, VLAN, and protocol */
8317                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8318
8319 #ifndef IGB_NO_LRO
8320                 if (igb_can_lro(rx_ring, rx_desc, skb))
8321                         igb_lro_receive(q_vector, skb);
8322                 else
8323 #endif
8324 #ifdef HAVE_VLAN_RX_REGISTER
8325                         igb_receive_skb(q_vector, skb);
8326 #else
8327                         napi_gro_receive(&q_vector->napi, skb);
8328 #endif
8329 #ifndef NETIF_F_GRO
8330
8331                 netdev_ring(rx_ring)->last_rx = jiffies;
8332 #endif
8333
8334                 /* reset skb pointer */
8335                 skb = NULL;
8336
8337                 /* update budget accounting */
8338                 total_packets++;
8339         } while (likely(total_packets < budget));
8340
8341         /* place incomplete frames back on ring for completion */
8342         rx_ring->skb = skb;
8343
8344         rx_ring->rx_stats.packets += total_packets;
8345         rx_ring->rx_stats.bytes += total_bytes;
8346         q_vector->rx.total_packets += total_packets;
8347         q_vector->rx.total_bytes += total_bytes;
8348
8349         if (cleaned_count)
8350                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8351
8352 #ifndef IGB_NO_LRO
8353         igb_lro_flush_all(q_vector);
8354
8355 #endif /* IGB_NO_LRO */
8356         return total_packets < budget;
8357 }
8358 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8359
8360 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8361 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8362                                  struct igb_rx_buffer *bi)
8363 {
8364         struct sk_buff *skb = bi->skb;
8365         dma_addr_t dma = bi->dma;
8366
8367         if (dma)
8368                 return true;
8369
8370         if (likely(!skb)) {
8371                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8372                                                 rx_ring->rx_buffer_len);
8373                 bi->skb = skb;
8374                 if (!skb) {
8375                         rx_ring->rx_stats.alloc_failed++;
8376                         return false;
8377                 }
8378
8379                 /* initialize skb for ring */
8380                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8381         }
8382
8383         dma = dma_map_single(rx_ring->dev, skb->data,
8384                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8385
8386         /* if mapping failed free memory back to system since
8387          * there isn't much point in holding memory we can't use
8388          */
8389         if (dma_mapping_error(rx_ring->dev, dma)) {
8390                 dev_kfree_skb_any(skb);
8391                 bi->skb = NULL;
8392
8393                 rx_ring->rx_stats.alloc_failed++;
8394                 return false;
8395         }
8396
8397         bi->dma = dma;
8398         return true;
8399 }
8400
8401 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8402 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8403                                   struct igb_rx_buffer *bi)
8404 {
8405         struct page *page = bi->page;
8406         dma_addr_t dma;
8407
8408         /* since we are recycling buffers we should seldom need to alloc */
8409         if (likely(page))
8410                 return true;
8411
8412         /* alloc new page for storage */
8413         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8414         if (unlikely(!page)) {
8415                 rx_ring->rx_stats.alloc_failed++;
8416                 return false;
8417         }
8418
8419         /* map page for use */
8420         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8421
8422         /*
8423          * if mapping failed free memory back to system since
8424          * there isn't much point in holding memory we can't use
8425          */
8426         if (dma_mapping_error(rx_ring->dev, dma)) {
8427                 __free_page(page);
8428
8429                 rx_ring->rx_stats.alloc_failed++;
8430                 return false;
8431         }
8432
8433         bi->dma = dma;
8434         bi->page = page;
8435         bi->page_offset = 0;
8436
8437         return true;
8438 }
8439
8440 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8441 /**
8442  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8443  * @adapter: address of board private structure
8444  **/
8445 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8446 {
8447         union e1000_adv_rx_desc *rx_desc;
8448         struct igb_rx_buffer *bi;
8449         u16 i = rx_ring->next_to_use;
8450
8451         /* nothing to do */
8452         if (!cleaned_count)
8453                 return;
8454
8455         rx_desc = IGB_RX_DESC(rx_ring, i);
8456         bi = &rx_ring->rx_buffer_info[i];
8457         i -= rx_ring->count;
8458
8459         do {
8460 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8461                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8462 #else
8463                 if (!igb_alloc_mapped_page(rx_ring, bi))
8464 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8465                         break;
8466
8467                 /*
8468                  * Refresh the desc even if buffer_addrs didn't change
8469                  * because each write-back erases this info.
8470                  */
8471 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8472                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8473 #else
8474                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8475 #endif
8476
8477                 rx_desc++;
8478                 bi++;
8479                 i++;
8480                 if (unlikely(!i)) {
8481                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8482                         bi = rx_ring->rx_buffer_info;
8483                         i -= rx_ring->count;
8484                 }
8485
8486                 /* clear the hdr_addr for the next_to_use descriptor */
8487                 rx_desc->read.hdr_addr = 0;
8488
8489                 cleaned_count--;
8490         } while (cleaned_count);
8491
8492         i += rx_ring->count;
8493
8494         if (rx_ring->next_to_use != i) {
8495                 /* record the next descriptor to use */
8496                 rx_ring->next_to_use = i;
8497
8498 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8499                 /* update next to alloc since we have filled the ring */
8500                 rx_ring->next_to_alloc = i;
8501
8502 #endif
8503                 /*
8504                  * Force memory writes to complete before letting h/w
8505                  * know there are new descriptors to fetch.  (Only
8506                  * applicable for weak-ordered memory model archs,
8507                  * such as IA-64).
8508                  */
8509                 wmb();
8510                 writel(i, rx_ring->tail);
8511         }
8512 }
8513
8514 #ifdef SIOCGMIIPHY
8515 /**
8516  * igb_mii_ioctl -
8517  * @netdev:
8518  * @ifreq:
8519  * @cmd:
8520  **/
8521 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8522 {
8523         struct igb_adapter *adapter = netdev_priv(netdev);
8524         struct mii_ioctl_data *data = if_mii(ifr);
8525
8526         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8527                 return -EOPNOTSUPP;
8528
8529         switch (cmd) {
8530         case SIOCGMIIPHY:
8531                 data->phy_id = adapter->hw.phy.addr;
8532                 break;
8533         case SIOCGMIIREG:
8534                 if (!capable(CAP_NET_ADMIN))
8535                         return -EPERM;
8536                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8537                                    &data->val_out))
8538                         return -EIO;
8539                 break;
8540         case SIOCSMIIREG:
8541         default:
8542                 return -EOPNOTSUPP;
8543         }
8544         return E1000_SUCCESS;
8545 }
8546
8547 #endif
8548 /**
8549  * igb_ioctl -
8550  * @netdev:
8551  * @ifreq:
8552  * @cmd:
8553  **/
8554 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8555 {
8556         switch (cmd) {
8557 #ifdef SIOCGMIIPHY
8558         case SIOCGMIIPHY:
8559         case SIOCGMIIREG:
8560         case SIOCSMIIREG:
8561                 return igb_mii_ioctl(netdev, ifr, cmd);
8562 #endif
8563 #ifdef HAVE_PTP_1588_CLOCK
8564         case SIOCSHWTSTAMP:
8565                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8566 #endif /* HAVE_PTP_1588_CLOCK */
8567 #ifdef ETHTOOL_OPS_COMPAT
8568         case SIOCETHTOOL:
8569                 return ethtool_ioctl(ifr);
8570 #endif
8571         default:
8572                 return -EOPNOTSUPP;
8573         }
8574 }
8575
8576 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8577 {
8578         struct igb_adapter *adapter = hw->back;
8579         u16 cap_offset;
8580
8581         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8582         if (!cap_offset)
8583                 return -E1000_ERR_CONFIG;
8584
8585         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8586
8587         return E1000_SUCCESS;
8588 }
8589
8590 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8591 {
8592         struct igb_adapter *adapter = hw->back;
8593         u16 cap_offset;
8594
8595         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8596         if (!cap_offset)
8597                 return -E1000_ERR_CONFIG;
8598
8599         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8600
8601         return E1000_SUCCESS;
8602 }
8603
8604 #ifdef HAVE_VLAN_RX_REGISTER
8605 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8606 #else
8607 void igb_vlan_mode(struct net_device *netdev, u32 features)
8608 #endif
8609 {
8610         struct igb_adapter *adapter = netdev_priv(netdev);
8611         struct e1000_hw *hw = &adapter->hw;
8612         u32 ctrl, rctl;
8613         int i;
8614 #ifdef HAVE_VLAN_RX_REGISTER
8615         bool enable = !!vlgrp;
8616
8617         igb_irq_disable(adapter);
8618
8619         adapter->vlgrp = vlgrp;
8620
8621         if (!test_bit(__IGB_DOWN, &adapter->state))
8622                 igb_irq_enable(adapter);
8623 #else
8624 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8625         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8626 #else
8627         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8628 #endif
8629 #endif
8630
8631         if (enable) {
8632                 /* enable VLAN tag insert/strip */
8633                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8634                 ctrl |= E1000_CTRL_VME;
8635                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8636
8637                 /* Disable CFI check */
8638                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8639                 rctl &= ~E1000_RCTL_CFIEN;
8640                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8641         } else {
8642                 /* disable VLAN tag insert/strip */
8643                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8644                 ctrl &= ~E1000_CTRL_VME;
8645                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8646         }
8647
8648 #ifndef CONFIG_IGB_VMDQ_NETDEV
8649         for (i = 0; i < adapter->vmdq_pools; i++) {
8650                 igb_set_vf_vlan_strip(adapter,
8651                                       adapter->vfs_allocated_count + i,
8652                                       enable);
8653         }
8654
8655 #else
8656         igb_set_vf_vlan_strip(adapter,
8657                               adapter->vfs_allocated_count,
8658                               enable);
8659
8660         for (i = 1; i < adapter->vmdq_pools; i++) {
8661 #ifdef HAVE_VLAN_RX_REGISTER
8662                 struct igb_vmdq_adapter *vadapter;
8663                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8664                 enable = !!vadapter->vlgrp;
8665 #else
8666                 struct net_device *vnetdev;
8667                 vnetdev = adapter->vmdq_netdev[i-1];
8668 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8669                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8670 #else
8671                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8672 #endif
8673 #endif
8674                 igb_set_vf_vlan_strip(adapter,
8675                                       adapter->vfs_allocated_count + i,
8676                                       enable);
8677         }
8678
8679 #endif
8680         igb_rlpml_set(adapter);
8681 }
8682
8683 #ifdef HAVE_VLAN_PROTOCOL
8684 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8685 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8686 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8687 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8688                                __always_unused __be16 proto, u16 vid)
8689 #else
8690 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8691 #endif
8692 #else
8693 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8694 #endif
8695 {
8696         struct igb_adapter *adapter = netdev_priv(netdev);
8697         int pf_id = adapter->vfs_allocated_count;
8698
8699         /* attempt to add filter to vlvf array */
8700         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8701
8702         /* add the filter since PF can receive vlans w/o entry in vlvf */
8703         igb_vfta_set(adapter, vid, TRUE);
8704 #ifndef HAVE_NETDEV_VLAN_FEATURES
8705
8706         /* Copy feature flags from netdev to the vlan netdev for this vid.
8707          * This allows things like TSO to bubble down to our vlan device.
8708          * There is no need to update netdev for vlan 0 (DCB), since it
8709          * wouldn't has v_netdev.
8710          */
8711         if (adapter->vlgrp) {
8712                 struct vlan_group *vlgrp = adapter->vlgrp;
8713                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8714                 if (v_netdev) {
8715                         v_netdev->features |= netdev->features;
8716                         vlan_group_set_device(vlgrp, vid, v_netdev);
8717                 }
8718         }
8719 #endif
8720 #ifndef HAVE_VLAN_RX_REGISTER
8721
8722         set_bit(vid, adapter->active_vlans);
8723 #endif
8724 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8725         return 0;
8726 #endif
8727 }
8728
8729 #ifdef HAVE_VLAN_PROTOCOL
8730 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8731 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8732 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8733 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8734                                 __always_unused __be16 proto, u16 vid)
8735 #else
8736 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8737 #endif
8738 #else
8739 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8740 #endif
8741 {
8742         struct igb_adapter *adapter = netdev_priv(netdev);
8743         int pf_id = adapter->vfs_allocated_count;
8744         s32 err;
8745
8746 #ifdef HAVE_VLAN_RX_REGISTER
8747         igb_irq_disable(adapter);
8748
8749         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8750
8751         if (!test_bit(__IGB_DOWN, &adapter->state))
8752                 igb_irq_enable(adapter);
8753
8754 #endif /* HAVE_VLAN_RX_REGISTER */
8755         /* remove vlan from VLVF table array */
8756         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8757
8758         /* if vid was not present in VLVF just remove it from table */
8759         if (err)
8760                 igb_vfta_set(adapter, vid, FALSE);
8761 #ifndef HAVE_VLAN_RX_REGISTER
8762
8763         clear_bit(vid, adapter->active_vlans);
8764 #endif
8765 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8766         return 0;
8767 #endif
8768 }
8769
8770 static void igb_restore_vlan(struct igb_adapter *adapter)
8771 {
8772 #ifdef HAVE_VLAN_RX_REGISTER
8773         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8774
8775         if (adapter->vlgrp) {
8776                 u16 vid;
8777                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8778                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8779                                 continue;
8780 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8781                         igb_vlan_rx_add_vid(adapter->netdev,
8782                                             htons(ETH_P_8021Q), vid);
8783 #else
8784                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8785 #endif
8786                 }
8787         }
8788 #else
8789         u16 vid;
8790
8791         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8792
8793         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8794 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8795                 igb_vlan_rx_add_vid(adapter->netdev,
8796                                     htons(ETH_P_8021Q), vid);
8797 #else
8798                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8799 #endif
8800 #endif
8801 }
8802
8803 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8804 {
8805         struct pci_dev *pdev = adapter->pdev;
8806         struct e1000_mac_info *mac = &adapter->hw.mac;
8807
8808         mac->autoneg = 0;
8809
8810         /* SerDes device's does not support 10Mbps Full/duplex
8811          * and 100Mbps Half duplex
8812          */
8813         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8814                 switch (spddplx) {
8815                 case SPEED_10 + DUPLEX_HALF:
8816                 case SPEED_10 + DUPLEX_FULL:
8817                 case SPEED_100 + DUPLEX_HALF:
8818                         dev_err(pci_dev_to_dev(pdev),
8819                                 "Unsupported Speed/Duplex configuration\n");
8820                         return -EINVAL;
8821                 default:
8822                         break;
8823                 }
8824         }
8825
8826         switch (spddplx) {
8827         case SPEED_10 + DUPLEX_HALF:
8828                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8829                 break;
8830         case SPEED_10 + DUPLEX_FULL:
8831                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8832                 break;
8833         case SPEED_100 + DUPLEX_HALF:
8834                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8835                 break;
8836         case SPEED_100 + DUPLEX_FULL:
8837                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8838                 break;
8839         case SPEED_1000 + DUPLEX_FULL:
8840                 mac->autoneg = 1;
8841                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8842                 break;
8843         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8844         default:
8845                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8846                 return -EINVAL;
8847         }
8848
8849         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8850         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8851
8852         return 0;
8853 }
8854
8855 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8856                           bool runtime)
8857 {
8858         struct net_device *netdev = pci_get_drvdata(pdev);
8859         struct igb_adapter *adapter = netdev_priv(netdev);
8860         struct e1000_hw *hw = &adapter->hw;
8861         u32 ctrl, rctl, status;
8862         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8863 #ifdef CONFIG_PM
8864         int retval = 0;
8865 #endif
8866
8867         netif_device_detach(netdev);
8868
8869         status = E1000_READ_REG(hw, E1000_STATUS);
8870         if (status & E1000_STATUS_LU)
8871                 wufc &= ~E1000_WUFC_LNKC;
8872
8873         if (netif_running(netdev))
8874                 __igb_close(netdev, true);
8875
8876         igb_clear_interrupt_scheme(adapter);
8877
8878 #ifdef CONFIG_PM
8879         retval = pci_save_state(pdev);
8880         if (retval)
8881                 return retval;
8882 #endif
8883
8884         if (wufc) {
8885                 igb_setup_rctl(adapter);
8886                 igb_set_rx_mode(netdev);
8887
8888                 /* turn on all-multi mode if wake on multicast is enabled */
8889                 if (wufc & E1000_WUFC_MC) {
8890                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8891                         rctl |= E1000_RCTL_MPE;
8892                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8893                 }
8894
8895                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8896                 /* phy power management enable */
8897                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8898                 ctrl |= E1000_CTRL_ADVD3WUC;
8899                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8900
8901                 /* Allow time for pending master requests to run */
8902                 e1000_disable_pcie_master(hw);
8903
8904                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8905                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8906         } else {
8907                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8908                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8909         }
8910
8911         *enable_wake = wufc || adapter->en_mng_pt;
8912         if (!*enable_wake)
8913                 igb_power_down_link(adapter);
8914         else
8915                 igb_power_up_link(adapter);
8916
8917         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8918          * would have already happened in close and is redundant. */
8919         igb_release_hw_control(adapter);
8920
8921         pci_disable_device(pdev);
8922
8923         return 0;
8924 }
8925
8926 #ifdef CONFIG_PM
8927 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8928 static int igb_suspend(struct device *dev)
8929 #else
8930 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8931 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8932 {
8933 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8934         struct pci_dev *pdev = to_pci_dev(dev);
8935 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8936         int retval;
8937         bool wake;
8938
8939         retval = __igb_shutdown(pdev, &wake, 0);
8940         if (retval)
8941                 return retval;
8942
8943         if (wake) {
8944                 pci_prepare_to_sleep(pdev);
8945         } else {
8946                 pci_wake_from_d3(pdev, false);
8947                 pci_set_power_state(pdev, PCI_D3hot);
8948         }
8949
8950         return 0;
8951 }
8952
8953 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8954 static int igb_resume(struct device *dev)
8955 #else
8956 static int igb_resume(struct pci_dev *pdev)
8957 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8958 {
8959 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8960         struct pci_dev *pdev = to_pci_dev(dev);
8961 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8962         struct net_device *netdev = pci_get_drvdata(pdev);
8963         struct igb_adapter *adapter = netdev_priv(netdev);
8964         struct e1000_hw *hw = &adapter->hw;
8965         u32 err;
8966
8967         pci_set_power_state(pdev, PCI_D0);
8968         pci_restore_state(pdev);
8969         pci_save_state(pdev);
8970
8971         err = pci_enable_device_mem(pdev);
8972         if (err) {
8973                 dev_err(pci_dev_to_dev(pdev),
8974                         "igb: Cannot enable PCI device from suspend\n");
8975                 return err;
8976         }
8977         pci_set_master(pdev);
8978
8979         pci_enable_wake(pdev, PCI_D3hot, 0);
8980         pci_enable_wake(pdev, PCI_D3cold, 0);
8981
8982         if (igb_init_interrupt_scheme(adapter, true)) {
8983                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8984                 return -ENOMEM;
8985         }
8986
8987         igb_reset(adapter);
8988
8989         /* let the f/w know that the h/w is now under the control of the
8990          * driver. */
8991         igb_get_hw_control(adapter);
8992
8993         E1000_WRITE_REG(hw, E1000_WUS, ~0);
8994
8995         if (netdev->flags & IFF_UP) {
8996                 rtnl_lock();
8997                 err = __igb_open(netdev, true);
8998                 rtnl_unlock();
8999                 if (err)
9000                         return err;
9001         }
9002
9003         netif_device_attach(netdev);
9004
9005         return 0;
9006 }
9007
9008 #ifdef CONFIG_PM_RUNTIME
9009 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9010 static int igb_runtime_idle(struct device *dev)
9011 {
9012         struct pci_dev *pdev = to_pci_dev(dev);
9013         struct net_device *netdev = pci_get_drvdata(pdev);
9014         struct igb_adapter *adapter = netdev_priv(netdev);
9015
9016         if (!igb_has_link(adapter))
9017                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9018
9019         return -EBUSY;
9020 }
9021
9022 static int igb_runtime_suspend(struct device *dev)
9023 {
9024         struct pci_dev *pdev = to_pci_dev(dev);
9025         int retval;
9026         bool wake;
9027
9028         retval = __igb_shutdown(pdev, &wake, 1);
9029         if (retval)
9030                 return retval;
9031
9032         if (wake) {
9033                 pci_prepare_to_sleep(pdev);
9034         } else {
9035                 pci_wake_from_d3(pdev, false);
9036                 pci_set_power_state(pdev, PCI_D3hot);
9037         }
9038
9039         return 0;
9040 }
9041
9042 static int igb_runtime_resume(struct device *dev)
9043 {
9044         return igb_resume(dev);
9045 }
9046 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9047 #endif /* CONFIG_PM_RUNTIME */
9048 #endif /* CONFIG_PM */
9049
9050 #ifdef USE_REBOOT_NOTIFIER
9051 /* only want to do this for 2.4 kernels? */
9052 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9053                              void *p)
9054 {
9055         struct pci_dev *pdev = NULL;
9056         bool wake;
9057
9058         switch (event) {
9059         case SYS_DOWN:
9060         case SYS_HALT:
9061         case SYS_POWER_OFF:
9062                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9063                         if (pci_dev_driver(pdev) == &igb_driver) {
9064                                 __igb_shutdown(pdev, &wake, 0);
9065                                 if (event == SYS_POWER_OFF) {
9066                                         pci_wake_from_d3(pdev, wake);
9067                                         pci_set_power_state(pdev, PCI_D3hot);
9068                                 }
9069                         }
9070                 }
9071         }
9072         return NOTIFY_DONE;
9073 }
9074 #else
9075 static void igb_shutdown(struct pci_dev *pdev)
9076 {
9077         bool wake = false;
9078
9079         __igb_shutdown(pdev, &wake, 0);
9080
9081         if (system_state == SYSTEM_POWER_OFF) {
9082                 pci_wake_from_d3(pdev, wake);
9083                 pci_set_power_state(pdev, PCI_D3hot);
9084         }
9085 }
9086 #endif /* USE_REBOOT_NOTIFIER */
9087
9088 #ifdef CONFIG_NET_POLL_CONTROLLER
9089 /*
9090  * Polling 'interrupt' - used by things like netconsole to send skbs
9091  * without having to re-enable interrupts. It's not called while
9092  * the interrupt routine is executing.
9093  */
9094 static void igb_netpoll(struct net_device *netdev)
9095 {
9096         struct igb_adapter *adapter = netdev_priv(netdev);
9097         struct e1000_hw *hw = &adapter->hw;
9098         struct igb_q_vector *q_vector;
9099         int i;
9100
9101         for (i = 0; i < adapter->num_q_vectors; i++) {
9102                 q_vector = adapter->q_vector[i];
9103                 if (adapter->msix_entries)
9104                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9105                 else
9106                         igb_irq_disable(adapter);
9107                 napi_schedule(&q_vector->napi);
9108         }
9109 }
9110 #endif /* CONFIG_NET_POLL_CONTROLLER */
9111
9112 #ifdef HAVE_PCI_ERS
9113 #define E1000_DEV_ID_82576_VF 0x10CA
9114 /**
9115  * igb_io_error_detected - called when PCI error is detected
9116  * @pdev: Pointer to PCI device
9117  * @state: The current pci connection state
9118  *
9119  * This function is called after a PCI bus error affecting
9120  * this device has been detected.
9121  */
9122 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9123                                               pci_channel_state_t state)
9124 {
9125         struct net_device *netdev = pci_get_drvdata(pdev);
9126         struct igb_adapter *adapter = netdev_priv(netdev);
9127
9128 #ifdef CONFIG_PCI_IOV__UNUSED
9129         struct pci_dev *bdev, *vfdev;
9130         u32 dw0, dw1, dw2, dw3;
9131         int vf, pos;
9132         u16 req_id, pf_func;
9133
9134         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9135                 goto skip_bad_vf_detection;
9136
9137         bdev = pdev->bus->self;
9138         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9139                 bdev = bdev->bus->self;
9140
9141         if (!bdev)
9142                 goto skip_bad_vf_detection;
9143
9144         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9145         if (!pos)
9146                 goto skip_bad_vf_detection;
9147
9148         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9149         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9150         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9151         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9152
9153         req_id = dw1 >> 16;
9154         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9155         if (!(req_id & 0x0080))
9156                 goto skip_bad_vf_detection;
9157
9158         pf_func = req_id & 0x01;
9159         if ((pf_func & 1) == (pdev->devfn & 1)) {
9160
9161                 vf = (req_id & 0x7F) >> 1;
9162                 dev_err(pci_dev_to_dev(pdev),
9163                         "VF %d has caused a PCIe error\n", vf);
9164                 dev_err(pci_dev_to_dev(pdev),
9165                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9166                         "%8.8x\tdw3: %8.8x\n",
9167                         dw0, dw1, dw2, dw3);
9168
9169                 /* Find the pci device of the offending VF */
9170                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9171                                        E1000_DEV_ID_82576_VF, NULL);
9172                 while (vfdev) {
9173                         if (vfdev->devfn == (req_id & 0xFF))
9174                                 break;
9175                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9176                                                E1000_DEV_ID_82576_VF, vfdev);
9177                 }
9178                 /*
9179                  * There's a slim chance the VF could have been hot plugged,
9180                  * so if it is no longer present we don't need to issue the
9181                  * VFLR.  Just clean up the AER in that case.
9182                  */
9183                 if (vfdev) {
9184                         dev_err(pci_dev_to_dev(pdev),
9185                                 "Issuing VFLR to VF %d\n", vf);
9186                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9187                 }
9188
9189                 pci_cleanup_aer_uncorrect_error_status(pdev);
9190         }
9191
9192         /*
9193          * Even though the error may have occurred on the other port
9194          * we still need to increment the vf error reference count for
9195          * both ports because the I/O resume function will be called
9196          * for both of them.
9197          */
9198         adapter->vferr_refcount++;
9199
9200         return PCI_ERS_RESULT_RECOVERED;
9201
9202 skip_bad_vf_detection:
9203 #endif /* CONFIG_PCI_IOV */
9204
9205         netif_device_detach(netdev);
9206
9207         if (state == pci_channel_io_perm_failure)
9208                 return PCI_ERS_RESULT_DISCONNECT;
9209
9210         if (netif_running(netdev))
9211                 igb_down(adapter);
9212         pci_disable_device(pdev);
9213
9214         /* Request a slot slot reset. */
9215         return PCI_ERS_RESULT_NEED_RESET;
9216 }
9217
9218 /**
9219  * igb_io_slot_reset - called after the pci bus has been reset.
9220  * @pdev: Pointer to PCI device
9221  *
9222  * Restart the card from scratch, as if from a cold-boot. Implementation
9223  * resembles the first-half of the igb_resume routine.
9224  */
9225 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9226 {
9227         struct net_device *netdev = pci_get_drvdata(pdev);
9228         struct igb_adapter *adapter = netdev_priv(netdev);
9229         struct e1000_hw *hw = &adapter->hw;
9230         pci_ers_result_t result;
9231
9232         if (pci_enable_device_mem(pdev)) {
9233                 dev_err(pci_dev_to_dev(pdev),
9234                         "Cannot re-enable PCI device after reset.\n");
9235                 result = PCI_ERS_RESULT_DISCONNECT;
9236         } else {
9237                 pci_set_master(pdev);
9238                 pci_restore_state(pdev);
9239                 pci_save_state(pdev);
9240
9241                 pci_enable_wake(pdev, PCI_D3hot, 0);
9242                 pci_enable_wake(pdev, PCI_D3cold, 0);
9243
9244                 schedule_work(&adapter->reset_task);
9245                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9246                 result = PCI_ERS_RESULT_RECOVERED;
9247         }
9248
9249         pci_cleanup_aer_uncorrect_error_status(pdev);
9250
9251         return result;
9252 }
9253
9254 /**
9255  * igb_io_resume - called when traffic can start flowing again.
9256  * @pdev: Pointer to PCI device
9257  *
9258  * This callback is called when the error recovery driver tells us that
9259  * its OK to resume normal operation. Implementation resembles the
9260  * second-half of the igb_resume routine.
9261  */
9262 static void igb_io_resume(struct pci_dev *pdev)
9263 {
9264         struct net_device *netdev = pci_get_drvdata(pdev);
9265         struct igb_adapter *adapter = netdev_priv(netdev);
9266
9267         if (adapter->vferr_refcount) {
9268                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9269                 adapter->vferr_refcount--;
9270                 return;
9271         }
9272
9273         if (netif_running(netdev)) {
9274                 if (igb_up(adapter)) {
9275                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9276                         return;
9277                 }
9278         }
9279
9280         netif_device_attach(netdev);
9281
9282         /* let the f/w know that the h/w is now under the control of the
9283          * driver. */
9284         igb_get_hw_control(adapter);
9285 }
9286
9287 #endif /* HAVE_PCI_ERS */
9288
9289 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9290 {
9291         struct e1000_hw *hw = &adapter->hw;
9292         int i;
9293
9294         if (is_zero_ether_addr(addr))
9295                 return 0;
9296
9297         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9298                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9299                         continue;
9300                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9301                                                    IGB_MAC_STATE_IN_USE);
9302                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9303                 adapter->mac_table[i].queue = queue;
9304                 igb_sync_mac_table(adapter);
9305                 return 0;
9306         }
9307         return -ENOMEM;
9308 }
9309 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9310 {
9311         /* search table for addr, if found, set to 0 and sync */
9312         int i;
9313         struct e1000_hw *hw = &adapter->hw;
9314
9315         if (is_zero_ether_addr(addr))
9316                 return 0;
9317         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9318                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9319                     adapter->mac_table[i].queue == queue) {
9320                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9321                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9322                         adapter->mac_table[i].queue = 0;
9323                         igb_sync_mac_table(adapter);
9324                         return 0;
9325                 }
9326         }
9327         return -ENOMEM;
9328 }
9329 static int igb_set_vf_mac(struct igb_adapter *adapter,
9330                           int vf, unsigned char *mac_addr)
9331 {
9332         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9333         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9334
9335         igb_add_mac_filter(adapter, mac_addr, vf);
9336
9337         return 0;
9338 }
9339
9340 #ifdef IFLA_VF_MAX
9341 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9342 {
9343         struct igb_adapter *adapter = netdev_priv(netdev);
9344         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9345                 return -EINVAL;
9346         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9347         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9348         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9349                                       " change effective.\n");
9350         if (test_bit(__IGB_DOWN, &adapter->state)) {
9351                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9352                          " but the PF device is not up.\n");
9353                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9354                          " attempting to use the VF device.\n");
9355         }
9356         return igb_set_vf_mac(adapter, vf, mac);
9357 }
9358
9359 static int igb_link_mbps(int internal_link_speed)
9360 {
9361         switch (internal_link_speed) {
9362         case SPEED_100:
9363                 return 100;
9364         case SPEED_1000:
9365                 return 1000;
9366         case SPEED_2500:
9367                 return 2500;
9368         default:
9369                 return 0;
9370         }
9371 }
9372
9373 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9374                         int link_speed)
9375 {
9376         int rf_dec, rf_int;
9377         u32 bcnrc_val;
9378
9379         if (tx_rate != 0) {
9380                 /* Calculate the rate factor values to set */
9381                 rf_int = link_speed / tx_rate;
9382                 rf_dec = (link_speed - (rf_int * tx_rate));
9383                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9384
9385                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9386                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9387                                 E1000_RTTBCNRC_RF_INT_MASK);
9388                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9389         } else {
9390                 bcnrc_val = 0;
9391         }
9392
9393         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9394         /*
9395          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9396          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9397          */
9398         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9399         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9400 }
9401
9402 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9403 {
9404         int actual_link_speed, i;
9405         bool reset_rate = false;
9406
9407         /* VF TX rate limit was not set */
9408         if ((adapter->vf_rate_link_speed == 0) ||
9409                 (adapter->hw.mac.type != e1000_82576))
9410                 return;
9411
9412         actual_link_speed = igb_link_mbps(adapter->link_speed);
9413         if (actual_link_speed != adapter->vf_rate_link_speed) {
9414                 reset_rate = true;
9415                 adapter->vf_rate_link_speed = 0;
9416                 dev_info(&adapter->pdev->dev,
9417                 "Link speed has been changed. VF Transmit rate is disabled\n");
9418         }
9419
9420         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9421                 if (reset_rate)
9422                         adapter->vf_data[i].tx_rate = 0;
9423
9424                 igb_set_vf_rate_limit(&adapter->hw, i,
9425                         adapter->vf_data[i].tx_rate, actual_link_speed);
9426         }
9427 }
9428
9429 #ifdef HAVE_VF_MIN_MAX_TXRATE
9430 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9431                              int tx_rate)
9432 #else /* HAVE_VF_MIN_MAX_TXRATE */
9433 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9434 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9435 {
9436         struct igb_adapter *adapter = netdev_priv(netdev);
9437         struct e1000_hw *hw = &adapter->hw;
9438         int actual_link_speed;
9439
9440         if (hw->mac.type != e1000_82576)
9441                 return -EOPNOTSUPP;
9442
9443 #ifdef HAVE_VF_MIN_MAX_TXRATE
9444         if (min_tx_rate)
9445                 return -EINVAL;
9446 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9447
9448         actual_link_speed = igb_link_mbps(adapter->link_speed);
9449         if ((vf >= adapter->vfs_allocated_count) ||
9450                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9451                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9452                 return -EINVAL;
9453
9454         adapter->vf_rate_link_speed = actual_link_speed;
9455         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9456         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9457
9458         return 0;
9459 }
9460
9461 static int igb_ndo_get_vf_config(struct net_device *netdev,
9462                                  int vf, struct ifla_vf_info *ivi)
9463 {
9464         struct igb_adapter *adapter = netdev_priv(netdev);
9465         if (vf >= adapter->vfs_allocated_count)
9466                 return -EINVAL;
9467         ivi->vf = vf;
9468         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9469 #ifdef HAVE_VF_MIN_MAX_TXRATE
9470         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9471         ivi->min_tx_rate = 0;
9472 #else /* HAVE_VF_MIN_MAX_TXRATE */
9473         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9474 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9475         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9476         ivi->qos = adapter->vf_data[vf].pf_qos;
9477 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9478         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9479 #endif
9480         return 0;
9481 }
9482 #endif
9483 static void igb_vmm_control(struct igb_adapter *adapter)
9484 {
9485         struct e1000_hw *hw = &adapter->hw;
9486         int count;
9487         u32 reg;
9488
9489         switch (hw->mac.type) {
9490         case e1000_82575:
9491         default:
9492                 /* replication is not supported for 82575 */
9493                 return;
9494         case e1000_82576:
9495                 /* notify HW that the MAC is adding vlan tags */
9496                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9497                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9498                         E1000_DTXCTL_SPOOF_INT);
9499                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9500         case e1000_82580:
9501                 /* enable replication vlan tag stripping */
9502                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9503                 reg |= E1000_RPLOLR_STRVLAN;
9504                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9505         case e1000_i350:
9506         case e1000_i354:
9507                 /* none of the above registers are supported by i350 */
9508                 break;
9509         }
9510
9511         /* Enable Malicious Driver Detection */
9512         if ((adapter->vfs_allocated_count) &&
9513             (adapter->mdd)) {
9514                 if (hw->mac.type == e1000_i350)
9515                         igb_enable_mdd(adapter);
9516         }
9517
9518                 /* enable replication and loopback support */
9519                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9520                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9521                         e1000_vmdq_set_loopback_pf(hw, 1);
9522                 e1000_vmdq_set_anti_spoofing_pf(hw,
9523                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9524                         adapter->vfs_allocated_count);
9525         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9526                                       adapter->vmdq_pools);
9527 }
9528
9529 static void igb_init_fw(struct igb_adapter *adapter)
9530 {
9531         struct e1000_fw_drv_info fw_cmd;
9532         struct e1000_hw *hw = &adapter->hw;
9533         int i;
9534         u16 mask;
9535
9536         if (hw->mac.type == e1000_i210)
9537                 mask = E1000_SWFW_EEP_SM;
9538         else
9539                 mask = E1000_SWFW_PHY0_SM;
9540         /* i211 parts do not support this feature */
9541         if (hw->mac.type == e1000_i211)
9542                 hw->mac.arc_subsystem_valid = false;
9543
9544         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9545                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9546                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9547                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9548                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9549                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9550                         fw_cmd.port_num = hw->bus.func;
9551                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9552                         fw_cmd.hdr.checksum = 0;
9553                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9554                                                                    (FW_HDR_LEN +
9555                                                                     fw_cmd.hdr.buf_len));
9556                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9557                                                      sizeof(fw_cmd));
9558                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9559                                 break;
9560                 }
9561         } else
9562                 dev_warn(pci_dev_to_dev(adapter->pdev),
9563                          "Unable to get semaphore, firmware init failed.\n");
9564         hw->mac.ops.release_swfw_sync(hw, mask);
9565 }
9566
9567 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9568 {
9569         struct e1000_hw *hw = &adapter->hw;
9570         u32 dmac_thr;
9571         u16 hwm;
9572         u32 status;
9573
9574         if (hw->mac.type == e1000_i211)
9575                 return;
9576
9577         if (hw->mac.type > e1000_82580) {
9578                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9579                         u32 reg;
9580
9581                         /* force threshold to 0.  */
9582                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9583
9584                         /*
9585                          * DMA Coalescing high water mark needs to be greater
9586                          * than the Rx threshold. Set hwm to PBA - max frame
9587                          * size in 16B units, capping it at PBA - 6KB.
9588                          */
9589                         hwm = 64 * pba - adapter->max_frame_size / 16;
9590                         if (hwm < 64 * (pba - 6))
9591                                 hwm = 64 * (pba - 6);
9592                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9593                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9594                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9595                                 & E1000_FCRTC_RTH_COAL_MASK);
9596                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9597
9598                         /*
9599                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9600                          * frame size, capping it at PBA - 10KB.
9601                          */
9602                         dmac_thr = pba - adapter->max_frame_size / 512;
9603                         if (dmac_thr < pba - 10)
9604                                 dmac_thr = pba - 10;
9605                         reg = E1000_READ_REG(hw, E1000_DMACR);
9606                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9607                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9608                                 & E1000_DMACR_DMACTHR_MASK);
9609
9610                         /* transition to L0x or L1 if available..*/
9611                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9612
9613                         /* Check if status is 2.5Gb backplane connection
9614                          * before configuration of watchdog timer, which is
9615                          * in msec values in 12.8usec intervals
9616                          * watchdog timer= msec values in 32usec intervals
9617                          * for non 2.5Gb connection
9618                          */
9619                         if (hw->mac.type == e1000_i354) {
9620                                 status = E1000_READ_REG(hw, E1000_STATUS);
9621                                 if ((status & E1000_STATUS_2P5_SKU) &&
9622                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9623                                         reg |= ((adapter->dmac * 5) >> 6);
9624                                 else
9625                                         reg |= ((adapter->dmac) >> 5);
9626                         } else {
9627                                 reg |= ((adapter->dmac) >> 5);
9628                         }
9629
9630                         /*
9631                          * Disable BMC-to-OS Watchdog enable
9632                          * on devices that support OS-to-BMC
9633                          */
9634                         if (hw->mac.type != e1000_i354)
9635                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9636                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9637
9638                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9639                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9640
9641                         /* This sets the time to wait before requesting
9642                          * transition to low power state to number of usecs
9643                          * needed to receive 1 512 byte frame at gigabit
9644                          * line rate. On i350 device, time to make transition
9645                          * to Lx state is delayed by 4 usec with flush disable
9646                          * bit set to avoid losing mailbox interrupts
9647                          */
9648                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9649                         if (hw->mac.type == e1000_i350)
9650                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9651
9652                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9653                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9654                          */
9655                         if (hw->mac.type == e1000_i354) {
9656                                 status = E1000_READ_REG(hw, E1000_STATUS);
9657                                 if ((status & E1000_STATUS_2P5_SKU) &&
9658                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9659                                         reg |= 0xA;
9660                                 else
9661                                         reg |= 0x4;
9662                         } else {
9663                                 reg |= 0x4;
9664                         }
9665                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9666
9667                         /* free space in tx packet buffer to wake from DMA coal */
9668                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9669                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9670
9671                         /* make low power state decision controlled by DMA coal */
9672                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9673                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9674                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9675                 } /* endif adapter->dmac is not disabled */
9676         } else if (hw->mac.type == e1000_82580) {
9677                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9678                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9679                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9680                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9681         }
9682 }
9683
9684 #ifdef HAVE_I2C_SUPPORT
9685 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9686  *  @hw: pointer to hardware structure
9687  *  @byte_offset: byte offset to read
9688  *  @dev_addr: device address
9689  *  @data: value read
9690  *
9691  *  Performs byte read operation over I2C interface at
9692  *  a specified device address.
9693  */
9694 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9695                                 u8 dev_addr, u8 *data)
9696 {
9697         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9698         struct i2c_client *this_client = adapter->i2c_client;
9699         s32 status;
9700         u16 swfw_mask = 0;
9701
9702         if (!this_client)
9703                 return E1000_ERR_I2C;
9704
9705         swfw_mask = E1000_SWFW_PHY0_SM;
9706
9707         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9708             != E1000_SUCCESS)
9709                 return E1000_ERR_SWFW_SYNC;
9710
9711         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9712         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9713
9714         if (status < 0)
9715                 return E1000_ERR_I2C;
9716         else {
9717                 *data = status;
9718                 return E1000_SUCCESS;
9719         }
9720 }
9721
9722 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9723  *  @hw: pointer to hardware structure
9724  *  @byte_offset: byte offset to write
9725  *  @dev_addr: device address
9726  *  @data: value to write
9727  *
9728  *  Performs byte write operation over I2C interface at
9729  *  a specified device address.
9730  */
9731 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9732                                  u8 dev_addr, u8 data)
9733 {
9734         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9735         struct i2c_client *this_client = adapter->i2c_client;
9736         s32 status;
9737         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9738
9739         if (!this_client)
9740                 return E1000_ERR_I2C;
9741
9742         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9743                 return E1000_ERR_SWFW_SYNC;
9744         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9745         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9746
9747         if (status)
9748                 return E1000_ERR_I2C;
9749         else
9750                 return E1000_SUCCESS;
9751 }
9752 #endif /*  HAVE_I2C_SUPPORT */
9753 /* igb_main.c */
9754
9755
9756 /**
9757  * igb_probe - Device Initialization Routine
9758  * @pdev: PCI device information struct
9759  * @ent: entry in igb_pci_tbl
9760  *
9761  * Returns 0 on success, negative on failure
9762  *
9763  * igb_probe initializes an adapter identified by a pci_dev structure.
9764  * The OS initialization, configuring of the adapter private structure,
9765  * and a hardware reset occur.
9766  **/
9767 int igb_kni_probe(struct pci_dev *pdev,
9768                                struct net_device **lad_dev)
9769 {
9770         struct net_device *netdev;
9771         struct igb_adapter *adapter;
9772         struct e1000_hw *hw;
9773         u16 eeprom_data = 0;
9774         u8 pba_str[E1000_PBANUM_LENGTH];
9775         s32 ret_val;
9776         static int global_quad_port_a; /* global quad port a indication */
9777         int i, err, pci_using_dac = 0;
9778         static int cards_found;
9779
9780         err = pci_enable_device_mem(pdev);
9781         if (err)
9782                 return err;
9783
9784 #ifdef NO_KNI
9785         pci_using_dac = 0;
9786         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9787         if (!err) {
9788                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9789                 if (!err)
9790                         pci_using_dac = 1;
9791         } else {
9792                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9793                 if (err) {
9794                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9795                         if (err) {
9796                                 IGB_ERR("No usable DMA configuration, "
9797                                         "aborting\n");
9798                                 goto err_dma;
9799                         }
9800                 }
9801         }
9802
9803 #ifndef HAVE_ASPM_QUIRKS
9804         /* 82575 requires that the pci-e link partner disable the L0s state */
9805         switch (pdev->device) {
9806         case E1000_DEV_ID_82575EB_COPPER:
9807         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9808         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9809                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9810         default:
9811                 break;
9812         }
9813
9814 #endif /* HAVE_ASPM_QUIRKS */
9815         err = pci_request_selected_regions(pdev,
9816                                            pci_select_bars(pdev,
9817                                                            IORESOURCE_MEM),
9818                                            igb_driver_name);
9819         if (err)
9820                 goto err_pci_reg;
9821
9822         pci_enable_pcie_error_reporting(pdev);
9823
9824         pci_set_master(pdev);
9825
9826         err = -ENOMEM;
9827 #endif /* NO_KNI */
9828 #ifdef HAVE_TX_MQ
9829         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9830                                    IGB_MAX_TX_QUEUES);
9831 #else
9832         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9833 #endif /* HAVE_TX_MQ */
9834         if (!netdev)
9835                 goto err_alloc_etherdev;
9836
9837         SET_MODULE_OWNER(netdev);
9838         SET_NETDEV_DEV(netdev, &pdev->dev);
9839
9840         //pci_set_drvdata(pdev, netdev);
9841         adapter = netdev_priv(netdev);
9842         adapter->netdev = netdev;
9843         adapter->pdev = pdev;
9844         hw = &adapter->hw;
9845         hw->back = adapter;
9846         adapter->port_num = hw->bus.func;
9847         adapter->msg_enable = (1 << debug) - 1;
9848
9849 #ifdef HAVE_PCI_ERS
9850         err = pci_save_state(pdev);
9851         if (err)
9852                 goto err_ioremap;
9853 #endif
9854         err = -EIO;
9855         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9856                               pci_resource_len(pdev, 0));
9857         if (!hw->hw_addr)
9858                 goto err_ioremap;
9859
9860 #ifdef HAVE_NET_DEVICE_OPS
9861         netdev->netdev_ops = &igb_netdev_ops;
9862 #else /* HAVE_NET_DEVICE_OPS */
9863         netdev->open = &igb_open;
9864         netdev->stop = &igb_close;
9865         netdev->get_stats = &igb_get_stats;
9866 #ifdef HAVE_SET_RX_MODE
9867         netdev->set_rx_mode = &igb_set_rx_mode;
9868 #endif
9869         netdev->set_multicast_list = &igb_set_rx_mode;
9870         netdev->set_mac_address = &igb_set_mac;
9871         netdev->change_mtu = &igb_change_mtu;
9872         netdev->do_ioctl = &igb_ioctl;
9873 #ifdef HAVE_TX_TIMEOUT
9874         netdev->tx_timeout = &igb_tx_timeout;
9875 #endif
9876         netdev->vlan_rx_register = igb_vlan_mode;
9877         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9878         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9879 #ifdef CONFIG_NET_POLL_CONTROLLER
9880         netdev->poll_controller = igb_netpoll;
9881 #endif
9882         netdev->hard_start_xmit = &igb_xmit_frame;
9883 #endif /* HAVE_NET_DEVICE_OPS */
9884         igb_set_ethtool_ops(netdev);
9885 #ifdef HAVE_TX_TIMEOUT
9886         netdev->watchdog_timeo = 5 * HZ;
9887 #endif
9888
9889         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9890
9891         adapter->bd_number = cards_found;
9892
9893         /* setup the private structure */
9894         err = igb_sw_init(adapter);
9895         if (err)
9896                 goto err_sw_init;
9897
9898         e1000_get_bus_info(hw);
9899
9900         hw->phy.autoneg_wait_to_complete = FALSE;
9901         hw->mac.adaptive_ifs = FALSE;
9902
9903         /* Copper options */
9904         if (hw->phy.media_type == e1000_media_type_copper) {
9905                 hw->phy.mdix = AUTO_ALL_MODES;
9906                 hw->phy.disable_polarity_correction = FALSE;
9907                 hw->phy.ms_type = e1000_ms_hw_default;
9908         }
9909
9910         if (e1000_check_reset_block(hw))
9911                 dev_info(pci_dev_to_dev(pdev),
9912                         "PHY reset is blocked due to SOL/IDER session.\n");
9913
9914         /*
9915          * features is initialized to 0 in allocation, it might have bits
9916          * set by igb_sw_init so we should use an or instead of an
9917          * assignment.
9918          */
9919         netdev->features |= NETIF_F_SG |
9920                             NETIF_F_IP_CSUM |
9921 #ifdef NETIF_F_IPV6_CSUM
9922                             NETIF_F_IPV6_CSUM |
9923 #endif
9924 #ifdef NETIF_F_TSO
9925                             NETIF_F_TSO |
9926 #ifdef NETIF_F_TSO6
9927                             NETIF_F_TSO6 |
9928 #endif
9929 #endif /* NETIF_F_TSO */
9930 #ifdef NETIF_F_RXHASH
9931                             NETIF_F_RXHASH |
9932 #endif
9933                             NETIF_F_RXCSUM |
9934 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9935                             NETIF_F_HW_VLAN_CTAG_RX |
9936                             NETIF_F_HW_VLAN_CTAG_TX;
9937 #else
9938                             NETIF_F_HW_VLAN_RX |
9939                             NETIF_F_HW_VLAN_TX;
9940 #endif
9941
9942         if (hw->mac.type >= e1000_82576)
9943                 netdev->features |= NETIF_F_SCTP_CSUM;
9944
9945 #ifdef HAVE_NDO_SET_FEATURES
9946         /* copy netdev features into list of user selectable features */
9947         netdev->hw_features |= netdev->features;
9948 #ifndef IGB_NO_LRO
9949
9950         /* give us the option of enabling LRO later */
9951         netdev->hw_features |= NETIF_F_LRO;
9952 #endif
9953 #else
9954 #ifdef NETIF_F_GRO
9955
9956         /* this is only needed on kernels prior to 2.6.39 */
9957         netdev->features |= NETIF_F_GRO;
9958 #endif
9959 #endif
9960
9961         /* set this bit last since it cannot be part of hw_features */
9962 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9963         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9964 #else
9965         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9966 #endif
9967
9968 #ifdef HAVE_NETDEV_VLAN_FEATURES
9969         netdev->vlan_features |= NETIF_F_TSO |
9970                                  NETIF_F_TSO6 |
9971                                  NETIF_F_IP_CSUM |
9972                                  NETIF_F_IPV6_CSUM |
9973                                  NETIF_F_SG;
9974
9975 #endif
9976         if (pci_using_dac)
9977                 netdev->features |= NETIF_F_HIGHDMA;
9978
9979 #ifdef NO_KNI
9980         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9981 #ifdef DEBUG
9982         if (adapter->dmac != IGB_DMAC_DISABLE)
9983                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9984 #endif
9985
9986         /* before reading the NVM, reset the controller to put the device in a
9987          * known good starting state */
9988         e1000_reset_hw(hw);
9989 #endif /* NO_KNI */
9990
9991         /* make sure the NVM is good */
9992         if (e1000_validate_nvm_checksum(hw) < 0) {
9993                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9994                         " Valid\n");
9995                 err = -EIO;
9996                 goto err_eeprom;
9997         }
9998
9999         /* copy the MAC address out of the NVM */
10000         if (e1000_read_mac_addr(hw))
10001                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10002         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10003 #ifdef ETHTOOL_GPERMADDR
10004         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10005
10006         if (!is_valid_ether_addr(netdev->perm_addr)) {
10007 #else
10008         if (!is_valid_ether_addr(netdev->dev_addr)) {
10009 #endif
10010                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10011                 err = -EIO;
10012                 goto err_eeprom;
10013         }
10014
10015         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10016         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10017         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10018         igb_rar_set(adapter, 0);
10019
10020         /* get firmware version for ethtool -i */
10021         igb_set_fw_version(adapter);
10022
10023         /* Check if Media Autosense is enabled */
10024         if (hw->mac.type == e1000_82580)
10025                 igb_init_mas(adapter);
10026
10027 #ifdef NO_KNI
10028         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10029                     (unsigned long) adapter);
10030         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10031                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10032                             (unsigned long) adapter);
10033         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10034                     (unsigned long) adapter);
10035
10036         INIT_WORK(&adapter->reset_task, igb_reset_task);
10037         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10038         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10039                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10040 #endif
10041
10042         /* Initialize link properties that are user-changeable */
10043         adapter->fc_autoneg = true;
10044         hw->mac.autoneg = true;
10045         hw->phy.autoneg_advertised = 0x2f;
10046
10047         hw->fc.requested_mode = e1000_fc_default;
10048         hw->fc.current_mode = e1000_fc_default;
10049
10050         e1000_validate_mdi_setting(hw);
10051
10052         /* By default, support wake on port A */
10053         if (hw->bus.func == 0)
10054                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10055
10056         /* Check the NVM for wake support for non-port A ports */
10057         if (hw->mac.type >= e1000_82580)
10058                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10059                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10060                                  &eeprom_data);
10061         else if (hw->bus.func == 1)
10062                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10063
10064         if (eeprom_data & IGB_EEPROM_APME)
10065                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10066
10067         /* now that we have the eeprom settings, apply the special cases where
10068          * the eeprom may be wrong or the board simply won't support wake on
10069          * lan on a particular port */
10070         switch (pdev->device) {
10071         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10072                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10073                 break;
10074         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10075         case E1000_DEV_ID_82576_FIBER:
10076         case E1000_DEV_ID_82576_SERDES:
10077                 /* Wake events only supported on port A for dual fiber
10078                  * regardless of eeprom setting */
10079                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10080                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10081                 break;
10082         case E1000_DEV_ID_82576_QUAD_COPPER:
10083         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10084                 /* if quad port adapter, disable WoL on all but port A */
10085                 if (global_quad_port_a != 0)
10086                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10087                 else
10088                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10089                 /* Reset for multiple quad port adapters */
10090                 if (++global_quad_port_a == 4)
10091                         global_quad_port_a = 0;
10092                 break;
10093         default:
10094                 /* If the device can't wake, don't set software support */
10095                 if (!device_can_wakeup(&adapter->pdev->dev))
10096                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10097                 break;
10098         }
10099
10100         /* initialize the wol settings based on the eeprom settings */
10101         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10102                 adapter->wol |= E1000_WUFC_MAG;
10103
10104         /* Some vendors want WoL disabled by default, but still supported */
10105         if ((hw->mac.type == e1000_i350) &&
10106             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10107                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10108                 adapter->wol = 0;
10109         }
10110
10111 #ifdef NO_KNI
10112         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10113                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10114
10115         /* reset the hardware with the new settings */
10116         igb_reset(adapter);
10117         adapter->devrc = 0;
10118
10119 #ifdef HAVE_I2C_SUPPORT
10120         /* Init the I2C interface */
10121         err = igb_init_i2c(adapter);
10122         if (err) {
10123                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10124                 goto err_eeprom;
10125         }
10126 #endif /* HAVE_I2C_SUPPORT */
10127
10128         /* let the f/w know that the h/w is now under the control of the
10129          * driver. */
10130         igb_get_hw_control(adapter);
10131
10132         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10133         err = register_netdev(netdev);
10134         if (err)
10135                 goto err_register;
10136
10137 #ifdef CONFIG_IGB_VMDQ_NETDEV
10138         err = igb_init_vmdq_netdevs(adapter);
10139         if (err)
10140                 goto err_register;
10141 #endif
10142         /* carrier off reporting is important to ethtool even BEFORE open */
10143         netif_carrier_off(netdev);
10144
10145 #ifdef IGB_DCA
10146         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10147                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10148                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10149                 igb_setup_dca(adapter);
10150         }
10151
10152 #endif
10153 #ifdef HAVE_PTP_1588_CLOCK
10154         /* do hw tstamp init after resetting */
10155         igb_ptp_init(adapter);
10156 #endif /* HAVE_PTP_1588_CLOCK */
10157
10158 #endif /* NO_KNI */
10159         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10160         /* print bus type/speed/width info */
10161         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10162                  netdev->name,
10163                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10164                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10165                   (hw->mac.type == e1000_i354) ? "integrated" :
10166                                                             "unknown"),
10167                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10168                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10169                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10170                   (hw->mac.type == e1000_i354) ? "integrated" :
10171                    "unknown"));
10172         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10173         for (i = 0; i < 6; i++)
10174                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10175
10176         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10177         if (ret_val)
10178                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10179         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10180                  pba_str);
10181
10182
10183         /* Initialize the thermal sensor on i350 devices. */
10184         if (hw->mac.type == e1000_i350) {
10185                 if (hw->bus.func == 0) {
10186                         u16 ets_word;
10187
10188                         /*
10189                          * Read the NVM to determine if this i350 device
10190                          * supports an external thermal sensor.
10191                          */
10192                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10193                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10194                                 adapter->ets = true;
10195                         else
10196                                 adapter->ets = false;
10197                 }
10198 #ifdef NO_KNI
10199 #ifdef IGB_HWMON
10200
10201                 igb_sysfs_init(adapter);
10202 #else
10203 #ifdef IGB_PROCFS
10204
10205                 igb_procfs_init(adapter);
10206 #endif /* IGB_PROCFS */
10207 #endif /* IGB_HWMON */
10208 #endif /* NO_KNI */
10209         } else {
10210                 adapter->ets = false;
10211         }
10212
10213         if (hw->phy.media_type == e1000_media_type_copper) {
10214                 switch (hw->mac.type) {
10215                 case e1000_i350:
10216                 case e1000_i210:
10217                 case e1000_i211:
10218                         /* Enable EEE for internal copper PHY devices */
10219                         err = e1000_set_eee_i350(hw);
10220                         if ((!err) &&
10221                             (adapter->flags & IGB_FLAG_EEE))
10222                                 adapter->eee_advert =
10223                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10224                         break;
10225                 case e1000_i354:
10226                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10227                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10228                                 err = e1000_set_eee_i354(hw);
10229                                 if ((!err) &&
10230                                     (adapter->flags & IGB_FLAG_EEE))
10231                                         adapter->eee_advert =
10232                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10233                         }
10234                         break;
10235                 default:
10236                         break;
10237                 }
10238         }
10239
10240         /* send driver version info to firmware */
10241         if (hw->mac.type >= e1000_i350)
10242                 igb_init_fw(adapter);
10243
10244 #ifndef IGB_NO_LRO
10245         if (netdev->features & NETIF_F_LRO)
10246                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10247         else
10248                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10249 #endif
10250         dev_info(pci_dev_to_dev(pdev),
10251                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10252                  adapter->msix_entries ? "MSI-X" :
10253                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10254                  adapter->num_rx_queues, adapter->num_tx_queues);
10255
10256         cards_found++;
10257         *lad_dev = netdev;
10258
10259         pm_runtime_put_noidle(&pdev->dev);
10260         return 0;
10261
10262 //err_register:
10263 //      igb_release_hw_control(adapter);
10264 #ifdef HAVE_I2C_SUPPORT
10265         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10266 #endif /* HAVE_I2C_SUPPORT */
10267 err_eeprom:
10268 //      if (!e1000_check_reset_block(hw))
10269 //              e1000_phy_hw_reset(hw);
10270
10271         if (hw->flash_address)
10272                 iounmap(hw->flash_address);
10273 err_sw_init:
10274 //      igb_clear_interrupt_scheme(adapter);
10275 //      igb_reset_sriov_capability(adapter);
10276         iounmap(hw->hw_addr);
10277 err_ioremap:
10278         free_netdev(netdev);
10279 err_alloc_etherdev:
10280 //      pci_release_selected_regions(pdev,
10281 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10282 //err_pci_reg:
10283 //err_dma:
10284         pci_disable_device(pdev);
10285         return err;
10286 }
10287
10288
10289 void igb_kni_remove(struct pci_dev *pdev)
10290 {
10291         pci_disable_device(pdev);
10292 }