1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation.
6 * Inspired from FreeBSD src/sys/i386/include/atomic.h
7 * Copyright (c) 1998 Doug Rabson
11 #ifndef _RTE_ATOMIC_X86_H_
12 #error do not include this file directly, use <rte_atomic.h> instead
15 #ifndef _RTE_ATOMIC_I686_H_
16 #define _RTE_ATOMIC_I686_H_
19 #include <rte_common.h>
20 #include <rte_atomic.h>
22 /*------------------------- 64 bit atomic operations -------------------------*/
24 #ifndef RTE_FORCE_INTRINSICS
26 rte_atomic64_cmpset(volatile uint64_t *dst, uint64_t exp, uint64_t src)
46 : [res] "=a" (res) /* result in eax */
47 : [dst] "S" (dst), /* esi */
48 "b" (_src.l32), /* ebx */
49 "c" (_src.h32), /* ecx */
50 "a" (_exp.l32), /* eax */
51 "d" (_exp.h32) /* edx */
52 : "memory" ); /* no-clobber list */
55 "xchgl %%ebx, %%edi;\n"
59 "xchgl %%ebx, %%edi;\n"
60 : [res] "=a" (res) /* result in eax */
61 : [dst] "S" (dst), /* esi */
62 "D" (_src.l32), /* ebx */
63 "c" (_src.h32), /* ecx */
64 "a" (_exp.l32), /* eax */
65 "d" (_exp.h32) /* edx */
66 : "memory" ); /* no-clobber list */
72 static inline uint64_t
73 rte_atomic64_exchange(volatile uint64_t *dest, uint64_t val)
79 } while (rte_atomic64_cmpset(dest, old, val) == 0);
85 rte_atomic64_init(rte_atomic64_t *v)
90 while (success == 0) {
92 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
98 rte_atomic64_read(rte_atomic64_t *v)
103 while (success == 0) {
105 /* replace the value by itself */
106 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
113 rte_atomic64_set(rte_atomic64_t *v, int64_t new_value)
118 while (success == 0) {
120 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
126 rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
131 while (success == 0) {
133 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
139 rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
144 while (success == 0) {
146 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
152 rte_atomic64_inc(rte_atomic64_t *v)
154 rte_atomic64_add(v, 1);
158 rte_atomic64_dec(rte_atomic64_t *v)
160 rte_atomic64_sub(v, 1);
163 static inline int64_t
164 rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
169 while (success == 0) {
171 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
178 static inline int64_t
179 rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
184 while (success == 0) {
186 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
193 static inline int rte_atomic64_inc_and_test(rte_atomic64_t *v)
195 return rte_atomic64_add_return(v, 1) == 0;
198 static inline int rte_atomic64_dec_and_test(rte_atomic64_t *v)
200 return rte_atomic64_sub_return(v, 1) == 0;
203 static inline int rte_atomic64_test_and_set(rte_atomic64_t *v)
205 return rte_atomic64_cmpset((volatile uint64_t *)&v->cnt, 0, 1);
208 static inline void rte_atomic64_clear(rte_atomic64_t *v)
210 rte_atomic64_set(v, 0);
214 #endif /* _RTE_ATOMIC_I686_H_ */