eal: add experimental tags for write combining store
[dpdk.git] / lib / librte_eal / x86 / include / rte_vect.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation
3  */
4
5 #ifndef _RTE_VECT_X86_H_
6 #define _RTE_VECT_X86_H_
7
8 /**
9  * @file
10  *
11  * RTE SSE/AVX related header.
12  */
13
14 #include <stdint.h>
15 #include <rte_config.h>
16 #include <rte_common.h>
17 #include "generic/rte_vect.h"
18
19 #if (defined(__ICC) || \
20         (defined(_WIN64)) || \
21         (__GNUC__ == 4 &&  __GNUC_MINOR__ < 4))
22
23 #include <smmintrin.h> /* SSE4 */
24
25 #if defined(__AVX__)
26 #include <immintrin.h>
27 #endif
28
29 #else
30
31 #include <x86intrin.h>
32
33 #endif
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 typedef __m128i xmm_t;
40
41 #define XMM_SIZE        (sizeof(xmm_t))
42 #define XMM_MASK        (XMM_SIZE - 1)
43
44 typedef union rte_xmm {
45         xmm_t    x;
46         uint8_t  u8[XMM_SIZE / sizeof(uint8_t)];
47         uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
48         uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
49         uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
50         double   pd[XMM_SIZE / sizeof(double)];
51 } rte_xmm_t;
52
53 #ifdef __AVX__
54
55 typedef __m256i ymm_t;
56
57 #define YMM_SIZE        (sizeof(ymm_t))
58 #define YMM_MASK        (YMM_SIZE - 1)
59
60 typedef union rte_ymm {
61         ymm_t    y;
62         xmm_t    x[YMM_SIZE / sizeof(xmm_t)];
63         uint8_t  u8[YMM_SIZE / sizeof(uint8_t)];
64         uint16_t u16[YMM_SIZE / sizeof(uint16_t)];
65         uint32_t u32[YMM_SIZE / sizeof(uint32_t)];
66         uint64_t u64[YMM_SIZE / sizeof(uint64_t)];
67         double   pd[YMM_SIZE / sizeof(double)];
68 } rte_ymm_t;
69
70 #endif /* __AVX__ */
71
72 #ifdef RTE_ARCH_I686
73 #define _mm_cvtsi128_si64(a)    \
74 __extension__ ({                \
75         rte_xmm_t m;            \
76         m.x = (a);              \
77         (m.u64[0]);             \
78 })
79 #endif
80
81 /*
82  * Prior to version 12.1 icc doesn't support _mm_set_epi64x.
83  */
84 #if (defined(__ICC) && __ICC < 1210)
85 #define _mm_set_epi64x(a, b)     \
86 __extension__ ({                 \
87         rte_xmm_t m;             \
88         m.u64[0] = b;            \
89         m.u64[1] = a;            \
90         (m.x);                   \
91 })
92 #endif /* (defined(__ICC) && __ICC < 1210) */
93
94 #ifdef __AVX512F__
95
96 #define RTE_X86_ZMM_SIZE        (sizeof(__m512i))
97 #define RTE_X86_ZMM_MASK        (RTE_X86_ZMM_SIZE - 1)
98
99 typedef union __rte_x86_zmm {
100         __m512i  z;
101         ymm_t    y[RTE_X86_ZMM_SIZE / sizeof(ymm_t)];
102         xmm_t    x[RTE_X86_ZMM_SIZE / sizeof(xmm_t)];
103         uint8_t  u8[RTE_X86_ZMM_SIZE / sizeof(uint8_t)];
104         uint16_t u16[RTE_X86_ZMM_SIZE / sizeof(uint16_t)];
105         uint32_t u32[RTE_X86_ZMM_SIZE / sizeof(uint32_t)];
106         uint64_t u64[RTE_X86_ZMM_SIZE / sizeof(uint64_t)];
107         double   pd[RTE_X86_ZMM_SIZE / sizeof(double)];
108 } __rte_aligned(RTE_X86_ZMM_SIZE) __rte_x86_zmm_t;
109
110 #endif /* __AVX512F__ */
111
112 #ifdef __cplusplus
113 }
114 #endif
115
116 #endif /* _RTE_VECT_X86_H_ */