1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint16_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
130 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
131 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
168 #undef RTE_TX_OFFLOAD_BIT2STR
171 * The user application callback description.
173 * It contains callback address to be registered by user application,
174 * the pointer to the parameters for callback, and the event type.
176 struct rte_eth_dev_callback {
177 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
178 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
179 void *cb_arg; /**< Parameter for callback */
180 void *ret_param; /**< Return parameter */
181 enum rte_eth_event_type event; /**< Interrupt event type */
182 uint32_t active; /**< Callback is executing */
191 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
194 struct rte_devargs devargs = {.args = NULL};
195 const char *bus_param_key;
196 char *bus_str = NULL;
197 char *cls_str = NULL;
200 memset(iter, 0, sizeof(*iter));
203 * The devargs string may use various syntaxes:
204 * - 0000:08:00.0,representor=[1-3]
205 * - pci:0000:06:00.0,representor=[0,5]
206 * - class=eth,mac=00:11:22:33:44:55
207 * A new syntax is in development (not yet supported):
208 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
212 * Handle pure class filter (i.e. without any bus-level argument),
213 * from future new syntax.
214 * rte_devargs_parse() is not yet supporting the new syntax,
215 * that's why this simple case is temporarily parsed here.
217 #define iter_anybus_str "class=eth,"
218 if (strncmp(devargs_str, iter_anybus_str,
219 strlen(iter_anybus_str)) == 0) {
220 iter->cls_str = devargs_str + strlen(iter_anybus_str);
224 /* Split bus, device and parameters. */
225 ret = rte_devargs_parse(&devargs, devargs_str);
230 * Assume parameters of old syntax can match only at ethdev level.
231 * Extra parameters will be ignored, thanks to "+" prefix.
233 str_size = strlen(devargs.args) + 2;
234 cls_str = malloc(str_size);
235 if (cls_str == NULL) {
239 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
240 if (ret != str_size - 1) {
244 iter->cls_str = cls_str;
245 free(devargs.args); /* allocated by rte_devargs_parse() */
248 iter->bus = devargs.bus;
249 if (iter->bus->dev_iterate == NULL) {
254 /* Convert bus args to new syntax for use with new API dev_iterate. */
255 if (strcmp(iter->bus->name, "vdev") == 0) {
256 bus_param_key = "name";
257 } else if (strcmp(iter->bus->name, "pci") == 0) {
258 bus_param_key = "addr";
263 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
264 bus_str = malloc(str_size);
265 if (bus_str == NULL) {
269 ret = snprintf(bus_str, str_size, "%s=%s",
270 bus_param_key, devargs.name);
271 if (ret != str_size - 1) {
275 iter->bus_str = bus_str;
278 iter->cls = rte_class_find_by_name("eth");
283 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
292 rte_eth_iterator_next(struct rte_dev_iterator *iter)
294 if (iter->cls == NULL) /* invalid ethdev iterator */
295 return RTE_MAX_ETHPORTS;
297 do { /* loop to try all matching rte_device */
298 /* If not pure ethdev filter and */
299 if (iter->bus != NULL &&
300 /* not in middle of rte_eth_dev iteration, */
301 iter->class_device == NULL) {
302 /* get next rte_device to try. */
303 iter->device = iter->bus->dev_iterate(
304 iter->device, iter->bus_str, iter);
305 if (iter->device == NULL)
306 break; /* no more rte_device candidate */
308 /* A device is matching bus part, need to check ethdev part. */
309 iter->class_device = iter->cls->dev_iterate(
310 iter->class_device, iter->cls_str, iter);
311 if (iter->class_device != NULL)
312 return eth_dev_to_id(iter->class_device); /* match */
313 } while (iter->bus != NULL); /* need to try next rte_device */
315 /* No more ethdev port to iterate. */
316 rte_eth_iterator_cleanup(iter);
317 return RTE_MAX_ETHPORTS;
321 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
323 if (iter->bus_str == NULL)
324 return; /* nothing to free in pure class filter */
325 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
326 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
327 memset(iter, 0, sizeof(*iter));
331 rte_eth_find_next(uint16_t port_id)
333 while (port_id < RTE_MAX_ETHPORTS &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
335 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
338 if (port_id >= RTE_MAX_ETHPORTS)
339 return RTE_MAX_ETHPORTS;
345 rte_eth_dev_shared_data_prepare(void)
347 const unsigned flags = 0;
348 const struct rte_memzone *mz;
350 rte_spinlock_lock(&rte_eth_shared_data_lock);
352 if (rte_eth_dev_shared_data == NULL) {
353 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
354 /* Allocate port data and ownership shared memory. */
355 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
356 sizeof(*rte_eth_dev_shared_data),
357 rte_socket_id(), flags);
359 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
361 rte_panic("Cannot allocate ethdev shared data\n");
363 rte_eth_dev_shared_data = mz->addr;
364 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
365 rte_eth_dev_shared_data->next_owner_id =
366 RTE_ETH_DEV_NO_OWNER + 1;
367 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
368 memset(rte_eth_dev_shared_data->data, 0,
369 sizeof(rte_eth_dev_shared_data->data));
373 rte_spinlock_unlock(&rte_eth_shared_data_lock);
377 is_allocated(const struct rte_eth_dev *ethdev)
379 return ethdev->data->name[0] != '\0';
382 static struct rte_eth_dev *
383 _rte_eth_dev_allocated(const char *name)
387 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
388 if (rte_eth_devices[i].data != NULL &&
389 strcmp(rte_eth_devices[i].data->name, name) == 0)
390 return &rte_eth_devices[i];
396 rte_eth_dev_allocated(const char *name)
398 struct rte_eth_dev *ethdev;
400 rte_eth_dev_shared_data_prepare();
402 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
404 ethdev = _rte_eth_dev_allocated(name);
406 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
412 rte_eth_dev_find_free_port(void)
416 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
417 /* Using shared name field to find a free port. */
418 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
419 RTE_ASSERT(rte_eth_devices[i].state ==
424 return RTE_MAX_ETHPORTS;
427 static struct rte_eth_dev *
428 eth_dev_get(uint16_t port_id)
430 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
432 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
434 eth_dev_last_created_port = port_id;
440 rte_eth_dev_allocate(const char *name)
443 struct rte_eth_dev *eth_dev = NULL;
445 rte_eth_dev_shared_data_prepare();
447 /* Synchronize port creation between primary and secondary threads. */
448 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
450 if (_rte_eth_dev_allocated(name) != NULL) {
452 "Ethernet device with name %s already allocated\n",
457 port_id = rte_eth_dev_find_free_port();
458 if (port_id == RTE_MAX_ETHPORTS) {
460 "Reached maximum number of Ethernet ports\n");
464 eth_dev = eth_dev_get(port_id);
465 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
466 eth_dev->data->port_id = port_id;
467 eth_dev->data->mtu = ETHER_MTU;
470 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
476 * Attach to a port already registered by the primary process, which
477 * makes sure that the same device would have the same port id both
478 * in the primary and secondary process.
481 rte_eth_dev_attach_secondary(const char *name)
484 struct rte_eth_dev *eth_dev = NULL;
486 rte_eth_dev_shared_data_prepare();
488 /* Synchronize port attachment to primary port creation and release. */
489 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
491 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
492 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
495 if (i == RTE_MAX_ETHPORTS) {
497 "Device %s is not driven by the primary process\n",
500 eth_dev = eth_dev_get(i);
501 RTE_ASSERT(eth_dev->data->port_id == i);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
509 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
514 rte_eth_dev_shared_data_prepare();
516 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
517 _rte_eth_dev_callback_process(eth_dev,
518 RTE_ETH_EVENT_DESTROY, NULL);
520 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
522 eth_dev->state = RTE_ETH_DEV_UNUSED;
524 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
525 rte_free(eth_dev->data->rx_queues);
526 rte_free(eth_dev->data->tx_queues);
527 rte_free(eth_dev->data->mac_addrs);
528 rte_free(eth_dev->data->hash_mac_addrs);
529 rte_free(eth_dev->data->dev_private);
530 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
533 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
539 rte_eth_dev_is_valid_port(uint16_t port_id)
541 if (port_id >= RTE_MAX_ETHPORTS ||
542 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
549 rte_eth_is_valid_owner_id(uint64_t owner_id)
551 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
552 rte_eth_dev_shared_data->next_owner_id <= owner_id)
558 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
560 while (port_id < RTE_MAX_ETHPORTS &&
561 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
562 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
563 rte_eth_devices[port_id].data->owner.id != owner_id))
566 if (port_id >= RTE_MAX_ETHPORTS)
567 return RTE_MAX_ETHPORTS;
572 int __rte_experimental
573 rte_eth_dev_owner_new(uint64_t *owner_id)
575 rte_eth_dev_shared_data_prepare();
577 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
579 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
581 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
586 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
587 const struct rte_eth_dev_owner *new_owner)
589 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
590 struct rte_eth_dev_owner *port_owner;
593 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
594 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
599 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
600 !rte_eth_is_valid_owner_id(old_owner_id)) {
602 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
603 old_owner_id, new_owner->id);
607 port_owner = &rte_eth_devices[port_id].data->owner;
608 if (port_owner->id != old_owner_id) {
610 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
611 port_id, port_owner->name, port_owner->id);
615 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
617 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
618 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
621 port_owner->id = new_owner->id;
623 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
624 port_id, new_owner->name, new_owner->id);
629 int __rte_experimental
630 rte_eth_dev_owner_set(const uint16_t port_id,
631 const struct rte_eth_dev_owner *owner)
635 rte_eth_dev_shared_data_prepare();
637 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
639 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
641 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
645 int __rte_experimental
646 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
648 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
649 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
652 rte_eth_dev_shared_data_prepare();
654 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
656 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
658 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
662 void __rte_experimental
663 rte_eth_dev_owner_delete(const uint64_t owner_id)
667 rte_eth_dev_shared_data_prepare();
669 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
671 if (rte_eth_is_valid_owner_id(owner_id)) {
672 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
673 if (rte_eth_devices[port_id].data->owner.id == owner_id)
674 memset(&rte_eth_devices[port_id].data->owner, 0,
675 sizeof(struct rte_eth_dev_owner));
676 RTE_ETHDEV_LOG(NOTICE,
677 "All port owners owned by %016"PRIx64" identifier have removed\n",
681 "Invalid owner id=%016"PRIx64"\n",
685 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
688 int __rte_experimental
689 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
692 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
694 rte_eth_dev_shared_data_prepare();
696 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
698 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
699 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
703 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
706 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
711 rte_eth_dev_socket_id(uint16_t port_id)
713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
714 return rte_eth_devices[port_id].data->numa_node;
718 rte_eth_dev_get_sec_ctx(uint16_t port_id)
720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
721 return rte_eth_devices[port_id].security_ctx;
725 rte_eth_dev_count(void)
727 return rte_eth_dev_count_avail();
731 rte_eth_dev_count_avail(void)
738 RTE_ETH_FOREACH_DEV(p)
744 uint16_t __rte_experimental
745 rte_eth_dev_count_total(void)
747 uint16_t port, count = 0;
749 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
750 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
757 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
764 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
768 /* shouldn't check 'rte_eth_devices[i].data',
769 * because it might be overwritten by VDEV PMD */
770 tmp = rte_eth_dev_shared_data->data[port_id].name;
776 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
781 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
785 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
786 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
787 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
797 eth_err(uint16_t port_id, int ret)
801 if (rte_eth_dev_is_removed(port_id))
807 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
809 uint16_t old_nb_queues = dev->data->nb_rx_queues;
813 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
814 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
815 sizeof(dev->data->rx_queues[0]) * nb_queues,
816 RTE_CACHE_LINE_SIZE);
817 if (dev->data->rx_queues == NULL) {
818 dev->data->nb_rx_queues = 0;
821 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
824 rxq = dev->data->rx_queues;
826 for (i = nb_queues; i < old_nb_queues; i++)
827 (*dev->dev_ops->rx_queue_release)(rxq[i]);
828 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
829 RTE_CACHE_LINE_SIZE);
832 if (nb_queues > old_nb_queues) {
833 uint16_t new_qs = nb_queues - old_nb_queues;
835 memset(rxq + old_nb_queues, 0,
836 sizeof(rxq[0]) * new_qs);
839 dev->data->rx_queues = rxq;
841 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
844 rxq = dev->data->rx_queues;
846 for (i = nb_queues; i < old_nb_queues; i++)
847 (*dev->dev_ops->rx_queue_release)(rxq[i]);
849 rte_free(dev->data->rx_queues);
850 dev->data->rx_queues = NULL;
852 dev->data->nb_rx_queues = nb_queues;
857 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
859 struct rte_eth_dev *dev;
861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
863 dev = &rte_eth_devices[port_id];
864 if (!dev->data->dev_started) {
866 "Port %u must be started before start any queue\n",
871 if (rx_queue_id >= dev->data->nb_rx_queues) {
872 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
878 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
880 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
881 rx_queue_id, port_id);
885 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
891 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
893 struct rte_eth_dev *dev;
895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
897 dev = &rte_eth_devices[port_id];
898 if (rx_queue_id >= dev->data->nb_rx_queues) {
899 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
905 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
907 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
908 rx_queue_id, port_id);
912 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
917 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
919 struct rte_eth_dev *dev;
921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
923 dev = &rte_eth_devices[port_id];
924 if (!dev->data->dev_started) {
926 "Port %u must be started before start any queue\n",
931 if (tx_queue_id >= dev->data->nb_tx_queues) {
932 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
938 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
940 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
941 tx_queue_id, port_id);
945 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
949 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
951 struct rte_eth_dev *dev;
953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
955 dev = &rte_eth_devices[port_id];
956 if (tx_queue_id >= dev->data->nb_tx_queues) {
957 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
963 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
965 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
966 tx_queue_id, port_id);
970 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
975 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
977 uint16_t old_nb_queues = dev->data->nb_tx_queues;
981 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
982 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
983 sizeof(dev->data->tx_queues[0]) * nb_queues,
984 RTE_CACHE_LINE_SIZE);
985 if (dev->data->tx_queues == NULL) {
986 dev->data->nb_tx_queues = 0;
989 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
992 txq = dev->data->tx_queues;
994 for (i = nb_queues; i < old_nb_queues; i++)
995 (*dev->dev_ops->tx_queue_release)(txq[i]);
996 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
997 RTE_CACHE_LINE_SIZE);
1000 if (nb_queues > old_nb_queues) {
1001 uint16_t new_qs = nb_queues - old_nb_queues;
1003 memset(txq + old_nb_queues, 0,
1004 sizeof(txq[0]) * new_qs);
1007 dev->data->tx_queues = txq;
1009 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1012 txq = dev->data->tx_queues;
1014 for (i = nb_queues; i < old_nb_queues; i++)
1015 (*dev->dev_ops->tx_queue_release)(txq[i]);
1017 rte_free(dev->data->tx_queues);
1018 dev->data->tx_queues = NULL;
1020 dev->data->nb_tx_queues = nb_queues;
1025 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1028 case ETH_SPEED_NUM_10M:
1029 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1030 case ETH_SPEED_NUM_100M:
1031 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1032 case ETH_SPEED_NUM_1G:
1033 return ETH_LINK_SPEED_1G;
1034 case ETH_SPEED_NUM_2_5G:
1035 return ETH_LINK_SPEED_2_5G;
1036 case ETH_SPEED_NUM_5G:
1037 return ETH_LINK_SPEED_5G;
1038 case ETH_SPEED_NUM_10G:
1039 return ETH_LINK_SPEED_10G;
1040 case ETH_SPEED_NUM_20G:
1041 return ETH_LINK_SPEED_20G;
1042 case ETH_SPEED_NUM_25G:
1043 return ETH_LINK_SPEED_25G;
1044 case ETH_SPEED_NUM_40G:
1045 return ETH_LINK_SPEED_40G;
1046 case ETH_SPEED_NUM_50G:
1047 return ETH_LINK_SPEED_50G;
1048 case ETH_SPEED_NUM_56G:
1049 return ETH_LINK_SPEED_56G;
1050 case ETH_SPEED_NUM_100G:
1051 return ETH_LINK_SPEED_100G;
1058 rte_eth_dev_rx_offload_name(uint64_t offload)
1060 const char *name = "UNKNOWN";
1063 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1064 if (offload == rte_rx_offload_names[i].offload) {
1065 name = rte_rx_offload_names[i].name;
1074 rte_eth_dev_tx_offload_name(uint64_t offload)
1076 const char *name = "UNKNOWN";
1079 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1080 if (offload == rte_tx_offload_names[i].offload) {
1081 name = rte_tx_offload_names[i].name;
1090 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1091 const struct rte_eth_conf *dev_conf)
1093 struct rte_eth_dev *dev;
1094 struct rte_eth_dev_info dev_info;
1095 struct rte_eth_conf orig_conf;
1096 struct rte_eth_conf local_conf = *dev_conf;
1100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1102 dev = &rte_eth_devices[port_id];
1104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1105 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1107 if (dev->data->dev_started) {
1109 "Port %u must be stopped to allow configuration\n",
1114 /* Store original config, as rollback required on failure */
1115 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1118 * Copy the dev_conf parameter into the dev structure.
1119 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1121 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1123 rte_eth_dev_info_get(port_id, &dev_info);
1125 /* If number of queues specified by application for both Rx and Tx is
1126 * zero, use driver preferred values. This cannot be done individually
1127 * as it is valid for either Tx or Rx (but not both) to be zero.
1128 * If driver does not provide any preferred valued, fall back on
1131 if (nb_rx_q == 0 && nb_tx_q == 0) {
1132 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1134 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1135 nb_tx_q = dev_info.default_txportconf.nb_queues;
1137 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1140 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1142 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1143 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1148 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1150 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1151 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1157 * Check that the numbers of RX and TX queues are not greater
1158 * than the maximum number of RX and TX queues supported by the
1159 * configured device.
1161 if (nb_rx_q > dev_info.max_rx_queues) {
1162 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1163 port_id, nb_rx_q, dev_info.max_rx_queues);
1168 if (nb_tx_q > dev_info.max_tx_queues) {
1169 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1170 port_id, nb_tx_q, dev_info.max_tx_queues);
1175 /* Check that the device supports requested interrupts */
1176 if ((dev_conf->intr_conf.lsc == 1) &&
1177 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1178 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1179 dev->device->driver->name);
1183 if ((dev_conf->intr_conf.rmv == 1) &&
1184 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1185 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1186 dev->device->driver->name);
1192 * If jumbo frames are enabled, check that the maximum RX packet
1193 * length is supported by the configured device.
1195 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1196 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1198 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1199 port_id, dev_conf->rxmode.max_rx_pkt_len,
1200 dev_info.max_rx_pktlen);
1203 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1205 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1206 port_id, dev_conf->rxmode.max_rx_pkt_len,
1207 (unsigned)ETHER_MIN_LEN);
1212 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1213 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1214 /* Use default value */
1215 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1219 /* Any requested offloading must be within its device capabilities */
1220 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1221 local_conf.rxmode.offloads) {
1223 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1224 "capabilities 0x%"PRIx64" in %s()\n",
1225 port_id, local_conf.rxmode.offloads,
1226 dev_info.rx_offload_capa,
1231 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1232 local_conf.txmode.offloads) {
1234 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1235 "capabilities 0x%"PRIx64" in %s()\n",
1236 port_id, local_conf.txmode.offloads,
1237 dev_info.tx_offload_capa,
1243 /* Check that device supports requested rss hash functions. */
1244 if ((dev_info.flow_type_rss_offloads |
1245 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1246 dev_info.flow_type_rss_offloads) {
1248 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1249 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1250 dev_info.flow_type_rss_offloads);
1256 * Setup new number of RX/TX queues and reconfigure device.
1258 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1261 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1267 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1270 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1272 rte_eth_dev_rx_queue_config(dev, 0);
1277 diag = (*dev->dev_ops->dev_configure)(dev);
1279 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1281 rte_eth_dev_rx_queue_config(dev, 0);
1282 rte_eth_dev_tx_queue_config(dev, 0);
1283 ret = eth_err(port_id, diag);
1287 /* Initialize Rx profiling if enabled at compilation time. */
1288 diag = __rte_eth_dev_profile_init(port_id, dev);
1290 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1292 rte_eth_dev_rx_queue_config(dev, 0);
1293 rte_eth_dev_tx_queue_config(dev, 0);
1294 ret = eth_err(port_id, diag);
1301 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1307 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1309 if (dev->data->dev_started) {
1310 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1311 dev->data->port_id);
1315 rte_eth_dev_rx_queue_config(dev, 0);
1316 rte_eth_dev_tx_queue_config(dev, 0);
1318 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1322 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1323 struct rte_eth_dev_info *dev_info)
1325 struct ether_addr *addr;
1330 /* replay MAC address configuration including default MAC */
1331 addr = &dev->data->mac_addrs[0];
1332 if (*dev->dev_ops->mac_addr_set != NULL)
1333 (*dev->dev_ops->mac_addr_set)(dev, addr);
1334 else if (*dev->dev_ops->mac_addr_add != NULL)
1335 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1337 if (*dev->dev_ops->mac_addr_add != NULL) {
1338 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1339 addr = &dev->data->mac_addrs[i];
1341 /* skip zero address */
1342 if (is_zero_ether_addr(addr))
1346 pool_mask = dev->data->mac_pool_sel[i];
1349 if (pool_mask & 1ULL)
1350 (*dev->dev_ops->mac_addr_add)(dev,
1354 } while (pool_mask);
1360 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1361 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1363 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1364 rte_eth_dev_mac_restore(dev, dev_info);
1366 /* replay promiscuous configuration */
1367 if (rte_eth_promiscuous_get(port_id) == 1)
1368 rte_eth_promiscuous_enable(port_id);
1369 else if (rte_eth_promiscuous_get(port_id) == 0)
1370 rte_eth_promiscuous_disable(port_id);
1372 /* replay all multicast configuration */
1373 if (rte_eth_allmulticast_get(port_id) == 1)
1374 rte_eth_allmulticast_enable(port_id);
1375 else if (rte_eth_allmulticast_get(port_id) == 0)
1376 rte_eth_allmulticast_disable(port_id);
1380 rte_eth_dev_start(uint16_t port_id)
1382 struct rte_eth_dev *dev;
1383 struct rte_eth_dev_info dev_info;
1386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1388 dev = &rte_eth_devices[port_id];
1390 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1392 if (dev->data->dev_started != 0) {
1393 RTE_ETHDEV_LOG(INFO,
1394 "Device with port_id=%"PRIu16" already started\n",
1399 rte_eth_dev_info_get(port_id, &dev_info);
1401 /* Lets restore MAC now if device does not support live change */
1402 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1403 rte_eth_dev_mac_restore(dev, &dev_info);
1405 diag = (*dev->dev_ops->dev_start)(dev);
1407 dev->data->dev_started = 1;
1409 return eth_err(port_id, diag);
1411 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1413 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1415 (*dev->dev_ops->link_update)(dev, 0);
1421 rte_eth_dev_stop(uint16_t port_id)
1423 struct rte_eth_dev *dev;
1425 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1426 dev = &rte_eth_devices[port_id];
1428 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1430 if (dev->data->dev_started == 0) {
1431 RTE_ETHDEV_LOG(INFO,
1432 "Device with port_id=%"PRIu16" already stopped\n",
1437 dev->data->dev_started = 0;
1438 (*dev->dev_ops->dev_stop)(dev);
1442 rte_eth_dev_set_link_up(uint16_t port_id)
1444 struct rte_eth_dev *dev;
1446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1448 dev = &rte_eth_devices[port_id];
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1451 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1455 rte_eth_dev_set_link_down(uint16_t port_id)
1457 struct rte_eth_dev *dev;
1459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1461 dev = &rte_eth_devices[port_id];
1463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1464 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1468 rte_eth_dev_close(uint16_t port_id)
1470 struct rte_eth_dev *dev;
1472 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1473 dev = &rte_eth_devices[port_id];
1475 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1476 dev->data->dev_started = 0;
1477 (*dev->dev_ops->dev_close)(dev);
1479 /* check behaviour flag - temporary for PMD migration */
1480 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1481 /* new behaviour: send event + reset state + free all data */
1482 rte_eth_dev_release_port(dev);
1485 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1486 "The driver %s should migrate to the new behaviour.\n",
1487 dev->device->driver->name);
1488 /* old behaviour: only free queue arrays */
1489 dev->data->nb_rx_queues = 0;
1490 rte_free(dev->data->rx_queues);
1491 dev->data->rx_queues = NULL;
1492 dev->data->nb_tx_queues = 0;
1493 rte_free(dev->data->tx_queues);
1494 dev->data->tx_queues = NULL;
1498 rte_eth_dev_reset(uint16_t port_id)
1500 struct rte_eth_dev *dev;
1503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1504 dev = &rte_eth_devices[port_id];
1506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1508 rte_eth_dev_stop(port_id);
1509 ret = dev->dev_ops->dev_reset(dev);
1511 return eth_err(port_id, ret);
1514 int __rte_experimental
1515 rte_eth_dev_is_removed(uint16_t port_id)
1517 struct rte_eth_dev *dev;
1520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1522 dev = &rte_eth_devices[port_id];
1524 if (dev->state == RTE_ETH_DEV_REMOVED)
1527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1529 ret = dev->dev_ops->is_removed(dev);
1531 /* Device is physically removed. */
1532 dev->state = RTE_ETH_DEV_REMOVED;
1538 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1539 uint16_t nb_rx_desc, unsigned int socket_id,
1540 const struct rte_eth_rxconf *rx_conf,
1541 struct rte_mempool *mp)
1544 uint32_t mbp_buf_size;
1545 struct rte_eth_dev *dev;
1546 struct rte_eth_dev_info dev_info;
1547 struct rte_eth_rxconf local_conf;
1550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1552 dev = &rte_eth_devices[port_id];
1553 if (rx_queue_id >= dev->data->nb_rx_queues) {
1554 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1562 * Check the size of the mbuf data buffer.
1563 * This value must be provided in the private data of the memory pool.
1564 * First check that the memory pool has a valid private data.
1566 rte_eth_dev_info_get(port_id, &dev_info);
1567 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1568 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1569 mp->name, (int)mp->private_data_size,
1570 (int)sizeof(struct rte_pktmbuf_pool_private));
1573 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1575 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1577 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1578 mp->name, (int)mbp_buf_size,
1579 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1580 (int)RTE_PKTMBUF_HEADROOM,
1581 (int)dev_info.min_rx_bufsize);
1585 /* Use default specified by driver, if nb_rx_desc is zero */
1586 if (nb_rx_desc == 0) {
1587 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1588 /* If driver default is also zero, fall back on EAL default */
1589 if (nb_rx_desc == 0)
1590 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1593 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1594 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1595 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1598 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1599 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1600 dev_info.rx_desc_lim.nb_min,
1601 dev_info.rx_desc_lim.nb_align);
1605 if (dev->data->dev_started &&
1606 !(dev_info.dev_capa &
1607 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1610 if (dev->data->dev_started &&
1611 (dev->data->rx_queue_state[rx_queue_id] !=
1612 RTE_ETH_QUEUE_STATE_STOPPED))
1615 rxq = dev->data->rx_queues;
1616 if (rxq[rx_queue_id]) {
1617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1619 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1620 rxq[rx_queue_id] = NULL;
1623 if (rx_conf == NULL)
1624 rx_conf = &dev_info.default_rxconf;
1626 local_conf = *rx_conf;
1629 * If an offloading has already been enabled in
1630 * rte_eth_dev_configure(), it has been enabled on all queues,
1631 * so there is no need to enable it in this queue again.
1632 * The local_conf.offloads input to underlying PMD only carries
1633 * those offloadings which are only enabled on this queue and
1634 * not enabled on all queues.
1636 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1639 * New added offloadings for this queue are those not enabled in
1640 * rte_eth_dev_configure() and they must be per-queue type.
1641 * A pure per-port offloading can't be enabled on a queue while
1642 * disabled on another queue. A pure per-port offloading can't
1643 * be enabled for any queue as new added one if it hasn't been
1644 * enabled in rte_eth_dev_configure().
1646 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1647 local_conf.offloads) {
1649 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1650 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1651 port_id, rx_queue_id, local_conf.offloads,
1652 dev_info.rx_queue_offload_capa,
1657 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1658 socket_id, &local_conf, mp);
1660 if (!dev->data->min_rx_buf_size ||
1661 dev->data->min_rx_buf_size > mbp_buf_size)
1662 dev->data->min_rx_buf_size = mbp_buf_size;
1665 return eth_err(port_id, ret);
1669 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1670 uint16_t nb_tx_desc, unsigned int socket_id,
1671 const struct rte_eth_txconf *tx_conf)
1673 struct rte_eth_dev *dev;
1674 struct rte_eth_dev_info dev_info;
1675 struct rte_eth_txconf local_conf;
1678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1680 dev = &rte_eth_devices[port_id];
1681 if (tx_queue_id >= dev->data->nb_tx_queues) {
1682 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1689 rte_eth_dev_info_get(port_id, &dev_info);
1691 /* Use default specified by driver, if nb_tx_desc is zero */
1692 if (nb_tx_desc == 0) {
1693 nb_tx_desc = dev_info.default_txportconf.ring_size;
1694 /* If driver default is zero, fall back on EAL default */
1695 if (nb_tx_desc == 0)
1696 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1698 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1699 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1700 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1702 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1703 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1704 dev_info.tx_desc_lim.nb_min,
1705 dev_info.tx_desc_lim.nb_align);
1709 if (dev->data->dev_started &&
1710 !(dev_info.dev_capa &
1711 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1714 if (dev->data->dev_started &&
1715 (dev->data->tx_queue_state[tx_queue_id] !=
1716 RTE_ETH_QUEUE_STATE_STOPPED))
1719 txq = dev->data->tx_queues;
1720 if (txq[tx_queue_id]) {
1721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1723 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1724 txq[tx_queue_id] = NULL;
1727 if (tx_conf == NULL)
1728 tx_conf = &dev_info.default_txconf;
1730 local_conf = *tx_conf;
1733 * If an offloading has already been enabled in
1734 * rte_eth_dev_configure(), it has been enabled on all queues,
1735 * so there is no need to enable it in this queue again.
1736 * The local_conf.offloads input to underlying PMD only carries
1737 * those offloadings which are only enabled on this queue and
1738 * not enabled on all queues.
1740 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1743 * New added offloadings for this queue are those not enabled in
1744 * rte_eth_dev_configure() and they must be per-queue type.
1745 * A pure per-port offloading can't be enabled on a queue while
1746 * disabled on another queue. A pure per-port offloading can't
1747 * be enabled for any queue as new added one if it hasn't been
1748 * enabled in rte_eth_dev_configure().
1750 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1751 local_conf.offloads) {
1753 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1754 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1755 port_id, tx_queue_id, local_conf.offloads,
1756 dev_info.tx_queue_offload_capa,
1761 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1762 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1766 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1767 void *userdata __rte_unused)
1771 for (i = 0; i < unsent; i++)
1772 rte_pktmbuf_free(pkts[i]);
1776 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1779 uint64_t *count = userdata;
1782 for (i = 0; i < unsent; i++)
1783 rte_pktmbuf_free(pkts[i]);
1789 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1790 buffer_tx_error_fn cbfn, void *userdata)
1792 buffer->error_callback = cbfn;
1793 buffer->error_userdata = userdata;
1798 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1805 buffer->size = size;
1806 if (buffer->error_callback == NULL) {
1807 ret = rte_eth_tx_buffer_set_err_callback(
1808 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1815 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1817 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1820 /* Validate Input Data. Bail if not valid or not supported. */
1821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1824 /* Call driver to free pending mbufs. */
1825 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1827 return eth_err(port_id, ret);
1831 rte_eth_promiscuous_enable(uint16_t port_id)
1833 struct rte_eth_dev *dev;
1835 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1836 dev = &rte_eth_devices[port_id];
1838 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1839 (*dev->dev_ops->promiscuous_enable)(dev);
1840 dev->data->promiscuous = 1;
1844 rte_eth_promiscuous_disable(uint16_t port_id)
1846 struct rte_eth_dev *dev;
1848 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1849 dev = &rte_eth_devices[port_id];
1851 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1852 dev->data->promiscuous = 0;
1853 (*dev->dev_ops->promiscuous_disable)(dev);
1857 rte_eth_promiscuous_get(uint16_t port_id)
1859 struct rte_eth_dev *dev;
1861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1863 dev = &rte_eth_devices[port_id];
1864 return dev->data->promiscuous;
1868 rte_eth_allmulticast_enable(uint16_t port_id)
1870 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1873 dev = &rte_eth_devices[port_id];
1875 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1876 (*dev->dev_ops->allmulticast_enable)(dev);
1877 dev->data->all_multicast = 1;
1881 rte_eth_allmulticast_disable(uint16_t port_id)
1883 struct rte_eth_dev *dev;
1885 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1886 dev = &rte_eth_devices[port_id];
1888 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1889 dev->data->all_multicast = 0;
1890 (*dev->dev_ops->allmulticast_disable)(dev);
1894 rte_eth_allmulticast_get(uint16_t port_id)
1896 struct rte_eth_dev *dev;
1898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1900 dev = &rte_eth_devices[port_id];
1901 return dev->data->all_multicast;
1905 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1907 struct rte_eth_dev *dev;
1909 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1910 dev = &rte_eth_devices[port_id];
1912 if (dev->data->dev_conf.intr_conf.lsc &&
1913 dev->data->dev_started)
1914 rte_eth_linkstatus_get(dev, eth_link);
1916 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1917 (*dev->dev_ops->link_update)(dev, 1);
1918 *eth_link = dev->data->dev_link;
1923 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1925 struct rte_eth_dev *dev;
1927 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1928 dev = &rte_eth_devices[port_id];
1930 if (dev->data->dev_conf.intr_conf.lsc &&
1931 dev->data->dev_started)
1932 rte_eth_linkstatus_get(dev, eth_link);
1934 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1935 (*dev->dev_ops->link_update)(dev, 0);
1936 *eth_link = dev->data->dev_link;
1941 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1943 struct rte_eth_dev *dev;
1945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1947 dev = &rte_eth_devices[port_id];
1948 memset(stats, 0, sizeof(*stats));
1950 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1951 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1952 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1956 rte_eth_stats_reset(uint16_t port_id)
1958 struct rte_eth_dev *dev;
1960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1961 dev = &rte_eth_devices[port_id];
1963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1964 (*dev->dev_ops->stats_reset)(dev);
1965 dev->data->rx_mbuf_alloc_failed = 0;
1971 get_xstats_basic_count(struct rte_eth_dev *dev)
1973 uint16_t nb_rxqs, nb_txqs;
1976 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1977 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1979 count = RTE_NB_STATS;
1980 count += nb_rxqs * RTE_NB_RXQ_STATS;
1981 count += nb_txqs * RTE_NB_TXQ_STATS;
1987 get_xstats_count(uint16_t port_id)
1989 struct rte_eth_dev *dev;
1992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1993 dev = &rte_eth_devices[port_id];
1994 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1995 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1998 return eth_err(port_id, count);
2000 if (dev->dev_ops->xstats_get_names != NULL) {
2001 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2003 return eth_err(port_id, count);
2008 count += get_xstats_basic_count(dev);
2014 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2017 int cnt_xstats, idx_xstat;
2019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2022 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2027 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2032 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2033 if (cnt_xstats < 0) {
2034 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2038 /* Get id-name lookup table */
2039 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2041 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2042 port_id, xstats_names, cnt_xstats, NULL)) {
2043 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2047 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2048 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2057 /* retrieve basic stats names */
2059 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2060 struct rte_eth_xstat_name *xstats_names)
2062 int cnt_used_entries = 0;
2063 uint32_t idx, id_queue;
2066 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2067 snprintf(xstats_names[cnt_used_entries].name,
2068 sizeof(xstats_names[0].name),
2069 "%s", rte_stats_strings[idx].name);
2072 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2073 for (id_queue = 0; id_queue < num_q; id_queue++) {
2074 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2075 snprintf(xstats_names[cnt_used_entries].name,
2076 sizeof(xstats_names[0].name),
2078 id_queue, rte_rxq_stats_strings[idx].name);
2083 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2084 for (id_queue = 0; id_queue < num_q; id_queue++) {
2085 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2086 snprintf(xstats_names[cnt_used_entries].name,
2087 sizeof(xstats_names[0].name),
2089 id_queue, rte_txq_stats_strings[idx].name);
2093 return cnt_used_entries;
2096 /* retrieve ethdev extended statistics names */
2098 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2099 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2102 struct rte_eth_xstat_name *xstats_names_copy;
2103 unsigned int no_basic_stat_requested = 1;
2104 unsigned int no_ext_stat_requested = 1;
2105 unsigned int expected_entries;
2106 unsigned int basic_count;
2107 struct rte_eth_dev *dev;
2111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2112 dev = &rte_eth_devices[port_id];
2114 basic_count = get_xstats_basic_count(dev);
2115 ret = get_xstats_count(port_id);
2118 expected_entries = (unsigned int)ret;
2120 /* Return max number of stats if no ids given */
2123 return expected_entries;
2124 else if (xstats_names && size < expected_entries)
2125 return expected_entries;
2128 if (ids && !xstats_names)
2131 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2132 uint64_t ids_copy[size];
2134 for (i = 0; i < size; i++) {
2135 if (ids[i] < basic_count) {
2136 no_basic_stat_requested = 0;
2141 * Convert ids to xstats ids that PMD knows.
2142 * ids known by user are basic + extended stats.
2144 ids_copy[i] = ids[i] - basic_count;
2147 if (no_basic_stat_requested)
2148 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2149 xstats_names, ids_copy, size);
2152 /* Retrieve all stats */
2154 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2156 if (num_stats < 0 || num_stats > (int)expected_entries)
2159 return expected_entries;
2162 xstats_names_copy = calloc(expected_entries,
2163 sizeof(struct rte_eth_xstat_name));
2165 if (!xstats_names_copy) {
2166 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2171 for (i = 0; i < size; i++) {
2172 if (ids[i] >= basic_count) {
2173 no_ext_stat_requested = 0;
2179 /* Fill xstats_names_copy structure */
2180 if (ids && no_ext_stat_requested) {
2181 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2183 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2186 free(xstats_names_copy);
2192 for (i = 0; i < size; i++) {
2193 if (ids[i] >= expected_entries) {
2194 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2195 free(xstats_names_copy);
2198 xstats_names[i] = xstats_names_copy[ids[i]];
2201 free(xstats_names_copy);
2206 rte_eth_xstats_get_names(uint16_t port_id,
2207 struct rte_eth_xstat_name *xstats_names,
2210 struct rte_eth_dev *dev;
2211 int cnt_used_entries;
2212 int cnt_expected_entries;
2213 int cnt_driver_entries;
2215 cnt_expected_entries = get_xstats_count(port_id);
2216 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2217 (int)size < cnt_expected_entries)
2218 return cnt_expected_entries;
2220 /* port_id checked in get_xstats_count() */
2221 dev = &rte_eth_devices[port_id];
2223 cnt_used_entries = rte_eth_basic_stats_get_names(
2226 if (dev->dev_ops->xstats_get_names != NULL) {
2227 /* If there are any driver-specific xstats, append them
2230 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2232 xstats_names + cnt_used_entries,
2233 size - cnt_used_entries);
2234 if (cnt_driver_entries < 0)
2235 return eth_err(port_id, cnt_driver_entries);
2236 cnt_used_entries += cnt_driver_entries;
2239 return cnt_used_entries;
2244 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2246 struct rte_eth_dev *dev;
2247 struct rte_eth_stats eth_stats;
2248 unsigned int count = 0, i, q;
2249 uint64_t val, *stats_ptr;
2250 uint16_t nb_rxqs, nb_txqs;
2253 ret = rte_eth_stats_get(port_id, ð_stats);
2257 dev = &rte_eth_devices[port_id];
2259 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2260 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2263 for (i = 0; i < RTE_NB_STATS; i++) {
2264 stats_ptr = RTE_PTR_ADD(ð_stats,
2265 rte_stats_strings[i].offset);
2267 xstats[count++].value = val;
2271 for (q = 0; q < nb_rxqs; q++) {
2272 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2273 stats_ptr = RTE_PTR_ADD(ð_stats,
2274 rte_rxq_stats_strings[i].offset +
2275 q * sizeof(uint64_t));
2277 xstats[count++].value = val;
2282 for (q = 0; q < nb_txqs; q++) {
2283 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2284 stats_ptr = RTE_PTR_ADD(ð_stats,
2285 rte_txq_stats_strings[i].offset +
2286 q * sizeof(uint64_t));
2288 xstats[count++].value = val;
2294 /* retrieve ethdev extended statistics */
2296 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2297 uint64_t *values, unsigned int size)
2299 unsigned int no_basic_stat_requested = 1;
2300 unsigned int no_ext_stat_requested = 1;
2301 unsigned int num_xstats_filled;
2302 unsigned int basic_count;
2303 uint16_t expected_entries;
2304 struct rte_eth_dev *dev;
2308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2309 ret = get_xstats_count(port_id);
2312 expected_entries = (uint16_t)ret;
2313 struct rte_eth_xstat xstats[expected_entries];
2314 dev = &rte_eth_devices[port_id];
2315 basic_count = get_xstats_basic_count(dev);
2317 /* Return max number of stats if no ids given */
2320 return expected_entries;
2321 else if (values && size < expected_entries)
2322 return expected_entries;
2328 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2329 unsigned int basic_count = get_xstats_basic_count(dev);
2330 uint64_t ids_copy[size];
2332 for (i = 0; i < size; i++) {
2333 if (ids[i] < basic_count) {
2334 no_basic_stat_requested = 0;
2339 * Convert ids to xstats ids that PMD knows.
2340 * ids known by user are basic + extended stats.
2342 ids_copy[i] = ids[i] - basic_count;
2345 if (no_basic_stat_requested)
2346 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2351 for (i = 0; i < size; i++) {
2352 if (ids[i] >= basic_count) {
2353 no_ext_stat_requested = 0;
2359 /* Fill the xstats structure */
2360 if (ids && no_ext_stat_requested)
2361 ret = rte_eth_basic_stats_get(port_id, xstats);
2363 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2367 num_xstats_filled = (unsigned int)ret;
2369 /* Return all stats */
2371 for (i = 0; i < num_xstats_filled; i++)
2372 values[i] = xstats[i].value;
2373 return expected_entries;
2377 for (i = 0; i < size; i++) {
2378 if (ids[i] >= expected_entries) {
2379 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2382 values[i] = xstats[ids[i]].value;
2388 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2391 struct rte_eth_dev *dev;
2392 unsigned int count = 0, i;
2393 signed int xcount = 0;
2394 uint16_t nb_rxqs, nb_txqs;
2397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2399 dev = &rte_eth_devices[port_id];
2401 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2402 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2404 /* Return generic statistics */
2405 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2406 (nb_txqs * RTE_NB_TXQ_STATS);
2408 /* implemented by the driver */
2409 if (dev->dev_ops->xstats_get != NULL) {
2410 /* Retrieve the xstats from the driver at the end of the
2413 xcount = (*dev->dev_ops->xstats_get)(dev,
2414 xstats ? xstats + count : NULL,
2415 (n > count) ? n - count : 0);
2418 return eth_err(port_id, xcount);
2421 if (n < count + xcount || xstats == NULL)
2422 return count + xcount;
2424 /* now fill the xstats structure */
2425 ret = rte_eth_basic_stats_get(port_id, xstats);
2430 for (i = 0; i < count; i++)
2432 /* add an offset to driver-specific stats */
2433 for ( ; i < count + xcount; i++)
2434 xstats[i].id += count;
2436 return count + xcount;
2439 /* reset ethdev extended statistics */
2441 rte_eth_xstats_reset(uint16_t port_id)
2443 struct rte_eth_dev *dev;
2445 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2446 dev = &rte_eth_devices[port_id];
2448 /* implemented by the driver */
2449 if (dev->dev_ops->xstats_reset != NULL) {
2450 (*dev->dev_ops->xstats_reset)(dev);
2454 /* fallback to default */
2455 rte_eth_stats_reset(port_id);
2459 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2462 struct rte_eth_dev *dev;
2464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2466 dev = &rte_eth_devices[port_id];
2468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2470 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2473 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2476 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2479 return (*dev->dev_ops->queue_stats_mapping_set)
2480 (dev, queue_id, stat_idx, is_rx);
2485 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2488 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2489 stat_idx, STAT_QMAP_TX));
2494 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2497 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2498 stat_idx, STAT_QMAP_RX));
2502 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2504 struct rte_eth_dev *dev;
2506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2507 dev = &rte_eth_devices[port_id];
2509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2510 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2511 fw_version, fw_size));
2515 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2517 struct rte_eth_dev *dev;
2518 const struct rte_eth_desc_lim lim = {
2519 .nb_max = UINT16_MAX,
2524 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2525 dev = &rte_eth_devices[port_id];
2527 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2528 dev_info->rx_desc_lim = lim;
2529 dev_info->tx_desc_lim = lim;
2530 dev_info->device = dev->device;
2532 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2533 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2534 dev_info->driver_name = dev->device->driver->name;
2535 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2536 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2538 dev_info->dev_flags = &dev->data->dev_flags;
2542 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2543 uint32_t *ptypes, int num)
2546 struct rte_eth_dev *dev;
2547 const uint32_t *all_ptypes;
2549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2550 dev = &rte_eth_devices[port_id];
2551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2552 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2557 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2558 if (all_ptypes[i] & ptype_mask) {
2560 ptypes[j] = all_ptypes[i];
2568 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2570 struct rte_eth_dev *dev;
2572 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2573 dev = &rte_eth_devices[port_id];
2574 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2579 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2581 struct rte_eth_dev *dev;
2583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2585 dev = &rte_eth_devices[port_id];
2586 *mtu = dev->data->mtu;
2591 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2594 struct rte_eth_dev *dev;
2596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2597 dev = &rte_eth_devices[port_id];
2598 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2600 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2602 dev->data->mtu = mtu;
2604 return eth_err(port_id, ret);
2608 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2610 struct rte_eth_dev *dev;
2613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2614 dev = &rte_eth_devices[port_id];
2615 if (!(dev->data->dev_conf.rxmode.offloads &
2616 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2617 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2622 if (vlan_id > 4095) {
2623 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2627 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2629 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2631 struct rte_vlan_filter_conf *vfc;
2635 vfc = &dev->data->vlan_filter_conf;
2636 vidx = vlan_id / 64;
2637 vbit = vlan_id % 64;
2640 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2642 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2645 return eth_err(port_id, ret);
2649 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2652 struct rte_eth_dev *dev;
2654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2655 dev = &rte_eth_devices[port_id];
2656 if (rx_queue_id >= dev->data->nb_rx_queues) {
2657 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2662 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2668 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2669 enum rte_vlan_type vlan_type,
2672 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 dev = &rte_eth_devices[port_id];
2676 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2678 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2683 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2685 struct rte_eth_dev *dev;
2689 uint64_t orig_offloads;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 dev = &rte_eth_devices[port_id];
2694 /* save original values in case of failure */
2695 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2697 /*check which option changed by application*/
2698 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2699 org = !!(dev->data->dev_conf.rxmode.offloads &
2700 DEV_RX_OFFLOAD_VLAN_STRIP);
2703 dev->data->dev_conf.rxmode.offloads |=
2704 DEV_RX_OFFLOAD_VLAN_STRIP;
2706 dev->data->dev_conf.rxmode.offloads &=
2707 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2708 mask |= ETH_VLAN_STRIP_MASK;
2711 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2712 org = !!(dev->data->dev_conf.rxmode.offloads &
2713 DEV_RX_OFFLOAD_VLAN_FILTER);
2716 dev->data->dev_conf.rxmode.offloads |=
2717 DEV_RX_OFFLOAD_VLAN_FILTER;
2719 dev->data->dev_conf.rxmode.offloads &=
2720 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2721 mask |= ETH_VLAN_FILTER_MASK;
2724 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2725 org = !!(dev->data->dev_conf.rxmode.offloads &
2726 DEV_RX_OFFLOAD_VLAN_EXTEND);
2729 dev->data->dev_conf.rxmode.offloads |=
2730 DEV_RX_OFFLOAD_VLAN_EXTEND;
2732 dev->data->dev_conf.rxmode.offloads &=
2733 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2734 mask |= ETH_VLAN_EXTEND_MASK;
2741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2742 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2744 /* hit an error restore original values */
2745 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2748 return eth_err(port_id, ret);
2752 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2754 struct rte_eth_dev *dev;
2757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2758 dev = &rte_eth_devices[port_id];
2760 if (dev->data->dev_conf.rxmode.offloads &
2761 DEV_RX_OFFLOAD_VLAN_STRIP)
2762 ret |= ETH_VLAN_STRIP_OFFLOAD;
2764 if (dev->data->dev_conf.rxmode.offloads &
2765 DEV_RX_OFFLOAD_VLAN_FILTER)
2766 ret |= ETH_VLAN_FILTER_OFFLOAD;
2768 if (dev->data->dev_conf.rxmode.offloads &
2769 DEV_RX_OFFLOAD_VLAN_EXTEND)
2770 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2776 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2778 struct rte_eth_dev *dev;
2780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2781 dev = &rte_eth_devices[port_id];
2782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2784 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2788 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2793 dev = &rte_eth_devices[port_id];
2794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2795 memset(fc_conf, 0, sizeof(*fc_conf));
2796 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2800 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2802 struct rte_eth_dev *dev;
2804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2805 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2806 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2810 dev = &rte_eth_devices[port_id];
2811 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2812 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2816 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2817 struct rte_eth_pfc_conf *pfc_conf)
2819 struct rte_eth_dev *dev;
2821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2823 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2827 dev = &rte_eth_devices[port_id];
2828 /* High water, low water validation are device specific */
2829 if (*dev->dev_ops->priority_flow_ctrl_set)
2830 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2836 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2844 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2845 for (i = 0; i < num; i++) {
2846 if (reta_conf[i].mask)
2854 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2858 uint16_t i, idx, shift;
2864 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2868 for (i = 0; i < reta_size; i++) {
2869 idx = i / RTE_RETA_GROUP_SIZE;
2870 shift = i % RTE_RETA_GROUP_SIZE;
2871 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2872 (reta_conf[idx].reta[shift] >= max_rxq)) {
2874 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2876 reta_conf[idx].reta[shift], max_rxq);
2885 rte_eth_dev_rss_reta_update(uint16_t port_id,
2886 struct rte_eth_rss_reta_entry64 *reta_conf,
2889 struct rte_eth_dev *dev;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 /* Check mask bits */
2894 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2898 dev = &rte_eth_devices[port_id];
2900 /* Check entry value */
2901 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2902 dev->data->nb_rx_queues);
2906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2907 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2912 rte_eth_dev_rss_reta_query(uint16_t port_id,
2913 struct rte_eth_rss_reta_entry64 *reta_conf,
2916 struct rte_eth_dev *dev;
2919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2921 /* Check mask bits */
2922 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2926 dev = &rte_eth_devices[port_id];
2927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2928 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2933 rte_eth_dev_rss_hash_update(uint16_t port_id,
2934 struct rte_eth_rss_conf *rss_conf)
2936 struct rte_eth_dev *dev;
2937 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 dev = &rte_eth_devices[port_id];
2941 rte_eth_dev_info_get(port_id, &dev_info);
2942 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2943 dev_info.flow_type_rss_offloads) {
2945 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2946 port_id, rss_conf->rss_hf,
2947 dev_info.flow_type_rss_offloads);
2950 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2951 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2956 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2957 struct rte_eth_rss_conf *rss_conf)
2959 struct rte_eth_dev *dev;
2961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2962 dev = &rte_eth_devices[port_id];
2963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2964 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2969 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2970 struct rte_eth_udp_tunnel *udp_tunnel)
2972 struct rte_eth_dev *dev;
2974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2975 if (udp_tunnel == NULL) {
2976 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2980 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2981 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2985 dev = &rte_eth_devices[port_id];
2986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2987 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2992 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2993 struct rte_eth_udp_tunnel *udp_tunnel)
2995 struct rte_eth_dev *dev;
2997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2998 dev = &rte_eth_devices[port_id];
3000 if (udp_tunnel == NULL) {
3001 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3005 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3006 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3011 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3016 rte_eth_led_on(uint16_t port_id)
3018 struct rte_eth_dev *dev;
3020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3021 dev = &rte_eth_devices[port_id];
3022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3023 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3027 rte_eth_led_off(uint16_t port_id)
3029 struct rte_eth_dev *dev;
3031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3032 dev = &rte_eth_devices[port_id];
3033 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3034 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3038 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3042 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3044 struct rte_eth_dev_info dev_info;
3045 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 rte_eth_dev_info_get(port_id, &dev_info);
3051 for (i = 0; i < dev_info.max_mac_addrs; i++)
3052 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3058 static const struct ether_addr null_mac_addr;
3061 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3064 struct rte_eth_dev *dev;
3069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3070 dev = &rte_eth_devices[port_id];
3071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3073 if (is_zero_ether_addr(addr)) {
3074 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3078 if (pool >= ETH_64_POOLS) {
3079 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3083 index = get_mac_addr_index(port_id, addr);
3085 index = get_mac_addr_index(port_id, &null_mac_addr);
3087 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3092 pool_mask = dev->data->mac_pool_sel[index];
3094 /* Check if both MAC address and pool is already there, and do nothing */
3095 if (pool_mask & (1ULL << pool))
3100 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3103 /* Update address in NIC data structure */
3104 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3106 /* Update pool bitmap in NIC data structure */
3107 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3110 return eth_err(port_id, ret);
3114 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3116 struct rte_eth_dev *dev;
3119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3120 dev = &rte_eth_devices[port_id];
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3123 index = get_mac_addr_index(port_id, addr);
3126 "Port %u: Cannot remove default MAC address\n",
3129 } else if (index < 0)
3130 return 0; /* Do nothing if address wasn't found */
3133 (*dev->dev_ops->mac_addr_remove)(dev, index);
3135 /* Update address in NIC data structure */
3136 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3138 /* reset pool bitmap */
3139 dev->data->mac_pool_sel[index] = 0;
3145 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3147 struct rte_eth_dev *dev;
3150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3152 if (!is_valid_assigned_ether_addr(addr))
3155 dev = &rte_eth_devices[port_id];
3156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3158 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3162 /* Update default address in NIC data structure */
3163 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3170 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3174 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3176 struct rte_eth_dev_info dev_info;
3177 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3180 rte_eth_dev_info_get(port_id, &dev_info);
3181 if (!dev->data->hash_mac_addrs)
3184 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3185 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3186 ETHER_ADDR_LEN) == 0)
3193 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3198 struct rte_eth_dev *dev;
3200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3202 dev = &rte_eth_devices[port_id];
3203 if (is_zero_ether_addr(addr)) {
3204 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3209 index = get_hash_mac_addr_index(port_id, addr);
3210 /* Check if it's already there, and do nothing */
3211 if ((index >= 0) && on)
3217 "Port %u: the MAC address was not set in UTA\n",
3222 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3224 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3231 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3233 /* Update address in NIC data structure */
3235 ether_addr_copy(addr,
3236 &dev->data->hash_mac_addrs[index]);
3238 ether_addr_copy(&null_mac_addr,
3239 &dev->data->hash_mac_addrs[index]);
3242 return eth_err(port_id, ret);
3246 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3248 struct rte_eth_dev *dev;
3250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3252 dev = &rte_eth_devices[port_id];
3254 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3255 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3259 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3262 struct rte_eth_dev *dev;
3263 struct rte_eth_dev_info dev_info;
3264 struct rte_eth_link link;
3266 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3268 dev = &rte_eth_devices[port_id];
3269 rte_eth_dev_info_get(port_id, &dev_info);
3270 link = dev->data->dev_link;
3272 if (queue_idx > dev_info.max_tx_queues) {
3274 "Set queue rate limit:port %u: invalid queue id=%u\n",
3275 port_id, queue_idx);
3279 if (tx_rate > link.link_speed) {
3281 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3282 tx_rate, link.link_speed);
3286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3287 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3288 queue_idx, tx_rate));
3292 rte_eth_mirror_rule_set(uint16_t port_id,
3293 struct rte_eth_mirror_conf *mirror_conf,
3294 uint8_t rule_id, uint8_t on)
3296 struct rte_eth_dev *dev;
3298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3299 if (mirror_conf->rule_type == 0) {
3300 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3304 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3305 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3310 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3311 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3312 (mirror_conf->pool_mask == 0)) {
3314 "Invalid mirror pool, pool mask can not be 0\n");
3318 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3319 mirror_conf->vlan.vlan_mask == 0) {
3321 "Invalid vlan mask, vlan mask can not be 0\n");
3325 dev = &rte_eth_devices[port_id];
3326 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3328 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3329 mirror_conf, rule_id, on));
3333 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3335 struct rte_eth_dev *dev;
3337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3339 dev = &rte_eth_devices[port_id];
3340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3342 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3346 RTE_INIT(eth_dev_init_cb_lists)
3350 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3351 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3355 rte_eth_dev_callback_register(uint16_t port_id,
3356 enum rte_eth_event_type event,
3357 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3359 struct rte_eth_dev *dev;
3360 struct rte_eth_dev_callback *user_cb;
3361 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3367 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3368 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3372 if (port_id == RTE_ETH_ALL) {
3374 last_port = RTE_MAX_ETHPORTS - 1;
3376 next_port = last_port = port_id;
3379 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3382 dev = &rte_eth_devices[next_port];
3384 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3385 if (user_cb->cb_fn == cb_fn &&
3386 user_cb->cb_arg == cb_arg &&
3387 user_cb->event == event) {
3392 /* create a new callback. */
3393 if (user_cb == NULL) {
3394 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3395 sizeof(struct rte_eth_dev_callback), 0);
3396 if (user_cb != NULL) {
3397 user_cb->cb_fn = cb_fn;
3398 user_cb->cb_arg = cb_arg;
3399 user_cb->event = event;
3400 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3403 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3404 rte_eth_dev_callback_unregister(port_id, event,
3410 } while (++next_port <= last_port);
3412 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3417 rte_eth_dev_callback_unregister(uint16_t port_id,
3418 enum rte_eth_event_type event,
3419 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3422 struct rte_eth_dev *dev;
3423 struct rte_eth_dev_callback *cb, *next;
3424 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3430 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3431 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3435 if (port_id == RTE_ETH_ALL) {
3437 last_port = RTE_MAX_ETHPORTS - 1;
3439 next_port = last_port = port_id;
3442 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3445 dev = &rte_eth_devices[next_port];
3447 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3450 next = TAILQ_NEXT(cb, next);
3452 if (cb->cb_fn != cb_fn || cb->event != event ||
3453 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3457 * if this callback is not executing right now,
3460 if (cb->active == 0) {
3461 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3467 } while (++next_port <= last_port);
3469 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3474 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3475 enum rte_eth_event_type event, void *ret_param)
3477 struct rte_eth_dev_callback *cb_lst;
3478 struct rte_eth_dev_callback dev_cb;
3481 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3482 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3483 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3487 if (ret_param != NULL)
3488 dev_cb.ret_param = ret_param;
3490 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3491 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3492 dev_cb.cb_arg, dev_cb.ret_param);
3493 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3496 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3501 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3506 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3508 dev->state = RTE_ETH_DEV_ATTACHED;
3512 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3515 struct rte_eth_dev *dev;
3516 struct rte_intr_handle *intr_handle;
3520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3522 dev = &rte_eth_devices[port_id];
3524 if (!dev->intr_handle) {
3525 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3529 intr_handle = dev->intr_handle;
3530 if (!intr_handle->intr_vec) {
3531 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3535 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3536 vec = intr_handle->intr_vec[qid];
3537 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3538 if (rc && rc != -EEXIST) {
3540 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3541 port_id, qid, op, epfd, vec);
3548 int __rte_experimental
3549 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3551 struct rte_intr_handle *intr_handle;
3552 struct rte_eth_dev *dev;
3553 unsigned int efd_idx;
3557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3559 dev = &rte_eth_devices[port_id];
3561 if (queue_id >= dev->data->nb_rx_queues) {
3562 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3566 if (!dev->intr_handle) {
3567 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3571 intr_handle = dev->intr_handle;
3572 if (!intr_handle->intr_vec) {
3573 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3577 vec = intr_handle->intr_vec[queue_id];
3578 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3579 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3580 fd = intr_handle->efds[efd_idx];
3585 const struct rte_memzone *
3586 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3587 uint16_t queue_id, size_t size, unsigned align,
3590 char z_name[RTE_MEMZONE_NAMESIZE];
3591 const struct rte_memzone *mz;
3593 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3594 dev->data->port_id, queue_id, ring_name);
3596 mz = rte_memzone_lookup(z_name);
3600 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3601 RTE_MEMZONE_IOVA_CONTIG, align);
3604 int __rte_experimental
3605 rte_eth_dev_create(struct rte_device *device, const char *name,
3606 size_t priv_data_size,
3607 ethdev_bus_specific_init ethdev_bus_specific_init,
3608 void *bus_init_params,
3609 ethdev_init_t ethdev_init, void *init_params)
3611 struct rte_eth_dev *ethdev;
3614 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3616 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3617 ethdev = rte_eth_dev_allocate(name);
3621 if (priv_data_size) {
3622 ethdev->data->dev_private = rte_zmalloc_socket(
3623 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3626 if (!ethdev->data->dev_private) {
3627 RTE_LOG(ERR, EAL, "failed to allocate private data");
3633 ethdev = rte_eth_dev_attach_secondary(name);
3635 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3636 "ethdev doesn't exist");
3641 ethdev->device = device;
3643 if (ethdev_bus_specific_init) {
3644 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3647 "ethdev bus specific initialisation failed");
3652 retval = ethdev_init(ethdev, init_params);
3654 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3658 rte_eth_dev_probing_finish(ethdev);
3663 rte_eth_dev_release_port(ethdev);
3667 int __rte_experimental
3668 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3669 ethdev_uninit_t ethdev_uninit)
3673 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3677 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3679 ret = ethdev_uninit(ethdev);
3683 return rte_eth_dev_release_port(ethdev);
3687 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3688 int epfd, int op, void *data)
3691 struct rte_eth_dev *dev;
3692 struct rte_intr_handle *intr_handle;
3695 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3697 dev = &rte_eth_devices[port_id];
3698 if (queue_id >= dev->data->nb_rx_queues) {
3699 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3703 if (!dev->intr_handle) {
3704 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3708 intr_handle = dev->intr_handle;
3709 if (!intr_handle->intr_vec) {
3710 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3714 vec = intr_handle->intr_vec[queue_id];
3715 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3716 if (rc && rc != -EEXIST) {
3718 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3719 port_id, queue_id, op, epfd, vec);
3727 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3730 struct rte_eth_dev *dev;
3732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3734 dev = &rte_eth_devices[port_id];
3736 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3737 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3742 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3745 struct rte_eth_dev *dev;
3747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3749 dev = &rte_eth_devices[port_id];
3751 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3752 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3758 rte_eth_dev_filter_supported(uint16_t port_id,
3759 enum rte_filter_type filter_type)
3761 struct rte_eth_dev *dev;
3763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3765 dev = &rte_eth_devices[port_id];
3766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3767 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3768 RTE_ETH_FILTER_NOP, NULL);
3772 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3773 enum rte_filter_op filter_op, void *arg)
3775 struct rte_eth_dev *dev;
3777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3779 dev = &rte_eth_devices[port_id];
3780 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3781 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3785 const struct rte_eth_rxtx_callback *
3786 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3787 rte_rx_callback_fn fn, void *user_param)
3789 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3790 rte_errno = ENOTSUP;
3793 /* check input parameters */
3794 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3795 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3799 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3807 cb->param = user_param;
3809 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3810 /* Add the callbacks in fifo order. */
3811 struct rte_eth_rxtx_callback *tail =
3812 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3815 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3822 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3827 const struct rte_eth_rxtx_callback *
3828 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3829 rte_rx_callback_fn fn, void *user_param)
3831 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3832 rte_errno = ENOTSUP;
3835 /* check input parameters */
3836 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3837 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3842 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3850 cb->param = user_param;
3852 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3853 /* Add the callbacks at fisrt position*/
3854 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3856 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3857 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3862 const struct rte_eth_rxtx_callback *
3863 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3864 rte_tx_callback_fn fn, void *user_param)
3866 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3867 rte_errno = ENOTSUP;
3870 /* check input parameters */
3871 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3872 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3877 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3885 cb->param = user_param;
3887 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3888 /* Add the callbacks in fifo order. */
3889 struct rte_eth_rxtx_callback *tail =
3890 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3893 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3900 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3906 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3907 const struct rte_eth_rxtx_callback *user_cb)
3909 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3912 /* Check input parameters. */
3913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3914 if (user_cb == NULL ||
3915 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3918 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3919 struct rte_eth_rxtx_callback *cb;
3920 struct rte_eth_rxtx_callback **prev_cb;
3923 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3924 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3925 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3927 if (cb == user_cb) {
3928 /* Remove the user cb from the callback list. */
3929 *prev_cb = cb->next;
3934 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3940 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3941 const struct rte_eth_rxtx_callback *user_cb)
3943 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3946 /* Check input parameters. */
3947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3948 if (user_cb == NULL ||
3949 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3952 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3954 struct rte_eth_rxtx_callback *cb;
3955 struct rte_eth_rxtx_callback **prev_cb;
3957 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3958 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3959 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3961 if (cb == user_cb) {
3962 /* Remove the user cb from the callback list. */
3963 *prev_cb = cb->next;
3968 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3974 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3975 struct rte_eth_rxq_info *qinfo)
3977 struct rte_eth_dev *dev;
3979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3984 dev = &rte_eth_devices[port_id];
3985 if (queue_id >= dev->data->nb_rx_queues) {
3986 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3992 memset(qinfo, 0, sizeof(*qinfo));
3993 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3998 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3999 struct rte_eth_txq_info *qinfo)
4001 struct rte_eth_dev *dev;
4003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4008 dev = &rte_eth_devices[port_id];
4009 if (queue_id >= dev->data->nb_tx_queues) {
4010 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4016 memset(qinfo, 0, sizeof(*qinfo));
4017 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4023 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4024 struct ether_addr *mc_addr_set,
4025 uint32_t nb_mc_addr)
4027 struct rte_eth_dev *dev;
4029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4031 dev = &rte_eth_devices[port_id];
4032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4033 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4034 mc_addr_set, nb_mc_addr));
4038 rte_eth_timesync_enable(uint16_t port_id)
4040 struct rte_eth_dev *dev;
4042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4043 dev = &rte_eth_devices[port_id];
4045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4046 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4050 rte_eth_timesync_disable(uint16_t port_id)
4052 struct rte_eth_dev *dev;
4054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4055 dev = &rte_eth_devices[port_id];
4057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4058 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4062 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4065 struct rte_eth_dev *dev;
4067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4068 dev = &rte_eth_devices[port_id];
4070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4071 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4072 (dev, timestamp, flags));
4076 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4077 struct timespec *timestamp)
4079 struct rte_eth_dev *dev;
4081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4082 dev = &rte_eth_devices[port_id];
4084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4085 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4090 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4092 struct rte_eth_dev *dev;
4094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4095 dev = &rte_eth_devices[port_id];
4097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4098 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4103 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4105 struct rte_eth_dev *dev;
4107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4108 dev = &rte_eth_devices[port_id];
4110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4111 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4116 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4118 struct rte_eth_dev *dev;
4120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4121 dev = &rte_eth_devices[port_id];
4123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4124 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4129 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4131 struct rte_eth_dev *dev;
4133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4135 dev = &rte_eth_devices[port_id];
4136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4137 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4141 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4143 struct rte_eth_dev *dev;
4145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4147 dev = &rte_eth_devices[port_id];
4148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4149 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4153 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4155 struct rte_eth_dev *dev;
4157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4159 dev = &rte_eth_devices[port_id];
4160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4161 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4165 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4167 struct rte_eth_dev *dev;
4169 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4171 dev = &rte_eth_devices[port_id];
4172 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4173 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4176 int __rte_experimental
4177 rte_eth_dev_get_module_info(uint16_t port_id,
4178 struct rte_eth_dev_module_info *modinfo)
4180 struct rte_eth_dev *dev;
4182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4184 dev = &rte_eth_devices[port_id];
4185 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4186 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4189 int __rte_experimental
4190 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4191 struct rte_dev_eeprom_info *info)
4193 struct rte_eth_dev *dev;
4195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4197 dev = &rte_eth_devices[port_id];
4198 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4199 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4203 rte_eth_dev_get_dcb_info(uint16_t port_id,
4204 struct rte_eth_dcb_info *dcb_info)
4206 struct rte_eth_dev *dev;
4208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4210 dev = &rte_eth_devices[port_id];
4211 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4214 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4218 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4219 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4221 struct rte_eth_dev *dev;
4223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4224 if (l2_tunnel == NULL) {
4225 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4229 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4230 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4234 dev = &rte_eth_devices[port_id];
4235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4237 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4242 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4243 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4247 struct rte_eth_dev *dev;
4249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4251 if (l2_tunnel == NULL) {
4252 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4256 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4257 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4262 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4266 dev = &rte_eth_devices[port_id];
4267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4269 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4270 l2_tunnel, mask, en));
4274 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4275 const struct rte_eth_desc_lim *desc_lim)
4277 if (desc_lim->nb_align != 0)
4278 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4280 if (desc_lim->nb_max != 0)
4281 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4283 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4287 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4288 uint16_t *nb_rx_desc,
4289 uint16_t *nb_tx_desc)
4291 struct rte_eth_dev *dev;
4292 struct rte_eth_dev_info dev_info;
4294 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4296 dev = &rte_eth_devices[port_id];
4297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4299 rte_eth_dev_info_get(port_id, &dev_info);
4301 if (nb_rx_desc != NULL)
4302 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4304 if (nb_tx_desc != NULL)
4305 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4311 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4313 struct rte_eth_dev *dev;
4315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4320 dev = &rte_eth_devices[port_id];
4322 if (*dev->dev_ops->pool_ops_supported == NULL)
4323 return 1; /* all pools are supported */
4325 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4329 * A set of values to describe the possible states of a switch domain.
4331 enum rte_eth_switch_domain_state {
4332 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4333 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4337 * Array of switch domains available for allocation. Array is sized to
4338 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4339 * ethdev ports in a single process.
4341 static struct rte_eth_dev_switch {
4342 enum rte_eth_switch_domain_state state;
4343 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4345 int __rte_experimental
4346 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4350 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4352 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4353 i < RTE_MAX_ETHPORTS; i++) {
4354 if (rte_eth_switch_domains[i].state ==
4355 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4356 rte_eth_switch_domains[i].state =
4357 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4366 int __rte_experimental
4367 rte_eth_switch_domain_free(uint16_t domain_id)
4369 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4370 domain_id >= RTE_MAX_ETHPORTS)
4373 if (rte_eth_switch_domains[domain_id].state !=
4374 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4377 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4383 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4386 struct rte_kvargs_pair *pair;
4389 arglist->str = strdup(str_in);
4390 if (arglist->str == NULL)
4393 letter = arglist->str;
4396 pair = &arglist->pairs[0];
4399 case 0: /* Initial */
4402 else if (*letter == '\0')
4409 case 1: /* Parsing key */
4410 if (*letter == '=') {
4412 pair->value = letter + 1;
4414 } else if (*letter == ',' || *letter == '\0')
4419 case 2: /* Parsing value */
4422 else if (*letter == ',') {
4425 pair = &arglist->pairs[arglist->count];
4427 } else if (*letter == '\0') {
4430 pair = &arglist->pairs[arglist->count];
4435 case 3: /* Parsing list */
4438 else if (*letter == '\0')
4446 int __rte_experimental
4447 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4449 struct rte_kvargs args;
4450 struct rte_kvargs_pair *pair;
4454 memset(eth_da, 0, sizeof(*eth_da));
4456 result = rte_eth_devargs_tokenise(&args, dargs);
4460 for (i = 0; i < args.count; i++) {
4461 pair = &args.pairs[i];
4462 if (strcmp("representor", pair->key) == 0) {
4463 result = rte_eth_devargs_parse_list(pair->value,
4464 rte_eth_devargs_parse_representor_ports,
4478 RTE_INIT(ethdev_init_log)
4480 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4481 if (rte_eth_dev_logtype >= 0)
4482 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);