1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
337 if (port_id >= RTE_MAX_ETHPORTS)
338 return RTE_MAX_ETHPORTS;
344 rte_eth_dev_shared_data_prepare(void)
346 const unsigned flags = 0;
347 const struct rte_memzone *mz;
349 rte_spinlock_lock(&rte_eth_shared_data_lock);
351 if (rte_eth_dev_shared_data == NULL) {
352 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
353 /* Allocate port data and ownership shared memory. */
354 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
355 sizeof(*rte_eth_dev_shared_data),
356 rte_socket_id(), flags);
358 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
360 rte_panic("Cannot allocate ethdev shared data\n");
362 rte_eth_dev_shared_data = mz->addr;
363 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
364 rte_eth_dev_shared_data->next_owner_id =
365 RTE_ETH_DEV_NO_OWNER + 1;
366 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
367 memset(rte_eth_dev_shared_data->data, 0,
368 sizeof(rte_eth_dev_shared_data->data));
372 rte_spinlock_unlock(&rte_eth_shared_data_lock);
376 is_allocated(const struct rte_eth_dev *ethdev)
378 return ethdev->data->name[0] != '\0';
381 static struct rte_eth_dev *
382 _rte_eth_dev_allocated(const char *name)
386 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
387 if (rte_eth_devices[i].data != NULL &&
388 strcmp(rte_eth_devices[i].data->name, name) == 0)
389 return &rte_eth_devices[i];
395 rte_eth_dev_allocated(const char *name)
397 struct rte_eth_dev *ethdev;
399 rte_eth_dev_shared_data_prepare();
401 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
403 ethdev = _rte_eth_dev_allocated(name);
405 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
411 rte_eth_dev_find_free_port(void)
415 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
416 /* Using shared name field to find a free port. */
417 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
418 RTE_ASSERT(rte_eth_devices[i].state ==
423 return RTE_MAX_ETHPORTS;
426 static struct rte_eth_dev *
427 eth_dev_get(uint16_t port_id)
429 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
431 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
437 rte_eth_dev_allocate(const char *name)
440 struct rte_eth_dev *eth_dev = NULL;
443 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
445 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
449 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
450 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
454 rte_eth_dev_shared_data_prepare();
456 /* Synchronize port creation between primary and secondary threads. */
457 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
459 if (_rte_eth_dev_allocated(name) != NULL) {
461 "Ethernet device with name %s already allocated\n",
466 port_id = rte_eth_dev_find_free_port();
467 if (port_id == RTE_MAX_ETHPORTS) {
469 "Reached maximum number of Ethernet ports\n");
473 eth_dev = eth_dev_get(port_id);
474 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
475 eth_dev->data->port_id = port_id;
476 eth_dev->data->mtu = ETHER_MTU;
479 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
485 * Attach to a port already registered by the primary process, which
486 * makes sure that the same device would have the same port id both
487 * in the primary and secondary process.
490 rte_eth_dev_attach_secondary(const char *name)
493 struct rte_eth_dev *eth_dev = NULL;
495 rte_eth_dev_shared_data_prepare();
497 /* Synchronize port attachment to primary port creation and release. */
498 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
500 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
501 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
504 if (i == RTE_MAX_ETHPORTS) {
506 "Device %s is not driven by the primary process\n",
509 eth_dev = eth_dev_get(i);
510 RTE_ASSERT(eth_dev->data->port_id == i);
513 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
518 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
523 rte_eth_dev_shared_data_prepare();
525 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
526 _rte_eth_dev_callback_process(eth_dev,
527 RTE_ETH_EVENT_DESTROY, NULL);
529 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
531 eth_dev->state = RTE_ETH_DEV_UNUSED;
533 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
534 rte_free(eth_dev->data->rx_queues);
535 rte_free(eth_dev->data->tx_queues);
536 rte_free(eth_dev->data->mac_addrs);
537 rte_free(eth_dev->data->hash_mac_addrs);
538 rte_free(eth_dev->data->dev_private);
539 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
542 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
548 rte_eth_dev_is_valid_port(uint16_t port_id)
550 if (port_id >= RTE_MAX_ETHPORTS ||
551 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
558 rte_eth_is_valid_owner_id(uint64_t owner_id)
560 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
561 rte_eth_dev_shared_data->next_owner_id <= owner_id)
567 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
569 while (port_id < RTE_MAX_ETHPORTS &&
570 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
571 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
572 rte_eth_devices[port_id].data->owner.id != owner_id))
575 if (port_id >= RTE_MAX_ETHPORTS)
576 return RTE_MAX_ETHPORTS;
581 int __rte_experimental
582 rte_eth_dev_owner_new(uint64_t *owner_id)
584 rte_eth_dev_shared_data_prepare();
586 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
588 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
590 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
595 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
596 const struct rte_eth_dev_owner *new_owner)
598 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
599 struct rte_eth_dev_owner *port_owner;
601 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
602 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
607 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
608 !rte_eth_is_valid_owner_id(old_owner_id)) {
610 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
611 old_owner_id, new_owner->id);
615 port_owner = &rte_eth_devices[port_id].data->owner;
616 if (port_owner->id != old_owner_id) {
618 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
619 port_id, port_owner->name, port_owner->id);
623 /* can not truncate (same structure) */
624 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
626 port_owner->id = new_owner->id;
628 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
629 port_id, new_owner->name, new_owner->id);
634 int __rte_experimental
635 rte_eth_dev_owner_set(const uint16_t port_id,
636 const struct rte_eth_dev_owner *owner)
640 rte_eth_dev_shared_data_prepare();
642 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
644 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
646 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
650 int __rte_experimental
651 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
653 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
654 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
657 rte_eth_dev_shared_data_prepare();
659 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
661 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
663 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
667 void __rte_experimental
668 rte_eth_dev_owner_delete(const uint64_t owner_id)
672 rte_eth_dev_shared_data_prepare();
674 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
676 if (rte_eth_is_valid_owner_id(owner_id)) {
677 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
678 if (rte_eth_devices[port_id].data->owner.id == owner_id)
679 memset(&rte_eth_devices[port_id].data->owner, 0,
680 sizeof(struct rte_eth_dev_owner));
681 RTE_ETHDEV_LOG(NOTICE,
682 "All port owners owned by %016"PRIx64" identifier have removed\n",
686 "Invalid owner id=%016"PRIx64"\n",
690 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
693 int __rte_experimental
694 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
697 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
699 rte_eth_dev_shared_data_prepare();
701 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
703 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
704 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
708 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
711 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
716 rte_eth_dev_socket_id(uint16_t port_id)
718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
719 return rte_eth_devices[port_id].data->numa_node;
723 rte_eth_dev_get_sec_ctx(uint16_t port_id)
725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
726 return rte_eth_devices[port_id].security_ctx;
730 rte_eth_dev_count(void)
732 return rte_eth_dev_count_avail();
736 rte_eth_dev_count_avail(void)
743 RTE_ETH_FOREACH_DEV(p)
749 uint16_t __rte_experimental
750 rte_eth_dev_count_total(void)
752 uint16_t port, count = 0;
754 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
755 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
762 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
769 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
773 /* shouldn't check 'rte_eth_devices[i].data',
774 * because it might be overwritten by VDEV PMD */
775 tmp = rte_eth_dev_shared_data->data[port_id].name;
781 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
786 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
790 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
791 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
792 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
802 eth_err(uint16_t port_id, int ret)
806 if (rte_eth_dev_is_removed(port_id))
812 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
814 uint16_t old_nb_queues = dev->data->nb_rx_queues;
818 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
819 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
820 sizeof(dev->data->rx_queues[0]) * nb_queues,
821 RTE_CACHE_LINE_SIZE);
822 if (dev->data->rx_queues == NULL) {
823 dev->data->nb_rx_queues = 0;
826 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
829 rxq = dev->data->rx_queues;
831 for (i = nb_queues; i < old_nb_queues; i++)
832 (*dev->dev_ops->rx_queue_release)(rxq[i]);
833 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
834 RTE_CACHE_LINE_SIZE);
837 if (nb_queues > old_nb_queues) {
838 uint16_t new_qs = nb_queues - old_nb_queues;
840 memset(rxq + old_nb_queues, 0,
841 sizeof(rxq[0]) * new_qs);
844 dev->data->rx_queues = rxq;
846 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
849 rxq = dev->data->rx_queues;
851 for (i = nb_queues; i < old_nb_queues; i++)
852 (*dev->dev_ops->rx_queue_release)(rxq[i]);
854 rte_free(dev->data->rx_queues);
855 dev->data->rx_queues = NULL;
857 dev->data->nb_rx_queues = nb_queues;
862 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
864 struct rte_eth_dev *dev;
866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
868 dev = &rte_eth_devices[port_id];
869 if (!dev->data->dev_started) {
871 "Port %u must be started before start any queue\n",
876 if (rx_queue_id >= dev->data->nb_rx_queues) {
877 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
883 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
885 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
886 rx_queue_id, port_id);
890 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
896 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
898 struct rte_eth_dev *dev;
900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
902 dev = &rte_eth_devices[port_id];
903 if (rx_queue_id >= dev->data->nb_rx_queues) {
904 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
910 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
912 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
913 rx_queue_id, port_id);
917 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
922 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
924 struct rte_eth_dev *dev;
926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
928 dev = &rte_eth_devices[port_id];
929 if (!dev->data->dev_started) {
931 "Port %u must be started before start any queue\n",
936 if (tx_queue_id >= dev->data->nb_tx_queues) {
937 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
943 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
945 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
946 tx_queue_id, port_id);
950 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
954 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
956 struct rte_eth_dev *dev;
958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
960 dev = &rte_eth_devices[port_id];
961 if (tx_queue_id >= dev->data->nb_tx_queues) {
962 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
968 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
970 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
971 tx_queue_id, port_id);
975 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
980 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
982 uint16_t old_nb_queues = dev->data->nb_tx_queues;
986 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
987 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
988 sizeof(dev->data->tx_queues[0]) * nb_queues,
989 RTE_CACHE_LINE_SIZE);
990 if (dev->data->tx_queues == NULL) {
991 dev->data->nb_tx_queues = 0;
994 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
997 txq = dev->data->tx_queues;
999 for (i = nb_queues; i < old_nb_queues; i++)
1000 (*dev->dev_ops->tx_queue_release)(txq[i]);
1001 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1002 RTE_CACHE_LINE_SIZE);
1005 if (nb_queues > old_nb_queues) {
1006 uint16_t new_qs = nb_queues - old_nb_queues;
1008 memset(txq + old_nb_queues, 0,
1009 sizeof(txq[0]) * new_qs);
1012 dev->data->tx_queues = txq;
1014 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1017 txq = dev->data->tx_queues;
1019 for (i = nb_queues; i < old_nb_queues; i++)
1020 (*dev->dev_ops->tx_queue_release)(txq[i]);
1022 rte_free(dev->data->tx_queues);
1023 dev->data->tx_queues = NULL;
1025 dev->data->nb_tx_queues = nb_queues;
1030 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1033 case ETH_SPEED_NUM_10M:
1034 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1035 case ETH_SPEED_NUM_100M:
1036 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1037 case ETH_SPEED_NUM_1G:
1038 return ETH_LINK_SPEED_1G;
1039 case ETH_SPEED_NUM_2_5G:
1040 return ETH_LINK_SPEED_2_5G;
1041 case ETH_SPEED_NUM_5G:
1042 return ETH_LINK_SPEED_5G;
1043 case ETH_SPEED_NUM_10G:
1044 return ETH_LINK_SPEED_10G;
1045 case ETH_SPEED_NUM_20G:
1046 return ETH_LINK_SPEED_20G;
1047 case ETH_SPEED_NUM_25G:
1048 return ETH_LINK_SPEED_25G;
1049 case ETH_SPEED_NUM_40G:
1050 return ETH_LINK_SPEED_40G;
1051 case ETH_SPEED_NUM_50G:
1052 return ETH_LINK_SPEED_50G;
1053 case ETH_SPEED_NUM_56G:
1054 return ETH_LINK_SPEED_56G;
1055 case ETH_SPEED_NUM_100G:
1056 return ETH_LINK_SPEED_100G;
1063 rte_eth_dev_rx_offload_name(uint64_t offload)
1065 const char *name = "UNKNOWN";
1068 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1069 if (offload == rte_rx_offload_names[i].offload) {
1070 name = rte_rx_offload_names[i].name;
1079 rte_eth_dev_tx_offload_name(uint64_t offload)
1081 const char *name = "UNKNOWN";
1084 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1085 if (offload == rte_tx_offload_names[i].offload) {
1086 name = rte_tx_offload_names[i].name;
1095 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1096 const struct rte_eth_conf *dev_conf)
1098 struct rte_eth_dev *dev;
1099 struct rte_eth_dev_info dev_info;
1100 struct rte_eth_conf orig_conf;
1104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1106 dev = &rte_eth_devices[port_id];
1108 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1111 if (dev->data->dev_started) {
1113 "Port %u must be stopped to allow configuration\n",
1118 /* Store original config, as rollback required on failure */
1119 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1122 * Copy the dev_conf parameter into the dev structure.
1123 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1125 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1127 rte_eth_dev_info_get(port_id, &dev_info);
1129 /* If number of queues specified by application for both Rx and Tx is
1130 * zero, use driver preferred values. This cannot be done individually
1131 * as it is valid for either Tx or Rx (but not both) to be zero.
1132 * If driver does not provide any preferred valued, fall back on
1135 if (nb_rx_q == 0 && nb_tx_q == 0) {
1136 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1138 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1139 nb_tx_q = dev_info.default_txportconf.nb_queues;
1141 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1144 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1146 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1147 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1152 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1154 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1155 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1161 * Check that the numbers of RX and TX queues are not greater
1162 * than the maximum number of RX and TX queues supported by the
1163 * configured device.
1165 if (nb_rx_q > dev_info.max_rx_queues) {
1166 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1167 port_id, nb_rx_q, dev_info.max_rx_queues);
1172 if (nb_tx_q > dev_info.max_tx_queues) {
1173 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1174 port_id, nb_tx_q, dev_info.max_tx_queues);
1179 /* Check that the device supports requested interrupts */
1180 if ((dev_conf->intr_conf.lsc == 1) &&
1181 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1182 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1183 dev->device->driver->name);
1187 if ((dev_conf->intr_conf.rmv == 1) &&
1188 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1189 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1190 dev->device->driver->name);
1196 * If jumbo frames are enabled, check that the maximum RX packet
1197 * length is supported by the configured device.
1199 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1200 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1202 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1203 port_id, dev_conf->rxmode.max_rx_pkt_len,
1204 dev_info.max_rx_pktlen);
1207 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1209 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1210 port_id, dev_conf->rxmode.max_rx_pkt_len,
1211 (unsigned)ETHER_MIN_LEN);
1216 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1217 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1218 /* Use default value */
1219 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1223 /* Any requested offloading must be within its device capabilities */
1224 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1225 dev_conf->rxmode.offloads) {
1227 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1228 "capabilities 0x%"PRIx64" in %s()\n",
1229 port_id, dev_conf->rxmode.offloads,
1230 dev_info.rx_offload_capa,
1235 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1236 dev_conf->txmode.offloads) {
1238 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1239 "capabilities 0x%"PRIx64" in %s()\n",
1240 port_id, dev_conf->txmode.offloads,
1241 dev_info.tx_offload_capa,
1247 /* Check that device supports requested rss hash functions. */
1248 if ((dev_info.flow_type_rss_offloads |
1249 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1250 dev_info.flow_type_rss_offloads) {
1252 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1253 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1254 dev_info.flow_type_rss_offloads);
1260 * Setup new number of RX/TX queues and reconfigure device.
1262 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1265 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1271 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1274 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1276 rte_eth_dev_rx_queue_config(dev, 0);
1281 diag = (*dev->dev_ops->dev_configure)(dev);
1283 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1285 rte_eth_dev_rx_queue_config(dev, 0);
1286 rte_eth_dev_tx_queue_config(dev, 0);
1287 ret = eth_err(port_id, diag);
1291 /* Initialize Rx profiling if enabled at compilation time. */
1292 diag = __rte_eth_dev_profile_init(port_id, dev);
1294 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1296 rte_eth_dev_rx_queue_config(dev, 0);
1297 rte_eth_dev_tx_queue_config(dev, 0);
1298 ret = eth_err(port_id, diag);
1305 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1311 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1313 if (dev->data->dev_started) {
1314 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1315 dev->data->port_id);
1319 rte_eth_dev_rx_queue_config(dev, 0);
1320 rte_eth_dev_tx_queue_config(dev, 0);
1322 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1326 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1327 struct rte_eth_dev_info *dev_info)
1329 struct ether_addr *addr;
1334 /* replay MAC address configuration including default MAC */
1335 addr = &dev->data->mac_addrs[0];
1336 if (*dev->dev_ops->mac_addr_set != NULL)
1337 (*dev->dev_ops->mac_addr_set)(dev, addr);
1338 else if (*dev->dev_ops->mac_addr_add != NULL)
1339 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1341 if (*dev->dev_ops->mac_addr_add != NULL) {
1342 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1343 addr = &dev->data->mac_addrs[i];
1345 /* skip zero address */
1346 if (is_zero_ether_addr(addr))
1350 pool_mask = dev->data->mac_pool_sel[i];
1353 if (pool_mask & 1ULL)
1354 (*dev->dev_ops->mac_addr_add)(dev,
1358 } while (pool_mask);
1364 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1365 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1367 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1368 rte_eth_dev_mac_restore(dev, dev_info);
1370 /* replay promiscuous configuration */
1371 if (rte_eth_promiscuous_get(port_id) == 1)
1372 rte_eth_promiscuous_enable(port_id);
1373 else if (rte_eth_promiscuous_get(port_id) == 0)
1374 rte_eth_promiscuous_disable(port_id);
1376 /* replay all multicast configuration */
1377 if (rte_eth_allmulticast_get(port_id) == 1)
1378 rte_eth_allmulticast_enable(port_id);
1379 else if (rte_eth_allmulticast_get(port_id) == 0)
1380 rte_eth_allmulticast_disable(port_id);
1384 rte_eth_dev_start(uint16_t port_id)
1386 struct rte_eth_dev *dev;
1387 struct rte_eth_dev_info dev_info;
1390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1392 dev = &rte_eth_devices[port_id];
1394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1396 if (dev->data->dev_started != 0) {
1397 RTE_ETHDEV_LOG(INFO,
1398 "Device with port_id=%"PRIu16" already started\n",
1403 rte_eth_dev_info_get(port_id, &dev_info);
1405 /* Lets restore MAC now if device does not support live change */
1406 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1407 rte_eth_dev_mac_restore(dev, &dev_info);
1409 diag = (*dev->dev_ops->dev_start)(dev);
1411 dev->data->dev_started = 1;
1413 return eth_err(port_id, diag);
1415 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1417 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1418 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1419 (*dev->dev_ops->link_update)(dev, 0);
1425 rte_eth_dev_stop(uint16_t port_id)
1427 struct rte_eth_dev *dev;
1429 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1430 dev = &rte_eth_devices[port_id];
1432 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1434 if (dev->data->dev_started == 0) {
1435 RTE_ETHDEV_LOG(INFO,
1436 "Device with port_id=%"PRIu16" already stopped\n",
1441 dev->data->dev_started = 0;
1442 (*dev->dev_ops->dev_stop)(dev);
1446 rte_eth_dev_set_link_up(uint16_t port_id)
1448 struct rte_eth_dev *dev;
1450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1452 dev = &rte_eth_devices[port_id];
1454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1455 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1459 rte_eth_dev_set_link_down(uint16_t port_id)
1461 struct rte_eth_dev *dev;
1463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1465 dev = &rte_eth_devices[port_id];
1467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1468 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1472 rte_eth_dev_close(uint16_t port_id)
1474 struct rte_eth_dev *dev;
1476 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1477 dev = &rte_eth_devices[port_id];
1479 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1480 dev->data->dev_started = 0;
1481 (*dev->dev_ops->dev_close)(dev);
1483 /* check behaviour flag - temporary for PMD migration */
1484 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1485 /* new behaviour: send event + reset state + free all data */
1486 rte_eth_dev_release_port(dev);
1489 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1490 "The driver %s should migrate to the new behaviour.\n",
1491 dev->device->driver->name);
1492 /* old behaviour: only free queue arrays */
1493 dev->data->nb_rx_queues = 0;
1494 rte_free(dev->data->rx_queues);
1495 dev->data->rx_queues = NULL;
1496 dev->data->nb_tx_queues = 0;
1497 rte_free(dev->data->tx_queues);
1498 dev->data->tx_queues = NULL;
1502 rte_eth_dev_reset(uint16_t port_id)
1504 struct rte_eth_dev *dev;
1507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1508 dev = &rte_eth_devices[port_id];
1510 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1512 rte_eth_dev_stop(port_id);
1513 ret = dev->dev_ops->dev_reset(dev);
1515 return eth_err(port_id, ret);
1518 int __rte_experimental
1519 rte_eth_dev_is_removed(uint16_t port_id)
1521 struct rte_eth_dev *dev;
1524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1526 dev = &rte_eth_devices[port_id];
1528 if (dev->state == RTE_ETH_DEV_REMOVED)
1531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1533 ret = dev->dev_ops->is_removed(dev);
1535 /* Device is physically removed. */
1536 dev->state = RTE_ETH_DEV_REMOVED;
1542 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1543 uint16_t nb_rx_desc, unsigned int socket_id,
1544 const struct rte_eth_rxconf *rx_conf,
1545 struct rte_mempool *mp)
1548 uint32_t mbp_buf_size;
1549 struct rte_eth_dev *dev;
1550 struct rte_eth_dev_info dev_info;
1551 struct rte_eth_rxconf local_conf;
1554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1556 dev = &rte_eth_devices[port_id];
1557 if (rx_queue_id >= dev->data->nb_rx_queues) {
1558 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1562 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1566 * Check the size of the mbuf data buffer.
1567 * This value must be provided in the private data of the memory pool.
1568 * First check that the memory pool has a valid private data.
1570 rte_eth_dev_info_get(port_id, &dev_info);
1571 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1572 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1573 mp->name, (int)mp->private_data_size,
1574 (int)sizeof(struct rte_pktmbuf_pool_private));
1577 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1579 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1581 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1582 mp->name, (int)mbp_buf_size,
1583 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1584 (int)RTE_PKTMBUF_HEADROOM,
1585 (int)dev_info.min_rx_bufsize);
1589 /* Use default specified by driver, if nb_rx_desc is zero */
1590 if (nb_rx_desc == 0) {
1591 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1592 /* If driver default is also zero, fall back on EAL default */
1593 if (nb_rx_desc == 0)
1594 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1597 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1598 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1599 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1602 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1603 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1604 dev_info.rx_desc_lim.nb_min,
1605 dev_info.rx_desc_lim.nb_align);
1609 if (dev->data->dev_started &&
1610 !(dev_info.dev_capa &
1611 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1614 if (dev->data->dev_started &&
1615 (dev->data->rx_queue_state[rx_queue_id] !=
1616 RTE_ETH_QUEUE_STATE_STOPPED))
1619 rxq = dev->data->rx_queues;
1620 if (rxq[rx_queue_id]) {
1621 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1623 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1624 rxq[rx_queue_id] = NULL;
1627 if (rx_conf == NULL)
1628 rx_conf = &dev_info.default_rxconf;
1630 local_conf = *rx_conf;
1633 * If an offloading has already been enabled in
1634 * rte_eth_dev_configure(), it has been enabled on all queues,
1635 * so there is no need to enable it in this queue again.
1636 * The local_conf.offloads input to underlying PMD only carries
1637 * those offloadings which are only enabled on this queue and
1638 * not enabled on all queues.
1640 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1643 * New added offloadings for this queue are those not enabled in
1644 * rte_eth_dev_configure() and they must be per-queue type.
1645 * A pure per-port offloading can't be enabled on a queue while
1646 * disabled on another queue. A pure per-port offloading can't
1647 * be enabled for any queue as new added one if it hasn't been
1648 * enabled in rte_eth_dev_configure().
1650 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1651 local_conf.offloads) {
1653 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1654 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1655 port_id, rx_queue_id, local_conf.offloads,
1656 dev_info.rx_queue_offload_capa,
1661 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1662 socket_id, &local_conf, mp);
1664 if (!dev->data->min_rx_buf_size ||
1665 dev->data->min_rx_buf_size > mbp_buf_size)
1666 dev->data->min_rx_buf_size = mbp_buf_size;
1669 return eth_err(port_id, ret);
1673 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1674 uint16_t nb_tx_desc, unsigned int socket_id,
1675 const struct rte_eth_txconf *tx_conf)
1677 struct rte_eth_dev *dev;
1678 struct rte_eth_dev_info dev_info;
1679 struct rte_eth_txconf local_conf;
1682 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1684 dev = &rte_eth_devices[port_id];
1685 if (tx_queue_id >= dev->data->nb_tx_queues) {
1686 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1693 rte_eth_dev_info_get(port_id, &dev_info);
1695 /* Use default specified by driver, if nb_tx_desc is zero */
1696 if (nb_tx_desc == 0) {
1697 nb_tx_desc = dev_info.default_txportconf.ring_size;
1698 /* If driver default is zero, fall back on EAL default */
1699 if (nb_tx_desc == 0)
1700 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1702 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1703 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1704 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1706 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1707 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1708 dev_info.tx_desc_lim.nb_min,
1709 dev_info.tx_desc_lim.nb_align);
1713 if (dev->data->dev_started &&
1714 !(dev_info.dev_capa &
1715 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1718 if (dev->data->dev_started &&
1719 (dev->data->tx_queue_state[tx_queue_id] !=
1720 RTE_ETH_QUEUE_STATE_STOPPED))
1723 txq = dev->data->tx_queues;
1724 if (txq[tx_queue_id]) {
1725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1727 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1728 txq[tx_queue_id] = NULL;
1731 if (tx_conf == NULL)
1732 tx_conf = &dev_info.default_txconf;
1734 local_conf = *tx_conf;
1737 * If an offloading has already been enabled in
1738 * rte_eth_dev_configure(), it has been enabled on all queues,
1739 * so there is no need to enable it in this queue again.
1740 * The local_conf.offloads input to underlying PMD only carries
1741 * those offloadings which are only enabled on this queue and
1742 * not enabled on all queues.
1744 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1747 * New added offloadings for this queue are those not enabled in
1748 * rte_eth_dev_configure() and they must be per-queue type.
1749 * A pure per-port offloading can't be enabled on a queue while
1750 * disabled on another queue. A pure per-port offloading can't
1751 * be enabled for any queue as new added one if it hasn't been
1752 * enabled in rte_eth_dev_configure().
1754 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1755 local_conf.offloads) {
1757 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1758 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1759 port_id, tx_queue_id, local_conf.offloads,
1760 dev_info.tx_queue_offload_capa,
1765 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1766 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1770 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1771 void *userdata __rte_unused)
1775 for (i = 0; i < unsent; i++)
1776 rte_pktmbuf_free(pkts[i]);
1780 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1783 uint64_t *count = userdata;
1786 for (i = 0; i < unsent; i++)
1787 rte_pktmbuf_free(pkts[i]);
1793 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1794 buffer_tx_error_fn cbfn, void *userdata)
1796 buffer->error_callback = cbfn;
1797 buffer->error_userdata = userdata;
1802 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1809 buffer->size = size;
1810 if (buffer->error_callback == NULL) {
1811 ret = rte_eth_tx_buffer_set_err_callback(
1812 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1819 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1821 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1824 /* Validate Input Data. Bail if not valid or not supported. */
1825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1828 /* Call driver to free pending mbufs. */
1829 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1831 return eth_err(port_id, ret);
1835 rte_eth_promiscuous_enable(uint16_t port_id)
1837 struct rte_eth_dev *dev;
1839 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1840 dev = &rte_eth_devices[port_id];
1842 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1843 (*dev->dev_ops->promiscuous_enable)(dev);
1844 dev->data->promiscuous = 1;
1848 rte_eth_promiscuous_disable(uint16_t port_id)
1850 struct rte_eth_dev *dev;
1852 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1853 dev = &rte_eth_devices[port_id];
1855 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1856 dev->data->promiscuous = 0;
1857 (*dev->dev_ops->promiscuous_disable)(dev);
1861 rte_eth_promiscuous_get(uint16_t port_id)
1863 struct rte_eth_dev *dev;
1865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1867 dev = &rte_eth_devices[port_id];
1868 return dev->data->promiscuous;
1872 rte_eth_allmulticast_enable(uint16_t port_id)
1874 struct rte_eth_dev *dev;
1876 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1877 dev = &rte_eth_devices[port_id];
1879 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1880 (*dev->dev_ops->allmulticast_enable)(dev);
1881 dev->data->all_multicast = 1;
1885 rte_eth_allmulticast_disable(uint16_t port_id)
1887 struct rte_eth_dev *dev;
1889 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1890 dev = &rte_eth_devices[port_id];
1892 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1893 dev->data->all_multicast = 0;
1894 (*dev->dev_ops->allmulticast_disable)(dev);
1898 rte_eth_allmulticast_get(uint16_t port_id)
1900 struct rte_eth_dev *dev;
1902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1904 dev = &rte_eth_devices[port_id];
1905 return dev->data->all_multicast;
1909 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1911 struct rte_eth_dev *dev;
1913 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1914 dev = &rte_eth_devices[port_id];
1916 if (dev->data->dev_conf.intr_conf.lsc &&
1917 dev->data->dev_started)
1918 rte_eth_linkstatus_get(dev, eth_link);
1920 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1921 (*dev->dev_ops->link_update)(dev, 1);
1922 *eth_link = dev->data->dev_link;
1927 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1929 struct rte_eth_dev *dev;
1931 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1932 dev = &rte_eth_devices[port_id];
1934 if (dev->data->dev_conf.intr_conf.lsc &&
1935 dev->data->dev_started)
1936 rte_eth_linkstatus_get(dev, eth_link);
1938 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1939 (*dev->dev_ops->link_update)(dev, 0);
1940 *eth_link = dev->data->dev_link;
1945 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1947 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1951 dev = &rte_eth_devices[port_id];
1952 memset(stats, 0, sizeof(*stats));
1954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1955 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1956 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1960 rte_eth_stats_reset(uint16_t port_id)
1962 struct rte_eth_dev *dev;
1964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1965 dev = &rte_eth_devices[port_id];
1967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1968 (*dev->dev_ops->stats_reset)(dev);
1969 dev->data->rx_mbuf_alloc_failed = 0;
1975 get_xstats_basic_count(struct rte_eth_dev *dev)
1977 uint16_t nb_rxqs, nb_txqs;
1980 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1981 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1983 count = RTE_NB_STATS;
1984 count += nb_rxqs * RTE_NB_RXQ_STATS;
1985 count += nb_txqs * RTE_NB_TXQ_STATS;
1991 get_xstats_count(uint16_t port_id)
1993 struct rte_eth_dev *dev;
1996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1997 dev = &rte_eth_devices[port_id];
1998 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1999 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2002 return eth_err(port_id, count);
2004 if (dev->dev_ops->xstats_get_names != NULL) {
2005 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2007 return eth_err(port_id, count);
2012 count += get_xstats_basic_count(dev);
2018 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2021 int cnt_xstats, idx_xstat;
2023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2026 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2031 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2036 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2037 if (cnt_xstats < 0) {
2038 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2042 /* Get id-name lookup table */
2043 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2045 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2046 port_id, xstats_names, cnt_xstats, NULL)) {
2047 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2051 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2052 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2061 /* retrieve basic stats names */
2063 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2064 struct rte_eth_xstat_name *xstats_names)
2066 int cnt_used_entries = 0;
2067 uint32_t idx, id_queue;
2070 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2071 snprintf(xstats_names[cnt_used_entries].name,
2072 sizeof(xstats_names[0].name),
2073 "%s", rte_stats_strings[idx].name);
2076 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2077 for (id_queue = 0; id_queue < num_q; id_queue++) {
2078 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2079 snprintf(xstats_names[cnt_used_entries].name,
2080 sizeof(xstats_names[0].name),
2082 id_queue, rte_rxq_stats_strings[idx].name);
2087 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2088 for (id_queue = 0; id_queue < num_q; id_queue++) {
2089 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2090 snprintf(xstats_names[cnt_used_entries].name,
2091 sizeof(xstats_names[0].name),
2093 id_queue, rte_txq_stats_strings[idx].name);
2097 return cnt_used_entries;
2100 /* retrieve ethdev extended statistics names */
2102 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2103 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2106 struct rte_eth_xstat_name *xstats_names_copy;
2107 unsigned int no_basic_stat_requested = 1;
2108 unsigned int no_ext_stat_requested = 1;
2109 unsigned int expected_entries;
2110 unsigned int basic_count;
2111 struct rte_eth_dev *dev;
2115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2116 dev = &rte_eth_devices[port_id];
2118 basic_count = get_xstats_basic_count(dev);
2119 ret = get_xstats_count(port_id);
2122 expected_entries = (unsigned int)ret;
2124 /* Return max number of stats if no ids given */
2127 return expected_entries;
2128 else if (xstats_names && size < expected_entries)
2129 return expected_entries;
2132 if (ids && !xstats_names)
2135 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2136 uint64_t ids_copy[size];
2138 for (i = 0; i < size; i++) {
2139 if (ids[i] < basic_count) {
2140 no_basic_stat_requested = 0;
2145 * Convert ids to xstats ids that PMD knows.
2146 * ids known by user are basic + extended stats.
2148 ids_copy[i] = ids[i] - basic_count;
2151 if (no_basic_stat_requested)
2152 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2153 xstats_names, ids_copy, size);
2156 /* Retrieve all stats */
2158 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2160 if (num_stats < 0 || num_stats > (int)expected_entries)
2163 return expected_entries;
2166 xstats_names_copy = calloc(expected_entries,
2167 sizeof(struct rte_eth_xstat_name));
2169 if (!xstats_names_copy) {
2170 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2175 for (i = 0; i < size; i++) {
2176 if (ids[i] >= basic_count) {
2177 no_ext_stat_requested = 0;
2183 /* Fill xstats_names_copy structure */
2184 if (ids && no_ext_stat_requested) {
2185 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2187 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2190 free(xstats_names_copy);
2196 for (i = 0; i < size; i++) {
2197 if (ids[i] >= expected_entries) {
2198 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2199 free(xstats_names_copy);
2202 xstats_names[i] = xstats_names_copy[ids[i]];
2205 free(xstats_names_copy);
2210 rte_eth_xstats_get_names(uint16_t port_id,
2211 struct rte_eth_xstat_name *xstats_names,
2214 struct rte_eth_dev *dev;
2215 int cnt_used_entries;
2216 int cnt_expected_entries;
2217 int cnt_driver_entries;
2219 cnt_expected_entries = get_xstats_count(port_id);
2220 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2221 (int)size < cnt_expected_entries)
2222 return cnt_expected_entries;
2224 /* port_id checked in get_xstats_count() */
2225 dev = &rte_eth_devices[port_id];
2227 cnt_used_entries = rte_eth_basic_stats_get_names(
2230 if (dev->dev_ops->xstats_get_names != NULL) {
2231 /* If there are any driver-specific xstats, append them
2234 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2236 xstats_names + cnt_used_entries,
2237 size - cnt_used_entries);
2238 if (cnt_driver_entries < 0)
2239 return eth_err(port_id, cnt_driver_entries);
2240 cnt_used_entries += cnt_driver_entries;
2243 return cnt_used_entries;
2248 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2250 struct rte_eth_dev *dev;
2251 struct rte_eth_stats eth_stats;
2252 unsigned int count = 0, i, q;
2253 uint64_t val, *stats_ptr;
2254 uint16_t nb_rxqs, nb_txqs;
2257 ret = rte_eth_stats_get(port_id, ð_stats);
2261 dev = &rte_eth_devices[port_id];
2263 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2264 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2267 for (i = 0; i < RTE_NB_STATS; i++) {
2268 stats_ptr = RTE_PTR_ADD(ð_stats,
2269 rte_stats_strings[i].offset);
2271 xstats[count++].value = val;
2275 for (q = 0; q < nb_rxqs; q++) {
2276 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2277 stats_ptr = RTE_PTR_ADD(ð_stats,
2278 rte_rxq_stats_strings[i].offset +
2279 q * sizeof(uint64_t));
2281 xstats[count++].value = val;
2286 for (q = 0; q < nb_txqs; q++) {
2287 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2288 stats_ptr = RTE_PTR_ADD(ð_stats,
2289 rte_txq_stats_strings[i].offset +
2290 q * sizeof(uint64_t));
2292 xstats[count++].value = val;
2298 /* retrieve ethdev extended statistics */
2300 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2301 uint64_t *values, unsigned int size)
2303 unsigned int no_basic_stat_requested = 1;
2304 unsigned int no_ext_stat_requested = 1;
2305 unsigned int num_xstats_filled;
2306 unsigned int basic_count;
2307 uint16_t expected_entries;
2308 struct rte_eth_dev *dev;
2312 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2313 ret = get_xstats_count(port_id);
2316 expected_entries = (uint16_t)ret;
2317 struct rte_eth_xstat xstats[expected_entries];
2318 dev = &rte_eth_devices[port_id];
2319 basic_count = get_xstats_basic_count(dev);
2321 /* Return max number of stats if no ids given */
2324 return expected_entries;
2325 else if (values && size < expected_entries)
2326 return expected_entries;
2332 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2333 unsigned int basic_count = get_xstats_basic_count(dev);
2334 uint64_t ids_copy[size];
2336 for (i = 0; i < size; i++) {
2337 if (ids[i] < basic_count) {
2338 no_basic_stat_requested = 0;
2343 * Convert ids to xstats ids that PMD knows.
2344 * ids known by user are basic + extended stats.
2346 ids_copy[i] = ids[i] - basic_count;
2349 if (no_basic_stat_requested)
2350 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2355 for (i = 0; i < size; i++) {
2356 if (ids[i] >= basic_count) {
2357 no_ext_stat_requested = 0;
2363 /* Fill the xstats structure */
2364 if (ids && no_ext_stat_requested)
2365 ret = rte_eth_basic_stats_get(port_id, xstats);
2367 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2371 num_xstats_filled = (unsigned int)ret;
2373 /* Return all stats */
2375 for (i = 0; i < num_xstats_filled; i++)
2376 values[i] = xstats[i].value;
2377 return expected_entries;
2381 for (i = 0; i < size; i++) {
2382 if (ids[i] >= expected_entries) {
2383 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2386 values[i] = xstats[ids[i]].value;
2392 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2395 struct rte_eth_dev *dev;
2396 unsigned int count = 0, i;
2397 signed int xcount = 0;
2398 uint16_t nb_rxqs, nb_txqs;
2401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2403 dev = &rte_eth_devices[port_id];
2405 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2406 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2408 /* Return generic statistics */
2409 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2410 (nb_txqs * RTE_NB_TXQ_STATS);
2412 /* implemented by the driver */
2413 if (dev->dev_ops->xstats_get != NULL) {
2414 /* Retrieve the xstats from the driver at the end of the
2417 xcount = (*dev->dev_ops->xstats_get)(dev,
2418 xstats ? xstats + count : NULL,
2419 (n > count) ? n - count : 0);
2422 return eth_err(port_id, xcount);
2425 if (n < count + xcount || xstats == NULL)
2426 return count + xcount;
2428 /* now fill the xstats structure */
2429 ret = rte_eth_basic_stats_get(port_id, xstats);
2434 for (i = 0; i < count; i++)
2436 /* add an offset to driver-specific stats */
2437 for ( ; i < count + xcount; i++)
2438 xstats[i].id += count;
2440 return count + xcount;
2443 /* reset ethdev extended statistics */
2445 rte_eth_xstats_reset(uint16_t port_id)
2447 struct rte_eth_dev *dev;
2449 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2450 dev = &rte_eth_devices[port_id];
2452 /* implemented by the driver */
2453 if (dev->dev_ops->xstats_reset != NULL) {
2454 (*dev->dev_ops->xstats_reset)(dev);
2458 /* fallback to default */
2459 rte_eth_stats_reset(port_id);
2463 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2466 struct rte_eth_dev *dev;
2468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2470 dev = &rte_eth_devices[port_id];
2472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2474 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2477 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2480 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2483 return (*dev->dev_ops->queue_stats_mapping_set)
2484 (dev, queue_id, stat_idx, is_rx);
2489 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2492 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2493 stat_idx, STAT_QMAP_TX));
2498 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2501 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2502 stat_idx, STAT_QMAP_RX));
2506 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2508 struct rte_eth_dev *dev;
2510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2511 dev = &rte_eth_devices[port_id];
2513 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2514 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2515 fw_version, fw_size));
2519 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2521 struct rte_eth_dev *dev;
2522 const struct rte_eth_desc_lim lim = {
2523 .nb_max = UINT16_MAX,
2528 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2529 dev = &rte_eth_devices[port_id];
2531 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2532 dev_info->rx_desc_lim = lim;
2533 dev_info->tx_desc_lim = lim;
2534 dev_info->device = dev->device;
2536 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2537 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2538 dev_info->driver_name = dev->device->driver->name;
2539 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2540 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2542 dev_info->dev_flags = &dev->data->dev_flags;
2546 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2547 uint32_t *ptypes, int num)
2550 struct rte_eth_dev *dev;
2551 const uint32_t *all_ptypes;
2553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2554 dev = &rte_eth_devices[port_id];
2555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2556 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2561 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2562 if (all_ptypes[i] & ptype_mask) {
2564 ptypes[j] = all_ptypes[i];
2572 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2574 struct rte_eth_dev *dev;
2576 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2577 dev = &rte_eth_devices[port_id];
2578 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2583 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2585 struct rte_eth_dev *dev;
2587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2589 dev = &rte_eth_devices[port_id];
2590 *mtu = dev->data->mtu;
2595 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2598 struct rte_eth_dev *dev;
2600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2601 dev = &rte_eth_devices[port_id];
2602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2604 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2606 dev->data->mtu = mtu;
2608 return eth_err(port_id, ret);
2612 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2614 struct rte_eth_dev *dev;
2617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2618 dev = &rte_eth_devices[port_id];
2619 if (!(dev->data->dev_conf.rxmode.offloads &
2620 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2621 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2626 if (vlan_id > 4095) {
2627 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2633 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2635 struct rte_vlan_filter_conf *vfc;
2639 vfc = &dev->data->vlan_filter_conf;
2640 vidx = vlan_id / 64;
2641 vbit = vlan_id % 64;
2644 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2646 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2649 return eth_err(port_id, ret);
2653 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2656 struct rte_eth_dev *dev;
2658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2659 dev = &rte_eth_devices[port_id];
2660 if (rx_queue_id >= dev->data->nb_rx_queues) {
2661 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2666 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2672 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2673 enum rte_vlan_type vlan_type,
2676 struct rte_eth_dev *dev;
2678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2679 dev = &rte_eth_devices[port_id];
2680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2682 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2687 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2689 struct rte_eth_dev *dev;
2693 uint64_t orig_offloads;
2695 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2696 dev = &rte_eth_devices[port_id];
2698 /* save original values in case of failure */
2699 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2701 /*check which option changed by application*/
2702 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2703 org = !!(dev->data->dev_conf.rxmode.offloads &
2704 DEV_RX_OFFLOAD_VLAN_STRIP);
2707 dev->data->dev_conf.rxmode.offloads |=
2708 DEV_RX_OFFLOAD_VLAN_STRIP;
2710 dev->data->dev_conf.rxmode.offloads &=
2711 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2712 mask |= ETH_VLAN_STRIP_MASK;
2715 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2716 org = !!(dev->data->dev_conf.rxmode.offloads &
2717 DEV_RX_OFFLOAD_VLAN_FILTER);
2720 dev->data->dev_conf.rxmode.offloads |=
2721 DEV_RX_OFFLOAD_VLAN_FILTER;
2723 dev->data->dev_conf.rxmode.offloads &=
2724 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2725 mask |= ETH_VLAN_FILTER_MASK;
2728 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2729 org = !!(dev->data->dev_conf.rxmode.offloads &
2730 DEV_RX_OFFLOAD_VLAN_EXTEND);
2733 dev->data->dev_conf.rxmode.offloads |=
2734 DEV_RX_OFFLOAD_VLAN_EXTEND;
2736 dev->data->dev_conf.rxmode.offloads &=
2737 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2738 mask |= ETH_VLAN_EXTEND_MASK;
2745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2746 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2748 /* hit an error restore original values */
2749 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2752 return eth_err(port_id, ret);
2756 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2758 struct rte_eth_dev *dev;
2761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2762 dev = &rte_eth_devices[port_id];
2764 if (dev->data->dev_conf.rxmode.offloads &
2765 DEV_RX_OFFLOAD_VLAN_STRIP)
2766 ret |= ETH_VLAN_STRIP_OFFLOAD;
2768 if (dev->data->dev_conf.rxmode.offloads &
2769 DEV_RX_OFFLOAD_VLAN_FILTER)
2770 ret |= ETH_VLAN_FILTER_OFFLOAD;
2772 if (dev->data->dev_conf.rxmode.offloads &
2773 DEV_RX_OFFLOAD_VLAN_EXTEND)
2774 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2780 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2782 struct rte_eth_dev *dev;
2784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2785 dev = &rte_eth_devices[port_id];
2786 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2788 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2792 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2794 struct rte_eth_dev *dev;
2796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2797 dev = &rte_eth_devices[port_id];
2798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2799 memset(fc_conf, 0, sizeof(*fc_conf));
2800 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2804 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2806 struct rte_eth_dev *dev;
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2810 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2814 dev = &rte_eth_devices[port_id];
2815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2816 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2820 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2821 struct rte_eth_pfc_conf *pfc_conf)
2823 struct rte_eth_dev *dev;
2825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2826 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2827 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2831 dev = &rte_eth_devices[port_id];
2832 /* High water, low water validation are device specific */
2833 if (*dev->dev_ops->priority_flow_ctrl_set)
2834 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2840 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2848 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2849 for (i = 0; i < num; i++) {
2850 if (reta_conf[i].mask)
2858 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2862 uint16_t i, idx, shift;
2868 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2872 for (i = 0; i < reta_size; i++) {
2873 idx = i / RTE_RETA_GROUP_SIZE;
2874 shift = i % RTE_RETA_GROUP_SIZE;
2875 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2876 (reta_conf[idx].reta[shift] >= max_rxq)) {
2878 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2880 reta_conf[idx].reta[shift], max_rxq);
2889 rte_eth_dev_rss_reta_update(uint16_t port_id,
2890 struct rte_eth_rss_reta_entry64 *reta_conf,
2893 struct rte_eth_dev *dev;
2896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2897 /* Check mask bits */
2898 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2902 dev = &rte_eth_devices[port_id];
2904 /* Check entry value */
2905 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2906 dev->data->nb_rx_queues);
2910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2911 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2916 rte_eth_dev_rss_reta_query(uint16_t port_id,
2917 struct rte_eth_rss_reta_entry64 *reta_conf,
2920 struct rte_eth_dev *dev;
2923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2925 /* Check mask bits */
2926 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2930 dev = &rte_eth_devices[port_id];
2931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2932 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2937 rte_eth_dev_rss_hash_update(uint16_t port_id,
2938 struct rte_eth_rss_conf *rss_conf)
2940 struct rte_eth_dev *dev;
2941 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 dev = &rte_eth_devices[port_id];
2945 rte_eth_dev_info_get(port_id, &dev_info);
2946 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2947 dev_info.flow_type_rss_offloads) {
2949 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2950 port_id, rss_conf->rss_hf,
2951 dev_info.flow_type_rss_offloads);
2954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2955 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2960 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2961 struct rte_eth_rss_conf *rss_conf)
2963 struct rte_eth_dev *dev;
2965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2966 dev = &rte_eth_devices[port_id];
2967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2968 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2973 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2974 struct rte_eth_udp_tunnel *udp_tunnel)
2976 struct rte_eth_dev *dev;
2978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2979 if (udp_tunnel == NULL) {
2980 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2984 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2985 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2989 dev = &rte_eth_devices[port_id];
2990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2991 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2996 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2997 struct rte_eth_udp_tunnel *udp_tunnel)
2999 struct rte_eth_dev *dev;
3001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3002 dev = &rte_eth_devices[port_id];
3004 if (udp_tunnel == NULL) {
3005 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3009 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3010 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3015 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3020 rte_eth_led_on(uint16_t port_id)
3022 struct rte_eth_dev *dev;
3024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3025 dev = &rte_eth_devices[port_id];
3026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3027 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3031 rte_eth_led_off(uint16_t port_id)
3033 struct rte_eth_dev *dev;
3035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3036 dev = &rte_eth_devices[port_id];
3037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3038 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3042 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3046 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3048 struct rte_eth_dev_info dev_info;
3049 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3053 rte_eth_dev_info_get(port_id, &dev_info);
3055 for (i = 0; i < dev_info.max_mac_addrs; i++)
3056 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3062 static const struct ether_addr null_mac_addr;
3065 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3068 struct rte_eth_dev *dev;
3073 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3074 dev = &rte_eth_devices[port_id];
3075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3077 if (is_zero_ether_addr(addr)) {
3078 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3082 if (pool >= ETH_64_POOLS) {
3083 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3087 index = get_mac_addr_index(port_id, addr);
3089 index = get_mac_addr_index(port_id, &null_mac_addr);
3091 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3096 pool_mask = dev->data->mac_pool_sel[index];
3098 /* Check if both MAC address and pool is already there, and do nothing */
3099 if (pool_mask & (1ULL << pool))
3104 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3107 /* Update address in NIC data structure */
3108 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3110 /* Update pool bitmap in NIC data structure */
3111 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3114 return eth_err(port_id, ret);
3118 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3120 struct rte_eth_dev *dev;
3123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3124 dev = &rte_eth_devices[port_id];
3125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3127 index = get_mac_addr_index(port_id, addr);
3130 "Port %u: Cannot remove default MAC address\n",
3133 } else if (index < 0)
3134 return 0; /* Do nothing if address wasn't found */
3137 (*dev->dev_ops->mac_addr_remove)(dev, index);
3139 /* Update address in NIC data structure */
3140 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3142 /* reset pool bitmap */
3143 dev->data->mac_pool_sel[index] = 0;
3149 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3151 struct rte_eth_dev *dev;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 if (!is_valid_assigned_ether_addr(addr))
3159 dev = &rte_eth_devices[port_id];
3160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3162 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3166 /* Update default address in NIC data structure */
3167 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3174 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3178 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3180 struct rte_eth_dev_info dev_info;
3181 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3184 rte_eth_dev_info_get(port_id, &dev_info);
3185 if (!dev->data->hash_mac_addrs)
3188 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3189 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3190 ETHER_ADDR_LEN) == 0)
3197 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3202 struct rte_eth_dev *dev;
3204 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3206 dev = &rte_eth_devices[port_id];
3207 if (is_zero_ether_addr(addr)) {
3208 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3213 index = get_hash_mac_addr_index(port_id, addr);
3214 /* Check if it's already there, and do nothing */
3215 if ((index >= 0) && on)
3221 "Port %u: the MAC address was not set in UTA\n",
3226 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3228 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3235 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3237 /* Update address in NIC data structure */
3239 ether_addr_copy(addr,
3240 &dev->data->hash_mac_addrs[index]);
3242 ether_addr_copy(&null_mac_addr,
3243 &dev->data->hash_mac_addrs[index]);
3246 return eth_err(port_id, ret);
3250 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3252 struct rte_eth_dev *dev;
3254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3256 dev = &rte_eth_devices[port_id];
3258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3259 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3263 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3266 struct rte_eth_dev *dev;
3267 struct rte_eth_dev_info dev_info;
3268 struct rte_eth_link link;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3272 dev = &rte_eth_devices[port_id];
3273 rte_eth_dev_info_get(port_id, &dev_info);
3274 link = dev->data->dev_link;
3276 if (queue_idx > dev_info.max_tx_queues) {
3278 "Set queue rate limit:port %u: invalid queue id=%u\n",
3279 port_id, queue_idx);
3283 if (tx_rate > link.link_speed) {
3285 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3286 tx_rate, link.link_speed);
3290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3291 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3292 queue_idx, tx_rate));
3296 rte_eth_mirror_rule_set(uint16_t port_id,
3297 struct rte_eth_mirror_conf *mirror_conf,
3298 uint8_t rule_id, uint8_t on)
3300 struct rte_eth_dev *dev;
3302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 if (mirror_conf->rule_type == 0) {
3304 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3308 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3309 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3314 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3315 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3316 (mirror_conf->pool_mask == 0)) {
3318 "Invalid mirror pool, pool mask can not be 0\n");
3322 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3323 mirror_conf->vlan.vlan_mask == 0) {
3325 "Invalid vlan mask, vlan mask can not be 0\n");
3329 dev = &rte_eth_devices[port_id];
3330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3332 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3333 mirror_conf, rule_id, on));
3337 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3339 struct rte_eth_dev *dev;
3341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3343 dev = &rte_eth_devices[port_id];
3344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3346 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3350 RTE_INIT(eth_dev_init_cb_lists)
3354 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3355 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3359 rte_eth_dev_callback_register(uint16_t port_id,
3360 enum rte_eth_event_type event,
3361 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3363 struct rte_eth_dev *dev;
3364 struct rte_eth_dev_callback *user_cb;
3365 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3371 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3372 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3376 if (port_id == RTE_ETH_ALL) {
3378 last_port = RTE_MAX_ETHPORTS - 1;
3380 next_port = last_port = port_id;
3383 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3386 dev = &rte_eth_devices[next_port];
3388 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3389 if (user_cb->cb_fn == cb_fn &&
3390 user_cb->cb_arg == cb_arg &&
3391 user_cb->event == event) {
3396 /* create a new callback. */
3397 if (user_cb == NULL) {
3398 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3399 sizeof(struct rte_eth_dev_callback), 0);
3400 if (user_cb != NULL) {
3401 user_cb->cb_fn = cb_fn;
3402 user_cb->cb_arg = cb_arg;
3403 user_cb->event = event;
3404 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3407 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3408 rte_eth_dev_callback_unregister(port_id, event,
3414 } while (++next_port <= last_port);
3416 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3421 rte_eth_dev_callback_unregister(uint16_t port_id,
3422 enum rte_eth_event_type event,
3423 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3426 struct rte_eth_dev *dev;
3427 struct rte_eth_dev_callback *cb, *next;
3428 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3434 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3435 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3439 if (port_id == RTE_ETH_ALL) {
3441 last_port = RTE_MAX_ETHPORTS - 1;
3443 next_port = last_port = port_id;
3446 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3449 dev = &rte_eth_devices[next_port];
3451 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3454 next = TAILQ_NEXT(cb, next);
3456 if (cb->cb_fn != cb_fn || cb->event != event ||
3457 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3461 * if this callback is not executing right now,
3464 if (cb->active == 0) {
3465 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3471 } while (++next_port <= last_port);
3473 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3478 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3479 enum rte_eth_event_type event, void *ret_param)
3481 struct rte_eth_dev_callback *cb_lst;
3482 struct rte_eth_dev_callback dev_cb;
3485 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3486 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3487 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3491 if (ret_param != NULL)
3492 dev_cb.ret_param = ret_param;
3494 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3495 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3496 dev_cb.cb_arg, dev_cb.ret_param);
3497 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3500 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3505 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3510 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3512 dev->state = RTE_ETH_DEV_ATTACHED;
3516 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3519 struct rte_eth_dev *dev;
3520 struct rte_intr_handle *intr_handle;
3524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3526 dev = &rte_eth_devices[port_id];
3528 if (!dev->intr_handle) {
3529 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3533 intr_handle = dev->intr_handle;
3534 if (!intr_handle->intr_vec) {
3535 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3539 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3540 vec = intr_handle->intr_vec[qid];
3541 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3542 if (rc && rc != -EEXIST) {
3544 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3545 port_id, qid, op, epfd, vec);
3552 int __rte_experimental
3553 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3555 struct rte_intr_handle *intr_handle;
3556 struct rte_eth_dev *dev;
3557 unsigned int efd_idx;
3561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3563 dev = &rte_eth_devices[port_id];
3565 if (queue_id >= dev->data->nb_rx_queues) {
3566 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3570 if (!dev->intr_handle) {
3571 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3575 intr_handle = dev->intr_handle;
3576 if (!intr_handle->intr_vec) {
3577 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3581 vec = intr_handle->intr_vec[queue_id];
3582 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3583 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3584 fd = intr_handle->efds[efd_idx];
3589 const struct rte_memzone *
3590 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3591 uint16_t queue_id, size_t size, unsigned align,
3594 char z_name[RTE_MEMZONE_NAMESIZE];
3595 const struct rte_memzone *mz;
3598 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3599 dev->data->port_id, queue_id, ring_name);
3600 if (rc >= RTE_MEMZONE_NAMESIZE) {
3601 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3602 rte_errno = ENAMETOOLONG;
3606 mz = rte_memzone_lookup(z_name);
3610 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3611 RTE_MEMZONE_IOVA_CONTIG, align);
3614 int __rte_experimental
3615 rte_eth_dev_create(struct rte_device *device, const char *name,
3616 size_t priv_data_size,
3617 ethdev_bus_specific_init ethdev_bus_specific_init,
3618 void *bus_init_params,
3619 ethdev_init_t ethdev_init, void *init_params)
3621 struct rte_eth_dev *ethdev;
3624 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3626 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3627 ethdev = rte_eth_dev_allocate(name);
3631 if (priv_data_size) {
3632 ethdev->data->dev_private = rte_zmalloc_socket(
3633 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3636 if (!ethdev->data->dev_private) {
3637 RTE_LOG(ERR, EAL, "failed to allocate private data");
3643 ethdev = rte_eth_dev_attach_secondary(name);
3645 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3646 "ethdev doesn't exist");
3651 ethdev->device = device;
3653 if (ethdev_bus_specific_init) {
3654 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3657 "ethdev bus specific initialisation failed");
3662 retval = ethdev_init(ethdev, init_params);
3664 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3668 rte_eth_dev_probing_finish(ethdev);
3673 rte_eth_dev_release_port(ethdev);
3677 int __rte_experimental
3678 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3679 ethdev_uninit_t ethdev_uninit)
3683 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3687 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3689 ret = ethdev_uninit(ethdev);
3693 return rte_eth_dev_release_port(ethdev);
3697 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3698 int epfd, int op, void *data)
3701 struct rte_eth_dev *dev;
3702 struct rte_intr_handle *intr_handle;
3705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3707 dev = &rte_eth_devices[port_id];
3708 if (queue_id >= dev->data->nb_rx_queues) {
3709 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3713 if (!dev->intr_handle) {
3714 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3718 intr_handle = dev->intr_handle;
3719 if (!intr_handle->intr_vec) {
3720 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3724 vec = intr_handle->intr_vec[queue_id];
3725 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3726 if (rc && rc != -EEXIST) {
3728 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3729 port_id, queue_id, op, epfd, vec);
3737 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3740 struct rte_eth_dev *dev;
3742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3744 dev = &rte_eth_devices[port_id];
3746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3747 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3752 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3755 struct rte_eth_dev *dev;
3757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3759 dev = &rte_eth_devices[port_id];
3761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3762 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3768 rte_eth_dev_filter_supported(uint16_t port_id,
3769 enum rte_filter_type filter_type)
3771 struct rte_eth_dev *dev;
3773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3775 dev = &rte_eth_devices[port_id];
3776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3777 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3778 RTE_ETH_FILTER_NOP, NULL);
3782 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3783 enum rte_filter_op filter_op, void *arg)
3785 struct rte_eth_dev *dev;
3787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3789 dev = &rte_eth_devices[port_id];
3790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3791 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3795 const struct rte_eth_rxtx_callback *
3796 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3797 rte_rx_callback_fn fn, void *user_param)
3799 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3800 rte_errno = ENOTSUP;
3803 /* check input parameters */
3804 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3805 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3809 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3817 cb->param = user_param;
3819 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3820 /* Add the callbacks in fifo order. */
3821 struct rte_eth_rxtx_callback *tail =
3822 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3825 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3832 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3837 const struct rte_eth_rxtx_callback *
3838 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3839 rte_rx_callback_fn fn, void *user_param)
3841 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3842 rte_errno = ENOTSUP;
3845 /* check input parameters */
3846 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3847 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3852 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3860 cb->param = user_param;
3862 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3863 /* Add the callbacks at fisrt position*/
3864 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3866 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3867 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3872 const struct rte_eth_rxtx_callback *
3873 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3874 rte_tx_callback_fn fn, void *user_param)
3876 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3877 rte_errno = ENOTSUP;
3880 /* check input parameters */
3881 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3882 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3887 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3895 cb->param = user_param;
3897 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3898 /* Add the callbacks in fifo order. */
3899 struct rte_eth_rxtx_callback *tail =
3900 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3903 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3910 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3916 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3917 const struct rte_eth_rxtx_callback *user_cb)
3919 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3922 /* Check input parameters. */
3923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3924 if (user_cb == NULL ||
3925 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3928 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3929 struct rte_eth_rxtx_callback *cb;
3930 struct rte_eth_rxtx_callback **prev_cb;
3933 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3934 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3935 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3937 if (cb == user_cb) {
3938 /* Remove the user cb from the callback list. */
3939 *prev_cb = cb->next;
3944 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3950 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3951 const struct rte_eth_rxtx_callback *user_cb)
3953 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3956 /* Check input parameters. */
3957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3958 if (user_cb == NULL ||
3959 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3962 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3964 struct rte_eth_rxtx_callback *cb;
3965 struct rte_eth_rxtx_callback **prev_cb;
3967 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3968 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3969 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3971 if (cb == user_cb) {
3972 /* Remove the user cb from the callback list. */
3973 *prev_cb = cb->next;
3978 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3984 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3985 struct rte_eth_rxq_info *qinfo)
3987 struct rte_eth_dev *dev;
3989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3994 dev = &rte_eth_devices[port_id];
3995 if (queue_id >= dev->data->nb_rx_queues) {
3996 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4002 memset(qinfo, 0, sizeof(*qinfo));
4003 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4008 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4009 struct rte_eth_txq_info *qinfo)
4011 struct rte_eth_dev *dev;
4013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4018 dev = &rte_eth_devices[port_id];
4019 if (queue_id >= dev->data->nb_tx_queues) {
4020 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4026 memset(qinfo, 0, sizeof(*qinfo));
4027 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4033 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4034 struct ether_addr *mc_addr_set,
4035 uint32_t nb_mc_addr)
4037 struct rte_eth_dev *dev;
4039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4041 dev = &rte_eth_devices[port_id];
4042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4043 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4044 mc_addr_set, nb_mc_addr));
4048 rte_eth_timesync_enable(uint16_t port_id)
4050 struct rte_eth_dev *dev;
4052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4053 dev = &rte_eth_devices[port_id];
4055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4056 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4060 rte_eth_timesync_disable(uint16_t port_id)
4062 struct rte_eth_dev *dev;
4064 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4065 dev = &rte_eth_devices[port_id];
4067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4068 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4072 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4075 struct rte_eth_dev *dev;
4077 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4078 dev = &rte_eth_devices[port_id];
4080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4081 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4082 (dev, timestamp, flags));
4086 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4087 struct timespec *timestamp)
4089 struct rte_eth_dev *dev;
4091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4092 dev = &rte_eth_devices[port_id];
4094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4095 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4100 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4102 struct rte_eth_dev *dev;
4104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4105 dev = &rte_eth_devices[port_id];
4107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4108 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4113 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4115 struct rte_eth_dev *dev;
4117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4118 dev = &rte_eth_devices[port_id];
4120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4121 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4126 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4128 struct rte_eth_dev *dev;
4130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4131 dev = &rte_eth_devices[port_id];
4133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4134 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4139 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4141 struct rte_eth_dev *dev;
4143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4145 dev = &rte_eth_devices[port_id];
4146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4147 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4151 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4153 struct rte_eth_dev *dev;
4155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4157 dev = &rte_eth_devices[port_id];
4158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4159 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4163 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4165 struct rte_eth_dev *dev;
4167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4169 dev = &rte_eth_devices[port_id];
4170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4171 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4175 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4177 struct rte_eth_dev *dev;
4179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4181 dev = &rte_eth_devices[port_id];
4182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4183 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4186 int __rte_experimental
4187 rte_eth_dev_get_module_info(uint16_t port_id,
4188 struct rte_eth_dev_module_info *modinfo)
4190 struct rte_eth_dev *dev;
4192 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4194 dev = &rte_eth_devices[port_id];
4195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4196 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4199 int __rte_experimental
4200 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4201 struct rte_dev_eeprom_info *info)
4203 struct rte_eth_dev *dev;
4205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4207 dev = &rte_eth_devices[port_id];
4208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4209 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4213 rte_eth_dev_get_dcb_info(uint16_t port_id,
4214 struct rte_eth_dcb_info *dcb_info)
4216 struct rte_eth_dev *dev;
4218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4220 dev = &rte_eth_devices[port_id];
4221 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4224 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4228 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4229 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4231 struct rte_eth_dev *dev;
4233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4234 if (l2_tunnel == NULL) {
4235 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4239 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4240 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4244 dev = &rte_eth_devices[port_id];
4245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4247 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4252 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4253 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4257 struct rte_eth_dev *dev;
4259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4261 if (l2_tunnel == NULL) {
4262 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4266 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4267 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4272 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4276 dev = &rte_eth_devices[port_id];
4277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4279 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4280 l2_tunnel, mask, en));
4284 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4285 const struct rte_eth_desc_lim *desc_lim)
4287 if (desc_lim->nb_align != 0)
4288 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4290 if (desc_lim->nb_max != 0)
4291 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4293 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4297 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4298 uint16_t *nb_rx_desc,
4299 uint16_t *nb_tx_desc)
4301 struct rte_eth_dev *dev;
4302 struct rte_eth_dev_info dev_info;
4304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4306 dev = &rte_eth_devices[port_id];
4307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4309 rte_eth_dev_info_get(port_id, &dev_info);
4311 if (nb_rx_desc != NULL)
4312 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4314 if (nb_tx_desc != NULL)
4315 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4321 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4323 struct rte_eth_dev *dev;
4325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4330 dev = &rte_eth_devices[port_id];
4332 if (*dev->dev_ops->pool_ops_supported == NULL)
4333 return 1; /* all pools are supported */
4335 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4339 * A set of values to describe the possible states of a switch domain.
4341 enum rte_eth_switch_domain_state {
4342 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4343 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4347 * Array of switch domains available for allocation. Array is sized to
4348 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4349 * ethdev ports in a single process.
4351 static struct rte_eth_dev_switch {
4352 enum rte_eth_switch_domain_state state;
4353 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4355 int __rte_experimental
4356 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4360 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4362 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4363 i < RTE_MAX_ETHPORTS; i++) {
4364 if (rte_eth_switch_domains[i].state ==
4365 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4366 rte_eth_switch_domains[i].state =
4367 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4376 int __rte_experimental
4377 rte_eth_switch_domain_free(uint16_t domain_id)
4379 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4380 domain_id >= RTE_MAX_ETHPORTS)
4383 if (rte_eth_switch_domains[domain_id].state !=
4384 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4387 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4393 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4396 struct rte_kvargs_pair *pair;
4399 arglist->str = strdup(str_in);
4400 if (arglist->str == NULL)
4403 letter = arglist->str;
4406 pair = &arglist->pairs[0];
4409 case 0: /* Initial */
4412 else if (*letter == '\0')
4419 case 1: /* Parsing key */
4420 if (*letter == '=') {
4422 pair->value = letter + 1;
4424 } else if (*letter == ',' || *letter == '\0')
4429 case 2: /* Parsing value */
4432 else if (*letter == ',') {
4435 pair = &arglist->pairs[arglist->count];
4437 } else if (*letter == '\0') {
4440 pair = &arglist->pairs[arglist->count];
4445 case 3: /* Parsing list */
4448 else if (*letter == '\0')
4456 int __rte_experimental
4457 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4459 struct rte_kvargs args;
4460 struct rte_kvargs_pair *pair;
4464 memset(eth_da, 0, sizeof(*eth_da));
4466 result = rte_eth_devargs_tokenise(&args, dargs);
4470 for (i = 0; i < args.count; i++) {
4471 pair = &args.pairs[i];
4472 if (strcmp("representor", pair->key) == 0) {
4473 result = rte_eth_devargs_parse_list(pair->value,
4474 rte_eth_devargs_parse_representor_ports,
4488 RTE_INIT(ethdev_init_log)
4490 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4491 if (rte_eth_dev_logtype >= 0)
4492 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);