1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_kvargs.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "rte_ethdev_driver.h"
42 #include "ethdev_profile.h"
44 static int ethdev_logtype;
46 #define ethdev_log(level, fmt, ...) \
47 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint8_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
128 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
129 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
130 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 #undef RTE_TX_OFFLOAD_BIT2STR
165 * The user application callback description.
167 * It contains callback address to be registered by user application,
168 * the pointer to the parameters for callback, and the event type.
170 struct rte_eth_dev_callback {
171 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
172 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
173 void *cb_arg; /**< Parameter for callback */
174 void *ret_param; /**< Return parameter */
175 enum rte_eth_event_type event; /**< Interrupt event type */
176 uint32_t active; /**< Callback is executing */
185 rte_eth_find_next(uint16_t port_id)
187 while (port_id < RTE_MAX_ETHPORTS &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
192 if (port_id >= RTE_MAX_ETHPORTS)
193 return RTE_MAX_ETHPORTS;
199 rte_eth_dev_shared_data_prepare(void)
201 const unsigned flags = 0;
202 const struct rte_memzone *mz;
204 rte_spinlock_lock(&rte_eth_shared_data_lock);
206 if (rte_eth_dev_shared_data == NULL) {
207 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
208 /* Allocate port data and ownership shared memory. */
209 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
210 sizeof(*rte_eth_dev_shared_data),
211 rte_socket_id(), flags);
213 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
215 rte_panic("Cannot allocate ethdev shared data\n");
217 rte_eth_dev_shared_data = mz->addr;
218 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
219 rte_eth_dev_shared_data->next_owner_id =
220 RTE_ETH_DEV_NO_OWNER + 1;
221 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
222 memset(rte_eth_dev_shared_data->data, 0,
223 sizeof(rte_eth_dev_shared_data->data));
227 rte_spinlock_unlock(&rte_eth_shared_data_lock);
231 rte_eth_dev_allocated(const char *name)
235 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
236 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
237 strcmp(rte_eth_devices[i].data->name, name) == 0)
238 return &rte_eth_devices[i];
244 rte_eth_dev_find_free_port(void)
248 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
249 /* Using shared name field to find a free port. */
250 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
251 RTE_ASSERT(rte_eth_devices[i].state ==
256 return RTE_MAX_ETHPORTS;
259 static struct rte_eth_dev *
260 eth_dev_get(uint16_t port_id)
262 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
264 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
265 eth_dev->state = RTE_ETH_DEV_ATTACHED;
267 eth_dev_last_created_port = port_id;
273 rte_eth_dev_allocate(const char *name)
276 struct rte_eth_dev *eth_dev = NULL;
278 rte_eth_dev_shared_data_prepare();
280 /* Synchronize port creation between primary and secondary threads. */
281 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
283 port_id = rte_eth_dev_find_free_port();
284 if (port_id == RTE_MAX_ETHPORTS) {
285 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
289 if (rte_eth_dev_allocated(name) != NULL) {
291 "Ethernet Device with name %s already allocated!",
296 eth_dev = eth_dev_get(port_id);
297 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
298 eth_dev->data->port_id = port_id;
299 eth_dev->data->mtu = ETHER_MTU;
302 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
305 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
311 * Attach to a port already registered by the primary process, which
312 * makes sure that the same device would have the same port id both
313 * in the primary and secondary process.
316 rte_eth_dev_attach_secondary(const char *name)
319 struct rte_eth_dev *eth_dev = NULL;
321 rte_eth_dev_shared_data_prepare();
323 /* Synchronize port attachment to primary port creation and release. */
324 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
326 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
327 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
330 if (i == RTE_MAX_ETHPORTS) {
332 "device %s is not driven by the primary process\n",
335 eth_dev = eth_dev_get(i);
336 RTE_ASSERT(eth_dev->data->port_id == i);
339 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
344 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
349 rte_eth_dev_shared_data_prepare();
351 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
353 eth_dev->state = RTE_ETH_DEV_UNUSED;
355 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
359 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
365 rte_eth_dev_is_valid_port(uint16_t port_id)
367 if (port_id >= RTE_MAX_ETHPORTS ||
368 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
375 rte_eth_is_valid_owner_id(uint64_t owner_id)
377 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
378 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
379 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
386 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
388 while (port_id < RTE_MAX_ETHPORTS &&
389 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
390 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
391 rte_eth_devices[port_id].data->owner.id != owner_id))
394 if (port_id >= RTE_MAX_ETHPORTS)
395 return RTE_MAX_ETHPORTS;
400 int __rte_experimental
401 rte_eth_dev_owner_new(uint64_t *owner_id)
403 rte_eth_dev_shared_data_prepare();
405 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
407 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
409 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
414 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
415 const struct rte_eth_dev_owner *new_owner)
417 struct rte_eth_dev_owner *port_owner;
420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
422 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
423 !rte_eth_is_valid_owner_id(old_owner_id))
426 port_owner = &rte_eth_devices[port_id].data->owner;
427 if (port_owner->id != old_owner_id) {
428 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
429 " by %s_%016lX.\n", port_id,
430 port_owner->name, port_owner->id);
434 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
436 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
437 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
440 port_owner->id = new_owner->id;
442 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
443 new_owner->name, new_owner->id);
448 int __rte_experimental
449 rte_eth_dev_owner_set(const uint16_t port_id,
450 const struct rte_eth_dev_owner *owner)
454 rte_eth_dev_shared_data_prepare();
456 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
458 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
460 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
464 int __rte_experimental
465 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
467 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
468 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
471 rte_eth_dev_shared_data_prepare();
473 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
475 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
477 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
481 void __rte_experimental
482 rte_eth_dev_owner_delete(const uint64_t owner_id)
486 rte_eth_dev_shared_data_prepare();
488 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
490 if (rte_eth_is_valid_owner_id(owner_id)) {
491 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
492 memset(&rte_eth_devices[port_id].data->owner, 0,
493 sizeof(struct rte_eth_dev_owner));
494 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
495 " have removed.\n", owner_id);
498 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
501 int __rte_experimental
502 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
506 rte_eth_dev_shared_data_prepare();
508 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
510 if (!rte_eth_dev_is_valid_port(port_id)) {
511 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
514 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
518 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
523 rte_eth_dev_socket_id(uint16_t port_id)
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
526 return rte_eth_devices[port_id].data->numa_node;
530 rte_eth_dev_get_sec_ctx(uint16_t port_id)
532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
533 return rte_eth_devices[port_id].security_ctx;
537 rte_eth_dev_count(void)
539 return rte_eth_dev_count_avail();
543 rte_eth_dev_count_avail(void)
550 RTE_ETH_FOREACH_DEV(p)
556 uint16_t __rte_experimental
557 rte_eth_dev_count_total(void)
559 uint16_t port, count = 0;
561 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
562 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
569 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
576 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
580 /* shouldn't check 'rte_eth_devices[i].data',
581 * because it might be overwritten by VDEV PMD */
582 tmp = rte_eth_dev_shared_data->data[port_id].name;
588 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
593 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
597 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
598 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
599 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
609 eth_err(uint16_t port_id, int ret)
613 if (rte_eth_dev_is_removed(port_id))
618 /* attach the new device, then store port_id of the device */
620 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
622 int current = rte_eth_dev_count_total();
623 struct rte_devargs da;
626 memset(&da, 0, sizeof(da));
628 if ((devargs == NULL) || (port_id == NULL)) {
634 if (rte_devargs_parse(&da, "%s", devargs))
637 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
641 /* no point looking at the port count if no port exists */
642 if (!rte_eth_dev_count_total()) {
643 ethdev_log(ERR, "No port found for device (%s)", da.name);
648 /* if nothing happened, there is a bug here, since some driver told us
649 * it did attach a device, but did not create a port.
650 * FIXME: race condition in case of plug-out of another device
652 if (current == rte_eth_dev_count_total()) {
657 *port_id = eth_dev_last_created_port;
665 /* detach the device, then store the name of the device */
667 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
669 struct rte_device *dev;
674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
676 dev_flags = rte_eth_devices[port_id].data->dev_flags;
677 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
679 "Port %" PRIu16 " is bonded, cannot detach", port_id);
683 dev = rte_eth_devices[port_id].device;
687 bus = rte_bus_find_by_device(dev);
691 ret = rte_eal_hotplug_remove(bus->name, dev->name);
695 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
700 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
702 uint16_t old_nb_queues = dev->data->nb_rx_queues;
706 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
707 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
708 sizeof(dev->data->rx_queues[0]) * nb_queues,
709 RTE_CACHE_LINE_SIZE);
710 if (dev->data->rx_queues == NULL) {
711 dev->data->nb_rx_queues = 0;
714 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
717 rxq = dev->data->rx_queues;
719 for (i = nb_queues; i < old_nb_queues; i++)
720 (*dev->dev_ops->rx_queue_release)(rxq[i]);
721 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
722 RTE_CACHE_LINE_SIZE);
725 if (nb_queues > old_nb_queues) {
726 uint16_t new_qs = nb_queues - old_nb_queues;
728 memset(rxq + old_nb_queues, 0,
729 sizeof(rxq[0]) * new_qs);
732 dev->data->rx_queues = rxq;
734 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
737 rxq = dev->data->rx_queues;
739 for (i = nb_queues; i < old_nb_queues; i++)
740 (*dev->dev_ops->rx_queue_release)(rxq[i]);
742 rte_free(dev->data->rx_queues);
743 dev->data->rx_queues = NULL;
745 dev->data->nb_rx_queues = nb_queues;
750 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
752 struct rte_eth_dev *dev;
754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
756 dev = &rte_eth_devices[port_id];
757 if (!dev->data->dev_started) {
759 "port %d must be started before start any queue\n", port_id);
763 if (rx_queue_id >= dev->data->nb_rx_queues) {
764 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
770 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
771 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
772 " already started\n",
773 rx_queue_id, port_id);
777 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
783 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
785 struct rte_eth_dev *dev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 dev = &rte_eth_devices[port_id];
790 if (rx_queue_id >= dev->data->nb_rx_queues) {
791 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
797 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
798 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
799 " already stopped\n",
800 rx_queue_id, port_id);
804 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
809 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
811 struct rte_eth_dev *dev;
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
815 dev = &rte_eth_devices[port_id];
816 if (!dev->data->dev_started) {
818 "port %d must be started before start any queue\n", port_id);
822 if (tx_queue_id >= dev->data->nb_tx_queues) {
823 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
829 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
830 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
831 " already started\n",
832 tx_queue_id, port_id);
836 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
842 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
844 struct rte_eth_dev *dev;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 dev = &rte_eth_devices[port_id];
849 if (tx_queue_id >= dev->data->nb_tx_queues) {
850 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
856 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
857 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
858 " already stopped\n",
859 tx_queue_id, port_id);
863 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
868 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
870 uint16_t old_nb_queues = dev->data->nb_tx_queues;
874 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
875 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
876 sizeof(dev->data->tx_queues[0]) * nb_queues,
877 RTE_CACHE_LINE_SIZE);
878 if (dev->data->tx_queues == NULL) {
879 dev->data->nb_tx_queues = 0;
882 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
885 txq = dev->data->tx_queues;
887 for (i = nb_queues; i < old_nb_queues; i++)
888 (*dev->dev_ops->tx_queue_release)(txq[i]);
889 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
890 RTE_CACHE_LINE_SIZE);
893 if (nb_queues > old_nb_queues) {
894 uint16_t new_qs = nb_queues - old_nb_queues;
896 memset(txq + old_nb_queues, 0,
897 sizeof(txq[0]) * new_qs);
900 dev->data->tx_queues = txq;
902 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
905 txq = dev->data->tx_queues;
907 for (i = nb_queues; i < old_nb_queues; i++)
908 (*dev->dev_ops->tx_queue_release)(txq[i]);
910 rte_free(dev->data->tx_queues);
911 dev->data->tx_queues = NULL;
913 dev->data->nb_tx_queues = nb_queues;
918 rte_eth_speed_bitflag(uint32_t speed, int duplex)
921 case ETH_SPEED_NUM_10M:
922 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
923 case ETH_SPEED_NUM_100M:
924 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
925 case ETH_SPEED_NUM_1G:
926 return ETH_LINK_SPEED_1G;
927 case ETH_SPEED_NUM_2_5G:
928 return ETH_LINK_SPEED_2_5G;
929 case ETH_SPEED_NUM_5G:
930 return ETH_LINK_SPEED_5G;
931 case ETH_SPEED_NUM_10G:
932 return ETH_LINK_SPEED_10G;
933 case ETH_SPEED_NUM_20G:
934 return ETH_LINK_SPEED_20G;
935 case ETH_SPEED_NUM_25G:
936 return ETH_LINK_SPEED_25G;
937 case ETH_SPEED_NUM_40G:
938 return ETH_LINK_SPEED_40G;
939 case ETH_SPEED_NUM_50G:
940 return ETH_LINK_SPEED_50G;
941 case ETH_SPEED_NUM_56G:
942 return ETH_LINK_SPEED_56G;
943 case ETH_SPEED_NUM_100G:
944 return ETH_LINK_SPEED_100G;
951 * A conversion function from rxmode bitfield API.
954 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
955 uint64_t *rx_offloads)
957 uint64_t offloads = 0;
959 if (rxmode->header_split == 1)
960 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
961 if (rxmode->hw_ip_checksum == 1)
962 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
963 if (rxmode->hw_vlan_filter == 1)
964 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
965 if (rxmode->hw_vlan_strip == 1)
966 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
967 if (rxmode->hw_vlan_extend == 1)
968 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
969 if (rxmode->jumbo_frame == 1)
970 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
971 if (rxmode->hw_strip_crc == 1)
972 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
973 if (rxmode->enable_scatter == 1)
974 offloads |= DEV_RX_OFFLOAD_SCATTER;
975 if (rxmode->enable_lro == 1)
976 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
977 if (rxmode->hw_timestamp == 1)
978 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
979 if (rxmode->security == 1)
980 offloads |= DEV_RX_OFFLOAD_SECURITY;
982 *rx_offloads = offloads;
985 const char * __rte_experimental
986 rte_eth_dev_rx_offload_name(uint64_t offload)
988 const char *name = "UNKNOWN";
991 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
992 if (offload == rte_rx_offload_names[i].offload) {
993 name = rte_rx_offload_names[i].name;
1001 const char * __rte_experimental
1002 rte_eth_dev_tx_offload_name(uint64_t offload)
1004 const char *name = "UNKNOWN";
1007 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1008 if (offload == rte_tx_offload_names[i].offload) {
1009 name = rte_tx_offload_names[i].name;
1018 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1019 const struct rte_eth_conf *dev_conf)
1021 struct rte_eth_dev *dev;
1022 struct rte_eth_dev_info dev_info;
1023 struct rte_eth_conf local_conf = *dev_conf;
1026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1028 dev = &rte_eth_devices[port_id];
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1033 rte_eth_dev_info_get(port_id, &dev_info);
1035 /* If number of queues specified by application for both Rx and Tx is
1036 * zero, use driver preferred values. This cannot be done individually
1037 * as it is valid for either Tx or Rx (but not both) to be zero.
1038 * If driver does not provide any preferred valued, fall back on
1041 if (nb_rx_q == 0 && nb_tx_q == 0) {
1042 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1044 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1045 nb_tx_q = dev_info.default_txportconf.nb_queues;
1047 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1050 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1051 RTE_PMD_DEBUG_TRACE(
1052 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1053 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1057 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1058 RTE_PMD_DEBUG_TRACE(
1059 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1060 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1064 if (dev->data->dev_started) {
1065 RTE_PMD_DEBUG_TRACE(
1066 "port %d must be stopped to allow configuration\n", port_id);
1071 * Convert between the offloads API to enable PMDs to support
1074 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1075 rte_eth_convert_rx_offload_bitfield(
1076 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1078 /* Copy the dev_conf parameter into the dev structure */
1079 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1082 * Check that the numbers of RX and TX queues are not greater
1083 * than the maximum number of RX and TX queues supported by the
1084 * configured device.
1086 if (nb_rx_q > dev_info.max_rx_queues) {
1087 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1088 port_id, nb_rx_q, dev_info.max_rx_queues);
1092 if (nb_tx_q > dev_info.max_tx_queues) {
1093 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1094 port_id, nb_tx_q, dev_info.max_tx_queues);
1098 /* Check that the device supports requested interrupts */
1099 if ((dev_conf->intr_conf.lsc == 1) &&
1100 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1101 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1102 dev->device->driver->name);
1105 if ((dev_conf->intr_conf.rmv == 1) &&
1106 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1107 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1108 dev->device->driver->name);
1113 * If jumbo frames are enabled, check that the maximum RX packet
1114 * length is supported by the configured device.
1116 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1117 if (dev_conf->rxmode.max_rx_pkt_len >
1118 dev_info.max_rx_pktlen) {
1119 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1120 " > max valid value %u\n",
1122 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1123 (unsigned)dev_info.max_rx_pktlen);
1125 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1126 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1127 " < min valid value %u\n",
1129 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1130 (unsigned)ETHER_MIN_LEN);
1134 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1135 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1136 /* Use default value */
1137 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1141 /* Check that device supports requested rss hash functions. */
1142 if ((dev_info.flow_type_rss_offloads |
1143 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1144 dev_info.flow_type_rss_offloads) {
1145 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1146 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1148 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1149 dev_info.flow_type_rss_offloads);
1153 * Setup new number of RX/TX queues and reconfigure device.
1155 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1157 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1162 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1164 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1166 rte_eth_dev_rx_queue_config(dev, 0);
1170 diag = (*dev->dev_ops->dev_configure)(dev);
1172 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1174 rte_eth_dev_rx_queue_config(dev, 0);
1175 rte_eth_dev_tx_queue_config(dev, 0);
1176 return eth_err(port_id, diag);
1179 /* Initialize Rx profiling if enabled at compilation time. */
1180 diag = __rte_eth_profile_rx_init(port_id, dev);
1182 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1184 rte_eth_dev_rx_queue_config(dev, 0);
1185 rte_eth_dev_tx_queue_config(dev, 0);
1186 return eth_err(port_id, diag);
1193 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1195 if (dev->data->dev_started) {
1196 RTE_PMD_DEBUG_TRACE(
1197 "port %d must be stopped to allow reset\n",
1198 dev->data->port_id);
1202 rte_eth_dev_rx_queue_config(dev, 0);
1203 rte_eth_dev_tx_queue_config(dev, 0);
1205 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1209 rte_eth_dev_config_restore(uint16_t port_id)
1211 struct rte_eth_dev *dev;
1212 struct rte_eth_dev_info dev_info;
1213 struct ether_addr *addr;
1218 dev = &rte_eth_devices[port_id];
1220 rte_eth_dev_info_get(port_id, &dev_info);
1222 /* replay MAC address configuration including default MAC */
1223 addr = &dev->data->mac_addrs[0];
1224 if (*dev->dev_ops->mac_addr_set != NULL)
1225 (*dev->dev_ops->mac_addr_set)(dev, addr);
1226 else if (*dev->dev_ops->mac_addr_add != NULL)
1227 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1229 if (*dev->dev_ops->mac_addr_add != NULL) {
1230 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1231 addr = &dev->data->mac_addrs[i];
1233 /* skip zero address */
1234 if (is_zero_ether_addr(addr))
1238 pool_mask = dev->data->mac_pool_sel[i];
1241 if (pool_mask & 1ULL)
1242 (*dev->dev_ops->mac_addr_add)(dev,
1246 } while (pool_mask);
1250 /* replay promiscuous configuration */
1251 if (rte_eth_promiscuous_get(port_id) == 1)
1252 rte_eth_promiscuous_enable(port_id);
1253 else if (rte_eth_promiscuous_get(port_id) == 0)
1254 rte_eth_promiscuous_disable(port_id);
1256 /* replay all multicast configuration */
1257 if (rte_eth_allmulticast_get(port_id) == 1)
1258 rte_eth_allmulticast_enable(port_id);
1259 else if (rte_eth_allmulticast_get(port_id) == 0)
1260 rte_eth_allmulticast_disable(port_id);
1264 rte_eth_dev_start(uint16_t port_id)
1266 struct rte_eth_dev *dev;
1269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1271 dev = &rte_eth_devices[port_id];
1273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1275 if (dev->data->dev_started != 0) {
1276 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1277 " already started\n",
1282 diag = (*dev->dev_ops->dev_start)(dev);
1284 dev->data->dev_started = 1;
1286 return eth_err(port_id, diag);
1288 rte_eth_dev_config_restore(port_id);
1290 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1292 (*dev->dev_ops->link_update)(dev, 0);
1298 rte_eth_dev_stop(uint16_t port_id)
1300 struct rte_eth_dev *dev;
1302 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1303 dev = &rte_eth_devices[port_id];
1305 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1307 if (dev->data->dev_started == 0) {
1308 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1309 " already stopped\n",
1314 dev->data->dev_started = 0;
1315 (*dev->dev_ops->dev_stop)(dev);
1319 rte_eth_dev_set_link_up(uint16_t port_id)
1321 struct rte_eth_dev *dev;
1323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1325 dev = &rte_eth_devices[port_id];
1327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1328 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1332 rte_eth_dev_set_link_down(uint16_t port_id)
1334 struct rte_eth_dev *dev;
1336 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1338 dev = &rte_eth_devices[port_id];
1340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1341 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1345 rte_eth_dev_close(uint16_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1353 dev->data->dev_started = 0;
1354 (*dev->dev_ops->dev_close)(dev);
1356 dev->data->nb_rx_queues = 0;
1357 rte_free(dev->data->rx_queues);
1358 dev->data->rx_queues = NULL;
1359 dev->data->nb_tx_queues = 0;
1360 rte_free(dev->data->tx_queues);
1361 dev->data->tx_queues = NULL;
1365 rte_eth_dev_reset(uint16_t port_id)
1367 struct rte_eth_dev *dev;
1370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1371 dev = &rte_eth_devices[port_id];
1373 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1375 rte_eth_dev_stop(port_id);
1376 ret = dev->dev_ops->dev_reset(dev);
1378 return eth_err(port_id, ret);
1381 int __rte_experimental
1382 rte_eth_dev_is_removed(uint16_t port_id)
1384 struct rte_eth_dev *dev;
1387 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1389 dev = &rte_eth_devices[port_id];
1391 if (dev->state == RTE_ETH_DEV_REMOVED)
1394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1396 ret = dev->dev_ops->is_removed(dev);
1398 /* Device is physically removed. */
1399 dev->state = RTE_ETH_DEV_REMOVED;
1405 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1406 uint16_t nb_rx_desc, unsigned int socket_id,
1407 const struct rte_eth_rxconf *rx_conf,
1408 struct rte_mempool *mp)
1411 uint32_t mbp_buf_size;
1412 struct rte_eth_dev *dev;
1413 struct rte_eth_dev_info dev_info;
1414 struct rte_eth_rxconf local_conf;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1419 dev = &rte_eth_devices[port_id];
1420 if (rx_queue_id >= dev->data->nb_rx_queues) {
1421 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1425 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1426 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1429 * Check the size of the mbuf data buffer.
1430 * This value must be provided in the private data of the memory pool.
1431 * First check that the memory pool has a valid private data.
1433 rte_eth_dev_info_get(port_id, &dev_info);
1434 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1435 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1436 mp->name, (int) mp->private_data_size,
1437 (int) sizeof(struct rte_pktmbuf_pool_private));
1440 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1442 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1443 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1444 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1448 (int)(RTE_PKTMBUF_HEADROOM +
1449 dev_info.min_rx_bufsize),
1450 (int)RTE_PKTMBUF_HEADROOM,
1451 (int)dev_info.min_rx_bufsize);
1455 /* Use default specified by driver, if nb_rx_desc is zero */
1456 if (nb_rx_desc == 0) {
1457 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1458 /* If driver default is also zero, fall back on EAL default */
1459 if (nb_rx_desc == 0)
1460 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1463 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1464 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1465 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1467 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1468 "should be: <= %hu, = %hu, and a product of %hu\n",
1470 dev_info.rx_desc_lim.nb_max,
1471 dev_info.rx_desc_lim.nb_min,
1472 dev_info.rx_desc_lim.nb_align);
1476 if (dev->data->dev_started &&
1477 !(dev_info.dev_capa &
1478 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1481 if (dev->data->rx_queue_state[rx_queue_id] !=
1482 RTE_ETH_QUEUE_STATE_STOPPED)
1485 rxq = dev->data->rx_queues;
1486 if (rxq[rx_queue_id]) {
1487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1489 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1490 rxq[rx_queue_id] = NULL;
1493 if (rx_conf == NULL)
1494 rx_conf = &dev_info.default_rxconf;
1496 local_conf = *rx_conf;
1497 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1499 * Reflect port offloads to queue offloads in order for
1500 * offloads to not be discarded.
1502 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1503 &local_conf.offloads);
1506 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1507 socket_id, &local_conf, mp);
1509 if (!dev->data->min_rx_buf_size ||
1510 dev->data->min_rx_buf_size > mbp_buf_size)
1511 dev->data->min_rx_buf_size = mbp_buf_size;
1514 return eth_err(port_id, ret);
1518 * Convert from tx offloads to txq_flags.
1521 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1525 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1526 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1527 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1528 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1529 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1530 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1531 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1532 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1533 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1534 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1535 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1536 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1542 * A conversion function from txq_flags API.
1545 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1547 uint64_t offloads = 0;
1549 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1550 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1551 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1552 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1553 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1554 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1555 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1556 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1557 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1558 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1559 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1560 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1561 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1563 *tx_offloads = offloads;
1567 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1568 uint16_t nb_tx_desc, unsigned int socket_id,
1569 const struct rte_eth_txconf *tx_conf)
1571 struct rte_eth_dev *dev;
1572 struct rte_eth_dev_info dev_info;
1573 struct rte_eth_txconf local_conf;
1576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1578 dev = &rte_eth_devices[port_id];
1579 if (tx_queue_id >= dev->data->nb_tx_queues) {
1580 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1587 rte_eth_dev_info_get(port_id, &dev_info);
1589 /* Use default specified by driver, if nb_tx_desc is zero */
1590 if (nb_tx_desc == 0) {
1591 nb_tx_desc = dev_info.default_txportconf.ring_size;
1592 /* If driver default is zero, fall back on EAL default */
1593 if (nb_tx_desc == 0)
1594 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1596 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1597 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1598 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1599 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1600 "should be: <= %hu, = %hu, and a product of %hu\n",
1602 dev_info.tx_desc_lim.nb_max,
1603 dev_info.tx_desc_lim.nb_min,
1604 dev_info.tx_desc_lim.nb_align);
1608 if (dev->data->dev_started &&
1609 !(dev_info.dev_capa &
1610 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1613 if (dev->data->tx_queue_state[tx_queue_id] !=
1614 RTE_ETH_QUEUE_STATE_STOPPED)
1617 txq = dev->data->tx_queues;
1618 if (txq[tx_queue_id]) {
1619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1621 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1622 txq[tx_queue_id] = NULL;
1625 if (tx_conf == NULL)
1626 tx_conf = &dev_info.default_txconf;
1629 * Convert between the offloads API to enable PMDs to support
1632 local_conf = *tx_conf;
1633 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1634 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1635 &local_conf.offloads);
1638 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1639 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1643 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1644 void *userdata __rte_unused)
1648 for (i = 0; i < unsent; i++)
1649 rte_pktmbuf_free(pkts[i]);
1653 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1656 uint64_t *count = userdata;
1659 for (i = 0; i < unsent; i++)
1660 rte_pktmbuf_free(pkts[i]);
1666 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1667 buffer_tx_error_fn cbfn, void *userdata)
1669 buffer->error_callback = cbfn;
1670 buffer->error_userdata = userdata;
1675 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1682 buffer->size = size;
1683 if (buffer->error_callback == NULL) {
1684 ret = rte_eth_tx_buffer_set_err_callback(
1685 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1692 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1694 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1697 /* Validate Input Data. Bail if not valid or not supported. */
1698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1701 /* Call driver to free pending mbufs. */
1702 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1704 return eth_err(port_id, ret);
1708 rte_eth_promiscuous_enable(uint16_t port_id)
1710 struct rte_eth_dev *dev;
1712 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1713 dev = &rte_eth_devices[port_id];
1715 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1716 (*dev->dev_ops->promiscuous_enable)(dev);
1717 dev->data->promiscuous = 1;
1721 rte_eth_promiscuous_disable(uint16_t port_id)
1723 struct rte_eth_dev *dev;
1725 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1726 dev = &rte_eth_devices[port_id];
1728 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1729 dev->data->promiscuous = 0;
1730 (*dev->dev_ops->promiscuous_disable)(dev);
1734 rte_eth_promiscuous_get(uint16_t port_id)
1736 struct rte_eth_dev *dev;
1738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1740 dev = &rte_eth_devices[port_id];
1741 return dev->data->promiscuous;
1745 rte_eth_allmulticast_enable(uint16_t port_id)
1747 struct rte_eth_dev *dev;
1749 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1750 dev = &rte_eth_devices[port_id];
1752 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1753 (*dev->dev_ops->allmulticast_enable)(dev);
1754 dev->data->all_multicast = 1;
1758 rte_eth_allmulticast_disable(uint16_t port_id)
1760 struct rte_eth_dev *dev;
1762 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1763 dev = &rte_eth_devices[port_id];
1765 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1766 dev->data->all_multicast = 0;
1767 (*dev->dev_ops->allmulticast_disable)(dev);
1771 rte_eth_allmulticast_get(uint16_t port_id)
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1777 dev = &rte_eth_devices[port_id];
1778 return dev->data->all_multicast;
1782 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1784 struct rte_eth_dev *dev;
1786 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1787 dev = &rte_eth_devices[port_id];
1789 if (dev->data->dev_conf.intr_conf.lsc &&
1790 dev->data->dev_started)
1791 rte_eth_linkstatus_get(dev, eth_link);
1793 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1794 (*dev->dev_ops->link_update)(dev, 1);
1795 *eth_link = dev->data->dev_link;
1800 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1802 struct rte_eth_dev *dev;
1804 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1805 dev = &rte_eth_devices[port_id];
1807 if (dev->data->dev_conf.intr_conf.lsc &&
1808 dev->data->dev_started)
1809 rte_eth_linkstatus_get(dev, eth_link);
1811 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1812 (*dev->dev_ops->link_update)(dev, 0);
1813 *eth_link = dev->data->dev_link;
1818 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1820 struct rte_eth_dev *dev;
1822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1824 dev = &rte_eth_devices[port_id];
1825 memset(stats, 0, sizeof(*stats));
1827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1828 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1829 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1833 rte_eth_stats_reset(uint16_t port_id)
1835 struct rte_eth_dev *dev;
1837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1838 dev = &rte_eth_devices[port_id];
1840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1841 (*dev->dev_ops->stats_reset)(dev);
1842 dev->data->rx_mbuf_alloc_failed = 0;
1848 get_xstats_basic_count(struct rte_eth_dev *dev)
1850 uint16_t nb_rxqs, nb_txqs;
1853 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1854 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1856 count = RTE_NB_STATS;
1857 count += nb_rxqs * RTE_NB_RXQ_STATS;
1858 count += nb_txqs * RTE_NB_TXQ_STATS;
1864 get_xstats_count(uint16_t port_id)
1866 struct rte_eth_dev *dev;
1869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1870 dev = &rte_eth_devices[port_id];
1871 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1872 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1875 return eth_err(port_id, count);
1877 if (dev->dev_ops->xstats_get_names != NULL) {
1878 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1880 return eth_err(port_id, count);
1885 count += get_xstats_basic_count(dev);
1891 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1894 int cnt_xstats, idx_xstat;
1896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1899 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1904 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1909 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1910 if (cnt_xstats < 0) {
1911 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1915 /* Get id-name lookup table */
1916 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1918 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1919 port_id, xstats_names, cnt_xstats, NULL)) {
1920 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1924 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1925 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1934 /* retrieve basic stats names */
1936 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1937 struct rte_eth_xstat_name *xstats_names)
1939 int cnt_used_entries = 0;
1940 uint32_t idx, id_queue;
1943 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1944 snprintf(xstats_names[cnt_used_entries].name,
1945 sizeof(xstats_names[0].name),
1946 "%s", rte_stats_strings[idx].name);
1949 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1950 for (id_queue = 0; id_queue < num_q; id_queue++) {
1951 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1952 snprintf(xstats_names[cnt_used_entries].name,
1953 sizeof(xstats_names[0].name),
1955 id_queue, rte_rxq_stats_strings[idx].name);
1960 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1961 for (id_queue = 0; id_queue < num_q; id_queue++) {
1962 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1963 snprintf(xstats_names[cnt_used_entries].name,
1964 sizeof(xstats_names[0].name),
1966 id_queue, rte_txq_stats_strings[idx].name);
1970 return cnt_used_entries;
1973 /* retrieve ethdev extended statistics names */
1975 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1976 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1979 struct rte_eth_xstat_name *xstats_names_copy;
1980 unsigned int no_basic_stat_requested = 1;
1981 unsigned int no_ext_stat_requested = 1;
1982 unsigned int expected_entries;
1983 unsigned int basic_count;
1984 struct rte_eth_dev *dev;
1988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1989 dev = &rte_eth_devices[port_id];
1991 basic_count = get_xstats_basic_count(dev);
1992 ret = get_xstats_count(port_id);
1995 expected_entries = (unsigned int)ret;
1997 /* Return max number of stats if no ids given */
2000 return expected_entries;
2001 else if (xstats_names && size < expected_entries)
2002 return expected_entries;
2005 if (ids && !xstats_names)
2008 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2009 uint64_t ids_copy[size];
2011 for (i = 0; i < size; i++) {
2012 if (ids[i] < basic_count) {
2013 no_basic_stat_requested = 0;
2018 * Convert ids to xstats ids that PMD knows.
2019 * ids known by user are basic + extended stats.
2021 ids_copy[i] = ids[i] - basic_count;
2024 if (no_basic_stat_requested)
2025 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2026 xstats_names, ids_copy, size);
2029 /* Retrieve all stats */
2031 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2033 if (num_stats < 0 || num_stats > (int)expected_entries)
2036 return expected_entries;
2039 xstats_names_copy = calloc(expected_entries,
2040 sizeof(struct rte_eth_xstat_name));
2042 if (!xstats_names_copy) {
2043 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2048 for (i = 0; i < size; i++) {
2049 if (ids[i] >= basic_count) {
2050 no_ext_stat_requested = 0;
2056 /* Fill xstats_names_copy structure */
2057 if (ids && no_ext_stat_requested) {
2058 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2060 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2063 free(xstats_names_copy);
2069 for (i = 0; i < size; i++) {
2070 if (ids[i] >= expected_entries) {
2071 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2072 free(xstats_names_copy);
2075 xstats_names[i] = xstats_names_copy[ids[i]];
2078 free(xstats_names_copy);
2083 rte_eth_xstats_get_names(uint16_t port_id,
2084 struct rte_eth_xstat_name *xstats_names,
2087 struct rte_eth_dev *dev;
2088 int cnt_used_entries;
2089 int cnt_expected_entries;
2090 int cnt_driver_entries;
2092 cnt_expected_entries = get_xstats_count(port_id);
2093 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2094 (int)size < cnt_expected_entries)
2095 return cnt_expected_entries;
2097 /* port_id checked in get_xstats_count() */
2098 dev = &rte_eth_devices[port_id];
2100 cnt_used_entries = rte_eth_basic_stats_get_names(
2103 if (dev->dev_ops->xstats_get_names != NULL) {
2104 /* If there are any driver-specific xstats, append them
2107 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2109 xstats_names + cnt_used_entries,
2110 size - cnt_used_entries);
2111 if (cnt_driver_entries < 0)
2112 return eth_err(port_id, cnt_driver_entries);
2113 cnt_used_entries += cnt_driver_entries;
2116 return cnt_used_entries;
2121 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2123 struct rte_eth_dev *dev;
2124 struct rte_eth_stats eth_stats;
2125 unsigned int count = 0, i, q;
2126 uint64_t val, *stats_ptr;
2127 uint16_t nb_rxqs, nb_txqs;
2130 ret = rte_eth_stats_get(port_id, ð_stats);
2134 dev = &rte_eth_devices[port_id];
2136 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2137 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2140 for (i = 0; i < RTE_NB_STATS; i++) {
2141 stats_ptr = RTE_PTR_ADD(ð_stats,
2142 rte_stats_strings[i].offset);
2144 xstats[count++].value = val;
2148 for (q = 0; q < nb_rxqs; q++) {
2149 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2150 stats_ptr = RTE_PTR_ADD(ð_stats,
2151 rte_rxq_stats_strings[i].offset +
2152 q * sizeof(uint64_t));
2154 xstats[count++].value = val;
2159 for (q = 0; q < nb_txqs; q++) {
2160 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2161 stats_ptr = RTE_PTR_ADD(ð_stats,
2162 rte_txq_stats_strings[i].offset +
2163 q * sizeof(uint64_t));
2165 xstats[count++].value = val;
2171 /* retrieve ethdev extended statistics */
2173 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2174 uint64_t *values, unsigned int size)
2176 unsigned int no_basic_stat_requested = 1;
2177 unsigned int no_ext_stat_requested = 1;
2178 unsigned int num_xstats_filled;
2179 unsigned int basic_count;
2180 uint16_t expected_entries;
2181 struct rte_eth_dev *dev;
2185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2186 ret = get_xstats_count(port_id);
2189 expected_entries = (uint16_t)ret;
2190 struct rte_eth_xstat xstats[expected_entries];
2191 dev = &rte_eth_devices[port_id];
2192 basic_count = get_xstats_basic_count(dev);
2194 /* Return max number of stats if no ids given */
2197 return expected_entries;
2198 else if (values && size < expected_entries)
2199 return expected_entries;
2205 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2206 unsigned int basic_count = get_xstats_basic_count(dev);
2207 uint64_t ids_copy[size];
2209 for (i = 0; i < size; i++) {
2210 if (ids[i] < basic_count) {
2211 no_basic_stat_requested = 0;
2216 * Convert ids to xstats ids that PMD knows.
2217 * ids known by user are basic + extended stats.
2219 ids_copy[i] = ids[i] - basic_count;
2222 if (no_basic_stat_requested)
2223 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2228 for (i = 0; i < size; i++) {
2229 if (ids[i] >= basic_count) {
2230 no_ext_stat_requested = 0;
2236 /* Fill the xstats structure */
2237 if (ids && no_ext_stat_requested)
2238 ret = rte_eth_basic_stats_get(port_id, xstats);
2240 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2244 num_xstats_filled = (unsigned int)ret;
2246 /* Return all stats */
2248 for (i = 0; i < num_xstats_filled; i++)
2249 values[i] = xstats[i].value;
2250 return expected_entries;
2254 for (i = 0; i < size; i++) {
2255 if (ids[i] >= expected_entries) {
2256 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2259 values[i] = xstats[ids[i]].value;
2265 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2268 struct rte_eth_dev *dev;
2269 unsigned int count = 0, i;
2270 signed int xcount = 0;
2271 uint16_t nb_rxqs, nb_txqs;
2274 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2276 dev = &rte_eth_devices[port_id];
2278 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2279 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2281 /* Return generic statistics */
2282 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2283 (nb_txqs * RTE_NB_TXQ_STATS);
2285 /* implemented by the driver */
2286 if (dev->dev_ops->xstats_get != NULL) {
2287 /* Retrieve the xstats from the driver at the end of the
2290 xcount = (*dev->dev_ops->xstats_get)(dev,
2291 xstats ? xstats + count : NULL,
2292 (n > count) ? n - count : 0);
2295 return eth_err(port_id, xcount);
2298 if (n < count + xcount || xstats == NULL)
2299 return count + xcount;
2301 /* now fill the xstats structure */
2302 ret = rte_eth_basic_stats_get(port_id, xstats);
2307 for (i = 0; i < count; i++)
2309 /* add an offset to driver-specific stats */
2310 for ( ; i < count + xcount; i++)
2311 xstats[i].id += count;
2313 return count + xcount;
2316 /* reset ethdev extended statistics */
2318 rte_eth_xstats_reset(uint16_t port_id)
2320 struct rte_eth_dev *dev;
2322 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2323 dev = &rte_eth_devices[port_id];
2325 /* implemented by the driver */
2326 if (dev->dev_ops->xstats_reset != NULL) {
2327 (*dev->dev_ops->xstats_reset)(dev);
2331 /* fallback to default */
2332 rte_eth_stats_reset(port_id);
2336 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2339 struct rte_eth_dev *dev;
2341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2343 dev = &rte_eth_devices[port_id];
2345 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2346 return (*dev->dev_ops->queue_stats_mapping_set)
2347 (dev, queue_id, stat_idx, is_rx);
2352 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2355 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2356 stat_idx, STAT_QMAP_TX));
2361 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2364 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2365 stat_idx, STAT_QMAP_RX));
2369 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2371 struct rte_eth_dev *dev;
2373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2374 dev = &rte_eth_devices[port_id];
2376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2377 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2378 fw_version, fw_size));
2382 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2384 struct rte_eth_dev *dev;
2385 struct rte_eth_txconf *txconf;
2386 const struct rte_eth_desc_lim lim = {
2387 .nb_max = UINT16_MAX,
2392 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2393 dev = &rte_eth_devices[port_id];
2395 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2396 dev_info->rx_desc_lim = lim;
2397 dev_info->tx_desc_lim = lim;
2398 dev_info->device = dev->device;
2400 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2401 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2402 dev_info->driver_name = dev->device->driver->name;
2403 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2404 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2406 dev_info->dev_flags = &dev->data->dev_flags;
2407 txconf = &dev_info->default_txconf;
2408 /* convert offload to txq_flags to support legacy app */
2409 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2413 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2414 uint32_t *ptypes, int num)
2417 struct rte_eth_dev *dev;
2418 const uint32_t *all_ptypes;
2420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2421 dev = &rte_eth_devices[port_id];
2422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2423 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2428 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2429 if (all_ptypes[i] & ptype_mask) {
2431 ptypes[j] = all_ptypes[i];
2439 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2441 struct rte_eth_dev *dev;
2443 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2444 dev = &rte_eth_devices[port_id];
2445 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2450 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2452 struct rte_eth_dev *dev;
2454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2456 dev = &rte_eth_devices[port_id];
2457 *mtu = dev->data->mtu;
2462 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2465 struct rte_eth_dev *dev;
2467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2468 dev = &rte_eth_devices[port_id];
2469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2471 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2473 dev->data->mtu = mtu;
2475 return eth_err(port_id, ret);
2479 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2481 struct rte_eth_dev *dev;
2484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2485 dev = &rte_eth_devices[port_id];
2486 if (!(dev->data->dev_conf.rxmode.offloads &
2487 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2488 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2492 if (vlan_id > 4095) {
2493 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2494 port_id, (unsigned) vlan_id);
2497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2499 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2501 struct rte_vlan_filter_conf *vfc;
2505 vfc = &dev->data->vlan_filter_conf;
2506 vidx = vlan_id / 64;
2507 vbit = vlan_id % 64;
2510 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2512 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2515 return eth_err(port_id, ret);
2519 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2522 struct rte_eth_dev *dev;
2524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2525 dev = &rte_eth_devices[port_id];
2526 if (rx_queue_id >= dev->data->nb_rx_queues) {
2527 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2532 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2538 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2539 enum rte_vlan_type vlan_type,
2542 struct rte_eth_dev *dev;
2544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2545 dev = &rte_eth_devices[port_id];
2546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2548 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2553 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2555 struct rte_eth_dev *dev;
2559 uint64_t orig_offloads;
2561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2562 dev = &rte_eth_devices[port_id];
2564 /* save original values in case of failure */
2565 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2567 /*check which option changed by application*/
2568 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2569 org = !!(dev->data->dev_conf.rxmode.offloads &
2570 DEV_RX_OFFLOAD_VLAN_STRIP);
2573 dev->data->dev_conf.rxmode.offloads |=
2574 DEV_RX_OFFLOAD_VLAN_STRIP;
2576 dev->data->dev_conf.rxmode.offloads &=
2577 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2578 mask |= ETH_VLAN_STRIP_MASK;
2581 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2582 org = !!(dev->data->dev_conf.rxmode.offloads &
2583 DEV_RX_OFFLOAD_VLAN_FILTER);
2586 dev->data->dev_conf.rxmode.offloads |=
2587 DEV_RX_OFFLOAD_VLAN_FILTER;
2589 dev->data->dev_conf.rxmode.offloads &=
2590 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2591 mask |= ETH_VLAN_FILTER_MASK;
2594 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2595 org = !!(dev->data->dev_conf.rxmode.offloads &
2596 DEV_RX_OFFLOAD_VLAN_EXTEND);
2599 dev->data->dev_conf.rxmode.offloads |=
2600 DEV_RX_OFFLOAD_VLAN_EXTEND;
2602 dev->data->dev_conf.rxmode.offloads &=
2603 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2604 mask |= ETH_VLAN_EXTEND_MASK;
2611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2612 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2614 /* hit an error restore original values */
2615 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2618 return eth_err(port_id, ret);
2622 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2624 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2630 if (dev->data->dev_conf.rxmode.offloads &
2631 DEV_RX_OFFLOAD_VLAN_STRIP)
2632 ret |= ETH_VLAN_STRIP_OFFLOAD;
2634 if (dev->data->dev_conf.rxmode.offloads &
2635 DEV_RX_OFFLOAD_VLAN_FILTER)
2636 ret |= ETH_VLAN_FILTER_OFFLOAD;
2638 if (dev->data->dev_conf.rxmode.offloads &
2639 DEV_RX_OFFLOAD_VLAN_EXTEND)
2640 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2646 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2648 struct rte_eth_dev *dev;
2650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2651 dev = &rte_eth_devices[port_id];
2652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2654 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2658 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2660 struct rte_eth_dev *dev;
2662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2663 dev = &rte_eth_devices[port_id];
2664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2665 memset(fc_conf, 0, sizeof(*fc_conf));
2666 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2670 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2672 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2676 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2680 dev = &rte_eth_devices[port_id];
2681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2682 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2686 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2687 struct rte_eth_pfc_conf *pfc_conf)
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2693 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2697 dev = &rte_eth_devices[port_id];
2698 /* High water, low water validation are device specific */
2699 if (*dev->dev_ops->priority_flow_ctrl_set)
2700 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2706 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2714 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2715 for (i = 0; i < num; i++) {
2716 if (reta_conf[i].mask)
2724 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2728 uint16_t i, idx, shift;
2734 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2738 for (i = 0; i < reta_size; i++) {
2739 idx = i / RTE_RETA_GROUP_SIZE;
2740 shift = i % RTE_RETA_GROUP_SIZE;
2741 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2742 (reta_conf[idx].reta[shift] >= max_rxq)) {
2743 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2744 "the maximum rxq index: %u\n", idx, shift,
2745 reta_conf[idx].reta[shift], max_rxq);
2754 rte_eth_dev_rss_reta_update(uint16_t port_id,
2755 struct rte_eth_rss_reta_entry64 *reta_conf,
2758 struct rte_eth_dev *dev;
2761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2762 /* Check mask bits */
2763 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2767 dev = &rte_eth_devices[port_id];
2769 /* Check entry value */
2770 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2771 dev->data->nb_rx_queues);
2775 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2776 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2781 rte_eth_dev_rss_reta_query(uint16_t port_id,
2782 struct rte_eth_rss_reta_entry64 *reta_conf,
2785 struct rte_eth_dev *dev;
2788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2790 /* Check mask bits */
2791 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2795 dev = &rte_eth_devices[port_id];
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2797 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2802 rte_eth_dev_rss_hash_update(uint16_t port_id,
2803 struct rte_eth_rss_conf *rss_conf)
2805 struct rte_eth_dev *dev;
2806 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2810 rte_eth_dev_info_get(port_id, &dev_info);
2811 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2812 dev_info.flow_type_rss_offloads) {
2813 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2814 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2817 dev_info.flow_type_rss_offloads);
2819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2820 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2825 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2826 struct rte_eth_rss_conf *rss_conf)
2828 struct rte_eth_dev *dev;
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2831 dev = &rte_eth_devices[port_id];
2832 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2833 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2838 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2839 struct rte_eth_udp_tunnel *udp_tunnel)
2841 struct rte_eth_dev *dev;
2843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2844 if (udp_tunnel == NULL) {
2845 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2849 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2850 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2854 dev = &rte_eth_devices[port_id];
2855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2856 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2861 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2862 struct rte_eth_udp_tunnel *udp_tunnel)
2864 struct rte_eth_dev *dev;
2866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2867 dev = &rte_eth_devices[port_id];
2869 if (udp_tunnel == NULL) {
2870 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2874 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2875 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2880 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2885 rte_eth_led_on(uint16_t port_id)
2887 struct rte_eth_dev *dev;
2889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2890 dev = &rte_eth_devices[port_id];
2891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2892 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2896 rte_eth_led_off(uint16_t port_id)
2898 struct rte_eth_dev *dev;
2900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2901 dev = &rte_eth_devices[port_id];
2902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2903 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2907 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2911 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2913 struct rte_eth_dev_info dev_info;
2914 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2918 rte_eth_dev_info_get(port_id, &dev_info);
2920 for (i = 0; i < dev_info.max_mac_addrs; i++)
2921 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2927 static const struct ether_addr null_mac_addr;
2930 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2933 struct rte_eth_dev *dev;
2938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2939 dev = &rte_eth_devices[port_id];
2940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2942 if (is_zero_ether_addr(addr)) {
2943 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2947 if (pool >= ETH_64_POOLS) {
2948 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2952 index = get_mac_addr_index(port_id, addr);
2954 index = get_mac_addr_index(port_id, &null_mac_addr);
2956 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2961 pool_mask = dev->data->mac_pool_sel[index];
2963 /* Check if both MAC address and pool is already there, and do nothing */
2964 if (pool_mask & (1ULL << pool))
2969 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2972 /* Update address in NIC data structure */
2973 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2975 /* Update pool bitmap in NIC data structure */
2976 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2979 return eth_err(port_id, ret);
2983 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2985 struct rte_eth_dev *dev;
2988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2989 dev = &rte_eth_devices[port_id];
2990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2992 index = get_mac_addr_index(port_id, addr);
2994 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2996 } else if (index < 0)
2997 return 0; /* Do nothing if address wasn't found */
3000 (*dev->dev_ops->mac_addr_remove)(dev, index);
3002 /* Update address in NIC data structure */
3003 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3005 /* reset pool bitmap */
3006 dev->data->mac_pool_sel[index] = 0;
3012 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3014 struct rte_eth_dev *dev;
3017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3019 if (!is_valid_assigned_ether_addr(addr))
3022 dev = &rte_eth_devices[port_id];
3023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3025 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3029 /* Update default address in NIC data structure */
3030 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3037 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3041 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3043 struct rte_eth_dev_info dev_info;
3044 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3047 rte_eth_dev_info_get(port_id, &dev_info);
3048 if (!dev->data->hash_mac_addrs)
3051 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3052 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3053 ETHER_ADDR_LEN) == 0)
3060 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3065 struct rte_eth_dev *dev;
3067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3069 dev = &rte_eth_devices[port_id];
3070 if (is_zero_ether_addr(addr)) {
3071 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3076 index = get_hash_mac_addr_index(port_id, addr);
3077 /* Check if it's already there, and do nothing */
3078 if ((index >= 0) && on)
3083 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3084 "set in UTA\n", port_id);
3088 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3090 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3096 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3097 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3099 /* Update address in NIC data structure */
3101 ether_addr_copy(addr,
3102 &dev->data->hash_mac_addrs[index]);
3104 ether_addr_copy(&null_mac_addr,
3105 &dev->data->hash_mac_addrs[index]);
3108 return eth_err(port_id, ret);
3112 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3114 struct rte_eth_dev *dev;
3116 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3118 dev = &rte_eth_devices[port_id];
3120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3121 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3125 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3128 struct rte_eth_dev *dev;
3129 struct rte_eth_dev_info dev_info;
3130 struct rte_eth_link link;
3132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3134 dev = &rte_eth_devices[port_id];
3135 rte_eth_dev_info_get(port_id, &dev_info);
3136 link = dev->data->dev_link;
3138 if (queue_idx > dev_info.max_tx_queues) {
3139 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3140 "invalid queue id=%d\n", port_id, queue_idx);
3144 if (tx_rate > link.link_speed) {
3145 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3146 "bigger than link speed= %d\n",
3147 tx_rate, link.link_speed);
3151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3152 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3153 queue_idx, tx_rate));
3157 rte_eth_mirror_rule_set(uint16_t port_id,
3158 struct rte_eth_mirror_conf *mirror_conf,
3159 uint8_t rule_id, uint8_t on)
3161 struct rte_eth_dev *dev;
3163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3164 if (mirror_conf->rule_type == 0) {
3165 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3169 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3170 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3175 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3176 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3177 (mirror_conf->pool_mask == 0)) {
3178 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3182 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3183 mirror_conf->vlan.vlan_mask == 0) {
3184 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3188 dev = &rte_eth_devices[port_id];
3189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3191 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3192 mirror_conf, rule_id, on));
3196 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3198 struct rte_eth_dev *dev;
3200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3202 dev = &rte_eth_devices[port_id];
3203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3205 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3209 RTE_INIT(eth_dev_init_cb_lists)
3213 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3214 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3218 rte_eth_dev_callback_register(uint16_t port_id,
3219 enum rte_eth_event_type event,
3220 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3222 struct rte_eth_dev *dev;
3223 struct rte_eth_dev_callback *user_cb;
3224 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3230 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3231 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3235 if (port_id == RTE_ETH_ALL) {
3237 last_port = RTE_MAX_ETHPORTS - 1;
3239 next_port = last_port = port_id;
3242 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3245 dev = &rte_eth_devices[next_port];
3247 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3248 if (user_cb->cb_fn == cb_fn &&
3249 user_cb->cb_arg == cb_arg &&
3250 user_cb->event == event) {
3255 /* create a new callback. */
3256 if (user_cb == NULL) {
3257 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3258 sizeof(struct rte_eth_dev_callback), 0);
3259 if (user_cb != NULL) {
3260 user_cb->cb_fn = cb_fn;
3261 user_cb->cb_arg = cb_arg;
3262 user_cb->event = event;
3263 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3266 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3267 rte_eth_dev_callback_unregister(port_id, event,
3273 } while (++next_port <= last_port);
3275 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3280 rte_eth_dev_callback_unregister(uint16_t port_id,
3281 enum rte_eth_event_type event,
3282 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3285 struct rte_eth_dev *dev;
3286 struct rte_eth_dev_callback *cb, *next;
3287 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3293 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3294 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3298 if (port_id == RTE_ETH_ALL) {
3300 last_port = RTE_MAX_ETHPORTS - 1;
3302 next_port = last_port = port_id;
3305 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3308 dev = &rte_eth_devices[next_port];
3310 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3313 next = TAILQ_NEXT(cb, next);
3315 if (cb->cb_fn != cb_fn || cb->event != event ||
3316 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3320 * if this callback is not executing right now,
3323 if (cb->active == 0) {
3324 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3330 } while (++next_port <= last_port);
3332 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3337 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3338 enum rte_eth_event_type event, void *ret_param)
3340 struct rte_eth_dev_callback *cb_lst;
3341 struct rte_eth_dev_callback dev_cb;
3344 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3345 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3346 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3350 if (ret_param != NULL)
3351 dev_cb.ret_param = ret_param;
3353 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3354 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3355 dev_cb.cb_arg, dev_cb.ret_param);
3356 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3359 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3364 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3367 struct rte_eth_dev *dev;
3368 struct rte_intr_handle *intr_handle;
3372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3374 dev = &rte_eth_devices[port_id];
3376 if (!dev->intr_handle) {
3377 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3381 intr_handle = dev->intr_handle;
3382 if (!intr_handle->intr_vec) {
3383 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3387 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3388 vec = intr_handle->intr_vec[qid];
3389 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3390 if (rc && rc != -EEXIST) {
3391 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3392 " op %d epfd %d vec %u\n",
3393 port_id, qid, op, epfd, vec);
3400 const struct rte_memzone *
3401 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3402 uint16_t queue_id, size_t size, unsigned align,
3405 char z_name[RTE_MEMZONE_NAMESIZE];
3406 const struct rte_memzone *mz;
3408 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3409 dev->device->driver->name, ring_name,
3410 dev->data->port_id, queue_id);
3412 mz = rte_memzone_lookup(z_name);
3416 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3417 RTE_MEMZONE_IOVA_CONTIG, align);
3420 int __rte_experimental
3421 rte_eth_dev_create(struct rte_device *device, const char *name,
3422 size_t priv_data_size,
3423 ethdev_bus_specific_init ethdev_bus_specific_init,
3424 void *bus_init_params,
3425 ethdev_init_t ethdev_init, void *init_params)
3427 struct rte_eth_dev *ethdev;
3430 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3432 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3433 ethdev = rte_eth_dev_allocate(name);
3439 if (priv_data_size) {
3440 ethdev->data->dev_private = rte_zmalloc_socket(
3441 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3444 if (!ethdev->data->dev_private) {
3445 RTE_LOG(ERR, EAL, "failed to allocate private data");
3451 ethdev = rte_eth_dev_attach_secondary(name);
3453 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3454 "ethdev doesn't exist");
3460 ethdev->device = device;
3462 if (ethdev_bus_specific_init) {
3463 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3466 "ethdev bus specific initialisation failed");
3471 retval = ethdev_init(ethdev, init_params);
3473 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3479 /* free ports private data if primary process */
3480 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3481 rte_free(ethdev->data->dev_private);
3483 rte_eth_dev_release_port(ethdev);
3488 int __rte_experimental
3489 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3490 ethdev_uninit_t ethdev_uninit)
3494 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3498 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3499 if (ethdev_uninit) {
3500 ret = ethdev_uninit(ethdev);
3505 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3506 rte_free(ethdev->data->dev_private);
3508 ethdev->data->dev_private = NULL;
3510 return rte_eth_dev_release_port(ethdev);
3514 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3515 int epfd, int op, void *data)
3518 struct rte_eth_dev *dev;
3519 struct rte_intr_handle *intr_handle;
3522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3524 dev = &rte_eth_devices[port_id];
3525 if (queue_id >= dev->data->nb_rx_queues) {
3526 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3530 if (!dev->intr_handle) {
3531 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3535 intr_handle = dev->intr_handle;
3536 if (!intr_handle->intr_vec) {
3537 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3541 vec = intr_handle->intr_vec[queue_id];
3542 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3543 if (rc && rc != -EEXIST) {
3544 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3545 " op %d epfd %d vec %u\n",
3546 port_id, queue_id, op, epfd, vec);
3554 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3557 struct rte_eth_dev *dev;
3559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3561 dev = &rte_eth_devices[port_id];
3563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3564 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3569 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3572 struct rte_eth_dev *dev;
3574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3576 dev = &rte_eth_devices[port_id];
3578 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3579 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3585 rte_eth_dev_filter_supported(uint16_t port_id,
3586 enum rte_filter_type filter_type)
3588 struct rte_eth_dev *dev;
3590 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3592 dev = &rte_eth_devices[port_id];
3593 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3594 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3595 RTE_ETH_FILTER_NOP, NULL);
3599 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3600 enum rte_filter_op filter_op, void *arg)
3602 struct rte_eth_dev *dev;
3604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3606 dev = &rte_eth_devices[port_id];
3607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3608 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3612 const struct rte_eth_rxtx_callback *
3613 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3614 rte_rx_callback_fn fn, void *user_param)
3616 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3617 rte_errno = ENOTSUP;
3620 /* check input parameters */
3621 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3622 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3626 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3634 cb->param = user_param;
3636 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3637 /* Add the callbacks in fifo order. */
3638 struct rte_eth_rxtx_callback *tail =
3639 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3642 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3649 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3654 const struct rte_eth_rxtx_callback *
3655 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3656 rte_rx_callback_fn fn, void *user_param)
3658 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3659 rte_errno = ENOTSUP;
3662 /* check input parameters */
3663 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3664 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3669 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3677 cb->param = user_param;
3679 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3680 /* Add the callbacks at fisrt position*/
3681 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3683 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3684 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3689 const struct rte_eth_rxtx_callback *
3690 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3691 rte_tx_callback_fn fn, void *user_param)
3693 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3694 rte_errno = ENOTSUP;
3697 /* check input parameters */
3698 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3699 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3704 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3712 cb->param = user_param;
3714 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3715 /* Add the callbacks in fifo order. */
3716 struct rte_eth_rxtx_callback *tail =
3717 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3720 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3727 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3733 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3734 const struct rte_eth_rxtx_callback *user_cb)
3736 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3739 /* Check input parameters. */
3740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3741 if (user_cb == NULL ||
3742 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3745 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3746 struct rte_eth_rxtx_callback *cb;
3747 struct rte_eth_rxtx_callback **prev_cb;
3750 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3751 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3752 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3754 if (cb == user_cb) {
3755 /* Remove the user cb from the callback list. */
3756 *prev_cb = cb->next;
3761 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3767 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3768 const struct rte_eth_rxtx_callback *user_cb)
3770 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3773 /* Check input parameters. */
3774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3775 if (user_cb == NULL ||
3776 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3779 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3781 struct rte_eth_rxtx_callback *cb;
3782 struct rte_eth_rxtx_callback **prev_cb;
3784 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3785 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3786 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3788 if (cb == user_cb) {
3789 /* Remove the user cb from the callback list. */
3790 *prev_cb = cb->next;
3795 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3801 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3802 struct rte_eth_rxq_info *qinfo)
3804 struct rte_eth_dev *dev;
3806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3811 dev = &rte_eth_devices[port_id];
3812 if (queue_id >= dev->data->nb_rx_queues) {
3813 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3819 memset(qinfo, 0, sizeof(*qinfo));
3820 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3825 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3826 struct rte_eth_txq_info *qinfo)
3828 struct rte_eth_dev *dev;
3829 struct rte_eth_txconf *txconf = &qinfo->conf;
3831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3836 dev = &rte_eth_devices[port_id];
3837 if (queue_id >= dev->data->nb_tx_queues) {
3838 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3844 memset(qinfo, 0, sizeof(*qinfo));
3845 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3846 /* convert offload to txq_flags to support legacy app */
3847 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3853 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3854 struct ether_addr *mc_addr_set,
3855 uint32_t nb_mc_addr)
3857 struct rte_eth_dev *dev;
3859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3861 dev = &rte_eth_devices[port_id];
3862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3863 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3864 mc_addr_set, nb_mc_addr));
3868 rte_eth_timesync_enable(uint16_t port_id)
3870 struct rte_eth_dev *dev;
3872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3873 dev = &rte_eth_devices[port_id];
3875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3876 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3880 rte_eth_timesync_disable(uint16_t port_id)
3882 struct rte_eth_dev *dev;
3884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3885 dev = &rte_eth_devices[port_id];
3887 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3888 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3892 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3895 struct rte_eth_dev *dev;
3897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3898 dev = &rte_eth_devices[port_id];
3900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3901 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3902 (dev, timestamp, flags));
3906 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3907 struct timespec *timestamp)
3909 struct rte_eth_dev *dev;
3911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3912 dev = &rte_eth_devices[port_id];
3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3915 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3920 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3922 struct rte_eth_dev *dev;
3924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3925 dev = &rte_eth_devices[port_id];
3927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3928 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3933 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3935 struct rte_eth_dev *dev;
3937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3938 dev = &rte_eth_devices[port_id];
3940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3941 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3946 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3948 struct rte_eth_dev *dev;
3950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3951 dev = &rte_eth_devices[port_id];
3953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3954 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3959 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3961 struct rte_eth_dev *dev;
3963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3965 dev = &rte_eth_devices[port_id];
3966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3967 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3971 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3973 struct rte_eth_dev *dev;
3975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3977 dev = &rte_eth_devices[port_id];
3978 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3979 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3983 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3985 struct rte_eth_dev *dev;
3987 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3989 dev = &rte_eth_devices[port_id];
3990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3991 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3995 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3997 struct rte_eth_dev *dev;
3999 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4001 dev = &rte_eth_devices[port_id];
4002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4003 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4006 int __rte_experimental
4007 rte_eth_dev_get_module_info(uint16_t port_id,
4008 struct rte_eth_dev_module_info *modinfo)
4010 struct rte_eth_dev *dev;
4012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4014 dev = &rte_eth_devices[port_id];
4015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4016 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4019 int __rte_experimental
4020 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4021 struct rte_dev_eeprom_info *info)
4023 struct rte_eth_dev *dev;
4025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4027 dev = &rte_eth_devices[port_id];
4028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4029 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4033 rte_eth_dev_get_dcb_info(uint16_t port_id,
4034 struct rte_eth_dcb_info *dcb_info)
4036 struct rte_eth_dev *dev;
4038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4040 dev = &rte_eth_devices[port_id];
4041 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4044 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4048 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4049 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4051 struct rte_eth_dev *dev;
4053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4054 if (l2_tunnel == NULL) {
4055 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4059 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4060 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4064 dev = &rte_eth_devices[port_id];
4065 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4067 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4072 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4073 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4077 struct rte_eth_dev *dev;
4079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4081 if (l2_tunnel == NULL) {
4082 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4086 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4087 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4092 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4096 dev = &rte_eth_devices[port_id];
4097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4099 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4100 l2_tunnel, mask, en));
4104 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4105 const struct rte_eth_desc_lim *desc_lim)
4107 if (desc_lim->nb_align != 0)
4108 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4110 if (desc_lim->nb_max != 0)
4111 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4113 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4117 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4118 uint16_t *nb_rx_desc,
4119 uint16_t *nb_tx_desc)
4121 struct rte_eth_dev *dev;
4122 struct rte_eth_dev_info dev_info;
4124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4126 dev = &rte_eth_devices[port_id];
4127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4129 rte_eth_dev_info_get(port_id, &dev_info);
4131 if (nb_rx_desc != NULL)
4132 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4134 if (nb_tx_desc != NULL)
4135 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4141 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4143 struct rte_eth_dev *dev;
4145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4150 dev = &rte_eth_devices[port_id];
4152 if (*dev->dev_ops->pool_ops_supported == NULL)
4153 return 1; /* all pools are supported */
4155 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4159 * A set of values to describe the possible states of a switch domain.
4161 enum rte_eth_switch_domain_state {
4162 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4163 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4167 * Array of switch domains available for allocation. Array is sized to
4168 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4169 * ethdev ports in a single process.
4171 struct rte_eth_dev_switch {
4172 enum rte_eth_switch_domain_state state;
4173 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4175 int __rte_experimental
4176 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4180 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4182 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4183 i < RTE_MAX_ETHPORTS; i++) {
4184 if (rte_eth_switch_domains[i].state ==
4185 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4186 rte_eth_switch_domains[i].state =
4187 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4196 int __rte_experimental
4197 rte_eth_switch_domain_free(uint16_t domain_id)
4199 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4200 domain_id >= RTE_MAX_ETHPORTS)
4203 if (rte_eth_switch_domains[domain_id].state !=
4204 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4207 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4212 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4215 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4218 struct rte_kvargs_pair *pair;
4221 arglist->str = strdup(str_in);
4222 if (arglist->str == NULL)
4225 letter = arglist->str;
4228 pair = &arglist->pairs[0];
4231 case 0: /* Initial */
4234 else if (*letter == '\0')
4241 case 1: /* Parsing key */
4242 if (*letter == '=') {
4244 pair->value = letter + 1;
4246 } else if (*letter == ',' || *letter == '\0')
4251 case 2: /* Parsing value */
4254 else if (*letter == ',') {
4257 pair = &arglist->pairs[arglist->count];
4259 } else if (*letter == '\0') {
4262 pair = &arglist->pairs[arglist->count];
4267 case 3: /* Parsing list */
4270 else if (*letter == '\0')
4279 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4287 /* Single element, not a list */
4288 return callback(str, data);
4290 /* Sanity check, then strip the brackets */
4291 str_start = &str[strlen(str) - 1];
4292 if (*str_start != ']') {
4293 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4299 /* Process list elements */
4309 } else if (state == 1) {
4310 if (*str == ',' || *str == '\0') {
4311 if (str > str_start) {
4312 /* Non-empty string fragment */
4314 result = callback(str_start, data);
4327 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4328 const uint16_t max_list)
4330 uint16_t lo, hi, val;
4333 result = sscanf(str, "%hu-%hu", &lo, &hi);
4335 if (*len_list >= max_list)
4337 list[(*len_list)++] = lo;
4338 } else if (result == 2) {
4339 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4341 for (val = lo; val <= hi; val++) {
4342 if (*len_list >= max_list)
4344 list[(*len_list)++] = val;
4353 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4355 struct rte_eth_devargs *eth_da = data;
4357 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4358 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4361 int __rte_experimental
4362 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4364 struct rte_kvargs args;
4365 struct rte_kvargs_pair *pair;
4369 memset(eth_da, 0, sizeof(*eth_da));
4371 result = rte_eth_devargs_tokenise(&args, dargs);
4375 for (i = 0; i < args.count; i++) {
4376 pair = &args.pairs[i];
4377 if (strcmp("representor", pair->key) == 0) {
4378 result = rte_eth_devargs_parse_list(pair->value,
4379 rte_eth_devargs_parse_representor_ports,
4393 RTE_INIT(ethdev_init_log);
4395 ethdev_init_log(void)
4397 ethdev_logtype = rte_log_register("lib.ethdev");
4398 if (ethdev_logtype >= 0)
4399 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);