1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 static int ethdev_logtype;
47 #define ethdev_log(level, fmt, ...) \
48 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
50 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
51 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 static uint8_t eth_dev_last_created_port;
54 /* spinlock for eth device callbacks */
55 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove rx callbacks */
58 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for add/remove tx callbacks */
61 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
63 /* spinlock for shared data allocation */
64 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* store statistics names and its offset in stats structure */
67 struct rte_eth_xstats_name_off {
68 char name[RTE_ETH_XSTATS_NAME_SIZE];
72 /* Shared memory between primary and secondary processes. */
74 uint64_t next_owner_id;
75 rte_spinlock_t ownership_lock;
76 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
77 } *rte_eth_dev_shared_data;
79 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
80 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
81 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
82 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
83 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
84 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
85 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
86 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
87 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
91 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
93 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
94 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
95 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
96 {"errors", offsetof(struct rte_eth_stats, q_errors)},
99 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
100 sizeof(rte_rxq_stats_strings[0]))
102 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
103 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
104 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
106 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
107 sizeof(rte_txq_stats_strings[0]))
109 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
110 { DEV_RX_OFFLOAD_##_name, #_name }
112 static const struct {
115 } rte_rx_offload_names[] = {
116 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
121 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
123 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
124 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
126 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
127 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
128 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
129 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
130 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
131 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
237 static struct rte_eth_dev *
238 _rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if (rte_eth_devices[i].data != NULL &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_allocated(const char *name)
253 struct rte_eth_dev *ethdev;
255 rte_eth_dev_shared_data_prepare();
257 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
259 ethdev = _rte_eth_dev_allocated(name);
261 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
267 rte_eth_dev_find_free_port(void)
271 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
272 /* Using shared name field to find a free port. */
273 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
274 RTE_ASSERT(rte_eth_devices[i].state ==
279 return RTE_MAX_ETHPORTS;
282 static struct rte_eth_dev *
283 eth_dev_get(uint16_t port_id)
285 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
287 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
289 eth_dev_last_created_port = port_id;
295 rte_eth_dev_allocate(const char *name)
298 struct rte_eth_dev *eth_dev = NULL;
300 rte_eth_dev_shared_data_prepare();
302 /* Synchronize port creation between primary and secondary threads. */
303 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
305 if (_rte_eth_dev_allocated(name) != NULL) {
306 ethdev_log(ERR, "Ethernet device with name %s already allocated",
311 port_id = rte_eth_dev_find_free_port();
312 if (port_id == RTE_MAX_ETHPORTS) {
313 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
371 eth_dev->state = RTE_ETH_DEV_UNUSED;
373 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
375 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
377 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
397 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016"PRIX64".\n", owner_id);
404 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
406 while (port_id < RTE_MAX_ETHPORTS &&
407 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
408 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
409 rte_eth_devices[port_id].data->owner.id != owner_id))
412 if (port_id >= RTE_MAX_ETHPORTS)
413 return RTE_MAX_ETHPORTS;
418 int __rte_experimental
419 rte_eth_dev_owner_new(uint64_t *owner_id)
421 rte_eth_dev_shared_data_prepare();
423 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
425 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
427 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
433 const struct rte_eth_dev_owner *new_owner)
435 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
436 struct rte_eth_dev_owner *port_owner;
439 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
440 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
444 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
445 !rte_eth_is_valid_owner_id(old_owner_id))
448 port_owner = &rte_eth_devices[port_id].data->owner;
449 if (port_owner->id != old_owner_id) {
450 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
451 " by %s_%016"PRIX64".\n", port_id,
452 port_owner->name, port_owner->id);
456 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
458 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
459 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
462 port_owner->id = new_owner->id;
464 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016"PRIX64".\n", port_id,
465 new_owner->name, new_owner->id);
470 int __rte_experimental
471 rte_eth_dev_owner_set(const uint16_t port_id,
472 const struct rte_eth_dev_owner *owner)
476 rte_eth_dev_shared_data_prepare();
478 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
480 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
482 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
486 int __rte_experimental
487 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
489 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
490 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
493 rte_eth_dev_shared_data_prepare();
495 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
497 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
499 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
503 void __rte_experimental
504 rte_eth_dev_owner_delete(const uint64_t owner_id)
508 rte_eth_dev_shared_data_prepare();
510 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
512 if (rte_eth_is_valid_owner_id(owner_id)) {
513 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
514 if (rte_eth_devices[port_id].data->owner.id == owner_id)
515 memset(&rte_eth_devices[port_id].data->owner, 0,
516 sizeof(struct rte_eth_dev_owner));
517 RTE_PMD_DEBUG_TRACE("All port owners owned by %016"PRIX64
518 " identifier have removed.\n", owner_id);
521 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
524 int __rte_experimental
525 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
528 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
530 rte_eth_dev_shared_data_prepare();
532 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
534 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
535 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
538 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
541 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
546 rte_eth_dev_socket_id(uint16_t port_id)
548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
549 return rte_eth_devices[port_id].data->numa_node;
553 rte_eth_dev_get_sec_ctx(uint16_t port_id)
555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
556 return rte_eth_devices[port_id].security_ctx;
560 rte_eth_dev_count(void)
562 return rte_eth_dev_count_avail();
566 rte_eth_dev_count_avail(void)
573 RTE_ETH_FOREACH_DEV(p)
579 uint16_t __rte_experimental
580 rte_eth_dev_count_total(void)
582 uint16_t port, count = 0;
584 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
585 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
592 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
599 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
603 /* shouldn't check 'rte_eth_devices[i].data',
604 * because it might be overwritten by VDEV PMD */
605 tmp = rte_eth_dev_shared_data->data[port_id].name;
611 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
616 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
620 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
621 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
622 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
632 eth_err(uint16_t port_id, int ret)
636 if (rte_eth_dev_is_removed(port_id))
641 /* attach the new device, then store port_id of the device */
643 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
645 int current = rte_eth_dev_count_total();
646 struct rte_devargs da;
649 memset(&da, 0, sizeof(da));
651 if ((devargs == NULL) || (port_id == NULL)) {
657 if (rte_devargs_parse(&da, "%s", devargs))
660 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
664 /* no point looking at the port count if no port exists */
665 if (!rte_eth_dev_count_total()) {
666 ethdev_log(ERR, "No port found for device (%s)", da.name);
671 /* if nothing happened, there is a bug here, since some driver told us
672 * it did attach a device, but did not create a port.
673 * FIXME: race condition in case of plug-out of another device
675 if (current == rte_eth_dev_count_total()) {
680 *port_id = eth_dev_last_created_port;
688 /* detach the device, then store the name of the device */
690 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
692 struct rte_device *dev;
697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
699 dev_flags = rte_eth_devices[port_id].data->dev_flags;
700 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
702 "Port %" PRIu16 " is bonded, cannot detach", port_id);
706 dev = rte_eth_devices[port_id].device;
710 bus = rte_bus_find_by_device(dev);
714 ret = rte_eal_hotplug_remove(bus->name, dev->name);
718 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
723 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
725 uint16_t old_nb_queues = dev->data->nb_rx_queues;
729 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
730 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
731 sizeof(dev->data->rx_queues[0]) * nb_queues,
732 RTE_CACHE_LINE_SIZE);
733 if (dev->data->rx_queues == NULL) {
734 dev->data->nb_rx_queues = 0;
737 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
740 rxq = dev->data->rx_queues;
742 for (i = nb_queues; i < old_nb_queues; i++)
743 (*dev->dev_ops->rx_queue_release)(rxq[i]);
744 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
745 RTE_CACHE_LINE_SIZE);
748 if (nb_queues > old_nb_queues) {
749 uint16_t new_qs = nb_queues - old_nb_queues;
751 memset(rxq + old_nb_queues, 0,
752 sizeof(rxq[0]) * new_qs);
755 dev->data->rx_queues = rxq;
757 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
760 rxq = dev->data->rx_queues;
762 for (i = nb_queues; i < old_nb_queues; i++)
763 (*dev->dev_ops->rx_queue_release)(rxq[i]);
765 rte_free(dev->data->rx_queues);
766 dev->data->rx_queues = NULL;
768 dev->data->nb_rx_queues = nb_queues;
773 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
775 struct rte_eth_dev *dev;
777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
779 dev = &rte_eth_devices[port_id];
780 if (!dev->data->dev_started) {
782 "port %d must be started before start any queue\n", port_id);
786 if (rx_queue_id >= dev->data->nb_rx_queues) {
787 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
793 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
794 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
795 " already started\n",
796 rx_queue_id, port_id);
800 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
806 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
808 struct rte_eth_dev *dev;
810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
812 dev = &rte_eth_devices[port_id];
813 if (rx_queue_id >= dev->data->nb_rx_queues) {
814 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
820 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
821 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
822 " already stopped\n",
823 rx_queue_id, port_id);
827 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
832 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
834 struct rte_eth_dev *dev;
836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
838 dev = &rte_eth_devices[port_id];
839 if (!dev->data->dev_started) {
841 "port %d must be started before start any queue\n", port_id);
845 if (tx_queue_id >= dev->data->nb_tx_queues) {
846 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
852 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
853 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
854 " already started\n",
855 tx_queue_id, port_id);
859 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
865 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
867 struct rte_eth_dev *dev;
869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
871 dev = &rte_eth_devices[port_id];
872 if (tx_queue_id >= dev->data->nb_tx_queues) {
873 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
879 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
880 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
881 " already stopped\n",
882 tx_queue_id, port_id);
886 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
891 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
893 uint16_t old_nb_queues = dev->data->nb_tx_queues;
897 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
898 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
899 sizeof(dev->data->tx_queues[0]) * nb_queues,
900 RTE_CACHE_LINE_SIZE);
901 if (dev->data->tx_queues == NULL) {
902 dev->data->nb_tx_queues = 0;
905 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
908 txq = dev->data->tx_queues;
910 for (i = nb_queues; i < old_nb_queues; i++)
911 (*dev->dev_ops->tx_queue_release)(txq[i]);
912 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
913 RTE_CACHE_LINE_SIZE);
916 if (nb_queues > old_nb_queues) {
917 uint16_t new_qs = nb_queues - old_nb_queues;
919 memset(txq + old_nb_queues, 0,
920 sizeof(txq[0]) * new_qs);
923 dev->data->tx_queues = txq;
925 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
928 txq = dev->data->tx_queues;
930 for (i = nb_queues; i < old_nb_queues; i++)
931 (*dev->dev_ops->tx_queue_release)(txq[i]);
933 rte_free(dev->data->tx_queues);
934 dev->data->tx_queues = NULL;
936 dev->data->nb_tx_queues = nb_queues;
941 rte_eth_speed_bitflag(uint32_t speed, int duplex)
944 case ETH_SPEED_NUM_10M:
945 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
946 case ETH_SPEED_NUM_100M:
947 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
948 case ETH_SPEED_NUM_1G:
949 return ETH_LINK_SPEED_1G;
950 case ETH_SPEED_NUM_2_5G:
951 return ETH_LINK_SPEED_2_5G;
952 case ETH_SPEED_NUM_5G:
953 return ETH_LINK_SPEED_5G;
954 case ETH_SPEED_NUM_10G:
955 return ETH_LINK_SPEED_10G;
956 case ETH_SPEED_NUM_20G:
957 return ETH_LINK_SPEED_20G;
958 case ETH_SPEED_NUM_25G:
959 return ETH_LINK_SPEED_25G;
960 case ETH_SPEED_NUM_40G:
961 return ETH_LINK_SPEED_40G;
962 case ETH_SPEED_NUM_50G:
963 return ETH_LINK_SPEED_50G;
964 case ETH_SPEED_NUM_56G:
965 return ETH_LINK_SPEED_56G;
966 case ETH_SPEED_NUM_100G:
967 return ETH_LINK_SPEED_100G;
974 * A conversion function from rxmode bitfield API.
977 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
978 uint64_t *rx_offloads)
980 uint64_t offloads = 0;
982 if (rxmode->header_split == 1)
983 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
984 if (rxmode->hw_ip_checksum == 1)
985 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
986 if (rxmode->hw_vlan_filter == 1)
987 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
988 if (rxmode->hw_vlan_strip == 1)
989 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
990 if (rxmode->hw_vlan_extend == 1)
991 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
992 if (rxmode->jumbo_frame == 1)
993 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
994 if (rxmode->hw_strip_crc == 1)
995 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
996 if (rxmode->enable_scatter == 1)
997 offloads |= DEV_RX_OFFLOAD_SCATTER;
998 if (rxmode->enable_lro == 1)
999 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
1000 if (rxmode->hw_timestamp == 1)
1001 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
1002 if (rxmode->security == 1)
1003 offloads |= DEV_RX_OFFLOAD_SECURITY;
1005 *rx_offloads = offloads;
1008 const char * __rte_experimental
1009 rte_eth_dev_rx_offload_name(uint64_t offload)
1011 const char *name = "UNKNOWN";
1014 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1015 if (offload == rte_rx_offload_names[i].offload) {
1016 name = rte_rx_offload_names[i].name;
1024 const char * __rte_experimental
1025 rte_eth_dev_tx_offload_name(uint64_t offload)
1027 const char *name = "UNKNOWN";
1030 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1031 if (offload == rte_tx_offload_names[i].offload) {
1032 name = rte_tx_offload_names[i].name;
1041 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1042 const struct rte_eth_conf *dev_conf)
1044 struct rte_eth_dev *dev;
1045 struct rte_eth_dev_info dev_info;
1046 struct rte_eth_conf local_conf = *dev_conf;
1049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1051 dev = &rte_eth_devices[port_id];
1053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1056 rte_eth_dev_info_get(port_id, &dev_info);
1058 /* If number of queues specified by application for both Rx and Tx is
1059 * zero, use driver preferred values. This cannot be done individually
1060 * as it is valid for either Tx or Rx (but not both) to be zero.
1061 * If driver does not provide any preferred valued, fall back on
1064 if (nb_rx_q == 0 && nb_tx_q == 0) {
1065 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1067 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1068 nb_tx_q = dev_info.default_txportconf.nb_queues;
1070 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1073 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1074 RTE_PMD_DEBUG_TRACE(
1075 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1076 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1080 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1081 RTE_PMD_DEBUG_TRACE(
1082 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1083 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1087 if (dev->data->dev_started) {
1088 RTE_PMD_DEBUG_TRACE(
1089 "port %d must be stopped to allow configuration\n", port_id);
1094 * Convert between the offloads API to enable PMDs to support
1097 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1098 rte_eth_convert_rx_offload_bitfield(
1099 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1101 /* Copy the dev_conf parameter into the dev structure */
1102 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1105 * Check that the numbers of RX and TX queues are not greater
1106 * than the maximum number of RX and TX queues supported by the
1107 * configured device.
1109 if (nb_rx_q > dev_info.max_rx_queues) {
1110 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1111 port_id, nb_rx_q, dev_info.max_rx_queues);
1115 if (nb_tx_q > dev_info.max_tx_queues) {
1116 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1117 port_id, nb_tx_q, dev_info.max_tx_queues);
1121 /* Check that the device supports requested interrupts */
1122 if ((dev_conf->intr_conf.lsc == 1) &&
1123 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1124 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1125 dev->device->driver->name);
1128 if ((dev_conf->intr_conf.rmv == 1) &&
1129 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1130 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1131 dev->device->driver->name);
1136 * If jumbo frames are enabled, check that the maximum RX packet
1137 * length is supported by the configured device.
1139 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1140 if (dev_conf->rxmode.max_rx_pkt_len >
1141 dev_info.max_rx_pktlen) {
1142 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1143 " > max valid value %u\n",
1145 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1146 (unsigned)dev_info.max_rx_pktlen);
1148 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1149 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1150 " < min valid value %u\n",
1152 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1153 (unsigned)ETHER_MIN_LEN);
1157 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1158 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1159 /* Use default value */
1160 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1164 /* Any requested offloading must be within its device capabilities */
1165 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1166 local_conf.rxmode.offloads) {
1167 ethdev_log(ERR, "ethdev port_id=%d requested Rx offloads "
1168 "0x%" PRIx64 " doesn't match Rx offloads "
1169 "capabilities 0x%" PRIx64 " in %s()\n",
1171 local_conf.rxmode.offloads,
1172 dev_info.rx_offload_capa,
1174 /* Will return -EINVAL in the next release */
1176 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1177 local_conf.txmode.offloads) {
1178 ethdev_log(ERR, "ethdev port_id=%d requested Tx offloads "
1179 "0x%" PRIx64 " doesn't match Tx offloads "
1180 "capabilities 0x%" PRIx64 " in %s()\n",
1182 local_conf.txmode.offloads,
1183 dev_info.tx_offload_capa,
1185 /* Will return -EINVAL in the next release */
1188 /* Check that device supports requested rss hash functions. */
1189 if ((dev_info.flow_type_rss_offloads |
1190 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1191 dev_info.flow_type_rss_offloads) {
1192 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1193 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1195 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1196 dev_info.flow_type_rss_offloads);
1200 * Setup new number of RX/TX queues and reconfigure device.
1202 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1204 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1209 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1211 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1213 rte_eth_dev_rx_queue_config(dev, 0);
1217 diag = (*dev->dev_ops->dev_configure)(dev);
1219 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1221 rte_eth_dev_rx_queue_config(dev, 0);
1222 rte_eth_dev_tx_queue_config(dev, 0);
1223 return eth_err(port_id, diag);
1226 /* Initialize Rx profiling if enabled at compilation time. */
1227 diag = __rte_eth_profile_rx_init(port_id, dev);
1229 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1231 rte_eth_dev_rx_queue_config(dev, 0);
1232 rte_eth_dev_tx_queue_config(dev, 0);
1233 return eth_err(port_id, diag);
1240 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1242 if (dev->data->dev_started) {
1243 RTE_PMD_DEBUG_TRACE(
1244 "port %d must be stopped to allow reset\n",
1245 dev->data->port_id);
1249 rte_eth_dev_rx_queue_config(dev, 0);
1250 rte_eth_dev_tx_queue_config(dev, 0);
1252 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1256 rte_eth_dev_config_restore(uint16_t port_id)
1258 struct rte_eth_dev *dev;
1259 struct rte_eth_dev_info dev_info;
1260 struct ether_addr *addr;
1265 dev = &rte_eth_devices[port_id];
1267 rte_eth_dev_info_get(port_id, &dev_info);
1269 /* replay MAC address configuration including default MAC */
1270 addr = &dev->data->mac_addrs[0];
1271 if (*dev->dev_ops->mac_addr_set != NULL)
1272 (*dev->dev_ops->mac_addr_set)(dev, addr);
1273 else if (*dev->dev_ops->mac_addr_add != NULL)
1274 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1276 if (*dev->dev_ops->mac_addr_add != NULL) {
1277 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1278 addr = &dev->data->mac_addrs[i];
1280 /* skip zero address */
1281 if (is_zero_ether_addr(addr))
1285 pool_mask = dev->data->mac_pool_sel[i];
1288 if (pool_mask & 1ULL)
1289 (*dev->dev_ops->mac_addr_add)(dev,
1293 } while (pool_mask);
1297 /* replay promiscuous configuration */
1298 if (rte_eth_promiscuous_get(port_id) == 1)
1299 rte_eth_promiscuous_enable(port_id);
1300 else if (rte_eth_promiscuous_get(port_id) == 0)
1301 rte_eth_promiscuous_disable(port_id);
1303 /* replay all multicast configuration */
1304 if (rte_eth_allmulticast_get(port_id) == 1)
1305 rte_eth_allmulticast_enable(port_id);
1306 else if (rte_eth_allmulticast_get(port_id) == 0)
1307 rte_eth_allmulticast_disable(port_id);
1311 rte_eth_dev_start(uint16_t port_id)
1313 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1318 dev = &rte_eth_devices[port_id];
1320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1322 if (dev->data->dev_started != 0) {
1323 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1324 " already started\n",
1329 diag = (*dev->dev_ops->dev_start)(dev);
1331 dev->data->dev_started = 1;
1333 return eth_err(port_id, diag);
1335 rte_eth_dev_config_restore(port_id);
1337 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1339 (*dev->dev_ops->link_update)(dev, 0);
1345 rte_eth_dev_stop(uint16_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1354 if (dev->data->dev_started == 0) {
1355 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1356 " already stopped\n",
1361 dev->data->dev_started = 0;
1362 (*dev->dev_ops->dev_stop)(dev);
1366 rte_eth_dev_set_link_up(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1375 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1379 rte_eth_dev_set_link_down(uint16_t port_id)
1381 struct rte_eth_dev *dev;
1383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1385 dev = &rte_eth_devices[port_id];
1387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1388 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1392 rte_eth_dev_close(uint16_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1400 dev->data->dev_started = 0;
1401 (*dev->dev_ops->dev_close)(dev);
1403 dev->data->nb_rx_queues = 0;
1404 rte_free(dev->data->rx_queues);
1405 dev->data->rx_queues = NULL;
1406 dev->data->nb_tx_queues = 0;
1407 rte_free(dev->data->tx_queues);
1408 dev->data->tx_queues = NULL;
1412 rte_eth_dev_reset(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1418 dev = &rte_eth_devices[port_id];
1420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1422 rte_eth_dev_stop(port_id);
1423 ret = dev->dev_ops->dev_reset(dev);
1425 return eth_err(port_id, ret);
1428 int __rte_experimental
1429 rte_eth_dev_is_removed(uint16_t port_id)
1431 struct rte_eth_dev *dev;
1434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1436 dev = &rte_eth_devices[port_id];
1438 if (dev->state == RTE_ETH_DEV_REMOVED)
1441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1443 ret = dev->dev_ops->is_removed(dev);
1445 /* Device is physically removed. */
1446 dev->state = RTE_ETH_DEV_REMOVED;
1452 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1453 uint16_t nb_rx_desc, unsigned int socket_id,
1454 const struct rte_eth_rxconf *rx_conf,
1455 struct rte_mempool *mp)
1458 uint32_t mbp_buf_size;
1459 struct rte_eth_dev *dev;
1460 struct rte_eth_dev_info dev_info;
1461 struct rte_eth_rxconf local_conf;
1464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1466 dev = &rte_eth_devices[port_id];
1467 if (rx_queue_id >= dev->data->nb_rx_queues) {
1468 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1476 * Check the size of the mbuf data buffer.
1477 * This value must be provided in the private data of the memory pool.
1478 * First check that the memory pool has a valid private data.
1480 rte_eth_dev_info_get(port_id, &dev_info);
1481 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1482 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1483 mp->name, (int) mp->private_data_size,
1484 (int) sizeof(struct rte_pktmbuf_pool_private));
1487 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1489 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1490 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1491 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1495 (int)(RTE_PKTMBUF_HEADROOM +
1496 dev_info.min_rx_bufsize),
1497 (int)RTE_PKTMBUF_HEADROOM,
1498 (int)dev_info.min_rx_bufsize);
1502 /* Use default specified by driver, if nb_rx_desc is zero */
1503 if (nb_rx_desc == 0) {
1504 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1505 /* If driver default is also zero, fall back on EAL default */
1506 if (nb_rx_desc == 0)
1507 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1510 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1511 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1512 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1514 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1515 "should be: <= %hu, = %hu, and a product of %hu\n",
1517 dev_info.rx_desc_lim.nb_max,
1518 dev_info.rx_desc_lim.nb_min,
1519 dev_info.rx_desc_lim.nb_align);
1523 if (dev->data->dev_started &&
1524 !(dev_info.dev_capa &
1525 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1528 if (dev->data->rx_queue_state[rx_queue_id] !=
1529 RTE_ETH_QUEUE_STATE_STOPPED)
1532 rxq = dev->data->rx_queues;
1533 if (rxq[rx_queue_id]) {
1534 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1536 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1537 rxq[rx_queue_id] = NULL;
1540 if (rx_conf == NULL)
1541 rx_conf = &dev_info.default_rxconf;
1543 local_conf = *rx_conf;
1544 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1546 * Reflect port offloads to queue offloads in order for
1547 * offloads to not be discarded.
1549 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1550 &local_conf.offloads);
1554 * If an offloading has already been enabled in
1555 * rte_eth_dev_configure(), it has been enabled on all queues,
1556 * so there is no need to enable it in this queue again.
1557 * The local_conf.offloads input to underlying PMD only carries
1558 * those offloadings which are only enabled on this queue and
1559 * not enabled on all queues.
1561 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1564 * New added offloadings for this queue are those not enabled in
1565 * rte_eth_dev_configure() and they must be per-queue type.
1566 * A pure per-port offloading can't be enabled on a queue while
1567 * disabled on another queue. A pure per-port offloading can't
1568 * be enabled for any queue as new added one if it hasn't been
1569 * enabled in rte_eth_dev_configure().
1571 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1572 local_conf.offloads) {
1573 ethdev_log(ERR, "Ethdev port_id=%d rx_queue_id=%d, new "
1574 "added offloads 0x%" PRIx64 " must be "
1575 "within pre-queue offload capabilities 0x%"
1576 PRIx64 " in %s()\n",
1579 local_conf.offloads,
1580 dev_info.rx_queue_offload_capa,
1582 /* Will return -EINVAL in the next release */
1585 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1586 socket_id, &local_conf, mp);
1588 if (!dev->data->min_rx_buf_size ||
1589 dev->data->min_rx_buf_size > mbp_buf_size)
1590 dev->data->min_rx_buf_size = mbp_buf_size;
1593 return eth_err(port_id, ret);
1597 * Convert from tx offloads to txq_flags.
1600 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1604 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1605 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1606 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1607 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1608 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1609 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1610 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1611 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1612 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1613 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1614 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1615 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1621 * A conversion function from txq_flags API.
1624 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1626 uint64_t offloads = 0;
1628 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1629 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1630 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1631 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1632 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1633 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1634 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1635 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1636 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1637 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1638 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1639 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1640 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1642 *tx_offloads = offloads;
1646 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1647 uint16_t nb_tx_desc, unsigned int socket_id,
1648 const struct rte_eth_txconf *tx_conf)
1650 struct rte_eth_dev *dev;
1651 struct rte_eth_dev_info dev_info;
1652 struct rte_eth_txconf local_conf;
1655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1657 dev = &rte_eth_devices[port_id];
1658 if (tx_queue_id >= dev->data->nb_tx_queues) {
1659 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1666 rte_eth_dev_info_get(port_id, &dev_info);
1668 /* Use default specified by driver, if nb_tx_desc is zero */
1669 if (nb_tx_desc == 0) {
1670 nb_tx_desc = dev_info.default_txportconf.ring_size;
1671 /* If driver default is zero, fall back on EAL default */
1672 if (nb_tx_desc == 0)
1673 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1675 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1676 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1677 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1678 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1679 "should be: <= %hu, = %hu, and a product of %hu\n",
1681 dev_info.tx_desc_lim.nb_max,
1682 dev_info.tx_desc_lim.nb_min,
1683 dev_info.tx_desc_lim.nb_align);
1687 if (dev->data->dev_started &&
1688 !(dev_info.dev_capa &
1689 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1692 if (dev->data->tx_queue_state[tx_queue_id] !=
1693 RTE_ETH_QUEUE_STATE_STOPPED)
1696 txq = dev->data->tx_queues;
1697 if (txq[tx_queue_id]) {
1698 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1700 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1701 txq[tx_queue_id] = NULL;
1704 if (tx_conf == NULL)
1705 tx_conf = &dev_info.default_txconf;
1708 * Convert between the offloads API to enable PMDs to support
1711 local_conf = *tx_conf;
1712 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1713 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1714 &local_conf.offloads);
1718 * If an offloading has already been enabled in
1719 * rte_eth_dev_configure(), it has been enabled on all queues,
1720 * so there is no need to enable it in this queue again.
1721 * The local_conf.offloads input to underlying PMD only carries
1722 * those offloadings which are only enabled on this queue and
1723 * not enabled on all queues.
1725 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1728 * New added offloadings for this queue are those not enabled in
1729 * rte_eth_dev_configure() and they must be per-queue type.
1730 * A pure per-port offloading can't be enabled on a queue while
1731 * disabled on another queue. A pure per-port offloading can't
1732 * be enabled for any queue as new added one if it hasn't been
1733 * enabled in rte_eth_dev_configure().
1735 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1736 local_conf.offloads) {
1737 ethdev_log(ERR, "Ethdev port_id=%d tx_queue_id=%d, new "
1738 "added offloads 0x%" PRIx64 " must be "
1739 "within pre-queue offload capabilities 0x%"
1740 PRIx64 " in %s()\n",
1743 local_conf.offloads,
1744 dev_info.tx_queue_offload_capa,
1746 /* Will return -EINVAL in the next release */
1749 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1750 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1754 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1755 void *userdata __rte_unused)
1759 for (i = 0; i < unsent; i++)
1760 rte_pktmbuf_free(pkts[i]);
1764 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1767 uint64_t *count = userdata;
1770 for (i = 0; i < unsent; i++)
1771 rte_pktmbuf_free(pkts[i]);
1777 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1778 buffer_tx_error_fn cbfn, void *userdata)
1780 buffer->error_callback = cbfn;
1781 buffer->error_userdata = userdata;
1786 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1793 buffer->size = size;
1794 if (buffer->error_callback == NULL) {
1795 ret = rte_eth_tx_buffer_set_err_callback(
1796 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1803 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1805 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1808 /* Validate Input Data. Bail if not valid or not supported. */
1809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1812 /* Call driver to free pending mbufs. */
1813 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1815 return eth_err(port_id, ret);
1819 rte_eth_promiscuous_enable(uint16_t port_id)
1821 struct rte_eth_dev *dev;
1823 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1824 dev = &rte_eth_devices[port_id];
1826 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1827 (*dev->dev_ops->promiscuous_enable)(dev);
1828 dev->data->promiscuous = 1;
1832 rte_eth_promiscuous_disable(uint16_t port_id)
1834 struct rte_eth_dev *dev;
1836 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1837 dev = &rte_eth_devices[port_id];
1839 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1840 dev->data->promiscuous = 0;
1841 (*dev->dev_ops->promiscuous_disable)(dev);
1845 rte_eth_promiscuous_get(uint16_t port_id)
1847 struct rte_eth_dev *dev;
1849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1851 dev = &rte_eth_devices[port_id];
1852 return dev->data->promiscuous;
1856 rte_eth_allmulticast_enable(uint16_t port_id)
1858 struct rte_eth_dev *dev;
1860 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1861 dev = &rte_eth_devices[port_id];
1863 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1864 (*dev->dev_ops->allmulticast_enable)(dev);
1865 dev->data->all_multicast = 1;
1869 rte_eth_allmulticast_disable(uint16_t port_id)
1871 struct rte_eth_dev *dev;
1873 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1874 dev = &rte_eth_devices[port_id];
1876 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1877 dev->data->all_multicast = 0;
1878 (*dev->dev_ops->allmulticast_disable)(dev);
1882 rte_eth_allmulticast_get(uint16_t port_id)
1884 struct rte_eth_dev *dev;
1886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1888 dev = &rte_eth_devices[port_id];
1889 return dev->data->all_multicast;
1893 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1895 struct rte_eth_dev *dev;
1897 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1898 dev = &rte_eth_devices[port_id];
1900 if (dev->data->dev_conf.intr_conf.lsc &&
1901 dev->data->dev_started)
1902 rte_eth_linkstatus_get(dev, eth_link);
1904 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1905 (*dev->dev_ops->link_update)(dev, 1);
1906 *eth_link = dev->data->dev_link;
1911 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1913 struct rte_eth_dev *dev;
1915 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1916 dev = &rte_eth_devices[port_id];
1918 if (dev->data->dev_conf.intr_conf.lsc &&
1919 dev->data->dev_started)
1920 rte_eth_linkstatus_get(dev, eth_link);
1922 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1923 (*dev->dev_ops->link_update)(dev, 0);
1924 *eth_link = dev->data->dev_link;
1929 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1931 struct rte_eth_dev *dev;
1933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1935 dev = &rte_eth_devices[port_id];
1936 memset(stats, 0, sizeof(*stats));
1938 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1939 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1940 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1944 rte_eth_stats_reset(uint16_t port_id)
1946 struct rte_eth_dev *dev;
1948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1949 dev = &rte_eth_devices[port_id];
1951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1952 (*dev->dev_ops->stats_reset)(dev);
1953 dev->data->rx_mbuf_alloc_failed = 0;
1959 get_xstats_basic_count(struct rte_eth_dev *dev)
1961 uint16_t nb_rxqs, nb_txqs;
1964 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1965 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1967 count = RTE_NB_STATS;
1968 count += nb_rxqs * RTE_NB_RXQ_STATS;
1969 count += nb_txqs * RTE_NB_TXQ_STATS;
1975 get_xstats_count(uint16_t port_id)
1977 struct rte_eth_dev *dev;
1980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1981 dev = &rte_eth_devices[port_id];
1982 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1983 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1986 return eth_err(port_id, count);
1988 if (dev->dev_ops->xstats_get_names != NULL) {
1989 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1991 return eth_err(port_id, count);
1996 count += get_xstats_basic_count(dev);
2002 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2005 int cnt_xstats, idx_xstat;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2010 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
2015 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
2020 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2021 if (cnt_xstats < 0) {
2022 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
2026 /* Get id-name lookup table */
2027 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2029 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2030 port_id, xstats_names, cnt_xstats, NULL)) {
2031 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
2035 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2036 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2045 /* retrieve basic stats names */
2047 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2048 struct rte_eth_xstat_name *xstats_names)
2050 int cnt_used_entries = 0;
2051 uint32_t idx, id_queue;
2054 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2055 snprintf(xstats_names[cnt_used_entries].name,
2056 sizeof(xstats_names[0].name),
2057 "%s", rte_stats_strings[idx].name);
2060 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2061 for (id_queue = 0; id_queue < num_q; id_queue++) {
2062 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2063 snprintf(xstats_names[cnt_used_entries].name,
2064 sizeof(xstats_names[0].name),
2066 id_queue, rte_rxq_stats_strings[idx].name);
2071 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2072 for (id_queue = 0; id_queue < num_q; id_queue++) {
2073 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2074 snprintf(xstats_names[cnt_used_entries].name,
2075 sizeof(xstats_names[0].name),
2077 id_queue, rte_txq_stats_strings[idx].name);
2081 return cnt_used_entries;
2084 /* retrieve ethdev extended statistics names */
2086 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2087 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2090 struct rte_eth_xstat_name *xstats_names_copy;
2091 unsigned int no_basic_stat_requested = 1;
2092 unsigned int no_ext_stat_requested = 1;
2093 unsigned int expected_entries;
2094 unsigned int basic_count;
2095 struct rte_eth_dev *dev;
2099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2100 dev = &rte_eth_devices[port_id];
2102 basic_count = get_xstats_basic_count(dev);
2103 ret = get_xstats_count(port_id);
2106 expected_entries = (unsigned int)ret;
2108 /* Return max number of stats if no ids given */
2111 return expected_entries;
2112 else if (xstats_names && size < expected_entries)
2113 return expected_entries;
2116 if (ids && !xstats_names)
2119 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2120 uint64_t ids_copy[size];
2122 for (i = 0; i < size; i++) {
2123 if (ids[i] < basic_count) {
2124 no_basic_stat_requested = 0;
2129 * Convert ids to xstats ids that PMD knows.
2130 * ids known by user are basic + extended stats.
2132 ids_copy[i] = ids[i] - basic_count;
2135 if (no_basic_stat_requested)
2136 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2137 xstats_names, ids_copy, size);
2140 /* Retrieve all stats */
2142 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2144 if (num_stats < 0 || num_stats > (int)expected_entries)
2147 return expected_entries;
2150 xstats_names_copy = calloc(expected_entries,
2151 sizeof(struct rte_eth_xstat_name));
2153 if (!xstats_names_copy) {
2154 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2159 for (i = 0; i < size; i++) {
2160 if (ids[i] >= basic_count) {
2161 no_ext_stat_requested = 0;
2167 /* Fill xstats_names_copy structure */
2168 if (ids && no_ext_stat_requested) {
2169 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2171 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2174 free(xstats_names_copy);
2180 for (i = 0; i < size; i++) {
2181 if (ids[i] >= expected_entries) {
2182 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2183 free(xstats_names_copy);
2186 xstats_names[i] = xstats_names_copy[ids[i]];
2189 free(xstats_names_copy);
2194 rte_eth_xstats_get_names(uint16_t port_id,
2195 struct rte_eth_xstat_name *xstats_names,
2198 struct rte_eth_dev *dev;
2199 int cnt_used_entries;
2200 int cnt_expected_entries;
2201 int cnt_driver_entries;
2203 cnt_expected_entries = get_xstats_count(port_id);
2204 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2205 (int)size < cnt_expected_entries)
2206 return cnt_expected_entries;
2208 /* port_id checked in get_xstats_count() */
2209 dev = &rte_eth_devices[port_id];
2211 cnt_used_entries = rte_eth_basic_stats_get_names(
2214 if (dev->dev_ops->xstats_get_names != NULL) {
2215 /* If there are any driver-specific xstats, append them
2218 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2220 xstats_names + cnt_used_entries,
2221 size - cnt_used_entries);
2222 if (cnt_driver_entries < 0)
2223 return eth_err(port_id, cnt_driver_entries);
2224 cnt_used_entries += cnt_driver_entries;
2227 return cnt_used_entries;
2232 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2234 struct rte_eth_dev *dev;
2235 struct rte_eth_stats eth_stats;
2236 unsigned int count = 0, i, q;
2237 uint64_t val, *stats_ptr;
2238 uint16_t nb_rxqs, nb_txqs;
2241 ret = rte_eth_stats_get(port_id, ð_stats);
2245 dev = &rte_eth_devices[port_id];
2247 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2248 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2251 for (i = 0; i < RTE_NB_STATS; i++) {
2252 stats_ptr = RTE_PTR_ADD(ð_stats,
2253 rte_stats_strings[i].offset);
2255 xstats[count++].value = val;
2259 for (q = 0; q < nb_rxqs; q++) {
2260 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2261 stats_ptr = RTE_PTR_ADD(ð_stats,
2262 rte_rxq_stats_strings[i].offset +
2263 q * sizeof(uint64_t));
2265 xstats[count++].value = val;
2270 for (q = 0; q < nb_txqs; q++) {
2271 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2272 stats_ptr = RTE_PTR_ADD(ð_stats,
2273 rte_txq_stats_strings[i].offset +
2274 q * sizeof(uint64_t));
2276 xstats[count++].value = val;
2282 /* retrieve ethdev extended statistics */
2284 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2285 uint64_t *values, unsigned int size)
2287 unsigned int no_basic_stat_requested = 1;
2288 unsigned int no_ext_stat_requested = 1;
2289 unsigned int num_xstats_filled;
2290 unsigned int basic_count;
2291 uint16_t expected_entries;
2292 struct rte_eth_dev *dev;
2296 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2297 ret = get_xstats_count(port_id);
2300 expected_entries = (uint16_t)ret;
2301 struct rte_eth_xstat xstats[expected_entries];
2302 dev = &rte_eth_devices[port_id];
2303 basic_count = get_xstats_basic_count(dev);
2305 /* Return max number of stats if no ids given */
2308 return expected_entries;
2309 else if (values && size < expected_entries)
2310 return expected_entries;
2316 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2317 unsigned int basic_count = get_xstats_basic_count(dev);
2318 uint64_t ids_copy[size];
2320 for (i = 0; i < size; i++) {
2321 if (ids[i] < basic_count) {
2322 no_basic_stat_requested = 0;
2327 * Convert ids to xstats ids that PMD knows.
2328 * ids known by user are basic + extended stats.
2330 ids_copy[i] = ids[i] - basic_count;
2333 if (no_basic_stat_requested)
2334 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2339 for (i = 0; i < size; i++) {
2340 if (ids[i] >= basic_count) {
2341 no_ext_stat_requested = 0;
2347 /* Fill the xstats structure */
2348 if (ids && no_ext_stat_requested)
2349 ret = rte_eth_basic_stats_get(port_id, xstats);
2351 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2355 num_xstats_filled = (unsigned int)ret;
2357 /* Return all stats */
2359 for (i = 0; i < num_xstats_filled; i++)
2360 values[i] = xstats[i].value;
2361 return expected_entries;
2365 for (i = 0; i < size; i++) {
2366 if (ids[i] >= expected_entries) {
2367 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2370 values[i] = xstats[ids[i]].value;
2376 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2379 struct rte_eth_dev *dev;
2380 unsigned int count = 0, i;
2381 signed int xcount = 0;
2382 uint16_t nb_rxqs, nb_txqs;
2385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2387 dev = &rte_eth_devices[port_id];
2389 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2390 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2392 /* Return generic statistics */
2393 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2394 (nb_txqs * RTE_NB_TXQ_STATS);
2396 /* implemented by the driver */
2397 if (dev->dev_ops->xstats_get != NULL) {
2398 /* Retrieve the xstats from the driver at the end of the
2401 xcount = (*dev->dev_ops->xstats_get)(dev,
2402 xstats ? xstats + count : NULL,
2403 (n > count) ? n - count : 0);
2406 return eth_err(port_id, xcount);
2409 if (n < count + xcount || xstats == NULL)
2410 return count + xcount;
2412 /* now fill the xstats structure */
2413 ret = rte_eth_basic_stats_get(port_id, xstats);
2418 for (i = 0; i < count; i++)
2420 /* add an offset to driver-specific stats */
2421 for ( ; i < count + xcount; i++)
2422 xstats[i].id += count;
2424 return count + xcount;
2427 /* reset ethdev extended statistics */
2429 rte_eth_xstats_reset(uint16_t port_id)
2431 struct rte_eth_dev *dev;
2433 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2434 dev = &rte_eth_devices[port_id];
2436 /* implemented by the driver */
2437 if (dev->dev_ops->xstats_reset != NULL) {
2438 (*dev->dev_ops->xstats_reset)(dev);
2442 /* fallback to default */
2443 rte_eth_stats_reset(port_id);
2447 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2450 struct rte_eth_dev *dev;
2452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2454 dev = &rte_eth_devices[port_id];
2456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2457 return (*dev->dev_ops->queue_stats_mapping_set)
2458 (dev, queue_id, stat_idx, is_rx);
2463 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2466 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2467 stat_idx, STAT_QMAP_TX));
2472 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2475 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2476 stat_idx, STAT_QMAP_RX));
2480 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2482 struct rte_eth_dev *dev;
2484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2485 dev = &rte_eth_devices[port_id];
2487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2488 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2489 fw_version, fw_size));
2493 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2495 struct rte_eth_dev *dev;
2496 struct rte_eth_txconf *txconf;
2497 const struct rte_eth_desc_lim lim = {
2498 .nb_max = UINT16_MAX,
2503 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2504 dev = &rte_eth_devices[port_id];
2506 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2507 dev_info->rx_desc_lim = lim;
2508 dev_info->tx_desc_lim = lim;
2509 dev_info->device = dev->device;
2511 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2512 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2513 dev_info->driver_name = dev->device->driver->name;
2514 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2515 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2517 dev_info->dev_flags = &dev->data->dev_flags;
2518 txconf = &dev_info->default_txconf;
2519 /* convert offload to txq_flags to support legacy app */
2520 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2524 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2525 uint32_t *ptypes, int num)
2528 struct rte_eth_dev *dev;
2529 const uint32_t *all_ptypes;
2531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2532 dev = &rte_eth_devices[port_id];
2533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2534 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2539 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2540 if (all_ptypes[i] & ptype_mask) {
2542 ptypes[j] = all_ptypes[i];
2550 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2552 struct rte_eth_dev *dev;
2554 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2555 dev = &rte_eth_devices[port_id];
2556 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2561 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2563 struct rte_eth_dev *dev;
2565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2567 dev = &rte_eth_devices[port_id];
2568 *mtu = dev->data->mtu;
2573 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2576 struct rte_eth_dev *dev;
2578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2579 dev = &rte_eth_devices[port_id];
2580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2582 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2584 dev->data->mtu = mtu;
2586 return eth_err(port_id, ret);
2590 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2592 struct rte_eth_dev *dev;
2595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2596 dev = &rte_eth_devices[port_id];
2597 if (!(dev->data->dev_conf.rxmode.offloads &
2598 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2599 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2603 if (vlan_id > 4095) {
2604 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2605 port_id, (unsigned) vlan_id);
2608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2610 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2612 struct rte_vlan_filter_conf *vfc;
2616 vfc = &dev->data->vlan_filter_conf;
2617 vidx = vlan_id / 64;
2618 vbit = vlan_id % 64;
2621 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2623 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2626 return eth_err(port_id, ret);
2630 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2633 struct rte_eth_dev *dev;
2635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2636 dev = &rte_eth_devices[port_id];
2637 if (rx_queue_id >= dev->data->nb_rx_queues) {
2638 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2642 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2643 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2649 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2650 enum rte_vlan_type vlan_type,
2653 struct rte_eth_dev *dev;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2656 dev = &rte_eth_devices[port_id];
2657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2659 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2664 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2666 struct rte_eth_dev *dev;
2670 uint64_t orig_offloads;
2672 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2673 dev = &rte_eth_devices[port_id];
2675 /* save original values in case of failure */
2676 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2678 /*check which option changed by application*/
2679 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2680 org = !!(dev->data->dev_conf.rxmode.offloads &
2681 DEV_RX_OFFLOAD_VLAN_STRIP);
2684 dev->data->dev_conf.rxmode.offloads |=
2685 DEV_RX_OFFLOAD_VLAN_STRIP;
2687 dev->data->dev_conf.rxmode.offloads &=
2688 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2689 mask |= ETH_VLAN_STRIP_MASK;
2692 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2693 org = !!(dev->data->dev_conf.rxmode.offloads &
2694 DEV_RX_OFFLOAD_VLAN_FILTER);
2697 dev->data->dev_conf.rxmode.offloads |=
2698 DEV_RX_OFFLOAD_VLAN_FILTER;
2700 dev->data->dev_conf.rxmode.offloads &=
2701 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2702 mask |= ETH_VLAN_FILTER_MASK;
2705 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2706 org = !!(dev->data->dev_conf.rxmode.offloads &
2707 DEV_RX_OFFLOAD_VLAN_EXTEND);
2710 dev->data->dev_conf.rxmode.offloads |=
2711 DEV_RX_OFFLOAD_VLAN_EXTEND;
2713 dev->data->dev_conf.rxmode.offloads &=
2714 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2715 mask |= ETH_VLAN_EXTEND_MASK;
2722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2723 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2725 /* hit an error restore original values */
2726 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2729 return eth_err(port_id, ret);
2733 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2735 struct rte_eth_dev *dev;
2738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2739 dev = &rte_eth_devices[port_id];
2741 if (dev->data->dev_conf.rxmode.offloads &
2742 DEV_RX_OFFLOAD_VLAN_STRIP)
2743 ret |= ETH_VLAN_STRIP_OFFLOAD;
2745 if (dev->data->dev_conf.rxmode.offloads &
2746 DEV_RX_OFFLOAD_VLAN_FILTER)
2747 ret |= ETH_VLAN_FILTER_OFFLOAD;
2749 if (dev->data->dev_conf.rxmode.offloads &
2750 DEV_RX_OFFLOAD_VLAN_EXTEND)
2751 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2757 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2759 struct rte_eth_dev *dev;
2761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2762 dev = &rte_eth_devices[port_id];
2763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2765 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2769 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2771 struct rte_eth_dev *dev;
2773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2774 dev = &rte_eth_devices[port_id];
2775 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2776 memset(fc_conf, 0, sizeof(*fc_conf));
2777 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2781 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2783 struct rte_eth_dev *dev;
2785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2786 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2787 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2791 dev = &rte_eth_devices[port_id];
2792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2793 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2797 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2798 struct rte_eth_pfc_conf *pfc_conf)
2800 struct rte_eth_dev *dev;
2802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2803 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2804 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2808 dev = &rte_eth_devices[port_id];
2809 /* High water, low water validation are device specific */
2810 if (*dev->dev_ops->priority_flow_ctrl_set)
2811 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2817 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2825 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2826 for (i = 0; i < num; i++) {
2827 if (reta_conf[i].mask)
2835 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2839 uint16_t i, idx, shift;
2845 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2849 for (i = 0; i < reta_size; i++) {
2850 idx = i / RTE_RETA_GROUP_SIZE;
2851 shift = i % RTE_RETA_GROUP_SIZE;
2852 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2853 (reta_conf[idx].reta[shift] >= max_rxq)) {
2854 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2855 "the maximum rxq index: %u\n", idx, shift,
2856 reta_conf[idx].reta[shift], max_rxq);
2865 rte_eth_dev_rss_reta_update(uint16_t port_id,
2866 struct rte_eth_rss_reta_entry64 *reta_conf,
2869 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 /* Check mask bits */
2874 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2878 dev = &rte_eth_devices[port_id];
2880 /* Check entry value */
2881 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2882 dev->data->nb_rx_queues);
2886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2887 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2892 rte_eth_dev_rss_reta_query(uint16_t port_id,
2893 struct rte_eth_rss_reta_entry64 *reta_conf,
2896 struct rte_eth_dev *dev;
2899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2901 /* Check mask bits */
2902 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2906 dev = &rte_eth_devices[port_id];
2907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2908 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2913 rte_eth_dev_rss_hash_update(uint16_t port_id,
2914 struct rte_eth_rss_conf *rss_conf)
2916 struct rte_eth_dev *dev;
2917 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2920 dev = &rte_eth_devices[port_id];
2921 rte_eth_dev_info_get(port_id, &dev_info);
2922 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2923 dev_info.flow_type_rss_offloads) {
2924 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2925 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2928 dev_info.flow_type_rss_offloads);
2930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2931 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2936 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2937 struct rte_eth_rss_conf *rss_conf)
2939 struct rte_eth_dev *dev;
2941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2942 dev = &rte_eth_devices[port_id];
2943 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2944 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2949 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2950 struct rte_eth_udp_tunnel *udp_tunnel)
2952 struct rte_eth_dev *dev;
2954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2955 if (udp_tunnel == NULL) {
2956 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2960 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2961 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2965 dev = &rte_eth_devices[port_id];
2966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2967 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2972 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2973 struct rte_eth_udp_tunnel *udp_tunnel)
2975 struct rte_eth_dev *dev;
2977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2978 dev = &rte_eth_devices[port_id];
2980 if (udp_tunnel == NULL) {
2981 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2985 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2986 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2991 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2996 rte_eth_led_on(uint16_t port_id)
2998 struct rte_eth_dev *dev;
3000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3001 dev = &rte_eth_devices[port_id];
3002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3003 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3007 rte_eth_led_off(uint16_t port_id)
3009 struct rte_eth_dev *dev;
3011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3012 dev = &rte_eth_devices[port_id];
3013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3014 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3018 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3022 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3024 struct rte_eth_dev_info dev_info;
3025 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3028 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3029 rte_eth_dev_info_get(port_id, &dev_info);
3031 for (i = 0; i < dev_info.max_mac_addrs; i++)
3032 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3038 static const struct ether_addr null_mac_addr;
3041 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3044 struct rte_eth_dev *dev;
3049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3050 dev = &rte_eth_devices[port_id];
3051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3053 if (is_zero_ether_addr(addr)) {
3054 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3058 if (pool >= ETH_64_POOLS) {
3059 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
3063 index = get_mac_addr_index(port_id, addr);
3065 index = get_mac_addr_index(port_id, &null_mac_addr);
3067 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3072 pool_mask = dev->data->mac_pool_sel[index];
3074 /* Check if both MAC address and pool is already there, and do nothing */
3075 if (pool_mask & (1ULL << pool))
3080 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3083 /* Update address in NIC data structure */
3084 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3086 /* Update pool bitmap in NIC data structure */
3087 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3090 return eth_err(port_id, ret);
3094 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3096 struct rte_eth_dev *dev;
3099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 dev = &rte_eth_devices[port_id];
3101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3103 index = get_mac_addr_index(port_id, addr);
3105 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3107 } else if (index < 0)
3108 return 0; /* Do nothing if address wasn't found */
3111 (*dev->dev_ops->mac_addr_remove)(dev, index);
3113 /* Update address in NIC data structure */
3114 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3116 /* reset pool bitmap */
3117 dev->data->mac_pool_sel[index] = 0;
3123 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3125 struct rte_eth_dev *dev;
3128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3130 if (!is_valid_assigned_ether_addr(addr))
3133 dev = &rte_eth_devices[port_id];
3134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3136 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3140 /* Update default address in NIC data structure */
3141 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3148 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3152 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3154 struct rte_eth_dev_info dev_info;
3155 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3158 rte_eth_dev_info_get(port_id, &dev_info);
3159 if (!dev->data->hash_mac_addrs)
3162 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3163 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3164 ETHER_ADDR_LEN) == 0)
3171 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3176 struct rte_eth_dev *dev;
3178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3180 dev = &rte_eth_devices[port_id];
3181 if (is_zero_ether_addr(addr)) {
3182 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3187 index = get_hash_mac_addr_index(port_id, addr);
3188 /* Check if it's already there, and do nothing */
3189 if ((index >= 0) && on)
3194 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3195 "set in UTA\n", port_id);
3199 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3201 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3208 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3210 /* Update address in NIC data structure */
3212 ether_addr_copy(addr,
3213 &dev->data->hash_mac_addrs[index]);
3215 ether_addr_copy(&null_mac_addr,
3216 &dev->data->hash_mac_addrs[index]);
3219 return eth_err(port_id, ret);
3223 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3225 struct rte_eth_dev *dev;
3227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3229 dev = &rte_eth_devices[port_id];
3231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3232 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3236 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3239 struct rte_eth_dev *dev;
3240 struct rte_eth_dev_info dev_info;
3241 struct rte_eth_link link;
3243 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3245 dev = &rte_eth_devices[port_id];
3246 rte_eth_dev_info_get(port_id, &dev_info);
3247 link = dev->data->dev_link;
3249 if (queue_idx > dev_info.max_tx_queues) {
3250 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3251 "invalid queue id=%d\n", port_id, queue_idx);
3255 if (tx_rate > link.link_speed) {
3256 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3257 "bigger than link speed= %d\n",
3258 tx_rate, link.link_speed);
3262 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3263 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3264 queue_idx, tx_rate));
3268 rte_eth_mirror_rule_set(uint16_t port_id,
3269 struct rte_eth_mirror_conf *mirror_conf,
3270 uint8_t rule_id, uint8_t on)
3272 struct rte_eth_dev *dev;
3274 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3275 if (mirror_conf->rule_type == 0) {
3276 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3280 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3281 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3286 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3287 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3288 (mirror_conf->pool_mask == 0)) {
3289 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3293 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3294 mirror_conf->vlan.vlan_mask == 0) {
3295 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3299 dev = &rte_eth_devices[port_id];
3300 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3302 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3303 mirror_conf, rule_id, on));
3307 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3309 struct rte_eth_dev *dev;
3311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3313 dev = &rte_eth_devices[port_id];
3314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3316 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3320 RTE_INIT(eth_dev_init_cb_lists)
3324 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3325 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3329 rte_eth_dev_callback_register(uint16_t port_id,
3330 enum rte_eth_event_type event,
3331 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3333 struct rte_eth_dev *dev;
3334 struct rte_eth_dev_callback *user_cb;
3335 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3341 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3342 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3346 if (port_id == RTE_ETH_ALL) {
3348 last_port = RTE_MAX_ETHPORTS - 1;
3350 next_port = last_port = port_id;
3353 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3356 dev = &rte_eth_devices[next_port];
3358 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3359 if (user_cb->cb_fn == cb_fn &&
3360 user_cb->cb_arg == cb_arg &&
3361 user_cb->event == event) {
3366 /* create a new callback. */
3367 if (user_cb == NULL) {
3368 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3369 sizeof(struct rte_eth_dev_callback), 0);
3370 if (user_cb != NULL) {
3371 user_cb->cb_fn = cb_fn;
3372 user_cb->cb_arg = cb_arg;
3373 user_cb->event = event;
3374 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3377 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3378 rte_eth_dev_callback_unregister(port_id, event,
3384 } while (++next_port <= last_port);
3386 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3391 rte_eth_dev_callback_unregister(uint16_t port_id,
3392 enum rte_eth_event_type event,
3393 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3396 struct rte_eth_dev *dev;
3397 struct rte_eth_dev_callback *cb, *next;
3398 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3404 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3405 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3409 if (port_id == RTE_ETH_ALL) {
3411 last_port = RTE_MAX_ETHPORTS - 1;
3413 next_port = last_port = port_id;
3416 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3419 dev = &rte_eth_devices[next_port];
3421 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3424 next = TAILQ_NEXT(cb, next);
3426 if (cb->cb_fn != cb_fn || cb->event != event ||
3427 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3431 * if this callback is not executing right now,
3434 if (cb->active == 0) {
3435 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3441 } while (++next_port <= last_port);
3443 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3448 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3449 enum rte_eth_event_type event, void *ret_param)
3451 struct rte_eth_dev_callback *cb_lst;
3452 struct rte_eth_dev_callback dev_cb;
3455 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3456 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3457 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3461 if (ret_param != NULL)
3462 dev_cb.ret_param = ret_param;
3464 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3465 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3466 dev_cb.cb_arg, dev_cb.ret_param);
3467 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3470 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3475 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3480 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3482 dev->state = RTE_ETH_DEV_ATTACHED;
3486 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3489 struct rte_eth_dev *dev;
3490 struct rte_intr_handle *intr_handle;
3494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3496 dev = &rte_eth_devices[port_id];
3498 if (!dev->intr_handle) {
3499 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3503 intr_handle = dev->intr_handle;
3504 if (!intr_handle->intr_vec) {
3505 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3509 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3510 vec = intr_handle->intr_vec[qid];
3511 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3512 if (rc && rc != -EEXIST) {
3513 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3514 " op %d epfd %d vec %u\n",
3515 port_id, qid, op, epfd, vec);
3522 const struct rte_memzone *
3523 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3524 uint16_t queue_id, size_t size, unsigned align,
3527 char z_name[RTE_MEMZONE_NAMESIZE];
3528 const struct rte_memzone *mz;
3530 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3531 dev->device->driver->name, ring_name,
3532 dev->data->port_id, queue_id);
3534 mz = rte_memzone_lookup(z_name);
3538 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3539 RTE_MEMZONE_IOVA_CONTIG, align);
3542 int __rte_experimental
3543 rte_eth_dev_create(struct rte_device *device, const char *name,
3544 size_t priv_data_size,
3545 ethdev_bus_specific_init ethdev_bus_specific_init,
3546 void *bus_init_params,
3547 ethdev_init_t ethdev_init, void *init_params)
3549 struct rte_eth_dev *ethdev;
3552 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3554 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3555 ethdev = rte_eth_dev_allocate(name);
3561 if (priv_data_size) {
3562 ethdev->data->dev_private = rte_zmalloc_socket(
3563 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3566 if (!ethdev->data->dev_private) {
3567 RTE_LOG(ERR, EAL, "failed to allocate private data");
3573 ethdev = rte_eth_dev_attach_secondary(name);
3575 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3576 "ethdev doesn't exist");
3582 ethdev->device = device;
3584 if (ethdev_bus_specific_init) {
3585 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3588 "ethdev bus specific initialisation failed");
3593 retval = ethdev_init(ethdev, init_params);
3595 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3599 rte_eth_dev_probing_finish(ethdev);
3603 /* free ports private data if primary process */
3604 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3605 rte_free(ethdev->data->dev_private);
3607 rte_eth_dev_release_port(ethdev);
3612 int __rte_experimental
3613 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3614 ethdev_uninit_t ethdev_uninit)
3618 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3622 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3623 if (ethdev_uninit) {
3624 ret = ethdev_uninit(ethdev);
3629 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3630 rte_free(ethdev->data->dev_private);
3632 ethdev->data->dev_private = NULL;
3634 return rte_eth_dev_release_port(ethdev);
3638 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3639 int epfd, int op, void *data)
3642 struct rte_eth_dev *dev;
3643 struct rte_intr_handle *intr_handle;
3646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3648 dev = &rte_eth_devices[port_id];
3649 if (queue_id >= dev->data->nb_rx_queues) {
3650 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3654 if (!dev->intr_handle) {
3655 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3659 intr_handle = dev->intr_handle;
3660 if (!intr_handle->intr_vec) {
3661 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3665 vec = intr_handle->intr_vec[queue_id];
3666 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3667 if (rc && rc != -EEXIST) {
3668 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3669 " op %d epfd %d vec %u\n",
3670 port_id, queue_id, op, epfd, vec);
3678 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3681 struct rte_eth_dev *dev;
3683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3685 dev = &rte_eth_devices[port_id];
3687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3688 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3693 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3696 struct rte_eth_dev *dev;
3698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3700 dev = &rte_eth_devices[port_id];
3702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3703 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3709 rte_eth_dev_filter_supported(uint16_t port_id,
3710 enum rte_filter_type filter_type)
3712 struct rte_eth_dev *dev;
3714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3716 dev = &rte_eth_devices[port_id];
3717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3718 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3719 RTE_ETH_FILTER_NOP, NULL);
3723 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3724 enum rte_filter_op filter_op, void *arg)
3726 struct rte_eth_dev *dev;
3728 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3730 dev = &rte_eth_devices[port_id];
3731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3732 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3736 const struct rte_eth_rxtx_callback *
3737 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3738 rte_rx_callback_fn fn, void *user_param)
3740 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3741 rte_errno = ENOTSUP;
3744 /* check input parameters */
3745 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3746 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3750 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3758 cb->param = user_param;
3760 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3761 /* Add the callbacks in fifo order. */
3762 struct rte_eth_rxtx_callback *tail =
3763 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3766 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3773 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3778 const struct rte_eth_rxtx_callback *
3779 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3780 rte_rx_callback_fn fn, void *user_param)
3782 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3783 rte_errno = ENOTSUP;
3786 /* check input parameters */
3787 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3788 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3793 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3801 cb->param = user_param;
3803 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3804 /* Add the callbacks at fisrt position*/
3805 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3807 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3808 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3813 const struct rte_eth_rxtx_callback *
3814 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3815 rte_tx_callback_fn fn, void *user_param)
3817 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3818 rte_errno = ENOTSUP;
3821 /* check input parameters */
3822 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3823 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3828 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3836 cb->param = user_param;
3838 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3839 /* Add the callbacks in fifo order. */
3840 struct rte_eth_rxtx_callback *tail =
3841 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3844 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3851 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3857 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3858 const struct rte_eth_rxtx_callback *user_cb)
3860 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3863 /* Check input parameters. */
3864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3865 if (user_cb == NULL ||
3866 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3869 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3870 struct rte_eth_rxtx_callback *cb;
3871 struct rte_eth_rxtx_callback **prev_cb;
3874 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3875 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3876 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3878 if (cb == user_cb) {
3879 /* Remove the user cb from the callback list. */
3880 *prev_cb = cb->next;
3885 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3891 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3892 const struct rte_eth_rxtx_callback *user_cb)
3894 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3897 /* Check input parameters. */
3898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3899 if (user_cb == NULL ||
3900 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3903 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3905 struct rte_eth_rxtx_callback *cb;
3906 struct rte_eth_rxtx_callback **prev_cb;
3908 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3909 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3910 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3912 if (cb == user_cb) {
3913 /* Remove the user cb from the callback list. */
3914 *prev_cb = cb->next;
3919 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3925 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3926 struct rte_eth_rxq_info *qinfo)
3928 struct rte_eth_dev *dev;
3930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3935 dev = &rte_eth_devices[port_id];
3936 if (queue_id >= dev->data->nb_rx_queues) {
3937 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3943 memset(qinfo, 0, sizeof(*qinfo));
3944 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3949 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3950 struct rte_eth_txq_info *qinfo)
3952 struct rte_eth_dev *dev;
3953 struct rte_eth_txconf *txconf = &qinfo->conf;
3955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3960 dev = &rte_eth_devices[port_id];
3961 if (queue_id >= dev->data->nb_tx_queues) {
3962 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3968 memset(qinfo, 0, sizeof(*qinfo));
3969 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3970 /* convert offload to txq_flags to support legacy app */
3971 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3977 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3978 struct ether_addr *mc_addr_set,
3979 uint32_t nb_mc_addr)
3981 struct rte_eth_dev *dev;
3983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3985 dev = &rte_eth_devices[port_id];
3986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3987 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3988 mc_addr_set, nb_mc_addr));
3992 rte_eth_timesync_enable(uint16_t port_id)
3994 struct rte_eth_dev *dev;
3996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3997 dev = &rte_eth_devices[port_id];
3999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4000 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4004 rte_eth_timesync_disable(uint16_t port_id)
4006 struct rte_eth_dev *dev;
4008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4009 dev = &rte_eth_devices[port_id];
4011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4012 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4016 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4019 struct rte_eth_dev *dev;
4021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4022 dev = &rte_eth_devices[port_id];
4024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4025 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4026 (dev, timestamp, flags));
4030 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4031 struct timespec *timestamp)
4033 struct rte_eth_dev *dev;
4035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4036 dev = &rte_eth_devices[port_id];
4038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4039 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4044 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4046 struct rte_eth_dev *dev;
4048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4049 dev = &rte_eth_devices[port_id];
4051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4052 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4057 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4059 struct rte_eth_dev *dev;
4061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4062 dev = &rte_eth_devices[port_id];
4064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4065 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4070 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4072 struct rte_eth_dev *dev;
4074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4075 dev = &rte_eth_devices[port_id];
4077 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4078 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4083 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4085 struct rte_eth_dev *dev;
4087 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4089 dev = &rte_eth_devices[port_id];
4090 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4091 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4095 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4097 struct rte_eth_dev *dev;
4099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4101 dev = &rte_eth_devices[port_id];
4102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4103 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4107 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4109 struct rte_eth_dev *dev;
4111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4113 dev = &rte_eth_devices[port_id];
4114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4115 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4119 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4121 struct rte_eth_dev *dev;
4123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4125 dev = &rte_eth_devices[port_id];
4126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4127 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4130 int __rte_experimental
4131 rte_eth_dev_get_module_info(uint16_t port_id,
4132 struct rte_eth_dev_module_info *modinfo)
4134 struct rte_eth_dev *dev;
4136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4138 dev = &rte_eth_devices[port_id];
4139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4140 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4143 int __rte_experimental
4144 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4145 struct rte_dev_eeprom_info *info)
4147 struct rte_eth_dev *dev;
4149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4151 dev = &rte_eth_devices[port_id];
4152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4153 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4157 rte_eth_dev_get_dcb_info(uint16_t port_id,
4158 struct rte_eth_dcb_info *dcb_info)
4160 struct rte_eth_dev *dev;
4162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4164 dev = &rte_eth_devices[port_id];
4165 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4168 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4172 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4173 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4175 struct rte_eth_dev *dev;
4177 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4178 if (l2_tunnel == NULL) {
4179 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4183 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4184 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4188 dev = &rte_eth_devices[port_id];
4189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4191 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4196 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4197 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4201 struct rte_eth_dev *dev;
4203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4205 if (l2_tunnel == NULL) {
4206 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4210 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4211 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4216 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4220 dev = &rte_eth_devices[port_id];
4221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4223 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4224 l2_tunnel, mask, en));
4228 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4229 const struct rte_eth_desc_lim *desc_lim)
4231 if (desc_lim->nb_align != 0)
4232 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4234 if (desc_lim->nb_max != 0)
4235 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4237 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4241 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4242 uint16_t *nb_rx_desc,
4243 uint16_t *nb_tx_desc)
4245 struct rte_eth_dev *dev;
4246 struct rte_eth_dev_info dev_info;
4248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4250 dev = &rte_eth_devices[port_id];
4251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4253 rte_eth_dev_info_get(port_id, &dev_info);
4255 if (nb_rx_desc != NULL)
4256 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4258 if (nb_tx_desc != NULL)
4259 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4265 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4267 struct rte_eth_dev *dev;
4269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4274 dev = &rte_eth_devices[port_id];
4276 if (*dev->dev_ops->pool_ops_supported == NULL)
4277 return 1; /* all pools are supported */
4279 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4283 * A set of values to describe the possible states of a switch domain.
4285 enum rte_eth_switch_domain_state {
4286 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4287 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4291 * Array of switch domains available for allocation. Array is sized to
4292 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4293 * ethdev ports in a single process.
4295 struct rte_eth_dev_switch {
4296 enum rte_eth_switch_domain_state state;
4297 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4299 int __rte_experimental
4300 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4304 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4306 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4307 i < RTE_MAX_ETHPORTS; i++) {
4308 if (rte_eth_switch_domains[i].state ==
4309 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4310 rte_eth_switch_domains[i].state =
4311 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4320 int __rte_experimental
4321 rte_eth_switch_domain_free(uint16_t domain_id)
4323 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4324 domain_id >= RTE_MAX_ETHPORTS)
4327 if (rte_eth_switch_domains[domain_id].state !=
4328 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4331 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4336 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4339 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4342 struct rte_kvargs_pair *pair;
4345 arglist->str = strdup(str_in);
4346 if (arglist->str == NULL)
4349 letter = arglist->str;
4352 pair = &arglist->pairs[0];
4355 case 0: /* Initial */
4358 else if (*letter == '\0')
4365 case 1: /* Parsing key */
4366 if (*letter == '=') {
4368 pair->value = letter + 1;
4370 } else if (*letter == ',' || *letter == '\0')
4375 case 2: /* Parsing value */
4378 else if (*letter == ',') {
4381 pair = &arglist->pairs[arglist->count];
4383 } else if (*letter == '\0') {
4386 pair = &arglist->pairs[arglist->count];
4391 case 3: /* Parsing list */
4394 else if (*letter == '\0')
4403 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4411 /* Single element, not a list */
4412 return callback(str, data);
4414 /* Sanity check, then strip the brackets */
4415 str_start = &str[strlen(str) - 1];
4416 if (*str_start != ']') {
4417 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4423 /* Process list elements */
4433 } else if (state == 1) {
4434 if (*str == ',' || *str == '\0') {
4435 if (str > str_start) {
4436 /* Non-empty string fragment */
4438 result = callback(str_start, data);
4451 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4452 const uint16_t max_list)
4454 uint16_t lo, hi, val;
4457 result = sscanf(str, "%hu-%hu", &lo, &hi);
4459 if (*len_list >= max_list)
4461 list[(*len_list)++] = lo;
4462 } else if (result == 2) {
4463 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4465 for (val = lo; val <= hi; val++) {
4466 if (*len_list >= max_list)
4468 list[(*len_list)++] = val;
4477 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4479 struct rte_eth_devargs *eth_da = data;
4481 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4482 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4485 int __rte_experimental
4486 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4488 struct rte_kvargs args;
4489 struct rte_kvargs_pair *pair;
4493 memset(eth_da, 0, sizeof(*eth_da));
4495 result = rte_eth_devargs_tokenise(&args, dargs);
4499 for (i = 0; i < args.count; i++) {
4500 pair = &args.pairs[i];
4501 if (strcmp("representor", pair->key) == 0) {
4502 result = rte_eth_devargs_parse_list(pair->value,
4503 rte_eth_devargs_parse_representor_ports,
4517 RTE_INIT(ethdev_init_log);
4519 ethdev_init_log(void)
4521 ethdev_logtype = rte_log_register("lib.ethdev");
4522 if (ethdev_logtype >= 0)
4523 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);