1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
345 port_id = rte_eth_find_next(port_id);
346 while (port_id < RTE_MAX_ETHPORTS &&
347 rte_eth_devices[port_id].device != parent)
348 port_id = rte_eth_find_next(port_id + 1);
354 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
356 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
357 return rte_eth_find_next_of(port_id,
358 rte_eth_devices[ref_port_id].device);
362 rte_eth_dev_shared_data_prepare(void)
364 const unsigned flags = 0;
365 const struct rte_memzone *mz;
367 rte_spinlock_lock(&rte_eth_shared_data_lock);
369 if (rte_eth_dev_shared_data == NULL) {
370 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
371 /* Allocate port data and ownership shared memory. */
372 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
373 sizeof(*rte_eth_dev_shared_data),
374 rte_socket_id(), flags);
376 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
378 rte_panic("Cannot allocate ethdev shared data\n");
380 rte_eth_dev_shared_data = mz->addr;
381 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
382 rte_eth_dev_shared_data->next_owner_id =
383 RTE_ETH_DEV_NO_OWNER + 1;
384 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
385 memset(rte_eth_dev_shared_data->data, 0,
386 sizeof(rte_eth_dev_shared_data->data));
390 rte_spinlock_unlock(&rte_eth_shared_data_lock);
394 is_allocated(const struct rte_eth_dev *ethdev)
396 return ethdev->data->name[0] != '\0';
399 static struct rte_eth_dev *
400 _rte_eth_dev_allocated(const char *name)
404 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
405 if (rte_eth_devices[i].data != NULL &&
406 strcmp(rte_eth_devices[i].data->name, name) == 0)
407 return &rte_eth_devices[i];
413 rte_eth_dev_allocated(const char *name)
415 struct rte_eth_dev *ethdev;
417 rte_eth_dev_shared_data_prepare();
419 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
421 ethdev = _rte_eth_dev_allocated(name);
423 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
429 rte_eth_dev_find_free_port(void)
433 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
434 /* Using shared name field to find a free port. */
435 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
436 RTE_ASSERT(rte_eth_devices[i].state ==
441 return RTE_MAX_ETHPORTS;
444 static struct rte_eth_dev *
445 eth_dev_get(uint16_t port_id)
447 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
449 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
455 rte_eth_dev_allocate(const char *name)
458 struct rte_eth_dev *eth_dev = NULL;
461 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
463 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
467 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
468 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
472 rte_eth_dev_shared_data_prepare();
474 /* Synchronize port creation between primary and secondary threads. */
475 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
477 if (_rte_eth_dev_allocated(name) != NULL) {
479 "Ethernet device with name %s already allocated\n",
484 port_id = rte_eth_dev_find_free_port();
485 if (port_id == RTE_MAX_ETHPORTS) {
487 "Reached maximum number of Ethernet ports\n");
491 eth_dev = eth_dev_get(port_id);
492 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
493 eth_dev->data->port_id = port_id;
494 eth_dev->data->mtu = ETHER_MTU;
497 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
503 * Attach to a port already registered by the primary process, which
504 * makes sure that the same device would have the same port id both
505 * in the primary and secondary process.
508 rte_eth_dev_attach_secondary(const char *name)
511 struct rte_eth_dev *eth_dev = NULL;
513 rte_eth_dev_shared_data_prepare();
515 /* Synchronize port attachment to primary port creation and release. */
516 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
518 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
519 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
522 if (i == RTE_MAX_ETHPORTS) {
524 "Device %s is not driven by the primary process\n",
527 eth_dev = eth_dev_get(i);
528 RTE_ASSERT(eth_dev->data->port_id == i);
531 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
536 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
541 rte_eth_dev_shared_data_prepare();
543 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
544 _rte_eth_dev_callback_process(eth_dev,
545 RTE_ETH_EVENT_DESTROY, NULL);
547 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
549 eth_dev->state = RTE_ETH_DEV_UNUSED;
551 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
552 rte_free(eth_dev->data->rx_queues);
553 rte_free(eth_dev->data->tx_queues);
554 rte_free(eth_dev->data->mac_addrs);
555 rte_free(eth_dev->data->hash_mac_addrs);
556 rte_free(eth_dev->data->dev_private);
557 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
560 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
566 rte_eth_dev_is_valid_port(uint16_t port_id)
568 if (port_id >= RTE_MAX_ETHPORTS ||
569 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
576 rte_eth_is_valid_owner_id(uint64_t owner_id)
578 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
579 rte_eth_dev_shared_data->next_owner_id <= owner_id)
585 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
587 while (port_id < RTE_MAX_ETHPORTS &&
588 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED ||
589 rte_eth_devices[port_id].data->owner.id != owner_id))
592 if (port_id >= RTE_MAX_ETHPORTS)
593 return RTE_MAX_ETHPORTS;
598 int __rte_experimental
599 rte_eth_dev_owner_new(uint64_t *owner_id)
601 rte_eth_dev_shared_data_prepare();
603 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
605 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
607 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
612 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
613 const struct rte_eth_dev_owner *new_owner)
615 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
616 struct rte_eth_dev_owner *port_owner;
618 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
619 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
624 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
625 !rte_eth_is_valid_owner_id(old_owner_id)) {
627 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
628 old_owner_id, new_owner->id);
632 port_owner = &rte_eth_devices[port_id].data->owner;
633 if (port_owner->id != old_owner_id) {
635 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
636 port_id, port_owner->name, port_owner->id);
640 /* can not truncate (same structure) */
641 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
643 port_owner->id = new_owner->id;
645 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
646 port_id, new_owner->name, new_owner->id);
651 int __rte_experimental
652 rte_eth_dev_owner_set(const uint16_t port_id,
653 const struct rte_eth_dev_owner *owner)
657 rte_eth_dev_shared_data_prepare();
659 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
661 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
663 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
667 int __rte_experimental
668 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
670 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
671 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
674 rte_eth_dev_shared_data_prepare();
676 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
678 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
680 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
684 void __rte_experimental
685 rte_eth_dev_owner_delete(const uint64_t owner_id)
689 rte_eth_dev_shared_data_prepare();
691 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
693 if (rte_eth_is_valid_owner_id(owner_id)) {
694 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
695 if (rte_eth_devices[port_id].data->owner.id == owner_id)
696 memset(&rte_eth_devices[port_id].data->owner, 0,
697 sizeof(struct rte_eth_dev_owner));
698 RTE_ETHDEV_LOG(NOTICE,
699 "All port owners owned by %016"PRIx64" identifier have removed\n",
703 "Invalid owner id=%016"PRIx64"\n",
707 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
710 int __rte_experimental
711 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
714 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
716 rte_eth_dev_shared_data_prepare();
718 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
720 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
721 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
725 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
728 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
733 rte_eth_dev_socket_id(uint16_t port_id)
735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
736 return rte_eth_devices[port_id].data->numa_node;
740 rte_eth_dev_get_sec_ctx(uint16_t port_id)
742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
743 return rte_eth_devices[port_id].security_ctx;
747 rte_eth_dev_count(void)
749 return rte_eth_dev_count_avail();
753 rte_eth_dev_count_avail(void)
760 RTE_ETH_FOREACH_DEV(p)
766 uint16_t __rte_experimental
767 rte_eth_dev_count_total(void)
769 uint16_t port, count = 0;
771 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
772 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
779 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
786 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
790 /* shouldn't check 'rte_eth_devices[i].data',
791 * because it might be overwritten by VDEV PMD */
792 tmp = rte_eth_dev_shared_data->data[port_id].name;
798 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
803 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
807 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
808 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
809 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
819 eth_err(uint16_t port_id, int ret)
823 if (rte_eth_dev_is_removed(port_id))
829 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
831 uint16_t old_nb_queues = dev->data->nb_rx_queues;
835 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
836 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
837 sizeof(dev->data->rx_queues[0]) * nb_queues,
838 RTE_CACHE_LINE_SIZE);
839 if (dev->data->rx_queues == NULL) {
840 dev->data->nb_rx_queues = 0;
843 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
846 rxq = dev->data->rx_queues;
848 for (i = nb_queues; i < old_nb_queues; i++)
849 (*dev->dev_ops->rx_queue_release)(rxq[i]);
850 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
851 RTE_CACHE_LINE_SIZE);
854 if (nb_queues > old_nb_queues) {
855 uint16_t new_qs = nb_queues - old_nb_queues;
857 memset(rxq + old_nb_queues, 0,
858 sizeof(rxq[0]) * new_qs);
861 dev->data->rx_queues = rxq;
863 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
866 rxq = dev->data->rx_queues;
868 for (i = nb_queues; i < old_nb_queues; i++)
869 (*dev->dev_ops->rx_queue_release)(rxq[i]);
871 rte_free(dev->data->rx_queues);
872 dev->data->rx_queues = NULL;
874 dev->data->nb_rx_queues = nb_queues;
879 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
881 struct rte_eth_dev *dev;
883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
885 dev = &rte_eth_devices[port_id];
886 if (!dev->data->dev_started) {
888 "Port %u must be started before start any queue\n",
893 if (rx_queue_id >= dev->data->nb_rx_queues) {
894 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
900 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
902 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
903 rx_queue_id, port_id);
907 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
913 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
915 struct rte_eth_dev *dev;
917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
919 dev = &rte_eth_devices[port_id];
920 if (rx_queue_id >= dev->data->nb_rx_queues) {
921 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
925 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
927 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
929 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
930 rx_queue_id, port_id);
934 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
939 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
941 struct rte_eth_dev *dev;
943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
945 dev = &rte_eth_devices[port_id];
946 if (!dev->data->dev_started) {
948 "Port %u must be started before start any queue\n",
953 if (tx_queue_id >= dev->data->nb_tx_queues) {
954 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
960 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
962 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
963 tx_queue_id, port_id);
967 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
971 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
973 struct rte_eth_dev *dev;
975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
977 dev = &rte_eth_devices[port_id];
978 if (tx_queue_id >= dev->data->nb_tx_queues) {
979 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
985 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
987 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
988 tx_queue_id, port_id);
992 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
997 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
999 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1003 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1004 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1005 sizeof(dev->data->tx_queues[0]) * nb_queues,
1006 RTE_CACHE_LINE_SIZE);
1007 if (dev->data->tx_queues == NULL) {
1008 dev->data->nb_tx_queues = 0;
1011 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1014 txq = dev->data->tx_queues;
1016 for (i = nb_queues; i < old_nb_queues; i++)
1017 (*dev->dev_ops->tx_queue_release)(txq[i]);
1018 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1019 RTE_CACHE_LINE_SIZE);
1022 if (nb_queues > old_nb_queues) {
1023 uint16_t new_qs = nb_queues - old_nb_queues;
1025 memset(txq + old_nb_queues, 0,
1026 sizeof(txq[0]) * new_qs);
1029 dev->data->tx_queues = txq;
1031 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1034 txq = dev->data->tx_queues;
1036 for (i = nb_queues; i < old_nb_queues; i++)
1037 (*dev->dev_ops->tx_queue_release)(txq[i]);
1039 rte_free(dev->data->tx_queues);
1040 dev->data->tx_queues = NULL;
1042 dev->data->nb_tx_queues = nb_queues;
1047 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1050 case ETH_SPEED_NUM_10M:
1051 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1052 case ETH_SPEED_NUM_100M:
1053 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1054 case ETH_SPEED_NUM_1G:
1055 return ETH_LINK_SPEED_1G;
1056 case ETH_SPEED_NUM_2_5G:
1057 return ETH_LINK_SPEED_2_5G;
1058 case ETH_SPEED_NUM_5G:
1059 return ETH_LINK_SPEED_5G;
1060 case ETH_SPEED_NUM_10G:
1061 return ETH_LINK_SPEED_10G;
1062 case ETH_SPEED_NUM_20G:
1063 return ETH_LINK_SPEED_20G;
1064 case ETH_SPEED_NUM_25G:
1065 return ETH_LINK_SPEED_25G;
1066 case ETH_SPEED_NUM_40G:
1067 return ETH_LINK_SPEED_40G;
1068 case ETH_SPEED_NUM_50G:
1069 return ETH_LINK_SPEED_50G;
1070 case ETH_SPEED_NUM_56G:
1071 return ETH_LINK_SPEED_56G;
1072 case ETH_SPEED_NUM_100G:
1073 return ETH_LINK_SPEED_100G;
1080 rte_eth_dev_rx_offload_name(uint64_t offload)
1082 const char *name = "UNKNOWN";
1085 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1086 if (offload == rte_rx_offload_names[i].offload) {
1087 name = rte_rx_offload_names[i].name;
1096 rte_eth_dev_tx_offload_name(uint64_t offload)
1098 const char *name = "UNKNOWN";
1101 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1102 if (offload == rte_tx_offload_names[i].offload) {
1103 name = rte_tx_offload_names[i].name;
1112 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1113 const struct rte_eth_conf *dev_conf)
1115 struct rte_eth_dev *dev;
1116 struct rte_eth_dev_info dev_info;
1117 struct rte_eth_conf orig_conf;
1121 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1123 dev = &rte_eth_devices[port_id];
1125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1128 if (dev->data->dev_started) {
1130 "Port %u must be stopped to allow configuration\n",
1135 /* Store original config, as rollback required on failure */
1136 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1139 * Copy the dev_conf parameter into the dev structure.
1140 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1142 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1144 rte_eth_dev_info_get(port_id, &dev_info);
1146 /* If number of queues specified by application for both Rx and Tx is
1147 * zero, use driver preferred values. This cannot be done individually
1148 * as it is valid for either Tx or Rx (but not both) to be zero.
1149 * If driver does not provide any preferred valued, fall back on
1152 if (nb_rx_q == 0 && nb_tx_q == 0) {
1153 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1155 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1156 nb_tx_q = dev_info.default_txportconf.nb_queues;
1158 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1161 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1163 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1164 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1169 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1171 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1172 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1178 * Check that the numbers of RX and TX queues are not greater
1179 * than the maximum number of RX and TX queues supported by the
1180 * configured device.
1182 if (nb_rx_q > dev_info.max_rx_queues) {
1183 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1184 port_id, nb_rx_q, dev_info.max_rx_queues);
1189 if (nb_tx_q > dev_info.max_tx_queues) {
1190 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1191 port_id, nb_tx_q, dev_info.max_tx_queues);
1196 /* Check that the device supports requested interrupts */
1197 if ((dev_conf->intr_conf.lsc == 1) &&
1198 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1199 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1200 dev->device->driver->name);
1204 if ((dev_conf->intr_conf.rmv == 1) &&
1205 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1206 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1207 dev->device->driver->name);
1213 * If jumbo frames are enabled, check that the maximum RX packet
1214 * length is supported by the configured device.
1216 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1217 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1219 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1220 port_id, dev_conf->rxmode.max_rx_pkt_len,
1221 dev_info.max_rx_pktlen);
1224 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1226 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1227 port_id, dev_conf->rxmode.max_rx_pkt_len,
1228 (unsigned)ETHER_MIN_LEN);
1233 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1234 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1235 /* Use default value */
1236 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1240 /* Any requested offloading must be within its device capabilities */
1241 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1242 dev_conf->rxmode.offloads) {
1244 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1245 "capabilities 0x%"PRIx64" in %s()\n",
1246 port_id, dev_conf->rxmode.offloads,
1247 dev_info.rx_offload_capa,
1252 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1253 dev_conf->txmode.offloads) {
1255 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1256 "capabilities 0x%"PRIx64" in %s()\n",
1257 port_id, dev_conf->txmode.offloads,
1258 dev_info.tx_offload_capa,
1264 /* Check that device supports requested rss hash functions. */
1265 if ((dev_info.flow_type_rss_offloads |
1266 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1267 dev_info.flow_type_rss_offloads) {
1269 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1270 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1271 dev_info.flow_type_rss_offloads);
1277 * Setup new number of RX/TX queues and reconfigure device.
1279 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1282 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1288 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1291 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1293 rte_eth_dev_rx_queue_config(dev, 0);
1298 diag = (*dev->dev_ops->dev_configure)(dev);
1300 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1302 rte_eth_dev_rx_queue_config(dev, 0);
1303 rte_eth_dev_tx_queue_config(dev, 0);
1304 ret = eth_err(port_id, diag);
1308 /* Initialize Rx profiling if enabled at compilation time. */
1309 diag = __rte_eth_dev_profile_init(port_id, dev);
1311 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1313 rte_eth_dev_rx_queue_config(dev, 0);
1314 rte_eth_dev_tx_queue_config(dev, 0);
1315 ret = eth_err(port_id, diag);
1322 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1328 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1330 if (dev->data->dev_started) {
1331 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1332 dev->data->port_id);
1336 rte_eth_dev_rx_queue_config(dev, 0);
1337 rte_eth_dev_tx_queue_config(dev, 0);
1339 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1343 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1344 struct rte_eth_dev_info *dev_info)
1346 struct ether_addr *addr;
1351 /* replay MAC address configuration including default MAC */
1352 addr = &dev->data->mac_addrs[0];
1353 if (*dev->dev_ops->mac_addr_set != NULL)
1354 (*dev->dev_ops->mac_addr_set)(dev, addr);
1355 else if (*dev->dev_ops->mac_addr_add != NULL)
1356 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1358 if (*dev->dev_ops->mac_addr_add != NULL) {
1359 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1360 addr = &dev->data->mac_addrs[i];
1362 /* skip zero address */
1363 if (is_zero_ether_addr(addr))
1367 pool_mask = dev->data->mac_pool_sel[i];
1370 if (pool_mask & 1ULL)
1371 (*dev->dev_ops->mac_addr_add)(dev,
1375 } while (pool_mask);
1381 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1382 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1384 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1385 rte_eth_dev_mac_restore(dev, dev_info);
1387 /* replay promiscuous configuration */
1388 if (rte_eth_promiscuous_get(port_id) == 1)
1389 rte_eth_promiscuous_enable(port_id);
1390 else if (rte_eth_promiscuous_get(port_id) == 0)
1391 rte_eth_promiscuous_disable(port_id);
1393 /* replay all multicast configuration */
1394 if (rte_eth_allmulticast_get(port_id) == 1)
1395 rte_eth_allmulticast_enable(port_id);
1396 else if (rte_eth_allmulticast_get(port_id) == 0)
1397 rte_eth_allmulticast_disable(port_id);
1401 rte_eth_dev_start(uint16_t port_id)
1403 struct rte_eth_dev *dev;
1404 struct rte_eth_dev_info dev_info;
1407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1409 dev = &rte_eth_devices[port_id];
1411 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1413 if (dev->data->dev_started != 0) {
1414 RTE_ETHDEV_LOG(INFO,
1415 "Device with port_id=%"PRIu16" already started\n",
1420 rte_eth_dev_info_get(port_id, &dev_info);
1422 /* Lets restore MAC now if device does not support live change */
1423 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1424 rte_eth_dev_mac_restore(dev, &dev_info);
1426 diag = (*dev->dev_ops->dev_start)(dev);
1428 dev->data->dev_started = 1;
1430 return eth_err(port_id, diag);
1432 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1434 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1436 (*dev->dev_ops->link_update)(dev, 0);
1442 rte_eth_dev_stop(uint16_t port_id)
1444 struct rte_eth_dev *dev;
1446 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1447 dev = &rte_eth_devices[port_id];
1449 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1451 if (dev->data->dev_started == 0) {
1452 RTE_ETHDEV_LOG(INFO,
1453 "Device with port_id=%"PRIu16" already stopped\n",
1458 dev->data->dev_started = 0;
1459 (*dev->dev_ops->dev_stop)(dev);
1463 rte_eth_dev_set_link_up(uint16_t port_id)
1465 struct rte_eth_dev *dev;
1467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1469 dev = &rte_eth_devices[port_id];
1471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1472 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1476 rte_eth_dev_set_link_down(uint16_t port_id)
1478 struct rte_eth_dev *dev;
1480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1482 dev = &rte_eth_devices[port_id];
1484 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1485 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1489 rte_eth_dev_close(uint16_t port_id)
1491 struct rte_eth_dev *dev;
1493 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1494 dev = &rte_eth_devices[port_id];
1496 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1497 dev->data->dev_started = 0;
1498 (*dev->dev_ops->dev_close)(dev);
1500 /* check behaviour flag - temporary for PMD migration */
1501 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1502 /* new behaviour: send event + reset state + free all data */
1503 rte_eth_dev_release_port(dev);
1506 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1507 "The driver %s should migrate to the new behaviour.\n",
1508 dev->device->driver->name);
1509 /* old behaviour: only free queue arrays */
1510 dev->data->nb_rx_queues = 0;
1511 rte_free(dev->data->rx_queues);
1512 dev->data->rx_queues = NULL;
1513 dev->data->nb_tx_queues = 0;
1514 rte_free(dev->data->tx_queues);
1515 dev->data->tx_queues = NULL;
1519 rte_eth_dev_reset(uint16_t port_id)
1521 struct rte_eth_dev *dev;
1524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1525 dev = &rte_eth_devices[port_id];
1527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1529 rte_eth_dev_stop(port_id);
1530 ret = dev->dev_ops->dev_reset(dev);
1532 return eth_err(port_id, ret);
1535 int __rte_experimental
1536 rte_eth_dev_is_removed(uint16_t port_id)
1538 struct rte_eth_dev *dev;
1541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1543 dev = &rte_eth_devices[port_id];
1545 if (dev->state == RTE_ETH_DEV_REMOVED)
1548 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1550 ret = dev->dev_ops->is_removed(dev);
1552 /* Device is physically removed. */
1553 dev->state = RTE_ETH_DEV_REMOVED;
1559 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1560 uint16_t nb_rx_desc, unsigned int socket_id,
1561 const struct rte_eth_rxconf *rx_conf,
1562 struct rte_mempool *mp)
1565 uint32_t mbp_buf_size;
1566 struct rte_eth_dev *dev;
1567 struct rte_eth_dev_info dev_info;
1568 struct rte_eth_rxconf local_conf;
1571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1573 dev = &rte_eth_devices[port_id];
1574 if (rx_queue_id >= dev->data->nb_rx_queues) {
1575 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1583 * Check the size of the mbuf data buffer.
1584 * This value must be provided in the private data of the memory pool.
1585 * First check that the memory pool has a valid private data.
1587 rte_eth_dev_info_get(port_id, &dev_info);
1588 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1589 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1590 mp->name, (int)mp->private_data_size,
1591 (int)sizeof(struct rte_pktmbuf_pool_private));
1594 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1596 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1598 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1599 mp->name, (int)mbp_buf_size,
1600 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1601 (int)RTE_PKTMBUF_HEADROOM,
1602 (int)dev_info.min_rx_bufsize);
1606 /* Use default specified by driver, if nb_rx_desc is zero */
1607 if (nb_rx_desc == 0) {
1608 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1609 /* If driver default is also zero, fall back on EAL default */
1610 if (nb_rx_desc == 0)
1611 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1614 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1615 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1616 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1619 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1620 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1621 dev_info.rx_desc_lim.nb_min,
1622 dev_info.rx_desc_lim.nb_align);
1626 if (dev->data->dev_started &&
1627 !(dev_info.dev_capa &
1628 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1631 if (dev->data->dev_started &&
1632 (dev->data->rx_queue_state[rx_queue_id] !=
1633 RTE_ETH_QUEUE_STATE_STOPPED))
1636 rxq = dev->data->rx_queues;
1637 if (rxq[rx_queue_id]) {
1638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1640 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1641 rxq[rx_queue_id] = NULL;
1644 if (rx_conf == NULL)
1645 rx_conf = &dev_info.default_rxconf;
1647 local_conf = *rx_conf;
1650 * If an offloading has already been enabled in
1651 * rte_eth_dev_configure(), it has been enabled on all queues,
1652 * so there is no need to enable it in this queue again.
1653 * The local_conf.offloads input to underlying PMD only carries
1654 * those offloadings which are only enabled on this queue and
1655 * not enabled on all queues.
1657 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1660 * New added offloadings for this queue are those not enabled in
1661 * rte_eth_dev_configure() and they must be per-queue type.
1662 * A pure per-port offloading can't be enabled on a queue while
1663 * disabled on another queue. A pure per-port offloading can't
1664 * be enabled for any queue as new added one if it hasn't been
1665 * enabled in rte_eth_dev_configure().
1667 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1668 local_conf.offloads) {
1670 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1671 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1672 port_id, rx_queue_id, local_conf.offloads,
1673 dev_info.rx_queue_offload_capa,
1678 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1679 socket_id, &local_conf, mp);
1681 if (!dev->data->min_rx_buf_size ||
1682 dev->data->min_rx_buf_size > mbp_buf_size)
1683 dev->data->min_rx_buf_size = mbp_buf_size;
1686 return eth_err(port_id, ret);
1690 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1691 uint16_t nb_tx_desc, unsigned int socket_id,
1692 const struct rte_eth_txconf *tx_conf)
1694 struct rte_eth_dev *dev;
1695 struct rte_eth_dev_info dev_info;
1696 struct rte_eth_txconf local_conf;
1699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1701 dev = &rte_eth_devices[port_id];
1702 if (tx_queue_id >= dev->data->nb_tx_queues) {
1703 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1708 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1710 rte_eth_dev_info_get(port_id, &dev_info);
1712 /* Use default specified by driver, if nb_tx_desc is zero */
1713 if (nb_tx_desc == 0) {
1714 nb_tx_desc = dev_info.default_txportconf.ring_size;
1715 /* If driver default is zero, fall back on EAL default */
1716 if (nb_tx_desc == 0)
1717 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1719 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1720 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1721 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1723 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1724 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1725 dev_info.tx_desc_lim.nb_min,
1726 dev_info.tx_desc_lim.nb_align);
1730 if (dev->data->dev_started &&
1731 !(dev_info.dev_capa &
1732 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1735 if (dev->data->dev_started &&
1736 (dev->data->tx_queue_state[tx_queue_id] !=
1737 RTE_ETH_QUEUE_STATE_STOPPED))
1740 txq = dev->data->tx_queues;
1741 if (txq[tx_queue_id]) {
1742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1744 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1745 txq[tx_queue_id] = NULL;
1748 if (tx_conf == NULL)
1749 tx_conf = &dev_info.default_txconf;
1751 local_conf = *tx_conf;
1754 * If an offloading has already been enabled in
1755 * rte_eth_dev_configure(), it has been enabled on all queues,
1756 * so there is no need to enable it in this queue again.
1757 * The local_conf.offloads input to underlying PMD only carries
1758 * those offloadings which are only enabled on this queue and
1759 * not enabled on all queues.
1761 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1764 * New added offloadings for this queue are those not enabled in
1765 * rte_eth_dev_configure() and they must be per-queue type.
1766 * A pure per-port offloading can't be enabled on a queue while
1767 * disabled on another queue. A pure per-port offloading can't
1768 * be enabled for any queue as new added one if it hasn't been
1769 * enabled in rte_eth_dev_configure().
1771 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1772 local_conf.offloads) {
1774 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1775 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1776 port_id, tx_queue_id, local_conf.offloads,
1777 dev_info.tx_queue_offload_capa,
1782 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1783 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1787 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1788 void *userdata __rte_unused)
1792 for (i = 0; i < unsent; i++)
1793 rte_pktmbuf_free(pkts[i]);
1797 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1800 uint64_t *count = userdata;
1803 for (i = 0; i < unsent; i++)
1804 rte_pktmbuf_free(pkts[i]);
1810 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1811 buffer_tx_error_fn cbfn, void *userdata)
1813 buffer->error_callback = cbfn;
1814 buffer->error_userdata = userdata;
1819 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1826 buffer->size = size;
1827 if (buffer->error_callback == NULL) {
1828 ret = rte_eth_tx_buffer_set_err_callback(
1829 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1836 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1838 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1841 /* Validate Input Data. Bail if not valid or not supported. */
1842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1845 /* Call driver to free pending mbufs. */
1846 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1848 return eth_err(port_id, ret);
1852 rte_eth_promiscuous_enable(uint16_t port_id)
1854 struct rte_eth_dev *dev;
1856 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1857 dev = &rte_eth_devices[port_id];
1859 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1860 (*dev->dev_ops->promiscuous_enable)(dev);
1861 dev->data->promiscuous = 1;
1865 rte_eth_promiscuous_disable(uint16_t port_id)
1867 struct rte_eth_dev *dev;
1869 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1870 dev = &rte_eth_devices[port_id];
1872 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1873 dev->data->promiscuous = 0;
1874 (*dev->dev_ops->promiscuous_disable)(dev);
1878 rte_eth_promiscuous_get(uint16_t port_id)
1880 struct rte_eth_dev *dev;
1882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1884 dev = &rte_eth_devices[port_id];
1885 return dev->data->promiscuous;
1889 rte_eth_allmulticast_enable(uint16_t port_id)
1891 struct rte_eth_dev *dev;
1893 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1894 dev = &rte_eth_devices[port_id];
1896 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1897 (*dev->dev_ops->allmulticast_enable)(dev);
1898 dev->data->all_multicast = 1;
1902 rte_eth_allmulticast_disable(uint16_t port_id)
1904 struct rte_eth_dev *dev;
1906 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1907 dev = &rte_eth_devices[port_id];
1909 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1910 dev->data->all_multicast = 0;
1911 (*dev->dev_ops->allmulticast_disable)(dev);
1915 rte_eth_allmulticast_get(uint16_t port_id)
1917 struct rte_eth_dev *dev;
1919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1921 dev = &rte_eth_devices[port_id];
1922 return dev->data->all_multicast;
1926 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1928 struct rte_eth_dev *dev;
1930 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1931 dev = &rte_eth_devices[port_id];
1933 if (dev->data->dev_conf.intr_conf.lsc &&
1934 dev->data->dev_started)
1935 rte_eth_linkstatus_get(dev, eth_link);
1937 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1938 (*dev->dev_ops->link_update)(dev, 1);
1939 *eth_link = dev->data->dev_link;
1944 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1946 struct rte_eth_dev *dev;
1948 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1949 dev = &rte_eth_devices[port_id];
1951 if (dev->data->dev_conf.intr_conf.lsc &&
1952 dev->data->dev_started)
1953 rte_eth_linkstatus_get(dev, eth_link);
1955 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1956 (*dev->dev_ops->link_update)(dev, 0);
1957 *eth_link = dev->data->dev_link;
1962 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1964 struct rte_eth_dev *dev;
1966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1968 dev = &rte_eth_devices[port_id];
1969 memset(stats, 0, sizeof(*stats));
1971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1972 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1973 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1977 rte_eth_stats_reset(uint16_t port_id)
1979 struct rte_eth_dev *dev;
1981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1982 dev = &rte_eth_devices[port_id];
1984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1985 (*dev->dev_ops->stats_reset)(dev);
1986 dev->data->rx_mbuf_alloc_failed = 0;
1992 get_xstats_basic_count(struct rte_eth_dev *dev)
1994 uint16_t nb_rxqs, nb_txqs;
1997 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1998 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2000 count = RTE_NB_STATS;
2001 count += nb_rxqs * RTE_NB_RXQ_STATS;
2002 count += nb_txqs * RTE_NB_TXQ_STATS;
2008 get_xstats_count(uint16_t port_id)
2010 struct rte_eth_dev *dev;
2013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2014 dev = &rte_eth_devices[port_id];
2015 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2016 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2019 return eth_err(port_id, count);
2021 if (dev->dev_ops->xstats_get_names != NULL) {
2022 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2024 return eth_err(port_id, count);
2029 count += get_xstats_basic_count(dev);
2035 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2038 int cnt_xstats, idx_xstat;
2040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2043 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2048 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2053 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2054 if (cnt_xstats < 0) {
2055 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2059 /* Get id-name lookup table */
2060 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2062 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2063 port_id, xstats_names, cnt_xstats, NULL)) {
2064 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2068 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2069 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2078 /* retrieve basic stats names */
2080 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2081 struct rte_eth_xstat_name *xstats_names)
2083 int cnt_used_entries = 0;
2084 uint32_t idx, id_queue;
2087 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2088 strlcpy(xstats_names[cnt_used_entries].name,
2089 rte_stats_strings[idx].name,
2090 sizeof(xstats_names[0].name));
2093 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2094 for (id_queue = 0; id_queue < num_q; id_queue++) {
2095 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2096 snprintf(xstats_names[cnt_used_entries].name,
2097 sizeof(xstats_names[0].name),
2099 id_queue, rte_rxq_stats_strings[idx].name);
2104 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2105 for (id_queue = 0; id_queue < num_q; id_queue++) {
2106 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2107 snprintf(xstats_names[cnt_used_entries].name,
2108 sizeof(xstats_names[0].name),
2110 id_queue, rte_txq_stats_strings[idx].name);
2114 return cnt_used_entries;
2117 /* retrieve ethdev extended statistics names */
2119 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2120 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2123 struct rte_eth_xstat_name *xstats_names_copy;
2124 unsigned int no_basic_stat_requested = 1;
2125 unsigned int no_ext_stat_requested = 1;
2126 unsigned int expected_entries;
2127 unsigned int basic_count;
2128 struct rte_eth_dev *dev;
2132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2133 dev = &rte_eth_devices[port_id];
2135 basic_count = get_xstats_basic_count(dev);
2136 ret = get_xstats_count(port_id);
2139 expected_entries = (unsigned int)ret;
2141 /* Return max number of stats if no ids given */
2144 return expected_entries;
2145 else if (xstats_names && size < expected_entries)
2146 return expected_entries;
2149 if (ids && !xstats_names)
2152 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2153 uint64_t ids_copy[size];
2155 for (i = 0; i < size; i++) {
2156 if (ids[i] < basic_count) {
2157 no_basic_stat_requested = 0;
2162 * Convert ids to xstats ids that PMD knows.
2163 * ids known by user are basic + extended stats.
2165 ids_copy[i] = ids[i] - basic_count;
2168 if (no_basic_stat_requested)
2169 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2170 xstats_names, ids_copy, size);
2173 /* Retrieve all stats */
2175 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2177 if (num_stats < 0 || num_stats > (int)expected_entries)
2180 return expected_entries;
2183 xstats_names_copy = calloc(expected_entries,
2184 sizeof(struct rte_eth_xstat_name));
2186 if (!xstats_names_copy) {
2187 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2192 for (i = 0; i < size; i++) {
2193 if (ids[i] >= basic_count) {
2194 no_ext_stat_requested = 0;
2200 /* Fill xstats_names_copy structure */
2201 if (ids && no_ext_stat_requested) {
2202 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2204 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2207 free(xstats_names_copy);
2213 for (i = 0; i < size; i++) {
2214 if (ids[i] >= expected_entries) {
2215 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2216 free(xstats_names_copy);
2219 xstats_names[i] = xstats_names_copy[ids[i]];
2222 free(xstats_names_copy);
2227 rte_eth_xstats_get_names(uint16_t port_id,
2228 struct rte_eth_xstat_name *xstats_names,
2231 struct rte_eth_dev *dev;
2232 int cnt_used_entries;
2233 int cnt_expected_entries;
2234 int cnt_driver_entries;
2236 cnt_expected_entries = get_xstats_count(port_id);
2237 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2238 (int)size < cnt_expected_entries)
2239 return cnt_expected_entries;
2241 /* port_id checked in get_xstats_count() */
2242 dev = &rte_eth_devices[port_id];
2244 cnt_used_entries = rte_eth_basic_stats_get_names(
2247 if (dev->dev_ops->xstats_get_names != NULL) {
2248 /* If there are any driver-specific xstats, append them
2251 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2253 xstats_names + cnt_used_entries,
2254 size - cnt_used_entries);
2255 if (cnt_driver_entries < 0)
2256 return eth_err(port_id, cnt_driver_entries);
2257 cnt_used_entries += cnt_driver_entries;
2260 return cnt_used_entries;
2265 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2267 struct rte_eth_dev *dev;
2268 struct rte_eth_stats eth_stats;
2269 unsigned int count = 0, i, q;
2270 uint64_t val, *stats_ptr;
2271 uint16_t nb_rxqs, nb_txqs;
2274 ret = rte_eth_stats_get(port_id, ð_stats);
2278 dev = &rte_eth_devices[port_id];
2280 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2281 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2284 for (i = 0; i < RTE_NB_STATS; i++) {
2285 stats_ptr = RTE_PTR_ADD(ð_stats,
2286 rte_stats_strings[i].offset);
2288 xstats[count++].value = val;
2292 for (q = 0; q < nb_rxqs; q++) {
2293 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2294 stats_ptr = RTE_PTR_ADD(ð_stats,
2295 rte_rxq_stats_strings[i].offset +
2296 q * sizeof(uint64_t));
2298 xstats[count++].value = val;
2303 for (q = 0; q < nb_txqs; q++) {
2304 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2305 stats_ptr = RTE_PTR_ADD(ð_stats,
2306 rte_txq_stats_strings[i].offset +
2307 q * sizeof(uint64_t));
2309 xstats[count++].value = val;
2315 /* retrieve ethdev extended statistics */
2317 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2318 uint64_t *values, unsigned int size)
2320 unsigned int no_basic_stat_requested = 1;
2321 unsigned int no_ext_stat_requested = 1;
2322 unsigned int num_xstats_filled;
2323 unsigned int basic_count;
2324 uint16_t expected_entries;
2325 struct rte_eth_dev *dev;
2329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2330 ret = get_xstats_count(port_id);
2333 expected_entries = (uint16_t)ret;
2334 struct rte_eth_xstat xstats[expected_entries];
2335 dev = &rte_eth_devices[port_id];
2336 basic_count = get_xstats_basic_count(dev);
2338 /* Return max number of stats if no ids given */
2341 return expected_entries;
2342 else if (values && size < expected_entries)
2343 return expected_entries;
2349 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2350 unsigned int basic_count = get_xstats_basic_count(dev);
2351 uint64_t ids_copy[size];
2353 for (i = 0; i < size; i++) {
2354 if (ids[i] < basic_count) {
2355 no_basic_stat_requested = 0;
2360 * Convert ids to xstats ids that PMD knows.
2361 * ids known by user are basic + extended stats.
2363 ids_copy[i] = ids[i] - basic_count;
2366 if (no_basic_stat_requested)
2367 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2372 for (i = 0; i < size; i++) {
2373 if (ids[i] >= basic_count) {
2374 no_ext_stat_requested = 0;
2380 /* Fill the xstats structure */
2381 if (ids && no_ext_stat_requested)
2382 ret = rte_eth_basic_stats_get(port_id, xstats);
2384 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2388 num_xstats_filled = (unsigned int)ret;
2390 /* Return all stats */
2392 for (i = 0; i < num_xstats_filled; i++)
2393 values[i] = xstats[i].value;
2394 return expected_entries;
2398 for (i = 0; i < size; i++) {
2399 if (ids[i] >= expected_entries) {
2400 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2403 values[i] = xstats[ids[i]].value;
2409 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2412 struct rte_eth_dev *dev;
2413 unsigned int count = 0, i;
2414 signed int xcount = 0;
2415 uint16_t nb_rxqs, nb_txqs;
2418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2420 dev = &rte_eth_devices[port_id];
2422 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2423 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2425 /* Return generic statistics */
2426 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2427 (nb_txqs * RTE_NB_TXQ_STATS);
2429 /* implemented by the driver */
2430 if (dev->dev_ops->xstats_get != NULL) {
2431 /* Retrieve the xstats from the driver at the end of the
2434 xcount = (*dev->dev_ops->xstats_get)(dev,
2435 xstats ? xstats + count : NULL,
2436 (n > count) ? n - count : 0);
2439 return eth_err(port_id, xcount);
2442 if (n < count + xcount || xstats == NULL)
2443 return count + xcount;
2445 /* now fill the xstats structure */
2446 ret = rte_eth_basic_stats_get(port_id, xstats);
2451 for (i = 0; i < count; i++)
2453 /* add an offset to driver-specific stats */
2454 for ( ; i < count + xcount; i++)
2455 xstats[i].id += count;
2457 return count + xcount;
2460 /* reset ethdev extended statistics */
2462 rte_eth_xstats_reset(uint16_t port_id)
2464 struct rte_eth_dev *dev;
2466 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2467 dev = &rte_eth_devices[port_id];
2469 /* implemented by the driver */
2470 if (dev->dev_ops->xstats_reset != NULL) {
2471 (*dev->dev_ops->xstats_reset)(dev);
2475 /* fallback to default */
2476 rte_eth_stats_reset(port_id);
2480 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2483 struct rte_eth_dev *dev;
2485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2487 dev = &rte_eth_devices[port_id];
2489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2491 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2494 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2497 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2500 return (*dev->dev_ops->queue_stats_mapping_set)
2501 (dev, queue_id, stat_idx, is_rx);
2506 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2509 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2510 stat_idx, STAT_QMAP_TX));
2515 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2518 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2519 stat_idx, STAT_QMAP_RX));
2523 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2525 struct rte_eth_dev *dev;
2527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2528 dev = &rte_eth_devices[port_id];
2530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2531 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2532 fw_version, fw_size));
2536 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2538 struct rte_eth_dev *dev;
2539 const struct rte_eth_desc_lim lim = {
2540 .nb_max = UINT16_MAX,
2545 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2546 dev = &rte_eth_devices[port_id];
2548 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2549 dev_info->rx_desc_lim = lim;
2550 dev_info->tx_desc_lim = lim;
2551 dev_info->device = dev->device;
2552 dev_info->min_mtu = ETHER_MIN_MTU;
2553 dev_info->max_mtu = UINT16_MAX;
2555 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2556 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2557 dev_info->driver_name = dev->device->driver->name;
2558 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2559 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2561 dev_info->dev_flags = &dev->data->dev_flags;
2565 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2566 uint32_t *ptypes, int num)
2569 struct rte_eth_dev *dev;
2570 const uint32_t *all_ptypes;
2572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2573 dev = &rte_eth_devices[port_id];
2574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2575 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2580 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2581 if (all_ptypes[i] & ptype_mask) {
2583 ptypes[j] = all_ptypes[i];
2591 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2593 struct rte_eth_dev *dev;
2595 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2596 dev = &rte_eth_devices[port_id];
2597 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2602 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2604 struct rte_eth_dev *dev;
2606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2608 dev = &rte_eth_devices[port_id];
2609 *mtu = dev->data->mtu;
2614 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2617 struct rte_eth_dev_info dev_info;
2618 struct rte_eth_dev *dev;
2620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2621 dev = &rte_eth_devices[port_id];
2622 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2625 * Check if the device supports dev_infos_get, if it does not
2626 * skip min_mtu/max_mtu validation here as this requires values
2627 * that are populated within the call to rte_eth_dev_info_get()
2628 * which relies on dev->dev_ops->dev_infos_get.
2630 if (*dev->dev_ops->dev_infos_get != NULL) {
2631 rte_eth_dev_info_get(port_id, &dev_info);
2632 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2636 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2638 dev->data->mtu = mtu;
2640 return eth_err(port_id, ret);
2644 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2646 struct rte_eth_dev *dev;
2649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2650 dev = &rte_eth_devices[port_id];
2651 if (!(dev->data->dev_conf.rxmode.offloads &
2652 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2653 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2658 if (vlan_id > 4095) {
2659 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2665 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2667 struct rte_vlan_filter_conf *vfc;
2671 vfc = &dev->data->vlan_filter_conf;
2672 vidx = vlan_id / 64;
2673 vbit = vlan_id % 64;
2676 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2678 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2681 return eth_err(port_id, ret);
2685 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2688 struct rte_eth_dev *dev;
2690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2691 dev = &rte_eth_devices[port_id];
2692 if (rx_queue_id >= dev->data->nb_rx_queues) {
2693 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2698 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2704 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2705 enum rte_vlan_type vlan_type,
2708 struct rte_eth_dev *dev;
2710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2711 dev = &rte_eth_devices[port_id];
2712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2714 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2719 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2721 struct rte_eth_dev *dev;
2725 uint64_t orig_offloads;
2727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2728 dev = &rte_eth_devices[port_id];
2730 /* save original values in case of failure */
2731 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2733 /*check which option changed by application*/
2734 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2735 org = !!(dev->data->dev_conf.rxmode.offloads &
2736 DEV_RX_OFFLOAD_VLAN_STRIP);
2739 dev->data->dev_conf.rxmode.offloads |=
2740 DEV_RX_OFFLOAD_VLAN_STRIP;
2742 dev->data->dev_conf.rxmode.offloads &=
2743 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2744 mask |= ETH_VLAN_STRIP_MASK;
2747 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2748 org = !!(dev->data->dev_conf.rxmode.offloads &
2749 DEV_RX_OFFLOAD_VLAN_FILTER);
2752 dev->data->dev_conf.rxmode.offloads |=
2753 DEV_RX_OFFLOAD_VLAN_FILTER;
2755 dev->data->dev_conf.rxmode.offloads &=
2756 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2757 mask |= ETH_VLAN_FILTER_MASK;
2760 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2761 org = !!(dev->data->dev_conf.rxmode.offloads &
2762 DEV_RX_OFFLOAD_VLAN_EXTEND);
2765 dev->data->dev_conf.rxmode.offloads |=
2766 DEV_RX_OFFLOAD_VLAN_EXTEND;
2768 dev->data->dev_conf.rxmode.offloads &=
2769 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2770 mask |= ETH_VLAN_EXTEND_MASK;
2777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2778 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2780 /* hit an error restore original values */
2781 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2784 return eth_err(port_id, ret);
2788 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2790 struct rte_eth_dev *dev;
2793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 dev = &rte_eth_devices[port_id];
2796 if (dev->data->dev_conf.rxmode.offloads &
2797 DEV_RX_OFFLOAD_VLAN_STRIP)
2798 ret |= ETH_VLAN_STRIP_OFFLOAD;
2800 if (dev->data->dev_conf.rxmode.offloads &
2801 DEV_RX_OFFLOAD_VLAN_FILTER)
2802 ret |= ETH_VLAN_FILTER_OFFLOAD;
2804 if (dev->data->dev_conf.rxmode.offloads &
2805 DEV_RX_OFFLOAD_VLAN_EXTEND)
2806 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2812 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2814 struct rte_eth_dev *dev;
2816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2817 dev = &rte_eth_devices[port_id];
2818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2820 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2824 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2826 struct rte_eth_dev *dev;
2828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2829 dev = &rte_eth_devices[port_id];
2830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2831 memset(fc_conf, 0, sizeof(*fc_conf));
2832 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2836 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2838 struct rte_eth_dev *dev;
2840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2841 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2842 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2846 dev = &rte_eth_devices[port_id];
2847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2848 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2852 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2853 struct rte_eth_pfc_conf *pfc_conf)
2855 struct rte_eth_dev *dev;
2857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2858 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2859 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2863 dev = &rte_eth_devices[port_id];
2864 /* High water, low water validation are device specific */
2865 if (*dev->dev_ops->priority_flow_ctrl_set)
2866 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2872 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2880 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2881 for (i = 0; i < num; i++) {
2882 if (reta_conf[i].mask)
2890 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2894 uint16_t i, idx, shift;
2900 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2904 for (i = 0; i < reta_size; i++) {
2905 idx = i / RTE_RETA_GROUP_SIZE;
2906 shift = i % RTE_RETA_GROUP_SIZE;
2907 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2908 (reta_conf[idx].reta[shift] >= max_rxq)) {
2910 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2912 reta_conf[idx].reta[shift], max_rxq);
2921 rte_eth_dev_rss_reta_update(uint16_t port_id,
2922 struct rte_eth_rss_reta_entry64 *reta_conf,
2925 struct rte_eth_dev *dev;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929 /* Check mask bits */
2930 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2934 dev = &rte_eth_devices[port_id];
2936 /* Check entry value */
2937 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2938 dev->data->nb_rx_queues);
2942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2943 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2948 rte_eth_dev_rss_reta_query(uint16_t port_id,
2949 struct rte_eth_rss_reta_entry64 *reta_conf,
2952 struct rte_eth_dev *dev;
2955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 /* Check mask bits */
2958 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2962 dev = &rte_eth_devices[port_id];
2963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2964 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2969 rte_eth_dev_rss_hash_update(uint16_t port_id,
2970 struct rte_eth_rss_conf *rss_conf)
2972 struct rte_eth_dev *dev;
2973 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2976 dev = &rte_eth_devices[port_id];
2977 rte_eth_dev_info_get(port_id, &dev_info);
2978 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2979 dev_info.flow_type_rss_offloads) {
2981 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2982 port_id, rss_conf->rss_hf,
2983 dev_info.flow_type_rss_offloads);
2986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2987 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2992 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2993 struct rte_eth_rss_conf *rss_conf)
2995 struct rte_eth_dev *dev;
2997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2998 dev = &rte_eth_devices[port_id];
2999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3000 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3005 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3006 struct rte_eth_udp_tunnel *udp_tunnel)
3008 struct rte_eth_dev *dev;
3010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3011 if (udp_tunnel == NULL) {
3012 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3016 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3017 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3021 dev = &rte_eth_devices[port_id];
3022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3023 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3028 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3029 struct rte_eth_udp_tunnel *udp_tunnel)
3031 struct rte_eth_dev *dev;
3033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3034 dev = &rte_eth_devices[port_id];
3036 if (udp_tunnel == NULL) {
3037 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3041 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3042 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3046 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3047 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3052 rte_eth_led_on(uint16_t port_id)
3054 struct rte_eth_dev *dev;
3056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3057 dev = &rte_eth_devices[port_id];
3058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3059 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3063 rte_eth_led_off(uint16_t port_id)
3065 struct rte_eth_dev *dev;
3067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3068 dev = &rte_eth_devices[port_id];
3069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3070 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3074 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3078 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3080 struct rte_eth_dev_info dev_info;
3081 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3085 rte_eth_dev_info_get(port_id, &dev_info);
3087 for (i = 0; i < dev_info.max_mac_addrs; i++)
3088 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3094 static const struct ether_addr null_mac_addr;
3097 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3100 struct rte_eth_dev *dev;
3105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3106 dev = &rte_eth_devices[port_id];
3107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3109 if (is_zero_ether_addr(addr)) {
3110 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3114 if (pool >= ETH_64_POOLS) {
3115 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3119 index = get_mac_addr_index(port_id, addr);
3121 index = get_mac_addr_index(port_id, &null_mac_addr);
3123 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3128 pool_mask = dev->data->mac_pool_sel[index];
3130 /* Check if both MAC address and pool is already there, and do nothing */
3131 if (pool_mask & (1ULL << pool))
3136 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3139 /* Update address in NIC data structure */
3140 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3142 /* Update pool bitmap in NIC data structure */
3143 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3146 return eth_err(port_id, ret);
3150 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3152 struct rte_eth_dev *dev;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3159 index = get_mac_addr_index(port_id, addr);
3162 "Port %u: Cannot remove default MAC address\n",
3165 } else if (index < 0)
3166 return 0; /* Do nothing if address wasn't found */
3169 (*dev->dev_ops->mac_addr_remove)(dev, index);
3171 /* Update address in NIC data structure */
3172 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3174 /* reset pool bitmap */
3175 dev->data->mac_pool_sel[index] = 0;
3181 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3183 struct rte_eth_dev *dev;
3186 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3188 if (!is_valid_assigned_ether_addr(addr))
3191 dev = &rte_eth_devices[port_id];
3192 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3194 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3198 /* Update default address in NIC data structure */
3199 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3206 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3210 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3212 struct rte_eth_dev_info dev_info;
3213 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3216 rte_eth_dev_info_get(port_id, &dev_info);
3217 if (!dev->data->hash_mac_addrs)
3220 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3221 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3222 ETHER_ADDR_LEN) == 0)
3229 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3234 struct rte_eth_dev *dev;
3236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3238 dev = &rte_eth_devices[port_id];
3239 if (is_zero_ether_addr(addr)) {
3240 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3245 index = get_hash_mac_addr_index(port_id, addr);
3246 /* Check if it's already there, and do nothing */
3247 if ((index >= 0) && on)
3253 "Port %u: the MAC address was not set in UTA\n",
3258 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3260 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3267 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3269 /* Update address in NIC data structure */
3271 ether_addr_copy(addr,
3272 &dev->data->hash_mac_addrs[index]);
3274 ether_addr_copy(&null_mac_addr,
3275 &dev->data->hash_mac_addrs[index]);
3278 return eth_err(port_id, ret);
3282 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3284 struct rte_eth_dev *dev;
3286 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3288 dev = &rte_eth_devices[port_id];
3290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3291 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3295 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3298 struct rte_eth_dev *dev;
3299 struct rte_eth_dev_info dev_info;
3300 struct rte_eth_link link;
3302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3304 dev = &rte_eth_devices[port_id];
3305 rte_eth_dev_info_get(port_id, &dev_info);
3306 link = dev->data->dev_link;
3308 if (queue_idx > dev_info.max_tx_queues) {
3310 "Set queue rate limit:port %u: invalid queue id=%u\n",
3311 port_id, queue_idx);
3315 if (tx_rate > link.link_speed) {
3317 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3318 tx_rate, link.link_speed);
3322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3323 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3324 queue_idx, tx_rate));
3328 rte_eth_mirror_rule_set(uint16_t port_id,
3329 struct rte_eth_mirror_conf *mirror_conf,
3330 uint8_t rule_id, uint8_t on)
3332 struct rte_eth_dev *dev;
3334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3335 if (mirror_conf->rule_type == 0) {
3336 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3340 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3341 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3346 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3347 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3348 (mirror_conf->pool_mask == 0)) {
3350 "Invalid mirror pool, pool mask can not be 0\n");
3354 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3355 mirror_conf->vlan.vlan_mask == 0) {
3357 "Invalid vlan mask, vlan mask can not be 0\n");
3361 dev = &rte_eth_devices[port_id];
3362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3364 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3365 mirror_conf, rule_id, on));
3369 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3371 struct rte_eth_dev *dev;
3373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3375 dev = &rte_eth_devices[port_id];
3376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3378 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3382 RTE_INIT(eth_dev_init_cb_lists)
3386 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3387 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3391 rte_eth_dev_callback_register(uint16_t port_id,
3392 enum rte_eth_event_type event,
3393 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3395 struct rte_eth_dev *dev;
3396 struct rte_eth_dev_callback *user_cb;
3397 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3403 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3404 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3408 if (port_id == RTE_ETH_ALL) {
3410 last_port = RTE_MAX_ETHPORTS - 1;
3412 next_port = last_port = port_id;
3415 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3418 dev = &rte_eth_devices[next_port];
3420 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3421 if (user_cb->cb_fn == cb_fn &&
3422 user_cb->cb_arg == cb_arg &&
3423 user_cb->event == event) {
3428 /* create a new callback. */
3429 if (user_cb == NULL) {
3430 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3431 sizeof(struct rte_eth_dev_callback), 0);
3432 if (user_cb != NULL) {
3433 user_cb->cb_fn = cb_fn;
3434 user_cb->cb_arg = cb_arg;
3435 user_cb->event = event;
3436 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3439 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3440 rte_eth_dev_callback_unregister(port_id, event,
3446 } while (++next_port <= last_port);
3448 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3453 rte_eth_dev_callback_unregister(uint16_t port_id,
3454 enum rte_eth_event_type event,
3455 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3458 struct rte_eth_dev *dev;
3459 struct rte_eth_dev_callback *cb, *next;
3460 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3466 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3467 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3471 if (port_id == RTE_ETH_ALL) {
3473 last_port = RTE_MAX_ETHPORTS - 1;
3475 next_port = last_port = port_id;
3478 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3481 dev = &rte_eth_devices[next_port];
3483 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3486 next = TAILQ_NEXT(cb, next);
3488 if (cb->cb_fn != cb_fn || cb->event != event ||
3489 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3493 * if this callback is not executing right now,
3496 if (cb->active == 0) {
3497 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3503 } while (++next_port <= last_port);
3505 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3510 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3511 enum rte_eth_event_type event, void *ret_param)
3513 struct rte_eth_dev_callback *cb_lst;
3514 struct rte_eth_dev_callback dev_cb;
3517 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3518 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3519 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3523 if (ret_param != NULL)
3524 dev_cb.ret_param = ret_param;
3526 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3527 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3528 dev_cb.cb_arg, dev_cb.ret_param);
3529 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3532 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3537 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3542 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3544 dev->state = RTE_ETH_DEV_ATTACHED;
3548 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3551 struct rte_eth_dev *dev;
3552 struct rte_intr_handle *intr_handle;
3556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3558 dev = &rte_eth_devices[port_id];
3560 if (!dev->intr_handle) {
3561 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3565 intr_handle = dev->intr_handle;
3566 if (!intr_handle->intr_vec) {
3567 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3571 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3572 vec = intr_handle->intr_vec[qid];
3573 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3574 if (rc && rc != -EEXIST) {
3576 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3577 port_id, qid, op, epfd, vec);
3584 int __rte_experimental
3585 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3587 struct rte_intr_handle *intr_handle;
3588 struct rte_eth_dev *dev;
3589 unsigned int efd_idx;
3593 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3595 dev = &rte_eth_devices[port_id];
3597 if (queue_id >= dev->data->nb_rx_queues) {
3598 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3602 if (!dev->intr_handle) {
3603 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3607 intr_handle = dev->intr_handle;
3608 if (!intr_handle->intr_vec) {
3609 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3613 vec = intr_handle->intr_vec[queue_id];
3614 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3615 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3616 fd = intr_handle->efds[efd_idx];
3621 const struct rte_memzone *
3622 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3623 uint16_t queue_id, size_t size, unsigned align,
3626 char z_name[RTE_MEMZONE_NAMESIZE];
3627 const struct rte_memzone *mz;
3630 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3631 dev->data->port_id, queue_id, ring_name);
3632 if (rc >= RTE_MEMZONE_NAMESIZE) {
3633 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3634 rte_errno = ENAMETOOLONG;
3638 mz = rte_memzone_lookup(z_name);
3642 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3643 RTE_MEMZONE_IOVA_CONTIG, align);
3646 int __rte_experimental
3647 rte_eth_dev_create(struct rte_device *device, const char *name,
3648 size_t priv_data_size,
3649 ethdev_bus_specific_init ethdev_bus_specific_init,
3650 void *bus_init_params,
3651 ethdev_init_t ethdev_init, void *init_params)
3653 struct rte_eth_dev *ethdev;
3656 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3658 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3659 ethdev = rte_eth_dev_allocate(name);
3663 if (priv_data_size) {
3664 ethdev->data->dev_private = rte_zmalloc_socket(
3665 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3668 if (!ethdev->data->dev_private) {
3669 RTE_LOG(ERR, EAL, "failed to allocate private data");
3675 ethdev = rte_eth_dev_attach_secondary(name);
3677 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3678 "ethdev doesn't exist");
3683 ethdev->device = device;
3685 if (ethdev_bus_specific_init) {
3686 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3689 "ethdev bus specific initialisation failed");
3694 retval = ethdev_init(ethdev, init_params);
3696 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3700 rte_eth_dev_probing_finish(ethdev);
3705 rte_eth_dev_release_port(ethdev);
3709 int __rte_experimental
3710 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3711 ethdev_uninit_t ethdev_uninit)
3715 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3719 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3721 ret = ethdev_uninit(ethdev);
3725 return rte_eth_dev_release_port(ethdev);
3729 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3730 int epfd, int op, void *data)
3733 struct rte_eth_dev *dev;
3734 struct rte_intr_handle *intr_handle;
3737 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3739 dev = &rte_eth_devices[port_id];
3740 if (queue_id >= dev->data->nb_rx_queues) {
3741 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3745 if (!dev->intr_handle) {
3746 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3750 intr_handle = dev->intr_handle;
3751 if (!intr_handle->intr_vec) {
3752 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3756 vec = intr_handle->intr_vec[queue_id];
3757 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3758 if (rc && rc != -EEXIST) {
3760 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3761 port_id, queue_id, op, epfd, vec);
3769 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3772 struct rte_eth_dev *dev;
3774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3776 dev = &rte_eth_devices[port_id];
3778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3779 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3784 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3787 struct rte_eth_dev *dev;
3789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3791 dev = &rte_eth_devices[port_id];
3793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3794 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3800 rte_eth_dev_filter_supported(uint16_t port_id,
3801 enum rte_filter_type filter_type)
3803 struct rte_eth_dev *dev;
3805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3807 dev = &rte_eth_devices[port_id];
3808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3809 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3810 RTE_ETH_FILTER_NOP, NULL);
3814 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3815 enum rte_filter_op filter_op, void *arg)
3817 struct rte_eth_dev *dev;
3819 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3821 dev = &rte_eth_devices[port_id];
3822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3823 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3827 const struct rte_eth_rxtx_callback *
3828 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3829 rte_rx_callback_fn fn, void *user_param)
3831 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3832 rte_errno = ENOTSUP;
3835 /* check input parameters */
3836 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3837 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3841 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3849 cb->param = user_param;
3851 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3852 /* Add the callbacks in fifo order. */
3853 struct rte_eth_rxtx_callback *tail =
3854 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3857 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3864 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3869 const struct rte_eth_rxtx_callback *
3870 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3871 rte_rx_callback_fn fn, void *user_param)
3873 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3874 rte_errno = ENOTSUP;
3877 /* check input parameters */
3878 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3879 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3884 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3892 cb->param = user_param;
3894 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3895 /* Add the callbacks at fisrt position*/
3896 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3898 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3899 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3904 const struct rte_eth_rxtx_callback *
3905 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3906 rte_tx_callback_fn fn, void *user_param)
3908 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3909 rte_errno = ENOTSUP;
3912 /* check input parameters */
3913 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3914 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3919 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3927 cb->param = user_param;
3929 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3930 /* Add the callbacks in fifo order. */
3931 struct rte_eth_rxtx_callback *tail =
3932 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3935 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3942 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3948 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3949 const struct rte_eth_rxtx_callback *user_cb)
3951 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3954 /* Check input parameters. */
3955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3956 if (user_cb == NULL ||
3957 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3960 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3961 struct rte_eth_rxtx_callback *cb;
3962 struct rte_eth_rxtx_callback **prev_cb;
3965 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3966 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3967 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3969 if (cb == user_cb) {
3970 /* Remove the user cb from the callback list. */
3971 *prev_cb = cb->next;
3976 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3982 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3983 const struct rte_eth_rxtx_callback *user_cb)
3985 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3988 /* Check input parameters. */
3989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3990 if (user_cb == NULL ||
3991 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3994 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3996 struct rte_eth_rxtx_callback *cb;
3997 struct rte_eth_rxtx_callback **prev_cb;
3999 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4000 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4001 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4003 if (cb == user_cb) {
4004 /* Remove the user cb from the callback list. */
4005 *prev_cb = cb->next;
4010 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4016 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4017 struct rte_eth_rxq_info *qinfo)
4019 struct rte_eth_dev *dev;
4021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4026 dev = &rte_eth_devices[port_id];
4027 if (queue_id >= dev->data->nb_rx_queues) {
4028 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4034 memset(qinfo, 0, sizeof(*qinfo));
4035 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4040 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4041 struct rte_eth_txq_info *qinfo)
4043 struct rte_eth_dev *dev;
4045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4050 dev = &rte_eth_devices[port_id];
4051 if (queue_id >= dev->data->nb_tx_queues) {
4052 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4058 memset(qinfo, 0, sizeof(*qinfo));
4059 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4065 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4066 struct ether_addr *mc_addr_set,
4067 uint32_t nb_mc_addr)
4069 struct rte_eth_dev *dev;
4071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4073 dev = &rte_eth_devices[port_id];
4074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4075 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4076 mc_addr_set, nb_mc_addr));
4080 rte_eth_timesync_enable(uint16_t port_id)
4082 struct rte_eth_dev *dev;
4084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4085 dev = &rte_eth_devices[port_id];
4087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4088 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4092 rte_eth_timesync_disable(uint16_t port_id)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4097 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4100 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4104 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4107 struct rte_eth_dev *dev;
4109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4110 dev = &rte_eth_devices[port_id];
4112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4113 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4114 (dev, timestamp, flags));
4118 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4119 struct timespec *timestamp)
4121 struct rte_eth_dev *dev;
4123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4124 dev = &rte_eth_devices[port_id];
4126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4127 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4132 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4134 struct rte_eth_dev *dev;
4136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4137 dev = &rte_eth_devices[port_id];
4139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4140 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4145 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4147 struct rte_eth_dev *dev;
4149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4150 dev = &rte_eth_devices[port_id];
4152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4153 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4158 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4160 struct rte_eth_dev *dev;
4162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4163 dev = &rte_eth_devices[port_id];
4165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4166 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4171 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4173 struct rte_eth_dev *dev;
4175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4177 dev = &rte_eth_devices[port_id];
4178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4179 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4183 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4185 struct rte_eth_dev *dev;
4187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4189 dev = &rte_eth_devices[port_id];
4190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4191 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4195 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4197 struct rte_eth_dev *dev;
4199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4201 dev = &rte_eth_devices[port_id];
4202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4203 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4207 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4209 struct rte_eth_dev *dev;
4211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4213 dev = &rte_eth_devices[port_id];
4214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4215 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4218 int __rte_experimental
4219 rte_eth_dev_get_module_info(uint16_t port_id,
4220 struct rte_eth_dev_module_info *modinfo)
4222 struct rte_eth_dev *dev;
4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4226 dev = &rte_eth_devices[port_id];
4227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4228 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4231 int __rte_experimental
4232 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4233 struct rte_dev_eeprom_info *info)
4235 struct rte_eth_dev *dev;
4237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4239 dev = &rte_eth_devices[port_id];
4240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4241 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4245 rte_eth_dev_get_dcb_info(uint16_t port_id,
4246 struct rte_eth_dcb_info *dcb_info)
4248 struct rte_eth_dev *dev;
4250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4252 dev = &rte_eth_devices[port_id];
4253 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4256 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4260 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4261 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4263 struct rte_eth_dev *dev;
4265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4266 if (l2_tunnel == NULL) {
4267 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4271 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4272 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4276 dev = &rte_eth_devices[port_id];
4277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4279 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4284 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4285 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4289 struct rte_eth_dev *dev;
4291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4293 if (l2_tunnel == NULL) {
4294 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4298 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4299 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4304 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4308 dev = &rte_eth_devices[port_id];
4309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4311 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4312 l2_tunnel, mask, en));
4316 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4317 const struct rte_eth_desc_lim *desc_lim)
4319 if (desc_lim->nb_align != 0)
4320 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4322 if (desc_lim->nb_max != 0)
4323 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4325 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4329 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4330 uint16_t *nb_rx_desc,
4331 uint16_t *nb_tx_desc)
4333 struct rte_eth_dev *dev;
4334 struct rte_eth_dev_info dev_info;
4336 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4338 dev = &rte_eth_devices[port_id];
4339 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4341 rte_eth_dev_info_get(port_id, &dev_info);
4343 if (nb_rx_desc != NULL)
4344 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4346 if (nb_tx_desc != NULL)
4347 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4353 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4355 struct rte_eth_dev *dev;
4357 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4362 dev = &rte_eth_devices[port_id];
4364 if (*dev->dev_ops->pool_ops_supported == NULL)
4365 return 1; /* all pools are supported */
4367 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4371 * A set of values to describe the possible states of a switch domain.
4373 enum rte_eth_switch_domain_state {
4374 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4375 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4379 * Array of switch domains available for allocation. Array is sized to
4380 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4381 * ethdev ports in a single process.
4383 static struct rte_eth_dev_switch {
4384 enum rte_eth_switch_domain_state state;
4385 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4387 int __rte_experimental
4388 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4392 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4394 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4395 i < RTE_MAX_ETHPORTS; i++) {
4396 if (rte_eth_switch_domains[i].state ==
4397 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4398 rte_eth_switch_domains[i].state =
4399 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4408 int __rte_experimental
4409 rte_eth_switch_domain_free(uint16_t domain_id)
4411 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4412 domain_id >= RTE_MAX_ETHPORTS)
4415 if (rte_eth_switch_domains[domain_id].state !=
4416 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4419 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4425 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4428 struct rte_kvargs_pair *pair;
4431 arglist->str = strdup(str_in);
4432 if (arglist->str == NULL)
4435 letter = arglist->str;
4438 pair = &arglist->pairs[0];
4441 case 0: /* Initial */
4444 else if (*letter == '\0')
4451 case 1: /* Parsing key */
4452 if (*letter == '=') {
4454 pair->value = letter + 1;
4456 } else if (*letter == ',' || *letter == '\0')
4461 case 2: /* Parsing value */
4464 else if (*letter == ',') {
4467 pair = &arglist->pairs[arglist->count];
4469 } else if (*letter == '\0') {
4472 pair = &arglist->pairs[arglist->count];
4477 case 3: /* Parsing list */
4480 else if (*letter == '\0')
4488 int __rte_experimental
4489 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4491 struct rte_kvargs args;
4492 struct rte_kvargs_pair *pair;
4496 memset(eth_da, 0, sizeof(*eth_da));
4498 result = rte_eth_devargs_tokenise(&args, dargs);
4502 for (i = 0; i < args.count; i++) {
4503 pair = &args.pairs[i];
4504 if (strcmp("representor", pair->key) == 0) {
4505 result = rte_eth_devargs_parse_list(pair->value,
4506 rte_eth_devargs_parse_representor_ports,
4520 RTE_INIT(ethdev_init_log)
4522 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4523 if (rte_eth_dev_logtype >= 0)
4524 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);