1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
159 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
160 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
237 static struct rte_eth_dev *
238 _rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if (rte_eth_devices[i].data != NULL &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_allocated(const char *name)
253 struct rte_eth_dev *ethdev;
255 rte_eth_dev_shared_data_prepare();
257 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
259 ethdev = _rte_eth_dev_allocated(name);
261 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
267 rte_eth_dev_find_free_port(void)
271 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
272 /* Using shared name field to find a free port. */
273 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
274 RTE_ASSERT(rte_eth_devices[i].state ==
279 return RTE_MAX_ETHPORTS;
282 static struct rte_eth_dev *
283 eth_dev_get(uint16_t port_id)
285 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
287 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
289 eth_dev_last_created_port = port_id;
295 rte_eth_dev_allocate(const char *name)
298 struct rte_eth_dev *eth_dev = NULL;
300 rte_eth_dev_shared_data_prepare();
302 /* Synchronize port creation between primary and secondary threads. */
303 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
305 if (_rte_eth_dev_allocated(name) != NULL) {
307 "Ethernet device with name %s already allocated\n",
312 port_id = rte_eth_dev_find_free_port();
313 if (port_id == RTE_MAX_ETHPORTS) {
315 "Reached maximum number of Ethernet ports\n");
319 eth_dev = eth_dev_get(port_id);
320 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
321 eth_dev->data->port_id = port_id;
322 eth_dev->data->mtu = ETHER_MTU;
325 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
331 * Attach to a port already registered by the primary process, which
332 * makes sure that the same device would have the same port id both
333 * in the primary and secondary process.
336 rte_eth_dev_attach_secondary(const char *name)
339 struct rte_eth_dev *eth_dev = NULL;
341 rte_eth_dev_shared_data_prepare();
343 /* Synchronize port attachment to primary port creation and release. */
344 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
346 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
347 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
350 if (i == RTE_MAX_ETHPORTS) {
352 "Device %s is not driven by the primary process\n",
355 eth_dev = eth_dev_get(i);
356 RTE_ASSERT(eth_dev->data->port_id == i);
359 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
364 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
369 rte_eth_dev_shared_data_prepare();
371 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
373 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
375 eth_dev->state = RTE_ETH_DEV_UNUSED;
377 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
379 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
385 rte_eth_dev_is_valid_port(uint16_t port_id)
387 if (port_id >= RTE_MAX_ETHPORTS ||
388 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
395 rte_eth_is_valid_owner_id(uint64_t owner_id)
397 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
398 rte_eth_dev_shared_data->next_owner_id <= owner_id)
404 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
406 while (port_id < RTE_MAX_ETHPORTS &&
407 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
408 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
409 rte_eth_devices[port_id].data->owner.id != owner_id))
412 if (port_id >= RTE_MAX_ETHPORTS)
413 return RTE_MAX_ETHPORTS;
418 int __rte_experimental
419 rte_eth_dev_owner_new(uint64_t *owner_id)
421 rte_eth_dev_shared_data_prepare();
423 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
425 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
427 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
433 const struct rte_eth_dev_owner *new_owner)
435 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
436 struct rte_eth_dev_owner *port_owner;
439 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
440 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
445 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
446 !rte_eth_is_valid_owner_id(old_owner_id)) {
448 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
449 old_owner_id, new_owner->id);
453 port_owner = &rte_eth_devices[port_id].data->owner;
454 if (port_owner->id != old_owner_id) {
456 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
457 port_id, port_owner->name, port_owner->id);
461 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
463 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
464 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
467 port_owner->id = new_owner->id;
469 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
470 port_id, new_owner->name, new_owner->id);
475 int __rte_experimental
476 rte_eth_dev_owner_set(const uint16_t port_id,
477 const struct rte_eth_dev_owner *owner)
481 rte_eth_dev_shared_data_prepare();
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
487 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
491 int __rte_experimental
492 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
494 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
495 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
498 rte_eth_dev_shared_data_prepare();
500 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
502 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
508 void __rte_experimental
509 rte_eth_dev_owner_delete(const uint64_t owner_id)
513 rte_eth_dev_shared_data_prepare();
515 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
517 if (rte_eth_is_valid_owner_id(owner_id)) {
518 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
519 if (rte_eth_devices[port_id].data->owner.id == owner_id)
520 memset(&rte_eth_devices[port_id].data->owner, 0,
521 sizeof(struct rte_eth_dev_owner));
522 RTE_ETHDEV_LOG(NOTICE,
523 "All port owners owned by %016"PRIx64" identifier have removed\n",
527 "Invalid owner id=%016"PRIx64"\n",
531 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
534 int __rte_experimental
535 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
538 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
540 rte_eth_dev_shared_data_prepare();
542 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
544 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
545 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
549 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
552 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
557 rte_eth_dev_socket_id(uint16_t port_id)
559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
560 return rte_eth_devices[port_id].data->numa_node;
564 rte_eth_dev_get_sec_ctx(uint16_t port_id)
566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
567 return rte_eth_devices[port_id].security_ctx;
571 rte_eth_dev_count(void)
573 return rte_eth_dev_count_avail();
577 rte_eth_dev_count_avail(void)
584 RTE_ETH_FOREACH_DEV(p)
590 uint16_t __rte_experimental
591 rte_eth_dev_count_total(void)
593 uint16_t port, count = 0;
595 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
596 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
603 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
610 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
614 /* shouldn't check 'rte_eth_devices[i].data',
615 * because it might be overwritten by VDEV PMD */
616 tmp = rte_eth_dev_shared_data->data[port_id].name;
622 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
627 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
631 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
632 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
633 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
643 eth_err(uint16_t port_id, int ret)
647 if (rte_eth_dev_is_removed(port_id))
652 /* attach the new device, then store port_id of the device */
654 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
656 int current = rte_eth_dev_count_total();
657 struct rte_devargs da;
660 memset(&da, 0, sizeof(da));
662 if ((devargs == NULL) || (port_id == NULL)) {
668 if (rte_devargs_parse(&da, devargs))
671 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
675 /* no point looking at the port count if no port exists */
676 if (!rte_eth_dev_count_total()) {
677 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
682 /* if nothing happened, there is a bug here, since some driver told us
683 * it did attach a device, but did not create a port.
684 * FIXME: race condition in case of plug-out of another device
686 if (current == rte_eth_dev_count_total()) {
691 *port_id = eth_dev_last_created_port;
699 /* detach the device, then store the name of the device */
701 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
703 struct rte_device *dev;
708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
710 dev_flags = rte_eth_devices[port_id].data->dev_flags;
711 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
713 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
717 dev = rte_eth_devices[port_id].device;
721 bus = rte_bus_find_by_device(dev);
725 ret = rte_eal_hotplug_remove(bus->name, dev->name);
729 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
734 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
736 uint16_t old_nb_queues = dev->data->nb_rx_queues;
740 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
741 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
742 sizeof(dev->data->rx_queues[0]) * nb_queues,
743 RTE_CACHE_LINE_SIZE);
744 if (dev->data->rx_queues == NULL) {
745 dev->data->nb_rx_queues = 0;
748 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
751 rxq = dev->data->rx_queues;
753 for (i = nb_queues; i < old_nb_queues; i++)
754 (*dev->dev_ops->rx_queue_release)(rxq[i]);
755 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
756 RTE_CACHE_LINE_SIZE);
759 if (nb_queues > old_nb_queues) {
760 uint16_t new_qs = nb_queues - old_nb_queues;
762 memset(rxq + old_nb_queues, 0,
763 sizeof(rxq[0]) * new_qs);
766 dev->data->rx_queues = rxq;
768 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
771 rxq = dev->data->rx_queues;
773 for (i = nb_queues; i < old_nb_queues; i++)
774 (*dev->dev_ops->rx_queue_release)(rxq[i]);
776 rte_free(dev->data->rx_queues);
777 dev->data->rx_queues = NULL;
779 dev->data->nb_rx_queues = nb_queues;
784 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
786 struct rte_eth_dev *dev;
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
790 dev = &rte_eth_devices[port_id];
791 if (!dev->data->dev_started) {
793 "Port %u must be started before start any queue\n",
798 if (rx_queue_id >= dev->data->nb_rx_queues) {
799 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
805 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
807 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
808 rx_queue_id, port_id);
812 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
818 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
820 struct rte_eth_dev *dev;
822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
824 dev = &rte_eth_devices[port_id];
825 if (rx_queue_id >= dev->data->nb_rx_queues) {
826 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
832 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
834 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
835 rx_queue_id, port_id);
839 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
844 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
846 struct rte_eth_dev *dev;
848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
850 dev = &rte_eth_devices[port_id];
851 if (!dev->data->dev_started) {
853 "Port %u must be started before start any queue\n",
858 if (tx_queue_id >= dev->data->nb_tx_queues) {
859 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
865 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
867 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
868 tx_queue_id, port_id);
872 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
876 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
878 struct rte_eth_dev *dev;
880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
882 dev = &rte_eth_devices[port_id];
883 if (tx_queue_id >= dev->data->nb_tx_queues) {
884 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
890 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
892 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
893 tx_queue_id, port_id);
897 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
902 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
904 uint16_t old_nb_queues = dev->data->nb_tx_queues;
908 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
909 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
910 sizeof(dev->data->tx_queues[0]) * nb_queues,
911 RTE_CACHE_LINE_SIZE);
912 if (dev->data->tx_queues == NULL) {
913 dev->data->nb_tx_queues = 0;
916 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
919 txq = dev->data->tx_queues;
921 for (i = nb_queues; i < old_nb_queues; i++)
922 (*dev->dev_ops->tx_queue_release)(txq[i]);
923 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
924 RTE_CACHE_LINE_SIZE);
927 if (nb_queues > old_nb_queues) {
928 uint16_t new_qs = nb_queues - old_nb_queues;
930 memset(txq + old_nb_queues, 0,
931 sizeof(txq[0]) * new_qs);
934 dev->data->tx_queues = txq;
936 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
939 txq = dev->data->tx_queues;
941 for (i = nb_queues; i < old_nb_queues; i++)
942 (*dev->dev_ops->tx_queue_release)(txq[i]);
944 rte_free(dev->data->tx_queues);
945 dev->data->tx_queues = NULL;
947 dev->data->nb_tx_queues = nb_queues;
952 rte_eth_speed_bitflag(uint32_t speed, int duplex)
955 case ETH_SPEED_NUM_10M:
956 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
957 case ETH_SPEED_NUM_100M:
958 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
959 case ETH_SPEED_NUM_1G:
960 return ETH_LINK_SPEED_1G;
961 case ETH_SPEED_NUM_2_5G:
962 return ETH_LINK_SPEED_2_5G;
963 case ETH_SPEED_NUM_5G:
964 return ETH_LINK_SPEED_5G;
965 case ETH_SPEED_NUM_10G:
966 return ETH_LINK_SPEED_10G;
967 case ETH_SPEED_NUM_20G:
968 return ETH_LINK_SPEED_20G;
969 case ETH_SPEED_NUM_25G:
970 return ETH_LINK_SPEED_25G;
971 case ETH_SPEED_NUM_40G:
972 return ETH_LINK_SPEED_40G;
973 case ETH_SPEED_NUM_50G:
974 return ETH_LINK_SPEED_50G;
975 case ETH_SPEED_NUM_56G:
976 return ETH_LINK_SPEED_56G;
977 case ETH_SPEED_NUM_100G:
978 return ETH_LINK_SPEED_100G;
984 const char * __rte_experimental
985 rte_eth_dev_rx_offload_name(uint64_t offload)
987 const char *name = "UNKNOWN";
990 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
991 if (offload == rte_rx_offload_names[i].offload) {
992 name = rte_rx_offload_names[i].name;
1000 const char * __rte_experimental
1001 rte_eth_dev_tx_offload_name(uint64_t offload)
1003 const char *name = "UNKNOWN";
1006 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1007 if (offload == rte_tx_offload_names[i].offload) {
1008 name = rte_tx_offload_names[i].name;
1017 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1018 const struct rte_eth_conf *dev_conf)
1020 struct rte_eth_dev *dev;
1021 struct rte_eth_dev_info dev_info;
1022 struct rte_eth_conf local_conf = *dev_conf;
1025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1027 dev = &rte_eth_devices[port_id];
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1032 rte_eth_dev_info_get(port_id, &dev_info);
1034 /* If number of queues specified by application for both Rx and Tx is
1035 * zero, use driver preferred values. This cannot be done individually
1036 * as it is valid for either Tx or Rx (but not both) to be zero.
1037 * If driver does not provide any preferred valued, fall back on
1040 if (nb_rx_q == 0 && nb_tx_q == 0) {
1041 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1043 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1044 nb_tx_q = dev_info.default_txportconf.nb_queues;
1046 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1049 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1051 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1052 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1056 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1058 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1059 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1063 if (dev->data->dev_started) {
1065 "Port %u must be stopped to allow configuration\n",
1070 /* Copy the dev_conf parameter into the dev structure */
1071 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1074 * Check that the numbers of RX and TX queues are not greater
1075 * than the maximum number of RX and TX queues supported by the
1076 * configured device.
1078 if (nb_rx_q > dev_info.max_rx_queues) {
1079 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1080 port_id, nb_rx_q, dev_info.max_rx_queues);
1084 if (nb_tx_q > dev_info.max_tx_queues) {
1085 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1086 port_id, nb_tx_q, dev_info.max_tx_queues);
1090 /* Check that the device supports requested interrupts */
1091 if ((dev_conf->intr_conf.lsc == 1) &&
1092 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1093 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1094 dev->device->driver->name);
1097 if ((dev_conf->intr_conf.rmv == 1) &&
1098 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1099 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1100 dev->device->driver->name);
1105 * If jumbo frames are enabled, check that the maximum RX packet
1106 * length is supported by the configured device.
1108 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1109 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1111 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1112 port_id, dev_conf->rxmode.max_rx_pkt_len,
1113 dev_info.max_rx_pktlen);
1115 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1117 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1118 port_id, dev_conf->rxmode.max_rx_pkt_len,
1119 (unsigned)ETHER_MIN_LEN);
1123 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1124 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1125 /* Use default value */
1126 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1130 /* Any requested offloading must be within its device capabilities */
1131 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1132 local_conf.rxmode.offloads) {
1134 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1135 "capabilities 0x%"PRIx64" in %s()\n",
1136 port_id, local_conf.rxmode.offloads,
1137 dev_info.rx_offload_capa,
1141 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1142 local_conf.txmode.offloads) {
1144 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1145 "capabilities 0x%"PRIx64" in %s()\n",
1146 port_id, local_conf.txmode.offloads,
1147 dev_info.tx_offload_capa,
1152 /* Check that device supports requested rss hash functions. */
1153 if ((dev_info.flow_type_rss_offloads |
1154 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1155 dev_info.flow_type_rss_offloads) {
1157 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1158 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1159 dev_info.flow_type_rss_offloads);
1164 * Setup new number of RX/TX queues and reconfigure device.
1166 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1169 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1174 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1177 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1179 rte_eth_dev_rx_queue_config(dev, 0);
1183 diag = (*dev->dev_ops->dev_configure)(dev);
1185 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1187 rte_eth_dev_rx_queue_config(dev, 0);
1188 rte_eth_dev_tx_queue_config(dev, 0);
1189 return eth_err(port_id, diag);
1192 /* Initialize Rx profiling if enabled at compilation time. */
1193 diag = __rte_eth_dev_profile_init(port_id, dev);
1195 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1197 rte_eth_dev_rx_queue_config(dev, 0);
1198 rte_eth_dev_tx_queue_config(dev, 0);
1199 return eth_err(port_id, diag);
1206 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1208 if (dev->data->dev_started) {
1209 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1210 dev->data->port_id);
1214 rte_eth_dev_rx_queue_config(dev, 0);
1215 rte_eth_dev_tx_queue_config(dev, 0);
1217 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1221 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1222 struct rte_eth_dev_info *dev_info)
1224 struct ether_addr *addr;
1229 /* replay MAC address configuration including default MAC */
1230 addr = &dev->data->mac_addrs[0];
1231 if (*dev->dev_ops->mac_addr_set != NULL)
1232 (*dev->dev_ops->mac_addr_set)(dev, addr);
1233 else if (*dev->dev_ops->mac_addr_add != NULL)
1234 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1236 if (*dev->dev_ops->mac_addr_add != NULL) {
1237 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1238 addr = &dev->data->mac_addrs[i];
1240 /* skip zero address */
1241 if (is_zero_ether_addr(addr))
1245 pool_mask = dev->data->mac_pool_sel[i];
1248 if (pool_mask & 1ULL)
1249 (*dev->dev_ops->mac_addr_add)(dev,
1253 } while (pool_mask);
1259 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1260 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1262 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1263 rte_eth_dev_mac_restore(dev, dev_info);
1265 /* replay promiscuous configuration */
1266 if (rte_eth_promiscuous_get(port_id) == 1)
1267 rte_eth_promiscuous_enable(port_id);
1268 else if (rte_eth_promiscuous_get(port_id) == 0)
1269 rte_eth_promiscuous_disable(port_id);
1271 /* replay all multicast configuration */
1272 if (rte_eth_allmulticast_get(port_id) == 1)
1273 rte_eth_allmulticast_enable(port_id);
1274 else if (rte_eth_allmulticast_get(port_id) == 0)
1275 rte_eth_allmulticast_disable(port_id);
1279 rte_eth_dev_start(uint16_t port_id)
1281 struct rte_eth_dev *dev;
1282 struct rte_eth_dev_info dev_info;
1285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1287 dev = &rte_eth_devices[port_id];
1289 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1291 if (dev->data->dev_started != 0) {
1292 RTE_ETHDEV_LOG(INFO,
1293 "Device with port_id=%"PRIu16" already started\n",
1298 rte_eth_dev_info_get(port_id, &dev_info);
1300 /* Lets restore MAC now if device does not support live change */
1301 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1302 rte_eth_dev_mac_restore(dev, &dev_info);
1304 diag = (*dev->dev_ops->dev_start)(dev);
1306 dev->data->dev_started = 1;
1308 return eth_err(port_id, diag);
1310 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1312 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1313 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1314 (*dev->dev_ops->link_update)(dev, 0);
1320 rte_eth_dev_stop(uint16_t port_id)
1322 struct rte_eth_dev *dev;
1324 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1325 dev = &rte_eth_devices[port_id];
1327 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1329 if (dev->data->dev_started == 0) {
1330 RTE_ETHDEV_LOG(INFO,
1331 "Device with port_id=%"PRIu16" already stopped\n",
1336 dev->data->dev_started = 0;
1337 (*dev->dev_ops->dev_stop)(dev);
1341 rte_eth_dev_set_link_up(uint16_t port_id)
1343 struct rte_eth_dev *dev;
1345 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1347 dev = &rte_eth_devices[port_id];
1349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1350 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1354 rte_eth_dev_set_link_down(uint16_t port_id)
1356 struct rte_eth_dev *dev;
1358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1360 dev = &rte_eth_devices[port_id];
1362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1363 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1367 rte_eth_dev_close(uint16_t port_id)
1369 struct rte_eth_dev *dev;
1371 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1375 dev->data->dev_started = 0;
1376 (*dev->dev_ops->dev_close)(dev);
1378 dev->data->nb_rx_queues = 0;
1379 rte_free(dev->data->rx_queues);
1380 dev->data->rx_queues = NULL;
1381 dev->data->nb_tx_queues = 0;
1382 rte_free(dev->data->tx_queues);
1383 dev->data->tx_queues = NULL;
1387 rte_eth_dev_reset(uint16_t port_id)
1389 struct rte_eth_dev *dev;
1392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1393 dev = &rte_eth_devices[port_id];
1395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1397 rte_eth_dev_stop(port_id);
1398 ret = dev->dev_ops->dev_reset(dev);
1400 return eth_err(port_id, ret);
1403 int __rte_experimental
1404 rte_eth_dev_is_removed(uint16_t port_id)
1406 struct rte_eth_dev *dev;
1409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1411 dev = &rte_eth_devices[port_id];
1413 if (dev->state == RTE_ETH_DEV_REMOVED)
1416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1418 ret = dev->dev_ops->is_removed(dev);
1420 /* Device is physically removed. */
1421 dev->state = RTE_ETH_DEV_REMOVED;
1427 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1428 uint16_t nb_rx_desc, unsigned int socket_id,
1429 const struct rte_eth_rxconf *rx_conf,
1430 struct rte_mempool *mp)
1433 uint32_t mbp_buf_size;
1434 struct rte_eth_dev *dev;
1435 struct rte_eth_dev_info dev_info;
1436 struct rte_eth_rxconf local_conf;
1439 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1441 dev = &rte_eth_devices[port_id];
1442 if (rx_queue_id >= dev->data->nb_rx_queues) {
1443 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1451 * Check the size of the mbuf data buffer.
1452 * This value must be provided in the private data of the memory pool.
1453 * First check that the memory pool has a valid private data.
1455 rte_eth_dev_info_get(port_id, &dev_info);
1456 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1457 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1458 mp->name, (int)mp->private_data_size,
1459 (int)sizeof(struct rte_pktmbuf_pool_private));
1462 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1464 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1466 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1467 mp->name, (int)mbp_buf_size,
1468 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1469 (int)RTE_PKTMBUF_HEADROOM,
1470 (int)dev_info.min_rx_bufsize);
1474 /* Use default specified by driver, if nb_rx_desc is zero */
1475 if (nb_rx_desc == 0) {
1476 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1477 /* If driver default is also zero, fall back on EAL default */
1478 if (nb_rx_desc == 0)
1479 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1482 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1483 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1484 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1487 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1488 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1489 dev_info.rx_desc_lim.nb_min,
1490 dev_info.rx_desc_lim.nb_align);
1494 if (dev->data->dev_started &&
1495 !(dev_info.dev_capa &
1496 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1499 if (dev->data->dev_started &&
1500 (dev->data->rx_queue_state[rx_queue_id] !=
1501 RTE_ETH_QUEUE_STATE_STOPPED))
1504 rxq = dev->data->rx_queues;
1505 if (rxq[rx_queue_id]) {
1506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1508 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1509 rxq[rx_queue_id] = NULL;
1512 if (rx_conf == NULL)
1513 rx_conf = &dev_info.default_rxconf;
1515 local_conf = *rx_conf;
1518 * If an offloading has already been enabled in
1519 * rte_eth_dev_configure(), it has been enabled on all queues,
1520 * so there is no need to enable it in this queue again.
1521 * The local_conf.offloads input to underlying PMD only carries
1522 * those offloadings which are only enabled on this queue and
1523 * not enabled on all queues.
1525 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1528 * New added offloadings for this queue are those not enabled in
1529 * rte_eth_dev_configure() and they must be per-queue type.
1530 * A pure per-port offloading can't be enabled on a queue while
1531 * disabled on another queue. A pure per-port offloading can't
1532 * be enabled for any queue as new added one if it hasn't been
1533 * enabled in rte_eth_dev_configure().
1535 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1536 local_conf.offloads) {
1538 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1539 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1540 port_id, rx_queue_id, local_conf.offloads,
1541 dev_info.rx_queue_offload_capa,
1546 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1547 socket_id, &local_conf, mp);
1549 if (!dev->data->min_rx_buf_size ||
1550 dev->data->min_rx_buf_size > mbp_buf_size)
1551 dev->data->min_rx_buf_size = mbp_buf_size;
1554 return eth_err(port_id, ret);
1558 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1559 uint16_t nb_tx_desc, unsigned int socket_id,
1560 const struct rte_eth_txconf *tx_conf)
1562 struct rte_eth_dev *dev;
1563 struct rte_eth_dev_info dev_info;
1564 struct rte_eth_txconf local_conf;
1567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1569 dev = &rte_eth_devices[port_id];
1570 if (tx_queue_id >= dev->data->nb_tx_queues) {
1571 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1578 rte_eth_dev_info_get(port_id, &dev_info);
1580 /* Use default specified by driver, if nb_tx_desc is zero */
1581 if (nb_tx_desc == 0) {
1582 nb_tx_desc = dev_info.default_txportconf.ring_size;
1583 /* If driver default is zero, fall back on EAL default */
1584 if (nb_tx_desc == 0)
1585 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1587 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1588 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1589 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1591 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1592 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1593 dev_info.tx_desc_lim.nb_min,
1594 dev_info.tx_desc_lim.nb_align);
1598 if (dev->data->dev_started &&
1599 !(dev_info.dev_capa &
1600 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1603 if (dev->data->dev_started &&
1604 (dev->data->tx_queue_state[tx_queue_id] !=
1605 RTE_ETH_QUEUE_STATE_STOPPED))
1608 txq = dev->data->tx_queues;
1609 if (txq[tx_queue_id]) {
1610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1612 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1613 txq[tx_queue_id] = NULL;
1616 if (tx_conf == NULL)
1617 tx_conf = &dev_info.default_txconf;
1619 local_conf = *tx_conf;
1622 * If an offloading has already been enabled in
1623 * rte_eth_dev_configure(), it has been enabled on all queues,
1624 * so there is no need to enable it in this queue again.
1625 * The local_conf.offloads input to underlying PMD only carries
1626 * those offloadings which are only enabled on this queue and
1627 * not enabled on all queues.
1629 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1632 * New added offloadings for this queue are those not enabled in
1633 * rte_eth_dev_configure() and they must be per-queue type.
1634 * A pure per-port offloading can't be enabled on a queue while
1635 * disabled on another queue. A pure per-port offloading can't
1636 * be enabled for any queue as new added one if it hasn't been
1637 * enabled in rte_eth_dev_configure().
1639 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1640 local_conf.offloads) {
1642 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1643 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1644 port_id, tx_queue_id, local_conf.offloads,
1645 dev_info.tx_queue_offload_capa,
1650 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1651 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1655 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1656 void *userdata __rte_unused)
1660 for (i = 0; i < unsent; i++)
1661 rte_pktmbuf_free(pkts[i]);
1665 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1668 uint64_t *count = userdata;
1671 for (i = 0; i < unsent; i++)
1672 rte_pktmbuf_free(pkts[i]);
1678 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1679 buffer_tx_error_fn cbfn, void *userdata)
1681 buffer->error_callback = cbfn;
1682 buffer->error_userdata = userdata;
1687 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1694 buffer->size = size;
1695 if (buffer->error_callback == NULL) {
1696 ret = rte_eth_tx_buffer_set_err_callback(
1697 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1704 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1706 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1709 /* Validate Input Data. Bail if not valid or not supported. */
1710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1713 /* Call driver to free pending mbufs. */
1714 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1716 return eth_err(port_id, ret);
1720 rte_eth_promiscuous_enable(uint16_t port_id)
1722 struct rte_eth_dev *dev;
1724 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1725 dev = &rte_eth_devices[port_id];
1727 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1728 (*dev->dev_ops->promiscuous_enable)(dev);
1729 dev->data->promiscuous = 1;
1733 rte_eth_promiscuous_disable(uint16_t port_id)
1735 struct rte_eth_dev *dev;
1737 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1738 dev = &rte_eth_devices[port_id];
1740 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1741 dev->data->promiscuous = 0;
1742 (*dev->dev_ops->promiscuous_disable)(dev);
1746 rte_eth_promiscuous_get(uint16_t port_id)
1748 struct rte_eth_dev *dev;
1750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1752 dev = &rte_eth_devices[port_id];
1753 return dev->data->promiscuous;
1757 rte_eth_allmulticast_enable(uint16_t port_id)
1759 struct rte_eth_dev *dev;
1761 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1762 dev = &rte_eth_devices[port_id];
1764 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1765 (*dev->dev_ops->allmulticast_enable)(dev);
1766 dev->data->all_multicast = 1;
1770 rte_eth_allmulticast_disable(uint16_t port_id)
1772 struct rte_eth_dev *dev;
1774 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1775 dev = &rte_eth_devices[port_id];
1777 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1778 dev->data->all_multicast = 0;
1779 (*dev->dev_ops->allmulticast_disable)(dev);
1783 rte_eth_allmulticast_get(uint16_t port_id)
1785 struct rte_eth_dev *dev;
1787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1789 dev = &rte_eth_devices[port_id];
1790 return dev->data->all_multicast;
1794 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1796 struct rte_eth_dev *dev;
1798 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1799 dev = &rte_eth_devices[port_id];
1801 if (dev->data->dev_conf.intr_conf.lsc &&
1802 dev->data->dev_started)
1803 rte_eth_linkstatus_get(dev, eth_link);
1805 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1806 (*dev->dev_ops->link_update)(dev, 1);
1807 *eth_link = dev->data->dev_link;
1812 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1814 struct rte_eth_dev *dev;
1816 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1817 dev = &rte_eth_devices[port_id];
1819 if (dev->data->dev_conf.intr_conf.lsc &&
1820 dev->data->dev_started)
1821 rte_eth_linkstatus_get(dev, eth_link);
1823 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1824 (*dev->dev_ops->link_update)(dev, 0);
1825 *eth_link = dev->data->dev_link;
1830 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1832 struct rte_eth_dev *dev;
1834 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1836 dev = &rte_eth_devices[port_id];
1837 memset(stats, 0, sizeof(*stats));
1839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1840 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1841 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1845 rte_eth_stats_reset(uint16_t port_id)
1847 struct rte_eth_dev *dev;
1849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1850 dev = &rte_eth_devices[port_id];
1852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1853 (*dev->dev_ops->stats_reset)(dev);
1854 dev->data->rx_mbuf_alloc_failed = 0;
1860 get_xstats_basic_count(struct rte_eth_dev *dev)
1862 uint16_t nb_rxqs, nb_txqs;
1865 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1866 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1868 count = RTE_NB_STATS;
1869 count += nb_rxqs * RTE_NB_RXQ_STATS;
1870 count += nb_txqs * RTE_NB_TXQ_STATS;
1876 get_xstats_count(uint16_t port_id)
1878 struct rte_eth_dev *dev;
1881 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1882 dev = &rte_eth_devices[port_id];
1883 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1884 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1887 return eth_err(port_id, count);
1889 if (dev->dev_ops->xstats_get_names != NULL) {
1890 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1892 return eth_err(port_id, count);
1897 count += get_xstats_basic_count(dev);
1903 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1906 int cnt_xstats, idx_xstat;
1908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1911 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1916 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1921 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1922 if (cnt_xstats < 0) {
1923 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1927 /* Get id-name lookup table */
1928 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1930 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1931 port_id, xstats_names, cnt_xstats, NULL)) {
1932 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1936 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1937 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1946 /* retrieve basic stats names */
1948 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1949 struct rte_eth_xstat_name *xstats_names)
1951 int cnt_used_entries = 0;
1952 uint32_t idx, id_queue;
1955 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1956 snprintf(xstats_names[cnt_used_entries].name,
1957 sizeof(xstats_names[0].name),
1958 "%s", rte_stats_strings[idx].name);
1961 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1962 for (id_queue = 0; id_queue < num_q; id_queue++) {
1963 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1964 snprintf(xstats_names[cnt_used_entries].name,
1965 sizeof(xstats_names[0].name),
1967 id_queue, rte_rxq_stats_strings[idx].name);
1972 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1973 for (id_queue = 0; id_queue < num_q; id_queue++) {
1974 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1975 snprintf(xstats_names[cnt_used_entries].name,
1976 sizeof(xstats_names[0].name),
1978 id_queue, rte_txq_stats_strings[idx].name);
1982 return cnt_used_entries;
1985 /* retrieve ethdev extended statistics names */
1987 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1988 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1991 struct rte_eth_xstat_name *xstats_names_copy;
1992 unsigned int no_basic_stat_requested = 1;
1993 unsigned int no_ext_stat_requested = 1;
1994 unsigned int expected_entries;
1995 unsigned int basic_count;
1996 struct rte_eth_dev *dev;
2000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2001 dev = &rte_eth_devices[port_id];
2003 basic_count = get_xstats_basic_count(dev);
2004 ret = get_xstats_count(port_id);
2007 expected_entries = (unsigned int)ret;
2009 /* Return max number of stats if no ids given */
2012 return expected_entries;
2013 else if (xstats_names && size < expected_entries)
2014 return expected_entries;
2017 if (ids && !xstats_names)
2020 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2021 uint64_t ids_copy[size];
2023 for (i = 0; i < size; i++) {
2024 if (ids[i] < basic_count) {
2025 no_basic_stat_requested = 0;
2030 * Convert ids to xstats ids that PMD knows.
2031 * ids known by user are basic + extended stats.
2033 ids_copy[i] = ids[i] - basic_count;
2036 if (no_basic_stat_requested)
2037 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2038 xstats_names, ids_copy, size);
2041 /* Retrieve all stats */
2043 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2045 if (num_stats < 0 || num_stats > (int)expected_entries)
2048 return expected_entries;
2051 xstats_names_copy = calloc(expected_entries,
2052 sizeof(struct rte_eth_xstat_name));
2054 if (!xstats_names_copy) {
2055 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2060 for (i = 0; i < size; i++) {
2061 if (ids[i] >= basic_count) {
2062 no_ext_stat_requested = 0;
2068 /* Fill xstats_names_copy structure */
2069 if (ids && no_ext_stat_requested) {
2070 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2072 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2075 free(xstats_names_copy);
2081 for (i = 0; i < size; i++) {
2082 if (ids[i] >= expected_entries) {
2083 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2084 free(xstats_names_copy);
2087 xstats_names[i] = xstats_names_copy[ids[i]];
2090 free(xstats_names_copy);
2095 rte_eth_xstats_get_names(uint16_t port_id,
2096 struct rte_eth_xstat_name *xstats_names,
2099 struct rte_eth_dev *dev;
2100 int cnt_used_entries;
2101 int cnt_expected_entries;
2102 int cnt_driver_entries;
2104 cnt_expected_entries = get_xstats_count(port_id);
2105 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2106 (int)size < cnt_expected_entries)
2107 return cnt_expected_entries;
2109 /* port_id checked in get_xstats_count() */
2110 dev = &rte_eth_devices[port_id];
2112 cnt_used_entries = rte_eth_basic_stats_get_names(
2115 if (dev->dev_ops->xstats_get_names != NULL) {
2116 /* If there are any driver-specific xstats, append them
2119 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2121 xstats_names + cnt_used_entries,
2122 size - cnt_used_entries);
2123 if (cnt_driver_entries < 0)
2124 return eth_err(port_id, cnt_driver_entries);
2125 cnt_used_entries += cnt_driver_entries;
2128 return cnt_used_entries;
2133 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2135 struct rte_eth_dev *dev;
2136 struct rte_eth_stats eth_stats;
2137 unsigned int count = 0, i, q;
2138 uint64_t val, *stats_ptr;
2139 uint16_t nb_rxqs, nb_txqs;
2142 ret = rte_eth_stats_get(port_id, ð_stats);
2146 dev = &rte_eth_devices[port_id];
2148 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2149 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2152 for (i = 0; i < RTE_NB_STATS; i++) {
2153 stats_ptr = RTE_PTR_ADD(ð_stats,
2154 rte_stats_strings[i].offset);
2156 xstats[count++].value = val;
2160 for (q = 0; q < nb_rxqs; q++) {
2161 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2162 stats_ptr = RTE_PTR_ADD(ð_stats,
2163 rte_rxq_stats_strings[i].offset +
2164 q * sizeof(uint64_t));
2166 xstats[count++].value = val;
2171 for (q = 0; q < nb_txqs; q++) {
2172 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2173 stats_ptr = RTE_PTR_ADD(ð_stats,
2174 rte_txq_stats_strings[i].offset +
2175 q * sizeof(uint64_t));
2177 xstats[count++].value = val;
2183 /* retrieve ethdev extended statistics */
2185 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2186 uint64_t *values, unsigned int size)
2188 unsigned int no_basic_stat_requested = 1;
2189 unsigned int no_ext_stat_requested = 1;
2190 unsigned int num_xstats_filled;
2191 unsigned int basic_count;
2192 uint16_t expected_entries;
2193 struct rte_eth_dev *dev;
2197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2198 ret = get_xstats_count(port_id);
2201 expected_entries = (uint16_t)ret;
2202 struct rte_eth_xstat xstats[expected_entries];
2203 dev = &rte_eth_devices[port_id];
2204 basic_count = get_xstats_basic_count(dev);
2206 /* Return max number of stats if no ids given */
2209 return expected_entries;
2210 else if (values && size < expected_entries)
2211 return expected_entries;
2217 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2218 unsigned int basic_count = get_xstats_basic_count(dev);
2219 uint64_t ids_copy[size];
2221 for (i = 0; i < size; i++) {
2222 if (ids[i] < basic_count) {
2223 no_basic_stat_requested = 0;
2228 * Convert ids to xstats ids that PMD knows.
2229 * ids known by user are basic + extended stats.
2231 ids_copy[i] = ids[i] - basic_count;
2234 if (no_basic_stat_requested)
2235 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2240 for (i = 0; i < size; i++) {
2241 if (ids[i] >= basic_count) {
2242 no_ext_stat_requested = 0;
2248 /* Fill the xstats structure */
2249 if (ids && no_ext_stat_requested)
2250 ret = rte_eth_basic_stats_get(port_id, xstats);
2252 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2256 num_xstats_filled = (unsigned int)ret;
2258 /* Return all stats */
2260 for (i = 0; i < num_xstats_filled; i++)
2261 values[i] = xstats[i].value;
2262 return expected_entries;
2266 for (i = 0; i < size; i++) {
2267 if (ids[i] >= expected_entries) {
2268 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2271 values[i] = xstats[ids[i]].value;
2277 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2280 struct rte_eth_dev *dev;
2281 unsigned int count = 0, i;
2282 signed int xcount = 0;
2283 uint16_t nb_rxqs, nb_txqs;
2286 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2288 dev = &rte_eth_devices[port_id];
2290 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2291 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2293 /* Return generic statistics */
2294 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2295 (nb_txqs * RTE_NB_TXQ_STATS);
2297 /* implemented by the driver */
2298 if (dev->dev_ops->xstats_get != NULL) {
2299 /* Retrieve the xstats from the driver at the end of the
2302 xcount = (*dev->dev_ops->xstats_get)(dev,
2303 xstats ? xstats + count : NULL,
2304 (n > count) ? n - count : 0);
2307 return eth_err(port_id, xcount);
2310 if (n < count + xcount || xstats == NULL)
2311 return count + xcount;
2313 /* now fill the xstats structure */
2314 ret = rte_eth_basic_stats_get(port_id, xstats);
2319 for (i = 0; i < count; i++)
2321 /* add an offset to driver-specific stats */
2322 for ( ; i < count + xcount; i++)
2323 xstats[i].id += count;
2325 return count + xcount;
2328 /* reset ethdev extended statistics */
2330 rte_eth_xstats_reset(uint16_t port_id)
2332 struct rte_eth_dev *dev;
2334 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2335 dev = &rte_eth_devices[port_id];
2337 /* implemented by the driver */
2338 if (dev->dev_ops->xstats_reset != NULL) {
2339 (*dev->dev_ops->xstats_reset)(dev);
2343 /* fallback to default */
2344 rte_eth_stats_reset(port_id);
2348 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2351 struct rte_eth_dev *dev;
2353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2355 dev = &rte_eth_devices[port_id];
2357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2359 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2362 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2365 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2368 return (*dev->dev_ops->queue_stats_mapping_set)
2369 (dev, queue_id, stat_idx, is_rx);
2374 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2377 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2378 stat_idx, STAT_QMAP_TX));
2383 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2386 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2387 stat_idx, STAT_QMAP_RX));
2391 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2393 struct rte_eth_dev *dev;
2395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2396 dev = &rte_eth_devices[port_id];
2398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2399 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2400 fw_version, fw_size));
2404 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2406 struct rte_eth_dev *dev;
2407 const struct rte_eth_desc_lim lim = {
2408 .nb_max = UINT16_MAX,
2413 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2414 dev = &rte_eth_devices[port_id];
2416 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2417 dev_info->rx_desc_lim = lim;
2418 dev_info->tx_desc_lim = lim;
2419 dev_info->device = dev->device;
2421 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2422 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2423 dev_info->driver_name = dev->device->driver->name;
2424 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2425 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2427 dev_info->dev_flags = &dev->data->dev_flags;
2431 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2432 uint32_t *ptypes, int num)
2435 struct rte_eth_dev *dev;
2436 const uint32_t *all_ptypes;
2438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2439 dev = &rte_eth_devices[port_id];
2440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2441 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2446 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2447 if (all_ptypes[i] & ptype_mask) {
2449 ptypes[j] = all_ptypes[i];
2457 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2459 struct rte_eth_dev *dev;
2461 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2462 dev = &rte_eth_devices[port_id];
2463 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2468 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2470 struct rte_eth_dev *dev;
2472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474 dev = &rte_eth_devices[port_id];
2475 *mtu = dev->data->mtu;
2480 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2483 struct rte_eth_dev *dev;
2485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2486 dev = &rte_eth_devices[port_id];
2487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2489 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2491 dev->data->mtu = mtu;
2493 return eth_err(port_id, ret);
2497 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2499 struct rte_eth_dev *dev;
2502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2503 dev = &rte_eth_devices[port_id];
2504 if (!(dev->data->dev_conf.rxmode.offloads &
2505 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2506 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2511 if (vlan_id > 4095) {
2512 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2518 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2520 struct rte_vlan_filter_conf *vfc;
2524 vfc = &dev->data->vlan_filter_conf;
2525 vidx = vlan_id / 64;
2526 vbit = vlan_id % 64;
2529 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2531 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2534 return eth_err(port_id, ret);
2538 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2541 struct rte_eth_dev *dev;
2543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2544 dev = &rte_eth_devices[port_id];
2545 if (rx_queue_id >= dev->data->nb_rx_queues) {
2546 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2550 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2551 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2557 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2558 enum rte_vlan_type vlan_type,
2561 struct rte_eth_dev *dev;
2563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2564 dev = &rte_eth_devices[port_id];
2565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2567 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2572 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2574 struct rte_eth_dev *dev;
2578 uint64_t orig_offloads;
2580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2581 dev = &rte_eth_devices[port_id];
2583 /* save original values in case of failure */
2584 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2586 /*check which option changed by application*/
2587 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2588 org = !!(dev->data->dev_conf.rxmode.offloads &
2589 DEV_RX_OFFLOAD_VLAN_STRIP);
2592 dev->data->dev_conf.rxmode.offloads |=
2593 DEV_RX_OFFLOAD_VLAN_STRIP;
2595 dev->data->dev_conf.rxmode.offloads &=
2596 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2597 mask |= ETH_VLAN_STRIP_MASK;
2600 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2601 org = !!(dev->data->dev_conf.rxmode.offloads &
2602 DEV_RX_OFFLOAD_VLAN_FILTER);
2605 dev->data->dev_conf.rxmode.offloads |=
2606 DEV_RX_OFFLOAD_VLAN_FILTER;
2608 dev->data->dev_conf.rxmode.offloads &=
2609 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2610 mask |= ETH_VLAN_FILTER_MASK;
2613 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2614 org = !!(dev->data->dev_conf.rxmode.offloads &
2615 DEV_RX_OFFLOAD_VLAN_EXTEND);
2618 dev->data->dev_conf.rxmode.offloads |=
2619 DEV_RX_OFFLOAD_VLAN_EXTEND;
2621 dev->data->dev_conf.rxmode.offloads &=
2622 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2623 mask |= ETH_VLAN_EXTEND_MASK;
2630 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2631 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2633 /* hit an error restore original values */
2634 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2637 return eth_err(port_id, ret);
2641 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2643 struct rte_eth_dev *dev;
2646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2647 dev = &rte_eth_devices[port_id];
2649 if (dev->data->dev_conf.rxmode.offloads &
2650 DEV_RX_OFFLOAD_VLAN_STRIP)
2651 ret |= ETH_VLAN_STRIP_OFFLOAD;
2653 if (dev->data->dev_conf.rxmode.offloads &
2654 DEV_RX_OFFLOAD_VLAN_FILTER)
2655 ret |= ETH_VLAN_FILTER_OFFLOAD;
2657 if (dev->data->dev_conf.rxmode.offloads &
2658 DEV_RX_OFFLOAD_VLAN_EXTEND)
2659 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2665 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2667 struct rte_eth_dev *dev;
2669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2670 dev = &rte_eth_devices[port_id];
2671 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2673 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2677 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2679 struct rte_eth_dev *dev;
2681 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2682 dev = &rte_eth_devices[port_id];
2683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2684 memset(fc_conf, 0, sizeof(*fc_conf));
2685 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2689 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2691 struct rte_eth_dev *dev;
2693 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2694 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2695 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2699 dev = &rte_eth_devices[port_id];
2700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2701 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2705 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2706 struct rte_eth_pfc_conf *pfc_conf)
2708 struct rte_eth_dev *dev;
2710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2711 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2712 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2716 dev = &rte_eth_devices[port_id];
2717 /* High water, low water validation are device specific */
2718 if (*dev->dev_ops->priority_flow_ctrl_set)
2719 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2725 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2733 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2734 for (i = 0; i < num; i++) {
2735 if (reta_conf[i].mask)
2743 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2747 uint16_t i, idx, shift;
2753 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2757 for (i = 0; i < reta_size; i++) {
2758 idx = i / RTE_RETA_GROUP_SIZE;
2759 shift = i % RTE_RETA_GROUP_SIZE;
2760 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2761 (reta_conf[idx].reta[shift] >= max_rxq)) {
2763 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2765 reta_conf[idx].reta[shift], max_rxq);
2774 rte_eth_dev_rss_reta_update(uint16_t port_id,
2775 struct rte_eth_rss_reta_entry64 *reta_conf,
2778 struct rte_eth_dev *dev;
2781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2782 /* Check mask bits */
2783 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2787 dev = &rte_eth_devices[port_id];
2789 /* Check entry value */
2790 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2791 dev->data->nb_rx_queues);
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2796 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2801 rte_eth_dev_rss_reta_query(uint16_t port_id,
2802 struct rte_eth_rss_reta_entry64 *reta_conf,
2805 struct rte_eth_dev *dev;
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2810 /* Check mask bits */
2811 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2815 dev = &rte_eth_devices[port_id];
2816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2817 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2822 rte_eth_dev_rss_hash_update(uint16_t port_id,
2823 struct rte_eth_rss_conf *rss_conf)
2825 struct rte_eth_dev *dev;
2826 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2829 dev = &rte_eth_devices[port_id];
2830 rte_eth_dev_info_get(port_id, &dev_info);
2831 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2832 dev_info.flow_type_rss_offloads) {
2834 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2835 port_id, rss_conf->rss_hf,
2836 dev_info.flow_type_rss_offloads);
2839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2840 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2845 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2846 struct rte_eth_rss_conf *rss_conf)
2848 struct rte_eth_dev *dev;
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2851 dev = &rte_eth_devices[port_id];
2852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2853 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2858 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2859 struct rte_eth_udp_tunnel *udp_tunnel)
2861 struct rte_eth_dev *dev;
2863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2864 if (udp_tunnel == NULL) {
2865 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2869 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2870 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2874 dev = &rte_eth_devices[port_id];
2875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2876 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2881 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2882 struct rte_eth_udp_tunnel *udp_tunnel)
2884 struct rte_eth_dev *dev;
2886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2887 dev = &rte_eth_devices[port_id];
2889 if (udp_tunnel == NULL) {
2890 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2894 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2895 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2900 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2905 rte_eth_led_on(uint16_t port_id)
2907 struct rte_eth_dev *dev;
2909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2910 dev = &rte_eth_devices[port_id];
2911 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2912 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2916 rte_eth_led_off(uint16_t port_id)
2918 struct rte_eth_dev *dev;
2920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2921 dev = &rte_eth_devices[port_id];
2922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2923 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2927 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2931 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2933 struct rte_eth_dev_info dev_info;
2934 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2938 rte_eth_dev_info_get(port_id, &dev_info);
2940 for (i = 0; i < dev_info.max_mac_addrs; i++)
2941 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2947 static const struct ether_addr null_mac_addr;
2950 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2953 struct rte_eth_dev *dev;
2958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2959 dev = &rte_eth_devices[port_id];
2960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2962 if (is_zero_ether_addr(addr)) {
2963 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2967 if (pool >= ETH_64_POOLS) {
2968 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2972 index = get_mac_addr_index(port_id, addr);
2974 index = get_mac_addr_index(port_id, &null_mac_addr);
2976 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2981 pool_mask = dev->data->mac_pool_sel[index];
2983 /* Check if both MAC address and pool is already there, and do nothing */
2984 if (pool_mask & (1ULL << pool))
2989 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2992 /* Update address in NIC data structure */
2993 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2995 /* Update pool bitmap in NIC data structure */
2996 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2999 return eth_err(port_id, ret);
3003 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3005 struct rte_eth_dev *dev;
3008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3009 dev = &rte_eth_devices[port_id];
3010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3012 index = get_mac_addr_index(port_id, addr);
3015 "Port %u: Cannot remove default MAC address\n",
3018 } else if (index < 0)
3019 return 0; /* Do nothing if address wasn't found */
3022 (*dev->dev_ops->mac_addr_remove)(dev, index);
3024 /* Update address in NIC data structure */
3025 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3027 /* reset pool bitmap */
3028 dev->data->mac_pool_sel[index] = 0;
3034 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3036 struct rte_eth_dev *dev;
3039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3041 if (!is_valid_assigned_ether_addr(addr))
3044 dev = &rte_eth_devices[port_id];
3045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3047 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3051 /* Update default address in NIC data structure */
3052 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3059 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3063 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3065 struct rte_eth_dev_info dev_info;
3066 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3069 rte_eth_dev_info_get(port_id, &dev_info);
3070 if (!dev->data->hash_mac_addrs)
3073 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3074 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3075 ETHER_ADDR_LEN) == 0)
3082 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3087 struct rte_eth_dev *dev;
3089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3091 dev = &rte_eth_devices[port_id];
3092 if (is_zero_ether_addr(addr)) {
3093 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3098 index = get_hash_mac_addr_index(port_id, addr);
3099 /* Check if it's already there, and do nothing */
3100 if ((index >= 0) && on)
3106 "Port %u: the MAC address was not set in UTA\n",
3111 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3113 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3120 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3122 /* Update address in NIC data structure */
3124 ether_addr_copy(addr,
3125 &dev->data->hash_mac_addrs[index]);
3127 ether_addr_copy(&null_mac_addr,
3128 &dev->data->hash_mac_addrs[index]);
3131 return eth_err(port_id, ret);
3135 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3137 struct rte_eth_dev *dev;
3139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3141 dev = &rte_eth_devices[port_id];
3143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3144 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3148 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3151 struct rte_eth_dev *dev;
3152 struct rte_eth_dev_info dev_info;
3153 struct rte_eth_link link;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3158 rte_eth_dev_info_get(port_id, &dev_info);
3159 link = dev->data->dev_link;
3161 if (queue_idx > dev_info.max_tx_queues) {
3163 "Set queue rate limit:port %u: invalid queue id=%u\n",
3164 port_id, queue_idx);
3168 if (tx_rate > link.link_speed) {
3170 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3171 tx_rate, link.link_speed);
3175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3176 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3177 queue_idx, tx_rate));
3181 rte_eth_mirror_rule_set(uint16_t port_id,
3182 struct rte_eth_mirror_conf *mirror_conf,
3183 uint8_t rule_id, uint8_t on)
3185 struct rte_eth_dev *dev;
3187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3188 if (mirror_conf->rule_type == 0) {
3189 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3193 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3194 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3199 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3200 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3201 (mirror_conf->pool_mask == 0)) {
3203 "Invalid mirror pool, pool mask can not be 0\n");
3207 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3208 mirror_conf->vlan.vlan_mask == 0) {
3210 "Invalid vlan mask, vlan mask can not be 0\n");
3214 dev = &rte_eth_devices[port_id];
3215 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3217 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3218 mirror_conf, rule_id, on));
3222 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3224 struct rte_eth_dev *dev;
3226 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3228 dev = &rte_eth_devices[port_id];
3229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3231 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3235 RTE_INIT(eth_dev_init_cb_lists)
3239 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3240 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3244 rte_eth_dev_callback_register(uint16_t port_id,
3245 enum rte_eth_event_type event,
3246 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3248 struct rte_eth_dev *dev;
3249 struct rte_eth_dev_callback *user_cb;
3250 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3256 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3257 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3261 if (port_id == RTE_ETH_ALL) {
3263 last_port = RTE_MAX_ETHPORTS - 1;
3265 next_port = last_port = port_id;
3268 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3271 dev = &rte_eth_devices[next_port];
3273 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3274 if (user_cb->cb_fn == cb_fn &&
3275 user_cb->cb_arg == cb_arg &&
3276 user_cb->event == event) {
3281 /* create a new callback. */
3282 if (user_cb == NULL) {
3283 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3284 sizeof(struct rte_eth_dev_callback), 0);
3285 if (user_cb != NULL) {
3286 user_cb->cb_fn = cb_fn;
3287 user_cb->cb_arg = cb_arg;
3288 user_cb->event = event;
3289 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3292 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3293 rte_eth_dev_callback_unregister(port_id, event,
3299 } while (++next_port <= last_port);
3301 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3306 rte_eth_dev_callback_unregister(uint16_t port_id,
3307 enum rte_eth_event_type event,
3308 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3311 struct rte_eth_dev *dev;
3312 struct rte_eth_dev_callback *cb, *next;
3313 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3319 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3320 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3324 if (port_id == RTE_ETH_ALL) {
3326 last_port = RTE_MAX_ETHPORTS - 1;
3328 next_port = last_port = port_id;
3331 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3334 dev = &rte_eth_devices[next_port];
3336 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3339 next = TAILQ_NEXT(cb, next);
3341 if (cb->cb_fn != cb_fn || cb->event != event ||
3342 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3346 * if this callback is not executing right now,
3349 if (cb->active == 0) {
3350 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3356 } while (++next_port <= last_port);
3358 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3363 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3364 enum rte_eth_event_type event, void *ret_param)
3366 struct rte_eth_dev_callback *cb_lst;
3367 struct rte_eth_dev_callback dev_cb;
3370 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3371 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3372 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3376 if (ret_param != NULL)
3377 dev_cb.ret_param = ret_param;
3379 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3380 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3381 dev_cb.cb_arg, dev_cb.ret_param);
3382 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3385 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3390 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3395 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3397 dev->state = RTE_ETH_DEV_ATTACHED;
3401 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3404 struct rte_eth_dev *dev;
3405 struct rte_intr_handle *intr_handle;
3409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3411 dev = &rte_eth_devices[port_id];
3413 if (!dev->intr_handle) {
3414 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3418 intr_handle = dev->intr_handle;
3419 if (!intr_handle->intr_vec) {
3420 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3424 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3425 vec = intr_handle->intr_vec[qid];
3426 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3427 if (rc && rc != -EEXIST) {
3429 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3430 port_id, qid, op, epfd, vec);
3437 int __rte_experimental
3438 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3440 struct rte_intr_handle *intr_handle;
3441 struct rte_eth_dev *dev;
3442 unsigned int efd_idx;
3446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3448 dev = &rte_eth_devices[port_id];
3450 if (queue_id >= dev->data->nb_rx_queues) {
3451 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3455 if (!dev->intr_handle) {
3456 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3460 intr_handle = dev->intr_handle;
3461 if (!intr_handle->intr_vec) {
3462 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3466 vec = intr_handle->intr_vec[queue_id];
3467 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3468 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3469 fd = intr_handle->efds[efd_idx];
3474 const struct rte_memzone *
3475 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3476 uint16_t queue_id, size_t size, unsigned align,
3479 char z_name[RTE_MEMZONE_NAMESIZE];
3480 const struct rte_memzone *mz;
3482 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3483 dev->device->driver->name, ring_name,
3484 dev->data->port_id, queue_id);
3486 mz = rte_memzone_lookup(z_name);
3490 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3491 RTE_MEMZONE_IOVA_CONTIG, align);
3494 int __rte_experimental
3495 rte_eth_dev_create(struct rte_device *device, const char *name,
3496 size_t priv_data_size,
3497 ethdev_bus_specific_init ethdev_bus_specific_init,
3498 void *bus_init_params,
3499 ethdev_init_t ethdev_init, void *init_params)
3501 struct rte_eth_dev *ethdev;
3504 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3506 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3507 ethdev = rte_eth_dev_allocate(name);
3511 if (priv_data_size) {
3512 ethdev->data->dev_private = rte_zmalloc_socket(
3513 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3516 if (!ethdev->data->dev_private) {
3517 RTE_LOG(ERR, EAL, "failed to allocate private data");
3519 goto data_alloc_failed;
3523 ethdev = rte_eth_dev_attach_secondary(name);
3525 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3526 "ethdev doesn't exist");
3531 ethdev->device = device;
3533 if (ethdev_bus_specific_init) {
3534 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3537 "ethdev bus specific initialisation failed");
3542 retval = ethdev_init(ethdev, init_params);
3544 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3548 rte_eth_dev_probing_finish(ethdev);
3552 /* free ports private data if primary process */
3553 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3554 rte_free(ethdev->data->dev_private);
3557 rte_eth_dev_release_port(ethdev);
3562 int __rte_experimental
3563 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3564 ethdev_uninit_t ethdev_uninit)
3568 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3572 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3573 if (ethdev_uninit) {
3574 ret = ethdev_uninit(ethdev);
3579 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3580 rte_free(ethdev->data->dev_private);
3582 ethdev->data->dev_private = NULL;
3584 return rte_eth_dev_release_port(ethdev);
3588 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3589 int epfd, int op, void *data)
3592 struct rte_eth_dev *dev;
3593 struct rte_intr_handle *intr_handle;
3596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3598 dev = &rte_eth_devices[port_id];
3599 if (queue_id >= dev->data->nb_rx_queues) {
3600 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3604 if (!dev->intr_handle) {
3605 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3609 intr_handle = dev->intr_handle;
3610 if (!intr_handle->intr_vec) {
3611 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3615 vec = intr_handle->intr_vec[queue_id];
3616 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3617 if (rc && rc != -EEXIST) {
3619 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3620 port_id, queue_id, op, epfd, vec);
3628 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3631 struct rte_eth_dev *dev;
3633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3635 dev = &rte_eth_devices[port_id];
3637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3638 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3643 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3646 struct rte_eth_dev *dev;
3648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3650 dev = &rte_eth_devices[port_id];
3652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3653 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3659 rte_eth_dev_filter_supported(uint16_t port_id,
3660 enum rte_filter_type filter_type)
3662 struct rte_eth_dev *dev;
3664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3666 dev = &rte_eth_devices[port_id];
3667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3668 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3669 RTE_ETH_FILTER_NOP, NULL);
3673 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3674 enum rte_filter_op filter_op, void *arg)
3676 struct rte_eth_dev *dev;
3678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3680 dev = &rte_eth_devices[port_id];
3681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3682 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3686 const struct rte_eth_rxtx_callback *
3687 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3688 rte_rx_callback_fn fn, void *user_param)
3690 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3691 rte_errno = ENOTSUP;
3694 /* check input parameters */
3695 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3696 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3700 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3708 cb->param = user_param;
3710 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3711 /* Add the callbacks in fifo order. */
3712 struct rte_eth_rxtx_callback *tail =
3713 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3716 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3723 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3728 const struct rte_eth_rxtx_callback *
3729 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3730 rte_rx_callback_fn fn, void *user_param)
3732 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3733 rte_errno = ENOTSUP;
3736 /* check input parameters */
3737 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3738 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3743 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3751 cb->param = user_param;
3753 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3754 /* Add the callbacks at fisrt position*/
3755 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3757 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3758 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3763 const struct rte_eth_rxtx_callback *
3764 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3765 rte_tx_callback_fn fn, void *user_param)
3767 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3768 rte_errno = ENOTSUP;
3771 /* check input parameters */
3772 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3773 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3778 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3786 cb->param = user_param;
3788 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3789 /* Add the callbacks in fifo order. */
3790 struct rte_eth_rxtx_callback *tail =
3791 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3794 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3801 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3807 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3808 const struct rte_eth_rxtx_callback *user_cb)
3810 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3813 /* Check input parameters. */
3814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3815 if (user_cb == NULL ||
3816 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3819 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3820 struct rte_eth_rxtx_callback *cb;
3821 struct rte_eth_rxtx_callback **prev_cb;
3824 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3825 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3826 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3828 if (cb == user_cb) {
3829 /* Remove the user cb from the callback list. */
3830 *prev_cb = cb->next;
3835 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3841 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3842 const struct rte_eth_rxtx_callback *user_cb)
3844 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3847 /* Check input parameters. */
3848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3849 if (user_cb == NULL ||
3850 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3853 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3855 struct rte_eth_rxtx_callback *cb;
3856 struct rte_eth_rxtx_callback **prev_cb;
3858 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3859 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3860 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3862 if (cb == user_cb) {
3863 /* Remove the user cb from the callback list. */
3864 *prev_cb = cb->next;
3869 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3875 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3876 struct rte_eth_rxq_info *qinfo)
3878 struct rte_eth_dev *dev;
3880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3885 dev = &rte_eth_devices[port_id];
3886 if (queue_id >= dev->data->nb_rx_queues) {
3887 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3893 memset(qinfo, 0, sizeof(*qinfo));
3894 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3899 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3900 struct rte_eth_txq_info *qinfo)
3902 struct rte_eth_dev *dev;
3904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3909 dev = &rte_eth_devices[port_id];
3910 if (queue_id >= dev->data->nb_tx_queues) {
3911 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3917 memset(qinfo, 0, sizeof(*qinfo));
3918 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3924 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3925 struct ether_addr *mc_addr_set,
3926 uint32_t nb_mc_addr)
3928 struct rte_eth_dev *dev;
3930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3932 dev = &rte_eth_devices[port_id];
3933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3934 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3935 mc_addr_set, nb_mc_addr));
3939 rte_eth_timesync_enable(uint16_t port_id)
3941 struct rte_eth_dev *dev;
3943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3944 dev = &rte_eth_devices[port_id];
3946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3947 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3951 rte_eth_timesync_disable(uint16_t port_id)
3953 struct rte_eth_dev *dev;
3955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3956 dev = &rte_eth_devices[port_id];
3958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3959 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3963 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3966 struct rte_eth_dev *dev;
3968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3969 dev = &rte_eth_devices[port_id];
3971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3972 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3973 (dev, timestamp, flags));
3977 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3978 struct timespec *timestamp)
3980 struct rte_eth_dev *dev;
3982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3983 dev = &rte_eth_devices[port_id];
3985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3986 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3991 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3993 struct rte_eth_dev *dev;
3995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3996 dev = &rte_eth_devices[port_id];
3998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3999 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4004 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4006 struct rte_eth_dev *dev;
4008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4009 dev = &rte_eth_devices[port_id];
4011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4012 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4017 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4019 struct rte_eth_dev *dev;
4021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4022 dev = &rte_eth_devices[port_id];
4024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4025 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4030 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4032 struct rte_eth_dev *dev;
4034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4036 dev = &rte_eth_devices[port_id];
4037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4038 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4042 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4044 struct rte_eth_dev *dev;
4046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4048 dev = &rte_eth_devices[port_id];
4049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4050 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4054 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4056 struct rte_eth_dev *dev;
4058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4060 dev = &rte_eth_devices[port_id];
4061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4062 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4066 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4068 struct rte_eth_dev *dev;
4070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4072 dev = &rte_eth_devices[port_id];
4073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4074 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4077 int __rte_experimental
4078 rte_eth_dev_get_module_info(uint16_t port_id,
4079 struct rte_eth_dev_module_info *modinfo)
4081 struct rte_eth_dev *dev;
4083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4085 dev = &rte_eth_devices[port_id];
4086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4087 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4090 int __rte_experimental
4091 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4092 struct rte_dev_eeprom_info *info)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4098 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4100 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4104 rte_eth_dev_get_dcb_info(uint16_t port_id,
4105 struct rte_eth_dcb_info *dcb_info)
4107 struct rte_eth_dev *dev;
4109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4111 dev = &rte_eth_devices[port_id];
4112 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4115 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4119 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4120 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4122 struct rte_eth_dev *dev;
4124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4125 if (l2_tunnel == NULL) {
4126 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4130 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4131 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4135 dev = &rte_eth_devices[port_id];
4136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4138 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4143 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4144 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4148 struct rte_eth_dev *dev;
4150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4152 if (l2_tunnel == NULL) {
4153 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4157 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4158 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4163 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4167 dev = &rte_eth_devices[port_id];
4168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4170 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4171 l2_tunnel, mask, en));
4175 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4176 const struct rte_eth_desc_lim *desc_lim)
4178 if (desc_lim->nb_align != 0)
4179 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4181 if (desc_lim->nb_max != 0)
4182 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4184 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4188 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4189 uint16_t *nb_rx_desc,
4190 uint16_t *nb_tx_desc)
4192 struct rte_eth_dev *dev;
4193 struct rte_eth_dev_info dev_info;
4195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4197 dev = &rte_eth_devices[port_id];
4198 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4200 rte_eth_dev_info_get(port_id, &dev_info);
4202 if (nb_rx_desc != NULL)
4203 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4205 if (nb_tx_desc != NULL)
4206 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4212 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4214 struct rte_eth_dev *dev;
4216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4221 dev = &rte_eth_devices[port_id];
4223 if (*dev->dev_ops->pool_ops_supported == NULL)
4224 return 1; /* all pools are supported */
4226 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4230 * A set of values to describe the possible states of a switch domain.
4232 enum rte_eth_switch_domain_state {
4233 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4234 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4238 * Array of switch domains available for allocation. Array is sized to
4239 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4240 * ethdev ports in a single process.
4242 struct rte_eth_dev_switch {
4243 enum rte_eth_switch_domain_state state;
4244 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4246 int __rte_experimental
4247 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4251 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4253 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4254 i < RTE_MAX_ETHPORTS; i++) {
4255 if (rte_eth_switch_domains[i].state ==
4256 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4257 rte_eth_switch_domains[i].state =
4258 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4267 int __rte_experimental
4268 rte_eth_switch_domain_free(uint16_t domain_id)
4270 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4271 domain_id >= RTE_MAX_ETHPORTS)
4274 if (rte_eth_switch_domains[domain_id].state !=
4275 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4278 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4283 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4286 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4289 struct rte_kvargs_pair *pair;
4292 arglist->str = strdup(str_in);
4293 if (arglist->str == NULL)
4296 letter = arglist->str;
4299 pair = &arglist->pairs[0];
4302 case 0: /* Initial */
4305 else if (*letter == '\0')
4312 case 1: /* Parsing key */
4313 if (*letter == '=') {
4315 pair->value = letter + 1;
4317 } else if (*letter == ',' || *letter == '\0')
4322 case 2: /* Parsing value */
4325 else if (*letter == ',') {
4328 pair = &arglist->pairs[arglist->count];
4330 } else if (*letter == '\0') {
4333 pair = &arglist->pairs[arglist->count];
4338 case 3: /* Parsing list */
4341 else if (*letter == '\0')
4350 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4358 /* Single element, not a list */
4359 return callback(str, data);
4361 /* Sanity check, then strip the brackets */
4362 str_start = &str[strlen(str) - 1];
4363 if (*str_start != ']') {
4364 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4370 /* Process list elements */
4380 } else if (state == 1) {
4381 if (*str == ',' || *str == '\0') {
4382 if (str > str_start) {
4383 /* Non-empty string fragment */
4385 result = callback(str_start, data);
4398 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4399 const uint16_t max_list)
4401 uint16_t lo, hi, val;
4404 result = sscanf(str, "%hu-%hu", &lo, &hi);
4406 if (*len_list >= max_list)
4408 list[(*len_list)++] = lo;
4409 } else if (result == 2) {
4410 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4412 for (val = lo; val <= hi; val++) {
4413 if (*len_list >= max_list)
4415 list[(*len_list)++] = val;
4424 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4426 struct rte_eth_devargs *eth_da = data;
4428 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4429 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4432 int __rte_experimental
4433 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4435 struct rte_kvargs args;
4436 struct rte_kvargs_pair *pair;
4440 memset(eth_da, 0, sizeof(*eth_da));
4442 result = rte_eth_devargs_tokenise(&args, dargs);
4446 for (i = 0; i < args.count; i++) {
4447 pair = &args.pairs[i];
4448 if (strcmp("representor", pair->key) == 0) {
4449 result = rte_eth_devargs_parse_list(pair->value,
4450 rte_eth_devargs_parse_representor_ports,
4464 RTE_INIT(ethdev_init_log)
4466 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4467 if (rte_eth_dev_logtype >= 0)
4468 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);