1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
696 rte_eth_dev_shared_data_prepare();
698 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
700 if (rte_eth_is_valid_owner_id(owner_id)) {
701 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
702 if (rte_eth_devices[port_id].data->owner.id == owner_id)
703 memset(&rte_eth_devices[port_id].data->owner, 0,
704 sizeof(struct rte_eth_dev_owner));
705 RTE_ETHDEV_LOG(NOTICE,
706 "All port owners owned by %016"PRIx64" identifier have removed\n",
710 "Invalid owner id=%016"PRIx64"\n",
715 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
721 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
724 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
726 rte_eth_dev_shared_data_prepare();
728 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
730 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
731 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
735 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
738 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
743 rte_eth_dev_socket_id(uint16_t port_id)
745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
746 return rte_eth_devices[port_id].data->numa_node;
750 rte_eth_dev_get_sec_ctx(uint16_t port_id)
752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
753 return rte_eth_devices[port_id].security_ctx;
757 rte_eth_dev_count(void)
759 return rte_eth_dev_count_avail();
763 rte_eth_dev_count_avail(void)
770 RTE_ETH_FOREACH_DEV(p)
777 rte_eth_dev_count_total(void)
779 uint16_t port, count = 0;
781 RTE_ETH_FOREACH_VALID_DEV(port)
788 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
795 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
799 /* shouldn't check 'rte_eth_devices[i].data',
800 * because it might be overwritten by VDEV PMD */
801 tmp = rte_eth_dev_shared_data->data[port_id].name;
807 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
812 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
816 RTE_ETH_FOREACH_VALID_DEV(pid)
817 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
826 eth_err(uint16_t port_id, int ret)
830 if (rte_eth_dev_is_removed(port_id))
836 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
838 uint16_t old_nb_queues = dev->data->nb_rx_queues;
842 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
843 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
844 sizeof(dev->data->rx_queues[0]) * nb_queues,
845 RTE_CACHE_LINE_SIZE);
846 if (dev->data->rx_queues == NULL) {
847 dev->data->nb_rx_queues = 0;
850 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
853 rxq = dev->data->rx_queues;
855 for (i = nb_queues; i < old_nb_queues; i++)
856 (*dev->dev_ops->rx_queue_release)(rxq[i]);
857 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
858 RTE_CACHE_LINE_SIZE);
861 if (nb_queues > old_nb_queues) {
862 uint16_t new_qs = nb_queues - old_nb_queues;
864 memset(rxq + old_nb_queues, 0,
865 sizeof(rxq[0]) * new_qs);
868 dev->data->rx_queues = rxq;
870 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
873 rxq = dev->data->rx_queues;
875 for (i = nb_queues; i < old_nb_queues; i++)
876 (*dev->dev_ops->rx_queue_release)(rxq[i]);
878 rte_free(dev->data->rx_queues);
879 dev->data->rx_queues = NULL;
881 dev->data->nb_rx_queues = nb_queues;
886 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
888 struct rte_eth_dev *dev;
890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
892 dev = &rte_eth_devices[port_id];
893 if (!dev->data->dev_started) {
895 "Port %u must be started before start any queue\n",
900 if (rx_queue_id >= dev->data->nb_rx_queues) {
901 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
907 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
909 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
910 rx_queue_id, port_id);
914 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
920 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
922 struct rte_eth_dev *dev;
924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926 dev = &rte_eth_devices[port_id];
927 if (rx_queue_id >= dev->data->nb_rx_queues) {
928 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
934 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
936 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
937 rx_queue_id, port_id);
941 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
946 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
948 struct rte_eth_dev *dev;
950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
952 dev = &rte_eth_devices[port_id];
953 if (!dev->data->dev_started) {
955 "Port %u must be started before start any queue\n",
960 if (tx_queue_id >= dev->data->nb_tx_queues) {
961 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
967 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
969 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
970 tx_queue_id, port_id);
974 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
978 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
980 struct rte_eth_dev *dev;
982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
984 dev = &rte_eth_devices[port_id];
985 if (tx_queue_id >= dev->data->nb_tx_queues) {
986 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
992 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
994 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
995 tx_queue_id, port_id);
999 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1004 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1006 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1010 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1011 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1012 sizeof(dev->data->tx_queues[0]) * nb_queues,
1013 RTE_CACHE_LINE_SIZE);
1014 if (dev->data->tx_queues == NULL) {
1015 dev->data->nb_tx_queues = 0;
1018 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1021 txq = dev->data->tx_queues;
1023 for (i = nb_queues; i < old_nb_queues; i++)
1024 (*dev->dev_ops->tx_queue_release)(txq[i]);
1025 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1026 RTE_CACHE_LINE_SIZE);
1029 if (nb_queues > old_nb_queues) {
1030 uint16_t new_qs = nb_queues - old_nb_queues;
1032 memset(txq + old_nb_queues, 0,
1033 sizeof(txq[0]) * new_qs);
1036 dev->data->tx_queues = txq;
1038 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1041 txq = dev->data->tx_queues;
1043 for (i = nb_queues; i < old_nb_queues; i++)
1044 (*dev->dev_ops->tx_queue_release)(txq[i]);
1046 rte_free(dev->data->tx_queues);
1047 dev->data->tx_queues = NULL;
1049 dev->data->nb_tx_queues = nb_queues;
1054 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1057 case ETH_SPEED_NUM_10M:
1058 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1059 case ETH_SPEED_NUM_100M:
1060 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1061 case ETH_SPEED_NUM_1G:
1062 return ETH_LINK_SPEED_1G;
1063 case ETH_SPEED_NUM_2_5G:
1064 return ETH_LINK_SPEED_2_5G;
1065 case ETH_SPEED_NUM_5G:
1066 return ETH_LINK_SPEED_5G;
1067 case ETH_SPEED_NUM_10G:
1068 return ETH_LINK_SPEED_10G;
1069 case ETH_SPEED_NUM_20G:
1070 return ETH_LINK_SPEED_20G;
1071 case ETH_SPEED_NUM_25G:
1072 return ETH_LINK_SPEED_25G;
1073 case ETH_SPEED_NUM_40G:
1074 return ETH_LINK_SPEED_40G;
1075 case ETH_SPEED_NUM_50G:
1076 return ETH_LINK_SPEED_50G;
1077 case ETH_SPEED_NUM_56G:
1078 return ETH_LINK_SPEED_56G;
1079 case ETH_SPEED_NUM_100G:
1080 return ETH_LINK_SPEED_100G;
1087 rte_eth_dev_rx_offload_name(uint64_t offload)
1089 const char *name = "UNKNOWN";
1092 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1093 if (offload == rte_rx_offload_names[i].offload) {
1094 name = rte_rx_offload_names[i].name;
1103 rte_eth_dev_tx_offload_name(uint64_t offload)
1105 const char *name = "UNKNOWN";
1108 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1109 if (offload == rte_tx_offload_names[i].offload) {
1110 name = rte_tx_offload_names[i].name;
1119 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1120 const struct rte_eth_conf *dev_conf)
1122 struct rte_eth_dev *dev;
1123 struct rte_eth_dev_info dev_info;
1124 struct rte_eth_conf orig_conf;
1128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1130 dev = &rte_eth_devices[port_id];
1132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1134 if (dev->data->dev_started) {
1136 "Port %u must be stopped to allow configuration\n",
1141 /* Store original config, as rollback required on failure */
1142 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1145 * Copy the dev_conf parameter into the dev structure.
1146 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1148 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1150 ret = rte_eth_dev_info_get(port_id, &dev_info);
1154 /* If number of queues specified by application for both Rx and Tx is
1155 * zero, use driver preferred values. This cannot be done individually
1156 * as it is valid for either Tx or Rx (but not both) to be zero.
1157 * If driver does not provide any preferred valued, fall back on
1160 if (nb_rx_q == 0 && nb_tx_q == 0) {
1161 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1163 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1164 nb_tx_q = dev_info.default_txportconf.nb_queues;
1166 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1169 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1171 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1172 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1177 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1179 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1180 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1186 * Check that the numbers of RX and TX queues are not greater
1187 * than the maximum number of RX and TX queues supported by the
1188 * configured device.
1190 if (nb_rx_q > dev_info.max_rx_queues) {
1191 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1192 port_id, nb_rx_q, dev_info.max_rx_queues);
1197 if (nb_tx_q > dev_info.max_tx_queues) {
1198 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1199 port_id, nb_tx_q, dev_info.max_tx_queues);
1204 /* Check that the device supports requested interrupts */
1205 if ((dev_conf->intr_conf.lsc == 1) &&
1206 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1207 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1208 dev->device->driver->name);
1212 if ((dev_conf->intr_conf.rmv == 1) &&
1213 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1214 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1215 dev->device->driver->name);
1221 * If jumbo frames are enabled, check that the maximum RX packet
1222 * length is supported by the configured device.
1224 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1225 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1227 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1228 port_id, dev_conf->rxmode.max_rx_pkt_len,
1229 dev_info.max_rx_pktlen);
1232 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1234 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1235 port_id, dev_conf->rxmode.max_rx_pkt_len,
1236 (unsigned int)RTE_ETHER_MIN_LEN);
1241 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1242 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1243 /* Use default value */
1244 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1248 /* Any requested offloading must be within its device capabilities */
1249 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1250 dev_conf->rxmode.offloads) {
1252 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1253 "capabilities 0x%"PRIx64" in %s()\n",
1254 port_id, dev_conf->rxmode.offloads,
1255 dev_info.rx_offload_capa,
1260 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1261 dev_conf->txmode.offloads) {
1263 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1264 "capabilities 0x%"PRIx64" in %s()\n",
1265 port_id, dev_conf->txmode.offloads,
1266 dev_info.tx_offload_capa,
1272 /* Check that device supports requested rss hash functions. */
1273 if ((dev_info.flow_type_rss_offloads |
1274 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1275 dev_info.flow_type_rss_offloads) {
1277 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1278 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1279 dev_info.flow_type_rss_offloads);
1285 * Setup new number of RX/TX queues and reconfigure device.
1287 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1290 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1296 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1299 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1301 rte_eth_dev_rx_queue_config(dev, 0);
1306 diag = (*dev->dev_ops->dev_configure)(dev);
1308 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1310 rte_eth_dev_rx_queue_config(dev, 0);
1311 rte_eth_dev_tx_queue_config(dev, 0);
1312 ret = eth_err(port_id, diag);
1316 /* Initialize Rx profiling if enabled at compilation time. */
1317 diag = __rte_eth_dev_profile_init(port_id, dev);
1319 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1321 rte_eth_dev_rx_queue_config(dev, 0);
1322 rte_eth_dev_tx_queue_config(dev, 0);
1323 ret = eth_err(port_id, diag);
1330 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1336 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1338 if (dev->data->dev_started) {
1339 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1340 dev->data->port_id);
1344 rte_eth_dev_rx_queue_config(dev, 0);
1345 rte_eth_dev_tx_queue_config(dev, 0);
1347 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1351 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1352 struct rte_eth_dev_info *dev_info)
1354 struct rte_ether_addr *addr;
1359 /* replay MAC address configuration including default MAC */
1360 addr = &dev->data->mac_addrs[0];
1361 if (*dev->dev_ops->mac_addr_set != NULL)
1362 (*dev->dev_ops->mac_addr_set)(dev, addr);
1363 else if (*dev->dev_ops->mac_addr_add != NULL)
1364 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1366 if (*dev->dev_ops->mac_addr_add != NULL) {
1367 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1368 addr = &dev->data->mac_addrs[i];
1370 /* skip zero address */
1371 if (rte_is_zero_ether_addr(addr))
1375 pool_mask = dev->data->mac_pool_sel[i];
1378 if (pool_mask & 1ULL)
1379 (*dev->dev_ops->mac_addr_add)(dev,
1383 } while (pool_mask);
1389 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1390 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1394 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1395 rte_eth_dev_mac_restore(dev, dev_info);
1397 /* replay promiscuous configuration */
1399 * use callbacks directly since we don't need port_id check and
1400 * would like to bypass the same value set
1402 if (rte_eth_promiscuous_get(port_id) == 1 &&
1403 *dev->dev_ops->promiscuous_enable != NULL) {
1404 ret = eth_err(port_id,
1405 (*dev->dev_ops->promiscuous_enable)(dev));
1406 if (ret != 0 && ret != -ENOTSUP) {
1408 "Failed to enable promiscuous mode for device (port %u): %s\n",
1409 port_id, rte_strerror(-ret));
1412 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1413 *dev->dev_ops->promiscuous_disable != NULL) {
1414 ret = eth_err(port_id,
1415 (*dev->dev_ops->promiscuous_disable)(dev));
1416 if (ret != 0 && ret != -ENOTSUP) {
1418 "Failed to disable promiscuous mode for device (port %u): %s\n",
1419 port_id, rte_strerror(-ret));
1424 /* replay all multicast configuration */
1425 if (rte_eth_allmulticast_get(port_id) == 1)
1426 rte_eth_allmulticast_enable(port_id);
1427 else if (rte_eth_allmulticast_get(port_id) == 0)
1428 rte_eth_allmulticast_disable(port_id);
1434 rte_eth_dev_start(uint16_t port_id)
1436 struct rte_eth_dev *dev;
1437 struct rte_eth_dev_info dev_info;
1441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1443 dev = &rte_eth_devices[port_id];
1445 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1447 if (dev->data->dev_started != 0) {
1448 RTE_ETHDEV_LOG(INFO,
1449 "Device with port_id=%"PRIu16" already started\n",
1454 ret = rte_eth_dev_info_get(port_id, &dev_info);
1458 /* Lets restore MAC now if device does not support live change */
1459 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1460 rte_eth_dev_mac_restore(dev, &dev_info);
1462 diag = (*dev->dev_ops->dev_start)(dev);
1464 dev->data->dev_started = 1;
1466 return eth_err(port_id, diag);
1468 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1471 "Error during restoring configuration for device (port %u): %s\n",
1472 port_id, rte_strerror(-ret));
1473 rte_eth_dev_stop(port_id);
1477 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1479 (*dev->dev_ops->link_update)(dev, 0);
1485 rte_eth_dev_stop(uint16_t port_id)
1487 struct rte_eth_dev *dev;
1489 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1490 dev = &rte_eth_devices[port_id];
1492 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1494 if (dev->data->dev_started == 0) {
1495 RTE_ETHDEV_LOG(INFO,
1496 "Device with port_id=%"PRIu16" already stopped\n",
1501 dev->data->dev_started = 0;
1502 (*dev->dev_ops->dev_stop)(dev);
1506 rte_eth_dev_set_link_up(uint16_t port_id)
1508 struct rte_eth_dev *dev;
1510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1512 dev = &rte_eth_devices[port_id];
1514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1515 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1519 rte_eth_dev_set_link_down(uint16_t port_id)
1521 struct rte_eth_dev *dev;
1523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1525 dev = &rte_eth_devices[port_id];
1527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1528 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1532 rte_eth_dev_close(uint16_t port_id)
1534 struct rte_eth_dev *dev;
1536 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1537 dev = &rte_eth_devices[port_id];
1539 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1540 dev->data->dev_started = 0;
1541 (*dev->dev_ops->dev_close)(dev);
1543 /* check behaviour flag - temporary for PMD migration */
1544 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1545 /* new behaviour: send event + reset state + free all data */
1546 rte_eth_dev_release_port(dev);
1549 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1550 "The driver %s should migrate to the new behaviour.\n",
1551 dev->device->driver->name);
1552 /* old behaviour: only free queue arrays */
1553 dev->data->nb_rx_queues = 0;
1554 rte_free(dev->data->rx_queues);
1555 dev->data->rx_queues = NULL;
1556 dev->data->nb_tx_queues = 0;
1557 rte_free(dev->data->tx_queues);
1558 dev->data->tx_queues = NULL;
1562 rte_eth_dev_reset(uint16_t port_id)
1564 struct rte_eth_dev *dev;
1567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1568 dev = &rte_eth_devices[port_id];
1570 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1572 rte_eth_dev_stop(port_id);
1573 ret = dev->dev_ops->dev_reset(dev);
1575 return eth_err(port_id, ret);
1579 rte_eth_dev_is_removed(uint16_t port_id)
1581 struct rte_eth_dev *dev;
1584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1586 dev = &rte_eth_devices[port_id];
1588 if (dev->state == RTE_ETH_DEV_REMOVED)
1591 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1593 ret = dev->dev_ops->is_removed(dev);
1595 /* Device is physically removed. */
1596 dev->state = RTE_ETH_DEV_REMOVED;
1602 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1603 uint16_t nb_rx_desc, unsigned int socket_id,
1604 const struct rte_eth_rxconf *rx_conf,
1605 struct rte_mempool *mp)
1608 uint32_t mbp_buf_size;
1609 struct rte_eth_dev *dev;
1610 struct rte_eth_dev_info dev_info;
1611 struct rte_eth_rxconf local_conf;
1614 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1616 dev = &rte_eth_devices[port_id];
1617 if (rx_queue_id >= dev->data->nb_rx_queues) {
1618 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1623 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1627 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1630 * Check the size of the mbuf data buffer.
1631 * This value must be provided in the private data of the memory pool.
1632 * First check that the memory pool has a valid private data.
1634 ret = rte_eth_dev_info_get(port_id, &dev_info);
1638 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1639 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1640 mp->name, (int)mp->private_data_size,
1641 (int)sizeof(struct rte_pktmbuf_pool_private));
1644 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1646 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1648 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1649 mp->name, (int)mbp_buf_size,
1650 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1651 (int)RTE_PKTMBUF_HEADROOM,
1652 (int)dev_info.min_rx_bufsize);
1656 /* Use default specified by driver, if nb_rx_desc is zero */
1657 if (nb_rx_desc == 0) {
1658 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1659 /* If driver default is also zero, fall back on EAL default */
1660 if (nb_rx_desc == 0)
1661 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1664 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1665 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1666 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1669 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1670 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1671 dev_info.rx_desc_lim.nb_min,
1672 dev_info.rx_desc_lim.nb_align);
1676 if (dev->data->dev_started &&
1677 !(dev_info.dev_capa &
1678 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1681 if (dev->data->dev_started &&
1682 (dev->data->rx_queue_state[rx_queue_id] !=
1683 RTE_ETH_QUEUE_STATE_STOPPED))
1686 rxq = dev->data->rx_queues;
1687 if (rxq[rx_queue_id]) {
1688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1690 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1691 rxq[rx_queue_id] = NULL;
1694 if (rx_conf == NULL)
1695 rx_conf = &dev_info.default_rxconf;
1697 local_conf = *rx_conf;
1700 * If an offloading has already been enabled in
1701 * rte_eth_dev_configure(), it has been enabled on all queues,
1702 * so there is no need to enable it in this queue again.
1703 * The local_conf.offloads input to underlying PMD only carries
1704 * those offloadings which are only enabled on this queue and
1705 * not enabled on all queues.
1707 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1710 * New added offloadings for this queue are those not enabled in
1711 * rte_eth_dev_configure() and they must be per-queue type.
1712 * A pure per-port offloading can't be enabled on a queue while
1713 * disabled on another queue. A pure per-port offloading can't
1714 * be enabled for any queue as new added one if it hasn't been
1715 * enabled in rte_eth_dev_configure().
1717 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1718 local_conf.offloads) {
1720 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1721 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1722 port_id, rx_queue_id, local_conf.offloads,
1723 dev_info.rx_queue_offload_capa,
1728 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1729 socket_id, &local_conf, mp);
1731 if (!dev->data->min_rx_buf_size ||
1732 dev->data->min_rx_buf_size > mbp_buf_size)
1733 dev->data->min_rx_buf_size = mbp_buf_size;
1736 return eth_err(port_id, ret);
1740 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1741 uint16_t nb_tx_desc, unsigned int socket_id,
1742 const struct rte_eth_txconf *tx_conf)
1744 struct rte_eth_dev *dev;
1745 struct rte_eth_dev_info dev_info;
1746 struct rte_eth_txconf local_conf;
1750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1752 dev = &rte_eth_devices[port_id];
1753 if (tx_queue_id >= dev->data->nb_tx_queues) {
1754 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1760 ret = rte_eth_dev_info_get(port_id, &dev_info);
1764 /* Use default specified by driver, if nb_tx_desc is zero */
1765 if (nb_tx_desc == 0) {
1766 nb_tx_desc = dev_info.default_txportconf.ring_size;
1767 /* If driver default is zero, fall back on EAL default */
1768 if (nb_tx_desc == 0)
1769 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1771 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1772 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1773 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1775 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1776 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1777 dev_info.tx_desc_lim.nb_min,
1778 dev_info.tx_desc_lim.nb_align);
1782 if (dev->data->dev_started &&
1783 !(dev_info.dev_capa &
1784 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1787 if (dev->data->dev_started &&
1788 (dev->data->tx_queue_state[tx_queue_id] !=
1789 RTE_ETH_QUEUE_STATE_STOPPED))
1792 txq = dev->data->tx_queues;
1793 if (txq[tx_queue_id]) {
1794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1796 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1797 txq[tx_queue_id] = NULL;
1800 if (tx_conf == NULL)
1801 tx_conf = &dev_info.default_txconf;
1803 local_conf = *tx_conf;
1806 * If an offloading has already been enabled in
1807 * rte_eth_dev_configure(), it has been enabled on all queues,
1808 * so there is no need to enable it in this queue again.
1809 * The local_conf.offloads input to underlying PMD only carries
1810 * those offloadings which are only enabled on this queue and
1811 * not enabled on all queues.
1813 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1816 * New added offloadings for this queue are those not enabled in
1817 * rte_eth_dev_configure() and they must be per-queue type.
1818 * A pure per-port offloading can't be enabled on a queue while
1819 * disabled on another queue. A pure per-port offloading can't
1820 * be enabled for any queue as new added one if it hasn't been
1821 * enabled in rte_eth_dev_configure().
1823 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1824 local_conf.offloads) {
1826 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1827 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1828 port_id, tx_queue_id, local_conf.offloads,
1829 dev_info.tx_queue_offload_capa,
1834 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1835 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1839 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1840 void *userdata __rte_unused)
1844 for (i = 0; i < unsent; i++)
1845 rte_pktmbuf_free(pkts[i]);
1849 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1852 uint64_t *count = userdata;
1855 for (i = 0; i < unsent; i++)
1856 rte_pktmbuf_free(pkts[i]);
1862 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1863 buffer_tx_error_fn cbfn, void *userdata)
1865 buffer->error_callback = cbfn;
1866 buffer->error_userdata = userdata;
1871 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1878 buffer->size = size;
1879 if (buffer->error_callback == NULL) {
1880 ret = rte_eth_tx_buffer_set_err_callback(
1881 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1888 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1890 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1893 /* Validate Input Data. Bail if not valid or not supported. */
1894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1897 /* Call driver to free pending mbufs. */
1898 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1900 return eth_err(port_id, ret);
1904 rte_eth_promiscuous_enable(uint16_t port_id)
1906 struct rte_eth_dev *dev;
1909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1910 dev = &rte_eth_devices[port_id];
1912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
1914 if (dev->data->promiscuous == 0) {
1915 diag = (*dev->dev_ops->promiscuous_enable)(dev);
1916 dev->data->promiscuous = (diag == 0) ? 1 : 0;
1919 return eth_err(port_id, diag);
1923 rte_eth_promiscuous_disable(uint16_t port_id)
1925 struct rte_eth_dev *dev;
1928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1929 dev = &rte_eth_devices[port_id];
1931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
1933 if (dev->data->promiscuous == 1) {
1934 dev->data->promiscuous = 0;
1935 diag = (*dev->dev_ops->promiscuous_disable)(dev);
1937 dev->data->promiscuous = 1;
1940 return eth_err(port_id, diag);
1944 rte_eth_promiscuous_get(uint16_t port_id)
1946 struct rte_eth_dev *dev;
1948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1950 dev = &rte_eth_devices[port_id];
1951 return dev->data->promiscuous;
1955 rte_eth_allmulticast_enable(uint16_t port_id)
1957 struct rte_eth_dev *dev;
1959 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1960 dev = &rte_eth_devices[port_id];
1962 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1963 (*dev->dev_ops->allmulticast_enable)(dev);
1964 dev->data->all_multicast = 1;
1968 rte_eth_allmulticast_disable(uint16_t port_id)
1970 struct rte_eth_dev *dev;
1972 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1973 dev = &rte_eth_devices[port_id];
1975 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1976 dev->data->all_multicast = 0;
1977 (*dev->dev_ops->allmulticast_disable)(dev);
1981 rte_eth_allmulticast_get(uint16_t port_id)
1983 struct rte_eth_dev *dev;
1985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1987 dev = &rte_eth_devices[port_id];
1988 return dev->data->all_multicast;
1992 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1994 struct rte_eth_dev *dev;
1996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1997 dev = &rte_eth_devices[port_id];
1999 if (dev->data->dev_conf.intr_conf.lsc &&
2000 dev->data->dev_started)
2001 rte_eth_linkstatus_get(dev, eth_link);
2003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2004 (*dev->dev_ops->link_update)(dev, 1);
2005 *eth_link = dev->data->dev_link;
2012 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2014 struct rte_eth_dev *dev;
2016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2017 dev = &rte_eth_devices[port_id];
2019 if (dev->data->dev_conf.intr_conf.lsc &&
2020 dev->data->dev_started)
2021 rte_eth_linkstatus_get(dev, eth_link);
2023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2024 (*dev->dev_ops->link_update)(dev, 0);
2025 *eth_link = dev->data->dev_link;
2032 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2034 struct rte_eth_dev *dev;
2036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2038 dev = &rte_eth_devices[port_id];
2039 memset(stats, 0, sizeof(*stats));
2041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2042 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2043 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2047 rte_eth_stats_reset(uint16_t port_id)
2049 struct rte_eth_dev *dev;
2052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2053 dev = &rte_eth_devices[port_id];
2055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2056 ret = (*dev->dev_ops->stats_reset)(dev);
2058 return eth_err(port_id, ret);
2060 dev->data->rx_mbuf_alloc_failed = 0;
2066 get_xstats_basic_count(struct rte_eth_dev *dev)
2068 uint16_t nb_rxqs, nb_txqs;
2071 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2072 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2074 count = RTE_NB_STATS;
2075 count += nb_rxqs * RTE_NB_RXQ_STATS;
2076 count += nb_txqs * RTE_NB_TXQ_STATS;
2082 get_xstats_count(uint16_t port_id)
2084 struct rte_eth_dev *dev;
2087 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2088 dev = &rte_eth_devices[port_id];
2089 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2090 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2093 return eth_err(port_id, count);
2095 if (dev->dev_ops->xstats_get_names != NULL) {
2096 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2098 return eth_err(port_id, count);
2103 count += get_xstats_basic_count(dev);
2109 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2112 int cnt_xstats, idx_xstat;
2114 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2117 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2122 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2127 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2128 if (cnt_xstats < 0) {
2129 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2133 /* Get id-name lookup table */
2134 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2136 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2137 port_id, xstats_names, cnt_xstats, NULL)) {
2138 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2142 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2143 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2152 /* retrieve basic stats names */
2154 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2155 struct rte_eth_xstat_name *xstats_names)
2157 int cnt_used_entries = 0;
2158 uint32_t idx, id_queue;
2161 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2162 strlcpy(xstats_names[cnt_used_entries].name,
2163 rte_stats_strings[idx].name,
2164 sizeof(xstats_names[0].name));
2167 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2168 for (id_queue = 0; id_queue < num_q; id_queue++) {
2169 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2170 snprintf(xstats_names[cnt_used_entries].name,
2171 sizeof(xstats_names[0].name),
2173 id_queue, rte_rxq_stats_strings[idx].name);
2178 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2179 for (id_queue = 0; id_queue < num_q; id_queue++) {
2180 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2181 snprintf(xstats_names[cnt_used_entries].name,
2182 sizeof(xstats_names[0].name),
2184 id_queue, rte_txq_stats_strings[idx].name);
2188 return cnt_used_entries;
2191 /* retrieve ethdev extended statistics names */
2193 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2194 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2197 struct rte_eth_xstat_name *xstats_names_copy;
2198 unsigned int no_basic_stat_requested = 1;
2199 unsigned int no_ext_stat_requested = 1;
2200 unsigned int expected_entries;
2201 unsigned int basic_count;
2202 struct rte_eth_dev *dev;
2206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 dev = &rte_eth_devices[port_id];
2209 basic_count = get_xstats_basic_count(dev);
2210 ret = get_xstats_count(port_id);
2213 expected_entries = (unsigned int)ret;
2215 /* Return max number of stats if no ids given */
2218 return expected_entries;
2219 else if (xstats_names && size < expected_entries)
2220 return expected_entries;
2223 if (ids && !xstats_names)
2226 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2227 uint64_t ids_copy[size];
2229 for (i = 0; i < size; i++) {
2230 if (ids[i] < basic_count) {
2231 no_basic_stat_requested = 0;
2236 * Convert ids to xstats ids that PMD knows.
2237 * ids known by user are basic + extended stats.
2239 ids_copy[i] = ids[i] - basic_count;
2242 if (no_basic_stat_requested)
2243 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2244 xstats_names, ids_copy, size);
2247 /* Retrieve all stats */
2249 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2251 if (num_stats < 0 || num_stats > (int)expected_entries)
2254 return expected_entries;
2257 xstats_names_copy = calloc(expected_entries,
2258 sizeof(struct rte_eth_xstat_name));
2260 if (!xstats_names_copy) {
2261 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2266 for (i = 0; i < size; i++) {
2267 if (ids[i] >= basic_count) {
2268 no_ext_stat_requested = 0;
2274 /* Fill xstats_names_copy structure */
2275 if (ids && no_ext_stat_requested) {
2276 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2278 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2281 free(xstats_names_copy);
2287 for (i = 0; i < size; i++) {
2288 if (ids[i] >= expected_entries) {
2289 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2290 free(xstats_names_copy);
2293 xstats_names[i] = xstats_names_copy[ids[i]];
2296 free(xstats_names_copy);
2301 rte_eth_xstats_get_names(uint16_t port_id,
2302 struct rte_eth_xstat_name *xstats_names,
2305 struct rte_eth_dev *dev;
2306 int cnt_used_entries;
2307 int cnt_expected_entries;
2308 int cnt_driver_entries;
2310 cnt_expected_entries = get_xstats_count(port_id);
2311 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2312 (int)size < cnt_expected_entries)
2313 return cnt_expected_entries;
2315 /* port_id checked in get_xstats_count() */
2316 dev = &rte_eth_devices[port_id];
2318 cnt_used_entries = rte_eth_basic_stats_get_names(
2321 if (dev->dev_ops->xstats_get_names != NULL) {
2322 /* If there are any driver-specific xstats, append them
2325 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2327 xstats_names + cnt_used_entries,
2328 size - cnt_used_entries);
2329 if (cnt_driver_entries < 0)
2330 return eth_err(port_id, cnt_driver_entries);
2331 cnt_used_entries += cnt_driver_entries;
2334 return cnt_used_entries;
2339 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2341 struct rte_eth_dev *dev;
2342 struct rte_eth_stats eth_stats;
2343 unsigned int count = 0, i, q;
2344 uint64_t val, *stats_ptr;
2345 uint16_t nb_rxqs, nb_txqs;
2348 ret = rte_eth_stats_get(port_id, ð_stats);
2352 dev = &rte_eth_devices[port_id];
2354 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2355 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2358 for (i = 0; i < RTE_NB_STATS; i++) {
2359 stats_ptr = RTE_PTR_ADD(ð_stats,
2360 rte_stats_strings[i].offset);
2362 xstats[count++].value = val;
2366 for (q = 0; q < nb_rxqs; q++) {
2367 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2368 stats_ptr = RTE_PTR_ADD(ð_stats,
2369 rte_rxq_stats_strings[i].offset +
2370 q * sizeof(uint64_t));
2372 xstats[count++].value = val;
2377 for (q = 0; q < nb_txqs; q++) {
2378 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2379 stats_ptr = RTE_PTR_ADD(ð_stats,
2380 rte_txq_stats_strings[i].offset +
2381 q * sizeof(uint64_t));
2383 xstats[count++].value = val;
2389 /* retrieve ethdev extended statistics */
2391 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2392 uint64_t *values, unsigned int size)
2394 unsigned int no_basic_stat_requested = 1;
2395 unsigned int no_ext_stat_requested = 1;
2396 unsigned int num_xstats_filled;
2397 unsigned int basic_count;
2398 uint16_t expected_entries;
2399 struct rte_eth_dev *dev;
2403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2404 ret = get_xstats_count(port_id);
2407 expected_entries = (uint16_t)ret;
2408 struct rte_eth_xstat xstats[expected_entries];
2409 dev = &rte_eth_devices[port_id];
2410 basic_count = get_xstats_basic_count(dev);
2412 /* Return max number of stats if no ids given */
2415 return expected_entries;
2416 else if (values && size < expected_entries)
2417 return expected_entries;
2423 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2424 unsigned int basic_count = get_xstats_basic_count(dev);
2425 uint64_t ids_copy[size];
2427 for (i = 0; i < size; i++) {
2428 if (ids[i] < basic_count) {
2429 no_basic_stat_requested = 0;
2434 * Convert ids to xstats ids that PMD knows.
2435 * ids known by user are basic + extended stats.
2437 ids_copy[i] = ids[i] - basic_count;
2440 if (no_basic_stat_requested)
2441 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2446 for (i = 0; i < size; i++) {
2447 if (ids[i] >= basic_count) {
2448 no_ext_stat_requested = 0;
2454 /* Fill the xstats structure */
2455 if (ids && no_ext_stat_requested)
2456 ret = rte_eth_basic_stats_get(port_id, xstats);
2458 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2462 num_xstats_filled = (unsigned int)ret;
2464 /* Return all stats */
2466 for (i = 0; i < num_xstats_filled; i++)
2467 values[i] = xstats[i].value;
2468 return expected_entries;
2472 for (i = 0; i < size; i++) {
2473 if (ids[i] >= expected_entries) {
2474 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2477 values[i] = xstats[ids[i]].value;
2483 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2486 struct rte_eth_dev *dev;
2487 unsigned int count = 0, i;
2488 signed int xcount = 0;
2489 uint16_t nb_rxqs, nb_txqs;
2492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2494 dev = &rte_eth_devices[port_id];
2496 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2497 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2499 /* Return generic statistics */
2500 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2501 (nb_txqs * RTE_NB_TXQ_STATS);
2503 /* implemented by the driver */
2504 if (dev->dev_ops->xstats_get != NULL) {
2505 /* Retrieve the xstats from the driver at the end of the
2508 xcount = (*dev->dev_ops->xstats_get)(dev,
2509 xstats ? xstats + count : NULL,
2510 (n > count) ? n - count : 0);
2513 return eth_err(port_id, xcount);
2516 if (n < count + xcount || xstats == NULL)
2517 return count + xcount;
2519 /* now fill the xstats structure */
2520 ret = rte_eth_basic_stats_get(port_id, xstats);
2525 for (i = 0; i < count; i++)
2527 /* add an offset to driver-specific stats */
2528 for ( ; i < count + xcount; i++)
2529 xstats[i].id += count;
2531 return count + xcount;
2534 /* reset ethdev extended statistics */
2536 rte_eth_xstats_reset(uint16_t port_id)
2538 struct rte_eth_dev *dev;
2540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2541 dev = &rte_eth_devices[port_id];
2543 /* implemented by the driver */
2544 if (dev->dev_ops->xstats_reset != NULL)
2545 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2547 /* fallback to default */
2548 return rte_eth_stats_reset(port_id);
2552 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2555 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2559 dev = &rte_eth_devices[port_id];
2561 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2563 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2566 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2569 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2572 return (*dev->dev_ops->queue_stats_mapping_set)
2573 (dev, queue_id, stat_idx, is_rx);
2578 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2581 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2582 stat_idx, STAT_QMAP_TX));
2587 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2590 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2591 stat_idx, STAT_QMAP_RX));
2595 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2597 struct rte_eth_dev *dev;
2599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600 dev = &rte_eth_devices[port_id];
2602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2603 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2604 fw_version, fw_size));
2608 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2610 struct rte_eth_dev *dev;
2611 const struct rte_eth_desc_lim lim = {
2612 .nb_max = UINT16_MAX,
2615 .nb_seg_max = UINT16_MAX,
2616 .nb_mtu_seg_max = UINT16_MAX,
2621 * Init dev_info before port_id check since caller does not have
2622 * return status and does not know if get is successful or not.
2624 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2627 dev = &rte_eth_devices[port_id];
2629 dev_info->rx_desc_lim = lim;
2630 dev_info->tx_desc_lim = lim;
2631 dev_info->device = dev->device;
2632 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2633 dev_info->max_mtu = UINT16_MAX;
2635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2636 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2638 /* Cleanup already filled in device information */
2639 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2640 return eth_err(port_id, diag);
2643 dev_info->driver_name = dev->device->driver->name;
2644 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2645 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2647 dev_info->dev_flags = &dev->data->dev_flags;
2653 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2654 uint32_t *ptypes, int num)
2657 struct rte_eth_dev *dev;
2658 const uint32_t *all_ptypes;
2660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2661 dev = &rte_eth_devices[port_id];
2662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2663 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2668 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2669 if (all_ptypes[i] & ptype_mask) {
2671 ptypes[j] = all_ptypes[i];
2679 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2681 struct rte_eth_dev *dev;
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2684 dev = &rte_eth_devices[port_id];
2685 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2692 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2694 struct rte_eth_dev *dev;
2696 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2698 dev = &rte_eth_devices[port_id];
2699 *mtu = dev->data->mtu;
2704 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2707 struct rte_eth_dev_info dev_info;
2708 struct rte_eth_dev *dev;
2710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2711 dev = &rte_eth_devices[port_id];
2712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2715 * Check if the device supports dev_infos_get, if it does not
2716 * skip min_mtu/max_mtu validation here as this requires values
2717 * that are populated within the call to rte_eth_dev_info_get()
2718 * which relies on dev->dev_ops->dev_infos_get.
2720 if (*dev->dev_ops->dev_infos_get != NULL) {
2721 ret = rte_eth_dev_info_get(port_id, &dev_info);
2725 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2729 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2731 dev->data->mtu = mtu;
2733 return eth_err(port_id, ret);
2737 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2739 struct rte_eth_dev *dev;
2742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2743 dev = &rte_eth_devices[port_id];
2744 if (!(dev->data->dev_conf.rxmode.offloads &
2745 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2746 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2751 if (vlan_id > 4095) {
2752 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2758 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2760 struct rte_vlan_filter_conf *vfc;
2764 vfc = &dev->data->vlan_filter_conf;
2765 vidx = vlan_id / 64;
2766 vbit = vlan_id % 64;
2769 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2771 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2774 return eth_err(port_id, ret);
2778 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2781 struct rte_eth_dev *dev;
2783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2784 dev = &rte_eth_devices[port_id];
2785 if (rx_queue_id >= dev->data->nb_rx_queues) {
2786 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2791 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2797 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2798 enum rte_vlan_type vlan_type,
2801 struct rte_eth_dev *dev;
2803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 dev = &rte_eth_devices[port_id];
2805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2807 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2812 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2814 struct rte_eth_dev *dev;
2818 uint64_t orig_offloads;
2819 uint64_t *dev_offloads;
2821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 dev = &rte_eth_devices[port_id];
2824 /* save original values in case of failure */
2825 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2826 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2828 /*check which option changed by application*/
2829 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2830 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2833 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2835 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2836 mask |= ETH_VLAN_STRIP_MASK;
2839 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2840 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2843 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2845 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2846 mask |= ETH_VLAN_FILTER_MASK;
2849 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2850 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2853 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2855 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2856 mask |= ETH_VLAN_EXTEND_MASK;
2859 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2860 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2863 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2865 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2866 mask |= ETH_QINQ_STRIP_MASK;
2873 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2874 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2876 /* hit an error restore original values */
2877 *dev_offloads = orig_offloads;
2880 return eth_err(port_id, ret);
2884 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2886 struct rte_eth_dev *dev;
2887 uint64_t *dev_offloads;
2890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2891 dev = &rte_eth_devices[port_id];
2892 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2894 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2895 ret |= ETH_VLAN_STRIP_OFFLOAD;
2897 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2898 ret |= ETH_VLAN_FILTER_OFFLOAD;
2900 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2901 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2903 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2904 ret |= DEV_RX_OFFLOAD_QINQ_STRIP;
2910 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2912 struct rte_eth_dev *dev;
2914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2915 dev = &rte_eth_devices[port_id];
2916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2918 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2922 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2924 struct rte_eth_dev *dev;
2926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2927 dev = &rte_eth_devices[port_id];
2928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2929 memset(fc_conf, 0, sizeof(*fc_conf));
2930 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2934 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2936 struct rte_eth_dev *dev;
2938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2939 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2940 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2944 dev = &rte_eth_devices[port_id];
2945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2946 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2950 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2951 struct rte_eth_pfc_conf *pfc_conf)
2953 struct rte_eth_dev *dev;
2955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2956 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2957 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2961 dev = &rte_eth_devices[port_id];
2962 /* High water, low water validation are device specific */
2963 if (*dev->dev_ops->priority_flow_ctrl_set)
2964 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2970 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2978 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2979 for (i = 0; i < num; i++) {
2980 if (reta_conf[i].mask)
2988 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2992 uint16_t i, idx, shift;
2998 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3002 for (i = 0; i < reta_size; i++) {
3003 idx = i / RTE_RETA_GROUP_SIZE;
3004 shift = i % RTE_RETA_GROUP_SIZE;
3005 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3006 (reta_conf[idx].reta[shift] >= max_rxq)) {
3008 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3010 reta_conf[idx].reta[shift], max_rxq);
3019 rte_eth_dev_rss_reta_update(uint16_t port_id,
3020 struct rte_eth_rss_reta_entry64 *reta_conf,
3023 struct rte_eth_dev *dev;
3026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3027 /* Check mask bits */
3028 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3032 dev = &rte_eth_devices[port_id];
3034 /* Check entry value */
3035 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3036 dev->data->nb_rx_queues);
3040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3041 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3046 rte_eth_dev_rss_reta_query(uint16_t port_id,
3047 struct rte_eth_rss_reta_entry64 *reta_conf,
3050 struct rte_eth_dev *dev;
3053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3055 /* Check mask bits */
3056 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3060 dev = &rte_eth_devices[port_id];
3061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3062 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3067 rte_eth_dev_rss_hash_update(uint16_t port_id,
3068 struct rte_eth_rss_conf *rss_conf)
3070 struct rte_eth_dev *dev;
3071 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3076 ret = rte_eth_dev_info_get(port_id, &dev_info);
3080 dev = &rte_eth_devices[port_id];
3081 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3082 dev_info.flow_type_rss_offloads) {
3084 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3085 port_id, rss_conf->rss_hf,
3086 dev_info.flow_type_rss_offloads);
3089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3090 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3095 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3096 struct rte_eth_rss_conf *rss_conf)
3098 struct rte_eth_dev *dev;
3100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3101 dev = &rte_eth_devices[port_id];
3102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3103 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3108 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3109 struct rte_eth_udp_tunnel *udp_tunnel)
3111 struct rte_eth_dev *dev;
3113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3114 if (udp_tunnel == NULL) {
3115 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3119 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3120 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3124 dev = &rte_eth_devices[port_id];
3125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3126 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3131 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3132 struct rte_eth_udp_tunnel *udp_tunnel)
3134 struct rte_eth_dev *dev;
3136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3137 dev = &rte_eth_devices[port_id];
3139 if (udp_tunnel == NULL) {
3140 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3144 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3145 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3150 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3155 rte_eth_led_on(uint16_t port_id)
3157 struct rte_eth_dev *dev;
3159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3160 dev = &rte_eth_devices[port_id];
3161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3162 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3166 rte_eth_led_off(uint16_t port_id)
3168 struct rte_eth_dev *dev;
3170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3171 dev = &rte_eth_devices[port_id];
3172 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3173 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3177 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3181 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3183 struct rte_eth_dev_info dev_info;
3184 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3188 ret = rte_eth_dev_info_get(port_id, &dev_info);
3192 for (i = 0; i < dev_info.max_mac_addrs; i++)
3193 if (memcmp(addr, &dev->data->mac_addrs[i],
3194 RTE_ETHER_ADDR_LEN) == 0)
3200 static const struct rte_ether_addr null_mac_addr;
3203 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3206 struct rte_eth_dev *dev;
3211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3212 dev = &rte_eth_devices[port_id];
3213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3215 if (rte_is_zero_ether_addr(addr)) {
3216 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3220 if (pool >= ETH_64_POOLS) {
3221 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3225 index = get_mac_addr_index(port_id, addr);
3227 index = get_mac_addr_index(port_id, &null_mac_addr);
3229 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3234 pool_mask = dev->data->mac_pool_sel[index];
3236 /* Check if both MAC address and pool is already there, and do nothing */
3237 if (pool_mask & (1ULL << pool))
3242 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3245 /* Update address in NIC data structure */
3246 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3248 /* Update pool bitmap in NIC data structure */
3249 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3252 return eth_err(port_id, ret);
3256 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3258 struct rte_eth_dev *dev;
3261 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3262 dev = &rte_eth_devices[port_id];
3263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3265 index = get_mac_addr_index(port_id, addr);
3268 "Port %u: Cannot remove default MAC address\n",
3271 } else if (index < 0)
3272 return 0; /* Do nothing if address wasn't found */
3275 (*dev->dev_ops->mac_addr_remove)(dev, index);
3277 /* Update address in NIC data structure */
3278 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3280 /* reset pool bitmap */
3281 dev->data->mac_pool_sel[index] = 0;
3287 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3289 struct rte_eth_dev *dev;
3292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3294 if (!rte_is_valid_assigned_ether_addr(addr))
3297 dev = &rte_eth_devices[port_id];
3298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3300 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3304 /* Update default address in NIC data structure */
3305 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3312 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3316 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3318 struct rte_eth_dev_info dev_info;
3319 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3323 ret = rte_eth_dev_info_get(port_id, &dev_info);
3327 if (!dev->data->hash_mac_addrs)
3330 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3331 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3332 RTE_ETHER_ADDR_LEN) == 0)
3339 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3344 struct rte_eth_dev *dev;
3346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3348 dev = &rte_eth_devices[port_id];
3349 if (rte_is_zero_ether_addr(addr)) {
3350 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3355 index = get_hash_mac_addr_index(port_id, addr);
3356 /* Check if it's already there, and do nothing */
3357 if ((index >= 0) && on)
3363 "Port %u: the MAC address was not set in UTA\n",
3368 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3370 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3377 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3379 /* Update address in NIC data structure */
3381 rte_ether_addr_copy(addr,
3382 &dev->data->hash_mac_addrs[index]);
3384 rte_ether_addr_copy(&null_mac_addr,
3385 &dev->data->hash_mac_addrs[index]);
3388 return eth_err(port_id, ret);
3392 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3394 struct rte_eth_dev *dev;
3396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3398 dev = &rte_eth_devices[port_id];
3400 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3401 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3405 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3408 struct rte_eth_dev *dev;
3409 struct rte_eth_dev_info dev_info;
3410 struct rte_eth_link link;
3413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3415 ret = rte_eth_dev_info_get(port_id, &dev_info);
3419 dev = &rte_eth_devices[port_id];
3420 link = dev->data->dev_link;
3422 if (queue_idx > dev_info.max_tx_queues) {
3424 "Set queue rate limit:port %u: invalid queue id=%u\n",
3425 port_id, queue_idx);
3429 if (tx_rate > link.link_speed) {
3431 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3432 tx_rate, link.link_speed);
3436 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3437 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3438 queue_idx, tx_rate));
3442 rte_eth_mirror_rule_set(uint16_t port_id,
3443 struct rte_eth_mirror_conf *mirror_conf,
3444 uint8_t rule_id, uint8_t on)
3446 struct rte_eth_dev *dev;
3448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3449 if (mirror_conf->rule_type == 0) {
3450 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3454 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3455 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3460 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3461 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3462 (mirror_conf->pool_mask == 0)) {
3464 "Invalid mirror pool, pool mask can not be 0\n");
3468 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3469 mirror_conf->vlan.vlan_mask == 0) {
3471 "Invalid vlan mask, vlan mask can not be 0\n");
3475 dev = &rte_eth_devices[port_id];
3476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3478 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3479 mirror_conf, rule_id, on));
3483 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3485 struct rte_eth_dev *dev;
3487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3489 dev = &rte_eth_devices[port_id];
3490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3492 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3496 RTE_INIT(eth_dev_init_cb_lists)
3500 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3501 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3505 rte_eth_dev_callback_register(uint16_t port_id,
3506 enum rte_eth_event_type event,
3507 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3509 struct rte_eth_dev *dev;
3510 struct rte_eth_dev_callback *user_cb;
3511 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3517 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3518 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3522 if (port_id == RTE_ETH_ALL) {
3524 last_port = RTE_MAX_ETHPORTS - 1;
3526 next_port = last_port = port_id;
3529 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3532 dev = &rte_eth_devices[next_port];
3534 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3535 if (user_cb->cb_fn == cb_fn &&
3536 user_cb->cb_arg == cb_arg &&
3537 user_cb->event == event) {
3542 /* create a new callback. */
3543 if (user_cb == NULL) {
3544 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3545 sizeof(struct rte_eth_dev_callback), 0);
3546 if (user_cb != NULL) {
3547 user_cb->cb_fn = cb_fn;
3548 user_cb->cb_arg = cb_arg;
3549 user_cb->event = event;
3550 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3553 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3554 rte_eth_dev_callback_unregister(port_id, event,
3560 } while (++next_port <= last_port);
3562 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3567 rte_eth_dev_callback_unregister(uint16_t port_id,
3568 enum rte_eth_event_type event,
3569 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3572 struct rte_eth_dev *dev;
3573 struct rte_eth_dev_callback *cb, *next;
3574 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3580 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3581 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3585 if (port_id == RTE_ETH_ALL) {
3587 last_port = RTE_MAX_ETHPORTS - 1;
3589 next_port = last_port = port_id;
3592 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3595 dev = &rte_eth_devices[next_port];
3597 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3600 next = TAILQ_NEXT(cb, next);
3602 if (cb->cb_fn != cb_fn || cb->event != event ||
3603 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3607 * if this callback is not executing right now,
3610 if (cb->active == 0) {
3611 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3617 } while (++next_port <= last_port);
3619 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3624 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3625 enum rte_eth_event_type event, void *ret_param)
3627 struct rte_eth_dev_callback *cb_lst;
3628 struct rte_eth_dev_callback dev_cb;
3631 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3632 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3633 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3637 if (ret_param != NULL)
3638 dev_cb.ret_param = ret_param;
3640 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3641 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3642 dev_cb.cb_arg, dev_cb.ret_param);
3643 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3646 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3651 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3656 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3658 dev->state = RTE_ETH_DEV_ATTACHED;
3662 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3665 struct rte_eth_dev *dev;
3666 struct rte_intr_handle *intr_handle;
3670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3672 dev = &rte_eth_devices[port_id];
3674 if (!dev->intr_handle) {
3675 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3679 intr_handle = dev->intr_handle;
3680 if (!intr_handle->intr_vec) {
3681 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3685 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3686 vec = intr_handle->intr_vec[qid];
3687 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3688 if (rc && rc != -EEXIST) {
3690 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3691 port_id, qid, op, epfd, vec);
3699 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3701 struct rte_intr_handle *intr_handle;
3702 struct rte_eth_dev *dev;
3703 unsigned int efd_idx;
3707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3709 dev = &rte_eth_devices[port_id];
3711 if (queue_id >= dev->data->nb_rx_queues) {
3712 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3716 if (!dev->intr_handle) {
3717 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3721 intr_handle = dev->intr_handle;
3722 if (!intr_handle->intr_vec) {
3723 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3727 vec = intr_handle->intr_vec[queue_id];
3728 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3729 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3730 fd = intr_handle->efds[efd_idx];
3735 const struct rte_memzone *
3736 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3737 uint16_t queue_id, size_t size, unsigned align,
3740 char z_name[RTE_MEMZONE_NAMESIZE];
3741 const struct rte_memzone *mz;
3744 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3745 dev->data->port_id, queue_id, ring_name);
3746 if (rc >= RTE_MEMZONE_NAMESIZE) {
3747 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3748 rte_errno = ENAMETOOLONG;
3752 mz = rte_memzone_lookup(z_name);
3756 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3757 RTE_MEMZONE_IOVA_CONTIG, align);
3761 rte_eth_dev_create(struct rte_device *device, const char *name,
3762 size_t priv_data_size,
3763 ethdev_bus_specific_init ethdev_bus_specific_init,
3764 void *bus_init_params,
3765 ethdev_init_t ethdev_init, void *init_params)
3767 struct rte_eth_dev *ethdev;
3770 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3772 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3773 ethdev = rte_eth_dev_allocate(name);
3777 if (priv_data_size) {
3778 ethdev->data->dev_private = rte_zmalloc_socket(
3779 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3782 if (!ethdev->data->dev_private) {
3783 RTE_LOG(ERR, EAL, "failed to allocate private data");
3789 ethdev = rte_eth_dev_attach_secondary(name);
3791 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3792 "ethdev doesn't exist");
3797 ethdev->device = device;
3799 if (ethdev_bus_specific_init) {
3800 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3803 "ethdev bus specific initialisation failed");
3808 retval = ethdev_init(ethdev, init_params);
3810 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3814 rte_eth_dev_probing_finish(ethdev);
3819 rte_eth_dev_release_port(ethdev);
3824 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3825 ethdev_uninit_t ethdev_uninit)
3829 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3833 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3835 ret = ethdev_uninit(ethdev);
3839 return rte_eth_dev_release_port(ethdev);
3843 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3844 int epfd, int op, void *data)
3847 struct rte_eth_dev *dev;
3848 struct rte_intr_handle *intr_handle;
3851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3853 dev = &rte_eth_devices[port_id];
3854 if (queue_id >= dev->data->nb_rx_queues) {
3855 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3859 if (!dev->intr_handle) {
3860 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3864 intr_handle = dev->intr_handle;
3865 if (!intr_handle->intr_vec) {
3866 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3870 vec = intr_handle->intr_vec[queue_id];
3871 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3872 if (rc && rc != -EEXIST) {
3874 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3875 port_id, queue_id, op, epfd, vec);
3883 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3886 struct rte_eth_dev *dev;
3888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3890 dev = &rte_eth_devices[port_id];
3892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3893 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3898 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3901 struct rte_eth_dev *dev;
3903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3905 dev = &rte_eth_devices[port_id];
3907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3908 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3914 rte_eth_dev_filter_supported(uint16_t port_id,
3915 enum rte_filter_type filter_type)
3917 struct rte_eth_dev *dev;
3919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3921 dev = &rte_eth_devices[port_id];
3922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3923 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3924 RTE_ETH_FILTER_NOP, NULL);
3928 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3929 enum rte_filter_op filter_op, void *arg)
3931 struct rte_eth_dev *dev;
3933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3935 dev = &rte_eth_devices[port_id];
3936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3937 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3941 const struct rte_eth_rxtx_callback *
3942 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3943 rte_rx_callback_fn fn, void *user_param)
3945 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3946 rte_errno = ENOTSUP;
3949 /* check input parameters */
3950 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3951 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3955 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3963 cb->param = user_param;
3965 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3966 /* Add the callbacks in fifo order. */
3967 struct rte_eth_rxtx_callback *tail =
3968 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3971 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3978 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3983 const struct rte_eth_rxtx_callback *
3984 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3985 rte_rx_callback_fn fn, void *user_param)
3987 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3988 rte_errno = ENOTSUP;
3991 /* check input parameters */
3992 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3993 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3998 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4006 cb->param = user_param;
4008 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4009 /* Add the callbacks at fisrt position*/
4010 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4012 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4013 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4018 const struct rte_eth_rxtx_callback *
4019 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4020 rte_tx_callback_fn fn, void *user_param)
4022 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4023 rte_errno = ENOTSUP;
4026 /* check input parameters */
4027 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4028 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4033 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4041 cb->param = user_param;
4043 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4044 /* Add the callbacks in fifo order. */
4045 struct rte_eth_rxtx_callback *tail =
4046 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4049 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4056 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4062 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4063 const struct rte_eth_rxtx_callback *user_cb)
4065 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4068 /* Check input parameters. */
4069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4070 if (user_cb == NULL ||
4071 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4074 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4075 struct rte_eth_rxtx_callback *cb;
4076 struct rte_eth_rxtx_callback **prev_cb;
4079 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4080 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4081 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4083 if (cb == user_cb) {
4084 /* Remove the user cb from the callback list. */
4085 *prev_cb = cb->next;
4090 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4096 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4097 const struct rte_eth_rxtx_callback *user_cb)
4099 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4102 /* Check input parameters. */
4103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4104 if (user_cb == NULL ||
4105 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4108 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4110 struct rte_eth_rxtx_callback *cb;
4111 struct rte_eth_rxtx_callback **prev_cb;
4113 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4114 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4115 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4117 if (cb == user_cb) {
4118 /* Remove the user cb from the callback list. */
4119 *prev_cb = cb->next;
4124 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4130 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4131 struct rte_eth_rxq_info *qinfo)
4133 struct rte_eth_dev *dev;
4135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4140 dev = &rte_eth_devices[port_id];
4141 if (queue_id >= dev->data->nb_rx_queues) {
4142 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4148 memset(qinfo, 0, sizeof(*qinfo));
4149 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4154 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4155 struct rte_eth_txq_info *qinfo)
4157 struct rte_eth_dev *dev;
4159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4164 dev = &rte_eth_devices[port_id];
4165 if (queue_id >= dev->data->nb_tx_queues) {
4166 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4172 memset(qinfo, 0, sizeof(*qinfo));
4173 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4179 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4180 struct rte_ether_addr *mc_addr_set,
4181 uint32_t nb_mc_addr)
4183 struct rte_eth_dev *dev;
4185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4187 dev = &rte_eth_devices[port_id];
4188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4189 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4190 mc_addr_set, nb_mc_addr));
4194 rte_eth_timesync_enable(uint16_t port_id)
4196 struct rte_eth_dev *dev;
4198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4201 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4202 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4206 rte_eth_timesync_disable(uint16_t port_id)
4208 struct rte_eth_dev *dev;
4210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4211 dev = &rte_eth_devices[port_id];
4213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4214 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4218 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4221 struct rte_eth_dev *dev;
4223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4224 dev = &rte_eth_devices[port_id];
4226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4227 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4228 (dev, timestamp, flags));
4232 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4233 struct timespec *timestamp)
4235 struct rte_eth_dev *dev;
4237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4238 dev = &rte_eth_devices[port_id];
4240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4241 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4246 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4248 struct rte_eth_dev *dev;
4250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4251 dev = &rte_eth_devices[port_id];
4253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4254 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4259 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4261 struct rte_eth_dev *dev;
4263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4264 dev = &rte_eth_devices[port_id];
4266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4267 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4272 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4274 struct rte_eth_dev *dev;
4276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4277 dev = &rte_eth_devices[port_id];
4279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4280 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4285 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4287 struct rte_eth_dev *dev;
4289 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4290 dev = &rte_eth_devices[port_id];
4292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4293 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4297 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4299 struct rte_eth_dev *dev;
4301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4303 dev = &rte_eth_devices[port_id];
4304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4305 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4309 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4311 struct rte_eth_dev *dev;
4313 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4315 dev = &rte_eth_devices[port_id];
4316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4317 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4321 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4323 struct rte_eth_dev *dev;
4325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4327 dev = &rte_eth_devices[port_id];
4328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4329 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4333 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4335 struct rte_eth_dev *dev;
4337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4339 dev = &rte_eth_devices[port_id];
4340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4341 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4345 rte_eth_dev_get_module_info(uint16_t port_id,
4346 struct rte_eth_dev_module_info *modinfo)
4348 struct rte_eth_dev *dev;
4350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4352 dev = &rte_eth_devices[port_id];
4353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4354 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4358 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4359 struct rte_dev_eeprom_info *info)
4361 struct rte_eth_dev *dev;
4363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4365 dev = &rte_eth_devices[port_id];
4366 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4367 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4371 rte_eth_dev_get_dcb_info(uint16_t port_id,
4372 struct rte_eth_dcb_info *dcb_info)
4374 struct rte_eth_dev *dev;
4376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4378 dev = &rte_eth_devices[port_id];
4379 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4381 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4382 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4386 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4387 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4389 struct rte_eth_dev *dev;
4391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4392 if (l2_tunnel == NULL) {
4393 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4397 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4398 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4402 dev = &rte_eth_devices[port_id];
4403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4405 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4410 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4411 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4415 struct rte_eth_dev *dev;
4417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4419 if (l2_tunnel == NULL) {
4420 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4424 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4425 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4430 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4434 dev = &rte_eth_devices[port_id];
4435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4437 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4438 l2_tunnel, mask, en));
4442 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4443 const struct rte_eth_desc_lim *desc_lim)
4445 if (desc_lim->nb_align != 0)
4446 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4448 if (desc_lim->nb_max != 0)
4449 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4451 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4455 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4456 uint16_t *nb_rx_desc,
4457 uint16_t *nb_tx_desc)
4459 struct rte_eth_dev_info dev_info;
4462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4464 ret = rte_eth_dev_info_get(port_id, &dev_info);
4468 if (nb_rx_desc != NULL)
4469 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4471 if (nb_tx_desc != NULL)
4472 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4478 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4480 struct rte_eth_dev *dev;
4482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4487 dev = &rte_eth_devices[port_id];
4489 if (*dev->dev_ops->pool_ops_supported == NULL)
4490 return 1; /* all pools are supported */
4492 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4496 * A set of values to describe the possible states of a switch domain.
4498 enum rte_eth_switch_domain_state {
4499 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4500 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4504 * Array of switch domains available for allocation. Array is sized to
4505 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4506 * ethdev ports in a single process.
4508 static struct rte_eth_dev_switch {
4509 enum rte_eth_switch_domain_state state;
4510 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4513 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4517 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4519 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4520 i < RTE_MAX_ETHPORTS; i++) {
4521 if (rte_eth_switch_domains[i].state ==
4522 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4523 rte_eth_switch_domains[i].state =
4524 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4534 rte_eth_switch_domain_free(uint16_t domain_id)
4536 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4537 domain_id >= RTE_MAX_ETHPORTS)
4540 if (rte_eth_switch_domains[domain_id].state !=
4541 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4544 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4550 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4553 struct rte_kvargs_pair *pair;
4556 arglist->str = strdup(str_in);
4557 if (arglist->str == NULL)
4560 letter = arglist->str;
4563 pair = &arglist->pairs[0];
4566 case 0: /* Initial */
4569 else if (*letter == '\0')
4576 case 1: /* Parsing key */
4577 if (*letter == '=') {
4579 pair->value = letter + 1;
4581 } else if (*letter == ',' || *letter == '\0')
4586 case 2: /* Parsing value */
4589 else if (*letter == ',') {
4592 pair = &arglist->pairs[arglist->count];
4594 } else if (*letter == '\0') {
4597 pair = &arglist->pairs[arglist->count];
4602 case 3: /* Parsing list */
4605 else if (*letter == '\0')
4614 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4616 struct rte_kvargs args;
4617 struct rte_kvargs_pair *pair;
4621 memset(eth_da, 0, sizeof(*eth_da));
4623 result = rte_eth_devargs_tokenise(&args, dargs);
4627 for (i = 0; i < args.count; i++) {
4628 pair = &args.pairs[i];
4629 if (strcmp("representor", pair->key) == 0) {
4630 result = rte_eth_devargs_parse_list(pair->value,
4631 rte_eth_devargs_parse_representor_ports,
4645 RTE_INIT(ethdev_init_log)
4647 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4648 if (rte_eth_dev_logtype >= 0)
4649 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);