1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_kvargs.h>
38 #include <rte_class.h>
39 #include <rte_ether.h>
40 #include <rte_telemetry.h>
42 #include "rte_ethdev_trace.h"
43 #include "rte_ethdev.h"
44 #include "ethdev_driver.h"
45 #include "ethdev_profile.h"
46 #include "ethdev_private.h"
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
90 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
98 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
99 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
100 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
102 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
104 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
105 { DEV_RX_OFFLOAD_##_name, #_name }
107 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \
108 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } eth_dev_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
136 #undef RTE_RX_OFFLOAD_BIT2STR
137 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
139 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
140 { DEV_TX_OFFLOAD_##_name, #_name }
142 static const struct {
145 } eth_dev_tx_offload_names[] = {
146 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
147 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
154 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
158 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
159 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
160 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
161 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
162 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
163 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
164 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
165 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
166 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
167 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
170 #undef RTE_TX_OFFLOAD_BIT2STR
173 * The user application callback description.
175 * It contains callback address to be registered by user application,
176 * the pointer to the parameters for callback, and the event type.
178 struct rte_eth_dev_callback {
179 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
180 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
181 void *cb_arg; /**< Parameter for callback */
182 void *ret_param; /**< Return parameter */
183 enum rte_eth_event_type event; /**< Interrupt event type */
184 uint32_t active; /**< Callback is executing */
193 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
196 struct rte_devargs devargs = {.args = NULL};
197 const char *bus_param_key;
198 char *bus_str = NULL;
199 char *cls_str = NULL;
202 memset(iter, 0, sizeof(*iter));
205 * The devargs string may use various syntaxes:
206 * - 0000:08:00.0,representor=[1-3]
207 * - pci:0000:06:00.0,representor=[0,5]
208 * - class=eth,mac=00:11:22:33:44:55
209 * A new syntax is in development (not yet supported):
210 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
214 * Handle pure class filter (i.e. without any bus-level argument),
215 * from future new syntax.
216 * rte_devargs_parse() is not yet supporting the new syntax,
217 * that's why this simple case is temporarily parsed here.
219 #define iter_anybus_str "class=eth,"
220 if (strncmp(devargs_str, iter_anybus_str,
221 strlen(iter_anybus_str)) == 0) {
222 iter->cls_str = devargs_str + strlen(iter_anybus_str);
226 /* Split bus, device and parameters. */
227 ret = rte_devargs_parse(&devargs, devargs_str);
232 * Assume parameters of old syntax can match only at ethdev level.
233 * Extra parameters will be ignored, thanks to "+" prefix.
235 str_size = strlen(devargs.args) + 2;
236 cls_str = malloc(str_size);
237 if (cls_str == NULL) {
241 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
242 if (ret != str_size - 1) {
246 iter->cls_str = cls_str;
247 free(devargs.args); /* allocated by rte_devargs_parse() */
250 iter->bus = devargs.bus;
251 if (iter->bus->dev_iterate == NULL) {
256 /* Convert bus args to new syntax for use with new API dev_iterate. */
257 if (strcmp(iter->bus->name, "vdev") == 0) {
258 bus_param_key = "name";
259 } else if (strcmp(iter->bus->name, "pci") == 0) {
260 bus_param_key = "addr";
265 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
266 bus_str = malloc(str_size);
267 if (bus_str == NULL) {
271 ret = snprintf(bus_str, str_size, "%s=%s",
272 bus_param_key, devargs.name);
273 if (ret != str_size - 1) {
277 iter->bus_str = bus_str;
280 iter->cls = rte_class_find_by_name("eth");
285 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
294 rte_eth_iterator_next(struct rte_dev_iterator *iter)
296 if (iter->cls == NULL) /* invalid ethdev iterator */
297 return RTE_MAX_ETHPORTS;
299 do { /* loop to try all matching rte_device */
300 /* If not pure ethdev filter and */
301 if (iter->bus != NULL &&
302 /* not in middle of rte_eth_dev iteration, */
303 iter->class_device == NULL) {
304 /* get next rte_device to try. */
305 iter->device = iter->bus->dev_iterate(
306 iter->device, iter->bus_str, iter);
307 if (iter->device == NULL)
308 break; /* no more rte_device candidate */
310 /* A device is matching bus part, need to check ethdev part. */
311 iter->class_device = iter->cls->dev_iterate(
312 iter->class_device, iter->cls_str, iter);
313 if (iter->class_device != NULL)
314 return eth_dev_to_id(iter->class_device); /* match */
315 } while (iter->bus != NULL); /* need to try next rte_device */
317 /* No more ethdev port to iterate. */
318 rte_eth_iterator_cleanup(iter);
319 return RTE_MAX_ETHPORTS;
323 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
325 if (iter->bus_str == NULL)
326 return; /* nothing to free in pure class filter */
327 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
328 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
329 memset(iter, 0, sizeof(*iter));
333 rte_eth_find_next(uint16_t port_id)
335 while (port_id < RTE_MAX_ETHPORTS &&
336 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
339 if (port_id >= RTE_MAX_ETHPORTS)
340 return RTE_MAX_ETHPORTS;
346 * Macro to iterate over all valid ports for internal usage.
347 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
349 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
350 for (port_id = rte_eth_find_next(0); \
351 port_id < RTE_MAX_ETHPORTS; \
352 port_id = rte_eth_find_next(port_id + 1))
355 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
357 port_id = rte_eth_find_next(port_id);
358 while (port_id < RTE_MAX_ETHPORTS &&
359 rte_eth_devices[port_id].device != parent)
360 port_id = rte_eth_find_next(port_id + 1);
366 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
368 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
369 return rte_eth_find_next_of(port_id,
370 rte_eth_devices[ref_port_id].device);
374 eth_dev_shared_data_prepare(void)
376 const unsigned flags = 0;
377 const struct rte_memzone *mz;
379 rte_spinlock_lock(ð_dev_shared_data_lock);
381 if (eth_dev_shared_data == NULL) {
382 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
383 /* Allocate port data and ownership shared memory. */
384 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
385 sizeof(*eth_dev_shared_data),
386 rte_socket_id(), flags);
388 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
390 rte_panic("Cannot allocate ethdev shared data\n");
392 eth_dev_shared_data = mz->addr;
393 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
394 eth_dev_shared_data->next_owner_id =
395 RTE_ETH_DEV_NO_OWNER + 1;
396 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
397 memset(eth_dev_shared_data->data, 0,
398 sizeof(eth_dev_shared_data->data));
402 rte_spinlock_unlock(ð_dev_shared_data_lock);
406 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
408 return ethdev->data->name[0] != '\0';
411 static struct rte_eth_dev *
412 eth_dev_allocated(const char *name)
416 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
418 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
419 if (rte_eth_devices[i].data != NULL &&
420 strcmp(rte_eth_devices[i].data->name, name) == 0)
421 return &rte_eth_devices[i];
427 rte_eth_dev_allocated(const char *name)
429 struct rte_eth_dev *ethdev;
431 eth_dev_shared_data_prepare();
433 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
435 ethdev = eth_dev_allocated(name);
437 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
443 eth_dev_find_free_port(void)
447 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
448 /* Using shared name field to find a free port. */
449 if (eth_dev_shared_data->data[i].name[0] == '\0') {
450 RTE_ASSERT(rte_eth_devices[i].state ==
455 return RTE_MAX_ETHPORTS;
458 static struct rte_eth_dev *
459 eth_dev_get(uint16_t port_id)
461 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
463 eth_dev->data = ð_dev_shared_data->data[port_id];
469 rte_eth_dev_allocate(const char *name)
472 struct rte_eth_dev *eth_dev = NULL;
475 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
477 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
481 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
482 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
486 eth_dev_shared_data_prepare();
488 /* Synchronize port creation between primary and secondary threads. */
489 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
491 if (eth_dev_allocated(name) != NULL) {
493 "Ethernet device with name %s already allocated\n",
498 port_id = eth_dev_find_free_port();
499 if (port_id == RTE_MAX_ETHPORTS) {
501 "Reached maximum number of Ethernet ports\n");
505 eth_dev = eth_dev_get(port_id);
506 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
507 eth_dev->data->port_id = port_id;
508 eth_dev->data->mtu = RTE_ETHER_MTU;
509 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
512 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
518 * Attach to a port already registered by the primary process, which
519 * makes sure that the same device would have the same port id both
520 * in the primary and secondary process.
523 rte_eth_dev_attach_secondary(const char *name)
526 struct rte_eth_dev *eth_dev = NULL;
528 eth_dev_shared_data_prepare();
530 /* Synchronize port attachment to primary port creation and release. */
531 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
533 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
534 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
537 if (i == RTE_MAX_ETHPORTS) {
539 "Device %s is not driven by the primary process\n",
542 eth_dev = eth_dev_get(i);
543 RTE_ASSERT(eth_dev->data->port_id == i);
546 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
551 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
556 eth_dev_shared_data_prepare();
558 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
559 rte_eth_dev_callback_process(eth_dev,
560 RTE_ETH_EVENT_DESTROY, NULL);
562 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
564 eth_dev->state = RTE_ETH_DEV_UNUSED;
565 eth_dev->device = NULL;
566 eth_dev->process_private = NULL;
567 eth_dev->intr_handle = NULL;
568 eth_dev->rx_pkt_burst = NULL;
569 eth_dev->tx_pkt_burst = NULL;
570 eth_dev->tx_pkt_prepare = NULL;
571 eth_dev->rx_queue_count = NULL;
572 eth_dev->rx_descriptor_done = NULL;
573 eth_dev->rx_descriptor_status = NULL;
574 eth_dev->tx_descriptor_status = NULL;
575 eth_dev->dev_ops = NULL;
577 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
578 rte_free(eth_dev->data->rx_queues);
579 rte_free(eth_dev->data->tx_queues);
580 rte_free(eth_dev->data->mac_addrs);
581 rte_free(eth_dev->data->hash_mac_addrs);
582 rte_free(eth_dev->data->dev_private);
583 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
584 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
587 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
593 rte_eth_dev_is_valid_port(uint16_t port_id)
595 if (port_id >= RTE_MAX_ETHPORTS ||
596 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
603 eth_is_valid_owner_id(uint64_t owner_id)
605 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
606 eth_dev_shared_data->next_owner_id <= owner_id)
612 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
614 port_id = rte_eth_find_next(port_id);
615 while (port_id < RTE_MAX_ETHPORTS &&
616 rte_eth_devices[port_id].data->owner.id != owner_id)
617 port_id = rte_eth_find_next(port_id + 1);
623 rte_eth_dev_owner_new(uint64_t *owner_id)
625 eth_dev_shared_data_prepare();
627 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
629 *owner_id = eth_dev_shared_data->next_owner_id++;
631 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
636 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
637 const struct rte_eth_dev_owner *new_owner)
639 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
640 struct rte_eth_dev_owner *port_owner;
642 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
643 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
648 if (!eth_is_valid_owner_id(new_owner->id) &&
649 !eth_is_valid_owner_id(old_owner_id)) {
651 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
652 old_owner_id, new_owner->id);
656 port_owner = &rte_eth_devices[port_id].data->owner;
657 if (port_owner->id != old_owner_id) {
659 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
660 port_id, port_owner->name, port_owner->id);
664 /* can not truncate (same structure) */
665 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
667 port_owner->id = new_owner->id;
669 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
670 port_id, new_owner->name, new_owner->id);
676 rte_eth_dev_owner_set(const uint16_t port_id,
677 const struct rte_eth_dev_owner *owner)
681 eth_dev_shared_data_prepare();
683 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
685 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
687 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
692 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
694 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
695 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
698 eth_dev_shared_data_prepare();
700 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
702 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
704 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
709 rte_eth_dev_owner_delete(const uint64_t owner_id)
714 eth_dev_shared_data_prepare();
716 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
718 if (eth_is_valid_owner_id(owner_id)) {
719 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
720 if (rte_eth_devices[port_id].data->owner.id == owner_id)
721 memset(&rte_eth_devices[port_id].data->owner, 0,
722 sizeof(struct rte_eth_dev_owner));
723 RTE_ETHDEV_LOG(NOTICE,
724 "All port owners owned by %016"PRIx64" identifier have removed\n",
728 "Invalid owner id=%016"PRIx64"\n",
733 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
739 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
742 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
744 eth_dev_shared_data_prepare();
746 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
748 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
749 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
753 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
756 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
761 rte_eth_dev_socket_id(uint16_t port_id)
763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
764 return rte_eth_devices[port_id].data->numa_node;
768 rte_eth_dev_get_sec_ctx(uint16_t port_id)
770 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
771 return rte_eth_devices[port_id].security_ctx;
775 rte_eth_dev_count_avail(void)
782 RTE_ETH_FOREACH_DEV(p)
789 rte_eth_dev_count_total(void)
791 uint16_t port, count = 0;
793 RTE_ETH_FOREACH_VALID_DEV(port)
800 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
807 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
811 /* shouldn't check 'rte_eth_devices[i].data',
812 * because it might be overwritten by VDEV PMD */
813 tmp = eth_dev_shared_data->data[port_id].name;
819 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
824 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
828 RTE_ETH_FOREACH_VALID_DEV(pid)
829 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
838 eth_err(uint16_t port_id, int ret)
842 if (rte_eth_dev_is_removed(port_id))
848 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
850 uint16_t old_nb_queues = dev->data->nb_rx_queues;
854 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
855 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
856 sizeof(dev->data->rx_queues[0]) * nb_queues,
857 RTE_CACHE_LINE_SIZE);
858 if (dev->data->rx_queues == NULL) {
859 dev->data->nb_rx_queues = 0;
862 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
865 rxq = dev->data->rx_queues;
867 for (i = nb_queues; i < old_nb_queues; i++)
868 (*dev->dev_ops->rx_queue_release)(rxq[i]);
869 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
870 RTE_CACHE_LINE_SIZE);
873 if (nb_queues > old_nb_queues) {
874 uint16_t new_qs = nb_queues - old_nb_queues;
876 memset(rxq + old_nb_queues, 0,
877 sizeof(rxq[0]) * new_qs);
880 dev->data->rx_queues = rxq;
882 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
885 rxq = dev->data->rx_queues;
887 for (i = nb_queues; i < old_nb_queues; i++)
888 (*dev->dev_ops->rx_queue_release)(rxq[i]);
890 rte_free(dev->data->rx_queues);
891 dev->data->rx_queues = NULL;
893 dev->data->nb_rx_queues = nb_queues;
898 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
902 if (rx_queue_id >= dev->data->nb_rx_queues) {
903 port_id = dev->data->port_id;
905 "Invalid Rx queue_id=%u of device with port_id=%u\n",
906 rx_queue_id, port_id);
910 if (dev->data->rx_queues[rx_queue_id] == NULL) {
911 port_id = dev->data->port_id;
913 "Queue %u of device with port_id=%u has not been setup\n",
914 rx_queue_id, port_id);
922 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
926 if (tx_queue_id >= dev->data->nb_tx_queues) {
927 port_id = dev->data->port_id;
929 "Invalid Tx queue_id=%u of device with port_id=%u\n",
930 tx_queue_id, port_id);
934 if (dev->data->tx_queues[tx_queue_id] == NULL) {
935 port_id = dev->data->port_id;
937 "Queue %u of device with port_id=%u has not been setup\n",
938 tx_queue_id, port_id);
946 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
948 struct rte_eth_dev *dev;
951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
953 dev = &rte_eth_devices[port_id];
954 if (!dev->data->dev_started) {
956 "Port %u must be started before start any queue\n",
961 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
967 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
969 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
970 rx_queue_id, port_id);
974 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
976 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
977 rx_queue_id, port_id);
981 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
987 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
989 struct rte_eth_dev *dev;
992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
994 dev = &rte_eth_devices[port_id];
996 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1002 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1003 RTE_ETHDEV_LOG(INFO,
1004 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1005 rx_queue_id, port_id);
1009 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1010 RTE_ETHDEV_LOG(INFO,
1011 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1012 rx_queue_id, port_id);
1016 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1021 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1023 struct rte_eth_dev *dev;
1026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1028 dev = &rte_eth_devices[port_id];
1029 if (!dev->data->dev_started) {
1031 "Port %u must be started before start any queue\n",
1036 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1042 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1043 RTE_ETHDEV_LOG(INFO,
1044 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1045 tx_queue_id, port_id);
1049 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1050 RTE_ETHDEV_LOG(INFO,
1051 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1052 tx_queue_id, port_id);
1056 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1060 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1062 struct rte_eth_dev *dev;
1065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1067 dev = &rte_eth_devices[port_id];
1069 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1075 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1076 RTE_ETHDEV_LOG(INFO,
1077 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1078 tx_queue_id, port_id);
1082 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1083 RTE_ETHDEV_LOG(INFO,
1084 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1085 tx_queue_id, port_id);
1089 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1094 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1096 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1100 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1101 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1102 sizeof(dev->data->tx_queues[0]) * nb_queues,
1103 RTE_CACHE_LINE_SIZE);
1104 if (dev->data->tx_queues == NULL) {
1105 dev->data->nb_tx_queues = 0;
1108 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1111 txq = dev->data->tx_queues;
1113 for (i = nb_queues; i < old_nb_queues; i++)
1114 (*dev->dev_ops->tx_queue_release)(txq[i]);
1115 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1116 RTE_CACHE_LINE_SIZE);
1119 if (nb_queues > old_nb_queues) {
1120 uint16_t new_qs = nb_queues - old_nb_queues;
1122 memset(txq + old_nb_queues, 0,
1123 sizeof(txq[0]) * new_qs);
1126 dev->data->tx_queues = txq;
1128 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1131 txq = dev->data->tx_queues;
1133 for (i = nb_queues; i < old_nb_queues; i++)
1134 (*dev->dev_ops->tx_queue_release)(txq[i]);
1136 rte_free(dev->data->tx_queues);
1137 dev->data->tx_queues = NULL;
1139 dev->data->nb_tx_queues = nb_queues;
1144 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1147 case ETH_SPEED_NUM_10M:
1148 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1149 case ETH_SPEED_NUM_100M:
1150 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1151 case ETH_SPEED_NUM_1G:
1152 return ETH_LINK_SPEED_1G;
1153 case ETH_SPEED_NUM_2_5G:
1154 return ETH_LINK_SPEED_2_5G;
1155 case ETH_SPEED_NUM_5G:
1156 return ETH_LINK_SPEED_5G;
1157 case ETH_SPEED_NUM_10G:
1158 return ETH_LINK_SPEED_10G;
1159 case ETH_SPEED_NUM_20G:
1160 return ETH_LINK_SPEED_20G;
1161 case ETH_SPEED_NUM_25G:
1162 return ETH_LINK_SPEED_25G;
1163 case ETH_SPEED_NUM_40G:
1164 return ETH_LINK_SPEED_40G;
1165 case ETH_SPEED_NUM_50G:
1166 return ETH_LINK_SPEED_50G;
1167 case ETH_SPEED_NUM_56G:
1168 return ETH_LINK_SPEED_56G;
1169 case ETH_SPEED_NUM_100G:
1170 return ETH_LINK_SPEED_100G;
1171 case ETH_SPEED_NUM_200G:
1172 return ETH_LINK_SPEED_200G;
1179 rte_eth_dev_rx_offload_name(uint64_t offload)
1181 const char *name = "UNKNOWN";
1184 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1185 if (offload == eth_dev_rx_offload_names[i].offload) {
1186 name = eth_dev_rx_offload_names[i].name;
1195 rte_eth_dev_tx_offload_name(uint64_t offload)
1197 const char *name = "UNKNOWN";
1200 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1201 if (offload == eth_dev_tx_offload_names[i].offload) {
1202 name = eth_dev_tx_offload_names[i].name;
1211 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1212 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1216 if (dev_info_size == 0) {
1217 if (config_size != max_rx_pkt_len) {
1218 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1219 " %u != %u is not allowed\n",
1220 port_id, config_size, max_rx_pkt_len);
1223 } else if (config_size > dev_info_size) {
1224 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1225 "> max allowed value %u\n", port_id, config_size,
1228 } else if (config_size < RTE_ETHER_MIN_LEN) {
1229 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1230 "< min allowed value %u\n", port_id, config_size,
1231 (unsigned int)RTE_ETHER_MIN_LEN);
1238 * Validate offloads that are requested through rte_eth_dev_configure against
1239 * the offloads successfully set by the ethernet device.
1242 * The port identifier of the Ethernet device.
1243 * @param req_offloads
1244 * The offloads that have been requested through `rte_eth_dev_configure`.
1245 * @param set_offloads
1246 * The offloads successfully set by the ethernet device.
1247 * @param offload_type
1248 * The offload type i.e. Rx/Tx string.
1249 * @param offload_name
1250 * The function that prints the offload name.
1252 * - (0) if validation successful.
1253 * - (-EINVAL) if requested offload has been silently disabled.
1257 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1258 uint64_t set_offloads, const char *offload_type,
1259 const char *(*offload_name)(uint64_t))
1261 uint64_t offloads_diff = req_offloads ^ set_offloads;
1265 while (offloads_diff != 0) {
1266 /* Check if any offload is requested but not enabled. */
1267 offload = 1ULL << __builtin_ctzll(offloads_diff);
1268 if (offload & req_offloads) {
1270 "Port %u failed to enable %s offload %s\n",
1271 port_id, offload_type, offload_name(offload));
1275 /* Check if offload couldn't be disabled. */
1276 if (offload & set_offloads) {
1277 RTE_ETHDEV_LOG(DEBUG,
1278 "Port %u %s offload %s is not requested but enabled\n",
1279 port_id, offload_type, offload_name(offload));
1282 offloads_diff &= ~offload;
1289 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1290 const struct rte_eth_conf *dev_conf)
1292 struct rte_eth_dev *dev;
1293 struct rte_eth_dev_info dev_info;
1294 struct rte_eth_conf orig_conf;
1295 uint16_t overhead_len;
1300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1302 dev = &rte_eth_devices[port_id];
1304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1306 if (dev->data->dev_started) {
1308 "Port %u must be stopped to allow configuration\n",
1313 /* Store original config, as rollback required on failure */
1314 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1317 * Copy the dev_conf parameter into the dev structure.
1318 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1320 if (dev_conf != &dev->data->dev_conf)
1321 memcpy(&dev->data->dev_conf, dev_conf,
1322 sizeof(dev->data->dev_conf));
1324 /* Backup mtu for rollback */
1325 old_mtu = dev->data->mtu;
1327 ret = rte_eth_dev_info_get(port_id, &dev_info);
1331 /* Get the real Ethernet overhead length */
1332 if (dev_info.max_mtu != UINT16_MAX &&
1333 dev_info.max_rx_pktlen > dev_info.max_mtu)
1334 overhead_len = dev_info.max_rx_pktlen - dev_info.max_mtu;
1336 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1338 /* If number of queues specified by application for both Rx and Tx is
1339 * zero, use driver preferred values. This cannot be done individually
1340 * as it is valid for either Tx or Rx (but not both) to be zero.
1341 * If driver does not provide any preferred valued, fall back on
1344 if (nb_rx_q == 0 && nb_tx_q == 0) {
1345 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1347 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1348 nb_tx_q = dev_info.default_txportconf.nb_queues;
1350 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1353 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1355 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1356 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1361 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1363 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1364 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1370 * Check that the numbers of RX and TX queues are not greater
1371 * than the maximum number of RX and TX queues supported by the
1372 * configured device.
1374 if (nb_rx_q > dev_info.max_rx_queues) {
1375 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1376 port_id, nb_rx_q, dev_info.max_rx_queues);
1381 if (nb_tx_q > dev_info.max_tx_queues) {
1382 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1383 port_id, nb_tx_q, dev_info.max_tx_queues);
1388 /* Check that the device supports requested interrupts */
1389 if ((dev_conf->intr_conf.lsc == 1) &&
1390 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1391 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1392 dev->device->driver->name);
1396 if ((dev_conf->intr_conf.rmv == 1) &&
1397 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1398 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1399 dev->device->driver->name);
1405 * If jumbo frames are enabled, check that the maximum RX packet
1406 * length is supported by the configured device.
1408 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1409 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1411 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1412 port_id, dev_conf->rxmode.max_rx_pkt_len,
1413 dev_info.max_rx_pktlen);
1416 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1418 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1419 port_id, dev_conf->rxmode.max_rx_pkt_len,
1420 (unsigned int)RTE_ETHER_MIN_LEN);
1425 /* Scale the MTU size to adapt max_rx_pkt_len */
1426 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
1429 uint16_t pktlen = dev_conf->rxmode.max_rx_pkt_len;
1430 if (pktlen < RTE_ETHER_MIN_MTU + overhead_len ||
1431 pktlen > RTE_ETHER_MTU + overhead_len)
1432 /* Use default value */
1433 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1434 RTE_ETHER_MTU + overhead_len;
1438 * If LRO is enabled, check that the maximum aggregated packet
1439 * size is supported by the configured device.
1441 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1442 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1443 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1444 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1445 ret = eth_dev_check_lro_pkt_size(port_id,
1446 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1447 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1448 dev_info.max_lro_pkt_size);
1453 /* Any requested offloading must be within its device capabilities */
1454 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1455 dev_conf->rxmode.offloads) {
1457 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1458 "capabilities 0x%"PRIx64" in %s()\n",
1459 port_id, dev_conf->rxmode.offloads,
1460 dev_info.rx_offload_capa,
1465 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1466 dev_conf->txmode.offloads) {
1468 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1469 "capabilities 0x%"PRIx64" in %s()\n",
1470 port_id, dev_conf->txmode.offloads,
1471 dev_info.tx_offload_capa,
1477 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1478 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1480 /* Check that device supports requested rss hash functions. */
1481 if ((dev_info.flow_type_rss_offloads |
1482 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1483 dev_info.flow_type_rss_offloads) {
1485 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1486 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1487 dev_info.flow_type_rss_offloads);
1492 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1493 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1494 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1496 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1498 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1504 * Setup new number of RX/TX queues and reconfigure device.
1506 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1509 "Port%u eth_dev_rx_queue_config = %d\n",
1515 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1518 "Port%u eth_dev_tx_queue_config = %d\n",
1520 eth_dev_rx_queue_config(dev, 0);
1525 diag = (*dev->dev_ops->dev_configure)(dev);
1527 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1529 ret = eth_err(port_id, diag);
1533 /* Initialize Rx profiling if enabled at compilation time. */
1534 diag = __rte_eth_dev_profile_init(port_id, dev);
1536 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1538 ret = eth_err(port_id, diag);
1542 /* Validate Rx offloads. */
1543 diag = eth_dev_validate_offloads(port_id,
1544 dev_conf->rxmode.offloads,
1545 dev->data->dev_conf.rxmode.offloads, "Rx",
1546 rte_eth_dev_rx_offload_name);
1552 /* Validate Tx offloads. */
1553 diag = eth_dev_validate_offloads(port_id,
1554 dev_conf->txmode.offloads,
1555 dev->data->dev_conf.txmode.offloads, "Tx",
1556 rte_eth_dev_tx_offload_name);
1562 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1565 eth_dev_rx_queue_config(dev, 0);
1566 eth_dev_tx_queue_config(dev, 0);
1568 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1569 if (old_mtu != dev->data->mtu)
1570 dev->data->mtu = old_mtu;
1572 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1577 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1579 if (dev->data->dev_started) {
1580 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1581 dev->data->port_id);
1585 eth_dev_rx_queue_config(dev, 0);
1586 eth_dev_tx_queue_config(dev, 0);
1588 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1592 eth_dev_mac_restore(struct rte_eth_dev *dev,
1593 struct rte_eth_dev_info *dev_info)
1595 struct rte_ether_addr *addr;
1600 /* replay MAC address configuration including default MAC */
1601 addr = &dev->data->mac_addrs[0];
1602 if (*dev->dev_ops->mac_addr_set != NULL)
1603 (*dev->dev_ops->mac_addr_set)(dev, addr);
1604 else if (*dev->dev_ops->mac_addr_add != NULL)
1605 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1607 if (*dev->dev_ops->mac_addr_add != NULL) {
1608 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1609 addr = &dev->data->mac_addrs[i];
1611 /* skip zero address */
1612 if (rte_is_zero_ether_addr(addr))
1616 pool_mask = dev->data->mac_pool_sel[i];
1619 if (pool_mask & 1ULL)
1620 (*dev->dev_ops->mac_addr_add)(dev,
1624 } while (pool_mask);
1630 eth_dev_config_restore(struct rte_eth_dev *dev,
1631 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1635 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1636 eth_dev_mac_restore(dev, dev_info);
1638 /* replay promiscuous configuration */
1640 * use callbacks directly since we don't need port_id check and
1641 * would like to bypass the same value set
1643 if (rte_eth_promiscuous_get(port_id) == 1 &&
1644 *dev->dev_ops->promiscuous_enable != NULL) {
1645 ret = eth_err(port_id,
1646 (*dev->dev_ops->promiscuous_enable)(dev));
1647 if (ret != 0 && ret != -ENOTSUP) {
1649 "Failed to enable promiscuous mode for device (port %u): %s\n",
1650 port_id, rte_strerror(-ret));
1653 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1654 *dev->dev_ops->promiscuous_disable != NULL) {
1655 ret = eth_err(port_id,
1656 (*dev->dev_ops->promiscuous_disable)(dev));
1657 if (ret != 0 && ret != -ENOTSUP) {
1659 "Failed to disable promiscuous mode for device (port %u): %s\n",
1660 port_id, rte_strerror(-ret));
1665 /* replay all multicast configuration */
1667 * use callbacks directly since we don't need port_id check and
1668 * would like to bypass the same value set
1670 if (rte_eth_allmulticast_get(port_id) == 1 &&
1671 *dev->dev_ops->allmulticast_enable != NULL) {
1672 ret = eth_err(port_id,
1673 (*dev->dev_ops->allmulticast_enable)(dev));
1674 if (ret != 0 && ret != -ENOTSUP) {
1676 "Failed to enable allmulticast mode for device (port %u): %s\n",
1677 port_id, rte_strerror(-ret));
1680 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1681 *dev->dev_ops->allmulticast_disable != NULL) {
1682 ret = eth_err(port_id,
1683 (*dev->dev_ops->allmulticast_disable)(dev));
1684 if (ret != 0 && ret != -ENOTSUP) {
1686 "Failed to disable allmulticast mode for device (port %u): %s\n",
1687 port_id, rte_strerror(-ret));
1696 rte_eth_dev_start(uint16_t port_id)
1698 struct rte_eth_dev *dev;
1699 struct rte_eth_dev_info dev_info;
1703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1705 dev = &rte_eth_devices[port_id];
1707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1709 if (dev->data->dev_started != 0) {
1710 RTE_ETHDEV_LOG(INFO,
1711 "Device with port_id=%"PRIu16" already started\n",
1716 ret = rte_eth_dev_info_get(port_id, &dev_info);
1720 /* Lets restore MAC now if device does not support live change */
1721 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1722 eth_dev_mac_restore(dev, &dev_info);
1724 diag = (*dev->dev_ops->dev_start)(dev);
1726 dev->data->dev_started = 1;
1728 return eth_err(port_id, diag);
1730 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1733 "Error during restoring configuration for device (port %u): %s\n",
1734 port_id, rte_strerror(-ret));
1735 ret_stop = rte_eth_dev_stop(port_id);
1736 if (ret_stop != 0) {
1738 "Failed to stop device (port %u): %s\n",
1739 port_id, rte_strerror(-ret_stop));
1745 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1747 (*dev->dev_ops->link_update)(dev, 0);
1750 rte_ethdev_trace_start(port_id);
1755 rte_eth_dev_stop(uint16_t port_id)
1757 struct rte_eth_dev *dev;
1760 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1761 dev = &rte_eth_devices[port_id];
1763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1765 if (dev->data->dev_started == 0) {
1766 RTE_ETHDEV_LOG(INFO,
1767 "Device with port_id=%"PRIu16" already stopped\n",
1772 dev->data->dev_started = 0;
1773 ret = (*dev->dev_ops->dev_stop)(dev);
1774 rte_ethdev_trace_stop(port_id, ret);
1780 rte_eth_dev_set_link_up(uint16_t port_id)
1782 struct rte_eth_dev *dev;
1784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1786 dev = &rte_eth_devices[port_id];
1788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1789 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1793 rte_eth_dev_set_link_down(uint16_t port_id)
1795 struct rte_eth_dev *dev;
1797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1799 dev = &rte_eth_devices[port_id];
1801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1802 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1806 rte_eth_dev_close(uint16_t port_id)
1808 struct rte_eth_dev *dev;
1809 int firsterr, binerr;
1810 int *lasterr = &firsterr;
1812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1813 dev = &rte_eth_devices[port_id];
1815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1816 *lasterr = (*dev->dev_ops->dev_close)(dev);
1820 rte_ethdev_trace_close(port_id);
1821 *lasterr = rte_eth_dev_release_port(dev);
1827 rte_eth_dev_reset(uint16_t port_id)
1829 struct rte_eth_dev *dev;
1832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1833 dev = &rte_eth_devices[port_id];
1835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1837 ret = rte_eth_dev_stop(port_id);
1840 "Failed to stop device (port %u) before reset: %s - ignore\n",
1841 port_id, rte_strerror(-ret));
1843 ret = dev->dev_ops->dev_reset(dev);
1845 return eth_err(port_id, ret);
1849 rte_eth_dev_is_removed(uint16_t port_id)
1851 struct rte_eth_dev *dev;
1854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1856 dev = &rte_eth_devices[port_id];
1858 if (dev->state == RTE_ETH_DEV_REMOVED)
1861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1863 ret = dev->dev_ops->is_removed(dev);
1865 /* Device is physically removed. */
1866 dev->state = RTE_ETH_DEV_REMOVED;
1872 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1873 uint16_t n_seg, uint32_t *mbp_buf_size,
1874 const struct rte_eth_dev_info *dev_info)
1876 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1877 struct rte_mempool *mp_first;
1878 uint32_t offset_mask;
1881 if (n_seg > seg_capa->max_nseg) {
1883 "Requested Rx segments %u exceed supported %u\n",
1884 n_seg, seg_capa->max_nseg);
1888 * Check the sizes and offsets against buffer sizes
1889 * for each segment specified in extended configuration.
1891 mp_first = rx_seg[0].mp;
1892 offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1893 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1894 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1895 uint32_t length = rx_seg[seg_idx].length;
1896 uint32_t offset = rx_seg[seg_idx].offset;
1899 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1902 if (seg_idx != 0 && mp_first != mpl &&
1903 seg_capa->multi_pools == 0) {
1904 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1908 if (seg_capa->offset_allowed == 0) {
1909 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1912 if (offset & offset_mask) {
1913 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1915 seg_capa->offset_align_log2);
1919 if (mpl->private_data_size <
1920 sizeof(struct rte_pktmbuf_pool_private)) {
1922 "%s private_data_size %u < %u\n",
1923 mpl->name, mpl->private_data_size,
1924 (unsigned int)sizeof
1925 (struct rte_pktmbuf_pool_private));
1928 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1929 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1930 length = length != 0 ? length : *mbp_buf_size;
1931 if (*mbp_buf_size < length + offset) {
1933 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1934 mpl->name, *mbp_buf_size,
1935 length + offset, length, offset);
1943 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1944 uint16_t nb_rx_desc, unsigned int socket_id,
1945 const struct rte_eth_rxconf *rx_conf,
1946 struct rte_mempool *mp)
1949 uint32_t mbp_buf_size;
1950 struct rte_eth_dev *dev;
1951 struct rte_eth_dev_info dev_info;
1952 struct rte_eth_rxconf local_conf;
1955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1957 dev = &rte_eth_devices[port_id];
1958 if (rx_queue_id >= dev->data->nb_rx_queues) {
1959 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1965 ret = rte_eth_dev_info_get(port_id, &dev_info);
1970 /* Single pool configuration check. */
1971 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
1973 "Ambiguous segment configuration\n");
1977 * Check the size of the mbuf data buffer, this value
1978 * must be provided in the private data of the memory pool.
1979 * First check that the memory pool(s) has a valid private data.
1981 if (mp->private_data_size <
1982 sizeof(struct rte_pktmbuf_pool_private)) {
1983 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
1984 mp->name, mp->private_data_size,
1986 sizeof(struct rte_pktmbuf_pool_private));
1989 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1990 if (mbp_buf_size < dev_info.min_rx_bufsize +
1991 RTE_PKTMBUF_HEADROOM) {
1993 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
1994 mp->name, mbp_buf_size,
1995 RTE_PKTMBUF_HEADROOM +
1996 dev_info.min_rx_bufsize,
1997 RTE_PKTMBUF_HEADROOM,
1998 dev_info.min_rx_bufsize);
2002 const struct rte_eth_rxseg_split *rx_seg;
2005 /* Extended multi-segment configuration check. */
2006 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2008 "Memory pool is null and no extended configuration provided\n");
2012 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2013 n_seg = rx_conf->rx_nseg;
2015 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2016 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2022 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2027 /* Use default specified by driver, if nb_rx_desc is zero */
2028 if (nb_rx_desc == 0) {
2029 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2030 /* If driver default is also zero, fall back on EAL default */
2031 if (nb_rx_desc == 0)
2032 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2035 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2036 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2037 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2040 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2041 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2042 dev_info.rx_desc_lim.nb_min,
2043 dev_info.rx_desc_lim.nb_align);
2047 if (dev->data->dev_started &&
2048 !(dev_info.dev_capa &
2049 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2052 if (dev->data->dev_started &&
2053 (dev->data->rx_queue_state[rx_queue_id] !=
2054 RTE_ETH_QUEUE_STATE_STOPPED))
2057 rxq = dev->data->rx_queues;
2058 if (rxq[rx_queue_id]) {
2059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2061 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2062 rxq[rx_queue_id] = NULL;
2065 if (rx_conf == NULL)
2066 rx_conf = &dev_info.default_rxconf;
2068 local_conf = *rx_conf;
2071 * If an offloading has already been enabled in
2072 * rte_eth_dev_configure(), it has been enabled on all queues,
2073 * so there is no need to enable it in this queue again.
2074 * The local_conf.offloads input to underlying PMD only carries
2075 * those offloadings which are only enabled on this queue and
2076 * not enabled on all queues.
2078 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2081 * New added offloadings for this queue are those not enabled in
2082 * rte_eth_dev_configure() and they must be per-queue type.
2083 * A pure per-port offloading can't be enabled on a queue while
2084 * disabled on another queue. A pure per-port offloading can't
2085 * be enabled for any queue as new added one if it hasn't been
2086 * enabled in rte_eth_dev_configure().
2088 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2089 local_conf.offloads) {
2091 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2092 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2093 port_id, rx_queue_id, local_conf.offloads,
2094 dev_info.rx_queue_offload_capa,
2100 * If LRO is enabled, check that the maximum aggregated packet
2101 * size is supported by the configured device.
2103 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2104 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2105 dev->data->dev_conf.rxmode.max_lro_pkt_size =
2106 dev->data->dev_conf.rxmode.max_rx_pkt_len;
2107 int ret = eth_dev_check_lro_pkt_size(port_id,
2108 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2109 dev->data->dev_conf.rxmode.max_rx_pkt_len,
2110 dev_info.max_lro_pkt_size);
2115 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2116 socket_id, &local_conf, mp);
2118 if (!dev->data->min_rx_buf_size ||
2119 dev->data->min_rx_buf_size > mbp_buf_size)
2120 dev->data->min_rx_buf_size = mbp_buf_size;
2123 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2125 return eth_err(port_id, ret);
2129 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2130 uint16_t nb_rx_desc,
2131 const struct rte_eth_hairpin_conf *conf)
2134 struct rte_eth_dev *dev;
2135 struct rte_eth_hairpin_cap cap;
2140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2142 dev = &rte_eth_devices[port_id];
2143 if (rx_queue_id >= dev->data->nb_rx_queues) {
2144 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2147 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2152 /* if nb_rx_desc is zero use max number of desc from the driver. */
2153 if (nb_rx_desc == 0)
2154 nb_rx_desc = cap.max_nb_desc;
2155 if (nb_rx_desc > cap.max_nb_desc) {
2157 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2158 nb_rx_desc, cap.max_nb_desc);
2161 if (conf->peer_count > cap.max_rx_2_tx) {
2163 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2164 conf->peer_count, cap.max_rx_2_tx);
2167 if (conf->peer_count == 0) {
2169 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2173 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2174 cap.max_nb_queues != UINT16_MAX; i++) {
2175 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2178 if (count > cap.max_nb_queues) {
2179 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2183 if (dev->data->dev_started)
2185 rxq = dev->data->rx_queues;
2186 if (rxq[rx_queue_id] != NULL) {
2187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2189 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2190 rxq[rx_queue_id] = NULL;
2192 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2195 dev->data->rx_queue_state[rx_queue_id] =
2196 RTE_ETH_QUEUE_STATE_HAIRPIN;
2197 return eth_err(port_id, ret);
2201 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2202 uint16_t nb_tx_desc, unsigned int socket_id,
2203 const struct rte_eth_txconf *tx_conf)
2205 struct rte_eth_dev *dev;
2206 struct rte_eth_dev_info dev_info;
2207 struct rte_eth_txconf local_conf;
2211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2213 dev = &rte_eth_devices[port_id];
2214 if (tx_queue_id >= dev->data->nb_tx_queues) {
2215 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2219 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2221 ret = rte_eth_dev_info_get(port_id, &dev_info);
2225 /* Use default specified by driver, if nb_tx_desc is zero */
2226 if (nb_tx_desc == 0) {
2227 nb_tx_desc = dev_info.default_txportconf.ring_size;
2228 /* If driver default is zero, fall back on EAL default */
2229 if (nb_tx_desc == 0)
2230 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2232 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2233 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2234 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2236 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2237 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2238 dev_info.tx_desc_lim.nb_min,
2239 dev_info.tx_desc_lim.nb_align);
2243 if (dev->data->dev_started &&
2244 !(dev_info.dev_capa &
2245 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2248 if (dev->data->dev_started &&
2249 (dev->data->tx_queue_state[tx_queue_id] !=
2250 RTE_ETH_QUEUE_STATE_STOPPED))
2253 txq = dev->data->tx_queues;
2254 if (txq[tx_queue_id]) {
2255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2257 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2258 txq[tx_queue_id] = NULL;
2261 if (tx_conf == NULL)
2262 tx_conf = &dev_info.default_txconf;
2264 local_conf = *tx_conf;
2267 * If an offloading has already been enabled in
2268 * rte_eth_dev_configure(), it has been enabled on all queues,
2269 * so there is no need to enable it in this queue again.
2270 * The local_conf.offloads input to underlying PMD only carries
2271 * those offloadings which are only enabled on this queue and
2272 * not enabled on all queues.
2274 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2277 * New added offloadings for this queue are those not enabled in
2278 * rte_eth_dev_configure() and they must be per-queue type.
2279 * A pure per-port offloading can't be enabled on a queue while
2280 * disabled on another queue. A pure per-port offloading can't
2281 * be enabled for any queue as new added one if it hasn't been
2282 * enabled in rte_eth_dev_configure().
2284 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2285 local_conf.offloads) {
2287 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2288 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2289 port_id, tx_queue_id, local_conf.offloads,
2290 dev_info.tx_queue_offload_capa,
2295 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2296 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2297 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2301 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2302 uint16_t nb_tx_desc,
2303 const struct rte_eth_hairpin_conf *conf)
2305 struct rte_eth_dev *dev;
2306 struct rte_eth_hairpin_cap cap;
2312 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2313 dev = &rte_eth_devices[port_id];
2314 if (tx_queue_id >= dev->data->nb_tx_queues) {
2315 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2318 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2323 /* if nb_rx_desc is zero use max number of desc from the driver. */
2324 if (nb_tx_desc == 0)
2325 nb_tx_desc = cap.max_nb_desc;
2326 if (nb_tx_desc > cap.max_nb_desc) {
2328 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2329 nb_tx_desc, cap.max_nb_desc);
2332 if (conf->peer_count > cap.max_tx_2_rx) {
2334 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2335 conf->peer_count, cap.max_tx_2_rx);
2338 if (conf->peer_count == 0) {
2340 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2344 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2345 cap.max_nb_queues != UINT16_MAX; i++) {
2346 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2349 if (count > cap.max_nb_queues) {
2350 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2354 if (dev->data->dev_started)
2356 txq = dev->data->tx_queues;
2357 if (txq[tx_queue_id] != NULL) {
2358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2360 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2361 txq[tx_queue_id] = NULL;
2363 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2364 (dev, tx_queue_id, nb_tx_desc, conf);
2366 dev->data->tx_queue_state[tx_queue_id] =
2367 RTE_ETH_QUEUE_STATE_HAIRPIN;
2368 return eth_err(port_id, ret);
2372 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2374 struct rte_eth_dev *dev;
2377 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2378 dev = &rte_eth_devices[tx_port];
2379 if (dev->data->dev_started == 0) {
2380 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2385 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2387 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2388 " to Rx %d (%d - all ports)\n",
2389 tx_port, rx_port, RTE_MAX_ETHPORTS);
2395 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2397 struct rte_eth_dev *dev;
2400 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2401 dev = &rte_eth_devices[tx_port];
2402 if (dev->data->dev_started == 0) {
2403 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2407 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2408 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2410 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2411 " from Rx %d (%d - all ports)\n",
2412 tx_port, rx_port, RTE_MAX_ETHPORTS);
2418 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2419 size_t len, uint32_t direction)
2421 struct rte_eth_dev *dev;
2424 if (peer_ports == NULL || len == 0)
2427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2428 dev = &rte_eth_devices[port_id];
2429 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2432 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2435 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2436 port_id, direction ? "Rx" : "Tx");
2442 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2443 void *userdata __rte_unused)
2445 rte_pktmbuf_free_bulk(pkts, unsent);
2449 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2452 uint64_t *count = userdata;
2454 rte_pktmbuf_free_bulk(pkts, unsent);
2459 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2460 buffer_tx_error_fn cbfn, void *userdata)
2462 buffer->error_callback = cbfn;
2463 buffer->error_userdata = userdata;
2468 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2475 buffer->size = size;
2476 if (buffer->error_callback == NULL) {
2477 ret = rte_eth_tx_buffer_set_err_callback(
2478 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2485 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2487 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2490 /* Validate Input Data. Bail if not valid or not supported. */
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2492 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2494 /* Call driver to free pending mbufs. */
2495 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2497 return eth_err(port_id, ret);
2501 rte_eth_promiscuous_enable(uint16_t port_id)
2503 struct rte_eth_dev *dev;
2506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2507 dev = &rte_eth_devices[port_id];
2509 if (dev->data->promiscuous == 1)
2512 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2514 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2515 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2517 return eth_err(port_id, diag);
2521 rte_eth_promiscuous_disable(uint16_t port_id)
2523 struct rte_eth_dev *dev;
2526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2527 dev = &rte_eth_devices[port_id];
2529 if (dev->data->promiscuous == 0)
2532 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2534 dev->data->promiscuous = 0;
2535 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2537 dev->data->promiscuous = 1;
2539 return eth_err(port_id, diag);
2543 rte_eth_promiscuous_get(uint16_t port_id)
2545 struct rte_eth_dev *dev;
2547 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2549 dev = &rte_eth_devices[port_id];
2550 return dev->data->promiscuous;
2554 rte_eth_allmulticast_enable(uint16_t port_id)
2556 struct rte_eth_dev *dev;
2559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2560 dev = &rte_eth_devices[port_id];
2562 if (dev->data->all_multicast == 1)
2565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2566 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2567 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2569 return eth_err(port_id, diag);
2573 rte_eth_allmulticast_disable(uint16_t port_id)
2575 struct rte_eth_dev *dev;
2578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2579 dev = &rte_eth_devices[port_id];
2581 if (dev->data->all_multicast == 0)
2584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2585 dev->data->all_multicast = 0;
2586 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2588 dev->data->all_multicast = 1;
2590 return eth_err(port_id, diag);
2594 rte_eth_allmulticast_get(uint16_t port_id)
2596 struct rte_eth_dev *dev;
2598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600 dev = &rte_eth_devices[port_id];
2601 return dev->data->all_multicast;
2605 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2607 struct rte_eth_dev *dev;
2609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2610 dev = &rte_eth_devices[port_id];
2612 if (dev->data->dev_conf.intr_conf.lsc &&
2613 dev->data->dev_started)
2614 rte_eth_linkstatus_get(dev, eth_link);
2616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2617 (*dev->dev_ops->link_update)(dev, 1);
2618 *eth_link = dev->data->dev_link;
2625 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2627 struct rte_eth_dev *dev;
2629 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2630 dev = &rte_eth_devices[port_id];
2632 if (dev->data->dev_conf.intr_conf.lsc &&
2633 dev->data->dev_started)
2634 rte_eth_linkstatus_get(dev, eth_link);
2636 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2637 (*dev->dev_ops->link_update)(dev, 0);
2638 *eth_link = dev->data->dev_link;
2645 rte_eth_link_speed_to_str(uint32_t link_speed)
2647 switch (link_speed) {
2648 case ETH_SPEED_NUM_NONE: return "None";
2649 case ETH_SPEED_NUM_10M: return "10 Mbps";
2650 case ETH_SPEED_NUM_100M: return "100 Mbps";
2651 case ETH_SPEED_NUM_1G: return "1 Gbps";
2652 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2653 case ETH_SPEED_NUM_5G: return "5 Gbps";
2654 case ETH_SPEED_NUM_10G: return "10 Gbps";
2655 case ETH_SPEED_NUM_20G: return "20 Gbps";
2656 case ETH_SPEED_NUM_25G: return "25 Gbps";
2657 case ETH_SPEED_NUM_40G: return "40 Gbps";
2658 case ETH_SPEED_NUM_50G: return "50 Gbps";
2659 case ETH_SPEED_NUM_56G: return "56 Gbps";
2660 case ETH_SPEED_NUM_100G: return "100 Gbps";
2661 case ETH_SPEED_NUM_200G: return "200 Gbps";
2662 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2663 default: return "Invalid";
2668 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2670 if (eth_link->link_status == ETH_LINK_DOWN)
2671 return snprintf(str, len, "Link down");
2673 return snprintf(str, len, "Link up at %s %s %s",
2674 rte_eth_link_speed_to_str(eth_link->link_speed),
2675 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2677 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2678 "Autoneg" : "Fixed");
2682 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2684 struct rte_eth_dev *dev;
2686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2688 dev = &rte_eth_devices[port_id];
2689 memset(stats, 0, sizeof(*stats));
2691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2692 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2693 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2697 rte_eth_stats_reset(uint16_t port_id)
2699 struct rte_eth_dev *dev;
2702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2703 dev = &rte_eth_devices[port_id];
2705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2706 ret = (*dev->dev_ops->stats_reset)(dev);
2708 return eth_err(port_id, ret);
2710 dev->data->rx_mbuf_alloc_failed = 0;
2716 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2718 uint16_t nb_rxqs, nb_txqs;
2721 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2722 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2724 count = RTE_NB_STATS;
2725 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2726 count += nb_rxqs * RTE_NB_RXQ_STATS;
2727 count += nb_txqs * RTE_NB_TXQ_STATS;
2734 eth_dev_get_xstats_count(uint16_t port_id)
2736 struct rte_eth_dev *dev;
2739 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2740 dev = &rte_eth_devices[port_id];
2741 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2742 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2745 return eth_err(port_id, count);
2747 if (dev->dev_ops->xstats_get_names != NULL) {
2748 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2750 return eth_err(port_id, count);
2755 count += eth_dev_get_xstats_basic_count(dev);
2761 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2764 int cnt_xstats, idx_xstat;
2766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2769 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2774 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2779 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2780 if (cnt_xstats < 0) {
2781 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2785 /* Get id-name lookup table */
2786 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2788 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2789 port_id, xstats_names, cnt_xstats, NULL)) {
2790 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2794 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2795 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2804 /* retrieve basic stats names */
2806 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2807 struct rte_eth_xstat_name *xstats_names)
2809 int cnt_used_entries = 0;
2810 uint32_t idx, id_queue;
2813 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2814 strlcpy(xstats_names[cnt_used_entries].name,
2815 eth_dev_stats_strings[idx].name,
2816 sizeof(xstats_names[0].name));
2820 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2821 return cnt_used_entries;
2823 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2824 for (id_queue = 0; id_queue < num_q; id_queue++) {
2825 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2826 snprintf(xstats_names[cnt_used_entries].name,
2827 sizeof(xstats_names[0].name),
2829 id_queue, eth_dev_rxq_stats_strings[idx].name);
2834 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2835 for (id_queue = 0; id_queue < num_q; id_queue++) {
2836 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2837 snprintf(xstats_names[cnt_used_entries].name,
2838 sizeof(xstats_names[0].name),
2840 id_queue, eth_dev_txq_stats_strings[idx].name);
2844 return cnt_used_entries;
2847 /* retrieve ethdev extended statistics names */
2849 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2850 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2853 struct rte_eth_xstat_name *xstats_names_copy;
2854 unsigned int no_basic_stat_requested = 1;
2855 unsigned int no_ext_stat_requested = 1;
2856 unsigned int expected_entries;
2857 unsigned int basic_count;
2858 struct rte_eth_dev *dev;
2862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2863 dev = &rte_eth_devices[port_id];
2865 basic_count = eth_dev_get_xstats_basic_count(dev);
2866 ret = eth_dev_get_xstats_count(port_id);
2869 expected_entries = (unsigned int)ret;
2871 /* Return max number of stats if no ids given */
2874 return expected_entries;
2875 else if (xstats_names && size < expected_entries)
2876 return expected_entries;
2879 if (ids && !xstats_names)
2882 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2883 uint64_t ids_copy[size];
2885 for (i = 0; i < size; i++) {
2886 if (ids[i] < basic_count) {
2887 no_basic_stat_requested = 0;
2892 * Convert ids to xstats ids that PMD knows.
2893 * ids known by user are basic + extended stats.
2895 ids_copy[i] = ids[i] - basic_count;
2898 if (no_basic_stat_requested)
2899 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2900 xstats_names, ids_copy, size);
2903 /* Retrieve all stats */
2905 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2907 if (num_stats < 0 || num_stats > (int)expected_entries)
2910 return expected_entries;
2913 xstats_names_copy = calloc(expected_entries,
2914 sizeof(struct rte_eth_xstat_name));
2916 if (!xstats_names_copy) {
2917 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2922 for (i = 0; i < size; i++) {
2923 if (ids[i] >= basic_count) {
2924 no_ext_stat_requested = 0;
2930 /* Fill xstats_names_copy structure */
2931 if (ids && no_ext_stat_requested) {
2932 eth_basic_stats_get_names(dev, xstats_names_copy);
2934 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2937 free(xstats_names_copy);
2943 for (i = 0; i < size; i++) {
2944 if (ids[i] >= expected_entries) {
2945 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2946 free(xstats_names_copy);
2949 xstats_names[i] = xstats_names_copy[ids[i]];
2952 free(xstats_names_copy);
2957 rte_eth_xstats_get_names(uint16_t port_id,
2958 struct rte_eth_xstat_name *xstats_names,
2961 struct rte_eth_dev *dev;
2962 int cnt_used_entries;
2963 int cnt_expected_entries;
2964 int cnt_driver_entries;
2966 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
2967 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2968 (int)size < cnt_expected_entries)
2969 return cnt_expected_entries;
2971 /* port_id checked in eth_dev_get_xstats_count() */
2972 dev = &rte_eth_devices[port_id];
2974 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
2976 if (dev->dev_ops->xstats_get_names != NULL) {
2977 /* If there are any driver-specific xstats, append them
2980 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2982 xstats_names + cnt_used_entries,
2983 size - cnt_used_entries);
2984 if (cnt_driver_entries < 0)
2985 return eth_err(port_id, cnt_driver_entries);
2986 cnt_used_entries += cnt_driver_entries;
2989 return cnt_used_entries;
2994 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2996 struct rte_eth_dev *dev;
2997 struct rte_eth_stats eth_stats;
2998 unsigned int count = 0, i, q;
2999 uint64_t val, *stats_ptr;
3000 uint16_t nb_rxqs, nb_txqs;
3003 ret = rte_eth_stats_get(port_id, ð_stats);
3007 dev = &rte_eth_devices[port_id];
3009 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3010 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3013 for (i = 0; i < RTE_NB_STATS; i++) {
3014 stats_ptr = RTE_PTR_ADD(ð_stats,
3015 eth_dev_stats_strings[i].offset);
3017 xstats[count++].value = val;
3020 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3024 for (q = 0; q < nb_rxqs; q++) {
3025 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3026 stats_ptr = RTE_PTR_ADD(ð_stats,
3027 eth_dev_rxq_stats_strings[i].offset +
3028 q * sizeof(uint64_t));
3030 xstats[count++].value = val;
3035 for (q = 0; q < nb_txqs; q++) {
3036 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3037 stats_ptr = RTE_PTR_ADD(ð_stats,
3038 eth_dev_txq_stats_strings[i].offset +
3039 q * sizeof(uint64_t));
3041 xstats[count++].value = val;
3047 /* retrieve ethdev extended statistics */
3049 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3050 uint64_t *values, unsigned int size)
3052 unsigned int no_basic_stat_requested = 1;
3053 unsigned int no_ext_stat_requested = 1;
3054 unsigned int num_xstats_filled;
3055 unsigned int basic_count;
3056 uint16_t expected_entries;
3057 struct rte_eth_dev *dev;
3061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3062 ret = eth_dev_get_xstats_count(port_id);
3065 expected_entries = (uint16_t)ret;
3066 struct rte_eth_xstat xstats[expected_entries];
3067 dev = &rte_eth_devices[port_id];
3068 basic_count = eth_dev_get_xstats_basic_count(dev);
3070 /* Return max number of stats if no ids given */
3073 return expected_entries;
3074 else if (values && size < expected_entries)
3075 return expected_entries;
3081 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3082 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3083 uint64_t ids_copy[size];
3085 for (i = 0; i < size; i++) {
3086 if (ids[i] < basic_count) {
3087 no_basic_stat_requested = 0;
3092 * Convert ids to xstats ids that PMD knows.
3093 * ids known by user are basic + extended stats.
3095 ids_copy[i] = ids[i] - basic_count;
3098 if (no_basic_stat_requested)
3099 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3104 for (i = 0; i < size; i++) {
3105 if (ids[i] >= basic_count) {
3106 no_ext_stat_requested = 0;
3112 /* Fill the xstats structure */
3113 if (ids && no_ext_stat_requested)
3114 ret = eth_basic_stats_get(port_id, xstats);
3116 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3120 num_xstats_filled = (unsigned int)ret;
3122 /* Return all stats */
3124 for (i = 0; i < num_xstats_filled; i++)
3125 values[i] = xstats[i].value;
3126 return expected_entries;
3130 for (i = 0; i < size; i++) {
3131 if (ids[i] >= expected_entries) {
3132 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3135 values[i] = xstats[ids[i]].value;
3141 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3144 struct rte_eth_dev *dev;
3145 unsigned int count = 0, i;
3146 signed int xcount = 0;
3147 uint16_t nb_rxqs, nb_txqs;
3150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3152 dev = &rte_eth_devices[port_id];
3154 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3155 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3157 /* Return generic statistics */
3158 count = RTE_NB_STATS;
3159 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3160 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3162 /* implemented by the driver */
3163 if (dev->dev_ops->xstats_get != NULL) {
3164 /* Retrieve the xstats from the driver at the end of the
3167 xcount = (*dev->dev_ops->xstats_get)(dev,
3168 xstats ? xstats + count : NULL,
3169 (n > count) ? n - count : 0);
3172 return eth_err(port_id, xcount);
3175 if (n < count + xcount || xstats == NULL)
3176 return count + xcount;
3178 /* now fill the xstats structure */
3179 ret = eth_basic_stats_get(port_id, xstats);
3184 for (i = 0; i < count; i++)
3186 /* add an offset to driver-specific stats */
3187 for ( ; i < count + xcount; i++)
3188 xstats[i].id += count;
3190 return count + xcount;
3193 /* reset ethdev extended statistics */
3195 rte_eth_xstats_reset(uint16_t port_id)
3197 struct rte_eth_dev *dev;
3199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3200 dev = &rte_eth_devices[port_id];
3202 /* implemented by the driver */
3203 if (dev->dev_ops->xstats_reset != NULL)
3204 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3206 /* fallback to default */
3207 return rte_eth_stats_reset(port_id);
3211 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3212 uint8_t stat_idx, uint8_t is_rx)
3214 struct rte_eth_dev *dev;
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3218 dev = &rte_eth_devices[port_id];
3220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3222 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3225 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3228 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3231 return (*dev->dev_ops->queue_stats_mapping_set)
3232 (dev, queue_id, stat_idx, is_rx);
3237 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3240 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3242 stat_idx, STAT_QMAP_TX));
3247 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3250 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3252 stat_idx, STAT_QMAP_RX));
3256 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3258 struct rte_eth_dev *dev;
3260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3261 dev = &rte_eth_devices[port_id];
3263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3264 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3265 fw_version, fw_size));
3269 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3271 struct rte_eth_dev *dev;
3272 const struct rte_eth_desc_lim lim = {
3273 .nb_max = UINT16_MAX,
3276 .nb_seg_max = UINT16_MAX,
3277 .nb_mtu_seg_max = UINT16_MAX,
3282 * Init dev_info before port_id check since caller does not have
3283 * return status and does not know if get is successful or not.
3285 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3286 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3289 dev = &rte_eth_devices[port_id];
3291 dev_info->rx_desc_lim = lim;
3292 dev_info->tx_desc_lim = lim;
3293 dev_info->device = dev->device;
3294 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3295 dev_info->max_mtu = UINT16_MAX;
3297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3298 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3300 /* Cleanup already filled in device information */
3301 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3302 return eth_err(port_id, diag);
3305 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3306 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3307 RTE_MAX_QUEUES_PER_PORT);
3308 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3309 RTE_MAX_QUEUES_PER_PORT);
3311 dev_info->driver_name = dev->device->driver->name;
3312 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3313 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3315 dev_info->dev_flags = &dev->data->dev_flags;
3321 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3322 uint32_t *ptypes, int num)
3325 struct rte_eth_dev *dev;
3326 const uint32_t *all_ptypes;
3328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3329 dev = &rte_eth_devices[port_id];
3330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3331 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3336 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3337 if (all_ptypes[i] & ptype_mask) {
3339 ptypes[j] = all_ptypes[i];
3347 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3348 uint32_t *set_ptypes, unsigned int num)
3350 const uint32_t valid_ptype_masks[] = {
3354 RTE_PTYPE_TUNNEL_MASK,
3355 RTE_PTYPE_INNER_L2_MASK,
3356 RTE_PTYPE_INNER_L3_MASK,
3357 RTE_PTYPE_INNER_L4_MASK,
3359 const uint32_t *all_ptypes;
3360 struct rte_eth_dev *dev;
3361 uint32_t unused_mask;
3365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3366 dev = &rte_eth_devices[port_id];
3368 if (num > 0 && set_ptypes == NULL)
3371 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3372 *dev->dev_ops->dev_ptypes_set == NULL) {
3377 if (ptype_mask == 0) {
3378 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3383 unused_mask = ptype_mask;
3384 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3385 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3386 if (mask && mask != valid_ptype_masks[i]) {
3390 unused_mask &= ~valid_ptype_masks[i];
3398 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3399 if (all_ptypes == NULL) {
3405 * Accommodate as many set_ptypes as possible. If the supplied
3406 * set_ptypes array is insufficient fill it partially.
3408 for (i = 0, j = 0; set_ptypes != NULL &&
3409 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3410 if (ptype_mask & all_ptypes[i]) {
3412 set_ptypes[j] = all_ptypes[i];
3420 if (set_ptypes != NULL && j < num)
3421 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3423 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3427 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3433 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3435 struct rte_eth_dev *dev;
3437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3438 dev = &rte_eth_devices[port_id];
3439 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3445 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3447 struct rte_eth_dev *dev;
3449 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3451 dev = &rte_eth_devices[port_id];
3452 *mtu = dev->data->mtu;
3457 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3460 struct rte_eth_dev_info dev_info;
3461 struct rte_eth_dev *dev;
3463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3464 dev = &rte_eth_devices[port_id];
3465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3468 * Check if the device supports dev_infos_get, if it does not
3469 * skip min_mtu/max_mtu validation here as this requires values
3470 * that are populated within the call to rte_eth_dev_info_get()
3471 * which relies on dev->dev_ops->dev_infos_get.
3473 if (*dev->dev_ops->dev_infos_get != NULL) {
3474 ret = rte_eth_dev_info_get(port_id, &dev_info);
3478 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3482 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3484 dev->data->mtu = mtu;
3486 return eth_err(port_id, ret);
3490 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3492 struct rte_eth_dev *dev;
3495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3496 dev = &rte_eth_devices[port_id];
3497 if (!(dev->data->dev_conf.rxmode.offloads &
3498 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3499 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3504 if (vlan_id > 4095) {
3505 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3511 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3513 struct rte_vlan_filter_conf *vfc;
3517 vfc = &dev->data->vlan_filter_conf;
3518 vidx = vlan_id / 64;
3519 vbit = vlan_id % 64;
3522 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3524 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3527 return eth_err(port_id, ret);
3531 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3534 struct rte_eth_dev *dev;
3536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3537 dev = &rte_eth_devices[port_id];
3538 if (rx_queue_id >= dev->data->nb_rx_queues) {
3539 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3544 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3550 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3551 enum rte_vlan_type vlan_type,
3554 struct rte_eth_dev *dev;
3556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3557 dev = &rte_eth_devices[port_id];
3558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3560 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3565 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3567 struct rte_eth_dev_info dev_info;
3568 struct rte_eth_dev *dev;
3572 uint64_t orig_offloads;
3573 uint64_t dev_offloads;
3574 uint64_t new_offloads;
3576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3577 dev = &rte_eth_devices[port_id];
3579 /* save original values in case of failure */
3580 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3581 dev_offloads = orig_offloads;
3583 /* check which option changed by application */
3584 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3585 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3588 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3590 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3591 mask |= ETH_VLAN_STRIP_MASK;
3594 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3595 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3598 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3600 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3601 mask |= ETH_VLAN_FILTER_MASK;
3604 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3605 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3608 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3610 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3611 mask |= ETH_VLAN_EXTEND_MASK;
3614 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3615 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3618 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3620 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3621 mask |= ETH_QINQ_STRIP_MASK;
3628 ret = rte_eth_dev_info_get(port_id, &dev_info);
3632 /* Rx VLAN offloading must be within its device capabilities */
3633 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3634 new_offloads = dev_offloads & ~orig_offloads;
3636 "Ethdev port_id=%u requested new added VLAN offloads "
3637 "0x%" PRIx64 " must be within Rx offloads capabilities "
3638 "0x%" PRIx64 " in %s()\n",
3639 port_id, new_offloads, dev_info.rx_offload_capa,
3644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3645 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3646 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3648 /* hit an error restore original values */
3649 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3652 return eth_err(port_id, ret);
3656 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3658 struct rte_eth_dev *dev;
3659 uint64_t *dev_offloads;
3662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3663 dev = &rte_eth_devices[port_id];
3664 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3666 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3667 ret |= ETH_VLAN_STRIP_OFFLOAD;
3669 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3670 ret |= ETH_VLAN_FILTER_OFFLOAD;
3672 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3673 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3675 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3676 ret |= ETH_QINQ_STRIP_OFFLOAD;
3682 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3684 struct rte_eth_dev *dev;
3686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3687 dev = &rte_eth_devices[port_id];
3688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3690 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3694 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3696 struct rte_eth_dev *dev;
3698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3699 dev = &rte_eth_devices[port_id];
3700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3701 memset(fc_conf, 0, sizeof(*fc_conf));
3702 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3706 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3708 struct rte_eth_dev *dev;
3710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3711 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3712 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3716 dev = &rte_eth_devices[port_id];
3717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3718 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3722 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3723 struct rte_eth_pfc_conf *pfc_conf)
3725 struct rte_eth_dev *dev;
3727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3728 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3729 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3733 dev = &rte_eth_devices[port_id];
3734 /* High water, low water validation are device specific */
3735 if (*dev->dev_ops->priority_flow_ctrl_set)
3736 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3742 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3750 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3751 for (i = 0; i < num; i++) {
3752 if (reta_conf[i].mask)
3760 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3764 uint16_t i, idx, shift;
3770 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3774 for (i = 0; i < reta_size; i++) {
3775 idx = i / RTE_RETA_GROUP_SIZE;
3776 shift = i % RTE_RETA_GROUP_SIZE;
3777 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3778 (reta_conf[idx].reta[shift] >= max_rxq)) {
3780 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3782 reta_conf[idx].reta[shift], max_rxq);
3791 rte_eth_dev_rss_reta_update(uint16_t port_id,
3792 struct rte_eth_rss_reta_entry64 *reta_conf,
3795 struct rte_eth_dev *dev;
3798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3799 /* Check mask bits */
3800 ret = eth_check_reta_mask(reta_conf, reta_size);
3804 dev = &rte_eth_devices[port_id];
3806 /* Check entry value */
3807 ret = eth_check_reta_entry(reta_conf, reta_size,
3808 dev->data->nb_rx_queues);
3812 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3813 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3818 rte_eth_dev_rss_reta_query(uint16_t port_id,
3819 struct rte_eth_rss_reta_entry64 *reta_conf,
3822 struct rte_eth_dev *dev;
3825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3827 /* Check mask bits */
3828 ret = eth_check_reta_mask(reta_conf, reta_size);
3832 dev = &rte_eth_devices[port_id];
3833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3834 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3839 rte_eth_dev_rss_hash_update(uint16_t port_id,
3840 struct rte_eth_rss_conf *rss_conf)
3842 struct rte_eth_dev *dev;
3843 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3848 ret = rte_eth_dev_info_get(port_id, &dev_info);
3852 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3854 dev = &rte_eth_devices[port_id];
3855 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3856 dev_info.flow_type_rss_offloads) {
3858 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3859 port_id, rss_conf->rss_hf,
3860 dev_info.flow_type_rss_offloads);
3863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3864 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3869 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3870 struct rte_eth_rss_conf *rss_conf)
3872 struct rte_eth_dev *dev;
3874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3875 dev = &rte_eth_devices[port_id];
3876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3877 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3882 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3883 struct rte_eth_udp_tunnel *udp_tunnel)
3885 struct rte_eth_dev *dev;
3887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3888 if (udp_tunnel == NULL) {
3889 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3893 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3894 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3898 dev = &rte_eth_devices[port_id];
3899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3900 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3905 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3906 struct rte_eth_udp_tunnel *udp_tunnel)
3908 struct rte_eth_dev *dev;
3910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3911 dev = &rte_eth_devices[port_id];
3913 if (udp_tunnel == NULL) {
3914 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3918 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3919 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3924 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3929 rte_eth_led_on(uint16_t port_id)
3931 struct rte_eth_dev *dev;
3933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3934 dev = &rte_eth_devices[port_id];
3935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3936 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3940 rte_eth_led_off(uint16_t port_id)
3942 struct rte_eth_dev *dev;
3944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3945 dev = &rte_eth_devices[port_id];
3946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3947 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3951 rte_eth_fec_get_capability(uint16_t port_id,
3952 struct rte_eth_fec_capa *speed_fec_capa,
3955 struct rte_eth_dev *dev;
3958 if (speed_fec_capa == NULL && num > 0)
3961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3962 dev = &rte_eth_devices[port_id];
3963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
3964 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
3970 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
3972 struct rte_eth_dev *dev;
3974 if (fec_capa == NULL)
3977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3978 dev = &rte_eth_devices[port_id];
3979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
3980 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
3984 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
3986 struct rte_eth_dev *dev;
3988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3989 dev = &rte_eth_devices[port_id];
3990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
3991 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
3995 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3999 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4001 struct rte_eth_dev_info dev_info;
4002 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4006 ret = rte_eth_dev_info_get(port_id, &dev_info);
4010 for (i = 0; i < dev_info.max_mac_addrs; i++)
4011 if (memcmp(addr, &dev->data->mac_addrs[i],
4012 RTE_ETHER_ADDR_LEN) == 0)
4018 static const struct rte_ether_addr null_mac_addr;
4021 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4024 struct rte_eth_dev *dev;
4029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4030 dev = &rte_eth_devices[port_id];
4031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4033 if (rte_is_zero_ether_addr(addr)) {
4034 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4038 if (pool >= ETH_64_POOLS) {
4039 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
4043 index = eth_dev_get_mac_addr_index(port_id, addr);
4045 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4047 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4052 pool_mask = dev->data->mac_pool_sel[index];
4054 /* Check if both MAC address and pool is already there, and do nothing */
4055 if (pool_mask & (1ULL << pool))
4060 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4063 /* Update address in NIC data structure */
4064 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4066 /* Update pool bitmap in NIC data structure */
4067 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4070 return eth_err(port_id, ret);
4074 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4076 struct rte_eth_dev *dev;
4079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4080 dev = &rte_eth_devices[port_id];
4081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4083 index = eth_dev_get_mac_addr_index(port_id, addr);
4086 "Port %u: Cannot remove default MAC address\n",
4089 } else if (index < 0)
4090 return 0; /* Do nothing if address wasn't found */
4093 (*dev->dev_ops->mac_addr_remove)(dev, index);
4095 /* Update address in NIC data structure */
4096 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4098 /* reset pool bitmap */
4099 dev->data->mac_pool_sel[index] = 0;
4105 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4107 struct rte_eth_dev *dev;
4110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4112 if (!rte_is_valid_assigned_ether_addr(addr))
4115 dev = &rte_eth_devices[port_id];
4116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4118 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4122 /* Update default address in NIC data structure */
4123 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4130 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4134 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4135 const struct rte_ether_addr *addr)
4137 struct rte_eth_dev_info dev_info;
4138 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4142 ret = rte_eth_dev_info_get(port_id, &dev_info);
4146 if (!dev->data->hash_mac_addrs)
4149 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4150 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4151 RTE_ETHER_ADDR_LEN) == 0)
4158 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4163 struct rte_eth_dev *dev;
4165 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4167 dev = &rte_eth_devices[port_id];
4168 if (rte_is_zero_ether_addr(addr)) {
4169 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4174 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4175 /* Check if it's already there, and do nothing */
4176 if ((index >= 0) && on)
4182 "Port %u: the MAC address was not set in UTA\n",
4187 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4189 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4196 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4198 /* Update address in NIC data structure */
4200 rte_ether_addr_copy(addr,
4201 &dev->data->hash_mac_addrs[index]);
4203 rte_ether_addr_copy(&null_mac_addr,
4204 &dev->data->hash_mac_addrs[index]);
4207 return eth_err(port_id, ret);
4211 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4213 struct rte_eth_dev *dev;
4215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4217 dev = &rte_eth_devices[port_id];
4219 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4220 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4224 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4227 struct rte_eth_dev *dev;
4228 struct rte_eth_dev_info dev_info;
4229 struct rte_eth_link link;
4232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4234 ret = rte_eth_dev_info_get(port_id, &dev_info);
4238 dev = &rte_eth_devices[port_id];
4239 link = dev->data->dev_link;
4241 if (queue_idx > dev_info.max_tx_queues) {
4243 "Set queue rate limit:port %u: invalid queue id=%u\n",
4244 port_id, queue_idx);
4248 if (tx_rate > link.link_speed) {
4250 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4251 tx_rate, link.link_speed);
4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4256 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4257 queue_idx, tx_rate));
4261 rte_eth_mirror_rule_set(uint16_t port_id,
4262 struct rte_eth_mirror_conf *mirror_conf,
4263 uint8_t rule_id, uint8_t on)
4265 struct rte_eth_dev *dev;
4267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4268 if (mirror_conf->rule_type == 0) {
4269 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4273 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4274 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4279 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4280 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4281 (mirror_conf->pool_mask == 0)) {
4283 "Invalid mirror pool, pool mask can not be 0\n");
4287 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4288 mirror_conf->vlan.vlan_mask == 0) {
4290 "Invalid vlan mask, vlan mask can not be 0\n");
4294 dev = &rte_eth_devices[port_id];
4295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4297 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4298 mirror_conf, rule_id, on));
4302 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4304 struct rte_eth_dev *dev;
4306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4308 dev = &rte_eth_devices[port_id];
4309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4311 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4315 RTE_INIT(eth_dev_init_cb_lists)
4319 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4320 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4324 rte_eth_dev_callback_register(uint16_t port_id,
4325 enum rte_eth_event_type event,
4326 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4328 struct rte_eth_dev *dev;
4329 struct rte_eth_dev_callback *user_cb;
4336 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4337 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4341 if (port_id == RTE_ETH_ALL) {
4343 last_port = RTE_MAX_ETHPORTS - 1;
4345 next_port = last_port = port_id;
4348 rte_spinlock_lock(ð_dev_cb_lock);
4351 dev = &rte_eth_devices[next_port];
4353 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4354 if (user_cb->cb_fn == cb_fn &&
4355 user_cb->cb_arg == cb_arg &&
4356 user_cb->event == event) {
4361 /* create a new callback. */
4362 if (user_cb == NULL) {
4363 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4364 sizeof(struct rte_eth_dev_callback), 0);
4365 if (user_cb != NULL) {
4366 user_cb->cb_fn = cb_fn;
4367 user_cb->cb_arg = cb_arg;
4368 user_cb->event = event;
4369 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4372 rte_spinlock_unlock(ð_dev_cb_lock);
4373 rte_eth_dev_callback_unregister(port_id, event,
4379 } while (++next_port <= last_port);
4381 rte_spinlock_unlock(ð_dev_cb_lock);
4386 rte_eth_dev_callback_unregister(uint16_t port_id,
4387 enum rte_eth_event_type event,
4388 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4391 struct rte_eth_dev *dev;
4392 struct rte_eth_dev_callback *cb, *next;
4399 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4400 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4404 if (port_id == RTE_ETH_ALL) {
4406 last_port = RTE_MAX_ETHPORTS - 1;
4408 next_port = last_port = port_id;
4411 rte_spinlock_lock(ð_dev_cb_lock);
4414 dev = &rte_eth_devices[next_port];
4416 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4419 next = TAILQ_NEXT(cb, next);
4421 if (cb->cb_fn != cb_fn || cb->event != event ||
4422 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4426 * if this callback is not executing right now,
4429 if (cb->active == 0) {
4430 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4436 } while (++next_port <= last_port);
4438 rte_spinlock_unlock(ð_dev_cb_lock);
4443 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4444 enum rte_eth_event_type event, void *ret_param)
4446 struct rte_eth_dev_callback *cb_lst;
4447 struct rte_eth_dev_callback dev_cb;
4450 rte_spinlock_lock(ð_dev_cb_lock);
4451 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4452 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4456 if (ret_param != NULL)
4457 dev_cb.ret_param = ret_param;
4459 rte_spinlock_unlock(ð_dev_cb_lock);
4460 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4461 dev_cb.cb_arg, dev_cb.ret_param);
4462 rte_spinlock_lock(ð_dev_cb_lock);
4465 rte_spinlock_unlock(ð_dev_cb_lock);
4470 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4475 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4477 dev->state = RTE_ETH_DEV_ATTACHED;
4481 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4484 struct rte_eth_dev *dev;
4485 struct rte_intr_handle *intr_handle;
4489 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4491 dev = &rte_eth_devices[port_id];
4493 if (!dev->intr_handle) {
4494 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4498 intr_handle = dev->intr_handle;
4499 if (!intr_handle->intr_vec) {
4500 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4504 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4505 vec = intr_handle->intr_vec[qid];
4506 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4507 if (rc && rc != -EEXIST) {
4509 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4510 port_id, qid, op, epfd, vec);
4518 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4520 struct rte_intr_handle *intr_handle;
4521 struct rte_eth_dev *dev;
4522 unsigned int efd_idx;
4526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4528 dev = &rte_eth_devices[port_id];
4530 if (queue_id >= dev->data->nb_rx_queues) {
4531 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4535 if (!dev->intr_handle) {
4536 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4540 intr_handle = dev->intr_handle;
4541 if (!intr_handle->intr_vec) {
4542 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4546 vec = intr_handle->intr_vec[queue_id];
4547 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4548 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4549 fd = intr_handle->efds[efd_idx];
4555 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4556 const char *ring_name)
4558 return snprintf(name, len, "eth_p%d_q%d_%s",
4559 port_id, queue_id, ring_name);
4562 const struct rte_memzone *
4563 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4564 uint16_t queue_id, size_t size, unsigned align,
4567 char z_name[RTE_MEMZONE_NAMESIZE];
4568 const struct rte_memzone *mz;
4571 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4572 queue_id, ring_name);
4573 if (rc >= RTE_MEMZONE_NAMESIZE) {
4574 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4575 rte_errno = ENAMETOOLONG;
4579 mz = rte_memzone_lookup(z_name);
4581 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4583 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4585 "memzone %s does not justify the requested attributes\n",
4593 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4594 RTE_MEMZONE_IOVA_CONTIG, align);
4598 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4601 char z_name[RTE_MEMZONE_NAMESIZE];
4602 const struct rte_memzone *mz;
4605 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4606 queue_id, ring_name);
4607 if (rc >= RTE_MEMZONE_NAMESIZE) {
4608 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4609 return -ENAMETOOLONG;
4612 mz = rte_memzone_lookup(z_name);
4614 rc = rte_memzone_free(mz);
4622 rte_eth_dev_create(struct rte_device *device, const char *name,
4623 size_t priv_data_size,
4624 ethdev_bus_specific_init ethdev_bus_specific_init,
4625 void *bus_init_params,
4626 ethdev_init_t ethdev_init, void *init_params)
4628 struct rte_eth_dev *ethdev;
4631 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4633 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4634 ethdev = rte_eth_dev_allocate(name);
4638 if (priv_data_size) {
4639 ethdev->data->dev_private = rte_zmalloc_socket(
4640 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4643 if (!ethdev->data->dev_private) {
4645 "failed to allocate private data\n");
4651 ethdev = rte_eth_dev_attach_secondary(name);
4654 "secondary process attach failed, ethdev doesn't exist\n");
4659 ethdev->device = device;
4661 if (ethdev_bus_specific_init) {
4662 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4665 "ethdev bus specific initialisation failed\n");
4670 retval = ethdev_init(ethdev, init_params);
4672 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4676 rte_eth_dev_probing_finish(ethdev);
4681 rte_eth_dev_release_port(ethdev);
4686 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4687 ethdev_uninit_t ethdev_uninit)
4691 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4695 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4697 ret = ethdev_uninit(ethdev);
4701 return rte_eth_dev_release_port(ethdev);
4705 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4706 int epfd, int op, void *data)
4709 struct rte_eth_dev *dev;
4710 struct rte_intr_handle *intr_handle;
4713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4715 dev = &rte_eth_devices[port_id];
4716 if (queue_id >= dev->data->nb_rx_queues) {
4717 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4721 if (!dev->intr_handle) {
4722 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4726 intr_handle = dev->intr_handle;
4727 if (!intr_handle->intr_vec) {
4728 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4732 vec = intr_handle->intr_vec[queue_id];
4733 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4734 if (rc && rc != -EEXIST) {
4736 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4737 port_id, queue_id, op, epfd, vec);
4745 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4748 struct rte_eth_dev *dev;
4751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4753 dev = &rte_eth_devices[port_id];
4755 ret = eth_dev_validate_rx_queue(dev, queue_id);
4759 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4760 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4765 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4768 struct rte_eth_dev *dev;
4771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4773 dev = &rte_eth_devices[port_id];
4775 ret = eth_dev_validate_rx_queue(dev, queue_id);
4779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4780 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4785 const struct rte_eth_rxtx_callback *
4786 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4787 rte_rx_callback_fn fn, void *user_param)
4789 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4790 rte_errno = ENOTSUP;
4793 struct rte_eth_dev *dev;
4795 /* check input parameters */
4796 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4797 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4801 dev = &rte_eth_devices[port_id];
4802 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4806 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4814 cb->param = user_param;
4816 rte_spinlock_lock(ð_dev_rx_cb_lock);
4817 /* Add the callbacks in fifo order. */
4818 struct rte_eth_rxtx_callback *tail =
4819 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4822 /* Stores to cb->fn and cb->param should complete before
4823 * cb is visible to data plane.
4826 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4827 cb, __ATOMIC_RELEASE);
4832 /* Stores to cb->fn and cb->param should complete before
4833 * cb is visible to data plane.
4835 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4837 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4842 const struct rte_eth_rxtx_callback *
4843 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4844 rte_rx_callback_fn fn, void *user_param)
4846 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4847 rte_errno = ENOTSUP;
4850 /* check input parameters */
4851 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4852 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4857 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4865 cb->param = user_param;
4867 rte_spinlock_lock(ð_dev_rx_cb_lock);
4868 /* Add the callbacks at first position */
4869 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4870 /* Stores to cb->fn, cb->param and cb->next should complete before
4871 * cb is visible to data plane threads.
4874 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4875 cb, __ATOMIC_RELEASE);
4876 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4881 const struct rte_eth_rxtx_callback *
4882 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4883 rte_tx_callback_fn fn, void *user_param)
4885 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4886 rte_errno = ENOTSUP;
4889 struct rte_eth_dev *dev;
4891 /* check input parameters */
4892 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4893 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4898 dev = &rte_eth_devices[port_id];
4899 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4904 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4912 cb->param = user_param;
4914 rte_spinlock_lock(ð_dev_tx_cb_lock);
4915 /* Add the callbacks in fifo order. */
4916 struct rte_eth_rxtx_callback *tail =
4917 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4920 /* Stores to cb->fn and cb->param should complete before
4921 * cb is visible to data plane.
4924 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
4925 cb, __ATOMIC_RELEASE);
4930 /* Stores to cb->fn and cb->param should complete before
4931 * cb is visible to data plane.
4933 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4935 rte_spinlock_unlock(ð_dev_tx_cb_lock);
4941 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4942 const struct rte_eth_rxtx_callback *user_cb)
4944 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4947 /* Check input parameters. */
4948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4949 if (user_cb == NULL ||
4950 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4953 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4954 struct rte_eth_rxtx_callback *cb;
4955 struct rte_eth_rxtx_callback **prev_cb;
4958 rte_spinlock_lock(ð_dev_rx_cb_lock);
4959 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4960 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4962 if (cb == user_cb) {
4963 /* Remove the user cb from the callback list. */
4964 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4969 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4975 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4976 const struct rte_eth_rxtx_callback *user_cb)
4978 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4981 /* Check input parameters. */
4982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4983 if (user_cb == NULL ||
4984 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4987 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4989 struct rte_eth_rxtx_callback *cb;
4990 struct rte_eth_rxtx_callback **prev_cb;
4992 rte_spinlock_lock(ð_dev_tx_cb_lock);
4993 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4994 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4996 if (cb == user_cb) {
4997 /* Remove the user cb from the callback list. */
4998 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5003 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5009 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5010 struct rte_eth_rxq_info *qinfo)
5012 struct rte_eth_dev *dev;
5014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5019 dev = &rte_eth_devices[port_id];
5020 if (queue_id >= dev->data->nb_rx_queues) {
5021 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5025 if (dev->data->rx_queues == NULL ||
5026 dev->data->rx_queues[queue_id] == NULL) {
5028 "Rx queue %"PRIu16" of device with port_id=%"
5029 PRIu16" has not been setup\n",
5034 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5035 RTE_ETHDEV_LOG(INFO,
5036 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5043 memset(qinfo, 0, sizeof(*qinfo));
5044 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5049 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5050 struct rte_eth_txq_info *qinfo)
5052 struct rte_eth_dev *dev;
5054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5059 dev = &rte_eth_devices[port_id];
5060 if (queue_id >= dev->data->nb_tx_queues) {
5061 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5065 if (dev->data->tx_queues == NULL ||
5066 dev->data->tx_queues[queue_id] == NULL) {
5068 "Tx queue %"PRIu16" of device with port_id=%"
5069 PRIu16" has not been setup\n",
5074 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5075 RTE_ETHDEV_LOG(INFO,
5076 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5083 memset(qinfo, 0, sizeof(*qinfo));
5084 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5090 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5091 struct rte_eth_burst_mode *mode)
5093 struct rte_eth_dev *dev;
5095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5100 dev = &rte_eth_devices[port_id];
5102 if (queue_id >= dev->data->nb_rx_queues) {
5103 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5108 memset(mode, 0, sizeof(*mode));
5109 return eth_err(port_id,
5110 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5114 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5115 struct rte_eth_burst_mode *mode)
5117 struct rte_eth_dev *dev;
5119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5124 dev = &rte_eth_devices[port_id];
5126 if (queue_id >= dev->data->nb_tx_queues) {
5127 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5131 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5132 memset(mode, 0, sizeof(*mode));
5133 return eth_err(port_id,
5134 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5138 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5139 struct rte_power_monitor_cond *pmc)
5141 struct rte_eth_dev *dev;
5143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5145 dev = &rte_eth_devices[port_id];
5147 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5149 if (queue_id >= dev->data->nb_rx_queues) {
5150 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5155 RTE_ETHDEV_LOG(ERR, "Invalid power monitor condition=%p\n",
5160 return eth_err(port_id,
5161 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id],
5166 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5167 struct rte_ether_addr *mc_addr_set,
5168 uint32_t nb_mc_addr)
5170 struct rte_eth_dev *dev;
5172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5174 dev = &rte_eth_devices[port_id];
5175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5176 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5177 mc_addr_set, nb_mc_addr));
5181 rte_eth_timesync_enable(uint16_t port_id)
5183 struct rte_eth_dev *dev;
5185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5186 dev = &rte_eth_devices[port_id];
5188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5189 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5193 rte_eth_timesync_disable(uint16_t port_id)
5195 struct rte_eth_dev *dev;
5197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5198 dev = &rte_eth_devices[port_id];
5200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5201 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5205 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5208 struct rte_eth_dev *dev;
5210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5211 dev = &rte_eth_devices[port_id];
5213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5214 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5215 (dev, timestamp, flags));
5219 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5220 struct timespec *timestamp)
5222 struct rte_eth_dev *dev;
5224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5225 dev = &rte_eth_devices[port_id];
5227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5228 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5233 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5235 struct rte_eth_dev *dev;
5237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5238 dev = &rte_eth_devices[port_id];
5240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5241 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
5246 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5248 struct rte_eth_dev *dev;
5250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5251 dev = &rte_eth_devices[port_id];
5253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5254 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5259 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5261 struct rte_eth_dev *dev;
5263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5264 dev = &rte_eth_devices[port_id];
5266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5267 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5272 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5274 struct rte_eth_dev *dev;
5276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5277 dev = &rte_eth_devices[port_id];
5279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5280 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5284 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5286 struct rte_eth_dev *dev;
5288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5290 dev = &rte_eth_devices[port_id];
5291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5292 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5296 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5298 struct rte_eth_dev *dev;
5300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5302 dev = &rte_eth_devices[port_id];
5303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5304 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5308 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5310 struct rte_eth_dev *dev;
5312 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5314 dev = &rte_eth_devices[port_id];
5315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5316 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5320 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5322 struct rte_eth_dev *dev;
5324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5326 dev = &rte_eth_devices[port_id];
5327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5328 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5332 rte_eth_dev_get_module_info(uint16_t port_id,
5333 struct rte_eth_dev_module_info *modinfo)
5335 struct rte_eth_dev *dev;
5337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5339 dev = &rte_eth_devices[port_id];
5340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5341 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5345 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5346 struct rte_dev_eeprom_info *info)
5348 struct rte_eth_dev *dev;
5350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5352 dev = &rte_eth_devices[port_id];
5353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5354 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5358 rte_eth_dev_get_dcb_info(uint16_t port_id,
5359 struct rte_eth_dcb_info *dcb_info)
5361 struct rte_eth_dev *dev;
5363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5365 dev = &rte_eth_devices[port_id];
5366 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5369 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5373 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5374 const struct rte_eth_desc_lim *desc_lim)
5376 if (desc_lim->nb_align != 0)
5377 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5379 if (desc_lim->nb_max != 0)
5380 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5382 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5386 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5387 uint16_t *nb_rx_desc,
5388 uint16_t *nb_tx_desc)
5390 struct rte_eth_dev_info dev_info;
5393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5395 ret = rte_eth_dev_info_get(port_id, &dev_info);
5399 if (nb_rx_desc != NULL)
5400 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5402 if (nb_tx_desc != NULL)
5403 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5409 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5410 struct rte_eth_hairpin_cap *cap)
5412 struct rte_eth_dev *dev;
5414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5416 dev = &rte_eth_devices[port_id];
5417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5418 memset(cap, 0, sizeof(*cap));
5419 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5423 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5425 if (dev->data->rx_queue_state[queue_id] ==
5426 RTE_ETH_QUEUE_STATE_HAIRPIN)
5432 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5434 if (dev->data->tx_queue_state[queue_id] ==
5435 RTE_ETH_QUEUE_STATE_HAIRPIN)
5441 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5443 struct rte_eth_dev *dev;
5445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5450 dev = &rte_eth_devices[port_id];
5452 if (*dev->dev_ops->pool_ops_supported == NULL)
5453 return 1; /* all pools are supported */
5455 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5459 * A set of values to describe the possible states of a switch domain.
5461 enum rte_eth_switch_domain_state {
5462 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5463 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5467 * Array of switch domains available for allocation. Array is sized to
5468 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5469 * ethdev ports in a single process.
5471 static struct rte_eth_dev_switch {
5472 enum rte_eth_switch_domain_state state;
5473 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5476 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5480 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5482 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5483 if (eth_dev_switch_domains[i].state ==
5484 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5485 eth_dev_switch_domains[i].state =
5486 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5496 rte_eth_switch_domain_free(uint16_t domain_id)
5498 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5499 domain_id >= RTE_MAX_ETHPORTS)
5502 if (eth_dev_switch_domains[domain_id].state !=
5503 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5506 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5512 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5515 struct rte_kvargs_pair *pair;
5518 arglist->str = strdup(str_in);
5519 if (arglist->str == NULL)
5522 letter = arglist->str;
5525 pair = &arglist->pairs[0];
5528 case 0: /* Initial */
5531 else if (*letter == '\0')
5538 case 1: /* Parsing key */
5539 if (*letter == '=') {
5541 pair->value = letter + 1;
5543 } else if (*letter == ',' || *letter == '\0')
5548 case 2: /* Parsing value */
5551 else if (*letter == ',') {
5554 pair = &arglist->pairs[arglist->count];
5556 } else if (*letter == '\0') {
5559 pair = &arglist->pairs[arglist->count];
5564 case 3: /* Parsing list */
5567 else if (*letter == '\0')
5576 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5578 struct rte_kvargs args;
5579 struct rte_kvargs_pair *pair;
5583 memset(eth_da, 0, sizeof(*eth_da));
5585 result = eth_dev_devargs_tokenise(&args, dargs);
5589 for (i = 0; i < args.count; i++) {
5590 pair = &args.pairs[i];
5591 if (strcmp("representor", pair->key) == 0) {
5592 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
5593 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
5598 result = rte_eth_devargs_parse_representor_ports(
5599 pair->value, eth_da);
5613 rte_eth_representor_id_get(const struct rte_eth_dev *ethdev,
5614 enum rte_eth_representor_type type,
5615 int controller, int pf, int representor_port,
5618 int ret, n, i, count;
5619 struct rte_eth_representor_info *info = NULL;
5622 if (type == RTE_ETH_REPRESENTOR_NONE)
5624 if (repr_id == NULL)
5627 /* Get PMD representor range info. */
5628 ret = rte_eth_representor_info_get(ethdev->data->port_id, NULL);
5629 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
5630 controller == -1 && pf == -1) {
5631 /* Direct mapping for legacy VF representor. */
5632 *repr_id = representor_port;
5634 } else if (ret < 0) {
5638 size = sizeof(*info) + n * sizeof(info->ranges[0]);
5639 info = calloc(1, size);
5642 ret = rte_eth_representor_info_get(ethdev->data->port_id, info);
5646 /* Default controller and pf to caller. */
5647 if (controller == -1)
5648 controller = info->controller;
5652 /* Locate representor ID. */
5654 for (i = 0; i < n; ++i) {
5655 if (info->ranges[i].type != type)
5657 if (info->ranges[i].controller != controller)
5659 if (info->ranges[i].id_end < info->ranges[i].id_base) {
5660 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
5661 ethdev->data->port_id, info->ranges[i].id_base,
5662 info->ranges[i].id_end, i);
5666 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
5667 switch (info->ranges[i].type) {
5668 case RTE_ETH_REPRESENTOR_PF:
5669 if (pf < info->ranges[i].pf ||
5670 pf >= info->ranges[i].pf + count)
5672 *repr_id = info->ranges[i].id_base +
5673 (pf - info->ranges[i].pf);
5676 case RTE_ETH_REPRESENTOR_VF:
5677 if (info->ranges[i].pf != pf)
5679 if (representor_port < info->ranges[i].vf ||
5680 representor_port >= info->ranges[i].vf + count)
5682 *repr_id = info->ranges[i].id_base +
5683 (representor_port - info->ranges[i].vf);
5686 case RTE_ETH_REPRESENTOR_SF:
5687 if (info->ranges[i].pf != pf)
5689 if (representor_port < info->ranges[i].sf ||
5690 representor_port >= info->ranges[i].sf + count)
5692 *repr_id = info->ranges[i].id_base +
5693 (representor_port - info->ranges[i].sf);
5706 eth_dev_handle_port_list(const char *cmd __rte_unused,
5707 const char *params __rte_unused,
5708 struct rte_tel_data *d)
5712 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5713 RTE_ETH_FOREACH_DEV(port_id)
5714 rte_tel_data_add_array_int(d, port_id);
5719 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5720 const char *stat_name)
5723 struct rte_tel_data *q_data = rte_tel_data_alloc();
5724 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5725 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5726 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5727 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5730 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5733 eth_dev_handle_port_stats(const char *cmd __rte_unused,
5735 struct rte_tel_data *d)
5737 struct rte_eth_stats stats;
5740 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5743 port_id = atoi(params);
5744 if (!rte_eth_dev_is_valid_port(port_id))
5747 ret = rte_eth_stats_get(port_id, &stats);
5751 rte_tel_data_start_dict(d);
5752 ADD_DICT_STAT(stats, ipackets);
5753 ADD_DICT_STAT(stats, opackets);
5754 ADD_DICT_STAT(stats, ibytes);
5755 ADD_DICT_STAT(stats, obytes);
5756 ADD_DICT_STAT(stats, imissed);
5757 ADD_DICT_STAT(stats, ierrors);
5758 ADD_DICT_STAT(stats, oerrors);
5759 ADD_DICT_STAT(stats, rx_nombuf);
5760 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5761 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5762 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5763 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5764 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
5770 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
5772 struct rte_tel_data *d)
5774 struct rte_eth_xstat *eth_xstats;
5775 struct rte_eth_xstat_name *xstat_names;
5776 int port_id, num_xstats;
5780 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5783 port_id = strtoul(params, &end_param, 0);
5784 if (*end_param != '\0')
5785 RTE_ETHDEV_LOG(NOTICE,
5786 "Extra parameters passed to ethdev telemetry command, ignoring");
5787 if (!rte_eth_dev_is_valid_port(port_id))
5790 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5794 /* use one malloc for both names and stats */
5795 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5796 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5797 if (eth_xstats == NULL)
5799 xstat_names = (void *)ð_xstats[num_xstats];
5801 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5802 if (ret < 0 || ret > num_xstats) {
5807 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5808 if (ret < 0 || ret > num_xstats) {
5813 rte_tel_data_start_dict(d);
5814 for (i = 0; i < num_xstats; i++)
5815 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5816 eth_xstats[i].value);
5821 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
5823 struct rte_tel_data *d)
5825 static const char *status_str = "status";
5827 struct rte_eth_link link;
5830 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5833 port_id = strtoul(params, &end_param, 0);
5834 if (*end_param != '\0')
5835 RTE_ETHDEV_LOG(NOTICE,
5836 "Extra parameters passed to ethdev telemetry command, ignoring");
5837 if (!rte_eth_dev_is_valid_port(port_id))
5840 ret = rte_eth_link_get_nowait(port_id, &link);
5844 rte_tel_data_start_dict(d);
5845 if (!link.link_status) {
5846 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5849 rte_tel_data_add_dict_string(d, status_str, "UP");
5850 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5851 rte_tel_data_add_dict_string(d, "duplex",
5852 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5853 "full-duplex" : "half-duplex");
5858 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
5859 struct rte_hairpin_peer_info *cur_info,
5860 struct rte_hairpin_peer_info *peer_info,
5863 struct rte_eth_dev *dev;
5865 /* Current queue information is not mandatory. */
5866 if (peer_info == NULL)
5869 /* No need to check the validity again. */
5870 dev = &rte_eth_devices[peer_port];
5871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
5874 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
5875 cur_info, peer_info, direction);
5879 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
5880 struct rte_hairpin_peer_info *peer_info,
5883 struct rte_eth_dev *dev;
5885 if (peer_info == NULL)
5888 /* No need to check the validity again. */
5889 dev = &rte_eth_devices[cur_port];
5890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
5893 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
5894 peer_info, direction);
5898 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
5901 struct rte_eth_dev *dev;
5903 /* No need to check the validity again. */
5904 dev = &rte_eth_devices[cur_port];
5905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
5908 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
5913 rte_eth_representor_info_get(uint16_t port_id,
5914 struct rte_eth_representor_info *info)
5916 struct rte_eth_dev *dev;
5918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5919 dev = &rte_eth_devices[port_id];
5921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
5922 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev,
5926 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5928 RTE_INIT(ethdev_init_telemetry)
5930 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
5931 "Returns list of available ethdev ports. Takes no parameters");
5932 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
5933 "Returns the common stats for a port. Parameters: int port_id");
5934 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
5935 "Returns the extended stats for a port. Parameters: int port_id");
5936 rte_telemetry_register_cmd("/ethdev/link_status",
5937 eth_dev_handle_port_link_status,
5938 "Returns the link status for a port. Parameters: int port_id");