1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
695 rte_eth_dev_shared_data_prepare();
697 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699 if (rte_eth_is_valid_owner_id(owner_id)) {
700 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701 if (rte_eth_devices[port_id].data->owner.id == owner_id)
702 memset(&rte_eth_devices[port_id].data->owner, 0,
703 sizeof(struct rte_eth_dev_owner));
704 RTE_ETHDEV_LOG(NOTICE,
705 "All port owners owned by %016"PRIx64" identifier have removed\n",
709 "Invalid owner id=%016"PRIx64"\n",
713 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
717 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
720 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
722 rte_eth_dev_shared_data_prepare();
724 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
726 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
727 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
731 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
734 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
739 rte_eth_dev_socket_id(uint16_t port_id)
741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
742 return rte_eth_devices[port_id].data->numa_node;
746 rte_eth_dev_get_sec_ctx(uint16_t port_id)
748 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
749 return rte_eth_devices[port_id].security_ctx;
753 rte_eth_dev_count(void)
755 return rte_eth_dev_count_avail();
759 rte_eth_dev_count_avail(void)
766 RTE_ETH_FOREACH_DEV(p)
773 rte_eth_dev_count_total(void)
775 uint16_t port, count = 0;
777 RTE_ETH_FOREACH_VALID_DEV(port)
784 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
791 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
795 /* shouldn't check 'rte_eth_devices[i].data',
796 * because it might be overwritten by VDEV PMD */
797 tmp = rte_eth_dev_shared_data->data[port_id].name;
803 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
808 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
812 RTE_ETH_FOREACH_VALID_DEV(pid)
813 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
822 eth_err(uint16_t port_id, int ret)
826 if (rte_eth_dev_is_removed(port_id))
832 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
834 uint16_t old_nb_queues = dev->data->nb_rx_queues;
838 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
839 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
840 sizeof(dev->data->rx_queues[0]) * nb_queues,
841 RTE_CACHE_LINE_SIZE);
842 if (dev->data->rx_queues == NULL) {
843 dev->data->nb_rx_queues = 0;
846 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
849 rxq = dev->data->rx_queues;
851 for (i = nb_queues; i < old_nb_queues; i++)
852 (*dev->dev_ops->rx_queue_release)(rxq[i]);
853 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
854 RTE_CACHE_LINE_SIZE);
857 if (nb_queues > old_nb_queues) {
858 uint16_t new_qs = nb_queues - old_nb_queues;
860 memset(rxq + old_nb_queues, 0,
861 sizeof(rxq[0]) * new_qs);
864 dev->data->rx_queues = rxq;
866 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
869 rxq = dev->data->rx_queues;
871 for (i = nb_queues; i < old_nb_queues; i++)
872 (*dev->dev_ops->rx_queue_release)(rxq[i]);
874 rte_free(dev->data->rx_queues);
875 dev->data->rx_queues = NULL;
877 dev->data->nb_rx_queues = nb_queues;
882 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
884 struct rte_eth_dev *dev;
886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
888 dev = &rte_eth_devices[port_id];
889 if (!dev->data->dev_started) {
891 "Port %u must be started before start any queue\n",
896 if (rx_queue_id >= dev->data->nb_rx_queues) {
897 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
903 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
905 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
906 rx_queue_id, port_id);
910 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
916 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
918 struct rte_eth_dev *dev;
920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
922 dev = &rte_eth_devices[port_id];
923 if (rx_queue_id >= dev->data->nb_rx_queues) {
924 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
930 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
932 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
933 rx_queue_id, port_id);
937 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
942 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
944 struct rte_eth_dev *dev;
946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
948 dev = &rte_eth_devices[port_id];
949 if (!dev->data->dev_started) {
951 "Port %u must be started before start any queue\n",
956 if (tx_queue_id >= dev->data->nb_tx_queues) {
957 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
963 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
965 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
966 tx_queue_id, port_id);
970 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
974 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
976 struct rte_eth_dev *dev;
978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
980 dev = &rte_eth_devices[port_id];
981 if (tx_queue_id >= dev->data->nb_tx_queues) {
982 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
988 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
990 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
991 tx_queue_id, port_id);
995 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1000 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1002 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1006 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1007 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1008 sizeof(dev->data->tx_queues[0]) * nb_queues,
1009 RTE_CACHE_LINE_SIZE);
1010 if (dev->data->tx_queues == NULL) {
1011 dev->data->nb_tx_queues = 0;
1014 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1017 txq = dev->data->tx_queues;
1019 for (i = nb_queues; i < old_nb_queues; i++)
1020 (*dev->dev_ops->tx_queue_release)(txq[i]);
1021 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1022 RTE_CACHE_LINE_SIZE);
1025 if (nb_queues > old_nb_queues) {
1026 uint16_t new_qs = nb_queues - old_nb_queues;
1028 memset(txq + old_nb_queues, 0,
1029 sizeof(txq[0]) * new_qs);
1032 dev->data->tx_queues = txq;
1034 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1037 txq = dev->data->tx_queues;
1039 for (i = nb_queues; i < old_nb_queues; i++)
1040 (*dev->dev_ops->tx_queue_release)(txq[i]);
1042 rte_free(dev->data->tx_queues);
1043 dev->data->tx_queues = NULL;
1045 dev->data->nb_tx_queues = nb_queues;
1050 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1053 case ETH_SPEED_NUM_10M:
1054 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1055 case ETH_SPEED_NUM_100M:
1056 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1057 case ETH_SPEED_NUM_1G:
1058 return ETH_LINK_SPEED_1G;
1059 case ETH_SPEED_NUM_2_5G:
1060 return ETH_LINK_SPEED_2_5G;
1061 case ETH_SPEED_NUM_5G:
1062 return ETH_LINK_SPEED_5G;
1063 case ETH_SPEED_NUM_10G:
1064 return ETH_LINK_SPEED_10G;
1065 case ETH_SPEED_NUM_20G:
1066 return ETH_LINK_SPEED_20G;
1067 case ETH_SPEED_NUM_25G:
1068 return ETH_LINK_SPEED_25G;
1069 case ETH_SPEED_NUM_40G:
1070 return ETH_LINK_SPEED_40G;
1071 case ETH_SPEED_NUM_50G:
1072 return ETH_LINK_SPEED_50G;
1073 case ETH_SPEED_NUM_56G:
1074 return ETH_LINK_SPEED_56G;
1075 case ETH_SPEED_NUM_100G:
1076 return ETH_LINK_SPEED_100G;
1083 rte_eth_dev_rx_offload_name(uint64_t offload)
1085 const char *name = "UNKNOWN";
1088 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1089 if (offload == rte_rx_offload_names[i].offload) {
1090 name = rte_rx_offload_names[i].name;
1099 rte_eth_dev_tx_offload_name(uint64_t offload)
1101 const char *name = "UNKNOWN";
1104 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1105 if (offload == rte_tx_offload_names[i].offload) {
1106 name = rte_tx_offload_names[i].name;
1115 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1116 const struct rte_eth_conf *dev_conf)
1118 struct rte_eth_dev *dev;
1119 struct rte_eth_dev_info dev_info;
1120 struct rte_eth_conf orig_conf;
1124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1126 dev = &rte_eth_devices[port_id];
1128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1130 if (dev->data->dev_started) {
1132 "Port %u must be stopped to allow configuration\n",
1137 /* Store original config, as rollback required on failure */
1138 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1141 * Copy the dev_conf parameter into the dev structure.
1142 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1144 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1146 ret = rte_eth_dev_info_get(port_id, &dev_info);
1150 /* If number of queues specified by application for both Rx and Tx is
1151 * zero, use driver preferred values. This cannot be done individually
1152 * as it is valid for either Tx or Rx (but not both) to be zero.
1153 * If driver does not provide any preferred valued, fall back on
1156 if (nb_rx_q == 0 && nb_tx_q == 0) {
1157 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1159 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1160 nb_tx_q = dev_info.default_txportconf.nb_queues;
1162 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1165 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1167 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1168 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1173 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1175 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1176 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1182 * Check that the numbers of RX and TX queues are not greater
1183 * than the maximum number of RX and TX queues supported by the
1184 * configured device.
1186 if (nb_rx_q > dev_info.max_rx_queues) {
1187 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1188 port_id, nb_rx_q, dev_info.max_rx_queues);
1193 if (nb_tx_q > dev_info.max_tx_queues) {
1194 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1195 port_id, nb_tx_q, dev_info.max_tx_queues);
1200 /* Check that the device supports requested interrupts */
1201 if ((dev_conf->intr_conf.lsc == 1) &&
1202 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1203 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1204 dev->device->driver->name);
1208 if ((dev_conf->intr_conf.rmv == 1) &&
1209 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1210 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1211 dev->device->driver->name);
1217 * If jumbo frames are enabled, check that the maximum RX packet
1218 * length is supported by the configured device.
1220 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1221 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1223 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1224 port_id, dev_conf->rxmode.max_rx_pkt_len,
1225 dev_info.max_rx_pktlen);
1228 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1230 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1231 port_id, dev_conf->rxmode.max_rx_pkt_len,
1232 (unsigned int)RTE_ETHER_MIN_LEN);
1237 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1238 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1239 /* Use default value */
1240 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1244 /* Any requested offloading must be within its device capabilities */
1245 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1246 dev_conf->rxmode.offloads) {
1248 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1249 "capabilities 0x%"PRIx64" in %s()\n",
1250 port_id, dev_conf->rxmode.offloads,
1251 dev_info.rx_offload_capa,
1256 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1257 dev_conf->txmode.offloads) {
1259 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1260 "capabilities 0x%"PRIx64" in %s()\n",
1261 port_id, dev_conf->txmode.offloads,
1262 dev_info.tx_offload_capa,
1268 /* Check that device supports requested rss hash functions. */
1269 if ((dev_info.flow_type_rss_offloads |
1270 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1271 dev_info.flow_type_rss_offloads) {
1273 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1274 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1275 dev_info.flow_type_rss_offloads);
1281 * Setup new number of RX/TX queues and reconfigure device.
1283 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1286 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1292 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1295 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1297 rte_eth_dev_rx_queue_config(dev, 0);
1302 diag = (*dev->dev_ops->dev_configure)(dev);
1304 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1306 rte_eth_dev_rx_queue_config(dev, 0);
1307 rte_eth_dev_tx_queue_config(dev, 0);
1308 ret = eth_err(port_id, diag);
1312 /* Initialize Rx profiling if enabled at compilation time. */
1313 diag = __rte_eth_dev_profile_init(port_id, dev);
1315 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1317 rte_eth_dev_rx_queue_config(dev, 0);
1318 rte_eth_dev_tx_queue_config(dev, 0);
1319 ret = eth_err(port_id, diag);
1326 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1332 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1334 if (dev->data->dev_started) {
1335 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1336 dev->data->port_id);
1340 rte_eth_dev_rx_queue_config(dev, 0);
1341 rte_eth_dev_tx_queue_config(dev, 0);
1343 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1347 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1348 struct rte_eth_dev_info *dev_info)
1350 struct rte_ether_addr *addr;
1355 /* replay MAC address configuration including default MAC */
1356 addr = &dev->data->mac_addrs[0];
1357 if (*dev->dev_ops->mac_addr_set != NULL)
1358 (*dev->dev_ops->mac_addr_set)(dev, addr);
1359 else if (*dev->dev_ops->mac_addr_add != NULL)
1360 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1362 if (*dev->dev_ops->mac_addr_add != NULL) {
1363 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1364 addr = &dev->data->mac_addrs[i];
1366 /* skip zero address */
1367 if (rte_is_zero_ether_addr(addr))
1371 pool_mask = dev->data->mac_pool_sel[i];
1374 if (pool_mask & 1ULL)
1375 (*dev->dev_ops->mac_addr_add)(dev,
1379 } while (pool_mask);
1385 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1386 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1388 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1389 rte_eth_dev_mac_restore(dev, dev_info);
1391 /* replay promiscuous configuration */
1392 if (rte_eth_promiscuous_get(port_id) == 1)
1393 rte_eth_promiscuous_enable(port_id);
1394 else if (rte_eth_promiscuous_get(port_id) == 0)
1395 rte_eth_promiscuous_disable(port_id);
1397 /* replay all multicast configuration */
1398 if (rte_eth_allmulticast_get(port_id) == 1)
1399 rte_eth_allmulticast_enable(port_id);
1400 else if (rte_eth_allmulticast_get(port_id) == 0)
1401 rte_eth_allmulticast_disable(port_id);
1405 rte_eth_dev_start(uint16_t port_id)
1407 struct rte_eth_dev *dev;
1408 struct rte_eth_dev_info dev_info;
1412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1414 dev = &rte_eth_devices[port_id];
1416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1418 if (dev->data->dev_started != 0) {
1419 RTE_ETHDEV_LOG(INFO,
1420 "Device with port_id=%"PRIu16" already started\n",
1425 ret = rte_eth_dev_info_get(port_id, &dev_info);
1429 /* Lets restore MAC now if device does not support live change */
1430 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1431 rte_eth_dev_mac_restore(dev, &dev_info);
1433 diag = (*dev->dev_ops->dev_start)(dev);
1435 dev->data->dev_started = 1;
1437 return eth_err(port_id, diag);
1439 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1441 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1443 (*dev->dev_ops->link_update)(dev, 0);
1449 rte_eth_dev_stop(uint16_t port_id)
1451 struct rte_eth_dev *dev;
1453 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1454 dev = &rte_eth_devices[port_id];
1456 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1458 if (dev->data->dev_started == 0) {
1459 RTE_ETHDEV_LOG(INFO,
1460 "Device with port_id=%"PRIu16" already stopped\n",
1465 dev->data->dev_started = 0;
1466 (*dev->dev_ops->dev_stop)(dev);
1470 rte_eth_dev_set_link_up(uint16_t port_id)
1472 struct rte_eth_dev *dev;
1474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1476 dev = &rte_eth_devices[port_id];
1478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1479 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1483 rte_eth_dev_set_link_down(uint16_t port_id)
1485 struct rte_eth_dev *dev;
1487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1489 dev = &rte_eth_devices[port_id];
1491 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1492 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1496 rte_eth_dev_close(uint16_t port_id)
1498 struct rte_eth_dev *dev;
1500 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1501 dev = &rte_eth_devices[port_id];
1503 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1504 dev->data->dev_started = 0;
1505 (*dev->dev_ops->dev_close)(dev);
1507 /* check behaviour flag - temporary for PMD migration */
1508 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1509 /* new behaviour: send event + reset state + free all data */
1510 rte_eth_dev_release_port(dev);
1513 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1514 "The driver %s should migrate to the new behaviour.\n",
1515 dev->device->driver->name);
1516 /* old behaviour: only free queue arrays */
1517 dev->data->nb_rx_queues = 0;
1518 rte_free(dev->data->rx_queues);
1519 dev->data->rx_queues = NULL;
1520 dev->data->nb_tx_queues = 0;
1521 rte_free(dev->data->tx_queues);
1522 dev->data->tx_queues = NULL;
1526 rte_eth_dev_reset(uint16_t port_id)
1528 struct rte_eth_dev *dev;
1531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1532 dev = &rte_eth_devices[port_id];
1534 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1536 rte_eth_dev_stop(port_id);
1537 ret = dev->dev_ops->dev_reset(dev);
1539 return eth_err(port_id, ret);
1543 rte_eth_dev_is_removed(uint16_t port_id)
1545 struct rte_eth_dev *dev;
1548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1550 dev = &rte_eth_devices[port_id];
1552 if (dev->state == RTE_ETH_DEV_REMOVED)
1555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1557 ret = dev->dev_ops->is_removed(dev);
1559 /* Device is physically removed. */
1560 dev->state = RTE_ETH_DEV_REMOVED;
1566 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1567 uint16_t nb_rx_desc, unsigned int socket_id,
1568 const struct rte_eth_rxconf *rx_conf,
1569 struct rte_mempool *mp)
1572 uint32_t mbp_buf_size;
1573 struct rte_eth_dev *dev;
1574 struct rte_eth_dev_info dev_info;
1575 struct rte_eth_rxconf local_conf;
1578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1580 dev = &rte_eth_devices[port_id];
1581 if (rx_queue_id >= dev->data->nb_rx_queues) {
1582 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1587 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1591 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1594 * Check the size of the mbuf data buffer.
1595 * This value must be provided in the private data of the memory pool.
1596 * First check that the memory pool has a valid private data.
1598 ret = rte_eth_dev_info_get(port_id, &dev_info);
1602 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1603 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1604 mp->name, (int)mp->private_data_size,
1605 (int)sizeof(struct rte_pktmbuf_pool_private));
1608 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1610 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1612 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1613 mp->name, (int)mbp_buf_size,
1614 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1615 (int)RTE_PKTMBUF_HEADROOM,
1616 (int)dev_info.min_rx_bufsize);
1620 /* Use default specified by driver, if nb_rx_desc is zero */
1621 if (nb_rx_desc == 0) {
1622 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1623 /* If driver default is also zero, fall back on EAL default */
1624 if (nb_rx_desc == 0)
1625 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1628 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1629 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1630 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1633 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1634 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1635 dev_info.rx_desc_lim.nb_min,
1636 dev_info.rx_desc_lim.nb_align);
1640 if (dev->data->dev_started &&
1641 !(dev_info.dev_capa &
1642 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1645 if (dev->data->dev_started &&
1646 (dev->data->rx_queue_state[rx_queue_id] !=
1647 RTE_ETH_QUEUE_STATE_STOPPED))
1650 rxq = dev->data->rx_queues;
1651 if (rxq[rx_queue_id]) {
1652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1654 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1655 rxq[rx_queue_id] = NULL;
1658 if (rx_conf == NULL)
1659 rx_conf = &dev_info.default_rxconf;
1661 local_conf = *rx_conf;
1664 * If an offloading has already been enabled in
1665 * rte_eth_dev_configure(), it has been enabled on all queues,
1666 * so there is no need to enable it in this queue again.
1667 * The local_conf.offloads input to underlying PMD only carries
1668 * those offloadings which are only enabled on this queue and
1669 * not enabled on all queues.
1671 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1674 * New added offloadings for this queue are those not enabled in
1675 * rte_eth_dev_configure() and they must be per-queue type.
1676 * A pure per-port offloading can't be enabled on a queue while
1677 * disabled on another queue. A pure per-port offloading can't
1678 * be enabled for any queue as new added one if it hasn't been
1679 * enabled in rte_eth_dev_configure().
1681 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1682 local_conf.offloads) {
1684 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1685 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1686 port_id, rx_queue_id, local_conf.offloads,
1687 dev_info.rx_queue_offload_capa,
1692 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1693 socket_id, &local_conf, mp);
1695 if (!dev->data->min_rx_buf_size ||
1696 dev->data->min_rx_buf_size > mbp_buf_size)
1697 dev->data->min_rx_buf_size = mbp_buf_size;
1700 return eth_err(port_id, ret);
1704 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1705 uint16_t nb_tx_desc, unsigned int socket_id,
1706 const struct rte_eth_txconf *tx_conf)
1708 struct rte_eth_dev *dev;
1709 struct rte_eth_dev_info dev_info;
1710 struct rte_eth_txconf local_conf;
1714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1716 dev = &rte_eth_devices[port_id];
1717 if (tx_queue_id >= dev->data->nb_tx_queues) {
1718 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1724 ret = rte_eth_dev_info_get(port_id, &dev_info);
1728 /* Use default specified by driver, if nb_tx_desc is zero */
1729 if (nb_tx_desc == 0) {
1730 nb_tx_desc = dev_info.default_txportconf.ring_size;
1731 /* If driver default is zero, fall back on EAL default */
1732 if (nb_tx_desc == 0)
1733 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1735 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1736 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1737 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1739 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1740 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1741 dev_info.tx_desc_lim.nb_min,
1742 dev_info.tx_desc_lim.nb_align);
1746 if (dev->data->dev_started &&
1747 !(dev_info.dev_capa &
1748 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1751 if (dev->data->dev_started &&
1752 (dev->data->tx_queue_state[tx_queue_id] !=
1753 RTE_ETH_QUEUE_STATE_STOPPED))
1756 txq = dev->data->tx_queues;
1757 if (txq[tx_queue_id]) {
1758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1760 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1761 txq[tx_queue_id] = NULL;
1764 if (tx_conf == NULL)
1765 tx_conf = &dev_info.default_txconf;
1767 local_conf = *tx_conf;
1770 * If an offloading has already been enabled in
1771 * rte_eth_dev_configure(), it has been enabled on all queues,
1772 * so there is no need to enable it in this queue again.
1773 * The local_conf.offloads input to underlying PMD only carries
1774 * those offloadings which are only enabled on this queue and
1775 * not enabled on all queues.
1777 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1780 * New added offloadings for this queue are those not enabled in
1781 * rte_eth_dev_configure() and they must be per-queue type.
1782 * A pure per-port offloading can't be enabled on a queue while
1783 * disabled on another queue. A pure per-port offloading can't
1784 * be enabled for any queue as new added one if it hasn't been
1785 * enabled in rte_eth_dev_configure().
1787 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1788 local_conf.offloads) {
1790 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1791 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1792 port_id, tx_queue_id, local_conf.offloads,
1793 dev_info.tx_queue_offload_capa,
1798 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1799 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1803 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1804 void *userdata __rte_unused)
1808 for (i = 0; i < unsent; i++)
1809 rte_pktmbuf_free(pkts[i]);
1813 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1816 uint64_t *count = userdata;
1819 for (i = 0; i < unsent; i++)
1820 rte_pktmbuf_free(pkts[i]);
1826 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1827 buffer_tx_error_fn cbfn, void *userdata)
1829 buffer->error_callback = cbfn;
1830 buffer->error_userdata = userdata;
1835 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1842 buffer->size = size;
1843 if (buffer->error_callback == NULL) {
1844 ret = rte_eth_tx_buffer_set_err_callback(
1845 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1852 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1854 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1857 /* Validate Input Data. Bail if not valid or not supported. */
1858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1861 /* Call driver to free pending mbufs. */
1862 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1864 return eth_err(port_id, ret);
1868 rte_eth_promiscuous_enable(uint16_t port_id)
1870 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1873 dev = &rte_eth_devices[port_id];
1875 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1876 (*dev->dev_ops->promiscuous_enable)(dev);
1877 dev->data->promiscuous = 1;
1881 rte_eth_promiscuous_disable(uint16_t port_id)
1883 struct rte_eth_dev *dev;
1885 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1886 dev = &rte_eth_devices[port_id];
1888 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1889 dev->data->promiscuous = 0;
1890 (*dev->dev_ops->promiscuous_disable)(dev);
1894 rte_eth_promiscuous_get(uint16_t port_id)
1896 struct rte_eth_dev *dev;
1898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1900 dev = &rte_eth_devices[port_id];
1901 return dev->data->promiscuous;
1905 rte_eth_allmulticast_enable(uint16_t port_id)
1907 struct rte_eth_dev *dev;
1909 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1910 dev = &rte_eth_devices[port_id];
1912 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1913 (*dev->dev_ops->allmulticast_enable)(dev);
1914 dev->data->all_multicast = 1;
1918 rte_eth_allmulticast_disable(uint16_t port_id)
1920 struct rte_eth_dev *dev;
1922 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1923 dev = &rte_eth_devices[port_id];
1925 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1926 dev->data->all_multicast = 0;
1927 (*dev->dev_ops->allmulticast_disable)(dev);
1931 rte_eth_allmulticast_get(uint16_t port_id)
1933 struct rte_eth_dev *dev;
1935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1937 dev = &rte_eth_devices[port_id];
1938 return dev->data->all_multicast;
1942 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1944 struct rte_eth_dev *dev;
1946 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1947 dev = &rte_eth_devices[port_id];
1949 if (dev->data->dev_conf.intr_conf.lsc &&
1950 dev->data->dev_started)
1951 rte_eth_linkstatus_get(dev, eth_link);
1953 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1954 (*dev->dev_ops->link_update)(dev, 1);
1955 *eth_link = dev->data->dev_link;
1960 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1962 struct rte_eth_dev *dev;
1964 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1965 dev = &rte_eth_devices[port_id];
1967 if (dev->data->dev_conf.intr_conf.lsc &&
1968 dev->data->dev_started)
1969 rte_eth_linkstatus_get(dev, eth_link);
1971 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1972 (*dev->dev_ops->link_update)(dev, 0);
1973 *eth_link = dev->data->dev_link;
1978 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1980 struct rte_eth_dev *dev;
1982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1984 dev = &rte_eth_devices[port_id];
1985 memset(stats, 0, sizeof(*stats));
1987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1988 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1989 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1993 rte_eth_stats_reset(uint16_t port_id)
1995 struct rte_eth_dev *dev;
1997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1998 dev = &rte_eth_devices[port_id];
2000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2001 (*dev->dev_ops->stats_reset)(dev);
2002 dev->data->rx_mbuf_alloc_failed = 0;
2008 get_xstats_basic_count(struct rte_eth_dev *dev)
2010 uint16_t nb_rxqs, nb_txqs;
2013 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2014 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2016 count = RTE_NB_STATS;
2017 count += nb_rxqs * RTE_NB_RXQ_STATS;
2018 count += nb_txqs * RTE_NB_TXQ_STATS;
2024 get_xstats_count(uint16_t port_id)
2026 struct rte_eth_dev *dev;
2029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2030 dev = &rte_eth_devices[port_id];
2031 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2032 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2035 return eth_err(port_id, count);
2037 if (dev->dev_ops->xstats_get_names != NULL) {
2038 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2040 return eth_err(port_id, count);
2045 count += get_xstats_basic_count(dev);
2051 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2054 int cnt_xstats, idx_xstat;
2056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2059 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2064 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2069 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2070 if (cnt_xstats < 0) {
2071 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2075 /* Get id-name lookup table */
2076 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2078 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2079 port_id, xstats_names, cnt_xstats, NULL)) {
2080 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2084 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2085 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2094 /* retrieve basic stats names */
2096 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2097 struct rte_eth_xstat_name *xstats_names)
2099 int cnt_used_entries = 0;
2100 uint32_t idx, id_queue;
2103 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2104 strlcpy(xstats_names[cnt_used_entries].name,
2105 rte_stats_strings[idx].name,
2106 sizeof(xstats_names[0].name));
2109 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2110 for (id_queue = 0; id_queue < num_q; id_queue++) {
2111 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2112 snprintf(xstats_names[cnt_used_entries].name,
2113 sizeof(xstats_names[0].name),
2115 id_queue, rte_rxq_stats_strings[idx].name);
2120 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2121 for (id_queue = 0; id_queue < num_q; id_queue++) {
2122 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2123 snprintf(xstats_names[cnt_used_entries].name,
2124 sizeof(xstats_names[0].name),
2126 id_queue, rte_txq_stats_strings[idx].name);
2130 return cnt_used_entries;
2133 /* retrieve ethdev extended statistics names */
2135 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2136 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2139 struct rte_eth_xstat_name *xstats_names_copy;
2140 unsigned int no_basic_stat_requested = 1;
2141 unsigned int no_ext_stat_requested = 1;
2142 unsigned int expected_entries;
2143 unsigned int basic_count;
2144 struct rte_eth_dev *dev;
2148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2149 dev = &rte_eth_devices[port_id];
2151 basic_count = get_xstats_basic_count(dev);
2152 ret = get_xstats_count(port_id);
2155 expected_entries = (unsigned int)ret;
2157 /* Return max number of stats if no ids given */
2160 return expected_entries;
2161 else if (xstats_names && size < expected_entries)
2162 return expected_entries;
2165 if (ids && !xstats_names)
2168 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2169 uint64_t ids_copy[size];
2171 for (i = 0; i < size; i++) {
2172 if (ids[i] < basic_count) {
2173 no_basic_stat_requested = 0;
2178 * Convert ids to xstats ids that PMD knows.
2179 * ids known by user are basic + extended stats.
2181 ids_copy[i] = ids[i] - basic_count;
2184 if (no_basic_stat_requested)
2185 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2186 xstats_names, ids_copy, size);
2189 /* Retrieve all stats */
2191 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2193 if (num_stats < 0 || num_stats > (int)expected_entries)
2196 return expected_entries;
2199 xstats_names_copy = calloc(expected_entries,
2200 sizeof(struct rte_eth_xstat_name));
2202 if (!xstats_names_copy) {
2203 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2208 for (i = 0; i < size; i++) {
2209 if (ids[i] >= basic_count) {
2210 no_ext_stat_requested = 0;
2216 /* Fill xstats_names_copy structure */
2217 if (ids && no_ext_stat_requested) {
2218 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2220 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2223 free(xstats_names_copy);
2229 for (i = 0; i < size; i++) {
2230 if (ids[i] >= expected_entries) {
2231 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2232 free(xstats_names_copy);
2235 xstats_names[i] = xstats_names_copy[ids[i]];
2238 free(xstats_names_copy);
2243 rte_eth_xstats_get_names(uint16_t port_id,
2244 struct rte_eth_xstat_name *xstats_names,
2247 struct rte_eth_dev *dev;
2248 int cnt_used_entries;
2249 int cnt_expected_entries;
2250 int cnt_driver_entries;
2252 cnt_expected_entries = get_xstats_count(port_id);
2253 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2254 (int)size < cnt_expected_entries)
2255 return cnt_expected_entries;
2257 /* port_id checked in get_xstats_count() */
2258 dev = &rte_eth_devices[port_id];
2260 cnt_used_entries = rte_eth_basic_stats_get_names(
2263 if (dev->dev_ops->xstats_get_names != NULL) {
2264 /* If there are any driver-specific xstats, append them
2267 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2269 xstats_names + cnt_used_entries,
2270 size - cnt_used_entries);
2271 if (cnt_driver_entries < 0)
2272 return eth_err(port_id, cnt_driver_entries);
2273 cnt_used_entries += cnt_driver_entries;
2276 return cnt_used_entries;
2281 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2283 struct rte_eth_dev *dev;
2284 struct rte_eth_stats eth_stats;
2285 unsigned int count = 0, i, q;
2286 uint64_t val, *stats_ptr;
2287 uint16_t nb_rxqs, nb_txqs;
2290 ret = rte_eth_stats_get(port_id, ð_stats);
2294 dev = &rte_eth_devices[port_id];
2296 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2297 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2300 for (i = 0; i < RTE_NB_STATS; i++) {
2301 stats_ptr = RTE_PTR_ADD(ð_stats,
2302 rte_stats_strings[i].offset);
2304 xstats[count++].value = val;
2308 for (q = 0; q < nb_rxqs; q++) {
2309 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2310 stats_ptr = RTE_PTR_ADD(ð_stats,
2311 rte_rxq_stats_strings[i].offset +
2312 q * sizeof(uint64_t));
2314 xstats[count++].value = val;
2319 for (q = 0; q < nb_txqs; q++) {
2320 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2321 stats_ptr = RTE_PTR_ADD(ð_stats,
2322 rte_txq_stats_strings[i].offset +
2323 q * sizeof(uint64_t));
2325 xstats[count++].value = val;
2331 /* retrieve ethdev extended statistics */
2333 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2334 uint64_t *values, unsigned int size)
2336 unsigned int no_basic_stat_requested = 1;
2337 unsigned int no_ext_stat_requested = 1;
2338 unsigned int num_xstats_filled;
2339 unsigned int basic_count;
2340 uint16_t expected_entries;
2341 struct rte_eth_dev *dev;
2345 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2346 ret = get_xstats_count(port_id);
2349 expected_entries = (uint16_t)ret;
2350 struct rte_eth_xstat xstats[expected_entries];
2351 dev = &rte_eth_devices[port_id];
2352 basic_count = get_xstats_basic_count(dev);
2354 /* Return max number of stats if no ids given */
2357 return expected_entries;
2358 else if (values && size < expected_entries)
2359 return expected_entries;
2365 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2366 unsigned int basic_count = get_xstats_basic_count(dev);
2367 uint64_t ids_copy[size];
2369 for (i = 0; i < size; i++) {
2370 if (ids[i] < basic_count) {
2371 no_basic_stat_requested = 0;
2376 * Convert ids to xstats ids that PMD knows.
2377 * ids known by user are basic + extended stats.
2379 ids_copy[i] = ids[i] - basic_count;
2382 if (no_basic_stat_requested)
2383 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2388 for (i = 0; i < size; i++) {
2389 if (ids[i] >= basic_count) {
2390 no_ext_stat_requested = 0;
2396 /* Fill the xstats structure */
2397 if (ids && no_ext_stat_requested)
2398 ret = rte_eth_basic_stats_get(port_id, xstats);
2400 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2404 num_xstats_filled = (unsigned int)ret;
2406 /* Return all stats */
2408 for (i = 0; i < num_xstats_filled; i++)
2409 values[i] = xstats[i].value;
2410 return expected_entries;
2414 for (i = 0; i < size; i++) {
2415 if (ids[i] >= expected_entries) {
2416 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2419 values[i] = xstats[ids[i]].value;
2425 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2428 struct rte_eth_dev *dev;
2429 unsigned int count = 0, i;
2430 signed int xcount = 0;
2431 uint16_t nb_rxqs, nb_txqs;
2434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2436 dev = &rte_eth_devices[port_id];
2438 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2439 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2441 /* Return generic statistics */
2442 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2443 (nb_txqs * RTE_NB_TXQ_STATS);
2445 /* implemented by the driver */
2446 if (dev->dev_ops->xstats_get != NULL) {
2447 /* Retrieve the xstats from the driver at the end of the
2450 xcount = (*dev->dev_ops->xstats_get)(dev,
2451 xstats ? xstats + count : NULL,
2452 (n > count) ? n - count : 0);
2455 return eth_err(port_id, xcount);
2458 if (n < count + xcount || xstats == NULL)
2459 return count + xcount;
2461 /* now fill the xstats structure */
2462 ret = rte_eth_basic_stats_get(port_id, xstats);
2467 for (i = 0; i < count; i++)
2469 /* add an offset to driver-specific stats */
2470 for ( ; i < count + xcount; i++)
2471 xstats[i].id += count;
2473 return count + xcount;
2476 /* reset ethdev extended statistics */
2478 rte_eth_xstats_reset(uint16_t port_id)
2480 struct rte_eth_dev *dev;
2482 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2483 dev = &rte_eth_devices[port_id];
2485 /* implemented by the driver */
2486 if (dev->dev_ops->xstats_reset != NULL) {
2487 (*dev->dev_ops->xstats_reset)(dev);
2491 /* fallback to default */
2492 rte_eth_stats_reset(port_id);
2496 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2499 struct rte_eth_dev *dev;
2501 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2503 dev = &rte_eth_devices[port_id];
2505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2507 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2510 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2513 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2516 return (*dev->dev_ops->queue_stats_mapping_set)
2517 (dev, queue_id, stat_idx, is_rx);
2522 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2525 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2526 stat_idx, STAT_QMAP_TX));
2531 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2534 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2535 stat_idx, STAT_QMAP_RX));
2539 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2541 struct rte_eth_dev *dev;
2543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2544 dev = &rte_eth_devices[port_id];
2546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2547 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2548 fw_version, fw_size));
2552 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2554 struct rte_eth_dev *dev;
2555 const struct rte_eth_desc_lim lim = {
2556 .nb_max = UINT16_MAX,
2559 .nb_seg_max = UINT16_MAX,
2560 .nb_mtu_seg_max = UINT16_MAX,
2565 * Init dev_info before port_id check since caller does not have
2566 * return status and does not know if get is successful or not.
2568 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2571 dev = &rte_eth_devices[port_id];
2573 dev_info->rx_desc_lim = lim;
2574 dev_info->tx_desc_lim = lim;
2575 dev_info->device = dev->device;
2576 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2577 dev_info->max_mtu = UINT16_MAX;
2579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2580 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2582 /* Cleanup already filled in device information */
2583 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2584 return eth_err(port_id, diag);
2587 dev_info->driver_name = dev->device->driver->name;
2588 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2589 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2591 dev_info->dev_flags = &dev->data->dev_flags;
2597 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2598 uint32_t *ptypes, int num)
2601 struct rte_eth_dev *dev;
2602 const uint32_t *all_ptypes;
2604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2605 dev = &rte_eth_devices[port_id];
2606 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2607 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2612 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2613 if (all_ptypes[i] & ptype_mask) {
2615 ptypes[j] = all_ptypes[i];
2623 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2625 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2628 dev = &rte_eth_devices[port_id];
2629 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2634 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2636 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2640 dev = &rte_eth_devices[port_id];
2641 *mtu = dev->data->mtu;
2646 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2649 struct rte_eth_dev_info dev_info;
2650 struct rte_eth_dev *dev;
2652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2653 dev = &rte_eth_devices[port_id];
2654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2657 * Check if the device supports dev_infos_get, if it does not
2658 * skip min_mtu/max_mtu validation here as this requires values
2659 * that are populated within the call to rte_eth_dev_info_get()
2660 * which relies on dev->dev_ops->dev_infos_get.
2662 if (*dev->dev_ops->dev_infos_get != NULL) {
2663 ret = rte_eth_dev_info_get(port_id, &dev_info);
2667 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2671 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2673 dev->data->mtu = mtu;
2675 return eth_err(port_id, ret);
2679 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2681 struct rte_eth_dev *dev;
2684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2685 dev = &rte_eth_devices[port_id];
2686 if (!(dev->data->dev_conf.rxmode.offloads &
2687 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2688 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2693 if (vlan_id > 4095) {
2694 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2698 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2700 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2702 struct rte_vlan_filter_conf *vfc;
2706 vfc = &dev->data->vlan_filter_conf;
2707 vidx = vlan_id / 64;
2708 vbit = vlan_id % 64;
2711 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2713 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2716 return eth_err(port_id, ret);
2720 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2723 struct rte_eth_dev *dev;
2725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2726 dev = &rte_eth_devices[port_id];
2727 if (rx_queue_id >= dev->data->nb_rx_queues) {
2728 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2732 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2733 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2739 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2740 enum rte_vlan_type vlan_type,
2743 struct rte_eth_dev *dev;
2745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2746 dev = &rte_eth_devices[port_id];
2747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2749 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2754 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2756 struct rte_eth_dev *dev;
2760 uint64_t orig_offloads;
2761 uint64_t *dev_offloads;
2763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2764 dev = &rte_eth_devices[port_id];
2766 /* save original values in case of failure */
2767 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2768 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2770 /*check which option changed by application*/
2771 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2772 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2775 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2777 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2778 mask |= ETH_VLAN_STRIP_MASK;
2781 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2782 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2785 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2787 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2788 mask |= ETH_VLAN_FILTER_MASK;
2791 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2792 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2795 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2797 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2798 mask |= ETH_VLAN_EXTEND_MASK;
2801 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2802 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2805 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2807 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2808 mask |= ETH_QINQ_STRIP_MASK;
2815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2816 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2818 /* hit an error restore original values */
2819 *dev_offloads = orig_offloads;
2822 return eth_err(port_id, ret);
2826 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2828 struct rte_eth_dev *dev;
2829 uint64_t *dev_offloads;
2832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2833 dev = &rte_eth_devices[port_id];
2834 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2836 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2837 ret |= ETH_VLAN_STRIP_OFFLOAD;
2839 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2840 ret |= ETH_VLAN_FILTER_OFFLOAD;
2842 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2843 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2845 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2846 ret |= DEV_RX_OFFLOAD_QINQ_STRIP;
2852 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2854 struct rte_eth_dev *dev;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2857 dev = &rte_eth_devices[port_id];
2858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2860 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2864 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2866 struct rte_eth_dev *dev;
2868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2869 dev = &rte_eth_devices[port_id];
2870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2871 memset(fc_conf, 0, sizeof(*fc_conf));
2872 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2876 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2878 struct rte_eth_dev *dev;
2880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2881 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2882 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2886 dev = &rte_eth_devices[port_id];
2887 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2888 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2892 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2893 struct rte_eth_pfc_conf *pfc_conf)
2895 struct rte_eth_dev *dev;
2897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2898 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2899 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2903 dev = &rte_eth_devices[port_id];
2904 /* High water, low water validation are device specific */
2905 if (*dev->dev_ops->priority_flow_ctrl_set)
2906 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2912 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2920 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2921 for (i = 0; i < num; i++) {
2922 if (reta_conf[i].mask)
2930 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2934 uint16_t i, idx, shift;
2940 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2944 for (i = 0; i < reta_size; i++) {
2945 idx = i / RTE_RETA_GROUP_SIZE;
2946 shift = i % RTE_RETA_GROUP_SIZE;
2947 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2948 (reta_conf[idx].reta[shift] >= max_rxq)) {
2950 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2952 reta_conf[idx].reta[shift], max_rxq);
2961 rte_eth_dev_rss_reta_update(uint16_t port_id,
2962 struct rte_eth_rss_reta_entry64 *reta_conf,
2965 struct rte_eth_dev *dev;
2968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2969 /* Check mask bits */
2970 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2974 dev = &rte_eth_devices[port_id];
2976 /* Check entry value */
2977 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2978 dev->data->nb_rx_queues);
2982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2983 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2988 rte_eth_dev_rss_reta_query(uint16_t port_id,
2989 struct rte_eth_rss_reta_entry64 *reta_conf,
2992 struct rte_eth_dev *dev;
2995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2997 /* Check mask bits */
2998 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3002 dev = &rte_eth_devices[port_id];
3003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3004 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3009 rte_eth_dev_rss_hash_update(uint16_t port_id,
3010 struct rte_eth_rss_conf *rss_conf)
3012 struct rte_eth_dev *dev;
3013 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3018 ret = rte_eth_dev_info_get(port_id, &dev_info);
3022 dev = &rte_eth_devices[port_id];
3023 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3024 dev_info.flow_type_rss_offloads) {
3026 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3027 port_id, rss_conf->rss_hf,
3028 dev_info.flow_type_rss_offloads);
3031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3032 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3037 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3038 struct rte_eth_rss_conf *rss_conf)
3040 struct rte_eth_dev *dev;
3042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3043 dev = &rte_eth_devices[port_id];
3044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3045 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3050 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3051 struct rte_eth_udp_tunnel *udp_tunnel)
3053 struct rte_eth_dev *dev;
3055 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3056 if (udp_tunnel == NULL) {
3057 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3061 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3062 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3066 dev = &rte_eth_devices[port_id];
3067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3068 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3073 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3074 struct rte_eth_udp_tunnel *udp_tunnel)
3076 struct rte_eth_dev *dev;
3078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3079 dev = &rte_eth_devices[port_id];
3081 if (udp_tunnel == NULL) {
3082 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3086 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3087 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3092 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3097 rte_eth_led_on(uint16_t port_id)
3099 struct rte_eth_dev *dev;
3101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3102 dev = &rte_eth_devices[port_id];
3103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3104 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3108 rte_eth_led_off(uint16_t port_id)
3110 struct rte_eth_dev *dev;
3112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3113 dev = &rte_eth_devices[port_id];
3114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3115 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3119 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3123 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3125 struct rte_eth_dev_info dev_info;
3126 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3130 ret = rte_eth_dev_info_get(port_id, &dev_info);
3134 for (i = 0; i < dev_info.max_mac_addrs; i++)
3135 if (memcmp(addr, &dev->data->mac_addrs[i],
3136 RTE_ETHER_ADDR_LEN) == 0)
3142 static const struct rte_ether_addr null_mac_addr;
3145 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3148 struct rte_eth_dev *dev;
3153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3154 dev = &rte_eth_devices[port_id];
3155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3157 if (rte_is_zero_ether_addr(addr)) {
3158 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3162 if (pool >= ETH_64_POOLS) {
3163 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3167 index = get_mac_addr_index(port_id, addr);
3169 index = get_mac_addr_index(port_id, &null_mac_addr);
3171 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3176 pool_mask = dev->data->mac_pool_sel[index];
3178 /* Check if both MAC address and pool is already there, and do nothing */
3179 if (pool_mask & (1ULL << pool))
3184 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3187 /* Update address in NIC data structure */
3188 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3190 /* Update pool bitmap in NIC data structure */
3191 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3194 return eth_err(port_id, ret);
3198 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3200 struct rte_eth_dev *dev;
3203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3204 dev = &rte_eth_devices[port_id];
3205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3207 index = get_mac_addr_index(port_id, addr);
3210 "Port %u: Cannot remove default MAC address\n",
3213 } else if (index < 0)
3214 return 0; /* Do nothing if address wasn't found */
3217 (*dev->dev_ops->mac_addr_remove)(dev, index);
3219 /* Update address in NIC data structure */
3220 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3222 /* reset pool bitmap */
3223 dev->data->mac_pool_sel[index] = 0;
3229 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3231 struct rte_eth_dev *dev;
3234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3236 if (!rte_is_valid_assigned_ether_addr(addr))
3239 dev = &rte_eth_devices[port_id];
3240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3242 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3246 /* Update default address in NIC data structure */
3247 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3254 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3258 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3260 struct rte_eth_dev_info dev_info;
3261 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3265 ret = rte_eth_dev_info_get(port_id, &dev_info);
3269 if (!dev->data->hash_mac_addrs)
3272 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3273 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3274 RTE_ETHER_ADDR_LEN) == 0)
3281 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3286 struct rte_eth_dev *dev;
3288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3290 dev = &rte_eth_devices[port_id];
3291 if (rte_is_zero_ether_addr(addr)) {
3292 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3297 index = get_hash_mac_addr_index(port_id, addr);
3298 /* Check if it's already there, and do nothing */
3299 if ((index >= 0) && on)
3305 "Port %u: the MAC address was not set in UTA\n",
3310 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3312 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3318 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3319 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3321 /* Update address in NIC data structure */
3323 rte_ether_addr_copy(addr,
3324 &dev->data->hash_mac_addrs[index]);
3326 rte_ether_addr_copy(&null_mac_addr,
3327 &dev->data->hash_mac_addrs[index]);
3330 return eth_err(port_id, ret);
3334 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3336 struct rte_eth_dev *dev;
3338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3340 dev = &rte_eth_devices[port_id];
3342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3343 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3347 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3350 struct rte_eth_dev *dev;
3351 struct rte_eth_dev_info dev_info;
3352 struct rte_eth_link link;
3355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3357 ret = rte_eth_dev_info_get(port_id, &dev_info);
3361 dev = &rte_eth_devices[port_id];
3362 link = dev->data->dev_link;
3364 if (queue_idx > dev_info.max_tx_queues) {
3366 "Set queue rate limit:port %u: invalid queue id=%u\n",
3367 port_id, queue_idx);
3371 if (tx_rate > link.link_speed) {
3373 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3374 tx_rate, link.link_speed);
3378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3379 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3380 queue_idx, tx_rate));
3384 rte_eth_mirror_rule_set(uint16_t port_id,
3385 struct rte_eth_mirror_conf *mirror_conf,
3386 uint8_t rule_id, uint8_t on)
3388 struct rte_eth_dev *dev;
3390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3391 if (mirror_conf->rule_type == 0) {
3392 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3396 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3397 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3402 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3403 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3404 (mirror_conf->pool_mask == 0)) {
3406 "Invalid mirror pool, pool mask can not be 0\n");
3410 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3411 mirror_conf->vlan.vlan_mask == 0) {
3413 "Invalid vlan mask, vlan mask can not be 0\n");
3417 dev = &rte_eth_devices[port_id];
3418 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3420 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3421 mirror_conf, rule_id, on));
3425 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3427 struct rte_eth_dev *dev;
3429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3431 dev = &rte_eth_devices[port_id];
3432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3434 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3438 RTE_INIT(eth_dev_init_cb_lists)
3442 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3443 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3447 rte_eth_dev_callback_register(uint16_t port_id,
3448 enum rte_eth_event_type event,
3449 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3451 struct rte_eth_dev *dev;
3452 struct rte_eth_dev_callback *user_cb;
3453 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3459 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3460 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3464 if (port_id == RTE_ETH_ALL) {
3466 last_port = RTE_MAX_ETHPORTS - 1;
3468 next_port = last_port = port_id;
3471 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3474 dev = &rte_eth_devices[next_port];
3476 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3477 if (user_cb->cb_fn == cb_fn &&
3478 user_cb->cb_arg == cb_arg &&
3479 user_cb->event == event) {
3484 /* create a new callback. */
3485 if (user_cb == NULL) {
3486 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3487 sizeof(struct rte_eth_dev_callback), 0);
3488 if (user_cb != NULL) {
3489 user_cb->cb_fn = cb_fn;
3490 user_cb->cb_arg = cb_arg;
3491 user_cb->event = event;
3492 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3495 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3496 rte_eth_dev_callback_unregister(port_id, event,
3502 } while (++next_port <= last_port);
3504 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3509 rte_eth_dev_callback_unregister(uint16_t port_id,
3510 enum rte_eth_event_type event,
3511 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3514 struct rte_eth_dev *dev;
3515 struct rte_eth_dev_callback *cb, *next;
3516 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3522 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3523 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3527 if (port_id == RTE_ETH_ALL) {
3529 last_port = RTE_MAX_ETHPORTS - 1;
3531 next_port = last_port = port_id;
3534 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3537 dev = &rte_eth_devices[next_port];
3539 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3542 next = TAILQ_NEXT(cb, next);
3544 if (cb->cb_fn != cb_fn || cb->event != event ||
3545 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3549 * if this callback is not executing right now,
3552 if (cb->active == 0) {
3553 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3559 } while (++next_port <= last_port);
3561 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3566 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3567 enum rte_eth_event_type event, void *ret_param)
3569 struct rte_eth_dev_callback *cb_lst;
3570 struct rte_eth_dev_callback dev_cb;
3573 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3574 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3575 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3579 if (ret_param != NULL)
3580 dev_cb.ret_param = ret_param;
3582 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3583 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3584 dev_cb.cb_arg, dev_cb.ret_param);
3585 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3588 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3593 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3598 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3600 dev->state = RTE_ETH_DEV_ATTACHED;
3604 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3607 struct rte_eth_dev *dev;
3608 struct rte_intr_handle *intr_handle;
3612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3614 dev = &rte_eth_devices[port_id];
3616 if (!dev->intr_handle) {
3617 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3621 intr_handle = dev->intr_handle;
3622 if (!intr_handle->intr_vec) {
3623 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3627 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3628 vec = intr_handle->intr_vec[qid];
3629 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3630 if (rc && rc != -EEXIST) {
3632 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3633 port_id, qid, op, epfd, vec);
3641 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3643 struct rte_intr_handle *intr_handle;
3644 struct rte_eth_dev *dev;
3645 unsigned int efd_idx;
3649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3651 dev = &rte_eth_devices[port_id];
3653 if (queue_id >= dev->data->nb_rx_queues) {
3654 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3658 if (!dev->intr_handle) {
3659 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3663 intr_handle = dev->intr_handle;
3664 if (!intr_handle->intr_vec) {
3665 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3669 vec = intr_handle->intr_vec[queue_id];
3670 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3671 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3672 fd = intr_handle->efds[efd_idx];
3677 const struct rte_memzone *
3678 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3679 uint16_t queue_id, size_t size, unsigned align,
3682 char z_name[RTE_MEMZONE_NAMESIZE];
3683 const struct rte_memzone *mz;
3686 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3687 dev->data->port_id, queue_id, ring_name);
3688 if (rc >= RTE_MEMZONE_NAMESIZE) {
3689 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3690 rte_errno = ENAMETOOLONG;
3694 mz = rte_memzone_lookup(z_name);
3698 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3699 RTE_MEMZONE_IOVA_CONTIG, align);
3703 rte_eth_dev_create(struct rte_device *device, const char *name,
3704 size_t priv_data_size,
3705 ethdev_bus_specific_init ethdev_bus_specific_init,
3706 void *bus_init_params,
3707 ethdev_init_t ethdev_init, void *init_params)
3709 struct rte_eth_dev *ethdev;
3712 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3714 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3715 ethdev = rte_eth_dev_allocate(name);
3719 if (priv_data_size) {
3720 ethdev->data->dev_private = rte_zmalloc_socket(
3721 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3724 if (!ethdev->data->dev_private) {
3725 RTE_LOG(ERR, EAL, "failed to allocate private data");
3731 ethdev = rte_eth_dev_attach_secondary(name);
3733 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3734 "ethdev doesn't exist");
3739 ethdev->device = device;
3741 if (ethdev_bus_specific_init) {
3742 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3745 "ethdev bus specific initialisation failed");
3750 retval = ethdev_init(ethdev, init_params);
3752 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3756 rte_eth_dev_probing_finish(ethdev);
3761 rte_eth_dev_release_port(ethdev);
3766 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3767 ethdev_uninit_t ethdev_uninit)
3771 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3775 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3777 ret = ethdev_uninit(ethdev);
3781 return rte_eth_dev_release_port(ethdev);
3785 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3786 int epfd, int op, void *data)
3789 struct rte_eth_dev *dev;
3790 struct rte_intr_handle *intr_handle;
3793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3795 dev = &rte_eth_devices[port_id];
3796 if (queue_id >= dev->data->nb_rx_queues) {
3797 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3801 if (!dev->intr_handle) {
3802 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3806 intr_handle = dev->intr_handle;
3807 if (!intr_handle->intr_vec) {
3808 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3812 vec = intr_handle->intr_vec[queue_id];
3813 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3814 if (rc && rc != -EEXIST) {
3816 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3817 port_id, queue_id, op, epfd, vec);
3825 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3828 struct rte_eth_dev *dev;
3830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3832 dev = &rte_eth_devices[port_id];
3834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3835 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3840 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3843 struct rte_eth_dev *dev;
3845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3847 dev = &rte_eth_devices[port_id];
3849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3850 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3856 rte_eth_dev_filter_supported(uint16_t port_id,
3857 enum rte_filter_type filter_type)
3859 struct rte_eth_dev *dev;
3861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3863 dev = &rte_eth_devices[port_id];
3864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3865 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3866 RTE_ETH_FILTER_NOP, NULL);
3870 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3871 enum rte_filter_op filter_op, void *arg)
3873 struct rte_eth_dev *dev;
3875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3877 dev = &rte_eth_devices[port_id];
3878 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3879 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3883 const struct rte_eth_rxtx_callback *
3884 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3885 rte_rx_callback_fn fn, void *user_param)
3887 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3888 rte_errno = ENOTSUP;
3891 /* check input parameters */
3892 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3893 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3897 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3905 cb->param = user_param;
3907 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3908 /* Add the callbacks in fifo order. */
3909 struct rte_eth_rxtx_callback *tail =
3910 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3913 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3920 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3925 const struct rte_eth_rxtx_callback *
3926 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3927 rte_rx_callback_fn fn, void *user_param)
3929 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3930 rte_errno = ENOTSUP;
3933 /* check input parameters */
3934 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3935 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3940 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3948 cb->param = user_param;
3950 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3951 /* Add the callbacks at fisrt position*/
3952 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3954 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3955 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3960 const struct rte_eth_rxtx_callback *
3961 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3962 rte_tx_callback_fn fn, void *user_param)
3964 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3965 rte_errno = ENOTSUP;
3968 /* check input parameters */
3969 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3970 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3975 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3983 cb->param = user_param;
3985 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3986 /* Add the callbacks in fifo order. */
3987 struct rte_eth_rxtx_callback *tail =
3988 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3991 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3998 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4004 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4005 const struct rte_eth_rxtx_callback *user_cb)
4007 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4010 /* Check input parameters. */
4011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4012 if (user_cb == NULL ||
4013 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4016 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4017 struct rte_eth_rxtx_callback *cb;
4018 struct rte_eth_rxtx_callback **prev_cb;
4021 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4022 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4023 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4025 if (cb == user_cb) {
4026 /* Remove the user cb from the callback list. */
4027 *prev_cb = cb->next;
4032 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4038 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4039 const struct rte_eth_rxtx_callback *user_cb)
4041 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4044 /* Check input parameters. */
4045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4046 if (user_cb == NULL ||
4047 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4050 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4052 struct rte_eth_rxtx_callback *cb;
4053 struct rte_eth_rxtx_callback **prev_cb;
4055 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4056 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4057 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4059 if (cb == user_cb) {
4060 /* Remove the user cb from the callback list. */
4061 *prev_cb = cb->next;
4066 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4072 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4073 struct rte_eth_rxq_info *qinfo)
4075 struct rte_eth_dev *dev;
4077 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4082 dev = &rte_eth_devices[port_id];
4083 if (queue_id >= dev->data->nb_rx_queues) {
4084 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4090 memset(qinfo, 0, sizeof(*qinfo));
4091 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4096 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4097 struct rte_eth_txq_info *qinfo)
4099 struct rte_eth_dev *dev;
4101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4106 dev = &rte_eth_devices[port_id];
4107 if (queue_id >= dev->data->nb_tx_queues) {
4108 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4114 memset(qinfo, 0, sizeof(*qinfo));
4115 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4121 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4122 struct rte_ether_addr *mc_addr_set,
4123 uint32_t nb_mc_addr)
4125 struct rte_eth_dev *dev;
4127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4129 dev = &rte_eth_devices[port_id];
4130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4131 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4132 mc_addr_set, nb_mc_addr));
4136 rte_eth_timesync_enable(uint16_t port_id)
4138 struct rte_eth_dev *dev;
4140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4141 dev = &rte_eth_devices[port_id];
4143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4144 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4148 rte_eth_timesync_disable(uint16_t port_id)
4150 struct rte_eth_dev *dev;
4152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4153 dev = &rte_eth_devices[port_id];
4155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4156 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4160 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4163 struct rte_eth_dev *dev;
4165 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4166 dev = &rte_eth_devices[port_id];
4168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4169 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4170 (dev, timestamp, flags));
4174 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4175 struct timespec *timestamp)
4177 struct rte_eth_dev *dev;
4179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4180 dev = &rte_eth_devices[port_id];
4182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4183 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4188 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4190 struct rte_eth_dev *dev;
4192 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4193 dev = &rte_eth_devices[port_id];
4195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4196 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4201 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4203 struct rte_eth_dev *dev;
4205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4206 dev = &rte_eth_devices[port_id];
4208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4209 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4214 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4216 struct rte_eth_dev *dev;
4218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4219 dev = &rte_eth_devices[port_id];
4221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4222 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4227 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4229 struct rte_eth_dev *dev;
4231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4232 dev = &rte_eth_devices[port_id];
4234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4235 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4239 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4241 struct rte_eth_dev *dev;
4243 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4245 dev = &rte_eth_devices[port_id];
4246 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4247 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4251 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4253 struct rte_eth_dev *dev;
4255 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4257 dev = &rte_eth_devices[port_id];
4258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4259 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4263 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4265 struct rte_eth_dev *dev;
4267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4269 dev = &rte_eth_devices[port_id];
4270 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4271 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4275 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4277 struct rte_eth_dev *dev;
4279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4281 dev = &rte_eth_devices[port_id];
4282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4283 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4287 rte_eth_dev_get_module_info(uint16_t port_id,
4288 struct rte_eth_dev_module_info *modinfo)
4290 struct rte_eth_dev *dev;
4292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4294 dev = &rte_eth_devices[port_id];
4295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4296 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4300 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4301 struct rte_dev_eeprom_info *info)
4303 struct rte_eth_dev *dev;
4305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4307 dev = &rte_eth_devices[port_id];
4308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4309 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4313 rte_eth_dev_get_dcb_info(uint16_t port_id,
4314 struct rte_eth_dcb_info *dcb_info)
4316 struct rte_eth_dev *dev;
4318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4320 dev = &rte_eth_devices[port_id];
4321 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4324 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4328 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4329 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4331 struct rte_eth_dev *dev;
4333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4334 if (l2_tunnel == NULL) {
4335 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4339 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4340 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4344 dev = &rte_eth_devices[port_id];
4345 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4347 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4352 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4353 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4357 struct rte_eth_dev *dev;
4359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4361 if (l2_tunnel == NULL) {
4362 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4366 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4367 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4372 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4376 dev = &rte_eth_devices[port_id];
4377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4379 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4380 l2_tunnel, mask, en));
4384 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4385 const struct rte_eth_desc_lim *desc_lim)
4387 if (desc_lim->nb_align != 0)
4388 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4390 if (desc_lim->nb_max != 0)
4391 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4393 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4397 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4398 uint16_t *nb_rx_desc,
4399 uint16_t *nb_tx_desc)
4401 struct rte_eth_dev_info dev_info;
4404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4406 ret = rte_eth_dev_info_get(port_id, &dev_info);
4410 if (nb_rx_desc != NULL)
4411 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4413 if (nb_tx_desc != NULL)
4414 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4420 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4422 struct rte_eth_dev *dev;
4424 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4429 dev = &rte_eth_devices[port_id];
4431 if (*dev->dev_ops->pool_ops_supported == NULL)
4432 return 1; /* all pools are supported */
4434 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4438 * A set of values to describe the possible states of a switch domain.
4440 enum rte_eth_switch_domain_state {
4441 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4442 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4446 * Array of switch domains available for allocation. Array is sized to
4447 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4448 * ethdev ports in a single process.
4450 static struct rte_eth_dev_switch {
4451 enum rte_eth_switch_domain_state state;
4452 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4455 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4459 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4461 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4462 i < RTE_MAX_ETHPORTS; i++) {
4463 if (rte_eth_switch_domains[i].state ==
4464 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4465 rte_eth_switch_domains[i].state =
4466 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4476 rte_eth_switch_domain_free(uint16_t domain_id)
4478 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4479 domain_id >= RTE_MAX_ETHPORTS)
4482 if (rte_eth_switch_domains[domain_id].state !=
4483 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4486 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4492 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4495 struct rte_kvargs_pair *pair;
4498 arglist->str = strdup(str_in);
4499 if (arglist->str == NULL)
4502 letter = arglist->str;
4505 pair = &arglist->pairs[0];
4508 case 0: /* Initial */
4511 else if (*letter == '\0')
4518 case 1: /* Parsing key */
4519 if (*letter == '=') {
4521 pair->value = letter + 1;
4523 } else if (*letter == ',' || *letter == '\0')
4528 case 2: /* Parsing value */
4531 else if (*letter == ',') {
4534 pair = &arglist->pairs[arglist->count];
4536 } else if (*letter == '\0') {
4539 pair = &arglist->pairs[arglist->count];
4544 case 3: /* Parsing list */
4547 else if (*letter == '\0')
4556 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4558 struct rte_kvargs args;
4559 struct rte_kvargs_pair *pair;
4563 memset(eth_da, 0, sizeof(*eth_da));
4565 result = rte_eth_devargs_tokenise(&args, dargs);
4569 for (i = 0; i < args.count; i++) {
4570 pair = &args.pairs[i];
4571 if (strcmp("representor", pair->key) == 0) {
4572 result = rte_eth_devargs_parse_list(pair->value,
4573 rte_eth_devargs_parse_representor_ports,
4587 RTE_INIT(ethdev_init_log)
4589 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4590 if (rte_eth_dev_logtype >= 0)
4591 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);