1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 static int ethdev_logtype;
47 #define ethdev_log(level, fmt, ...) \
48 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
50 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
51 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 static uint8_t eth_dev_last_created_port;
54 /* spinlock for eth device callbacks */
55 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove rx callbacks */
58 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for add/remove tx callbacks */
61 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
63 /* spinlock for shared data allocation */
64 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* store statistics names and its offset in stats structure */
67 struct rte_eth_xstats_name_off {
68 char name[RTE_ETH_XSTATS_NAME_SIZE];
72 /* Shared memory between primary and secondary processes. */
74 uint64_t next_owner_id;
75 rte_spinlock_t ownership_lock;
76 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
77 } *rte_eth_dev_shared_data;
79 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
80 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
81 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
82 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
83 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
84 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
85 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
86 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
87 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
91 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
93 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
94 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
95 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
96 {"errors", offsetof(struct rte_eth_stats, q_errors)},
99 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
100 sizeof(rte_rxq_stats_strings[0]))
102 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
103 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
104 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
106 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
107 sizeof(rte_txq_stats_strings[0]))
109 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
110 { DEV_RX_OFFLOAD_##_name, #_name }
112 static const struct {
115 } rte_rx_offload_names[] = {
116 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
121 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
123 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
124 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
126 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
127 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
128 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
129 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
130 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
131 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
238 rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_find_free_port(void)
255 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
256 /* Using shared name field to find a free port. */
257 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
258 RTE_ASSERT(rte_eth_devices[i].state ==
263 return RTE_MAX_ETHPORTS;
266 static struct rte_eth_dev *
267 eth_dev_get(uint16_t port_id)
269 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
271 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
272 eth_dev->state = RTE_ETH_DEV_ATTACHED;
274 eth_dev_last_created_port = port_id;
280 rte_eth_dev_allocate(const char *name)
283 struct rte_eth_dev *eth_dev = NULL;
285 rte_eth_dev_shared_data_prepare();
287 /* Synchronize port creation between primary and secondary threads. */
288 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
290 port_id = rte_eth_dev_find_free_port();
291 if (port_id == RTE_MAX_ETHPORTS) {
292 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
296 if (rte_eth_dev_allocated(name) != NULL) {
298 "Ethernet Device with name %s already allocated!",
303 eth_dev = eth_dev_get(port_id);
304 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
305 eth_dev->data->port_id = port_id;
306 eth_dev->data->mtu = ETHER_MTU;
309 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
312 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
318 * Attach to a port already registered by the primary process, which
319 * makes sure that the same device would have the same port id both
320 * in the primary and secondary process.
323 rte_eth_dev_attach_secondary(const char *name)
326 struct rte_eth_dev *eth_dev = NULL;
328 rte_eth_dev_shared_data_prepare();
330 /* Synchronize port attachment to primary port creation and release. */
331 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
333 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
334 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
337 if (i == RTE_MAX_ETHPORTS) {
339 "device %s is not driven by the primary process\n",
342 eth_dev = eth_dev_get(i);
343 RTE_ASSERT(eth_dev->data->port_id == i);
346 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
351 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
356 rte_eth_dev_shared_data_prepare();
358 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
360 eth_dev->state = RTE_ETH_DEV_UNUSED;
362 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
364 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
366 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
372 rte_eth_dev_is_valid_port(uint16_t port_id)
374 if (port_id >= RTE_MAX_ETHPORTS ||
375 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
382 rte_eth_is_valid_owner_id(uint64_t owner_id)
384 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
385 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
386 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016"PRIX64".\n", owner_id);
393 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
395 while (port_id < RTE_MAX_ETHPORTS &&
396 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
397 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
398 rte_eth_devices[port_id].data->owner.id != owner_id))
401 if (port_id >= RTE_MAX_ETHPORTS)
402 return RTE_MAX_ETHPORTS;
407 int __rte_experimental
408 rte_eth_dev_owner_new(uint64_t *owner_id)
410 rte_eth_dev_shared_data_prepare();
412 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
414 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
416 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
421 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
422 const struct rte_eth_dev_owner *new_owner)
424 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
425 struct rte_eth_dev_owner *port_owner;
428 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
429 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
433 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
434 !rte_eth_is_valid_owner_id(old_owner_id))
437 port_owner = &rte_eth_devices[port_id].data->owner;
438 if (port_owner->id != old_owner_id) {
439 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
440 " by %s_%016"PRIX64".\n", port_id,
441 port_owner->name, port_owner->id);
445 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
447 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
448 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
451 port_owner->id = new_owner->id;
453 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016"PRIX64".\n", port_id,
454 new_owner->name, new_owner->id);
459 int __rte_experimental
460 rte_eth_dev_owner_set(const uint16_t port_id,
461 const struct rte_eth_dev_owner *owner)
465 rte_eth_dev_shared_data_prepare();
467 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
469 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
471 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
475 int __rte_experimental
476 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
478 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
479 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
482 rte_eth_dev_shared_data_prepare();
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
488 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
492 void __rte_experimental
493 rte_eth_dev_owner_delete(const uint64_t owner_id)
497 rte_eth_dev_shared_data_prepare();
499 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
501 if (rte_eth_is_valid_owner_id(owner_id)) {
502 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
503 if (rte_eth_devices[port_id].data->owner.id == owner_id)
504 memset(&rte_eth_devices[port_id].data->owner, 0,
505 sizeof(struct rte_eth_dev_owner));
506 RTE_PMD_DEBUG_TRACE("All port owners owned by %016"PRIX64
507 " identifier have removed.\n", owner_id);
510 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
513 int __rte_experimental
514 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
517 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
519 rte_eth_dev_shared_data_prepare();
521 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
523 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
524 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
527 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
530 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
535 rte_eth_dev_socket_id(uint16_t port_id)
537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
538 return rte_eth_devices[port_id].data->numa_node;
542 rte_eth_dev_get_sec_ctx(uint16_t port_id)
544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
545 return rte_eth_devices[port_id].security_ctx;
549 rte_eth_dev_count(void)
551 return rte_eth_dev_count_avail();
555 rte_eth_dev_count_avail(void)
562 RTE_ETH_FOREACH_DEV(p)
568 uint16_t __rte_experimental
569 rte_eth_dev_count_total(void)
571 uint16_t port, count = 0;
573 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
574 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
581 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
588 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
592 /* shouldn't check 'rte_eth_devices[i].data',
593 * because it might be overwritten by VDEV PMD */
594 tmp = rte_eth_dev_shared_data->data[port_id].name;
600 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
605 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
609 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
610 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
611 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
621 eth_err(uint16_t port_id, int ret)
625 if (rte_eth_dev_is_removed(port_id))
630 /* attach the new device, then store port_id of the device */
632 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
634 int current = rte_eth_dev_count_total();
635 struct rte_devargs da;
638 memset(&da, 0, sizeof(da));
640 if ((devargs == NULL) || (port_id == NULL)) {
646 if (rte_devargs_parse(&da, "%s", devargs))
649 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
653 /* no point looking at the port count if no port exists */
654 if (!rte_eth_dev_count_total()) {
655 ethdev_log(ERR, "No port found for device (%s)", da.name);
660 /* if nothing happened, there is a bug here, since some driver told us
661 * it did attach a device, but did not create a port.
662 * FIXME: race condition in case of plug-out of another device
664 if (current == rte_eth_dev_count_total()) {
669 *port_id = eth_dev_last_created_port;
677 /* detach the device, then store the name of the device */
679 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
681 struct rte_device *dev;
686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
688 dev_flags = rte_eth_devices[port_id].data->dev_flags;
689 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
691 "Port %" PRIu16 " is bonded, cannot detach", port_id);
695 dev = rte_eth_devices[port_id].device;
699 bus = rte_bus_find_by_device(dev);
703 ret = rte_eal_hotplug_remove(bus->name, dev->name);
707 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
712 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
714 uint16_t old_nb_queues = dev->data->nb_rx_queues;
718 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
719 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
720 sizeof(dev->data->rx_queues[0]) * nb_queues,
721 RTE_CACHE_LINE_SIZE);
722 if (dev->data->rx_queues == NULL) {
723 dev->data->nb_rx_queues = 0;
726 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
729 rxq = dev->data->rx_queues;
731 for (i = nb_queues; i < old_nb_queues; i++)
732 (*dev->dev_ops->rx_queue_release)(rxq[i]);
733 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
734 RTE_CACHE_LINE_SIZE);
737 if (nb_queues > old_nb_queues) {
738 uint16_t new_qs = nb_queues - old_nb_queues;
740 memset(rxq + old_nb_queues, 0,
741 sizeof(rxq[0]) * new_qs);
744 dev->data->rx_queues = rxq;
746 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
749 rxq = dev->data->rx_queues;
751 for (i = nb_queues; i < old_nb_queues; i++)
752 (*dev->dev_ops->rx_queue_release)(rxq[i]);
754 rte_free(dev->data->rx_queues);
755 dev->data->rx_queues = NULL;
757 dev->data->nb_rx_queues = nb_queues;
762 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
764 struct rte_eth_dev *dev;
766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
768 dev = &rte_eth_devices[port_id];
769 if (!dev->data->dev_started) {
771 "port %d must be started before start any queue\n", port_id);
775 if (rx_queue_id >= dev->data->nb_rx_queues) {
776 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
780 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
782 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
783 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
784 " already started\n",
785 rx_queue_id, port_id);
789 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
795 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
797 struct rte_eth_dev *dev;
799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
801 dev = &rte_eth_devices[port_id];
802 if (rx_queue_id >= dev->data->nb_rx_queues) {
803 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
809 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
810 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
811 " already stopped\n",
812 rx_queue_id, port_id);
816 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
821 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
823 struct rte_eth_dev *dev;
825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
827 dev = &rte_eth_devices[port_id];
828 if (!dev->data->dev_started) {
830 "port %d must be started before start any queue\n", port_id);
834 if (tx_queue_id >= dev->data->nb_tx_queues) {
835 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
841 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
842 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
843 " already started\n",
844 tx_queue_id, port_id);
848 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
854 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
856 struct rte_eth_dev *dev;
858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
860 dev = &rte_eth_devices[port_id];
861 if (tx_queue_id >= dev->data->nb_tx_queues) {
862 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
868 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
869 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
870 " already stopped\n",
871 tx_queue_id, port_id);
875 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
880 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
882 uint16_t old_nb_queues = dev->data->nb_tx_queues;
886 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
887 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
888 sizeof(dev->data->tx_queues[0]) * nb_queues,
889 RTE_CACHE_LINE_SIZE);
890 if (dev->data->tx_queues == NULL) {
891 dev->data->nb_tx_queues = 0;
894 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
897 txq = dev->data->tx_queues;
899 for (i = nb_queues; i < old_nb_queues; i++)
900 (*dev->dev_ops->tx_queue_release)(txq[i]);
901 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
902 RTE_CACHE_LINE_SIZE);
905 if (nb_queues > old_nb_queues) {
906 uint16_t new_qs = nb_queues - old_nb_queues;
908 memset(txq + old_nb_queues, 0,
909 sizeof(txq[0]) * new_qs);
912 dev->data->tx_queues = txq;
914 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
917 txq = dev->data->tx_queues;
919 for (i = nb_queues; i < old_nb_queues; i++)
920 (*dev->dev_ops->tx_queue_release)(txq[i]);
922 rte_free(dev->data->tx_queues);
923 dev->data->tx_queues = NULL;
925 dev->data->nb_tx_queues = nb_queues;
930 rte_eth_speed_bitflag(uint32_t speed, int duplex)
933 case ETH_SPEED_NUM_10M:
934 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
935 case ETH_SPEED_NUM_100M:
936 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
937 case ETH_SPEED_NUM_1G:
938 return ETH_LINK_SPEED_1G;
939 case ETH_SPEED_NUM_2_5G:
940 return ETH_LINK_SPEED_2_5G;
941 case ETH_SPEED_NUM_5G:
942 return ETH_LINK_SPEED_5G;
943 case ETH_SPEED_NUM_10G:
944 return ETH_LINK_SPEED_10G;
945 case ETH_SPEED_NUM_20G:
946 return ETH_LINK_SPEED_20G;
947 case ETH_SPEED_NUM_25G:
948 return ETH_LINK_SPEED_25G;
949 case ETH_SPEED_NUM_40G:
950 return ETH_LINK_SPEED_40G;
951 case ETH_SPEED_NUM_50G:
952 return ETH_LINK_SPEED_50G;
953 case ETH_SPEED_NUM_56G:
954 return ETH_LINK_SPEED_56G;
955 case ETH_SPEED_NUM_100G:
956 return ETH_LINK_SPEED_100G;
963 * A conversion function from rxmode bitfield API.
966 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
967 uint64_t *rx_offloads)
969 uint64_t offloads = 0;
971 if (rxmode->header_split == 1)
972 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
973 if (rxmode->hw_ip_checksum == 1)
974 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
975 if (rxmode->hw_vlan_filter == 1)
976 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
977 if (rxmode->hw_vlan_strip == 1)
978 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
979 if (rxmode->hw_vlan_extend == 1)
980 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
981 if (rxmode->jumbo_frame == 1)
982 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
983 if (rxmode->hw_strip_crc == 1)
984 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
985 if (rxmode->enable_scatter == 1)
986 offloads |= DEV_RX_OFFLOAD_SCATTER;
987 if (rxmode->enable_lro == 1)
988 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
989 if (rxmode->hw_timestamp == 1)
990 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
991 if (rxmode->security == 1)
992 offloads |= DEV_RX_OFFLOAD_SECURITY;
994 *rx_offloads = offloads;
997 const char * __rte_experimental
998 rte_eth_dev_rx_offload_name(uint64_t offload)
1000 const char *name = "UNKNOWN";
1003 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1004 if (offload == rte_rx_offload_names[i].offload) {
1005 name = rte_rx_offload_names[i].name;
1013 const char * __rte_experimental
1014 rte_eth_dev_tx_offload_name(uint64_t offload)
1016 const char *name = "UNKNOWN";
1019 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1020 if (offload == rte_tx_offload_names[i].offload) {
1021 name = rte_tx_offload_names[i].name;
1030 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1031 const struct rte_eth_conf *dev_conf)
1033 struct rte_eth_dev *dev;
1034 struct rte_eth_dev_info dev_info;
1035 struct rte_eth_conf local_conf = *dev_conf;
1038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1040 dev = &rte_eth_devices[port_id];
1042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1045 rte_eth_dev_info_get(port_id, &dev_info);
1047 /* If number of queues specified by application for both Rx and Tx is
1048 * zero, use driver preferred values. This cannot be done individually
1049 * as it is valid for either Tx or Rx (but not both) to be zero.
1050 * If driver does not provide any preferred valued, fall back on
1053 if (nb_rx_q == 0 && nb_tx_q == 0) {
1054 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1056 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1057 nb_tx_q = dev_info.default_txportconf.nb_queues;
1059 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1062 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1063 RTE_PMD_DEBUG_TRACE(
1064 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1065 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1069 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1070 RTE_PMD_DEBUG_TRACE(
1071 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1072 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1076 if (dev->data->dev_started) {
1077 RTE_PMD_DEBUG_TRACE(
1078 "port %d must be stopped to allow configuration\n", port_id);
1083 * Convert between the offloads API to enable PMDs to support
1086 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1087 rte_eth_convert_rx_offload_bitfield(
1088 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1090 /* Copy the dev_conf parameter into the dev structure */
1091 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1094 * Check that the numbers of RX and TX queues are not greater
1095 * than the maximum number of RX and TX queues supported by the
1096 * configured device.
1098 if (nb_rx_q > dev_info.max_rx_queues) {
1099 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1100 port_id, nb_rx_q, dev_info.max_rx_queues);
1104 if (nb_tx_q > dev_info.max_tx_queues) {
1105 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1106 port_id, nb_tx_q, dev_info.max_tx_queues);
1110 /* Check that the device supports requested interrupts */
1111 if ((dev_conf->intr_conf.lsc == 1) &&
1112 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1113 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1114 dev->device->driver->name);
1117 if ((dev_conf->intr_conf.rmv == 1) &&
1118 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1119 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1120 dev->device->driver->name);
1125 * If jumbo frames are enabled, check that the maximum RX packet
1126 * length is supported by the configured device.
1128 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1129 if (dev_conf->rxmode.max_rx_pkt_len >
1130 dev_info.max_rx_pktlen) {
1131 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1132 " > max valid value %u\n",
1134 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1135 (unsigned)dev_info.max_rx_pktlen);
1137 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1138 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1139 " < min valid value %u\n",
1141 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1142 (unsigned)ETHER_MIN_LEN);
1146 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1147 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1148 /* Use default value */
1149 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1153 /* Any requested offloading must be within its device capabilities */
1154 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1155 local_conf.rxmode.offloads) {
1156 ethdev_log(ERR, "ethdev port_id=%d requested Rx offloads "
1157 "0x%" PRIx64 " doesn't match Rx offloads "
1158 "capabilities 0x%" PRIx64 " in %s()\n",
1160 local_conf.rxmode.offloads,
1161 dev_info.rx_offload_capa,
1163 /* Will return -EINVAL in the next release */
1165 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1166 local_conf.txmode.offloads) {
1167 ethdev_log(ERR, "ethdev port_id=%d requested Tx offloads "
1168 "0x%" PRIx64 " doesn't match Tx offloads "
1169 "capabilities 0x%" PRIx64 " in %s()\n",
1171 local_conf.txmode.offloads,
1172 dev_info.tx_offload_capa,
1174 /* Will return -EINVAL in the next release */
1177 /* Check that device supports requested rss hash functions. */
1178 if ((dev_info.flow_type_rss_offloads |
1179 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1180 dev_info.flow_type_rss_offloads) {
1181 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1182 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1184 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1185 dev_info.flow_type_rss_offloads);
1189 * Setup new number of RX/TX queues and reconfigure device.
1191 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1193 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1198 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1200 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1202 rte_eth_dev_rx_queue_config(dev, 0);
1206 diag = (*dev->dev_ops->dev_configure)(dev);
1208 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1210 rte_eth_dev_rx_queue_config(dev, 0);
1211 rte_eth_dev_tx_queue_config(dev, 0);
1212 return eth_err(port_id, diag);
1215 /* Initialize Rx profiling if enabled at compilation time. */
1216 diag = __rte_eth_profile_rx_init(port_id, dev);
1218 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1220 rte_eth_dev_rx_queue_config(dev, 0);
1221 rte_eth_dev_tx_queue_config(dev, 0);
1222 return eth_err(port_id, diag);
1229 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1231 if (dev->data->dev_started) {
1232 RTE_PMD_DEBUG_TRACE(
1233 "port %d must be stopped to allow reset\n",
1234 dev->data->port_id);
1238 rte_eth_dev_rx_queue_config(dev, 0);
1239 rte_eth_dev_tx_queue_config(dev, 0);
1241 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1245 rte_eth_dev_config_restore(uint16_t port_id)
1247 struct rte_eth_dev *dev;
1248 struct rte_eth_dev_info dev_info;
1249 struct ether_addr *addr;
1254 dev = &rte_eth_devices[port_id];
1256 rte_eth_dev_info_get(port_id, &dev_info);
1258 /* replay MAC address configuration including default MAC */
1259 addr = &dev->data->mac_addrs[0];
1260 if (*dev->dev_ops->mac_addr_set != NULL)
1261 (*dev->dev_ops->mac_addr_set)(dev, addr);
1262 else if (*dev->dev_ops->mac_addr_add != NULL)
1263 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1265 if (*dev->dev_ops->mac_addr_add != NULL) {
1266 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1267 addr = &dev->data->mac_addrs[i];
1269 /* skip zero address */
1270 if (is_zero_ether_addr(addr))
1274 pool_mask = dev->data->mac_pool_sel[i];
1277 if (pool_mask & 1ULL)
1278 (*dev->dev_ops->mac_addr_add)(dev,
1282 } while (pool_mask);
1286 /* replay promiscuous configuration */
1287 if (rte_eth_promiscuous_get(port_id) == 1)
1288 rte_eth_promiscuous_enable(port_id);
1289 else if (rte_eth_promiscuous_get(port_id) == 0)
1290 rte_eth_promiscuous_disable(port_id);
1292 /* replay all multicast configuration */
1293 if (rte_eth_allmulticast_get(port_id) == 1)
1294 rte_eth_allmulticast_enable(port_id);
1295 else if (rte_eth_allmulticast_get(port_id) == 0)
1296 rte_eth_allmulticast_disable(port_id);
1300 rte_eth_dev_start(uint16_t port_id)
1302 struct rte_eth_dev *dev;
1305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1307 dev = &rte_eth_devices[port_id];
1309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1311 if (dev->data->dev_started != 0) {
1312 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1313 " already started\n",
1318 diag = (*dev->dev_ops->dev_start)(dev);
1320 dev->data->dev_started = 1;
1322 return eth_err(port_id, diag);
1324 rte_eth_dev_config_restore(port_id);
1326 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1328 (*dev->dev_ops->link_update)(dev, 0);
1334 rte_eth_dev_stop(uint16_t port_id)
1336 struct rte_eth_dev *dev;
1338 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1339 dev = &rte_eth_devices[port_id];
1341 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1343 if (dev->data->dev_started == 0) {
1344 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1345 " already stopped\n",
1350 dev->data->dev_started = 0;
1351 (*dev->dev_ops->dev_stop)(dev);
1355 rte_eth_dev_set_link_up(uint16_t port_id)
1357 struct rte_eth_dev *dev;
1359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1361 dev = &rte_eth_devices[port_id];
1363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1364 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1368 rte_eth_dev_set_link_down(uint16_t port_id)
1370 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1374 dev = &rte_eth_devices[port_id];
1376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1377 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1381 rte_eth_dev_close(uint16_t port_id)
1383 struct rte_eth_dev *dev;
1385 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1386 dev = &rte_eth_devices[port_id];
1388 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1389 dev->data->dev_started = 0;
1390 (*dev->dev_ops->dev_close)(dev);
1392 dev->data->nb_rx_queues = 0;
1393 rte_free(dev->data->rx_queues);
1394 dev->data->rx_queues = NULL;
1395 dev->data->nb_tx_queues = 0;
1396 rte_free(dev->data->tx_queues);
1397 dev->data->tx_queues = NULL;
1401 rte_eth_dev_reset(uint16_t port_id)
1403 struct rte_eth_dev *dev;
1406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1407 dev = &rte_eth_devices[port_id];
1409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1411 rte_eth_dev_stop(port_id);
1412 ret = dev->dev_ops->dev_reset(dev);
1414 return eth_err(port_id, ret);
1417 int __rte_experimental
1418 rte_eth_dev_is_removed(uint16_t port_id)
1420 struct rte_eth_dev *dev;
1423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1425 dev = &rte_eth_devices[port_id];
1427 if (dev->state == RTE_ETH_DEV_REMOVED)
1430 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1432 ret = dev->dev_ops->is_removed(dev);
1434 /* Device is physically removed. */
1435 dev->state = RTE_ETH_DEV_REMOVED;
1441 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1442 uint16_t nb_rx_desc, unsigned int socket_id,
1443 const struct rte_eth_rxconf *rx_conf,
1444 struct rte_mempool *mp)
1447 uint32_t mbp_buf_size;
1448 struct rte_eth_dev *dev;
1449 struct rte_eth_dev_info dev_info;
1450 struct rte_eth_rxconf local_conf;
1453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1455 dev = &rte_eth_devices[port_id];
1456 if (rx_queue_id >= dev->data->nb_rx_queues) {
1457 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1465 * Check the size of the mbuf data buffer.
1466 * This value must be provided in the private data of the memory pool.
1467 * First check that the memory pool has a valid private data.
1469 rte_eth_dev_info_get(port_id, &dev_info);
1470 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1471 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1472 mp->name, (int) mp->private_data_size,
1473 (int) sizeof(struct rte_pktmbuf_pool_private));
1476 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1478 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1479 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1480 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1484 (int)(RTE_PKTMBUF_HEADROOM +
1485 dev_info.min_rx_bufsize),
1486 (int)RTE_PKTMBUF_HEADROOM,
1487 (int)dev_info.min_rx_bufsize);
1491 /* Use default specified by driver, if nb_rx_desc is zero */
1492 if (nb_rx_desc == 0) {
1493 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1494 /* If driver default is also zero, fall back on EAL default */
1495 if (nb_rx_desc == 0)
1496 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1499 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1500 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1501 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1503 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1504 "should be: <= %hu, = %hu, and a product of %hu\n",
1506 dev_info.rx_desc_lim.nb_max,
1507 dev_info.rx_desc_lim.nb_min,
1508 dev_info.rx_desc_lim.nb_align);
1512 if (dev->data->dev_started &&
1513 !(dev_info.dev_capa &
1514 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1517 if (dev->data->rx_queue_state[rx_queue_id] !=
1518 RTE_ETH_QUEUE_STATE_STOPPED)
1521 rxq = dev->data->rx_queues;
1522 if (rxq[rx_queue_id]) {
1523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1525 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1526 rxq[rx_queue_id] = NULL;
1529 if (rx_conf == NULL)
1530 rx_conf = &dev_info.default_rxconf;
1532 local_conf = *rx_conf;
1533 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1535 * Reflect port offloads to queue offloads in order for
1536 * offloads to not be discarded.
1538 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1539 &local_conf.offloads);
1543 * If an offloading has already been enabled in
1544 * rte_eth_dev_configure(), it has been enabled on all queues,
1545 * so there is no need to enable it in this queue again.
1546 * The local_conf.offloads input to underlying PMD only carries
1547 * those offloadings which are only enabled on this queue and
1548 * not enabled on all queues.
1550 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1553 * New added offloadings for this queue are those not enabled in
1554 * rte_eth_dev_configure() and they must be per-queue type.
1555 * A pure per-port offloading can't be enabled on a queue while
1556 * disabled on another queue. A pure per-port offloading can't
1557 * be enabled for any queue as new added one if it hasn't been
1558 * enabled in rte_eth_dev_configure().
1560 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1561 local_conf.offloads) {
1562 ethdev_log(ERR, "Ethdev port_id=%d rx_queue_id=%d, new "
1563 "added offloads 0x%" PRIx64 " must be "
1564 "within pre-queue offload capabilities 0x%"
1565 PRIx64 " in %s()\n",
1568 local_conf.offloads,
1569 dev_info.rx_queue_offload_capa,
1571 /* Will return -EINVAL in the next release */
1574 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1575 socket_id, &local_conf, mp);
1577 if (!dev->data->min_rx_buf_size ||
1578 dev->data->min_rx_buf_size > mbp_buf_size)
1579 dev->data->min_rx_buf_size = mbp_buf_size;
1582 return eth_err(port_id, ret);
1586 * Convert from tx offloads to txq_flags.
1589 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1593 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1594 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1595 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1596 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1597 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1598 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1599 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1600 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1601 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1602 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1603 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1604 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1610 * A conversion function from txq_flags API.
1613 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1615 uint64_t offloads = 0;
1617 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1618 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1619 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1620 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1621 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1622 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1623 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1624 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1625 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1626 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1627 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1628 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1629 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1631 *tx_offloads = offloads;
1635 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1636 uint16_t nb_tx_desc, unsigned int socket_id,
1637 const struct rte_eth_txconf *tx_conf)
1639 struct rte_eth_dev *dev;
1640 struct rte_eth_dev_info dev_info;
1641 struct rte_eth_txconf local_conf;
1644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1646 dev = &rte_eth_devices[port_id];
1647 if (tx_queue_id >= dev->data->nb_tx_queues) {
1648 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1653 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1655 rte_eth_dev_info_get(port_id, &dev_info);
1657 /* Use default specified by driver, if nb_tx_desc is zero */
1658 if (nb_tx_desc == 0) {
1659 nb_tx_desc = dev_info.default_txportconf.ring_size;
1660 /* If driver default is zero, fall back on EAL default */
1661 if (nb_tx_desc == 0)
1662 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1664 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1665 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1666 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1667 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1668 "should be: <= %hu, = %hu, and a product of %hu\n",
1670 dev_info.tx_desc_lim.nb_max,
1671 dev_info.tx_desc_lim.nb_min,
1672 dev_info.tx_desc_lim.nb_align);
1676 if (dev->data->dev_started &&
1677 !(dev_info.dev_capa &
1678 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1681 if (dev->data->tx_queue_state[tx_queue_id] !=
1682 RTE_ETH_QUEUE_STATE_STOPPED)
1685 txq = dev->data->tx_queues;
1686 if (txq[tx_queue_id]) {
1687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1689 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1690 txq[tx_queue_id] = NULL;
1693 if (tx_conf == NULL)
1694 tx_conf = &dev_info.default_txconf;
1697 * Convert between the offloads API to enable PMDs to support
1700 local_conf = *tx_conf;
1701 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1702 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1703 &local_conf.offloads);
1707 * If an offloading has already been enabled in
1708 * rte_eth_dev_configure(), it has been enabled on all queues,
1709 * so there is no need to enable it in this queue again.
1710 * The local_conf.offloads input to underlying PMD only carries
1711 * those offloadings which are only enabled on this queue and
1712 * not enabled on all queues.
1714 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1717 * New added offloadings for this queue are those not enabled in
1718 * rte_eth_dev_configure() and they must be per-queue type.
1719 * A pure per-port offloading can't be enabled on a queue while
1720 * disabled on another queue. A pure per-port offloading can't
1721 * be enabled for any queue as new added one if it hasn't been
1722 * enabled in rte_eth_dev_configure().
1724 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1725 local_conf.offloads) {
1726 ethdev_log(ERR, "Ethdev port_id=%d tx_queue_id=%d, new "
1727 "added offloads 0x%" PRIx64 " must be "
1728 "within pre-queue offload capabilities 0x%"
1729 PRIx64 " in %s()\n",
1732 local_conf.offloads,
1733 dev_info.tx_queue_offload_capa,
1735 /* Will return -EINVAL in the next release */
1738 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1739 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1743 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1744 void *userdata __rte_unused)
1748 for (i = 0; i < unsent; i++)
1749 rte_pktmbuf_free(pkts[i]);
1753 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1756 uint64_t *count = userdata;
1759 for (i = 0; i < unsent; i++)
1760 rte_pktmbuf_free(pkts[i]);
1766 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1767 buffer_tx_error_fn cbfn, void *userdata)
1769 buffer->error_callback = cbfn;
1770 buffer->error_userdata = userdata;
1775 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1782 buffer->size = size;
1783 if (buffer->error_callback == NULL) {
1784 ret = rte_eth_tx_buffer_set_err_callback(
1785 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1792 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1794 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1797 /* Validate Input Data. Bail if not valid or not supported. */
1798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1799 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1801 /* Call driver to free pending mbufs. */
1802 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1804 return eth_err(port_id, ret);
1808 rte_eth_promiscuous_enable(uint16_t port_id)
1810 struct rte_eth_dev *dev;
1812 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1813 dev = &rte_eth_devices[port_id];
1815 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1816 (*dev->dev_ops->promiscuous_enable)(dev);
1817 dev->data->promiscuous = 1;
1821 rte_eth_promiscuous_disable(uint16_t port_id)
1823 struct rte_eth_dev *dev;
1825 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1826 dev = &rte_eth_devices[port_id];
1828 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1829 dev->data->promiscuous = 0;
1830 (*dev->dev_ops->promiscuous_disable)(dev);
1834 rte_eth_promiscuous_get(uint16_t port_id)
1836 struct rte_eth_dev *dev;
1838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1840 dev = &rte_eth_devices[port_id];
1841 return dev->data->promiscuous;
1845 rte_eth_allmulticast_enable(uint16_t port_id)
1847 struct rte_eth_dev *dev;
1849 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1850 dev = &rte_eth_devices[port_id];
1852 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1853 (*dev->dev_ops->allmulticast_enable)(dev);
1854 dev->data->all_multicast = 1;
1858 rte_eth_allmulticast_disable(uint16_t port_id)
1860 struct rte_eth_dev *dev;
1862 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1863 dev = &rte_eth_devices[port_id];
1865 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1866 dev->data->all_multicast = 0;
1867 (*dev->dev_ops->allmulticast_disable)(dev);
1871 rte_eth_allmulticast_get(uint16_t port_id)
1873 struct rte_eth_dev *dev;
1875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1877 dev = &rte_eth_devices[port_id];
1878 return dev->data->all_multicast;
1882 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1884 struct rte_eth_dev *dev;
1886 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1887 dev = &rte_eth_devices[port_id];
1889 if (dev->data->dev_conf.intr_conf.lsc &&
1890 dev->data->dev_started)
1891 rte_eth_linkstatus_get(dev, eth_link);
1893 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1894 (*dev->dev_ops->link_update)(dev, 1);
1895 *eth_link = dev->data->dev_link;
1900 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1902 struct rte_eth_dev *dev;
1904 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1905 dev = &rte_eth_devices[port_id];
1907 if (dev->data->dev_conf.intr_conf.lsc &&
1908 dev->data->dev_started)
1909 rte_eth_linkstatus_get(dev, eth_link);
1911 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1912 (*dev->dev_ops->link_update)(dev, 0);
1913 *eth_link = dev->data->dev_link;
1918 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1920 struct rte_eth_dev *dev;
1922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1924 dev = &rte_eth_devices[port_id];
1925 memset(stats, 0, sizeof(*stats));
1927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1928 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1929 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1933 rte_eth_stats_reset(uint16_t port_id)
1935 struct rte_eth_dev *dev;
1937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1938 dev = &rte_eth_devices[port_id];
1940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1941 (*dev->dev_ops->stats_reset)(dev);
1942 dev->data->rx_mbuf_alloc_failed = 0;
1948 get_xstats_basic_count(struct rte_eth_dev *dev)
1950 uint16_t nb_rxqs, nb_txqs;
1953 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1954 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1956 count = RTE_NB_STATS;
1957 count += nb_rxqs * RTE_NB_RXQ_STATS;
1958 count += nb_txqs * RTE_NB_TXQ_STATS;
1964 get_xstats_count(uint16_t port_id)
1966 struct rte_eth_dev *dev;
1969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1970 dev = &rte_eth_devices[port_id];
1971 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1972 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1975 return eth_err(port_id, count);
1977 if (dev->dev_ops->xstats_get_names != NULL) {
1978 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1980 return eth_err(port_id, count);
1985 count += get_xstats_basic_count(dev);
1991 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1994 int cnt_xstats, idx_xstat;
1996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1999 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
2004 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
2009 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2010 if (cnt_xstats < 0) {
2011 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
2015 /* Get id-name lookup table */
2016 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2018 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2019 port_id, xstats_names, cnt_xstats, NULL)) {
2020 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
2024 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2025 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2034 /* retrieve basic stats names */
2036 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2037 struct rte_eth_xstat_name *xstats_names)
2039 int cnt_used_entries = 0;
2040 uint32_t idx, id_queue;
2043 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2044 snprintf(xstats_names[cnt_used_entries].name,
2045 sizeof(xstats_names[0].name),
2046 "%s", rte_stats_strings[idx].name);
2049 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2050 for (id_queue = 0; id_queue < num_q; id_queue++) {
2051 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2052 snprintf(xstats_names[cnt_used_entries].name,
2053 sizeof(xstats_names[0].name),
2055 id_queue, rte_rxq_stats_strings[idx].name);
2060 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2061 for (id_queue = 0; id_queue < num_q; id_queue++) {
2062 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2063 snprintf(xstats_names[cnt_used_entries].name,
2064 sizeof(xstats_names[0].name),
2066 id_queue, rte_txq_stats_strings[idx].name);
2070 return cnt_used_entries;
2073 /* retrieve ethdev extended statistics names */
2075 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2076 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2079 struct rte_eth_xstat_name *xstats_names_copy;
2080 unsigned int no_basic_stat_requested = 1;
2081 unsigned int no_ext_stat_requested = 1;
2082 unsigned int expected_entries;
2083 unsigned int basic_count;
2084 struct rte_eth_dev *dev;
2088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2089 dev = &rte_eth_devices[port_id];
2091 basic_count = get_xstats_basic_count(dev);
2092 ret = get_xstats_count(port_id);
2095 expected_entries = (unsigned int)ret;
2097 /* Return max number of stats if no ids given */
2100 return expected_entries;
2101 else if (xstats_names && size < expected_entries)
2102 return expected_entries;
2105 if (ids && !xstats_names)
2108 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2109 uint64_t ids_copy[size];
2111 for (i = 0; i < size; i++) {
2112 if (ids[i] < basic_count) {
2113 no_basic_stat_requested = 0;
2118 * Convert ids to xstats ids that PMD knows.
2119 * ids known by user are basic + extended stats.
2121 ids_copy[i] = ids[i] - basic_count;
2124 if (no_basic_stat_requested)
2125 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2126 xstats_names, ids_copy, size);
2129 /* Retrieve all stats */
2131 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2133 if (num_stats < 0 || num_stats > (int)expected_entries)
2136 return expected_entries;
2139 xstats_names_copy = calloc(expected_entries,
2140 sizeof(struct rte_eth_xstat_name));
2142 if (!xstats_names_copy) {
2143 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2148 for (i = 0; i < size; i++) {
2149 if (ids[i] >= basic_count) {
2150 no_ext_stat_requested = 0;
2156 /* Fill xstats_names_copy structure */
2157 if (ids && no_ext_stat_requested) {
2158 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2160 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2163 free(xstats_names_copy);
2169 for (i = 0; i < size; i++) {
2170 if (ids[i] >= expected_entries) {
2171 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2172 free(xstats_names_copy);
2175 xstats_names[i] = xstats_names_copy[ids[i]];
2178 free(xstats_names_copy);
2183 rte_eth_xstats_get_names(uint16_t port_id,
2184 struct rte_eth_xstat_name *xstats_names,
2187 struct rte_eth_dev *dev;
2188 int cnt_used_entries;
2189 int cnt_expected_entries;
2190 int cnt_driver_entries;
2192 cnt_expected_entries = get_xstats_count(port_id);
2193 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2194 (int)size < cnt_expected_entries)
2195 return cnt_expected_entries;
2197 /* port_id checked in get_xstats_count() */
2198 dev = &rte_eth_devices[port_id];
2200 cnt_used_entries = rte_eth_basic_stats_get_names(
2203 if (dev->dev_ops->xstats_get_names != NULL) {
2204 /* If there are any driver-specific xstats, append them
2207 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2209 xstats_names + cnt_used_entries,
2210 size - cnt_used_entries);
2211 if (cnt_driver_entries < 0)
2212 return eth_err(port_id, cnt_driver_entries);
2213 cnt_used_entries += cnt_driver_entries;
2216 return cnt_used_entries;
2221 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2223 struct rte_eth_dev *dev;
2224 struct rte_eth_stats eth_stats;
2225 unsigned int count = 0, i, q;
2226 uint64_t val, *stats_ptr;
2227 uint16_t nb_rxqs, nb_txqs;
2230 ret = rte_eth_stats_get(port_id, ð_stats);
2234 dev = &rte_eth_devices[port_id];
2236 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2237 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2240 for (i = 0; i < RTE_NB_STATS; i++) {
2241 stats_ptr = RTE_PTR_ADD(ð_stats,
2242 rte_stats_strings[i].offset);
2244 xstats[count++].value = val;
2248 for (q = 0; q < nb_rxqs; q++) {
2249 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2250 stats_ptr = RTE_PTR_ADD(ð_stats,
2251 rte_rxq_stats_strings[i].offset +
2252 q * sizeof(uint64_t));
2254 xstats[count++].value = val;
2259 for (q = 0; q < nb_txqs; q++) {
2260 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2261 stats_ptr = RTE_PTR_ADD(ð_stats,
2262 rte_txq_stats_strings[i].offset +
2263 q * sizeof(uint64_t));
2265 xstats[count++].value = val;
2271 /* retrieve ethdev extended statistics */
2273 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2274 uint64_t *values, unsigned int size)
2276 unsigned int no_basic_stat_requested = 1;
2277 unsigned int no_ext_stat_requested = 1;
2278 unsigned int num_xstats_filled;
2279 unsigned int basic_count;
2280 uint16_t expected_entries;
2281 struct rte_eth_dev *dev;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 ret = get_xstats_count(port_id);
2289 expected_entries = (uint16_t)ret;
2290 struct rte_eth_xstat xstats[expected_entries];
2291 dev = &rte_eth_devices[port_id];
2292 basic_count = get_xstats_basic_count(dev);
2294 /* Return max number of stats if no ids given */
2297 return expected_entries;
2298 else if (values && size < expected_entries)
2299 return expected_entries;
2305 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2306 unsigned int basic_count = get_xstats_basic_count(dev);
2307 uint64_t ids_copy[size];
2309 for (i = 0; i < size; i++) {
2310 if (ids[i] < basic_count) {
2311 no_basic_stat_requested = 0;
2316 * Convert ids to xstats ids that PMD knows.
2317 * ids known by user are basic + extended stats.
2319 ids_copy[i] = ids[i] - basic_count;
2322 if (no_basic_stat_requested)
2323 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2328 for (i = 0; i < size; i++) {
2329 if (ids[i] >= basic_count) {
2330 no_ext_stat_requested = 0;
2336 /* Fill the xstats structure */
2337 if (ids && no_ext_stat_requested)
2338 ret = rte_eth_basic_stats_get(port_id, xstats);
2340 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2344 num_xstats_filled = (unsigned int)ret;
2346 /* Return all stats */
2348 for (i = 0; i < num_xstats_filled; i++)
2349 values[i] = xstats[i].value;
2350 return expected_entries;
2354 for (i = 0; i < size; i++) {
2355 if (ids[i] >= expected_entries) {
2356 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2359 values[i] = xstats[ids[i]].value;
2365 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2368 struct rte_eth_dev *dev;
2369 unsigned int count = 0, i;
2370 signed int xcount = 0;
2371 uint16_t nb_rxqs, nb_txqs;
2374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2376 dev = &rte_eth_devices[port_id];
2378 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2379 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2381 /* Return generic statistics */
2382 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2383 (nb_txqs * RTE_NB_TXQ_STATS);
2385 /* implemented by the driver */
2386 if (dev->dev_ops->xstats_get != NULL) {
2387 /* Retrieve the xstats from the driver at the end of the
2390 xcount = (*dev->dev_ops->xstats_get)(dev,
2391 xstats ? xstats + count : NULL,
2392 (n > count) ? n - count : 0);
2395 return eth_err(port_id, xcount);
2398 if (n < count + xcount || xstats == NULL)
2399 return count + xcount;
2401 /* now fill the xstats structure */
2402 ret = rte_eth_basic_stats_get(port_id, xstats);
2407 for (i = 0; i < count; i++)
2409 /* add an offset to driver-specific stats */
2410 for ( ; i < count + xcount; i++)
2411 xstats[i].id += count;
2413 return count + xcount;
2416 /* reset ethdev extended statistics */
2418 rte_eth_xstats_reset(uint16_t port_id)
2420 struct rte_eth_dev *dev;
2422 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2423 dev = &rte_eth_devices[port_id];
2425 /* implemented by the driver */
2426 if (dev->dev_ops->xstats_reset != NULL) {
2427 (*dev->dev_ops->xstats_reset)(dev);
2431 /* fallback to default */
2432 rte_eth_stats_reset(port_id);
2436 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2439 struct rte_eth_dev *dev;
2441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2443 dev = &rte_eth_devices[port_id];
2445 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2446 return (*dev->dev_ops->queue_stats_mapping_set)
2447 (dev, queue_id, stat_idx, is_rx);
2452 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2455 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2456 stat_idx, STAT_QMAP_TX));
2461 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2464 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2465 stat_idx, STAT_QMAP_RX));
2469 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2471 struct rte_eth_dev *dev;
2473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474 dev = &rte_eth_devices[port_id];
2476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2477 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2478 fw_version, fw_size));
2482 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2484 struct rte_eth_dev *dev;
2485 struct rte_eth_txconf *txconf;
2486 const struct rte_eth_desc_lim lim = {
2487 .nb_max = UINT16_MAX,
2492 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2493 dev = &rte_eth_devices[port_id];
2495 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2496 dev_info->rx_desc_lim = lim;
2497 dev_info->tx_desc_lim = lim;
2498 dev_info->device = dev->device;
2500 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2501 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2502 dev_info->driver_name = dev->device->driver->name;
2503 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2504 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2506 dev_info->dev_flags = &dev->data->dev_flags;
2507 txconf = &dev_info->default_txconf;
2508 /* convert offload to txq_flags to support legacy app */
2509 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2513 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2514 uint32_t *ptypes, int num)
2517 struct rte_eth_dev *dev;
2518 const uint32_t *all_ptypes;
2520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2521 dev = &rte_eth_devices[port_id];
2522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2523 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2528 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2529 if (all_ptypes[i] & ptype_mask) {
2531 ptypes[j] = all_ptypes[i];
2539 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2541 struct rte_eth_dev *dev;
2543 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2544 dev = &rte_eth_devices[port_id];
2545 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2550 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2552 struct rte_eth_dev *dev;
2554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2556 dev = &rte_eth_devices[port_id];
2557 *mtu = dev->data->mtu;
2562 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2565 struct rte_eth_dev *dev;
2567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2568 dev = &rte_eth_devices[port_id];
2569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2571 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2573 dev->data->mtu = mtu;
2575 return eth_err(port_id, ret);
2579 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2581 struct rte_eth_dev *dev;
2584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2585 dev = &rte_eth_devices[port_id];
2586 if (!(dev->data->dev_conf.rxmode.offloads &
2587 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2588 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2592 if (vlan_id > 4095) {
2593 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2594 port_id, (unsigned) vlan_id);
2597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2599 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2601 struct rte_vlan_filter_conf *vfc;
2605 vfc = &dev->data->vlan_filter_conf;
2606 vidx = vlan_id / 64;
2607 vbit = vlan_id % 64;
2610 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2612 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2615 return eth_err(port_id, ret);
2619 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2622 struct rte_eth_dev *dev;
2624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2625 dev = &rte_eth_devices[port_id];
2626 if (rx_queue_id >= dev->data->nb_rx_queues) {
2627 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2632 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2638 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2639 enum rte_vlan_type vlan_type,
2642 struct rte_eth_dev *dev;
2644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2645 dev = &rte_eth_devices[port_id];
2646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2648 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2653 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2655 struct rte_eth_dev *dev;
2659 uint64_t orig_offloads;
2661 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2662 dev = &rte_eth_devices[port_id];
2664 /* save original values in case of failure */
2665 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2667 /*check which option changed by application*/
2668 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2669 org = !!(dev->data->dev_conf.rxmode.offloads &
2670 DEV_RX_OFFLOAD_VLAN_STRIP);
2673 dev->data->dev_conf.rxmode.offloads |=
2674 DEV_RX_OFFLOAD_VLAN_STRIP;
2676 dev->data->dev_conf.rxmode.offloads &=
2677 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2678 mask |= ETH_VLAN_STRIP_MASK;
2681 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2682 org = !!(dev->data->dev_conf.rxmode.offloads &
2683 DEV_RX_OFFLOAD_VLAN_FILTER);
2686 dev->data->dev_conf.rxmode.offloads |=
2687 DEV_RX_OFFLOAD_VLAN_FILTER;
2689 dev->data->dev_conf.rxmode.offloads &=
2690 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2691 mask |= ETH_VLAN_FILTER_MASK;
2694 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2695 org = !!(dev->data->dev_conf.rxmode.offloads &
2696 DEV_RX_OFFLOAD_VLAN_EXTEND);
2699 dev->data->dev_conf.rxmode.offloads |=
2700 DEV_RX_OFFLOAD_VLAN_EXTEND;
2702 dev->data->dev_conf.rxmode.offloads &=
2703 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2704 mask |= ETH_VLAN_EXTEND_MASK;
2711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2712 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2714 /* hit an error restore original values */
2715 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2718 return eth_err(port_id, ret);
2722 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2724 struct rte_eth_dev *dev;
2727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2728 dev = &rte_eth_devices[port_id];
2730 if (dev->data->dev_conf.rxmode.offloads &
2731 DEV_RX_OFFLOAD_VLAN_STRIP)
2732 ret |= ETH_VLAN_STRIP_OFFLOAD;
2734 if (dev->data->dev_conf.rxmode.offloads &
2735 DEV_RX_OFFLOAD_VLAN_FILTER)
2736 ret |= ETH_VLAN_FILTER_OFFLOAD;
2738 if (dev->data->dev_conf.rxmode.offloads &
2739 DEV_RX_OFFLOAD_VLAN_EXTEND)
2740 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2746 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2751 dev = &rte_eth_devices[port_id];
2752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2754 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2758 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2760 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 dev = &rte_eth_devices[port_id];
2764 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2765 memset(fc_conf, 0, sizeof(*fc_conf));
2766 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2770 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2772 struct rte_eth_dev *dev;
2774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2776 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2780 dev = &rte_eth_devices[port_id];
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2782 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2786 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2787 struct rte_eth_pfc_conf *pfc_conf)
2789 struct rte_eth_dev *dev;
2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2792 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2793 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2797 dev = &rte_eth_devices[port_id];
2798 /* High water, low water validation are device specific */
2799 if (*dev->dev_ops->priority_flow_ctrl_set)
2800 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2806 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2814 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2815 for (i = 0; i < num; i++) {
2816 if (reta_conf[i].mask)
2824 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2828 uint16_t i, idx, shift;
2834 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2838 for (i = 0; i < reta_size; i++) {
2839 idx = i / RTE_RETA_GROUP_SIZE;
2840 shift = i % RTE_RETA_GROUP_SIZE;
2841 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2842 (reta_conf[idx].reta[shift] >= max_rxq)) {
2843 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2844 "the maximum rxq index: %u\n", idx, shift,
2845 reta_conf[idx].reta[shift], max_rxq);
2854 rte_eth_dev_rss_reta_update(uint16_t port_id,
2855 struct rte_eth_rss_reta_entry64 *reta_conf,
2858 struct rte_eth_dev *dev;
2861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2862 /* Check mask bits */
2863 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2867 dev = &rte_eth_devices[port_id];
2869 /* Check entry value */
2870 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2871 dev->data->nb_rx_queues);
2875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2876 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2881 rte_eth_dev_rss_reta_query(uint16_t port_id,
2882 struct rte_eth_rss_reta_entry64 *reta_conf,
2885 struct rte_eth_dev *dev;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2890 /* Check mask bits */
2891 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2895 dev = &rte_eth_devices[port_id];
2896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2897 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2902 rte_eth_dev_rss_hash_update(uint16_t port_id,
2903 struct rte_eth_rss_conf *rss_conf)
2905 struct rte_eth_dev *dev;
2906 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2909 dev = &rte_eth_devices[port_id];
2910 rte_eth_dev_info_get(port_id, &dev_info);
2911 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2912 dev_info.flow_type_rss_offloads) {
2913 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2914 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2917 dev_info.flow_type_rss_offloads);
2919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2920 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2925 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2926 struct rte_eth_rss_conf *rss_conf)
2928 struct rte_eth_dev *dev;
2930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2931 dev = &rte_eth_devices[port_id];
2932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2933 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2938 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2939 struct rte_eth_udp_tunnel *udp_tunnel)
2941 struct rte_eth_dev *dev;
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 if (udp_tunnel == NULL) {
2945 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2949 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2950 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2954 dev = &rte_eth_devices[port_id];
2955 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2956 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2961 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2962 struct rte_eth_udp_tunnel *udp_tunnel)
2964 struct rte_eth_dev *dev;
2966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2967 dev = &rte_eth_devices[port_id];
2969 if (udp_tunnel == NULL) {
2970 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2974 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2975 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2980 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2985 rte_eth_led_on(uint16_t port_id)
2987 struct rte_eth_dev *dev;
2989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2990 dev = &rte_eth_devices[port_id];
2991 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2992 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2996 rte_eth_led_off(uint16_t port_id)
2998 struct rte_eth_dev *dev;
3000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3001 dev = &rte_eth_devices[port_id];
3002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3003 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3007 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3011 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3013 struct rte_eth_dev_info dev_info;
3014 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3018 rte_eth_dev_info_get(port_id, &dev_info);
3020 for (i = 0; i < dev_info.max_mac_addrs; i++)
3021 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3027 static const struct ether_addr null_mac_addr;
3030 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3033 struct rte_eth_dev *dev;
3038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3039 dev = &rte_eth_devices[port_id];
3040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3042 if (is_zero_ether_addr(addr)) {
3043 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3047 if (pool >= ETH_64_POOLS) {
3048 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
3052 index = get_mac_addr_index(port_id, addr);
3054 index = get_mac_addr_index(port_id, &null_mac_addr);
3056 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3061 pool_mask = dev->data->mac_pool_sel[index];
3063 /* Check if both MAC address and pool is already there, and do nothing */
3064 if (pool_mask & (1ULL << pool))
3069 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3072 /* Update address in NIC data structure */
3073 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3075 /* Update pool bitmap in NIC data structure */
3076 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3079 return eth_err(port_id, ret);
3083 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3085 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3089 dev = &rte_eth_devices[port_id];
3090 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3092 index = get_mac_addr_index(port_id, addr);
3094 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3096 } else if (index < 0)
3097 return 0; /* Do nothing if address wasn't found */
3100 (*dev->dev_ops->mac_addr_remove)(dev, index);
3102 /* Update address in NIC data structure */
3103 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3105 /* reset pool bitmap */
3106 dev->data->mac_pool_sel[index] = 0;
3112 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3114 struct rte_eth_dev *dev;
3117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 if (!is_valid_assigned_ether_addr(addr))
3122 dev = &rte_eth_devices[port_id];
3123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3125 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3129 /* Update default address in NIC data structure */
3130 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3137 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3141 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3143 struct rte_eth_dev_info dev_info;
3144 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3147 rte_eth_dev_info_get(port_id, &dev_info);
3148 if (!dev->data->hash_mac_addrs)
3151 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3152 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3153 ETHER_ADDR_LEN) == 0)
3160 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3165 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3169 dev = &rte_eth_devices[port_id];
3170 if (is_zero_ether_addr(addr)) {
3171 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3176 index = get_hash_mac_addr_index(port_id, addr);
3177 /* Check if it's already there, and do nothing */
3178 if ((index >= 0) && on)
3183 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3184 "set in UTA\n", port_id);
3188 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3190 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3197 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3199 /* Update address in NIC data structure */
3201 ether_addr_copy(addr,
3202 &dev->data->hash_mac_addrs[index]);
3204 ether_addr_copy(&null_mac_addr,
3205 &dev->data->hash_mac_addrs[index]);
3208 return eth_err(port_id, ret);
3212 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3214 struct rte_eth_dev *dev;
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3218 dev = &rte_eth_devices[port_id];
3220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3221 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3225 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3228 struct rte_eth_dev *dev;
3229 struct rte_eth_dev_info dev_info;
3230 struct rte_eth_link link;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3234 dev = &rte_eth_devices[port_id];
3235 rte_eth_dev_info_get(port_id, &dev_info);
3236 link = dev->data->dev_link;
3238 if (queue_idx > dev_info.max_tx_queues) {
3239 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3240 "invalid queue id=%d\n", port_id, queue_idx);
3244 if (tx_rate > link.link_speed) {
3245 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3246 "bigger than link speed= %d\n",
3247 tx_rate, link.link_speed);
3251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3252 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3253 queue_idx, tx_rate));
3257 rte_eth_mirror_rule_set(uint16_t port_id,
3258 struct rte_eth_mirror_conf *mirror_conf,
3259 uint8_t rule_id, uint8_t on)
3261 struct rte_eth_dev *dev;
3263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3264 if (mirror_conf->rule_type == 0) {
3265 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3269 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3270 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3275 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3276 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3277 (mirror_conf->pool_mask == 0)) {
3278 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3282 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3283 mirror_conf->vlan.vlan_mask == 0) {
3284 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3288 dev = &rte_eth_devices[port_id];
3289 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3291 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3292 mirror_conf, rule_id, on));
3296 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3298 struct rte_eth_dev *dev;
3300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3302 dev = &rte_eth_devices[port_id];
3303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3305 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3309 RTE_INIT(eth_dev_init_cb_lists)
3313 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3314 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3318 rte_eth_dev_callback_register(uint16_t port_id,
3319 enum rte_eth_event_type event,
3320 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3322 struct rte_eth_dev *dev;
3323 struct rte_eth_dev_callback *user_cb;
3324 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3330 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3331 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3335 if (port_id == RTE_ETH_ALL) {
3337 last_port = RTE_MAX_ETHPORTS - 1;
3339 next_port = last_port = port_id;
3342 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3345 dev = &rte_eth_devices[next_port];
3347 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3348 if (user_cb->cb_fn == cb_fn &&
3349 user_cb->cb_arg == cb_arg &&
3350 user_cb->event == event) {
3355 /* create a new callback. */
3356 if (user_cb == NULL) {
3357 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3358 sizeof(struct rte_eth_dev_callback), 0);
3359 if (user_cb != NULL) {
3360 user_cb->cb_fn = cb_fn;
3361 user_cb->cb_arg = cb_arg;
3362 user_cb->event = event;
3363 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3366 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3367 rte_eth_dev_callback_unregister(port_id, event,
3373 } while (++next_port <= last_port);
3375 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3380 rte_eth_dev_callback_unregister(uint16_t port_id,
3381 enum rte_eth_event_type event,
3382 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3385 struct rte_eth_dev *dev;
3386 struct rte_eth_dev_callback *cb, *next;
3387 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3393 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3394 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3398 if (port_id == RTE_ETH_ALL) {
3400 last_port = RTE_MAX_ETHPORTS - 1;
3402 next_port = last_port = port_id;
3405 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3408 dev = &rte_eth_devices[next_port];
3410 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3413 next = TAILQ_NEXT(cb, next);
3415 if (cb->cb_fn != cb_fn || cb->event != event ||
3416 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3420 * if this callback is not executing right now,
3423 if (cb->active == 0) {
3424 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3430 } while (++next_port <= last_port);
3432 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3437 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3438 enum rte_eth_event_type event, void *ret_param)
3440 struct rte_eth_dev_callback *cb_lst;
3441 struct rte_eth_dev_callback dev_cb;
3444 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3445 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3446 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3450 if (ret_param != NULL)
3451 dev_cb.ret_param = ret_param;
3453 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3454 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3455 dev_cb.cb_arg, dev_cb.ret_param);
3456 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3459 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3464 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3471 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3474 struct rte_eth_dev *dev;
3475 struct rte_intr_handle *intr_handle;
3479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3481 dev = &rte_eth_devices[port_id];
3483 if (!dev->intr_handle) {
3484 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3488 intr_handle = dev->intr_handle;
3489 if (!intr_handle->intr_vec) {
3490 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3494 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3495 vec = intr_handle->intr_vec[qid];
3496 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3497 if (rc && rc != -EEXIST) {
3498 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3499 " op %d epfd %d vec %u\n",
3500 port_id, qid, op, epfd, vec);
3507 const struct rte_memzone *
3508 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3509 uint16_t queue_id, size_t size, unsigned align,
3512 char z_name[RTE_MEMZONE_NAMESIZE];
3513 const struct rte_memzone *mz;
3515 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3516 dev->device->driver->name, ring_name,
3517 dev->data->port_id, queue_id);
3519 mz = rte_memzone_lookup(z_name);
3523 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3524 RTE_MEMZONE_IOVA_CONTIG, align);
3527 int __rte_experimental
3528 rte_eth_dev_create(struct rte_device *device, const char *name,
3529 size_t priv_data_size,
3530 ethdev_bus_specific_init ethdev_bus_specific_init,
3531 void *bus_init_params,
3532 ethdev_init_t ethdev_init, void *init_params)
3534 struct rte_eth_dev *ethdev;
3537 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3539 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3540 ethdev = rte_eth_dev_allocate(name);
3546 if (priv_data_size) {
3547 ethdev->data->dev_private = rte_zmalloc_socket(
3548 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3551 if (!ethdev->data->dev_private) {
3552 RTE_LOG(ERR, EAL, "failed to allocate private data");
3558 ethdev = rte_eth_dev_attach_secondary(name);
3560 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3561 "ethdev doesn't exist");
3567 ethdev->device = device;
3569 if (ethdev_bus_specific_init) {
3570 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3573 "ethdev bus specific initialisation failed");
3578 retval = ethdev_init(ethdev, init_params);
3580 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3584 rte_eth_dev_probing_finish(ethdev);
3588 /* free ports private data if primary process */
3589 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3590 rte_free(ethdev->data->dev_private);
3592 rte_eth_dev_release_port(ethdev);
3597 int __rte_experimental
3598 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3599 ethdev_uninit_t ethdev_uninit)
3603 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3607 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3608 if (ethdev_uninit) {
3609 ret = ethdev_uninit(ethdev);
3614 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3615 rte_free(ethdev->data->dev_private);
3617 ethdev->data->dev_private = NULL;
3619 return rte_eth_dev_release_port(ethdev);
3623 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3624 int epfd, int op, void *data)
3627 struct rte_eth_dev *dev;
3628 struct rte_intr_handle *intr_handle;
3631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3633 dev = &rte_eth_devices[port_id];
3634 if (queue_id >= dev->data->nb_rx_queues) {
3635 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3639 if (!dev->intr_handle) {
3640 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3644 intr_handle = dev->intr_handle;
3645 if (!intr_handle->intr_vec) {
3646 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3650 vec = intr_handle->intr_vec[queue_id];
3651 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3652 if (rc && rc != -EEXIST) {
3653 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3654 " op %d epfd %d vec %u\n",
3655 port_id, queue_id, op, epfd, vec);
3663 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3666 struct rte_eth_dev *dev;
3668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3670 dev = &rte_eth_devices[port_id];
3672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3673 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3678 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3681 struct rte_eth_dev *dev;
3683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3685 dev = &rte_eth_devices[port_id];
3687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3688 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3694 rte_eth_dev_filter_supported(uint16_t port_id,
3695 enum rte_filter_type filter_type)
3697 struct rte_eth_dev *dev;
3699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3701 dev = &rte_eth_devices[port_id];
3702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3703 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3704 RTE_ETH_FILTER_NOP, NULL);
3708 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3709 enum rte_filter_op filter_op, void *arg)
3711 struct rte_eth_dev *dev;
3713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3715 dev = &rte_eth_devices[port_id];
3716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3717 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3721 const struct rte_eth_rxtx_callback *
3722 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3723 rte_rx_callback_fn fn, void *user_param)
3725 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3726 rte_errno = ENOTSUP;
3729 /* check input parameters */
3730 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3731 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3735 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3743 cb->param = user_param;
3745 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3746 /* Add the callbacks in fifo order. */
3747 struct rte_eth_rxtx_callback *tail =
3748 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3751 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3758 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3763 const struct rte_eth_rxtx_callback *
3764 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3765 rte_rx_callback_fn fn, void *user_param)
3767 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3768 rte_errno = ENOTSUP;
3771 /* check input parameters */
3772 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3773 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3778 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3786 cb->param = user_param;
3788 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3789 /* Add the callbacks at fisrt position*/
3790 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3792 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3793 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3798 const struct rte_eth_rxtx_callback *
3799 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3800 rte_tx_callback_fn fn, void *user_param)
3802 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3803 rte_errno = ENOTSUP;
3806 /* check input parameters */
3807 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3808 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3813 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3821 cb->param = user_param;
3823 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3824 /* Add the callbacks in fifo order. */
3825 struct rte_eth_rxtx_callback *tail =
3826 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3829 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3836 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3842 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3843 const struct rte_eth_rxtx_callback *user_cb)
3845 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3848 /* Check input parameters. */
3849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3850 if (user_cb == NULL ||
3851 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3854 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3855 struct rte_eth_rxtx_callback *cb;
3856 struct rte_eth_rxtx_callback **prev_cb;
3859 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3860 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3861 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3863 if (cb == user_cb) {
3864 /* Remove the user cb from the callback list. */
3865 *prev_cb = cb->next;
3870 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3876 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3877 const struct rte_eth_rxtx_callback *user_cb)
3879 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3882 /* Check input parameters. */
3883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3884 if (user_cb == NULL ||
3885 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3888 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3890 struct rte_eth_rxtx_callback *cb;
3891 struct rte_eth_rxtx_callback **prev_cb;
3893 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3894 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3895 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3897 if (cb == user_cb) {
3898 /* Remove the user cb from the callback list. */
3899 *prev_cb = cb->next;
3904 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3910 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3911 struct rte_eth_rxq_info *qinfo)
3913 struct rte_eth_dev *dev;
3915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3920 dev = &rte_eth_devices[port_id];
3921 if (queue_id >= dev->data->nb_rx_queues) {
3922 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3928 memset(qinfo, 0, sizeof(*qinfo));
3929 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3934 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3935 struct rte_eth_txq_info *qinfo)
3937 struct rte_eth_dev *dev;
3938 struct rte_eth_txconf *txconf = &qinfo->conf;
3940 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3945 dev = &rte_eth_devices[port_id];
3946 if (queue_id >= dev->data->nb_tx_queues) {
3947 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3953 memset(qinfo, 0, sizeof(*qinfo));
3954 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3955 /* convert offload to txq_flags to support legacy app */
3956 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3962 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3963 struct ether_addr *mc_addr_set,
3964 uint32_t nb_mc_addr)
3966 struct rte_eth_dev *dev;
3968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3970 dev = &rte_eth_devices[port_id];
3971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3972 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3973 mc_addr_set, nb_mc_addr));
3977 rte_eth_timesync_enable(uint16_t port_id)
3979 struct rte_eth_dev *dev;
3981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 dev = &rte_eth_devices[port_id];
3984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3985 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3989 rte_eth_timesync_disable(uint16_t port_id)
3991 struct rte_eth_dev *dev;
3993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3994 dev = &rte_eth_devices[port_id];
3996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3997 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4001 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4004 struct rte_eth_dev *dev;
4006 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4007 dev = &rte_eth_devices[port_id];
4009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4010 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4011 (dev, timestamp, flags));
4015 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4016 struct timespec *timestamp)
4018 struct rte_eth_dev *dev;
4020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4021 dev = &rte_eth_devices[port_id];
4023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4024 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4029 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4031 struct rte_eth_dev *dev;
4033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4034 dev = &rte_eth_devices[port_id];
4036 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4037 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4042 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4044 struct rte_eth_dev *dev;
4046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4047 dev = &rte_eth_devices[port_id];
4049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4050 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4055 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4057 struct rte_eth_dev *dev;
4059 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4060 dev = &rte_eth_devices[port_id];
4062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4063 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4068 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4070 struct rte_eth_dev *dev;
4072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4074 dev = &rte_eth_devices[port_id];
4075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4076 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4080 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4082 struct rte_eth_dev *dev;
4084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4086 dev = &rte_eth_devices[port_id];
4087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4088 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4092 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4098 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4100 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4104 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4106 struct rte_eth_dev *dev;
4108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4110 dev = &rte_eth_devices[port_id];
4111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4112 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4115 int __rte_experimental
4116 rte_eth_dev_get_module_info(uint16_t port_id,
4117 struct rte_eth_dev_module_info *modinfo)
4119 struct rte_eth_dev *dev;
4121 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4123 dev = &rte_eth_devices[port_id];
4124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4125 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4128 int __rte_experimental
4129 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4130 struct rte_dev_eeprom_info *info)
4132 struct rte_eth_dev *dev;
4134 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4136 dev = &rte_eth_devices[port_id];
4137 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4138 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4142 rte_eth_dev_get_dcb_info(uint16_t port_id,
4143 struct rte_eth_dcb_info *dcb_info)
4145 struct rte_eth_dev *dev;
4147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4149 dev = &rte_eth_devices[port_id];
4150 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4153 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4157 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4158 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4160 struct rte_eth_dev *dev;
4162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4163 if (l2_tunnel == NULL) {
4164 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4168 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4169 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4173 dev = &rte_eth_devices[port_id];
4174 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4176 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4181 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4182 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4186 struct rte_eth_dev *dev;
4188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4190 if (l2_tunnel == NULL) {
4191 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4195 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4196 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4201 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4205 dev = &rte_eth_devices[port_id];
4206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4208 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4209 l2_tunnel, mask, en));
4213 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4214 const struct rte_eth_desc_lim *desc_lim)
4216 if (desc_lim->nb_align != 0)
4217 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4219 if (desc_lim->nb_max != 0)
4220 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4222 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4226 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4227 uint16_t *nb_rx_desc,
4228 uint16_t *nb_tx_desc)
4230 struct rte_eth_dev *dev;
4231 struct rte_eth_dev_info dev_info;
4233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4235 dev = &rte_eth_devices[port_id];
4236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4238 rte_eth_dev_info_get(port_id, &dev_info);
4240 if (nb_rx_desc != NULL)
4241 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4243 if (nb_tx_desc != NULL)
4244 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4250 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4252 struct rte_eth_dev *dev;
4254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4259 dev = &rte_eth_devices[port_id];
4261 if (*dev->dev_ops->pool_ops_supported == NULL)
4262 return 1; /* all pools are supported */
4264 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4268 * A set of values to describe the possible states of a switch domain.
4270 enum rte_eth_switch_domain_state {
4271 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4272 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4276 * Array of switch domains available for allocation. Array is sized to
4277 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4278 * ethdev ports in a single process.
4280 struct rte_eth_dev_switch {
4281 enum rte_eth_switch_domain_state state;
4282 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4284 int __rte_experimental
4285 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4289 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4291 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4292 i < RTE_MAX_ETHPORTS; i++) {
4293 if (rte_eth_switch_domains[i].state ==
4294 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4295 rte_eth_switch_domains[i].state =
4296 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4305 int __rte_experimental
4306 rte_eth_switch_domain_free(uint16_t domain_id)
4308 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4309 domain_id >= RTE_MAX_ETHPORTS)
4312 if (rte_eth_switch_domains[domain_id].state !=
4313 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4316 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4321 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4324 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4327 struct rte_kvargs_pair *pair;
4330 arglist->str = strdup(str_in);
4331 if (arglist->str == NULL)
4334 letter = arglist->str;
4337 pair = &arglist->pairs[0];
4340 case 0: /* Initial */
4343 else if (*letter == '\0')
4350 case 1: /* Parsing key */
4351 if (*letter == '=') {
4353 pair->value = letter + 1;
4355 } else if (*letter == ',' || *letter == '\0')
4360 case 2: /* Parsing value */
4363 else if (*letter == ',') {
4366 pair = &arglist->pairs[arglist->count];
4368 } else if (*letter == '\0') {
4371 pair = &arglist->pairs[arglist->count];
4376 case 3: /* Parsing list */
4379 else if (*letter == '\0')
4388 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4396 /* Single element, not a list */
4397 return callback(str, data);
4399 /* Sanity check, then strip the brackets */
4400 str_start = &str[strlen(str) - 1];
4401 if (*str_start != ']') {
4402 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4408 /* Process list elements */
4418 } else if (state == 1) {
4419 if (*str == ',' || *str == '\0') {
4420 if (str > str_start) {
4421 /* Non-empty string fragment */
4423 result = callback(str_start, data);
4436 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4437 const uint16_t max_list)
4439 uint16_t lo, hi, val;
4442 result = sscanf(str, "%hu-%hu", &lo, &hi);
4444 if (*len_list >= max_list)
4446 list[(*len_list)++] = lo;
4447 } else if (result == 2) {
4448 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4450 for (val = lo; val <= hi; val++) {
4451 if (*len_list >= max_list)
4453 list[(*len_list)++] = val;
4462 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4464 struct rte_eth_devargs *eth_da = data;
4466 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4467 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4470 int __rte_experimental
4471 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4473 struct rte_kvargs args;
4474 struct rte_kvargs_pair *pair;
4478 memset(eth_da, 0, sizeof(*eth_da));
4480 result = rte_eth_devargs_tokenise(&args, dargs);
4484 for (i = 0; i < args.count; i++) {
4485 pair = &args.pairs[i];
4486 if (strcmp("representor", pair->key) == 0) {
4487 result = rte_eth_devargs_parse_list(pair->value,
4488 rte_eth_devargs_parse_representor_ports,
4502 RTE_INIT(ethdev_init_log);
4504 ethdev_init_log(void)
4506 ethdev_logtype = rte_log_register("lib.ethdev");
4507 if (ethdev_logtype >= 0)
4508 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);