1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 is_allocated(const struct rte_eth_dev *ethdev)
232 return ethdev->data->name[0] != '\0';
235 static struct rte_eth_dev *
236 _rte_eth_dev_allocated(const char *name)
240 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
241 if (rte_eth_devices[i].data != NULL &&
242 strcmp(rte_eth_devices[i].data->name, name) == 0)
243 return &rte_eth_devices[i];
249 rte_eth_dev_allocated(const char *name)
251 struct rte_eth_dev *ethdev;
253 rte_eth_dev_shared_data_prepare();
255 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
257 ethdev = _rte_eth_dev_allocated(name);
259 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
265 rte_eth_dev_find_free_port(void)
269 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
270 /* Using shared name field to find a free port. */
271 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
272 RTE_ASSERT(rte_eth_devices[i].state ==
277 return RTE_MAX_ETHPORTS;
280 static struct rte_eth_dev *
281 eth_dev_get(uint16_t port_id)
283 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
285 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
287 eth_dev_last_created_port = port_id;
293 rte_eth_dev_allocate(const char *name)
296 struct rte_eth_dev *eth_dev = NULL;
298 rte_eth_dev_shared_data_prepare();
300 /* Synchronize port creation between primary and secondary threads. */
301 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
303 if (_rte_eth_dev_allocated(name) != NULL) {
305 "Ethernet device with name %s already allocated\n",
310 port_id = rte_eth_dev_find_free_port();
311 if (port_id == RTE_MAX_ETHPORTS) {
313 "Reached maximum number of Ethernet ports\n");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "Device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
371 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
373 eth_dev->state = RTE_ETH_DEV_UNUSED;
375 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
377 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
397 RTE_ETHDEV_LOG(ERR, "Invalid owner_id=%016"PRIx64"\n",
405 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
407 while (port_id < RTE_MAX_ETHPORTS &&
408 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
409 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
410 rte_eth_devices[port_id].data->owner.id != owner_id))
413 if (port_id >= RTE_MAX_ETHPORTS)
414 return RTE_MAX_ETHPORTS;
419 int __rte_experimental
420 rte_eth_dev_owner_new(uint64_t *owner_id)
422 rte_eth_dev_shared_data_prepare();
424 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
426 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
428 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
433 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
434 const struct rte_eth_dev_owner *new_owner)
436 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
437 struct rte_eth_dev_owner *port_owner;
440 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
441 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
446 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
447 !rte_eth_is_valid_owner_id(old_owner_id))
450 port_owner = &rte_eth_devices[port_id].data->owner;
451 if (port_owner->id != old_owner_id) {
453 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
454 port_id, port_owner->name, port_owner->id);
458 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
460 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
461 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
464 port_owner->id = new_owner->id;
466 RTE_ETHDEV_LOG(ERR, "Port %u owner is %s_%016"PRIx64"\n",
467 port_id, new_owner->name, new_owner->id);
472 int __rte_experimental
473 rte_eth_dev_owner_set(const uint16_t port_id,
474 const struct rte_eth_dev_owner *owner)
478 rte_eth_dev_shared_data_prepare();
480 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
482 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
484 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
488 int __rte_experimental
489 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
491 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
492 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
495 rte_eth_dev_shared_data_prepare();
497 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
499 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
501 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
505 void __rte_experimental
506 rte_eth_dev_owner_delete(const uint64_t owner_id)
510 rte_eth_dev_shared_data_prepare();
512 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
514 if (rte_eth_is_valid_owner_id(owner_id)) {
515 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
516 if (rte_eth_devices[port_id].data->owner.id == owner_id)
517 memset(&rte_eth_devices[port_id].data->owner, 0,
518 sizeof(struct rte_eth_dev_owner));
520 "All port owners owned by %016"PRIx64" identifier have removed\n",
524 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
527 int __rte_experimental
528 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
531 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
533 rte_eth_dev_shared_data_prepare();
535 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
537 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
538 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
542 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
545 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
550 rte_eth_dev_socket_id(uint16_t port_id)
552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
553 return rte_eth_devices[port_id].data->numa_node;
557 rte_eth_dev_get_sec_ctx(uint16_t port_id)
559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
560 return rte_eth_devices[port_id].security_ctx;
564 rte_eth_dev_count(void)
566 return rte_eth_dev_count_avail();
570 rte_eth_dev_count_avail(void)
577 RTE_ETH_FOREACH_DEV(p)
583 uint16_t __rte_experimental
584 rte_eth_dev_count_total(void)
586 uint16_t port, count = 0;
588 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
589 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
596 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
603 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
607 /* shouldn't check 'rte_eth_devices[i].data',
608 * because it might be overwritten by VDEV PMD */
609 tmp = rte_eth_dev_shared_data->data[port_id].name;
615 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
620 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
624 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
625 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
626 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
636 eth_err(uint16_t port_id, int ret)
640 if (rte_eth_dev_is_removed(port_id))
645 /* attach the new device, then store port_id of the device */
647 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
649 int current = rte_eth_dev_count_total();
650 struct rte_devargs da;
653 memset(&da, 0, sizeof(da));
655 if ((devargs == NULL) || (port_id == NULL)) {
661 if (rte_devargs_parse(&da, "%s", devargs))
664 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
668 /* no point looking at the port count if no port exists */
669 if (!rte_eth_dev_count_total()) {
670 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
675 /* if nothing happened, there is a bug here, since some driver told us
676 * it did attach a device, but did not create a port.
677 * FIXME: race condition in case of plug-out of another device
679 if (current == rte_eth_dev_count_total()) {
684 *port_id = eth_dev_last_created_port;
692 /* detach the device, then store the name of the device */
694 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
696 struct rte_device *dev;
701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
703 dev_flags = rte_eth_devices[port_id].data->dev_flags;
704 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
706 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
710 dev = rte_eth_devices[port_id].device;
714 bus = rte_bus_find_by_device(dev);
718 ret = rte_eal_hotplug_remove(bus->name, dev->name);
722 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
727 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
729 uint16_t old_nb_queues = dev->data->nb_rx_queues;
733 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
734 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
735 sizeof(dev->data->rx_queues[0]) * nb_queues,
736 RTE_CACHE_LINE_SIZE);
737 if (dev->data->rx_queues == NULL) {
738 dev->data->nb_rx_queues = 0;
741 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
744 rxq = dev->data->rx_queues;
746 for (i = nb_queues; i < old_nb_queues; i++)
747 (*dev->dev_ops->rx_queue_release)(rxq[i]);
748 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
749 RTE_CACHE_LINE_SIZE);
752 if (nb_queues > old_nb_queues) {
753 uint16_t new_qs = nb_queues - old_nb_queues;
755 memset(rxq + old_nb_queues, 0,
756 sizeof(rxq[0]) * new_qs);
759 dev->data->rx_queues = rxq;
761 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
764 rxq = dev->data->rx_queues;
766 for (i = nb_queues; i < old_nb_queues; i++)
767 (*dev->dev_ops->rx_queue_release)(rxq[i]);
769 rte_free(dev->data->rx_queues);
770 dev->data->rx_queues = NULL;
772 dev->data->nb_rx_queues = nb_queues;
777 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
779 struct rte_eth_dev *dev;
781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
783 dev = &rte_eth_devices[port_id];
784 if (!dev->data->dev_started) {
786 "Port %u must be started before start any queue\n",
791 if (rx_queue_id >= dev->data->nb_rx_queues) {
792 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
798 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
800 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
801 rx_queue_id, port_id);
805 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
811 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
813 struct rte_eth_dev *dev;
815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
817 dev = &rte_eth_devices[port_id];
818 if (rx_queue_id >= dev->data->nb_rx_queues) {
819 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
825 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
827 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
828 rx_queue_id, port_id);
832 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
837 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
839 struct rte_eth_dev *dev;
841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
843 dev = &rte_eth_devices[port_id];
844 if (!dev->data->dev_started) {
846 "Port %u must be started before start any queue\n",
851 if (tx_queue_id >= dev->data->nb_tx_queues) {
852 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
858 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
860 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
861 tx_queue_id, port_id);
865 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
869 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
871 struct rte_eth_dev *dev;
873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
875 dev = &rte_eth_devices[port_id];
876 if (tx_queue_id >= dev->data->nb_tx_queues) {
877 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
883 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
885 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
886 tx_queue_id, port_id);
890 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
895 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
897 uint16_t old_nb_queues = dev->data->nb_tx_queues;
901 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
902 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
903 sizeof(dev->data->tx_queues[0]) * nb_queues,
904 RTE_CACHE_LINE_SIZE);
905 if (dev->data->tx_queues == NULL) {
906 dev->data->nb_tx_queues = 0;
909 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
912 txq = dev->data->tx_queues;
914 for (i = nb_queues; i < old_nb_queues; i++)
915 (*dev->dev_ops->tx_queue_release)(txq[i]);
916 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
917 RTE_CACHE_LINE_SIZE);
920 if (nb_queues > old_nb_queues) {
921 uint16_t new_qs = nb_queues - old_nb_queues;
923 memset(txq + old_nb_queues, 0,
924 sizeof(txq[0]) * new_qs);
927 dev->data->tx_queues = txq;
929 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
932 txq = dev->data->tx_queues;
934 for (i = nb_queues; i < old_nb_queues; i++)
935 (*dev->dev_ops->tx_queue_release)(txq[i]);
937 rte_free(dev->data->tx_queues);
938 dev->data->tx_queues = NULL;
940 dev->data->nb_tx_queues = nb_queues;
945 rte_eth_speed_bitflag(uint32_t speed, int duplex)
948 case ETH_SPEED_NUM_10M:
949 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
950 case ETH_SPEED_NUM_100M:
951 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
952 case ETH_SPEED_NUM_1G:
953 return ETH_LINK_SPEED_1G;
954 case ETH_SPEED_NUM_2_5G:
955 return ETH_LINK_SPEED_2_5G;
956 case ETH_SPEED_NUM_5G:
957 return ETH_LINK_SPEED_5G;
958 case ETH_SPEED_NUM_10G:
959 return ETH_LINK_SPEED_10G;
960 case ETH_SPEED_NUM_20G:
961 return ETH_LINK_SPEED_20G;
962 case ETH_SPEED_NUM_25G:
963 return ETH_LINK_SPEED_25G;
964 case ETH_SPEED_NUM_40G:
965 return ETH_LINK_SPEED_40G;
966 case ETH_SPEED_NUM_50G:
967 return ETH_LINK_SPEED_50G;
968 case ETH_SPEED_NUM_56G:
969 return ETH_LINK_SPEED_56G;
970 case ETH_SPEED_NUM_100G:
971 return ETH_LINK_SPEED_100G;
977 const char * __rte_experimental
978 rte_eth_dev_rx_offload_name(uint64_t offload)
980 const char *name = "UNKNOWN";
983 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
984 if (offload == rte_rx_offload_names[i].offload) {
985 name = rte_rx_offload_names[i].name;
993 const char * __rte_experimental
994 rte_eth_dev_tx_offload_name(uint64_t offload)
996 const char *name = "UNKNOWN";
999 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1000 if (offload == rte_tx_offload_names[i].offload) {
1001 name = rte_tx_offload_names[i].name;
1010 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1011 const struct rte_eth_conf *dev_conf)
1013 struct rte_eth_dev *dev;
1014 struct rte_eth_dev_info dev_info;
1015 struct rte_eth_conf local_conf = *dev_conf;
1018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1020 dev = &rte_eth_devices[port_id];
1022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1025 rte_eth_dev_info_get(port_id, &dev_info);
1027 /* If number of queues specified by application for both Rx and Tx is
1028 * zero, use driver preferred values. This cannot be done individually
1029 * as it is valid for either Tx or Rx (but not both) to be zero.
1030 * If driver does not provide any preferred valued, fall back on
1033 if (nb_rx_q == 0 && nb_tx_q == 0) {
1034 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1036 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1037 nb_tx_q = dev_info.default_txportconf.nb_queues;
1039 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1042 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1044 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1045 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1049 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1051 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1052 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1056 if (dev->data->dev_started) {
1058 "Port %u must be stopped to allow configuration\n",
1063 /* Copy the dev_conf parameter into the dev structure */
1064 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1067 * Check that the numbers of RX and TX queues are not greater
1068 * than the maximum number of RX and TX queues supported by the
1069 * configured device.
1071 if (nb_rx_q > dev_info.max_rx_queues) {
1072 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1073 port_id, nb_rx_q, dev_info.max_rx_queues);
1077 if (nb_tx_q > dev_info.max_tx_queues) {
1078 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1079 port_id, nb_tx_q, dev_info.max_tx_queues);
1083 /* Check that the device supports requested interrupts */
1084 if ((dev_conf->intr_conf.lsc == 1) &&
1085 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1086 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1087 dev->device->driver->name);
1090 if ((dev_conf->intr_conf.rmv == 1) &&
1091 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1092 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1093 dev->device->driver->name);
1098 * If jumbo frames are enabled, check that the maximum RX packet
1099 * length is supported by the configured device.
1101 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1102 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1104 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1105 port_id, dev_conf->rxmode.max_rx_pkt_len,
1106 dev_info.max_rx_pktlen);
1108 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1110 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1111 port_id, dev_conf->rxmode.max_rx_pkt_len,
1112 (unsigned)ETHER_MIN_LEN);
1116 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1117 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1118 /* Use default value */
1119 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1123 /* Any requested offloading must be within its device capabilities */
1124 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1125 local_conf.rxmode.offloads) {
1127 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1128 "capabilities 0x%"PRIx64" in %s()\n",
1129 port_id, local_conf.rxmode.offloads,
1130 dev_info.rx_offload_capa,
1134 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1135 local_conf.txmode.offloads) {
1137 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1138 "capabilities 0x%"PRIx64" in %s()\n",
1139 port_id, local_conf.txmode.offloads,
1140 dev_info.tx_offload_capa,
1145 if ((local_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP) &&
1146 (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
1148 "Port id=%u not allowed to set both CRC STRIP and KEEP CRC offload flags\n",
1153 /* Check that device supports requested rss hash functions. */
1154 if ((dev_info.flow_type_rss_offloads |
1155 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1156 dev_info.flow_type_rss_offloads) {
1158 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1159 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1160 dev_info.flow_type_rss_offloads);
1165 * Setup new number of RX/TX queues and reconfigure device.
1167 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1170 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1175 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1178 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1180 rte_eth_dev_rx_queue_config(dev, 0);
1184 diag = (*dev->dev_ops->dev_configure)(dev);
1186 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1188 rte_eth_dev_rx_queue_config(dev, 0);
1189 rte_eth_dev_tx_queue_config(dev, 0);
1190 return eth_err(port_id, diag);
1193 /* Initialize Rx profiling if enabled at compilation time. */
1194 diag = __rte_eth_profile_rx_init(port_id, dev);
1196 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_profile_rx_init = %d\n",
1198 rte_eth_dev_rx_queue_config(dev, 0);
1199 rte_eth_dev_tx_queue_config(dev, 0);
1200 return eth_err(port_id, diag);
1207 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1209 if (dev->data->dev_started) {
1210 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1211 dev->data->port_id);
1215 rte_eth_dev_rx_queue_config(dev, 0);
1216 rte_eth_dev_tx_queue_config(dev, 0);
1218 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1222 rte_eth_dev_config_restore(uint16_t port_id)
1224 struct rte_eth_dev *dev;
1225 struct rte_eth_dev_info dev_info;
1226 struct ether_addr *addr;
1231 dev = &rte_eth_devices[port_id];
1233 rte_eth_dev_info_get(port_id, &dev_info);
1235 /* replay MAC address configuration including default MAC */
1236 addr = &dev->data->mac_addrs[0];
1237 if (*dev->dev_ops->mac_addr_set != NULL)
1238 (*dev->dev_ops->mac_addr_set)(dev, addr);
1239 else if (*dev->dev_ops->mac_addr_add != NULL)
1240 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1242 if (*dev->dev_ops->mac_addr_add != NULL) {
1243 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1244 addr = &dev->data->mac_addrs[i];
1246 /* skip zero address */
1247 if (is_zero_ether_addr(addr))
1251 pool_mask = dev->data->mac_pool_sel[i];
1254 if (pool_mask & 1ULL)
1255 (*dev->dev_ops->mac_addr_add)(dev,
1259 } while (pool_mask);
1263 /* replay promiscuous configuration */
1264 if (rte_eth_promiscuous_get(port_id) == 1)
1265 rte_eth_promiscuous_enable(port_id);
1266 else if (rte_eth_promiscuous_get(port_id) == 0)
1267 rte_eth_promiscuous_disable(port_id);
1269 /* replay all multicast configuration */
1270 if (rte_eth_allmulticast_get(port_id) == 1)
1271 rte_eth_allmulticast_enable(port_id);
1272 else if (rte_eth_allmulticast_get(port_id) == 0)
1273 rte_eth_allmulticast_disable(port_id);
1277 rte_eth_dev_start(uint16_t port_id)
1279 struct rte_eth_dev *dev;
1282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1284 dev = &rte_eth_devices[port_id];
1286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1288 if (dev->data->dev_started != 0) {
1290 "Device with port_id=%"PRIu16" already started\n",
1295 diag = (*dev->dev_ops->dev_start)(dev);
1297 dev->data->dev_started = 1;
1299 return eth_err(port_id, diag);
1301 rte_eth_dev_config_restore(port_id);
1303 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1305 (*dev->dev_ops->link_update)(dev, 0);
1311 rte_eth_dev_stop(uint16_t port_id)
1313 struct rte_eth_dev *dev;
1315 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1316 dev = &rte_eth_devices[port_id];
1318 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1320 if (dev->data->dev_started == 0) {
1322 "Device with port_id=%"PRIu16" already stopped\n",
1327 dev->data->dev_started = 0;
1328 (*dev->dev_ops->dev_stop)(dev);
1332 rte_eth_dev_set_link_up(uint16_t port_id)
1334 struct rte_eth_dev *dev;
1336 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1338 dev = &rte_eth_devices[port_id];
1340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1341 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1345 rte_eth_dev_set_link_down(uint16_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1351 dev = &rte_eth_devices[port_id];
1353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1354 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1358 rte_eth_dev_close(uint16_t port_id)
1360 struct rte_eth_dev *dev;
1362 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1363 dev = &rte_eth_devices[port_id];
1365 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1366 dev->data->dev_started = 0;
1367 (*dev->dev_ops->dev_close)(dev);
1369 dev->data->nb_rx_queues = 0;
1370 rte_free(dev->data->rx_queues);
1371 dev->data->rx_queues = NULL;
1372 dev->data->nb_tx_queues = 0;
1373 rte_free(dev->data->tx_queues);
1374 dev->data->tx_queues = NULL;
1378 rte_eth_dev_reset(uint16_t port_id)
1380 struct rte_eth_dev *dev;
1383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1384 dev = &rte_eth_devices[port_id];
1386 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1388 rte_eth_dev_stop(port_id);
1389 ret = dev->dev_ops->dev_reset(dev);
1391 return eth_err(port_id, ret);
1394 int __rte_experimental
1395 rte_eth_dev_is_removed(uint16_t port_id)
1397 struct rte_eth_dev *dev;
1400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1402 dev = &rte_eth_devices[port_id];
1404 if (dev->state == RTE_ETH_DEV_REMOVED)
1407 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1409 ret = dev->dev_ops->is_removed(dev);
1411 /* Device is physically removed. */
1412 dev->state = RTE_ETH_DEV_REMOVED;
1418 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1419 uint16_t nb_rx_desc, unsigned int socket_id,
1420 const struct rte_eth_rxconf *rx_conf,
1421 struct rte_mempool *mp)
1424 uint32_t mbp_buf_size;
1425 struct rte_eth_dev *dev;
1426 struct rte_eth_dev_info dev_info;
1427 struct rte_eth_rxconf local_conf;
1430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1432 dev = &rte_eth_devices[port_id];
1433 if (rx_queue_id >= dev->data->nb_rx_queues) {
1434 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1438 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1439 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1442 * Check the size of the mbuf data buffer.
1443 * This value must be provided in the private data of the memory pool.
1444 * First check that the memory pool has a valid private data.
1446 rte_eth_dev_info_get(port_id, &dev_info);
1447 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1448 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1449 mp->name, (int)mp->private_data_size,
1450 (int)sizeof(struct rte_pktmbuf_pool_private));
1453 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1455 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1457 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1458 mp->name, (int)mbp_buf_size,
1459 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1460 (int)RTE_PKTMBUF_HEADROOM,
1461 (int)dev_info.min_rx_bufsize);
1465 /* Use default specified by driver, if nb_rx_desc is zero */
1466 if (nb_rx_desc == 0) {
1467 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1468 /* If driver default is also zero, fall back on EAL default */
1469 if (nb_rx_desc == 0)
1470 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1473 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1474 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1475 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1478 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1479 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1480 dev_info.rx_desc_lim.nb_min,
1481 dev_info.rx_desc_lim.nb_align);
1485 if (dev->data->dev_started &&
1486 !(dev_info.dev_capa &
1487 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1490 if (dev->data->dev_started &&
1491 (dev->data->rx_queue_state[rx_queue_id] !=
1492 RTE_ETH_QUEUE_STATE_STOPPED))
1495 rxq = dev->data->rx_queues;
1496 if (rxq[rx_queue_id]) {
1497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1499 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1500 rxq[rx_queue_id] = NULL;
1503 if (rx_conf == NULL)
1504 rx_conf = &dev_info.default_rxconf;
1506 local_conf = *rx_conf;
1509 * If an offloading has already been enabled in
1510 * rte_eth_dev_configure(), it has been enabled on all queues,
1511 * so there is no need to enable it in this queue again.
1512 * The local_conf.offloads input to underlying PMD only carries
1513 * those offloadings which are only enabled on this queue and
1514 * not enabled on all queues.
1516 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1519 * New added offloadings for this queue are those not enabled in
1520 * rte_eth_dev_configure() and they must be per-queue type.
1521 * A pure per-port offloading can't be enabled on a queue while
1522 * disabled on another queue. A pure per-port offloading can't
1523 * be enabled for any queue as new added one if it hasn't been
1524 * enabled in rte_eth_dev_configure().
1526 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1527 local_conf.offloads) {
1529 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1530 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1531 port_id, rx_queue_id, local_conf.offloads,
1532 dev_info.rx_queue_offload_capa,
1537 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1538 socket_id, &local_conf, mp);
1540 if (!dev->data->min_rx_buf_size ||
1541 dev->data->min_rx_buf_size > mbp_buf_size)
1542 dev->data->min_rx_buf_size = mbp_buf_size;
1545 return eth_err(port_id, ret);
1549 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1550 uint16_t nb_tx_desc, unsigned int socket_id,
1551 const struct rte_eth_txconf *tx_conf)
1553 struct rte_eth_dev *dev;
1554 struct rte_eth_dev_info dev_info;
1555 struct rte_eth_txconf local_conf;
1558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1560 dev = &rte_eth_devices[port_id];
1561 if (tx_queue_id >= dev->data->nb_tx_queues) {
1562 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1566 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1567 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1569 rte_eth_dev_info_get(port_id, &dev_info);
1571 /* Use default specified by driver, if nb_tx_desc is zero */
1572 if (nb_tx_desc == 0) {
1573 nb_tx_desc = dev_info.default_txportconf.ring_size;
1574 /* If driver default is zero, fall back on EAL default */
1575 if (nb_tx_desc == 0)
1576 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1578 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1579 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1580 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1582 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1583 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1584 dev_info.tx_desc_lim.nb_min,
1585 dev_info.tx_desc_lim.nb_align);
1589 if (dev->data->dev_started &&
1590 !(dev_info.dev_capa &
1591 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1594 if (dev->data->dev_started &&
1595 (dev->data->tx_queue_state[tx_queue_id] !=
1596 RTE_ETH_QUEUE_STATE_STOPPED))
1599 txq = dev->data->tx_queues;
1600 if (txq[tx_queue_id]) {
1601 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1603 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1604 txq[tx_queue_id] = NULL;
1607 if (tx_conf == NULL)
1608 tx_conf = &dev_info.default_txconf;
1610 local_conf = *tx_conf;
1613 * If an offloading has already been enabled in
1614 * rte_eth_dev_configure(), it has been enabled on all queues,
1615 * so there is no need to enable it in this queue again.
1616 * The local_conf.offloads input to underlying PMD only carries
1617 * those offloadings which are only enabled on this queue and
1618 * not enabled on all queues.
1620 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1623 * New added offloadings for this queue are those not enabled in
1624 * rte_eth_dev_configure() and they must be per-queue type.
1625 * A pure per-port offloading can't be enabled on a queue while
1626 * disabled on another queue. A pure per-port offloading can't
1627 * be enabled for any queue as new added one if it hasn't been
1628 * enabled in rte_eth_dev_configure().
1630 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1631 local_conf.offloads) {
1633 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1634 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1635 port_id, tx_queue_id, local_conf.offloads,
1636 dev_info.tx_queue_offload_capa,
1641 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1642 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1646 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1647 void *userdata __rte_unused)
1651 for (i = 0; i < unsent; i++)
1652 rte_pktmbuf_free(pkts[i]);
1656 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1659 uint64_t *count = userdata;
1662 for (i = 0; i < unsent; i++)
1663 rte_pktmbuf_free(pkts[i]);
1669 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1670 buffer_tx_error_fn cbfn, void *userdata)
1672 buffer->error_callback = cbfn;
1673 buffer->error_userdata = userdata;
1678 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1685 buffer->size = size;
1686 if (buffer->error_callback == NULL) {
1687 ret = rte_eth_tx_buffer_set_err_callback(
1688 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1695 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1697 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1700 /* Validate Input Data. Bail if not valid or not supported. */
1701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1704 /* Call driver to free pending mbufs. */
1705 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1707 return eth_err(port_id, ret);
1711 rte_eth_promiscuous_enable(uint16_t port_id)
1713 struct rte_eth_dev *dev;
1715 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1716 dev = &rte_eth_devices[port_id];
1718 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1719 (*dev->dev_ops->promiscuous_enable)(dev);
1720 dev->data->promiscuous = 1;
1724 rte_eth_promiscuous_disable(uint16_t port_id)
1726 struct rte_eth_dev *dev;
1728 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1729 dev = &rte_eth_devices[port_id];
1731 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1732 dev->data->promiscuous = 0;
1733 (*dev->dev_ops->promiscuous_disable)(dev);
1737 rte_eth_promiscuous_get(uint16_t port_id)
1739 struct rte_eth_dev *dev;
1741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1743 dev = &rte_eth_devices[port_id];
1744 return dev->data->promiscuous;
1748 rte_eth_allmulticast_enable(uint16_t port_id)
1750 struct rte_eth_dev *dev;
1752 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1753 dev = &rte_eth_devices[port_id];
1755 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1756 (*dev->dev_ops->allmulticast_enable)(dev);
1757 dev->data->all_multicast = 1;
1761 rte_eth_allmulticast_disable(uint16_t port_id)
1763 struct rte_eth_dev *dev;
1765 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1766 dev = &rte_eth_devices[port_id];
1768 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1769 dev->data->all_multicast = 0;
1770 (*dev->dev_ops->allmulticast_disable)(dev);
1774 rte_eth_allmulticast_get(uint16_t port_id)
1776 struct rte_eth_dev *dev;
1778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1780 dev = &rte_eth_devices[port_id];
1781 return dev->data->all_multicast;
1785 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1787 struct rte_eth_dev *dev;
1789 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1790 dev = &rte_eth_devices[port_id];
1792 if (dev->data->dev_conf.intr_conf.lsc &&
1793 dev->data->dev_started)
1794 rte_eth_linkstatus_get(dev, eth_link);
1796 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1797 (*dev->dev_ops->link_update)(dev, 1);
1798 *eth_link = dev->data->dev_link;
1803 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1805 struct rte_eth_dev *dev;
1807 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1808 dev = &rte_eth_devices[port_id];
1810 if (dev->data->dev_conf.intr_conf.lsc &&
1811 dev->data->dev_started)
1812 rte_eth_linkstatus_get(dev, eth_link);
1814 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1815 (*dev->dev_ops->link_update)(dev, 0);
1816 *eth_link = dev->data->dev_link;
1821 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1823 struct rte_eth_dev *dev;
1825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1827 dev = &rte_eth_devices[port_id];
1828 memset(stats, 0, sizeof(*stats));
1830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1831 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1832 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1836 rte_eth_stats_reset(uint16_t port_id)
1838 struct rte_eth_dev *dev;
1840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1841 dev = &rte_eth_devices[port_id];
1843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1844 (*dev->dev_ops->stats_reset)(dev);
1845 dev->data->rx_mbuf_alloc_failed = 0;
1851 get_xstats_basic_count(struct rte_eth_dev *dev)
1853 uint16_t nb_rxqs, nb_txqs;
1856 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1857 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1859 count = RTE_NB_STATS;
1860 count += nb_rxqs * RTE_NB_RXQ_STATS;
1861 count += nb_txqs * RTE_NB_TXQ_STATS;
1867 get_xstats_count(uint16_t port_id)
1869 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1873 dev = &rte_eth_devices[port_id];
1874 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1875 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1878 return eth_err(port_id, count);
1880 if (dev->dev_ops->xstats_get_names != NULL) {
1881 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1883 return eth_err(port_id, count);
1888 count += get_xstats_basic_count(dev);
1894 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1897 int cnt_xstats, idx_xstat;
1899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1902 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1907 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1912 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1913 if (cnt_xstats < 0) {
1914 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1918 /* Get id-name lookup table */
1919 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1921 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1922 port_id, xstats_names, cnt_xstats, NULL)) {
1923 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1927 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1928 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1937 /* retrieve basic stats names */
1939 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1940 struct rte_eth_xstat_name *xstats_names)
1942 int cnt_used_entries = 0;
1943 uint32_t idx, id_queue;
1946 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1947 snprintf(xstats_names[cnt_used_entries].name,
1948 sizeof(xstats_names[0].name),
1949 "%s", rte_stats_strings[idx].name);
1952 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1953 for (id_queue = 0; id_queue < num_q; id_queue++) {
1954 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1955 snprintf(xstats_names[cnt_used_entries].name,
1956 sizeof(xstats_names[0].name),
1958 id_queue, rte_rxq_stats_strings[idx].name);
1963 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1964 for (id_queue = 0; id_queue < num_q; id_queue++) {
1965 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1966 snprintf(xstats_names[cnt_used_entries].name,
1967 sizeof(xstats_names[0].name),
1969 id_queue, rte_txq_stats_strings[idx].name);
1973 return cnt_used_entries;
1976 /* retrieve ethdev extended statistics names */
1978 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1979 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1982 struct rte_eth_xstat_name *xstats_names_copy;
1983 unsigned int no_basic_stat_requested = 1;
1984 unsigned int no_ext_stat_requested = 1;
1985 unsigned int expected_entries;
1986 unsigned int basic_count;
1987 struct rte_eth_dev *dev;
1991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1992 dev = &rte_eth_devices[port_id];
1994 basic_count = get_xstats_basic_count(dev);
1995 ret = get_xstats_count(port_id);
1998 expected_entries = (unsigned int)ret;
2000 /* Return max number of stats if no ids given */
2003 return expected_entries;
2004 else if (xstats_names && size < expected_entries)
2005 return expected_entries;
2008 if (ids && !xstats_names)
2011 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2012 uint64_t ids_copy[size];
2014 for (i = 0; i < size; i++) {
2015 if (ids[i] < basic_count) {
2016 no_basic_stat_requested = 0;
2021 * Convert ids to xstats ids that PMD knows.
2022 * ids known by user are basic + extended stats.
2024 ids_copy[i] = ids[i] - basic_count;
2027 if (no_basic_stat_requested)
2028 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2029 xstats_names, ids_copy, size);
2032 /* Retrieve all stats */
2034 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2036 if (num_stats < 0 || num_stats > (int)expected_entries)
2039 return expected_entries;
2042 xstats_names_copy = calloc(expected_entries,
2043 sizeof(struct rte_eth_xstat_name));
2045 if (!xstats_names_copy) {
2046 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2051 for (i = 0; i < size; i++) {
2052 if (ids[i] >= basic_count) {
2053 no_ext_stat_requested = 0;
2059 /* Fill xstats_names_copy structure */
2060 if (ids && no_ext_stat_requested) {
2061 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2063 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2066 free(xstats_names_copy);
2072 for (i = 0; i < size; i++) {
2073 if (ids[i] >= expected_entries) {
2074 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2075 free(xstats_names_copy);
2078 xstats_names[i] = xstats_names_copy[ids[i]];
2081 free(xstats_names_copy);
2086 rte_eth_xstats_get_names(uint16_t port_id,
2087 struct rte_eth_xstat_name *xstats_names,
2090 struct rte_eth_dev *dev;
2091 int cnt_used_entries;
2092 int cnt_expected_entries;
2093 int cnt_driver_entries;
2095 cnt_expected_entries = get_xstats_count(port_id);
2096 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2097 (int)size < cnt_expected_entries)
2098 return cnt_expected_entries;
2100 /* port_id checked in get_xstats_count() */
2101 dev = &rte_eth_devices[port_id];
2103 cnt_used_entries = rte_eth_basic_stats_get_names(
2106 if (dev->dev_ops->xstats_get_names != NULL) {
2107 /* If there are any driver-specific xstats, append them
2110 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2112 xstats_names + cnt_used_entries,
2113 size - cnt_used_entries);
2114 if (cnt_driver_entries < 0)
2115 return eth_err(port_id, cnt_driver_entries);
2116 cnt_used_entries += cnt_driver_entries;
2119 return cnt_used_entries;
2124 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2126 struct rte_eth_dev *dev;
2127 struct rte_eth_stats eth_stats;
2128 unsigned int count = 0, i, q;
2129 uint64_t val, *stats_ptr;
2130 uint16_t nb_rxqs, nb_txqs;
2133 ret = rte_eth_stats_get(port_id, ð_stats);
2137 dev = &rte_eth_devices[port_id];
2139 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2140 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2143 for (i = 0; i < RTE_NB_STATS; i++) {
2144 stats_ptr = RTE_PTR_ADD(ð_stats,
2145 rte_stats_strings[i].offset);
2147 xstats[count++].value = val;
2151 for (q = 0; q < nb_rxqs; q++) {
2152 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2153 stats_ptr = RTE_PTR_ADD(ð_stats,
2154 rte_rxq_stats_strings[i].offset +
2155 q * sizeof(uint64_t));
2157 xstats[count++].value = val;
2162 for (q = 0; q < nb_txqs; q++) {
2163 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2164 stats_ptr = RTE_PTR_ADD(ð_stats,
2165 rte_txq_stats_strings[i].offset +
2166 q * sizeof(uint64_t));
2168 xstats[count++].value = val;
2174 /* retrieve ethdev extended statistics */
2176 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2177 uint64_t *values, unsigned int size)
2179 unsigned int no_basic_stat_requested = 1;
2180 unsigned int no_ext_stat_requested = 1;
2181 unsigned int num_xstats_filled;
2182 unsigned int basic_count;
2183 uint16_t expected_entries;
2184 struct rte_eth_dev *dev;
2188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2189 ret = get_xstats_count(port_id);
2192 expected_entries = (uint16_t)ret;
2193 struct rte_eth_xstat xstats[expected_entries];
2194 dev = &rte_eth_devices[port_id];
2195 basic_count = get_xstats_basic_count(dev);
2197 /* Return max number of stats if no ids given */
2200 return expected_entries;
2201 else if (values && size < expected_entries)
2202 return expected_entries;
2208 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2209 unsigned int basic_count = get_xstats_basic_count(dev);
2210 uint64_t ids_copy[size];
2212 for (i = 0; i < size; i++) {
2213 if (ids[i] < basic_count) {
2214 no_basic_stat_requested = 0;
2219 * Convert ids to xstats ids that PMD knows.
2220 * ids known by user are basic + extended stats.
2222 ids_copy[i] = ids[i] - basic_count;
2225 if (no_basic_stat_requested)
2226 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2231 for (i = 0; i < size; i++) {
2232 if (ids[i] >= basic_count) {
2233 no_ext_stat_requested = 0;
2239 /* Fill the xstats structure */
2240 if (ids && no_ext_stat_requested)
2241 ret = rte_eth_basic_stats_get(port_id, xstats);
2243 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2247 num_xstats_filled = (unsigned int)ret;
2249 /* Return all stats */
2251 for (i = 0; i < num_xstats_filled; i++)
2252 values[i] = xstats[i].value;
2253 return expected_entries;
2257 for (i = 0; i < size; i++) {
2258 if (ids[i] >= expected_entries) {
2259 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2262 values[i] = xstats[ids[i]].value;
2268 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2271 struct rte_eth_dev *dev;
2272 unsigned int count = 0, i;
2273 signed int xcount = 0;
2274 uint16_t nb_rxqs, nb_txqs;
2277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2279 dev = &rte_eth_devices[port_id];
2281 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2282 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2284 /* Return generic statistics */
2285 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2286 (nb_txqs * RTE_NB_TXQ_STATS);
2288 /* implemented by the driver */
2289 if (dev->dev_ops->xstats_get != NULL) {
2290 /* Retrieve the xstats from the driver at the end of the
2293 xcount = (*dev->dev_ops->xstats_get)(dev,
2294 xstats ? xstats + count : NULL,
2295 (n > count) ? n - count : 0);
2298 return eth_err(port_id, xcount);
2301 if (n < count + xcount || xstats == NULL)
2302 return count + xcount;
2304 /* now fill the xstats structure */
2305 ret = rte_eth_basic_stats_get(port_id, xstats);
2310 for (i = 0; i < count; i++)
2312 /* add an offset to driver-specific stats */
2313 for ( ; i < count + xcount; i++)
2314 xstats[i].id += count;
2316 return count + xcount;
2319 /* reset ethdev extended statistics */
2321 rte_eth_xstats_reset(uint16_t port_id)
2323 struct rte_eth_dev *dev;
2325 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2326 dev = &rte_eth_devices[port_id];
2328 /* implemented by the driver */
2329 if (dev->dev_ops->xstats_reset != NULL) {
2330 (*dev->dev_ops->xstats_reset)(dev);
2334 /* fallback to default */
2335 rte_eth_stats_reset(port_id);
2339 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2342 struct rte_eth_dev *dev;
2344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2346 dev = &rte_eth_devices[port_id];
2348 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2349 return (*dev->dev_ops->queue_stats_mapping_set)
2350 (dev, queue_id, stat_idx, is_rx);
2355 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2358 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2359 stat_idx, STAT_QMAP_TX));
2364 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2367 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2368 stat_idx, STAT_QMAP_RX));
2372 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2374 struct rte_eth_dev *dev;
2376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2377 dev = &rte_eth_devices[port_id];
2379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2380 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2381 fw_version, fw_size));
2385 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2387 struct rte_eth_dev *dev;
2388 const struct rte_eth_desc_lim lim = {
2389 .nb_max = UINT16_MAX,
2394 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2395 dev = &rte_eth_devices[port_id];
2397 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2398 dev_info->rx_desc_lim = lim;
2399 dev_info->tx_desc_lim = lim;
2400 dev_info->device = dev->device;
2402 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2403 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2404 dev_info->driver_name = dev->device->driver->name;
2405 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2406 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2408 dev_info->dev_flags = &dev->data->dev_flags;
2412 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2413 uint32_t *ptypes, int num)
2416 struct rte_eth_dev *dev;
2417 const uint32_t *all_ptypes;
2419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2420 dev = &rte_eth_devices[port_id];
2421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2422 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2427 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2428 if (all_ptypes[i] & ptype_mask) {
2430 ptypes[j] = all_ptypes[i];
2438 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2440 struct rte_eth_dev *dev;
2442 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2443 dev = &rte_eth_devices[port_id];
2444 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2449 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2451 struct rte_eth_dev *dev;
2453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2455 dev = &rte_eth_devices[port_id];
2456 *mtu = dev->data->mtu;
2461 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2464 struct rte_eth_dev *dev;
2466 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2467 dev = &rte_eth_devices[port_id];
2468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2470 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2472 dev->data->mtu = mtu;
2474 return eth_err(port_id, ret);
2478 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2480 struct rte_eth_dev *dev;
2483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2484 dev = &rte_eth_devices[port_id];
2485 if (!(dev->data->dev_conf.rxmode.offloads &
2486 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2487 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2492 if (vlan_id > 4095) {
2493 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2499 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2501 struct rte_vlan_filter_conf *vfc;
2505 vfc = &dev->data->vlan_filter_conf;
2506 vidx = vlan_id / 64;
2507 vbit = vlan_id % 64;
2510 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2512 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2515 return eth_err(port_id, ret);
2519 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2522 struct rte_eth_dev *dev;
2524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2525 dev = &rte_eth_devices[port_id];
2526 if (rx_queue_id >= dev->data->nb_rx_queues) {
2527 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2532 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2538 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2539 enum rte_vlan_type vlan_type,
2542 struct rte_eth_dev *dev;
2544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2545 dev = &rte_eth_devices[port_id];
2546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2548 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2553 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2555 struct rte_eth_dev *dev;
2559 uint64_t orig_offloads;
2561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2562 dev = &rte_eth_devices[port_id];
2564 /* save original values in case of failure */
2565 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2567 /*check which option changed by application*/
2568 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2569 org = !!(dev->data->dev_conf.rxmode.offloads &
2570 DEV_RX_OFFLOAD_VLAN_STRIP);
2573 dev->data->dev_conf.rxmode.offloads |=
2574 DEV_RX_OFFLOAD_VLAN_STRIP;
2576 dev->data->dev_conf.rxmode.offloads &=
2577 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2578 mask |= ETH_VLAN_STRIP_MASK;
2581 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2582 org = !!(dev->data->dev_conf.rxmode.offloads &
2583 DEV_RX_OFFLOAD_VLAN_FILTER);
2586 dev->data->dev_conf.rxmode.offloads |=
2587 DEV_RX_OFFLOAD_VLAN_FILTER;
2589 dev->data->dev_conf.rxmode.offloads &=
2590 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2591 mask |= ETH_VLAN_FILTER_MASK;
2594 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2595 org = !!(dev->data->dev_conf.rxmode.offloads &
2596 DEV_RX_OFFLOAD_VLAN_EXTEND);
2599 dev->data->dev_conf.rxmode.offloads |=
2600 DEV_RX_OFFLOAD_VLAN_EXTEND;
2602 dev->data->dev_conf.rxmode.offloads &=
2603 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2604 mask |= ETH_VLAN_EXTEND_MASK;
2611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2612 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2614 /* hit an error restore original values */
2615 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2618 return eth_err(port_id, ret);
2622 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2624 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2630 if (dev->data->dev_conf.rxmode.offloads &
2631 DEV_RX_OFFLOAD_VLAN_STRIP)
2632 ret |= ETH_VLAN_STRIP_OFFLOAD;
2634 if (dev->data->dev_conf.rxmode.offloads &
2635 DEV_RX_OFFLOAD_VLAN_FILTER)
2636 ret |= ETH_VLAN_FILTER_OFFLOAD;
2638 if (dev->data->dev_conf.rxmode.offloads &
2639 DEV_RX_OFFLOAD_VLAN_EXTEND)
2640 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2646 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2648 struct rte_eth_dev *dev;
2650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2651 dev = &rte_eth_devices[port_id];
2652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2654 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2658 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2660 struct rte_eth_dev *dev;
2662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2663 dev = &rte_eth_devices[port_id];
2664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2665 memset(fc_conf, 0, sizeof(*fc_conf));
2666 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2670 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2672 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2676 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2680 dev = &rte_eth_devices[port_id];
2681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2682 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2686 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2687 struct rte_eth_pfc_conf *pfc_conf)
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2693 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2697 dev = &rte_eth_devices[port_id];
2698 /* High water, low water validation are device specific */
2699 if (*dev->dev_ops->priority_flow_ctrl_set)
2700 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2706 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2714 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2715 for (i = 0; i < num; i++) {
2716 if (reta_conf[i].mask)
2724 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2728 uint16_t i, idx, shift;
2734 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2738 for (i = 0; i < reta_size; i++) {
2739 idx = i / RTE_RETA_GROUP_SIZE;
2740 shift = i % RTE_RETA_GROUP_SIZE;
2741 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2742 (reta_conf[idx].reta[shift] >= max_rxq)) {
2744 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2746 reta_conf[idx].reta[shift], max_rxq);
2755 rte_eth_dev_rss_reta_update(uint16_t port_id,
2756 struct rte_eth_rss_reta_entry64 *reta_conf,
2759 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 /* Check mask bits */
2764 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2768 dev = &rte_eth_devices[port_id];
2770 /* Check entry value */
2771 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2772 dev->data->nb_rx_queues);
2776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2777 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2782 rte_eth_dev_rss_reta_query(uint16_t port_id,
2783 struct rte_eth_rss_reta_entry64 *reta_conf,
2786 struct rte_eth_dev *dev;
2789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2791 /* Check mask bits */
2792 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2796 dev = &rte_eth_devices[port_id];
2797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2798 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2803 rte_eth_dev_rss_hash_update(uint16_t port_id,
2804 struct rte_eth_rss_conf *rss_conf)
2806 struct rte_eth_dev *dev;
2807 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2810 dev = &rte_eth_devices[port_id];
2811 rte_eth_dev_info_get(port_id, &dev_info);
2812 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2813 dev_info.flow_type_rss_offloads) {
2815 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2816 port_id, rss_conf->rss_hf,
2817 dev_info.flow_type_rss_offloads);
2820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2821 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2826 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2827 struct rte_eth_rss_conf *rss_conf)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2834 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2839 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2840 struct rte_eth_udp_tunnel *udp_tunnel)
2842 struct rte_eth_dev *dev;
2844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2845 if (udp_tunnel == NULL) {
2846 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2850 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2851 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2855 dev = &rte_eth_devices[port_id];
2856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2857 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2862 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2863 struct rte_eth_udp_tunnel *udp_tunnel)
2865 struct rte_eth_dev *dev;
2867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2868 dev = &rte_eth_devices[port_id];
2870 if (udp_tunnel == NULL) {
2871 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2875 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2876 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2881 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2886 rte_eth_led_on(uint16_t port_id)
2888 struct rte_eth_dev *dev;
2890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2891 dev = &rte_eth_devices[port_id];
2892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2893 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2897 rte_eth_led_off(uint16_t port_id)
2899 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2902 dev = &rte_eth_devices[port_id];
2903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2904 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2908 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2912 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2914 struct rte_eth_dev_info dev_info;
2915 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2919 rte_eth_dev_info_get(port_id, &dev_info);
2921 for (i = 0; i < dev_info.max_mac_addrs; i++)
2922 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2928 static const struct ether_addr null_mac_addr;
2931 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2934 struct rte_eth_dev *dev;
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 dev = &rte_eth_devices[port_id];
2941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2943 if (is_zero_ether_addr(addr)) {
2944 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2948 if (pool >= ETH_64_POOLS) {
2949 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2953 index = get_mac_addr_index(port_id, addr);
2955 index = get_mac_addr_index(port_id, &null_mac_addr);
2957 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2962 pool_mask = dev->data->mac_pool_sel[index];
2964 /* Check if both MAC address and pool is already there, and do nothing */
2965 if (pool_mask & (1ULL << pool))
2970 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2973 /* Update address in NIC data structure */
2974 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2976 /* Update pool bitmap in NIC data structure */
2977 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2980 return eth_err(port_id, ret);
2984 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2986 struct rte_eth_dev *dev;
2989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2990 dev = &rte_eth_devices[port_id];
2991 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2993 index = get_mac_addr_index(port_id, addr);
2996 "Port %u: Cannot remove default MAC address\n",
2999 } else if (index < 0)
3000 return 0; /* Do nothing if address wasn't found */
3003 (*dev->dev_ops->mac_addr_remove)(dev, index);
3005 /* Update address in NIC data structure */
3006 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3008 /* reset pool bitmap */
3009 dev->data->mac_pool_sel[index] = 0;
3015 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3017 struct rte_eth_dev *dev;
3020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3022 if (!is_valid_assigned_ether_addr(addr))
3025 dev = &rte_eth_devices[port_id];
3026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3028 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3032 /* Update default address in NIC data structure */
3033 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3040 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3044 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3046 struct rte_eth_dev_info dev_info;
3047 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3050 rte_eth_dev_info_get(port_id, &dev_info);
3051 if (!dev->data->hash_mac_addrs)
3054 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3055 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3056 ETHER_ADDR_LEN) == 0)
3063 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3068 struct rte_eth_dev *dev;
3070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3072 dev = &rte_eth_devices[port_id];
3073 if (is_zero_ether_addr(addr)) {
3074 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3079 index = get_hash_mac_addr_index(port_id, addr);
3080 /* Check if it's already there, and do nothing */
3081 if ((index >= 0) && on)
3087 "Port %u: the MAC address was not set in UTA\n",
3092 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3094 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3101 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3103 /* Update address in NIC data structure */
3105 ether_addr_copy(addr,
3106 &dev->data->hash_mac_addrs[index]);
3108 ether_addr_copy(&null_mac_addr,
3109 &dev->data->hash_mac_addrs[index]);
3112 return eth_err(port_id, ret);
3116 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3118 struct rte_eth_dev *dev;
3120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3122 dev = &rte_eth_devices[port_id];
3124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3125 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3129 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3132 struct rte_eth_dev *dev;
3133 struct rte_eth_dev_info dev_info;
3134 struct rte_eth_link link;
3136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3138 dev = &rte_eth_devices[port_id];
3139 rte_eth_dev_info_get(port_id, &dev_info);
3140 link = dev->data->dev_link;
3142 if (queue_idx > dev_info.max_tx_queues) {
3144 "Set queue rate limit:port %u: invalid queue id=%u\n",
3145 port_id, queue_idx);
3149 if (tx_rate > link.link_speed) {
3151 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3152 tx_rate, link.link_speed);
3156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3157 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3158 queue_idx, tx_rate));
3162 rte_eth_mirror_rule_set(uint16_t port_id,
3163 struct rte_eth_mirror_conf *mirror_conf,
3164 uint8_t rule_id, uint8_t on)
3166 struct rte_eth_dev *dev;
3168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3169 if (mirror_conf->rule_type == 0) {
3170 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3174 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3175 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3180 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3181 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3182 (mirror_conf->pool_mask == 0)) {
3184 "Invalid mirror pool, pool mask can not be 0\n");
3188 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3189 mirror_conf->vlan.vlan_mask == 0) {
3191 "Invalid vlan mask, vlan mask can not be 0\n");
3195 dev = &rte_eth_devices[port_id];
3196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3198 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3199 mirror_conf, rule_id, on));
3203 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3205 struct rte_eth_dev *dev;
3207 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3209 dev = &rte_eth_devices[port_id];
3210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3212 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3216 RTE_INIT(eth_dev_init_cb_lists)
3220 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3221 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3225 rte_eth_dev_callback_register(uint16_t port_id,
3226 enum rte_eth_event_type event,
3227 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3229 struct rte_eth_dev *dev;
3230 struct rte_eth_dev_callback *user_cb;
3231 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3237 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3238 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3242 if (port_id == RTE_ETH_ALL) {
3244 last_port = RTE_MAX_ETHPORTS - 1;
3246 next_port = last_port = port_id;
3249 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3252 dev = &rte_eth_devices[next_port];
3254 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3255 if (user_cb->cb_fn == cb_fn &&
3256 user_cb->cb_arg == cb_arg &&
3257 user_cb->event == event) {
3262 /* create a new callback. */
3263 if (user_cb == NULL) {
3264 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3265 sizeof(struct rte_eth_dev_callback), 0);
3266 if (user_cb != NULL) {
3267 user_cb->cb_fn = cb_fn;
3268 user_cb->cb_arg = cb_arg;
3269 user_cb->event = event;
3270 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3273 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3274 rte_eth_dev_callback_unregister(port_id, event,
3280 } while (++next_port <= last_port);
3282 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3287 rte_eth_dev_callback_unregister(uint16_t port_id,
3288 enum rte_eth_event_type event,
3289 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3292 struct rte_eth_dev *dev;
3293 struct rte_eth_dev_callback *cb, *next;
3294 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3300 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3301 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3305 if (port_id == RTE_ETH_ALL) {
3307 last_port = RTE_MAX_ETHPORTS - 1;
3309 next_port = last_port = port_id;
3312 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3315 dev = &rte_eth_devices[next_port];
3317 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3320 next = TAILQ_NEXT(cb, next);
3322 if (cb->cb_fn != cb_fn || cb->event != event ||
3323 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3327 * if this callback is not executing right now,
3330 if (cb->active == 0) {
3331 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3337 } while (++next_port <= last_port);
3339 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3344 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3345 enum rte_eth_event_type event, void *ret_param)
3347 struct rte_eth_dev_callback *cb_lst;
3348 struct rte_eth_dev_callback dev_cb;
3351 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3352 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3353 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3357 if (ret_param != NULL)
3358 dev_cb.ret_param = ret_param;
3360 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3361 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3362 dev_cb.cb_arg, dev_cb.ret_param);
3363 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3366 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3371 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3376 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3378 dev->state = RTE_ETH_DEV_ATTACHED;
3382 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3385 struct rte_eth_dev *dev;
3386 struct rte_intr_handle *intr_handle;
3390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3392 dev = &rte_eth_devices[port_id];
3394 if (!dev->intr_handle) {
3395 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3399 intr_handle = dev->intr_handle;
3400 if (!intr_handle->intr_vec) {
3401 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3405 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3406 vec = intr_handle->intr_vec[qid];
3407 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3408 if (rc && rc != -EEXIST) {
3410 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3411 port_id, qid, op, epfd, vec);
3418 const struct rte_memzone *
3419 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3420 uint16_t queue_id, size_t size, unsigned align,
3423 char z_name[RTE_MEMZONE_NAMESIZE];
3424 const struct rte_memzone *mz;
3426 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3427 dev->device->driver->name, ring_name,
3428 dev->data->port_id, queue_id);
3430 mz = rte_memzone_lookup(z_name);
3434 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3435 RTE_MEMZONE_IOVA_CONTIG, align);
3438 int __rte_experimental
3439 rte_eth_dev_create(struct rte_device *device, const char *name,
3440 size_t priv_data_size,
3441 ethdev_bus_specific_init ethdev_bus_specific_init,
3442 void *bus_init_params,
3443 ethdev_init_t ethdev_init, void *init_params)
3445 struct rte_eth_dev *ethdev;
3448 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3450 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3451 ethdev = rte_eth_dev_allocate(name);
3457 if (priv_data_size) {
3458 ethdev->data->dev_private = rte_zmalloc_socket(
3459 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3462 if (!ethdev->data->dev_private) {
3463 RTE_LOG(ERR, EAL, "failed to allocate private data");
3469 ethdev = rte_eth_dev_attach_secondary(name);
3471 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3472 "ethdev doesn't exist");
3478 ethdev->device = device;
3480 if (ethdev_bus_specific_init) {
3481 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3484 "ethdev bus specific initialisation failed");
3489 retval = ethdev_init(ethdev, init_params);
3491 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3495 rte_eth_dev_probing_finish(ethdev);
3499 /* free ports private data if primary process */
3500 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3501 rte_free(ethdev->data->dev_private);
3503 rte_eth_dev_release_port(ethdev);
3508 int __rte_experimental
3509 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3510 ethdev_uninit_t ethdev_uninit)
3514 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3518 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3519 if (ethdev_uninit) {
3520 ret = ethdev_uninit(ethdev);
3525 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3526 rte_free(ethdev->data->dev_private);
3528 ethdev->data->dev_private = NULL;
3530 return rte_eth_dev_release_port(ethdev);
3534 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3535 int epfd, int op, void *data)
3538 struct rte_eth_dev *dev;
3539 struct rte_intr_handle *intr_handle;
3542 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3544 dev = &rte_eth_devices[port_id];
3545 if (queue_id >= dev->data->nb_rx_queues) {
3546 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3550 if (!dev->intr_handle) {
3551 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3555 intr_handle = dev->intr_handle;
3556 if (!intr_handle->intr_vec) {
3557 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3561 vec = intr_handle->intr_vec[queue_id];
3562 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3563 if (rc && rc != -EEXIST) {
3565 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3566 port_id, queue_id, op, epfd, vec);
3574 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3577 struct rte_eth_dev *dev;
3579 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3581 dev = &rte_eth_devices[port_id];
3583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3584 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3589 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3592 struct rte_eth_dev *dev;
3594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3596 dev = &rte_eth_devices[port_id];
3598 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3599 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3605 rte_eth_dev_filter_supported(uint16_t port_id,
3606 enum rte_filter_type filter_type)
3608 struct rte_eth_dev *dev;
3610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 dev = &rte_eth_devices[port_id];
3613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3614 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3615 RTE_ETH_FILTER_NOP, NULL);
3619 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3620 enum rte_filter_op filter_op, void *arg)
3622 struct rte_eth_dev *dev;
3624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3626 dev = &rte_eth_devices[port_id];
3627 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3628 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3632 const struct rte_eth_rxtx_callback *
3633 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3634 rte_rx_callback_fn fn, void *user_param)
3636 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3637 rte_errno = ENOTSUP;
3640 /* check input parameters */
3641 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3642 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3646 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3654 cb->param = user_param;
3656 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3657 /* Add the callbacks in fifo order. */
3658 struct rte_eth_rxtx_callback *tail =
3659 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3662 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3669 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3674 const struct rte_eth_rxtx_callback *
3675 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3676 rte_rx_callback_fn fn, void *user_param)
3678 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3679 rte_errno = ENOTSUP;
3682 /* check input parameters */
3683 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3684 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3689 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3697 cb->param = user_param;
3699 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3700 /* Add the callbacks at fisrt position*/
3701 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3703 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3704 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3709 const struct rte_eth_rxtx_callback *
3710 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3711 rte_tx_callback_fn fn, void *user_param)
3713 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3714 rte_errno = ENOTSUP;
3717 /* check input parameters */
3718 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3719 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3724 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3732 cb->param = user_param;
3734 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3735 /* Add the callbacks in fifo order. */
3736 struct rte_eth_rxtx_callback *tail =
3737 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3740 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3747 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3753 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3754 const struct rte_eth_rxtx_callback *user_cb)
3756 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3759 /* Check input parameters. */
3760 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3761 if (user_cb == NULL ||
3762 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3765 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3766 struct rte_eth_rxtx_callback *cb;
3767 struct rte_eth_rxtx_callback **prev_cb;
3770 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3771 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3772 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3774 if (cb == user_cb) {
3775 /* Remove the user cb from the callback list. */
3776 *prev_cb = cb->next;
3781 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3787 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3788 const struct rte_eth_rxtx_callback *user_cb)
3790 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3793 /* Check input parameters. */
3794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3795 if (user_cb == NULL ||
3796 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3799 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3801 struct rte_eth_rxtx_callback *cb;
3802 struct rte_eth_rxtx_callback **prev_cb;
3804 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3805 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3806 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3808 if (cb == user_cb) {
3809 /* Remove the user cb from the callback list. */
3810 *prev_cb = cb->next;
3815 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3821 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3822 struct rte_eth_rxq_info *qinfo)
3824 struct rte_eth_dev *dev;
3826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3831 dev = &rte_eth_devices[port_id];
3832 if (queue_id >= dev->data->nb_rx_queues) {
3833 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3837 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3839 memset(qinfo, 0, sizeof(*qinfo));
3840 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3845 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3846 struct rte_eth_txq_info *qinfo)
3848 struct rte_eth_dev *dev;
3850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3855 dev = &rte_eth_devices[port_id];
3856 if (queue_id >= dev->data->nb_tx_queues) {
3857 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3863 memset(qinfo, 0, sizeof(*qinfo));
3864 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3870 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3871 struct ether_addr *mc_addr_set,
3872 uint32_t nb_mc_addr)
3874 struct rte_eth_dev *dev;
3876 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3878 dev = &rte_eth_devices[port_id];
3879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3880 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3881 mc_addr_set, nb_mc_addr));
3885 rte_eth_timesync_enable(uint16_t port_id)
3887 struct rte_eth_dev *dev;
3889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3890 dev = &rte_eth_devices[port_id];
3892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3893 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3897 rte_eth_timesync_disable(uint16_t port_id)
3899 struct rte_eth_dev *dev;
3901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3902 dev = &rte_eth_devices[port_id];
3904 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3905 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3909 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3912 struct rte_eth_dev *dev;
3914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3915 dev = &rte_eth_devices[port_id];
3917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3918 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3919 (dev, timestamp, flags));
3923 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3924 struct timespec *timestamp)
3926 struct rte_eth_dev *dev;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3929 dev = &rte_eth_devices[port_id];
3931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3932 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3937 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3939 struct rte_eth_dev *dev;
3941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3942 dev = &rte_eth_devices[port_id];
3944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3945 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3950 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3952 struct rte_eth_dev *dev;
3954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3955 dev = &rte_eth_devices[port_id];
3957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3958 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3963 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3965 struct rte_eth_dev *dev;
3967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3968 dev = &rte_eth_devices[port_id];
3970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3971 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3976 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3978 struct rte_eth_dev *dev;
3980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 dev = &rte_eth_devices[port_id];
3983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3984 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3988 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3990 struct rte_eth_dev *dev;
3992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3994 dev = &rte_eth_devices[port_id];
3995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3996 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4000 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4002 struct rte_eth_dev *dev;
4004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4006 dev = &rte_eth_devices[port_id];
4007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4008 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4012 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4014 struct rte_eth_dev *dev;
4016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4018 dev = &rte_eth_devices[port_id];
4019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4020 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4023 int __rte_experimental
4024 rte_eth_dev_get_module_info(uint16_t port_id,
4025 struct rte_eth_dev_module_info *modinfo)
4027 struct rte_eth_dev *dev;
4029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4031 dev = &rte_eth_devices[port_id];
4032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4033 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4036 int __rte_experimental
4037 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4038 struct rte_dev_eeprom_info *info)
4040 struct rte_eth_dev *dev;
4042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4044 dev = &rte_eth_devices[port_id];
4045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4046 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4050 rte_eth_dev_get_dcb_info(uint16_t port_id,
4051 struct rte_eth_dcb_info *dcb_info)
4053 struct rte_eth_dev *dev;
4055 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4057 dev = &rte_eth_devices[port_id];
4058 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4061 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4065 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4066 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4068 struct rte_eth_dev *dev;
4070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4071 if (l2_tunnel == NULL) {
4072 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4076 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4077 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4081 dev = &rte_eth_devices[port_id];
4082 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4084 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4089 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4090 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4098 if (l2_tunnel == NULL) {
4099 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4103 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4104 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4109 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4113 dev = &rte_eth_devices[port_id];
4114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4116 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4117 l2_tunnel, mask, en));
4121 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4122 const struct rte_eth_desc_lim *desc_lim)
4124 if (desc_lim->nb_align != 0)
4125 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4127 if (desc_lim->nb_max != 0)
4128 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4130 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4134 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4135 uint16_t *nb_rx_desc,
4136 uint16_t *nb_tx_desc)
4138 struct rte_eth_dev *dev;
4139 struct rte_eth_dev_info dev_info;
4141 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4143 dev = &rte_eth_devices[port_id];
4144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4146 rte_eth_dev_info_get(port_id, &dev_info);
4148 if (nb_rx_desc != NULL)
4149 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4151 if (nb_tx_desc != NULL)
4152 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4158 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4160 struct rte_eth_dev *dev;
4162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4167 dev = &rte_eth_devices[port_id];
4169 if (*dev->dev_ops->pool_ops_supported == NULL)
4170 return 1; /* all pools are supported */
4172 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4176 * A set of values to describe the possible states of a switch domain.
4178 enum rte_eth_switch_domain_state {
4179 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4180 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4184 * Array of switch domains available for allocation. Array is sized to
4185 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4186 * ethdev ports in a single process.
4188 struct rte_eth_dev_switch {
4189 enum rte_eth_switch_domain_state state;
4190 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4192 int __rte_experimental
4193 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4197 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4199 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4200 i < RTE_MAX_ETHPORTS; i++) {
4201 if (rte_eth_switch_domains[i].state ==
4202 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4203 rte_eth_switch_domains[i].state =
4204 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4213 int __rte_experimental
4214 rte_eth_switch_domain_free(uint16_t domain_id)
4216 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4217 domain_id >= RTE_MAX_ETHPORTS)
4220 if (rte_eth_switch_domains[domain_id].state !=
4221 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4224 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4229 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4232 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4235 struct rte_kvargs_pair *pair;
4238 arglist->str = strdup(str_in);
4239 if (arglist->str == NULL)
4242 letter = arglist->str;
4245 pair = &arglist->pairs[0];
4248 case 0: /* Initial */
4251 else if (*letter == '\0')
4258 case 1: /* Parsing key */
4259 if (*letter == '=') {
4261 pair->value = letter + 1;
4263 } else if (*letter == ',' || *letter == '\0')
4268 case 2: /* Parsing value */
4271 else if (*letter == ',') {
4274 pair = &arglist->pairs[arglist->count];
4276 } else if (*letter == '\0') {
4279 pair = &arglist->pairs[arglist->count];
4284 case 3: /* Parsing list */
4287 else if (*letter == '\0')
4296 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4304 /* Single element, not a list */
4305 return callback(str, data);
4307 /* Sanity check, then strip the brackets */
4308 str_start = &str[strlen(str) - 1];
4309 if (*str_start != ']') {
4310 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4316 /* Process list elements */
4326 } else if (state == 1) {
4327 if (*str == ',' || *str == '\0') {
4328 if (str > str_start) {
4329 /* Non-empty string fragment */
4331 result = callback(str_start, data);
4344 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4345 const uint16_t max_list)
4347 uint16_t lo, hi, val;
4350 result = sscanf(str, "%hu-%hu", &lo, &hi);
4352 if (*len_list >= max_list)
4354 list[(*len_list)++] = lo;
4355 } else if (result == 2) {
4356 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4358 for (val = lo; val <= hi; val++) {
4359 if (*len_list >= max_list)
4361 list[(*len_list)++] = val;
4370 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4372 struct rte_eth_devargs *eth_da = data;
4374 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4375 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4378 int __rte_experimental
4379 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4381 struct rte_kvargs args;
4382 struct rte_kvargs_pair *pair;
4386 memset(eth_da, 0, sizeof(*eth_da));
4388 result = rte_eth_devargs_tokenise(&args, dargs);
4392 for (i = 0; i < args.count; i++) {
4393 pair = &args.pairs[i];
4394 if (strcmp("representor", pair->key) == 0) {
4395 result = rte_eth_devargs_parse_list(pair->value,
4396 rte_eth_devargs_parse_representor_ports,
4410 RTE_INIT(ethdev_init_log)
4412 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4413 if (rte_eth_dev_logtype >= 0)
4414 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);