1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_find_next(uint16_t port_id)
190 while (port_id < RTE_MAX_ETHPORTS &&
191 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
192 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
195 if (port_id >= RTE_MAX_ETHPORTS)
196 return RTE_MAX_ETHPORTS;
202 rte_eth_dev_shared_data_prepare(void)
204 const unsigned flags = 0;
205 const struct rte_memzone *mz;
207 rte_spinlock_lock(&rte_eth_shared_data_lock);
209 if (rte_eth_dev_shared_data == NULL) {
210 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
211 /* Allocate port data and ownership shared memory. */
212 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
213 sizeof(*rte_eth_dev_shared_data),
214 rte_socket_id(), flags);
216 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
218 rte_panic("Cannot allocate ethdev shared data\n");
220 rte_eth_dev_shared_data = mz->addr;
221 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
222 rte_eth_dev_shared_data->next_owner_id =
223 RTE_ETH_DEV_NO_OWNER + 1;
224 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
225 memset(rte_eth_dev_shared_data->data, 0,
226 sizeof(rte_eth_dev_shared_data->data));
230 rte_spinlock_unlock(&rte_eth_shared_data_lock);
234 is_allocated(const struct rte_eth_dev *ethdev)
236 return ethdev->data->name[0] != '\0';
239 static struct rte_eth_dev *
240 _rte_eth_dev_allocated(const char *name)
244 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
245 if (rte_eth_devices[i].data != NULL &&
246 strcmp(rte_eth_devices[i].data->name, name) == 0)
247 return &rte_eth_devices[i];
253 rte_eth_dev_allocated(const char *name)
255 struct rte_eth_dev *ethdev;
257 rte_eth_dev_shared_data_prepare();
259 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
261 ethdev = _rte_eth_dev_allocated(name);
263 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
269 rte_eth_dev_find_free_port(void)
273 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
274 /* Using shared name field to find a free port. */
275 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
276 RTE_ASSERT(rte_eth_devices[i].state ==
281 return RTE_MAX_ETHPORTS;
284 static struct rte_eth_dev *
285 eth_dev_get(uint16_t port_id)
287 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
289 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
291 eth_dev_last_created_port = port_id;
297 rte_eth_dev_allocate(const char *name)
300 struct rte_eth_dev *eth_dev = NULL;
302 rte_eth_dev_shared_data_prepare();
304 /* Synchronize port creation between primary and secondary threads. */
305 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
307 if (_rte_eth_dev_allocated(name) != NULL) {
309 "Ethernet device with name %s already allocated\n",
314 port_id = rte_eth_dev_find_free_port();
315 if (port_id == RTE_MAX_ETHPORTS) {
317 "Reached maximum number of Ethernet ports\n");
321 eth_dev = eth_dev_get(port_id);
322 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
323 eth_dev->data->port_id = port_id;
324 eth_dev->data->mtu = ETHER_MTU;
327 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
333 * Attach to a port already registered by the primary process, which
334 * makes sure that the same device would have the same port id both
335 * in the primary and secondary process.
338 rte_eth_dev_attach_secondary(const char *name)
341 struct rte_eth_dev *eth_dev = NULL;
343 rte_eth_dev_shared_data_prepare();
345 /* Synchronize port attachment to primary port creation and release. */
346 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
348 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
349 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
352 if (i == RTE_MAX_ETHPORTS) {
354 "Device %s is not driven by the primary process\n",
357 eth_dev = eth_dev_get(i);
358 RTE_ASSERT(eth_dev->data->port_id == i);
361 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
366 rte_eth_dev_release_port_secondary(struct rte_eth_dev *eth_dev)
371 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
372 eth_dev->state = RTE_ETH_DEV_UNUSED;
378 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
383 rte_eth_dev_shared_data_prepare();
385 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
387 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
389 eth_dev->state = RTE_ETH_DEV_UNUSED;
391 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
393 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
399 rte_eth_dev_is_valid_port(uint16_t port_id)
401 if (port_id >= RTE_MAX_ETHPORTS ||
402 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
409 rte_eth_is_valid_owner_id(uint64_t owner_id)
411 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
412 rte_eth_dev_shared_data->next_owner_id <= owner_id)
418 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
420 while (port_id < RTE_MAX_ETHPORTS &&
421 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
422 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
423 rte_eth_devices[port_id].data->owner.id != owner_id))
426 if (port_id >= RTE_MAX_ETHPORTS)
427 return RTE_MAX_ETHPORTS;
432 int __rte_experimental
433 rte_eth_dev_owner_new(uint64_t *owner_id)
435 rte_eth_dev_shared_data_prepare();
437 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
439 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
441 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
446 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
447 const struct rte_eth_dev_owner *new_owner)
449 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
450 struct rte_eth_dev_owner *port_owner;
453 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
454 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
459 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
460 !rte_eth_is_valid_owner_id(old_owner_id)) {
462 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
463 old_owner_id, new_owner->id);
467 port_owner = &rte_eth_devices[port_id].data->owner;
468 if (port_owner->id != old_owner_id) {
470 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
471 port_id, port_owner->name, port_owner->id);
475 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
477 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
478 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
481 port_owner->id = new_owner->id;
483 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
484 port_id, new_owner->name, new_owner->id);
489 int __rte_experimental
490 rte_eth_dev_owner_set(const uint16_t port_id,
491 const struct rte_eth_dev_owner *owner)
495 rte_eth_dev_shared_data_prepare();
497 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
499 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
501 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
505 int __rte_experimental
506 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
508 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
509 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
512 rte_eth_dev_shared_data_prepare();
514 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
516 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
518 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
522 void __rte_experimental
523 rte_eth_dev_owner_delete(const uint64_t owner_id)
527 rte_eth_dev_shared_data_prepare();
529 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
531 if (rte_eth_is_valid_owner_id(owner_id)) {
532 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
533 if (rte_eth_devices[port_id].data->owner.id == owner_id)
534 memset(&rte_eth_devices[port_id].data->owner, 0,
535 sizeof(struct rte_eth_dev_owner));
536 RTE_ETHDEV_LOG(NOTICE,
537 "All port owners owned by %016"PRIx64" identifier have removed\n",
541 "Invalid owner id=%016"PRIx64"\n",
545 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
548 int __rte_experimental
549 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
552 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
554 rte_eth_dev_shared_data_prepare();
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
559 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
563 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
566 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
571 rte_eth_dev_socket_id(uint16_t port_id)
573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
574 return rte_eth_devices[port_id].data->numa_node;
578 rte_eth_dev_get_sec_ctx(uint16_t port_id)
580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
581 return rte_eth_devices[port_id].security_ctx;
585 rte_eth_dev_count(void)
587 return rte_eth_dev_count_avail();
591 rte_eth_dev_count_avail(void)
598 RTE_ETH_FOREACH_DEV(p)
604 uint16_t __rte_experimental
605 rte_eth_dev_count_total(void)
607 uint16_t port, count = 0;
609 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
610 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
617 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
624 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
628 /* shouldn't check 'rte_eth_devices[i].data',
629 * because it might be overwritten by VDEV PMD */
630 tmp = rte_eth_dev_shared_data->data[port_id].name;
636 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
641 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
645 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
646 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
647 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
657 eth_err(uint16_t port_id, int ret)
661 if (rte_eth_dev_is_removed(port_id))
666 /* attach the new device, then store port_id of the device */
668 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
670 int current = rte_eth_dev_count_total();
671 struct rte_devargs da;
674 memset(&da, 0, sizeof(da));
676 if ((devargs == NULL) || (port_id == NULL)) {
682 if (rte_devargs_parse(&da, devargs))
685 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
689 /* no point looking at the port count if no port exists */
690 if (!rte_eth_dev_count_total()) {
691 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
696 /* if nothing happened, there is a bug here, since some driver told us
697 * it did attach a device, but did not create a port.
698 * FIXME: race condition in case of plug-out of another device
700 if (current == rte_eth_dev_count_total()) {
705 *port_id = eth_dev_last_created_port;
713 /* detach the device, then store the name of the device */
715 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
717 struct rte_device *dev;
722 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
724 dev_flags = rte_eth_devices[port_id].data->dev_flags;
725 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
727 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
731 dev = rte_eth_devices[port_id].device;
735 bus = rte_bus_find_by_device(dev);
739 ret = rte_eal_hotplug_remove(bus->name, dev->name);
743 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
748 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
750 uint16_t old_nb_queues = dev->data->nb_rx_queues;
754 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
755 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
756 sizeof(dev->data->rx_queues[0]) * nb_queues,
757 RTE_CACHE_LINE_SIZE);
758 if (dev->data->rx_queues == NULL) {
759 dev->data->nb_rx_queues = 0;
762 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
763 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
765 rxq = dev->data->rx_queues;
767 for (i = nb_queues; i < old_nb_queues; i++)
768 (*dev->dev_ops->rx_queue_release)(rxq[i]);
769 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
770 RTE_CACHE_LINE_SIZE);
773 if (nb_queues > old_nb_queues) {
774 uint16_t new_qs = nb_queues - old_nb_queues;
776 memset(rxq + old_nb_queues, 0,
777 sizeof(rxq[0]) * new_qs);
780 dev->data->rx_queues = rxq;
782 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
785 rxq = dev->data->rx_queues;
787 for (i = nb_queues; i < old_nb_queues; i++)
788 (*dev->dev_ops->rx_queue_release)(rxq[i]);
790 rte_free(dev->data->rx_queues);
791 dev->data->rx_queues = NULL;
793 dev->data->nb_rx_queues = nb_queues;
798 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
800 struct rte_eth_dev *dev;
802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
804 dev = &rte_eth_devices[port_id];
805 if (!dev->data->dev_started) {
807 "Port %u must be started before start any queue\n",
812 if (rx_queue_id >= dev->data->nb_rx_queues) {
813 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
819 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
821 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
822 rx_queue_id, port_id);
826 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
832 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
834 struct rte_eth_dev *dev;
836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
838 dev = &rte_eth_devices[port_id];
839 if (rx_queue_id >= dev->data->nb_rx_queues) {
840 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
846 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
848 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
849 rx_queue_id, port_id);
853 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
858 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
860 struct rte_eth_dev *dev;
862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
864 dev = &rte_eth_devices[port_id];
865 if (!dev->data->dev_started) {
867 "Port %u must be started before start any queue\n",
872 if (tx_queue_id >= dev->data->nb_tx_queues) {
873 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
879 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
881 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
882 tx_queue_id, port_id);
886 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
890 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
892 struct rte_eth_dev *dev;
894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
896 dev = &rte_eth_devices[port_id];
897 if (tx_queue_id >= dev->data->nb_tx_queues) {
898 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
904 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
906 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
907 tx_queue_id, port_id);
911 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
916 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
918 uint16_t old_nb_queues = dev->data->nb_tx_queues;
922 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
923 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
924 sizeof(dev->data->tx_queues[0]) * nb_queues,
925 RTE_CACHE_LINE_SIZE);
926 if (dev->data->tx_queues == NULL) {
927 dev->data->nb_tx_queues = 0;
930 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
933 txq = dev->data->tx_queues;
935 for (i = nb_queues; i < old_nb_queues; i++)
936 (*dev->dev_ops->tx_queue_release)(txq[i]);
937 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
938 RTE_CACHE_LINE_SIZE);
941 if (nb_queues > old_nb_queues) {
942 uint16_t new_qs = nb_queues - old_nb_queues;
944 memset(txq + old_nb_queues, 0,
945 sizeof(txq[0]) * new_qs);
948 dev->data->tx_queues = txq;
950 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
953 txq = dev->data->tx_queues;
955 for (i = nb_queues; i < old_nb_queues; i++)
956 (*dev->dev_ops->tx_queue_release)(txq[i]);
958 rte_free(dev->data->tx_queues);
959 dev->data->tx_queues = NULL;
961 dev->data->nb_tx_queues = nb_queues;
966 rte_eth_speed_bitflag(uint32_t speed, int duplex)
969 case ETH_SPEED_NUM_10M:
970 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
971 case ETH_SPEED_NUM_100M:
972 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
973 case ETH_SPEED_NUM_1G:
974 return ETH_LINK_SPEED_1G;
975 case ETH_SPEED_NUM_2_5G:
976 return ETH_LINK_SPEED_2_5G;
977 case ETH_SPEED_NUM_5G:
978 return ETH_LINK_SPEED_5G;
979 case ETH_SPEED_NUM_10G:
980 return ETH_LINK_SPEED_10G;
981 case ETH_SPEED_NUM_20G:
982 return ETH_LINK_SPEED_20G;
983 case ETH_SPEED_NUM_25G:
984 return ETH_LINK_SPEED_25G;
985 case ETH_SPEED_NUM_40G:
986 return ETH_LINK_SPEED_40G;
987 case ETH_SPEED_NUM_50G:
988 return ETH_LINK_SPEED_50G;
989 case ETH_SPEED_NUM_56G:
990 return ETH_LINK_SPEED_56G;
991 case ETH_SPEED_NUM_100G:
992 return ETH_LINK_SPEED_100G;
998 const char * __rte_experimental
999 rte_eth_dev_rx_offload_name(uint64_t offload)
1001 const char *name = "UNKNOWN";
1004 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1005 if (offload == rte_rx_offload_names[i].offload) {
1006 name = rte_rx_offload_names[i].name;
1014 const char * __rte_experimental
1015 rte_eth_dev_tx_offload_name(uint64_t offload)
1017 const char *name = "UNKNOWN";
1020 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1021 if (offload == rte_tx_offload_names[i].offload) {
1022 name = rte_tx_offload_names[i].name;
1031 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1032 const struct rte_eth_conf *dev_conf)
1034 struct rte_eth_dev *dev;
1035 struct rte_eth_dev_info dev_info;
1036 struct rte_eth_conf local_conf = *dev_conf;
1039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1041 dev = &rte_eth_devices[port_id];
1043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1046 rte_eth_dev_info_get(port_id, &dev_info);
1048 /* If number of queues specified by application for both Rx and Tx is
1049 * zero, use driver preferred values. This cannot be done individually
1050 * as it is valid for either Tx or Rx (but not both) to be zero.
1051 * If driver does not provide any preferred valued, fall back on
1054 if (nb_rx_q == 0 && nb_tx_q == 0) {
1055 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1057 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1058 nb_tx_q = dev_info.default_txportconf.nb_queues;
1060 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1063 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1065 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1066 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1070 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1072 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1073 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1077 if (dev->data->dev_started) {
1079 "Port %u must be stopped to allow configuration\n",
1084 /* Copy the dev_conf parameter into the dev structure */
1085 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1088 * Check that the numbers of RX and TX queues are not greater
1089 * than the maximum number of RX and TX queues supported by the
1090 * configured device.
1092 if (nb_rx_q > dev_info.max_rx_queues) {
1093 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1094 port_id, nb_rx_q, dev_info.max_rx_queues);
1098 if (nb_tx_q > dev_info.max_tx_queues) {
1099 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1100 port_id, nb_tx_q, dev_info.max_tx_queues);
1104 /* Check that the device supports requested interrupts */
1105 if ((dev_conf->intr_conf.lsc == 1) &&
1106 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1107 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1108 dev->device->driver->name);
1111 if ((dev_conf->intr_conf.rmv == 1) &&
1112 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1113 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1114 dev->device->driver->name);
1119 * If jumbo frames are enabled, check that the maximum RX packet
1120 * length is supported by the configured device.
1122 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1123 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1125 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1126 port_id, dev_conf->rxmode.max_rx_pkt_len,
1127 dev_info.max_rx_pktlen);
1129 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1131 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1132 port_id, dev_conf->rxmode.max_rx_pkt_len,
1133 (unsigned)ETHER_MIN_LEN);
1137 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1138 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1139 /* Use default value */
1140 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1144 /* Any requested offloading must be within its device capabilities */
1145 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1146 local_conf.rxmode.offloads) {
1148 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1149 "capabilities 0x%"PRIx64" in %s()\n",
1150 port_id, local_conf.rxmode.offloads,
1151 dev_info.rx_offload_capa,
1155 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1156 local_conf.txmode.offloads) {
1158 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1159 "capabilities 0x%"PRIx64" in %s()\n",
1160 port_id, local_conf.txmode.offloads,
1161 dev_info.tx_offload_capa,
1166 /* Check that device supports requested rss hash functions. */
1167 if ((dev_info.flow_type_rss_offloads |
1168 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1169 dev_info.flow_type_rss_offloads) {
1171 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1172 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1173 dev_info.flow_type_rss_offloads);
1178 * Setup new number of RX/TX queues and reconfigure device.
1180 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1183 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1188 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1191 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1193 rte_eth_dev_rx_queue_config(dev, 0);
1197 diag = (*dev->dev_ops->dev_configure)(dev);
1199 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1201 rte_eth_dev_rx_queue_config(dev, 0);
1202 rte_eth_dev_tx_queue_config(dev, 0);
1203 return eth_err(port_id, diag);
1206 /* Initialize Rx profiling if enabled at compilation time. */
1207 diag = __rte_eth_dev_profile_init(port_id, dev);
1209 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1211 rte_eth_dev_rx_queue_config(dev, 0);
1212 rte_eth_dev_tx_queue_config(dev, 0);
1213 return eth_err(port_id, diag);
1220 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1222 if (dev->data->dev_started) {
1223 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1224 dev->data->port_id);
1228 rte_eth_dev_rx_queue_config(dev, 0);
1229 rte_eth_dev_tx_queue_config(dev, 0);
1231 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1235 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1236 struct rte_eth_dev_info *dev_info)
1238 struct ether_addr *addr;
1243 /* replay MAC address configuration including default MAC */
1244 addr = &dev->data->mac_addrs[0];
1245 if (*dev->dev_ops->mac_addr_set != NULL)
1246 (*dev->dev_ops->mac_addr_set)(dev, addr);
1247 else if (*dev->dev_ops->mac_addr_add != NULL)
1248 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1250 if (*dev->dev_ops->mac_addr_add != NULL) {
1251 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1252 addr = &dev->data->mac_addrs[i];
1254 /* skip zero address */
1255 if (is_zero_ether_addr(addr))
1259 pool_mask = dev->data->mac_pool_sel[i];
1262 if (pool_mask & 1ULL)
1263 (*dev->dev_ops->mac_addr_add)(dev,
1267 } while (pool_mask);
1273 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1274 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1276 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1277 rte_eth_dev_mac_restore(dev, dev_info);
1279 /* replay promiscuous configuration */
1280 if (rte_eth_promiscuous_get(port_id) == 1)
1281 rte_eth_promiscuous_enable(port_id);
1282 else if (rte_eth_promiscuous_get(port_id) == 0)
1283 rte_eth_promiscuous_disable(port_id);
1285 /* replay all multicast configuration */
1286 if (rte_eth_allmulticast_get(port_id) == 1)
1287 rte_eth_allmulticast_enable(port_id);
1288 else if (rte_eth_allmulticast_get(port_id) == 0)
1289 rte_eth_allmulticast_disable(port_id);
1293 rte_eth_dev_start(uint16_t port_id)
1295 struct rte_eth_dev *dev;
1296 struct rte_eth_dev_info dev_info;
1299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1301 dev = &rte_eth_devices[port_id];
1303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1305 if (dev->data->dev_started != 0) {
1306 RTE_ETHDEV_LOG(INFO,
1307 "Device with port_id=%"PRIu16" already started\n",
1312 rte_eth_dev_info_get(port_id, &dev_info);
1314 /* Lets restore MAC now if device does not support live change */
1315 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1316 rte_eth_dev_mac_restore(dev, &dev_info);
1318 diag = (*dev->dev_ops->dev_start)(dev);
1320 dev->data->dev_started = 1;
1322 return eth_err(port_id, diag);
1324 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1326 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1328 (*dev->dev_ops->link_update)(dev, 0);
1334 rte_eth_dev_stop(uint16_t port_id)
1336 struct rte_eth_dev *dev;
1338 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1339 dev = &rte_eth_devices[port_id];
1341 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1343 if (dev->data->dev_started == 0) {
1344 RTE_ETHDEV_LOG(INFO,
1345 "Device with port_id=%"PRIu16" already stopped\n",
1350 dev->data->dev_started = 0;
1351 (*dev->dev_ops->dev_stop)(dev);
1355 rte_eth_dev_set_link_up(uint16_t port_id)
1357 struct rte_eth_dev *dev;
1359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1361 dev = &rte_eth_devices[port_id];
1363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1364 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1368 rte_eth_dev_set_link_down(uint16_t port_id)
1370 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1374 dev = &rte_eth_devices[port_id];
1376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1377 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1381 rte_eth_dev_close(uint16_t port_id)
1383 struct rte_eth_dev *dev;
1385 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1386 dev = &rte_eth_devices[port_id];
1388 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1389 dev->data->dev_started = 0;
1390 (*dev->dev_ops->dev_close)(dev);
1392 dev->data->nb_rx_queues = 0;
1393 rte_free(dev->data->rx_queues);
1394 dev->data->rx_queues = NULL;
1395 dev->data->nb_tx_queues = 0;
1396 rte_free(dev->data->tx_queues);
1397 dev->data->tx_queues = NULL;
1401 rte_eth_dev_reset(uint16_t port_id)
1403 struct rte_eth_dev *dev;
1406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1407 dev = &rte_eth_devices[port_id];
1409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1411 rte_eth_dev_stop(port_id);
1412 ret = dev->dev_ops->dev_reset(dev);
1414 return eth_err(port_id, ret);
1417 int __rte_experimental
1418 rte_eth_dev_is_removed(uint16_t port_id)
1420 struct rte_eth_dev *dev;
1423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1425 dev = &rte_eth_devices[port_id];
1427 if (dev->state == RTE_ETH_DEV_REMOVED)
1430 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1432 ret = dev->dev_ops->is_removed(dev);
1434 /* Device is physically removed. */
1435 dev->state = RTE_ETH_DEV_REMOVED;
1441 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1442 uint16_t nb_rx_desc, unsigned int socket_id,
1443 const struct rte_eth_rxconf *rx_conf,
1444 struct rte_mempool *mp)
1447 uint32_t mbp_buf_size;
1448 struct rte_eth_dev *dev;
1449 struct rte_eth_dev_info dev_info;
1450 struct rte_eth_rxconf local_conf;
1453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1455 dev = &rte_eth_devices[port_id];
1456 if (rx_queue_id >= dev->data->nb_rx_queues) {
1457 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1465 * Check the size of the mbuf data buffer.
1466 * This value must be provided in the private data of the memory pool.
1467 * First check that the memory pool has a valid private data.
1469 rte_eth_dev_info_get(port_id, &dev_info);
1470 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1471 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1472 mp->name, (int)mp->private_data_size,
1473 (int)sizeof(struct rte_pktmbuf_pool_private));
1476 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1478 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1480 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1481 mp->name, (int)mbp_buf_size,
1482 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1483 (int)RTE_PKTMBUF_HEADROOM,
1484 (int)dev_info.min_rx_bufsize);
1488 /* Use default specified by driver, if nb_rx_desc is zero */
1489 if (nb_rx_desc == 0) {
1490 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1491 /* If driver default is also zero, fall back on EAL default */
1492 if (nb_rx_desc == 0)
1493 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1496 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1497 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1498 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1501 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1502 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1503 dev_info.rx_desc_lim.nb_min,
1504 dev_info.rx_desc_lim.nb_align);
1508 if (dev->data->dev_started &&
1509 !(dev_info.dev_capa &
1510 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1513 if (dev->data->dev_started &&
1514 (dev->data->rx_queue_state[rx_queue_id] !=
1515 RTE_ETH_QUEUE_STATE_STOPPED))
1518 rxq = dev->data->rx_queues;
1519 if (rxq[rx_queue_id]) {
1520 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1522 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1523 rxq[rx_queue_id] = NULL;
1526 if (rx_conf == NULL)
1527 rx_conf = &dev_info.default_rxconf;
1529 local_conf = *rx_conf;
1532 * If an offloading has already been enabled in
1533 * rte_eth_dev_configure(), it has been enabled on all queues,
1534 * so there is no need to enable it in this queue again.
1535 * The local_conf.offloads input to underlying PMD only carries
1536 * those offloadings which are only enabled on this queue and
1537 * not enabled on all queues.
1539 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1542 * New added offloadings for this queue are those not enabled in
1543 * rte_eth_dev_configure() and they must be per-queue type.
1544 * A pure per-port offloading can't be enabled on a queue while
1545 * disabled on another queue. A pure per-port offloading can't
1546 * be enabled for any queue as new added one if it hasn't been
1547 * enabled in rte_eth_dev_configure().
1549 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1550 local_conf.offloads) {
1552 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1553 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1554 port_id, rx_queue_id, local_conf.offloads,
1555 dev_info.rx_queue_offload_capa,
1560 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1561 socket_id, &local_conf, mp);
1563 if (!dev->data->min_rx_buf_size ||
1564 dev->data->min_rx_buf_size > mbp_buf_size)
1565 dev->data->min_rx_buf_size = mbp_buf_size;
1568 return eth_err(port_id, ret);
1572 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1573 uint16_t nb_tx_desc, unsigned int socket_id,
1574 const struct rte_eth_txconf *tx_conf)
1576 struct rte_eth_dev *dev;
1577 struct rte_eth_dev_info dev_info;
1578 struct rte_eth_txconf local_conf;
1581 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1583 dev = &rte_eth_devices[port_id];
1584 if (tx_queue_id >= dev->data->nb_tx_queues) {
1585 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1590 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1592 rte_eth_dev_info_get(port_id, &dev_info);
1594 /* Use default specified by driver, if nb_tx_desc is zero */
1595 if (nb_tx_desc == 0) {
1596 nb_tx_desc = dev_info.default_txportconf.ring_size;
1597 /* If driver default is zero, fall back on EAL default */
1598 if (nb_tx_desc == 0)
1599 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1601 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1602 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1603 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1605 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1606 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1607 dev_info.tx_desc_lim.nb_min,
1608 dev_info.tx_desc_lim.nb_align);
1612 if (dev->data->dev_started &&
1613 !(dev_info.dev_capa &
1614 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1617 if (dev->data->dev_started &&
1618 (dev->data->tx_queue_state[tx_queue_id] !=
1619 RTE_ETH_QUEUE_STATE_STOPPED))
1622 txq = dev->data->tx_queues;
1623 if (txq[tx_queue_id]) {
1624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1626 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1627 txq[tx_queue_id] = NULL;
1630 if (tx_conf == NULL)
1631 tx_conf = &dev_info.default_txconf;
1633 local_conf = *tx_conf;
1636 * If an offloading has already been enabled in
1637 * rte_eth_dev_configure(), it has been enabled on all queues,
1638 * so there is no need to enable it in this queue again.
1639 * The local_conf.offloads input to underlying PMD only carries
1640 * those offloadings which are only enabled on this queue and
1641 * not enabled on all queues.
1643 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1646 * New added offloadings for this queue are those not enabled in
1647 * rte_eth_dev_configure() and they must be per-queue type.
1648 * A pure per-port offloading can't be enabled on a queue while
1649 * disabled on another queue. A pure per-port offloading can't
1650 * be enabled for any queue as new added one if it hasn't been
1651 * enabled in rte_eth_dev_configure().
1653 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1654 local_conf.offloads) {
1656 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1657 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1658 port_id, tx_queue_id, local_conf.offloads,
1659 dev_info.tx_queue_offload_capa,
1664 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1665 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1669 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1670 void *userdata __rte_unused)
1674 for (i = 0; i < unsent; i++)
1675 rte_pktmbuf_free(pkts[i]);
1679 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1682 uint64_t *count = userdata;
1685 for (i = 0; i < unsent; i++)
1686 rte_pktmbuf_free(pkts[i]);
1692 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1693 buffer_tx_error_fn cbfn, void *userdata)
1695 buffer->error_callback = cbfn;
1696 buffer->error_userdata = userdata;
1701 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1708 buffer->size = size;
1709 if (buffer->error_callback == NULL) {
1710 ret = rte_eth_tx_buffer_set_err_callback(
1711 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1718 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1720 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1723 /* Validate Input Data. Bail if not valid or not supported. */
1724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1727 /* Call driver to free pending mbufs. */
1728 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1730 return eth_err(port_id, ret);
1734 rte_eth_promiscuous_enable(uint16_t port_id)
1736 struct rte_eth_dev *dev;
1738 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1739 dev = &rte_eth_devices[port_id];
1741 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1742 (*dev->dev_ops->promiscuous_enable)(dev);
1743 dev->data->promiscuous = 1;
1747 rte_eth_promiscuous_disable(uint16_t port_id)
1749 struct rte_eth_dev *dev;
1751 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1752 dev = &rte_eth_devices[port_id];
1754 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1755 dev->data->promiscuous = 0;
1756 (*dev->dev_ops->promiscuous_disable)(dev);
1760 rte_eth_promiscuous_get(uint16_t port_id)
1762 struct rte_eth_dev *dev;
1764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1766 dev = &rte_eth_devices[port_id];
1767 return dev->data->promiscuous;
1771 rte_eth_allmulticast_enable(uint16_t port_id)
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1776 dev = &rte_eth_devices[port_id];
1778 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1779 (*dev->dev_ops->allmulticast_enable)(dev);
1780 dev->data->all_multicast = 1;
1784 rte_eth_allmulticast_disable(uint16_t port_id)
1786 struct rte_eth_dev *dev;
1788 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1789 dev = &rte_eth_devices[port_id];
1791 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1792 dev->data->all_multicast = 0;
1793 (*dev->dev_ops->allmulticast_disable)(dev);
1797 rte_eth_allmulticast_get(uint16_t port_id)
1799 struct rte_eth_dev *dev;
1801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1803 dev = &rte_eth_devices[port_id];
1804 return dev->data->all_multicast;
1808 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1810 struct rte_eth_dev *dev;
1812 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1813 dev = &rte_eth_devices[port_id];
1815 if (dev->data->dev_conf.intr_conf.lsc &&
1816 dev->data->dev_started)
1817 rte_eth_linkstatus_get(dev, eth_link);
1819 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1820 (*dev->dev_ops->link_update)(dev, 1);
1821 *eth_link = dev->data->dev_link;
1826 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1828 struct rte_eth_dev *dev;
1830 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1831 dev = &rte_eth_devices[port_id];
1833 if (dev->data->dev_conf.intr_conf.lsc &&
1834 dev->data->dev_started)
1835 rte_eth_linkstatus_get(dev, eth_link);
1837 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1838 (*dev->dev_ops->link_update)(dev, 0);
1839 *eth_link = dev->data->dev_link;
1844 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1846 struct rte_eth_dev *dev;
1848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1850 dev = &rte_eth_devices[port_id];
1851 memset(stats, 0, sizeof(*stats));
1853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1854 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1855 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1859 rte_eth_stats_reset(uint16_t port_id)
1861 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1864 dev = &rte_eth_devices[port_id];
1866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1867 (*dev->dev_ops->stats_reset)(dev);
1868 dev->data->rx_mbuf_alloc_failed = 0;
1874 get_xstats_basic_count(struct rte_eth_dev *dev)
1876 uint16_t nb_rxqs, nb_txqs;
1879 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1880 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1882 count = RTE_NB_STATS;
1883 count += nb_rxqs * RTE_NB_RXQ_STATS;
1884 count += nb_txqs * RTE_NB_TXQ_STATS;
1890 get_xstats_count(uint16_t port_id)
1892 struct rte_eth_dev *dev;
1895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1896 dev = &rte_eth_devices[port_id];
1897 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1898 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1901 return eth_err(port_id, count);
1903 if (dev->dev_ops->xstats_get_names != NULL) {
1904 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1906 return eth_err(port_id, count);
1911 count += get_xstats_basic_count(dev);
1917 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1920 int cnt_xstats, idx_xstat;
1922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1925 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1930 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1935 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1936 if (cnt_xstats < 0) {
1937 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1941 /* Get id-name lookup table */
1942 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1944 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1945 port_id, xstats_names, cnt_xstats, NULL)) {
1946 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1950 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1951 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1960 /* retrieve basic stats names */
1962 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1963 struct rte_eth_xstat_name *xstats_names)
1965 int cnt_used_entries = 0;
1966 uint32_t idx, id_queue;
1969 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1970 snprintf(xstats_names[cnt_used_entries].name,
1971 sizeof(xstats_names[0].name),
1972 "%s", rte_stats_strings[idx].name);
1975 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1976 for (id_queue = 0; id_queue < num_q; id_queue++) {
1977 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1978 snprintf(xstats_names[cnt_used_entries].name,
1979 sizeof(xstats_names[0].name),
1981 id_queue, rte_rxq_stats_strings[idx].name);
1986 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1987 for (id_queue = 0; id_queue < num_q; id_queue++) {
1988 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1989 snprintf(xstats_names[cnt_used_entries].name,
1990 sizeof(xstats_names[0].name),
1992 id_queue, rte_txq_stats_strings[idx].name);
1996 return cnt_used_entries;
1999 /* retrieve ethdev extended statistics names */
2001 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2002 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2005 struct rte_eth_xstat_name *xstats_names_copy;
2006 unsigned int no_basic_stat_requested = 1;
2007 unsigned int no_ext_stat_requested = 1;
2008 unsigned int expected_entries;
2009 unsigned int basic_count;
2010 struct rte_eth_dev *dev;
2014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2015 dev = &rte_eth_devices[port_id];
2017 basic_count = get_xstats_basic_count(dev);
2018 ret = get_xstats_count(port_id);
2021 expected_entries = (unsigned int)ret;
2023 /* Return max number of stats if no ids given */
2026 return expected_entries;
2027 else if (xstats_names && size < expected_entries)
2028 return expected_entries;
2031 if (ids && !xstats_names)
2034 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2035 uint64_t ids_copy[size];
2037 for (i = 0; i < size; i++) {
2038 if (ids[i] < basic_count) {
2039 no_basic_stat_requested = 0;
2044 * Convert ids to xstats ids that PMD knows.
2045 * ids known by user are basic + extended stats.
2047 ids_copy[i] = ids[i] - basic_count;
2050 if (no_basic_stat_requested)
2051 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2052 xstats_names, ids_copy, size);
2055 /* Retrieve all stats */
2057 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2059 if (num_stats < 0 || num_stats > (int)expected_entries)
2062 return expected_entries;
2065 xstats_names_copy = calloc(expected_entries,
2066 sizeof(struct rte_eth_xstat_name));
2068 if (!xstats_names_copy) {
2069 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2074 for (i = 0; i < size; i++) {
2075 if (ids[i] >= basic_count) {
2076 no_ext_stat_requested = 0;
2082 /* Fill xstats_names_copy structure */
2083 if (ids && no_ext_stat_requested) {
2084 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2086 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2089 free(xstats_names_copy);
2095 for (i = 0; i < size; i++) {
2096 if (ids[i] >= expected_entries) {
2097 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2098 free(xstats_names_copy);
2101 xstats_names[i] = xstats_names_copy[ids[i]];
2104 free(xstats_names_copy);
2109 rte_eth_xstats_get_names(uint16_t port_id,
2110 struct rte_eth_xstat_name *xstats_names,
2113 struct rte_eth_dev *dev;
2114 int cnt_used_entries;
2115 int cnt_expected_entries;
2116 int cnt_driver_entries;
2118 cnt_expected_entries = get_xstats_count(port_id);
2119 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2120 (int)size < cnt_expected_entries)
2121 return cnt_expected_entries;
2123 /* port_id checked in get_xstats_count() */
2124 dev = &rte_eth_devices[port_id];
2126 cnt_used_entries = rte_eth_basic_stats_get_names(
2129 if (dev->dev_ops->xstats_get_names != NULL) {
2130 /* If there are any driver-specific xstats, append them
2133 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2135 xstats_names + cnt_used_entries,
2136 size - cnt_used_entries);
2137 if (cnt_driver_entries < 0)
2138 return eth_err(port_id, cnt_driver_entries);
2139 cnt_used_entries += cnt_driver_entries;
2142 return cnt_used_entries;
2147 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2149 struct rte_eth_dev *dev;
2150 struct rte_eth_stats eth_stats;
2151 unsigned int count = 0, i, q;
2152 uint64_t val, *stats_ptr;
2153 uint16_t nb_rxqs, nb_txqs;
2156 ret = rte_eth_stats_get(port_id, ð_stats);
2160 dev = &rte_eth_devices[port_id];
2162 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2163 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2166 for (i = 0; i < RTE_NB_STATS; i++) {
2167 stats_ptr = RTE_PTR_ADD(ð_stats,
2168 rte_stats_strings[i].offset);
2170 xstats[count++].value = val;
2174 for (q = 0; q < nb_rxqs; q++) {
2175 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2176 stats_ptr = RTE_PTR_ADD(ð_stats,
2177 rte_rxq_stats_strings[i].offset +
2178 q * sizeof(uint64_t));
2180 xstats[count++].value = val;
2185 for (q = 0; q < nb_txqs; q++) {
2186 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2187 stats_ptr = RTE_PTR_ADD(ð_stats,
2188 rte_txq_stats_strings[i].offset +
2189 q * sizeof(uint64_t));
2191 xstats[count++].value = val;
2197 /* retrieve ethdev extended statistics */
2199 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2200 uint64_t *values, unsigned int size)
2202 unsigned int no_basic_stat_requested = 1;
2203 unsigned int no_ext_stat_requested = 1;
2204 unsigned int num_xstats_filled;
2205 unsigned int basic_count;
2206 uint16_t expected_entries;
2207 struct rte_eth_dev *dev;
2211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2212 ret = get_xstats_count(port_id);
2215 expected_entries = (uint16_t)ret;
2216 struct rte_eth_xstat xstats[expected_entries];
2217 dev = &rte_eth_devices[port_id];
2218 basic_count = get_xstats_basic_count(dev);
2220 /* Return max number of stats if no ids given */
2223 return expected_entries;
2224 else if (values && size < expected_entries)
2225 return expected_entries;
2231 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2232 unsigned int basic_count = get_xstats_basic_count(dev);
2233 uint64_t ids_copy[size];
2235 for (i = 0; i < size; i++) {
2236 if (ids[i] < basic_count) {
2237 no_basic_stat_requested = 0;
2242 * Convert ids to xstats ids that PMD knows.
2243 * ids known by user are basic + extended stats.
2245 ids_copy[i] = ids[i] - basic_count;
2248 if (no_basic_stat_requested)
2249 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2254 for (i = 0; i < size; i++) {
2255 if (ids[i] >= basic_count) {
2256 no_ext_stat_requested = 0;
2262 /* Fill the xstats structure */
2263 if (ids && no_ext_stat_requested)
2264 ret = rte_eth_basic_stats_get(port_id, xstats);
2266 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2270 num_xstats_filled = (unsigned int)ret;
2272 /* Return all stats */
2274 for (i = 0; i < num_xstats_filled; i++)
2275 values[i] = xstats[i].value;
2276 return expected_entries;
2280 for (i = 0; i < size; i++) {
2281 if (ids[i] >= expected_entries) {
2282 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2285 values[i] = xstats[ids[i]].value;
2291 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2294 struct rte_eth_dev *dev;
2295 unsigned int count = 0, i;
2296 signed int xcount = 0;
2297 uint16_t nb_rxqs, nb_txqs;
2300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2302 dev = &rte_eth_devices[port_id];
2304 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2305 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2307 /* Return generic statistics */
2308 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2309 (nb_txqs * RTE_NB_TXQ_STATS);
2311 /* implemented by the driver */
2312 if (dev->dev_ops->xstats_get != NULL) {
2313 /* Retrieve the xstats from the driver at the end of the
2316 xcount = (*dev->dev_ops->xstats_get)(dev,
2317 xstats ? xstats + count : NULL,
2318 (n > count) ? n - count : 0);
2321 return eth_err(port_id, xcount);
2324 if (n < count + xcount || xstats == NULL)
2325 return count + xcount;
2327 /* now fill the xstats structure */
2328 ret = rte_eth_basic_stats_get(port_id, xstats);
2333 for (i = 0; i < count; i++)
2335 /* add an offset to driver-specific stats */
2336 for ( ; i < count + xcount; i++)
2337 xstats[i].id += count;
2339 return count + xcount;
2342 /* reset ethdev extended statistics */
2344 rte_eth_xstats_reset(uint16_t port_id)
2346 struct rte_eth_dev *dev;
2348 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2349 dev = &rte_eth_devices[port_id];
2351 /* implemented by the driver */
2352 if (dev->dev_ops->xstats_reset != NULL) {
2353 (*dev->dev_ops->xstats_reset)(dev);
2357 /* fallback to default */
2358 rte_eth_stats_reset(port_id);
2362 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2365 struct rte_eth_dev *dev;
2367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2369 dev = &rte_eth_devices[port_id];
2371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2373 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2376 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2379 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2382 return (*dev->dev_ops->queue_stats_mapping_set)
2383 (dev, queue_id, stat_idx, is_rx);
2388 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2391 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2392 stat_idx, STAT_QMAP_TX));
2397 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2400 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2401 stat_idx, STAT_QMAP_RX));
2405 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2407 struct rte_eth_dev *dev;
2409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2410 dev = &rte_eth_devices[port_id];
2412 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2413 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2414 fw_version, fw_size));
2418 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2420 struct rte_eth_dev *dev;
2421 const struct rte_eth_desc_lim lim = {
2422 .nb_max = UINT16_MAX,
2427 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2428 dev = &rte_eth_devices[port_id];
2430 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2431 dev_info->rx_desc_lim = lim;
2432 dev_info->tx_desc_lim = lim;
2433 dev_info->device = dev->device;
2435 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2436 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2437 dev_info->driver_name = dev->device->driver->name;
2438 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2439 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2441 dev_info->dev_flags = &dev->data->dev_flags;
2445 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2446 uint32_t *ptypes, int num)
2449 struct rte_eth_dev *dev;
2450 const uint32_t *all_ptypes;
2452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2453 dev = &rte_eth_devices[port_id];
2454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2455 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2460 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2461 if (all_ptypes[i] & ptype_mask) {
2463 ptypes[j] = all_ptypes[i];
2471 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2473 struct rte_eth_dev *dev;
2475 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2476 dev = &rte_eth_devices[port_id];
2477 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2482 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2484 struct rte_eth_dev *dev;
2486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2488 dev = &rte_eth_devices[port_id];
2489 *mtu = dev->data->mtu;
2494 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2497 struct rte_eth_dev *dev;
2499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2500 dev = &rte_eth_devices[port_id];
2501 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2503 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2505 dev->data->mtu = mtu;
2507 return eth_err(port_id, ret);
2511 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2513 struct rte_eth_dev *dev;
2516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2517 dev = &rte_eth_devices[port_id];
2518 if (!(dev->data->dev_conf.rxmode.offloads &
2519 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2520 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2525 if (vlan_id > 4095) {
2526 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2532 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2534 struct rte_vlan_filter_conf *vfc;
2538 vfc = &dev->data->vlan_filter_conf;
2539 vidx = vlan_id / 64;
2540 vbit = vlan_id % 64;
2543 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2545 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2548 return eth_err(port_id, ret);
2552 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2555 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 dev = &rte_eth_devices[port_id];
2559 if (rx_queue_id >= dev->data->nb_rx_queues) {
2560 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2565 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2571 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2572 enum rte_vlan_type vlan_type,
2575 struct rte_eth_dev *dev;
2577 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2578 dev = &rte_eth_devices[port_id];
2579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2581 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2586 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2588 struct rte_eth_dev *dev;
2592 uint64_t orig_offloads;
2594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2595 dev = &rte_eth_devices[port_id];
2597 /* save original values in case of failure */
2598 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2600 /*check which option changed by application*/
2601 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2602 org = !!(dev->data->dev_conf.rxmode.offloads &
2603 DEV_RX_OFFLOAD_VLAN_STRIP);
2606 dev->data->dev_conf.rxmode.offloads |=
2607 DEV_RX_OFFLOAD_VLAN_STRIP;
2609 dev->data->dev_conf.rxmode.offloads &=
2610 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2611 mask |= ETH_VLAN_STRIP_MASK;
2614 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2615 org = !!(dev->data->dev_conf.rxmode.offloads &
2616 DEV_RX_OFFLOAD_VLAN_FILTER);
2619 dev->data->dev_conf.rxmode.offloads |=
2620 DEV_RX_OFFLOAD_VLAN_FILTER;
2622 dev->data->dev_conf.rxmode.offloads &=
2623 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2624 mask |= ETH_VLAN_FILTER_MASK;
2627 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2628 org = !!(dev->data->dev_conf.rxmode.offloads &
2629 DEV_RX_OFFLOAD_VLAN_EXTEND);
2632 dev->data->dev_conf.rxmode.offloads |=
2633 DEV_RX_OFFLOAD_VLAN_EXTEND;
2635 dev->data->dev_conf.rxmode.offloads &=
2636 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2637 mask |= ETH_VLAN_EXTEND_MASK;
2644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2645 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2647 /* hit an error restore original values */
2648 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2651 return eth_err(port_id, ret);
2655 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2657 struct rte_eth_dev *dev;
2660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2661 dev = &rte_eth_devices[port_id];
2663 if (dev->data->dev_conf.rxmode.offloads &
2664 DEV_RX_OFFLOAD_VLAN_STRIP)
2665 ret |= ETH_VLAN_STRIP_OFFLOAD;
2667 if (dev->data->dev_conf.rxmode.offloads &
2668 DEV_RX_OFFLOAD_VLAN_FILTER)
2669 ret |= ETH_VLAN_FILTER_OFFLOAD;
2671 if (dev->data->dev_conf.rxmode.offloads &
2672 DEV_RX_OFFLOAD_VLAN_EXTEND)
2673 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2679 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2681 struct rte_eth_dev *dev;
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2684 dev = &rte_eth_devices[port_id];
2685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2687 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2691 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2693 struct rte_eth_dev *dev;
2695 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2696 dev = &rte_eth_devices[port_id];
2697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2698 memset(fc_conf, 0, sizeof(*fc_conf));
2699 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2703 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2705 struct rte_eth_dev *dev;
2707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2708 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2709 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2713 dev = &rte_eth_devices[port_id];
2714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2715 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2719 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2720 struct rte_eth_pfc_conf *pfc_conf)
2722 struct rte_eth_dev *dev;
2724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2725 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2726 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2730 dev = &rte_eth_devices[port_id];
2731 /* High water, low water validation are device specific */
2732 if (*dev->dev_ops->priority_flow_ctrl_set)
2733 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2739 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2747 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2748 for (i = 0; i < num; i++) {
2749 if (reta_conf[i].mask)
2757 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2761 uint16_t i, idx, shift;
2767 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2771 for (i = 0; i < reta_size; i++) {
2772 idx = i / RTE_RETA_GROUP_SIZE;
2773 shift = i % RTE_RETA_GROUP_SIZE;
2774 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2775 (reta_conf[idx].reta[shift] >= max_rxq)) {
2777 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2779 reta_conf[idx].reta[shift], max_rxq);
2788 rte_eth_dev_rss_reta_update(uint16_t port_id,
2789 struct rte_eth_rss_reta_entry64 *reta_conf,
2792 struct rte_eth_dev *dev;
2795 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2796 /* Check mask bits */
2797 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2801 dev = &rte_eth_devices[port_id];
2803 /* Check entry value */
2804 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2805 dev->data->nb_rx_queues);
2809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2810 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2815 rte_eth_dev_rss_reta_query(uint16_t port_id,
2816 struct rte_eth_rss_reta_entry64 *reta_conf,
2819 struct rte_eth_dev *dev;
2822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2824 /* Check mask bits */
2825 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2829 dev = &rte_eth_devices[port_id];
2830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2831 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2836 rte_eth_dev_rss_hash_update(uint16_t port_id,
2837 struct rte_eth_rss_conf *rss_conf)
2839 struct rte_eth_dev *dev;
2840 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2843 dev = &rte_eth_devices[port_id];
2844 rte_eth_dev_info_get(port_id, &dev_info);
2845 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2846 dev_info.flow_type_rss_offloads) {
2848 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2849 port_id, rss_conf->rss_hf,
2850 dev_info.flow_type_rss_offloads);
2853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2854 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2859 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2860 struct rte_eth_rss_conf *rss_conf)
2862 struct rte_eth_dev *dev;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 dev = &rte_eth_devices[port_id];
2866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2867 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2872 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2873 struct rte_eth_udp_tunnel *udp_tunnel)
2875 struct rte_eth_dev *dev;
2877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2878 if (udp_tunnel == NULL) {
2879 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2883 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2884 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2888 dev = &rte_eth_devices[port_id];
2889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2890 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2895 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2896 struct rte_eth_udp_tunnel *udp_tunnel)
2898 struct rte_eth_dev *dev;
2900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2901 dev = &rte_eth_devices[port_id];
2903 if (udp_tunnel == NULL) {
2904 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2908 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2909 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2914 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2919 rte_eth_led_on(uint16_t port_id)
2921 struct rte_eth_dev *dev;
2923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2924 dev = &rte_eth_devices[port_id];
2925 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2926 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2930 rte_eth_led_off(uint16_t port_id)
2932 struct rte_eth_dev *dev;
2934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2935 dev = &rte_eth_devices[port_id];
2936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2937 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2941 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2945 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2947 struct rte_eth_dev_info dev_info;
2948 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2952 rte_eth_dev_info_get(port_id, &dev_info);
2954 for (i = 0; i < dev_info.max_mac_addrs; i++)
2955 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2961 static const struct ether_addr null_mac_addr;
2964 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2967 struct rte_eth_dev *dev;
2972 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2973 dev = &rte_eth_devices[port_id];
2974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2976 if (is_zero_ether_addr(addr)) {
2977 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2981 if (pool >= ETH_64_POOLS) {
2982 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2986 index = get_mac_addr_index(port_id, addr);
2988 index = get_mac_addr_index(port_id, &null_mac_addr);
2990 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2995 pool_mask = dev->data->mac_pool_sel[index];
2997 /* Check if both MAC address and pool is already there, and do nothing */
2998 if (pool_mask & (1ULL << pool))
3003 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3006 /* Update address in NIC data structure */
3007 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3009 /* Update pool bitmap in NIC data structure */
3010 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3013 return eth_err(port_id, ret);
3017 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3019 struct rte_eth_dev *dev;
3022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3023 dev = &rte_eth_devices[port_id];
3024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3026 index = get_mac_addr_index(port_id, addr);
3029 "Port %u: Cannot remove default MAC address\n",
3032 } else if (index < 0)
3033 return 0; /* Do nothing if address wasn't found */
3036 (*dev->dev_ops->mac_addr_remove)(dev, index);
3038 /* Update address in NIC data structure */
3039 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3041 /* reset pool bitmap */
3042 dev->data->mac_pool_sel[index] = 0;
3048 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3050 struct rte_eth_dev *dev;
3053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3055 if (!is_valid_assigned_ether_addr(addr))
3058 dev = &rte_eth_devices[port_id];
3059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3061 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3065 /* Update default address in NIC data structure */
3066 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3073 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3077 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3079 struct rte_eth_dev_info dev_info;
3080 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3083 rte_eth_dev_info_get(port_id, &dev_info);
3084 if (!dev->data->hash_mac_addrs)
3087 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3088 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3089 ETHER_ADDR_LEN) == 0)
3096 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3101 struct rte_eth_dev *dev;
3103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3105 dev = &rte_eth_devices[port_id];
3106 if (is_zero_ether_addr(addr)) {
3107 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3112 index = get_hash_mac_addr_index(port_id, addr);
3113 /* Check if it's already there, and do nothing */
3114 if ((index >= 0) && on)
3120 "Port %u: the MAC address was not set in UTA\n",
3125 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3127 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3134 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3136 /* Update address in NIC data structure */
3138 ether_addr_copy(addr,
3139 &dev->data->hash_mac_addrs[index]);
3141 ether_addr_copy(&null_mac_addr,
3142 &dev->data->hash_mac_addrs[index]);
3145 return eth_err(port_id, ret);
3149 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3151 struct rte_eth_dev *dev;
3153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3155 dev = &rte_eth_devices[port_id];
3157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3158 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3162 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3165 struct rte_eth_dev *dev;
3166 struct rte_eth_dev_info dev_info;
3167 struct rte_eth_link link;
3169 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3171 dev = &rte_eth_devices[port_id];
3172 rte_eth_dev_info_get(port_id, &dev_info);
3173 link = dev->data->dev_link;
3175 if (queue_idx > dev_info.max_tx_queues) {
3177 "Set queue rate limit:port %u: invalid queue id=%u\n",
3178 port_id, queue_idx);
3182 if (tx_rate > link.link_speed) {
3184 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3185 tx_rate, link.link_speed);
3189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3190 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3191 queue_idx, tx_rate));
3195 rte_eth_mirror_rule_set(uint16_t port_id,
3196 struct rte_eth_mirror_conf *mirror_conf,
3197 uint8_t rule_id, uint8_t on)
3199 struct rte_eth_dev *dev;
3201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3202 if (mirror_conf->rule_type == 0) {
3203 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3207 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3208 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3213 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3214 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3215 (mirror_conf->pool_mask == 0)) {
3217 "Invalid mirror pool, pool mask can not be 0\n");
3221 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3222 mirror_conf->vlan.vlan_mask == 0) {
3224 "Invalid vlan mask, vlan mask can not be 0\n");
3228 dev = &rte_eth_devices[port_id];
3229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3231 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3232 mirror_conf, rule_id, on));
3236 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3238 struct rte_eth_dev *dev;
3240 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3242 dev = &rte_eth_devices[port_id];
3243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3245 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3249 RTE_INIT(eth_dev_init_cb_lists)
3253 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3254 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3258 rte_eth_dev_callback_register(uint16_t port_id,
3259 enum rte_eth_event_type event,
3260 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3262 struct rte_eth_dev *dev;
3263 struct rte_eth_dev_callback *user_cb;
3264 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3270 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3271 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3275 if (port_id == RTE_ETH_ALL) {
3277 last_port = RTE_MAX_ETHPORTS - 1;
3279 next_port = last_port = port_id;
3282 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3285 dev = &rte_eth_devices[next_port];
3287 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3288 if (user_cb->cb_fn == cb_fn &&
3289 user_cb->cb_arg == cb_arg &&
3290 user_cb->event == event) {
3295 /* create a new callback. */
3296 if (user_cb == NULL) {
3297 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3298 sizeof(struct rte_eth_dev_callback), 0);
3299 if (user_cb != NULL) {
3300 user_cb->cb_fn = cb_fn;
3301 user_cb->cb_arg = cb_arg;
3302 user_cb->event = event;
3303 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3306 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3307 rte_eth_dev_callback_unregister(port_id, event,
3313 } while (++next_port <= last_port);
3315 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3320 rte_eth_dev_callback_unregister(uint16_t port_id,
3321 enum rte_eth_event_type event,
3322 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3325 struct rte_eth_dev *dev;
3326 struct rte_eth_dev_callback *cb, *next;
3327 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3333 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3334 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3338 if (port_id == RTE_ETH_ALL) {
3340 last_port = RTE_MAX_ETHPORTS - 1;
3342 next_port = last_port = port_id;
3345 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3348 dev = &rte_eth_devices[next_port];
3350 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3353 next = TAILQ_NEXT(cb, next);
3355 if (cb->cb_fn != cb_fn || cb->event != event ||
3356 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3360 * if this callback is not executing right now,
3363 if (cb->active == 0) {
3364 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3370 } while (++next_port <= last_port);
3372 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3377 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3378 enum rte_eth_event_type event, void *ret_param)
3380 struct rte_eth_dev_callback *cb_lst;
3381 struct rte_eth_dev_callback dev_cb;
3384 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3385 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3386 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3390 if (ret_param != NULL)
3391 dev_cb.ret_param = ret_param;
3393 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3394 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3395 dev_cb.cb_arg, dev_cb.ret_param);
3396 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3399 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3404 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3409 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3411 dev->state = RTE_ETH_DEV_ATTACHED;
3415 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3418 struct rte_eth_dev *dev;
3419 struct rte_intr_handle *intr_handle;
3423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3425 dev = &rte_eth_devices[port_id];
3427 if (!dev->intr_handle) {
3428 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3432 intr_handle = dev->intr_handle;
3433 if (!intr_handle->intr_vec) {
3434 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3438 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3439 vec = intr_handle->intr_vec[qid];
3440 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3441 if (rc && rc != -EEXIST) {
3443 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3444 port_id, qid, op, epfd, vec);
3451 int __rte_experimental
3452 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3454 struct rte_intr_handle *intr_handle;
3455 struct rte_eth_dev *dev;
3456 unsigned int efd_idx;
3460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3462 dev = &rte_eth_devices[port_id];
3464 if (queue_id >= dev->data->nb_rx_queues) {
3465 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3469 if (!dev->intr_handle) {
3470 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3474 intr_handle = dev->intr_handle;
3475 if (!intr_handle->intr_vec) {
3476 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3480 vec = intr_handle->intr_vec[queue_id];
3481 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3482 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3483 fd = intr_handle->efds[efd_idx];
3488 const struct rte_memzone *
3489 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3490 uint16_t queue_id, size_t size, unsigned align,
3493 char z_name[RTE_MEMZONE_NAMESIZE];
3494 const struct rte_memzone *mz;
3496 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3497 dev->data->port_id, queue_id, ring_name);
3499 mz = rte_memzone_lookup(z_name);
3503 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3504 RTE_MEMZONE_IOVA_CONTIG, align);
3507 int __rte_experimental
3508 rte_eth_dev_create(struct rte_device *device, const char *name,
3509 size_t priv_data_size,
3510 ethdev_bus_specific_init ethdev_bus_specific_init,
3511 void *bus_init_params,
3512 ethdev_init_t ethdev_init, void *init_params)
3514 struct rte_eth_dev *ethdev;
3517 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3519 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3520 ethdev = rte_eth_dev_allocate(name);
3524 if (priv_data_size) {
3525 ethdev->data->dev_private = rte_zmalloc_socket(
3526 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3529 if (!ethdev->data->dev_private) {
3530 RTE_LOG(ERR, EAL, "failed to allocate private data");
3532 goto data_alloc_failed;
3536 ethdev = rte_eth_dev_attach_secondary(name);
3538 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3539 "ethdev doesn't exist");
3544 ethdev->device = device;
3546 if (ethdev_bus_specific_init) {
3547 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3550 "ethdev bus specific initialisation failed");
3555 retval = ethdev_init(ethdev, init_params);
3557 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3561 rte_eth_dev_probing_finish(ethdev);
3565 /* free ports private data if primary process */
3566 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3567 rte_free(ethdev->data->dev_private);
3570 rte_eth_dev_release_port(ethdev);
3575 int __rte_experimental
3576 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3577 ethdev_uninit_t ethdev_uninit)
3581 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3585 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3586 if (ethdev_uninit) {
3587 ret = ethdev_uninit(ethdev);
3592 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3593 return rte_eth_dev_release_port_secondary(ethdev);
3595 rte_free(ethdev->data->dev_private);
3596 ethdev->data->dev_private = NULL;
3598 return rte_eth_dev_release_port(ethdev);
3602 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3603 int epfd, int op, void *data)
3606 struct rte_eth_dev *dev;
3607 struct rte_intr_handle *intr_handle;
3610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 dev = &rte_eth_devices[port_id];
3613 if (queue_id >= dev->data->nb_rx_queues) {
3614 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3618 if (!dev->intr_handle) {
3619 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3623 intr_handle = dev->intr_handle;
3624 if (!intr_handle->intr_vec) {
3625 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3629 vec = intr_handle->intr_vec[queue_id];
3630 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3631 if (rc && rc != -EEXIST) {
3633 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3634 port_id, queue_id, op, epfd, vec);
3642 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3645 struct rte_eth_dev *dev;
3647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3649 dev = &rte_eth_devices[port_id];
3651 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3652 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3657 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3660 struct rte_eth_dev *dev;
3662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3664 dev = &rte_eth_devices[port_id];
3666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3667 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3673 rte_eth_dev_filter_supported(uint16_t port_id,
3674 enum rte_filter_type filter_type)
3676 struct rte_eth_dev *dev;
3678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3680 dev = &rte_eth_devices[port_id];
3681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3682 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3683 RTE_ETH_FILTER_NOP, NULL);
3687 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3688 enum rte_filter_op filter_op, void *arg)
3690 struct rte_eth_dev *dev;
3692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3694 dev = &rte_eth_devices[port_id];
3695 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3696 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3700 const struct rte_eth_rxtx_callback *
3701 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3702 rte_rx_callback_fn fn, void *user_param)
3704 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3705 rte_errno = ENOTSUP;
3708 /* check input parameters */
3709 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3710 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3714 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3722 cb->param = user_param;
3724 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3725 /* Add the callbacks in fifo order. */
3726 struct rte_eth_rxtx_callback *tail =
3727 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3730 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3737 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3742 const struct rte_eth_rxtx_callback *
3743 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3744 rte_rx_callback_fn fn, void *user_param)
3746 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3747 rte_errno = ENOTSUP;
3750 /* check input parameters */
3751 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3752 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3757 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3765 cb->param = user_param;
3767 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3768 /* Add the callbacks at fisrt position*/
3769 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3771 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3772 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3777 const struct rte_eth_rxtx_callback *
3778 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3779 rte_tx_callback_fn fn, void *user_param)
3781 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3782 rte_errno = ENOTSUP;
3785 /* check input parameters */
3786 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3787 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3792 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3800 cb->param = user_param;
3802 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3803 /* Add the callbacks in fifo order. */
3804 struct rte_eth_rxtx_callback *tail =
3805 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3808 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3815 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3821 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3822 const struct rte_eth_rxtx_callback *user_cb)
3824 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3827 /* Check input parameters. */
3828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3829 if (user_cb == NULL ||
3830 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3833 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3834 struct rte_eth_rxtx_callback *cb;
3835 struct rte_eth_rxtx_callback **prev_cb;
3838 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3839 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3840 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3842 if (cb == user_cb) {
3843 /* Remove the user cb from the callback list. */
3844 *prev_cb = cb->next;
3849 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3855 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3856 const struct rte_eth_rxtx_callback *user_cb)
3858 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3861 /* Check input parameters. */
3862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3863 if (user_cb == NULL ||
3864 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3867 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3869 struct rte_eth_rxtx_callback *cb;
3870 struct rte_eth_rxtx_callback **prev_cb;
3872 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3873 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3874 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3876 if (cb == user_cb) {
3877 /* Remove the user cb from the callback list. */
3878 *prev_cb = cb->next;
3883 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3889 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3890 struct rte_eth_rxq_info *qinfo)
3892 struct rte_eth_dev *dev;
3894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3899 dev = &rte_eth_devices[port_id];
3900 if (queue_id >= dev->data->nb_rx_queues) {
3901 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3907 memset(qinfo, 0, sizeof(*qinfo));
3908 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3913 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3914 struct rte_eth_txq_info *qinfo)
3916 struct rte_eth_dev *dev;
3918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3923 dev = &rte_eth_devices[port_id];
3924 if (queue_id >= dev->data->nb_tx_queues) {
3925 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3931 memset(qinfo, 0, sizeof(*qinfo));
3932 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3938 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3939 struct ether_addr *mc_addr_set,
3940 uint32_t nb_mc_addr)
3942 struct rte_eth_dev *dev;
3944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3946 dev = &rte_eth_devices[port_id];
3947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3948 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3949 mc_addr_set, nb_mc_addr));
3953 rte_eth_timesync_enable(uint16_t port_id)
3955 struct rte_eth_dev *dev;
3957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3958 dev = &rte_eth_devices[port_id];
3960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3961 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3965 rte_eth_timesync_disable(uint16_t port_id)
3967 struct rte_eth_dev *dev;
3969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3970 dev = &rte_eth_devices[port_id];
3972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3973 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3977 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3980 struct rte_eth_dev *dev;
3982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3983 dev = &rte_eth_devices[port_id];
3985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3986 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3987 (dev, timestamp, flags));
3991 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3992 struct timespec *timestamp)
3994 struct rte_eth_dev *dev;
3996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3997 dev = &rte_eth_devices[port_id];
3999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4000 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4005 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4007 struct rte_eth_dev *dev;
4009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4010 dev = &rte_eth_devices[port_id];
4012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4013 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4018 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4020 struct rte_eth_dev *dev;
4022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4023 dev = &rte_eth_devices[port_id];
4025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4026 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4031 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4033 struct rte_eth_dev *dev;
4035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4036 dev = &rte_eth_devices[port_id];
4038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4039 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4044 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4046 struct rte_eth_dev *dev;
4048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4050 dev = &rte_eth_devices[port_id];
4051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4052 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4056 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4058 struct rte_eth_dev *dev;
4060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4062 dev = &rte_eth_devices[port_id];
4063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4064 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4068 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4070 struct rte_eth_dev *dev;
4072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4074 dev = &rte_eth_devices[port_id];
4075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4076 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4080 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4082 struct rte_eth_dev *dev;
4084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4086 dev = &rte_eth_devices[port_id];
4087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4088 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4091 int __rte_experimental
4092 rte_eth_dev_get_module_info(uint16_t port_id,
4093 struct rte_eth_dev_module_info *modinfo)
4095 struct rte_eth_dev *dev;
4097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4099 dev = &rte_eth_devices[port_id];
4100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4101 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4104 int __rte_experimental
4105 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4106 struct rte_dev_eeprom_info *info)
4108 struct rte_eth_dev *dev;
4110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4112 dev = &rte_eth_devices[port_id];
4113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4114 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4118 rte_eth_dev_get_dcb_info(uint16_t port_id,
4119 struct rte_eth_dcb_info *dcb_info)
4121 struct rte_eth_dev *dev;
4123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4125 dev = &rte_eth_devices[port_id];
4126 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4129 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4133 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4134 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4136 struct rte_eth_dev *dev;
4138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4139 if (l2_tunnel == NULL) {
4140 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4144 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4145 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4149 dev = &rte_eth_devices[port_id];
4150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4152 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4157 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4158 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4162 struct rte_eth_dev *dev;
4164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4166 if (l2_tunnel == NULL) {
4167 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4171 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4172 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4177 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4181 dev = &rte_eth_devices[port_id];
4182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4184 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4185 l2_tunnel, mask, en));
4189 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4190 const struct rte_eth_desc_lim *desc_lim)
4192 if (desc_lim->nb_align != 0)
4193 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4195 if (desc_lim->nb_max != 0)
4196 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4198 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4202 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4203 uint16_t *nb_rx_desc,
4204 uint16_t *nb_tx_desc)
4206 struct rte_eth_dev *dev;
4207 struct rte_eth_dev_info dev_info;
4209 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4211 dev = &rte_eth_devices[port_id];
4212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4214 rte_eth_dev_info_get(port_id, &dev_info);
4216 if (nb_rx_desc != NULL)
4217 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4219 if (nb_tx_desc != NULL)
4220 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4226 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4228 struct rte_eth_dev *dev;
4230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4235 dev = &rte_eth_devices[port_id];
4237 if (*dev->dev_ops->pool_ops_supported == NULL)
4238 return 1; /* all pools are supported */
4240 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4244 * A set of values to describe the possible states of a switch domain.
4246 enum rte_eth_switch_domain_state {
4247 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4248 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4252 * Array of switch domains available for allocation. Array is sized to
4253 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4254 * ethdev ports in a single process.
4256 struct rte_eth_dev_switch {
4257 enum rte_eth_switch_domain_state state;
4258 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4260 int __rte_experimental
4261 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4265 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4267 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4268 i < RTE_MAX_ETHPORTS; i++) {
4269 if (rte_eth_switch_domains[i].state ==
4270 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4271 rte_eth_switch_domains[i].state =
4272 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4281 int __rte_experimental
4282 rte_eth_switch_domain_free(uint16_t domain_id)
4284 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4285 domain_id >= RTE_MAX_ETHPORTS)
4288 if (rte_eth_switch_domains[domain_id].state !=
4289 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4292 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4297 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4300 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4303 struct rte_kvargs_pair *pair;
4306 arglist->str = strdup(str_in);
4307 if (arglist->str == NULL)
4310 letter = arglist->str;
4313 pair = &arglist->pairs[0];
4316 case 0: /* Initial */
4319 else if (*letter == '\0')
4326 case 1: /* Parsing key */
4327 if (*letter == '=') {
4329 pair->value = letter + 1;
4331 } else if (*letter == ',' || *letter == '\0')
4336 case 2: /* Parsing value */
4339 else if (*letter == ',') {
4342 pair = &arglist->pairs[arglist->count];
4344 } else if (*letter == '\0') {
4347 pair = &arglist->pairs[arglist->count];
4352 case 3: /* Parsing list */
4355 else if (*letter == '\0')
4364 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4372 /* Single element, not a list */
4373 return callback(str, data);
4375 /* Sanity check, then strip the brackets */
4376 str_start = &str[strlen(str) - 1];
4377 if (*str_start != ']') {
4378 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4384 /* Process list elements */
4394 } else if (state == 1) {
4395 if (*str == ',' || *str == '\0') {
4396 if (str > str_start) {
4397 /* Non-empty string fragment */
4399 result = callback(str_start, data);
4412 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4413 const uint16_t max_list)
4415 uint16_t lo, hi, val;
4418 result = sscanf(str, "%hu-%hu", &lo, &hi);
4420 if (*len_list >= max_list)
4422 list[(*len_list)++] = lo;
4423 } else if (result == 2) {
4424 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4426 for (val = lo; val <= hi; val++) {
4427 if (*len_list >= max_list)
4429 list[(*len_list)++] = val;
4438 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4440 struct rte_eth_devargs *eth_da = data;
4442 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4443 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4446 int __rte_experimental
4447 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4449 struct rte_kvargs args;
4450 struct rte_kvargs_pair *pair;
4454 memset(eth_da, 0, sizeof(*eth_da));
4456 result = rte_eth_devargs_tokenise(&args, dargs);
4460 for (i = 0; i < args.count; i++) {
4461 pair = &args.pairs[i];
4462 if (strcmp("representor", pair->key) == 0) {
4463 result = rte_eth_devargs_parse_list(pair->value,
4464 rte_eth_devargs_parse_representor_ports,
4478 RTE_INIT(ethdev_init_log)
4480 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4481 if (rte_eth_dev_logtype >= 0)
4482 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);