1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 is_allocated(const struct rte_eth_dev *ethdev)
232 return ethdev->data->name[0] != '\0';
235 static struct rte_eth_dev *
236 _rte_eth_dev_allocated(const char *name)
240 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
241 if (rte_eth_devices[i].data != NULL &&
242 strcmp(rte_eth_devices[i].data->name, name) == 0)
243 return &rte_eth_devices[i];
249 rte_eth_dev_allocated(const char *name)
251 struct rte_eth_dev *ethdev;
253 rte_eth_dev_shared_data_prepare();
255 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
257 ethdev = _rte_eth_dev_allocated(name);
259 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
265 rte_eth_dev_find_free_port(void)
269 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
270 /* Using shared name field to find a free port. */
271 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
272 RTE_ASSERT(rte_eth_devices[i].state ==
277 return RTE_MAX_ETHPORTS;
280 static struct rte_eth_dev *
281 eth_dev_get(uint16_t port_id)
283 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
285 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
287 eth_dev_last_created_port = port_id;
293 rte_eth_dev_allocate(const char *name)
296 struct rte_eth_dev *eth_dev = NULL;
298 rte_eth_dev_shared_data_prepare();
300 /* Synchronize port creation between primary and secondary threads. */
301 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
303 if (_rte_eth_dev_allocated(name) != NULL) {
305 "Ethernet device with name %s already allocated\n",
310 port_id = rte_eth_dev_find_free_port();
311 if (port_id == RTE_MAX_ETHPORTS) {
313 "Reached maximum number of Ethernet ports\n");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "Device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
371 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
373 eth_dev->state = RTE_ETH_DEV_UNUSED;
375 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
377 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
397 RTE_ETHDEV_LOG(ERR, "Invalid owner_id=%016"PRIx64"\n",
405 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
407 while (port_id < RTE_MAX_ETHPORTS &&
408 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
409 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
410 rte_eth_devices[port_id].data->owner.id != owner_id))
413 if (port_id >= RTE_MAX_ETHPORTS)
414 return RTE_MAX_ETHPORTS;
419 int __rte_experimental
420 rte_eth_dev_owner_new(uint64_t *owner_id)
422 rte_eth_dev_shared_data_prepare();
424 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
426 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
428 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
433 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
434 const struct rte_eth_dev_owner *new_owner)
436 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
437 struct rte_eth_dev_owner *port_owner;
440 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
441 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
446 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
447 !rte_eth_is_valid_owner_id(old_owner_id))
450 port_owner = &rte_eth_devices[port_id].data->owner;
451 if (port_owner->id != old_owner_id) {
453 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
454 port_id, port_owner->name, port_owner->id);
458 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
460 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
461 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
464 port_owner->id = new_owner->id;
466 RTE_ETHDEV_LOG(ERR, "Port %u owner is %s_%016"PRIx64"\n",
467 port_id, new_owner->name, new_owner->id);
472 int __rte_experimental
473 rte_eth_dev_owner_set(const uint16_t port_id,
474 const struct rte_eth_dev_owner *owner)
478 rte_eth_dev_shared_data_prepare();
480 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
482 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
484 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
488 int __rte_experimental
489 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
491 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
492 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
495 rte_eth_dev_shared_data_prepare();
497 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
499 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
501 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
505 void __rte_experimental
506 rte_eth_dev_owner_delete(const uint64_t owner_id)
510 rte_eth_dev_shared_data_prepare();
512 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
514 if (rte_eth_is_valid_owner_id(owner_id)) {
515 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
516 if (rte_eth_devices[port_id].data->owner.id == owner_id)
517 memset(&rte_eth_devices[port_id].data->owner, 0,
518 sizeof(struct rte_eth_dev_owner));
520 "All port owners owned by %016"PRIx64" identifier have removed\n",
524 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
527 int __rte_experimental
528 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
531 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
533 rte_eth_dev_shared_data_prepare();
535 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
537 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
538 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
542 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
545 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
550 rte_eth_dev_socket_id(uint16_t port_id)
552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
553 return rte_eth_devices[port_id].data->numa_node;
557 rte_eth_dev_get_sec_ctx(uint16_t port_id)
559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
560 return rte_eth_devices[port_id].security_ctx;
564 rte_eth_dev_count(void)
566 return rte_eth_dev_count_avail();
570 rte_eth_dev_count_avail(void)
577 RTE_ETH_FOREACH_DEV(p)
583 uint16_t __rte_experimental
584 rte_eth_dev_count_total(void)
586 uint16_t port, count = 0;
588 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
589 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
596 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
603 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
607 /* shouldn't check 'rte_eth_devices[i].data',
608 * because it might be overwritten by VDEV PMD */
609 tmp = rte_eth_dev_shared_data->data[port_id].name;
615 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
620 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
624 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
625 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
626 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
636 eth_err(uint16_t port_id, int ret)
640 if (rte_eth_dev_is_removed(port_id))
645 /* attach the new device, then store port_id of the device */
647 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
649 int current = rte_eth_dev_count_total();
650 struct rte_devargs da;
653 memset(&da, 0, sizeof(da));
655 if ((devargs == NULL) || (port_id == NULL)) {
661 if (rte_devargs_parse(&da, "%s", devargs))
664 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
668 /* no point looking at the port count if no port exists */
669 if (!rte_eth_dev_count_total()) {
670 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
675 /* if nothing happened, there is a bug here, since some driver told us
676 * it did attach a device, but did not create a port.
677 * FIXME: race condition in case of plug-out of another device
679 if (current == rte_eth_dev_count_total()) {
684 *port_id = eth_dev_last_created_port;
692 /* detach the device, then store the name of the device */
694 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
696 struct rte_device *dev;
701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
703 dev_flags = rte_eth_devices[port_id].data->dev_flags;
704 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
706 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
710 dev = rte_eth_devices[port_id].device;
714 bus = rte_bus_find_by_device(dev);
718 ret = rte_eal_hotplug_remove(bus->name, dev->name);
722 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
727 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
729 uint16_t old_nb_queues = dev->data->nb_rx_queues;
733 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
734 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
735 sizeof(dev->data->rx_queues[0]) * nb_queues,
736 RTE_CACHE_LINE_SIZE);
737 if (dev->data->rx_queues == NULL) {
738 dev->data->nb_rx_queues = 0;
741 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
744 rxq = dev->data->rx_queues;
746 for (i = nb_queues; i < old_nb_queues; i++)
747 (*dev->dev_ops->rx_queue_release)(rxq[i]);
748 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
749 RTE_CACHE_LINE_SIZE);
752 if (nb_queues > old_nb_queues) {
753 uint16_t new_qs = nb_queues - old_nb_queues;
755 memset(rxq + old_nb_queues, 0,
756 sizeof(rxq[0]) * new_qs);
759 dev->data->rx_queues = rxq;
761 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
764 rxq = dev->data->rx_queues;
766 for (i = nb_queues; i < old_nb_queues; i++)
767 (*dev->dev_ops->rx_queue_release)(rxq[i]);
769 rte_free(dev->data->rx_queues);
770 dev->data->rx_queues = NULL;
772 dev->data->nb_rx_queues = nb_queues;
777 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
779 struct rte_eth_dev *dev;
781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
783 dev = &rte_eth_devices[port_id];
784 if (!dev->data->dev_started) {
786 "Port %u must be started before start any queue\n",
791 if (rx_queue_id >= dev->data->nb_rx_queues) {
792 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
798 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
800 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
801 rx_queue_id, port_id);
805 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
811 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
813 struct rte_eth_dev *dev;
815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
817 dev = &rte_eth_devices[port_id];
818 if (rx_queue_id >= dev->data->nb_rx_queues) {
819 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
825 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
827 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
828 rx_queue_id, port_id);
832 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
837 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
839 struct rte_eth_dev *dev;
841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
843 dev = &rte_eth_devices[port_id];
844 if (!dev->data->dev_started) {
846 "Port %u must be started before start any queue\n",
851 if (tx_queue_id >= dev->data->nb_tx_queues) {
852 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
858 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
860 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
861 tx_queue_id, port_id);
865 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
869 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
871 struct rte_eth_dev *dev;
873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
875 dev = &rte_eth_devices[port_id];
876 if (tx_queue_id >= dev->data->nb_tx_queues) {
877 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
883 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
885 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
886 tx_queue_id, port_id);
890 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
895 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
897 uint16_t old_nb_queues = dev->data->nb_tx_queues;
901 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
902 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
903 sizeof(dev->data->tx_queues[0]) * nb_queues,
904 RTE_CACHE_LINE_SIZE);
905 if (dev->data->tx_queues == NULL) {
906 dev->data->nb_tx_queues = 0;
909 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
912 txq = dev->data->tx_queues;
914 for (i = nb_queues; i < old_nb_queues; i++)
915 (*dev->dev_ops->tx_queue_release)(txq[i]);
916 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
917 RTE_CACHE_LINE_SIZE);
920 if (nb_queues > old_nb_queues) {
921 uint16_t new_qs = nb_queues - old_nb_queues;
923 memset(txq + old_nb_queues, 0,
924 sizeof(txq[0]) * new_qs);
927 dev->data->tx_queues = txq;
929 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
932 txq = dev->data->tx_queues;
934 for (i = nb_queues; i < old_nb_queues; i++)
935 (*dev->dev_ops->tx_queue_release)(txq[i]);
937 rte_free(dev->data->tx_queues);
938 dev->data->tx_queues = NULL;
940 dev->data->nb_tx_queues = nb_queues;
945 rte_eth_speed_bitflag(uint32_t speed, int duplex)
948 case ETH_SPEED_NUM_10M:
949 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
950 case ETH_SPEED_NUM_100M:
951 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
952 case ETH_SPEED_NUM_1G:
953 return ETH_LINK_SPEED_1G;
954 case ETH_SPEED_NUM_2_5G:
955 return ETH_LINK_SPEED_2_5G;
956 case ETH_SPEED_NUM_5G:
957 return ETH_LINK_SPEED_5G;
958 case ETH_SPEED_NUM_10G:
959 return ETH_LINK_SPEED_10G;
960 case ETH_SPEED_NUM_20G:
961 return ETH_LINK_SPEED_20G;
962 case ETH_SPEED_NUM_25G:
963 return ETH_LINK_SPEED_25G;
964 case ETH_SPEED_NUM_40G:
965 return ETH_LINK_SPEED_40G;
966 case ETH_SPEED_NUM_50G:
967 return ETH_LINK_SPEED_50G;
968 case ETH_SPEED_NUM_56G:
969 return ETH_LINK_SPEED_56G;
970 case ETH_SPEED_NUM_100G:
971 return ETH_LINK_SPEED_100G;
978 * A conversion function from rxmode bitfield API.
981 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
982 uint64_t *rx_offloads)
984 uint64_t offloads = 0;
986 if (rxmode->header_split == 1)
987 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
988 if (rxmode->hw_ip_checksum == 1)
989 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
990 if (rxmode->hw_vlan_filter == 1)
991 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
992 if (rxmode->hw_vlan_strip == 1)
993 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
994 if (rxmode->hw_vlan_extend == 1)
995 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
996 if (rxmode->jumbo_frame == 1)
997 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
998 if (rxmode->hw_strip_crc == 1)
999 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
1000 if (rxmode->enable_scatter == 1)
1001 offloads |= DEV_RX_OFFLOAD_SCATTER;
1002 if (rxmode->enable_lro == 1)
1003 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
1004 if (rxmode->hw_timestamp == 1)
1005 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
1006 if (rxmode->security == 1)
1007 offloads |= DEV_RX_OFFLOAD_SECURITY;
1009 *rx_offloads = offloads;
1012 const char * __rte_experimental
1013 rte_eth_dev_rx_offload_name(uint64_t offload)
1015 const char *name = "UNKNOWN";
1018 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1019 if (offload == rte_rx_offload_names[i].offload) {
1020 name = rte_rx_offload_names[i].name;
1028 const char * __rte_experimental
1029 rte_eth_dev_tx_offload_name(uint64_t offload)
1031 const char *name = "UNKNOWN";
1034 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1035 if (offload == rte_tx_offload_names[i].offload) {
1036 name = rte_tx_offload_names[i].name;
1045 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1046 const struct rte_eth_conf *dev_conf)
1048 struct rte_eth_dev *dev;
1049 struct rte_eth_dev_info dev_info;
1050 struct rte_eth_conf local_conf = *dev_conf;
1053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1055 dev = &rte_eth_devices[port_id];
1057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1060 rte_eth_dev_info_get(port_id, &dev_info);
1062 /* If number of queues specified by application for both Rx and Tx is
1063 * zero, use driver preferred values. This cannot be done individually
1064 * as it is valid for either Tx or Rx (but not both) to be zero.
1065 * If driver does not provide any preferred valued, fall back on
1068 if (nb_rx_q == 0 && nb_tx_q == 0) {
1069 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1071 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1072 nb_tx_q = dev_info.default_txportconf.nb_queues;
1074 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1077 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1079 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1080 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1084 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1086 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1087 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1091 if (dev->data->dev_started) {
1093 "Port %u must be stopped to allow configuration\n",
1099 * Convert between the offloads API to enable PMDs to support
1102 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1103 rte_eth_convert_rx_offload_bitfield(
1104 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1106 /* Copy the dev_conf parameter into the dev structure */
1107 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1110 * Check that the numbers of RX and TX queues are not greater
1111 * than the maximum number of RX and TX queues supported by the
1112 * configured device.
1114 if (nb_rx_q > dev_info.max_rx_queues) {
1115 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1116 port_id, nb_rx_q, dev_info.max_rx_queues);
1120 if (nb_tx_q > dev_info.max_tx_queues) {
1121 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1122 port_id, nb_tx_q, dev_info.max_tx_queues);
1126 /* Check that the device supports requested interrupts */
1127 if ((dev_conf->intr_conf.lsc == 1) &&
1128 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1129 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1130 dev->device->driver->name);
1133 if ((dev_conf->intr_conf.rmv == 1) &&
1134 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1135 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1136 dev->device->driver->name);
1141 * If jumbo frames are enabled, check that the maximum RX packet
1142 * length is supported by the configured device.
1144 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1145 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1147 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1148 port_id, dev_conf->rxmode.max_rx_pkt_len,
1149 dev_info.max_rx_pktlen);
1151 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1153 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1154 port_id, dev_conf->rxmode.max_rx_pkt_len,
1155 (unsigned)ETHER_MIN_LEN);
1159 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1160 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1161 /* Use default value */
1162 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1166 /* Any requested offloading must be within its device capabilities */
1167 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1168 local_conf.rxmode.offloads) {
1170 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1171 "capabilities 0x%"PRIx64" in %s()\n",
1172 port_id, local_conf.rxmode.offloads,
1173 dev_info.rx_offload_capa,
1177 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1178 local_conf.txmode.offloads) {
1180 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1181 "capabilities 0x%"PRIx64" in %s()\n",
1182 port_id, local_conf.txmode.offloads,
1183 dev_info.tx_offload_capa,
1188 if ((local_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP) &&
1189 (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
1191 "Port id=%u not allowed to set both CRC STRIP and KEEP CRC offload flags\n",
1196 /* Check that device supports requested rss hash functions. */
1197 if ((dev_info.flow_type_rss_offloads |
1198 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1199 dev_info.flow_type_rss_offloads) {
1201 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1202 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1203 dev_info.flow_type_rss_offloads);
1208 * Setup new number of RX/TX queues and reconfigure device.
1210 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1213 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1218 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1221 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1223 rte_eth_dev_rx_queue_config(dev, 0);
1227 diag = (*dev->dev_ops->dev_configure)(dev);
1229 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1231 rte_eth_dev_rx_queue_config(dev, 0);
1232 rte_eth_dev_tx_queue_config(dev, 0);
1233 return eth_err(port_id, diag);
1236 /* Initialize Rx profiling if enabled at compilation time. */
1237 diag = __rte_eth_profile_rx_init(port_id, dev);
1239 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_profile_rx_init = %d\n",
1241 rte_eth_dev_rx_queue_config(dev, 0);
1242 rte_eth_dev_tx_queue_config(dev, 0);
1243 return eth_err(port_id, diag);
1250 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1252 if (dev->data->dev_started) {
1253 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1254 dev->data->port_id);
1258 rte_eth_dev_rx_queue_config(dev, 0);
1259 rte_eth_dev_tx_queue_config(dev, 0);
1261 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1265 rte_eth_dev_config_restore(uint16_t port_id)
1267 struct rte_eth_dev *dev;
1268 struct rte_eth_dev_info dev_info;
1269 struct ether_addr *addr;
1274 dev = &rte_eth_devices[port_id];
1276 rte_eth_dev_info_get(port_id, &dev_info);
1278 /* replay MAC address configuration including default MAC */
1279 addr = &dev->data->mac_addrs[0];
1280 if (*dev->dev_ops->mac_addr_set != NULL)
1281 (*dev->dev_ops->mac_addr_set)(dev, addr);
1282 else if (*dev->dev_ops->mac_addr_add != NULL)
1283 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1285 if (*dev->dev_ops->mac_addr_add != NULL) {
1286 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1287 addr = &dev->data->mac_addrs[i];
1289 /* skip zero address */
1290 if (is_zero_ether_addr(addr))
1294 pool_mask = dev->data->mac_pool_sel[i];
1297 if (pool_mask & 1ULL)
1298 (*dev->dev_ops->mac_addr_add)(dev,
1302 } while (pool_mask);
1306 /* replay promiscuous configuration */
1307 if (rte_eth_promiscuous_get(port_id) == 1)
1308 rte_eth_promiscuous_enable(port_id);
1309 else if (rte_eth_promiscuous_get(port_id) == 0)
1310 rte_eth_promiscuous_disable(port_id);
1312 /* replay all multicast configuration */
1313 if (rte_eth_allmulticast_get(port_id) == 1)
1314 rte_eth_allmulticast_enable(port_id);
1315 else if (rte_eth_allmulticast_get(port_id) == 0)
1316 rte_eth_allmulticast_disable(port_id);
1320 rte_eth_dev_start(uint16_t port_id)
1322 struct rte_eth_dev *dev;
1325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1327 dev = &rte_eth_devices[port_id];
1329 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1331 if (dev->data->dev_started != 0) {
1333 "Device with port_id=%"PRIu16" already started\n",
1338 diag = (*dev->dev_ops->dev_start)(dev);
1340 dev->data->dev_started = 1;
1342 return eth_err(port_id, diag);
1344 rte_eth_dev_config_restore(port_id);
1346 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1347 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1348 (*dev->dev_ops->link_update)(dev, 0);
1354 rte_eth_dev_stop(uint16_t port_id)
1356 struct rte_eth_dev *dev;
1358 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1359 dev = &rte_eth_devices[port_id];
1361 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1363 if (dev->data->dev_started == 0) {
1365 "Device with port_id=%"PRIu16" already stopped\n",
1370 dev->data->dev_started = 0;
1371 (*dev->dev_ops->dev_stop)(dev);
1375 rte_eth_dev_set_link_up(uint16_t port_id)
1377 struct rte_eth_dev *dev;
1379 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1381 dev = &rte_eth_devices[port_id];
1383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1384 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1388 rte_eth_dev_set_link_down(uint16_t port_id)
1390 struct rte_eth_dev *dev;
1392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1394 dev = &rte_eth_devices[port_id];
1396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1397 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1401 rte_eth_dev_close(uint16_t port_id)
1403 struct rte_eth_dev *dev;
1405 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1406 dev = &rte_eth_devices[port_id];
1408 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1409 dev->data->dev_started = 0;
1410 (*dev->dev_ops->dev_close)(dev);
1412 dev->data->nb_rx_queues = 0;
1413 rte_free(dev->data->rx_queues);
1414 dev->data->rx_queues = NULL;
1415 dev->data->nb_tx_queues = 0;
1416 rte_free(dev->data->tx_queues);
1417 dev->data->tx_queues = NULL;
1421 rte_eth_dev_reset(uint16_t port_id)
1423 struct rte_eth_dev *dev;
1426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1427 dev = &rte_eth_devices[port_id];
1429 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1431 rte_eth_dev_stop(port_id);
1432 ret = dev->dev_ops->dev_reset(dev);
1434 return eth_err(port_id, ret);
1437 int __rte_experimental
1438 rte_eth_dev_is_removed(uint16_t port_id)
1440 struct rte_eth_dev *dev;
1443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1445 dev = &rte_eth_devices[port_id];
1447 if (dev->state == RTE_ETH_DEV_REMOVED)
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1452 ret = dev->dev_ops->is_removed(dev);
1454 /* Device is physically removed. */
1455 dev->state = RTE_ETH_DEV_REMOVED;
1461 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1462 uint16_t nb_rx_desc, unsigned int socket_id,
1463 const struct rte_eth_rxconf *rx_conf,
1464 struct rte_mempool *mp)
1467 uint32_t mbp_buf_size;
1468 struct rte_eth_dev *dev;
1469 struct rte_eth_dev_info dev_info;
1470 struct rte_eth_rxconf local_conf;
1473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1475 dev = &rte_eth_devices[port_id];
1476 if (rx_queue_id >= dev->data->nb_rx_queues) {
1477 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1485 * Check the size of the mbuf data buffer.
1486 * This value must be provided in the private data of the memory pool.
1487 * First check that the memory pool has a valid private data.
1489 rte_eth_dev_info_get(port_id, &dev_info);
1490 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1491 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1492 mp->name, (int)mp->private_data_size,
1493 (int)sizeof(struct rte_pktmbuf_pool_private));
1496 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1498 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1500 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1501 mp->name, (int)mbp_buf_size,
1502 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1503 (int)RTE_PKTMBUF_HEADROOM,
1504 (int)dev_info.min_rx_bufsize);
1508 /* Use default specified by driver, if nb_rx_desc is zero */
1509 if (nb_rx_desc == 0) {
1510 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1511 /* If driver default is also zero, fall back on EAL default */
1512 if (nb_rx_desc == 0)
1513 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1516 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1517 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1518 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1521 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1522 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1523 dev_info.rx_desc_lim.nb_min,
1524 dev_info.rx_desc_lim.nb_align);
1528 if (dev->data->dev_started &&
1529 !(dev_info.dev_capa &
1530 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1533 if (dev->data->dev_started &&
1534 (dev->data->rx_queue_state[rx_queue_id] !=
1535 RTE_ETH_QUEUE_STATE_STOPPED))
1538 rxq = dev->data->rx_queues;
1539 if (rxq[rx_queue_id]) {
1540 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1542 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1543 rxq[rx_queue_id] = NULL;
1546 if (rx_conf == NULL)
1547 rx_conf = &dev_info.default_rxconf;
1549 local_conf = *rx_conf;
1550 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1552 * Reflect port offloads to queue offloads in order for
1553 * offloads to not be discarded.
1555 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1556 &local_conf.offloads);
1560 * If an offloading has already been enabled in
1561 * rte_eth_dev_configure(), it has been enabled on all queues,
1562 * so there is no need to enable it in this queue again.
1563 * The local_conf.offloads input to underlying PMD only carries
1564 * those offloadings which are only enabled on this queue and
1565 * not enabled on all queues.
1567 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1570 * New added offloadings for this queue are those not enabled in
1571 * rte_eth_dev_configure() and they must be per-queue type.
1572 * A pure per-port offloading can't be enabled on a queue while
1573 * disabled on another queue. A pure per-port offloading can't
1574 * be enabled for any queue as new added one if it hasn't been
1575 * enabled in rte_eth_dev_configure().
1577 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1578 local_conf.offloads) {
1580 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1581 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1582 port_id, rx_queue_id, local_conf.offloads,
1583 dev_info.rx_queue_offload_capa,
1588 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1589 socket_id, &local_conf, mp);
1591 if (!dev->data->min_rx_buf_size ||
1592 dev->data->min_rx_buf_size > mbp_buf_size)
1593 dev->data->min_rx_buf_size = mbp_buf_size;
1596 return eth_err(port_id, ret);
1600 * Convert from tx offloads to txq_flags.
1603 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1607 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1608 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1609 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1610 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1611 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1612 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1613 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1614 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1615 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1616 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1617 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1618 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1624 * A conversion function from txq_flags API.
1627 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1629 uint64_t offloads = 0;
1631 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1632 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1633 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1634 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1635 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1636 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1637 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1638 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1639 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1640 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1641 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1642 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1643 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1645 *tx_offloads = offloads;
1649 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1650 uint16_t nb_tx_desc, unsigned int socket_id,
1651 const struct rte_eth_txconf *tx_conf)
1653 struct rte_eth_dev *dev;
1654 struct rte_eth_dev_info dev_info;
1655 struct rte_eth_txconf local_conf;
1658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1660 dev = &rte_eth_devices[port_id];
1661 if (tx_queue_id >= dev->data->nb_tx_queues) {
1662 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1669 rte_eth_dev_info_get(port_id, &dev_info);
1671 /* Use default specified by driver, if nb_tx_desc is zero */
1672 if (nb_tx_desc == 0) {
1673 nb_tx_desc = dev_info.default_txportconf.ring_size;
1674 /* If driver default is zero, fall back on EAL default */
1675 if (nb_tx_desc == 0)
1676 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1678 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1679 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1680 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1682 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1683 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1684 dev_info.tx_desc_lim.nb_min,
1685 dev_info.tx_desc_lim.nb_align);
1689 if (dev->data->dev_started &&
1690 !(dev_info.dev_capa &
1691 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1694 if (dev->data->dev_started &&
1695 (dev->data->tx_queue_state[tx_queue_id] !=
1696 RTE_ETH_QUEUE_STATE_STOPPED))
1699 txq = dev->data->tx_queues;
1700 if (txq[tx_queue_id]) {
1701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1703 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1704 txq[tx_queue_id] = NULL;
1707 if (tx_conf == NULL)
1708 tx_conf = &dev_info.default_txconf;
1711 * Convert between the offloads API to enable PMDs to support
1714 local_conf = *tx_conf;
1715 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1716 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1717 &local_conf.offloads);
1721 * If an offloading has already been enabled in
1722 * rte_eth_dev_configure(), it has been enabled on all queues,
1723 * so there is no need to enable it in this queue again.
1724 * The local_conf.offloads input to underlying PMD only carries
1725 * those offloadings which are only enabled on this queue and
1726 * not enabled on all queues.
1728 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1731 * New added offloadings for this queue are those not enabled in
1732 * rte_eth_dev_configure() and they must be per-queue type.
1733 * A pure per-port offloading can't be enabled on a queue while
1734 * disabled on another queue. A pure per-port offloading can't
1735 * be enabled for any queue as new added one if it hasn't been
1736 * enabled in rte_eth_dev_configure().
1738 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1739 local_conf.offloads) {
1741 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1742 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1743 port_id, tx_queue_id, local_conf.offloads,
1744 dev_info.tx_queue_offload_capa,
1749 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1750 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1754 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1755 void *userdata __rte_unused)
1759 for (i = 0; i < unsent; i++)
1760 rte_pktmbuf_free(pkts[i]);
1764 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1767 uint64_t *count = userdata;
1770 for (i = 0; i < unsent; i++)
1771 rte_pktmbuf_free(pkts[i]);
1777 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1778 buffer_tx_error_fn cbfn, void *userdata)
1780 buffer->error_callback = cbfn;
1781 buffer->error_userdata = userdata;
1786 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1793 buffer->size = size;
1794 if (buffer->error_callback == NULL) {
1795 ret = rte_eth_tx_buffer_set_err_callback(
1796 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1803 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1805 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1808 /* Validate Input Data. Bail if not valid or not supported. */
1809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1812 /* Call driver to free pending mbufs. */
1813 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1815 return eth_err(port_id, ret);
1819 rte_eth_promiscuous_enable(uint16_t port_id)
1821 struct rte_eth_dev *dev;
1823 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1824 dev = &rte_eth_devices[port_id];
1826 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1827 (*dev->dev_ops->promiscuous_enable)(dev);
1828 dev->data->promiscuous = 1;
1832 rte_eth_promiscuous_disable(uint16_t port_id)
1834 struct rte_eth_dev *dev;
1836 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1837 dev = &rte_eth_devices[port_id];
1839 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1840 dev->data->promiscuous = 0;
1841 (*dev->dev_ops->promiscuous_disable)(dev);
1845 rte_eth_promiscuous_get(uint16_t port_id)
1847 struct rte_eth_dev *dev;
1849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1851 dev = &rte_eth_devices[port_id];
1852 return dev->data->promiscuous;
1856 rte_eth_allmulticast_enable(uint16_t port_id)
1858 struct rte_eth_dev *dev;
1860 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1861 dev = &rte_eth_devices[port_id];
1863 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1864 (*dev->dev_ops->allmulticast_enable)(dev);
1865 dev->data->all_multicast = 1;
1869 rte_eth_allmulticast_disable(uint16_t port_id)
1871 struct rte_eth_dev *dev;
1873 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1874 dev = &rte_eth_devices[port_id];
1876 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1877 dev->data->all_multicast = 0;
1878 (*dev->dev_ops->allmulticast_disable)(dev);
1882 rte_eth_allmulticast_get(uint16_t port_id)
1884 struct rte_eth_dev *dev;
1886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1888 dev = &rte_eth_devices[port_id];
1889 return dev->data->all_multicast;
1893 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1895 struct rte_eth_dev *dev;
1897 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1898 dev = &rte_eth_devices[port_id];
1900 if (dev->data->dev_conf.intr_conf.lsc &&
1901 dev->data->dev_started)
1902 rte_eth_linkstatus_get(dev, eth_link);
1904 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1905 (*dev->dev_ops->link_update)(dev, 1);
1906 *eth_link = dev->data->dev_link;
1911 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1913 struct rte_eth_dev *dev;
1915 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1916 dev = &rte_eth_devices[port_id];
1918 if (dev->data->dev_conf.intr_conf.lsc &&
1919 dev->data->dev_started)
1920 rte_eth_linkstatus_get(dev, eth_link);
1922 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1923 (*dev->dev_ops->link_update)(dev, 0);
1924 *eth_link = dev->data->dev_link;
1929 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1931 struct rte_eth_dev *dev;
1933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1935 dev = &rte_eth_devices[port_id];
1936 memset(stats, 0, sizeof(*stats));
1938 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1939 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1940 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1944 rte_eth_stats_reset(uint16_t port_id)
1946 struct rte_eth_dev *dev;
1948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1949 dev = &rte_eth_devices[port_id];
1951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1952 (*dev->dev_ops->stats_reset)(dev);
1953 dev->data->rx_mbuf_alloc_failed = 0;
1959 get_xstats_basic_count(struct rte_eth_dev *dev)
1961 uint16_t nb_rxqs, nb_txqs;
1964 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1965 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1967 count = RTE_NB_STATS;
1968 count += nb_rxqs * RTE_NB_RXQ_STATS;
1969 count += nb_txqs * RTE_NB_TXQ_STATS;
1975 get_xstats_count(uint16_t port_id)
1977 struct rte_eth_dev *dev;
1980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1981 dev = &rte_eth_devices[port_id];
1982 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1983 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1986 return eth_err(port_id, count);
1988 if (dev->dev_ops->xstats_get_names != NULL) {
1989 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1991 return eth_err(port_id, count);
1996 count += get_xstats_basic_count(dev);
2002 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2005 int cnt_xstats, idx_xstat;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2010 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2015 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2020 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2021 if (cnt_xstats < 0) {
2022 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2026 /* Get id-name lookup table */
2027 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2029 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2030 port_id, xstats_names, cnt_xstats, NULL)) {
2031 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2035 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2036 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2045 /* retrieve basic stats names */
2047 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2048 struct rte_eth_xstat_name *xstats_names)
2050 int cnt_used_entries = 0;
2051 uint32_t idx, id_queue;
2054 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2055 snprintf(xstats_names[cnt_used_entries].name,
2056 sizeof(xstats_names[0].name),
2057 "%s", rte_stats_strings[idx].name);
2060 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2061 for (id_queue = 0; id_queue < num_q; id_queue++) {
2062 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2063 snprintf(xstats_names[cnt_used_entries].name,
2064 sizeof(xstats_names[0].name),
2066 id_queue, rte_rxq_stats_strings[idx].name);
2071 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2072 for (id_queue = 0; id_queue < num_q; id_queue++) {
2073 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2074 snprintf(xstats_names[cnt_used_entries].name,
2075 sizeof(xstats_names[0].name),
2077 id_queue, rte_txq_stats_strings[idx].name);
2081 return cnt_used_entries;
2084 /* retrieve ethdev extended statistics names */
2086 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2087 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2090 struct rte_eth_xstat_name *xstats_names_copy;
2091 unsigned int no_basic_stat_requested = 1;
2092 unsigned int no_ext_stat_requested = 1;
2093 unsigned int expected_entries;
2094 unsigned int basic_count;
2095 struct rte_eth_dev *dev;
2099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2100 dev = &rte_eth_devices[port_id];
2102 basic_count = get_xstats_basic_count(dev);
2103 ret = get_xstats_count(port_id);
2106 expected_entries = (unsigned int)ret;
2108 /* Return max number of stats if no ids given */
2111 return expected_entries;
2112 else if (xstats_names && size < expected_entries)
2113 return expected_entries;
2116 if (ids && !xstats_names)
2119 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2120 uint64_t ids_copy[size];
2122 for (i = 0; i < size; i++) {
2123 if (ids[i] < basic_count) {
2124 no_basic_stat_requested = 0;
2129 * Convert ids to xstats ids that PMD knows.
2130 * ids known by user are basic + extended stats.
2132 ids_copy[i] = ids[i] - basic_count;
2135 if (no_basic_stat_requested)
2136 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2137 xstats_names, ids_copy, size);
2140 /* Retrieve all stats */
2142 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2144 if (num_stats < 0 || num_stats > (int)expected_entries)
2147 return expected_entries;
2150 xstats_names_copy = calloc(expected_entries,
2151 sizeof(struct rte_eth_xstat_name));
2153 if (!xstats_names_copy) {
2154 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2159 for (i = 0; i < size; i++) {
2160 if (ids[i] >= basic_count) {
2161 no_ext_stat_requested = 0;
2167 /* Fill xstats_names_copy structure */
2168 if (ids && no_ext_stat_requested) {
2169 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2171 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2174 free(xstats_names_copy);
2180 for (i = 0; i < size; i++) {
2181 if (ids[i] >= expected_entries) {
2182 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2183 free(xstats_names_copy);
2186 xstats_names[i] = xstats_names_copy[ids[i]];
2189 free(xstats_names_copy);
2194 rte_eth_xstats_get_names(uint16_t port_id,
2195 struct rte_eth_xstat_name *xstats_names,
2198 struct rte_eth_dev *dev;
2199 int cnt_used_entries;
2200 int cnt_expected_entries;
2201 int cnt_driver_entries;
2203 cnt_expected_entries = get_xstats_count(port_id);
2204 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2205 (int)size < cnt_expected_entries)
2206 return cnt_expected_entries;
2208 /* port_id checked in get_xstats_count() */
2209 dev = &rte_eth_devices[port_id];
2211 cnt_used_entries = rte_eth_basic_stats_get_names(
2214 if (dev->dev_ops->xstats_get_names != NULL) {
2215 /* If there are any driver-specific xstats, append them
2218 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2220 xstats_names + cnt_used_entries,
2221 size - cnt_used_entries);
2222 if (cnt_driver_entries < 0)
2223 return eth_err(port_id, cnt_driver_entries);
2224 cnt_used_entries += cnt_driver_entries;
2227 return cnt_used_entries;
2232 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2234 struct rte_eth_dev *dev;
2235 struct rte_eth_stats eth_stats;
2236 unsigned int count = 0, i, q;
2237 uint64_t val, *stats_ptr;
2238 uint16_t nb_rxqs, nb_txqs;
2241 ret = rte_eth_stats_get(port_id, ð_stats);
2245 dev = &rte_eth_devices[port_id];
2247 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2248 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2251 for (i = 0; i < RTE_NB_STATS; i++) {
2252 stats_ptr = RTE_PTR_ADD(ð_stats,
2253 rte_stats_strings[i].offset);
2255 xstats[count++].value = val;
2259 for (q = 0; q < nb_rxqs; q++) {
2260 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2261 stats_ptr = RTE_PTR_ADD(ð_stats,
2262 rte_rxq_stats_strings[i].offset +
2263 q * sizeof(uint64_t));
2265 xstats[count++].value = val;
2270 for (q = 0; q < nb_txqs; q++) {
2271 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2272 stats_ptr = RTE_PTR_ADD(ð_stats,
2273 rte_txq_stats_strings[i].offset +
2274 q * sizeof(uint64_t));
2276 xstats[count++].value = val;
2282 /* retrieve ethdev extended statistics */
2284 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2285 uint64_t *values, unsigned int size)
2287 unsigned int no_basic_stat_requested = 1;
2288 unsigned int no_ext_stat_requested = 1;
2289 unsigned int num_xstats_filled;
2290 unsigned int basic_count;
2291 uint16_t expected_entries;
2292 struct rte_eth_dev *dev;
2296 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2297 ret = get_xstats_count(port_id);
2300 expected_entries = (uint16_t)ret;
2301 struct rte_eth_xstat xstats[expected_entries];
2302 dev = &rte_eth_devices[port_id];
2303 basic_count = get_xstats_basic_count(dev);
2305 /* Return max number of stats if no ids given */
2308 return expected_entries;
2309 else if (values && size < expected_entries)
2310 return expected_entries;
2316 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2317 unsigned int basic_count = get_xstats_basic_count(dev);
2318 uint64_t ids_copy[size];
2320 for (i = 0; i < size; i++) {
2321 if (ids[i] < basic_count) {
2322 no_basic_stat_requested = 0;
2327 * Convert ids to xstats ids that PMD knows.
2328 * ids known by user are basic + extended stats.
2330 ids_copy[i] = ids[i] - basic_count;
2333 if (no_basic_stat_requested)
2334 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2339 for (i = 0; i < size; i++) {
2340 if (ids[i] >= basic_count) {
2341 no_ext_stat_requested = 0;
2347 /* Fill the xstats structure */
2348 if (ids && no_ext_stat_requested)
2349 ret = rte_eth_basic_stats_get(port_id, xstats);
2351 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2355 num_xstats_filled = (unsigned int)ret;
2357 /* Return all stats */
2359 for (i = 0; i < num_xstats_filled; i++)
2360 values[i] = xstats[i].value;
2361 return expected_entries;
2365 for (i = 0; i < size; i++) {
2366 if (ids[i] >= expected_entries) {
2367 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2370 values[i] = xstats[ids[i]].value;
2376 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2379 struct rte_eth_dev *dev;
2380 unsigned int count = 0, i;
2381 signed int xcount = 0;
2382 uint16_t nb_rxqs, nb_txqs;
2385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2387 dev = &rte_eth_devices[port_id];
2389 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2390 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2392 /* Return generic statistics */
2393 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2394 (nb_txqs * RTE_NB_TXQ_STATS);
2396 /* implemented by the driver */
2397 if (dev->dev_ops->xstats_get != NULL) {
2398 /* Retrieve the xstats from the driver at the end of the
2401 xcount = (*dev->dev_ops->xstats_get)(dev,
2402 xstats ? xstats + count : NULL,
2403 (n > count) ? n - count : 0);
2406 return eth_err(port_id, xcount);
2409 if (n < count + xcount || xstats == NULL)
2410 return count + xcount;
2412 /* now fill the xstats structure */
2413 ret = rte_eth_basic_stats_get(port_id, xstats);
2418 for (i = 0; i < count; i++)
2420 /* add an offset to driver-specific stats */
2421 for ( ; i < count + xcount; i++)
2422 xstats[i].id += count;
2424 return count + xcount;
2427 /* reset ethdev extended statistics */
2429 rte_eth_xstats_reset(uint16_t port_id)
2431 struct rte_eth_dev *dev;
2433 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2434 dev = &rte_eth_devices[port_id];
2436 /* implemented by the driver */
2437 if (dev->dev_ops->xstats_reset != NULL) {
2438 (*dev->dev_ops->xstats_reset)(dev);
2442 /* fallback to default */
2443 rte_eth_stats_reset(port_id);
2447 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2450 struct rte_eth_dev *dev;
2452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2454 dev = &rte_eth_devices[port_id];
2456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2457 return (*dev->dev_ops->queue_stats_mapping_set)
2458 (dev, queue_id, stat_idx, is_rx);
2463 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2466 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2467 stat_idx, STAT_QMAP_TX));
2472 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2475 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2476 stat_idx, STAT_QMAP_RX));
2480 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2482 struct rte_eth_dev *dev;
2484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2485 dev = &rte_eth_devices[port_id];
2487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2488 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2489 fw_version, fw_size));
2493 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2495 struct rte_eth_dev *dev;
2496 struct rte_eth_txconf *txconf;
2497 const struct rte_eth_desc_lim lim = {
2498 .nb_max = UINT16_MAX,
2503 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2504 dev = &rte_eth_devices[port_id];
2506 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2507 dev_info->rx_desc_lim = lim;
2508 dev_info->tx_desc_lim = lim;
2509 dev_info->device = dev->device;
2511 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2512 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2513 dev_info->driver_name = dev->device->driver->name;
2514 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2515 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2517 dev_info->dev_flags = &dev->data->dev_flags;
2518 txconf = &dev_info->default_txconf;
2519 /* convert offload to txq_flags to support legacy app */
2520 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2524 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2525 uint32_t *ptypes, int num)
2528 struct rte_eth_dev *dev;
2529 const uint32_t *all_ptypes;
2531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2532 dev = &rte_eth_devices[port_id];
2533 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2534 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2539 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2540 if (all_ptypes[i] & ptype_mask) {
2542 ptypes[j] = all_ptypes[i];
2550 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2552 struct rte_eth_dev *dev;
2554 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2555 dev = &rte_eth_devices[port_id];
2556 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2561 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2563 struct rte_eth_dev *dev;
2565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2567 dev = &rte_eth_devices[port_id];
2568 *mtu = dev->data->mtu;
2573 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2576 struct rte_eth_dev *dev;
2578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2579 dev = &rte_eth_devices[port_id];
2580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2582 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2584 dev->data->mtu = mtu;
2586 return eth_err(port_id, ret);
2590 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2592 struct rte_eth_dev *dev;
2595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2596 dev = &rte_eth_devices[port_id];
2597 if (!(dev->data->dev_conf.rxmode.offloads &
2598 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2599 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2604 if (vlan_id > 4095) {
2605 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2611 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2613 struct rte_vlan_filter_conf *vfc;
2617 vfc = &dev->data->vlan_filter_conf;
2618 vidx = vlan_id / 64;
2619 vbit = vlan_id % 64;
2622 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2624 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2627 return eth_err(port_id, ret);
2631 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2634 struct rte_eth_dev *dev;
2636 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2637 dev = &rte_eth_devices[port_id];
2638 if (rx_queue_id >= dev->data->nb_rx_queues) {
2639 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2644 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2650 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2651 enum rte_vlan_type vlan_type,
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2657 dev = &rte_eth_devices[port_id];
2658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2660 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2665 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2667 struct rte_eth_dev *dev;
2671 uint64_t orig_offloads;
2673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2674 dev = &rte_eth_devices[port_id];
2676 /* save original values in case of failure */
2677 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2679 /*check which option changed by application*/
2680 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2681 org = !!(dev->data->dev_conf.rxmode.offloads &
2682 DEV_RX_OFFLOAD_VLAN_STRIP);
2685 dev->data->dev_conf.rxmode.offloads |=
2686 DEV_RX_OFFLOAD_VLAN_STRIP;
2688 dev->data->dev_conf.rxmode.offloads &=
2689 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2690 mask |= ETH_VLAN_STRIP_MASK;
2693 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2694 org = !!(dev->data->dev_conf.rxmode.offloads &
2695 DEV_RX_OFFLOAD_VLAN_FILTER);
2698 dev->data->dev_conf.rxmode.offloads |=
2699 DEV_RX_OFFLOAD_VLAN_FILTER;
2701 dev->data->dev_conf.rxmode.offloads &=
2702 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2703 mask |= ETH_VLAN_FILTER_MASK;
2706 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2707 org = !!(dev->data->dev_conf.rxmode.offloads &
2708 DEV_RX_OFFLOAD_VLAN_EXTEND);
2711 dev->data->dev_conf.rxmode.offloads |=
2712 DEV_RX_OFFLOAD_VLAN_EXTEND;
2714 dev->data->dev_conf.rxmode.offloads &=
2715 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2716 mask |= ETH_VLAN_EXTEND_MASK;
2723 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2724 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2726 /* hit an error restore original values */
2727 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2730 return eth_err(port_id, ret);
2734 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2736 struct rte_eth_dev *dev;
2739 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2740 dev = &rte_eth_devices[port_id];
2742 if (dev->data->dev_conf.rxmode.offloads &
2743 DEV_RX_OFFLOAD_VLAN_STRIP)
2744 ret |= ETH_VLAN_STRIP_OFFLOAD;
2746 if (dev->data->dev_conf.rxmode.offloads &
2747 DEV_RX_OFFLOAD_VLAN_FILTER)
2748 ret |= ETH_VLAN_FILTER_OFFLOAD;
2750 if (dev->data->dev_conf.rxmode.offloads &
2751 DEV_RX_OFFLOAD_VLAN_EXTEND)
2752 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2758 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2760 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 dev = &rte_eth_devices[port_id];
2764 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2766 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2770 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2772 struct rte_eth_dev *dev;
2774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 dev = &rte_eth_devices[port_id];
2776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2777 memset(fc_conf, 0, sizeof(*fc_conf));
2778 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2782 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2784 struct rte_eth_dev *dev;
2786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2787 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2788 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2792 dev = &rte_eth_devices[port_id];
2793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2794 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2798 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2799 struct rte_eth_pfc_conf *pfc_conf)
2801 struct rte_eth_dev *dev;
2803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2805 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2809 dev = &rte_eth_devices[port_id];
2810 /* High water, low water validation are device specific */
2811 if (*dev->dev_ops->priority_flow_ctrl_set)
2812 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2818 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2826 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2827 for (i = 0; i < num; i++) {
2828 if (reta_conf[i].mask)
2836 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2840 uint16_t i, idx, shift;
2846 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2850 for (i = 0; i < reta_size; i++) {
2851 idx = i / RTE_RETA_GROUP_SIZE;
2852 shift = i % RTE_RETA_GROUP_SIZE;
2853 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2854 (reta_conf[idx].reta[shift] >= max_rxq)) {
2856 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2858 reta_conf[idx].reta[shift], max_rxq);
2867 rte_eth_dev_rss_reta_update(uint16_t port_id,
2868 struct rte_eth_rss_reta_entry64 *reta_conf,
2871 struct rte_eth_dev *dev;
2874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2875 /* Check mask bits */
2876 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2880 dev = &rte_eth_devices[port_id];
2882 /* Check entry value */
2883 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2884 dev->data->nb_rx_queues);
2888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2889 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2894 rte_eth_dev_rss_reta_query(uint16_t port_id,
2895 struct rte_eth_rss_reta_entry64 *reta_conf,
2898 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2903 /* Check mask bits */
2904 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2908 dev = &rte_eth_devices[port_id];
2909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2910 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2915 rte_eth_dev_rss_hash_update(uint16_t port_id,
2916 struct rte_eth_rss_conf *rss_conf)
2918 struct rte_eth_dev *dev;
2919 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2922 dev = &rte_eth_devices[port_id];
2923 rte_eth_dev_info_get(port_id, &dev_info);
2924 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2925 dev_info.flow_type_rss_offloads) {
2927 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2928 port_id, rss_conf->rss_hf,
2929 dev_info.flow_type_rss_offloads);
2932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2933 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2938 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2939 struct rte_eth_rss_conf *rss_conf)
2941 struct rte_eth_dev *dev;
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 dev = &rte_eth_devices[port_id];
2945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2946 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2951 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2952 struct rte_eth_udp_tunnel *udp_tunnel)
2954 struct rte_eth_dev *dev;
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 if (udp_tunnel == NULL) {
2958 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2962 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2963 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2967 dev = &rte_eth_devices[port_id];
2968 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2969 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2974 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2975 struct rte_eth_udp_tunnel *udp_tunnel)
2977 struct rte_eth_dev *dev;
2979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2980 dev = &rte_eth_devices[port_id];
2982 if (udp_tunnel == NULL) {
2983 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2987 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2988 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2993 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2998 rte_eth_led_on(uint16_t port_id)
3000 struct rte_eth_dev *dev;
3002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3003 dev = &rte_eth_devices[port_id];
3004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3005 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3009 rte_eth_led_off(uint16_t port_id)
3011 struct rte_eth_dev *dev;
3013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3014 dev = &rte_eth_devices[port_id];
3015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3016 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3020 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3024 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3026 struct rte_eth_dev_info dev_info;
3027 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3031 rte_eth_dev_info_get(port_id, &dev_info);
3033 for (i = 0; i < dev_info.max_mac_addrs; i++)
3034 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3040 static const struct ether_addr null_mac_addr;
3043 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3046 struct rte_eth_dev *dev;
3051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3052 dev = &rte_eth_devices[port_id];
3053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3055 if (is_zero_ether_addr(addr)) {
3056 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3060 if (pool >= ETH_64_POOLS) {
3061 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3065 index = get_mac_addr_index(port_id, addr);
3067 index = get_mac_addr_index(port_id, &null_mac_addr);
3069 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3074 pool_mask = dev->data->mac_pool_sel[index];
3076 /* Check if both MAC address and pool is already there, and do nothing */
3077 if (pool_mask & (1ULL << pool))
3082 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3085 /* Update address in NIC data structure */
3086 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3088 /* Update pool bitmap in NIC data structure */
3089 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3092 return eth_err(port_id, ret);
3096 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3098 struct rte_eth_dev *dev;
3101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3102 dev = &rte_eth_devices[port_id];
3103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3105 index = get_mac_addr_index(port_id, addr);
3108 "Port %u: Cannot remove default MAC address\n",
3111 } else if (index < 0)
3112 return 0; /* Do nothing if address wasn't found */
3115 (*dev->dev_ops->mac_addr_remove)(dev, index);
3117 /* Update address in NIC data structure */
3118 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3120 /* reset pool bitmap */
3121 dev->data->mac_pool_sel[index] = 0;
3127 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3129 struct rte_eth_dev *dev;
3132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3134 if (!is_valid_assigned_ether_addr(addr))
3137 dev = &rte_eth_devices[port_id];
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3140 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3144 /* Update default address in NIC data structure */
3145 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3152 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3156 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3158 struct rte_eth_dev_info dev_info;
3159 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3162 rte_eth_dev_info_get(port_id, &dev_info);
3163 if (!dev->data->hash_mac_addrs)
3166 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3167 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3168 ETHER_ADDR_LEN) == 0)
3175 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3180 struct rte_eth_dev *dev;
3182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3184 dev = &rte_eth_devices[port_id];
3185 if (is_zero_ether_addr(addr)) {
3186 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3191 index = get_hash_mac_addr_index(port_id, addr);
3192 /* Check if it's already there, and do nothing */
3193 if ((index >= 0) && on)
3199 "Port %u: the MAC address was not set in UTA\n",
3204 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3206 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3213 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3215 /* Update address in NIC data structure */
3217 ether_addr_copy(addr,
3218 &dev->data->hash_mac_addrs[index]);
3220 ether_addr_copy(&null_mac_addr,
3221 &dev->data->hash_mac_addrs[index]);
3224 return eth_err(port_id, ret);
3228 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3230 struct rte_eth_dev *dev;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3234 dev = &rte_eth_devices[port_id];
3236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3237 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3241 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3244 struct rte_eth_dev *dev;
3245 struct rte_eth_dev_info dev_info;
3246 struct rte_eth_link link;
3248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3250 dev = &rte_eth_devices[port_id];
3251 rte_eth_dev_info_get(port_id, &dev_info);
3252 link = dev->data->dev_link;
3254 if (queue_idx > dev_info.max_tx_queues) {
3256 "Set queue rate limit:port %u: invalid queue id=%u\n",
3257 port_id, queue_idx);
3261 if (tx_rate > link.link_speed) {
3263 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3264 tx_rate, link.link_speed);
3268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3269 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3270 queue_idx, tx_rate));
3274 rte_eth_mirror_rule_set(uint16_t port_id,
3275 struct rte_eth_mirror_conf *mirror_conf,
3276 uint8_t rule_id, uint8_t on)
3278 struct rte_eth_dev *dev;
3280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3281 if (mirror_conf->rule_type == 0) {
3282 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3286 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3287 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3292 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3293 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3294 (mirror_conf->pool_mask == 0)) {
3296 "Invalid mirror pool, pool mask can not be 0\n");
3300 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3301 mirror_conf->vlan.vlan_mask == 0) {
3303 "Invalid vlan mask, vlan mask can not be 0\n");
3307 dev = &rte_eth_devices[port_id];
3308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3310 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3311 mirror_conf, rule_id, on));
3315 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3317 struct rte_eth_dev *dev;
3319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3321 dev = &rte_eth_devices[port_id];
3322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3324 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3328 RTE_INIT(eth_dev_init_cb_lists)
3332 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3333 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3337 rte_eth_dev_callback_register(uint16_t port_id,
3338 enum rte_eth_event_type event,
3339 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3341 struct rte_eth_dev *dev;
3342 struct rte_eth_dev_callback *user_cb;
3343 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3349 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3350 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3354 if (port_id == RTE_ETH_ALL) {
3356 last_port = RTE_MAX_ETHPORTS - 1;
3358 next_port = last_port = port_id;
3361 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3364 dev = &rte_eth_devices[next_port];
3366 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3367 if (user_cb->cb_fn == cb_fn &&
3368 user_cb->cb_arg == cb_arg &&
3369 user_cb->event == event) {
3374 /* create a new callback. */
3375 if (user_cb == NULL) {
3376 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3377 sizeof(struct rte_eth_dev_callback), 0);
3378 if (user_cb != NULL) {
3379 user_cb->cb_fn = cb_fn;
3380 user_cb->cb_arg = cb_arg;
3381 user_cb->event = event;
3382 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3385 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3386 rte_eth_dev_callback_unregister(port_id, event,
3392 } while (++next_port <= last_port);
3394 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3399 rte_eth_dev_callback_unregister(uint16_t port_id,
3400 enum rte_eth_event_type event,
3401 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3404 struct rte_eth_dev *dev;
3405 struct rte_eth_dev_callback *cb, *next;
3406 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3412 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3413 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3417 if (port_id == RTE_ETH_ALL) {
3419 last_port = RTE_MAX_ETHPORTS - 1;
3421 next_port = last_port = port_id;
3424 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3427 dev = &rte_eth_devices[next_port];
3429 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3432 next = TAILQ_NEXT(cb, next);
3434 if (cb->cb_fn != cb_fn || cb->event != event ||
3435 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3439 * if this callback is not executing right now,
3442 if (cb->active == 0) {
3443 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3449 } while (++next_port <= last_port);
3451 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3456 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3457 enum rte_eth_event_type event, void *ret_param)
3459 struct rte_eth_dev_callback *cb_lst;
3460 struct rte_eth_dev_callback dev_cb;
3463 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3464 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3465 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3469 if (ret_param != NULL)
3470 dev_cb.ret_param = ret_param;
3472 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3473 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3474 dev_cb.cb_arg, dev_cb.ret_param);
3475 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3478 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3483 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3488 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3490 dev->state = RTE_ETH_DEV_ATTACHED;
3494 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3497 struct rte_eth_dev *dev;
3498 struct rte_intr_handle *intr_handle;
3502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3504 dev = &rte_eth_devices[port_id];
3506 if (!dev->intr_handle) {
3507 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3511 intr_handle = dev->intr_handle;
3512 if (!intr_handle->intr_vec) {
3513 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3517 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3518 vec = intr_handle->intr_vec[qid];
3519 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3520 if (rc && rc != -EEXIST) {
3522 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3523 port_id, qid, op, epfd, vec);
3530 const struct rte_memzone *
3531 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3532 uint16_t queue_id, size_t size, unsigned align,
3535 char z_name[RTE_MEMZONE_NAMESIZE];
3536 const struct rte_memzone *mz;
3538 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3539 dev->device->driver->name, ring_name,
3540 dev->data->port_id, queue_id);
3542 mz = rte_memzone_lookup(z_name);
3546 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3547 RTE_MEMZONE_IOVA_CONTIG, align);
3550 int __rte_experimental
3551 rte_eth_dev_create(struct rte_device *device, const char *name,
3552 size_t priv_data_size,
3553 ethdev_bus_specific_init ethdev_bus_specific_init,
3554 void *bus_init_params,
3555 ethdev_init_t ethdev_init, void *init_params)
3557 struct rte_eth_dev *ethdev;
3560 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3562 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3563 ethdev = rte_eth_dev_allocate(name);
3569 if (priv_data_size) {
3570 ethdev->data->dev_private = rte_zmalloc_socket(
3571 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3574 if (!ethdev->data->dev_private) {
3575 RTE_LOG(ERR, EAL, "failed to allocate private data");
3581 ethdev = rte_eth_dev_attach_secondary(name);
3583 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3584 "ethdev doesn't exist");
3590 ethdev->device = device;
3592 if (ethdev_bus_specific_init) {
3593 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3596 "ethdev bus specific initialisation failed");
3601 retval = ethdev_init(ethdev, init_params);
3603 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3607 rte_eth_dev_probing_finish(ethdev);
3611 /* free ports private data if primary process */
3612 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3613 rte_free(ethdev->data->dev_private);
3615 rte_eth_dev_release_port(ethdev);
3620 int __rte_experimental
3621 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3622 ethdev_uninit_t ethdev_uninit)
3626 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3630 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3631 if (ethdev_uninit) {
3632 ret = ethdev_uninit(ethdev);
3637 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3638 rte_free(ethdev->data->dev_private);
3640 ethdev->data->dev_private = NULL;
3642 return rte_eth_dev_release_port(ethdev);
3646 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3647 int epfd, int op, void *data)
3650 struct rte_eth_dev *dev;
3651 struct rte_intr_handle *intr_handle;
3654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3656 dev = &rte_eth_devices[port_id];
3657 if (queue_id >= dev->data->nb_rx_queues) {
3658 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3662 if (!dev->intr_handle) {
3663 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3667 intr_handle = dev->intr_handle;
3668 if (!intr_handle->intr_vec) {
3669 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3673 vec = intr_handle->intr_vec[queue_id];
3674 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3675 if (rc && rc != -EEXIST) {
3677 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3678 port_id, queue_id, op, epfd, vec);
3686 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3689 struct rte_eth_dev *dev;
3691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3693 dev = &rte_eth_devices[port_id];
3695 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3696 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3701 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3704 struct rte_eth_dev *dev;
3706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3708 dev = &rte_eth_devices[port_id];
3710 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3711 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3717 rte_eth_dev_filter_supported(uint16_t port_id,
3718 enum rte_filter_type filter_type)
3720 struct rte_eth_dev *dev;
3722 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3724 dev = &rte_eth_devices[port_id];
3725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3726 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3727 RTE_ETH_FILTER_NOP, NULL);
3731 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3732 enum rte_filter_op filter_op, void *arg)
3734 struct rte_eth_dev *dev;
3736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3738 dev = &rte_eth_devices[port_id];
3739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3740 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3744 const struct rte_eth_rxtx_callback *
3745 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3746 rte_rx_callback_fn fn, void *user_param)
3748 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3749 rte_errno = ENOTSUP;
3752 /* check input parameters */
3753 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3754 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3758 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3766 cb->param = user_param;
3768 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3769 /* Add the callbacks in fifo order. */
3770 struct rte_eth_rxtx_callback *tail =
3771 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3774 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3781 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3786 const struct rte_eth_rxtx_callback *
3787 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3788 rte_rx_callback_fn fn, void *user_param)
3790 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3791 rte_errno = ENOTSUP;
3794 /* check input parameters */
3795 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3796 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3801 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3809 cb->param = user_param;
3811 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3812 /* Add the callbacks at fisrt position*/
3813 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3815 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3816 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3821 const struct rte_eth_rxtx_callback *
3822 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3823 rte_tx_callback_fn fn, void *user_param)
3825 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3826 rte_errno = ENOTSUP;
3829 /* check input parameters */
3830 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3831 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3836 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3844 cb->param = user_param;
3846 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3847 /* Add the callbacks in fifo order. */
3848 struct rte_eth_rxtx_callback *tail =
3849 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3852 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3859 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3865 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3866 const struct rte_eth_rxtx_callback *user_cb)
3868 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3871 /* Check input parameters. */
3872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3873 if (user_cb == NULL ||
3874 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3877 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3878 struct rte_eth_rxtx_callback *cb;
3879 struct rte_eth_rxtx_callback **prev_cb;
3882 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3883 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3884 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3886 if (cb == user_cb) {
3887 /* Remove the user cb from the callback list. */
3888 *prev_cb = cb->next;
3893 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3899 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3900 const struct rte_eth_rxtx_callback *user_cb)
3902 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3905 /* Check input parameters. */
3906 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3907 if (user_cb == NULL ||
3908 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3911 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3913 struct rte_eth_rxtx_callback *cb;
3914 struct rte_eth_rxtx_callback **prev_cb;
3916 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3917 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3918 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3920 if (cb == user_cb) {
3921 /* Remove the user cb from the callback list. */
3922 *prev_cb = cb->next;
3927 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3933 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3934 struct rte_eth_rxq_info *qinfo)
3936 struct rte_eth_dev *dev;
3938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3943 dev = &rte_eth_devices[port_id];
3944 if (queue_id >= dev->data->nb_rx_queues) {
3945 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3951 memset(qinfo, 0, sizeof(*qinfo));
3952 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3957 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3958 struct rte_eth_txq_info *qinfo)
3960 struct rte_eth_dev *dev;
3961 struct rte_eth_txconf *txconf = &qinfo->conf;
3963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3968 dev = &rte_eth_devices[port_id];
3969 if (queue_id >= dev->data->nb_tx_queues) {
3970 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3976 memset(qinfo, 0, sizeof(*qinfo));
3977 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3978 /* convert offload to txq_flags to support legacy app */
3979 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3985 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3986 struct ether_addr *mc_addr_set,
3987 uint32_t nb_mc_addr)
3989 struct rte_eth_dev *dev;
3991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3993 dev = &rte_eth_devices[port_id];
3994 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3995 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3996 mc_addr_set, nb_mc_addr));
4000 rte_eth_timesync_enable(uint16_t port_id)
4002 struct rte_eth_dev *dev;
4004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4005 dev = &rte_eth_devices[port_id];
4007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4008 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4012 rte_eth_timesync_disable(uint16_t port_id)
4014 struct rte_eth_dev *dev;
4016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4017 dev = &rte_eth_devices[port_id];
4019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4020 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4024 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4027 struct rte_eth_dev *dev;
4029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4030 dev = &rte_eth_devices[port_id];
4032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4033 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4034 (dev, timestamp, flags));
4038 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4039 struct timespec *timestamp)
4041 struct rte_eth_dev *dev;
4043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4044 dev = &rte_eth_devices[port_id];
4046 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4047 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4052 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4054 struct rte_eth_dev *dev;
4056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4057 dev = &rte_eth_devices[port_id];
4059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4060 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4065 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4067 struct rte_eth_dev *dev;
4069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4070 dev = &rte_eth_devices[port_id];
4072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4073 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4078 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4080 struct rte_eth_dev *dev;
4082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4083 dev = &rte_eth_devices[port_id];
4085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4086 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4091 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4093 struct rte_eth_dev *dev;
4095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4097 dev = &rte_eth_devices[port_id];
4098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4099 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4103 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4105 struct rte_eth_dev *dev;
4107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4109 dev = &rte_eth_devices[port_id];
4110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4111 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4115 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4117 struct rte_eth_dev *dev;
4119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4121 dev = &rte_eth_devices[port_id];
4122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4123 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4127 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4129 struct rte_eth_dev *dev;
4131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4133 dev = &rte_eth_devices[port_id];
4134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4135 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4138 int __rte_experimental
4139 rte_eth_dev_get_module_info(uint16_t port_id,
4140 struct rte_eth_dev_module_info *modinfo)
4142 struct rte_eth_dev *dev;
4144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4146 dev = &rte_eth_devices[port_id];
4147 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4148 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4151 int __rte_experimental
4152 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4153 struct rte_dev_eeprom_info *info)
4155 struct rte_eth_dev *dev;
4157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4159 dev = &rte_eth_devices[port_id];
4160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4161 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4165 rte_eth_dev_get_dcb_info(uint16_t port_id,
4166 struct rte_eth_dcb_info *dcb_info)
4168 struct rte_eth_dev *dev;
4170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4172 dev = &rte_eth_devices[port_id];
4173 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4175 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4176 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4180 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4181 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4183 struct rte_eth_dev *dev;
4185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4186 if (l2_tunnel == NULL) {
4187 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4191 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4192 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4196 dev = &rte_eth_devices[port_id];
4197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4199 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4204 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4205 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4209 struct rte_eth_dev *dev;
4211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4213 if (l2_tunnel == NULL) {
4214 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4218 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4219 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4224 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4228 dev = &rte_eth_devices[port_id];
4229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4231 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4232 l2_tunnel, mask, en));
4236 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4237 const struct rte_eth_desc_lim *desc_lim)
4239 if (desc_lim->nb_align != 0)
4240 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4242 if (desc_lim->nb_max != 0)
4243 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4245 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4249 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4250 uint16_t *nb_rx_desc,
4251 uint16_t *nb_tx_desc)
4253 struct rte_eth_dev *dev;
4254 struct rte_eth_dev_info dev_info;
4256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4258 dev = &rte_eth_devices[port_id];
4259 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4261 rte_eth_dev_info_get(port_id, &dev_info);
4263 if (nb_rx_desc != NULL)
4264 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4266 if (nb_tx_desc != NULL)
4267 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4273 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4275 struct rte_eth_dev *dev;
4277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4282 dev = &rte_eth_devices[port_id];
4284 if (*dev->dev_ops->pool_ops_supported == NULL)
4285 return 1; /* all pools are supported */
4287 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4291 * A set of values to describe the possible states of a switch domain.
4293 enum rte_eth_switch_domain_state {
4294 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4295 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4299 * Array of switch domains available for allocation. Array is sized to
4300 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4301 * ethdev ports in a single process.
4303 struct rte_eth_dev_switch {
4304 enum rte_eth_switch_domain_state state;
4305 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4307 int __rte_experimental
4308 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4312 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4314 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4315 i < RTE_MAX_ETHPORTS; i++) {
4316 if (rte_eth_switch_domains[i].state ==
4317 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4318 rte_eth_switch_domains[i].state =
4319 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4328 int __rte_experimental
4329 rte_eth_switch_domain_free(uint16_t domain_id)
4331 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4332 domain_id >= RTE_MAX_ETHPORTS)
4335 if (rte_eth_switch_domains[domain_id].state !=
4336 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4339 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4344 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4347 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4350 struct rte_kvargs_pair *pair;
4353 arglist->str = strdup(str_in);
4354 if (arglist->str == NULL)
4357 letter = arglist->str;
4360 pair = &arglist->pairs[0];
4363 case 0: /* Initial */
4366 else if (*letter == '\0')
4373 case 1: /* Parsing key */
4374 if (*letter == '=') {
4376 pair->value = letter + 1;
4378 } else if (*letter == ',' || *letter == '\0')
4383 case 2: /* Parsing value */
4386 else if (*letter == ',') {
4389 pair = &arglist->pairs[arglist->count];
4391 } else if (*letter == '\0') {
4394 pair = &arglist->pairs[arglist->count];
4399 case 3: /* Parsing list */
4402 else if (*letter == '\0')
4411 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4419 /* Single element, not a list */
4420 return callback(str, data);
4422 /* Sanity check, then strip the brackets */
4423 str_start = &str[strlen(str) - 1];
4424 if (*str_start != ']') {
4425 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4431 /* Process list elements */
4441 } else if (state == 1) {
4442 if (*str == ',' || *str == '\0') {
4443 if (str > str_start) {
4444 /* Non-empty string fragment */
4446 result = callback(str_start, data);
4459 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4460 const uint16_t max_list)
4462 uint16_t lo, hi, val;
4465 result = sscanf(str, "%hu-%hu", &lo, &hi);
4467 if (*len_list >= max_list)
4469 list[(*len_list)++] = lo;
4470 } else if (result == 2) {
4471 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4473 for (val = lo; val <= hi; val++) {
4474 if (*len_list >= max_list)
4476 list[(*len_list)++] = val;
4485 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4487 struct rte_eth_devargs *eth_da = data;
4489 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4490 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4493 int __rte_experimental
4494 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4496 struct rte_kvargs args;
4497 struct rte_kvargs_pair *pair;
4501 memset(eth_da, 0, sizeof(*eth_da));
4503 result = rte_eth_devargs_tokenise(&args, dargs);
4507 for (i = 0; i < args.count; i++) {
4508 pair = &args.pairs[i];
4509 if (strcmp("representor", pair->key) == 0) {
4510 result = rte_eth_devargs_parse_list(pair->value,
4511 rte_eth_devargs_parse_representor_ports,
4525 RTE_INIT(ethdev_init_log);
4527 ethdev_init_log(void)
4529 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4530 if (rte_eth_dev_logtype >= 0)
4531 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);