1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
695 rte_eth_dev_shared_data_prepare();
697 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699 if (rte_eth_is_valid_owner_id(owner_id)) {
700 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701 if (rte_eth_devices[port_id].data->owner.id == owner_id)
702 memset(&rte_eth_devices[port_id].data->owner, 0,
703 sizeof(struct rte_eth_dev_owner));
704 RTE_ETHDEV_LOG(NOTICE,
705 "All port owners owned by %016"PRIx64" identifier have removed\n",
709 "Invalid owner id=%016"PRIx64"\n",
713 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
717 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
720 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
722 rte_eth_dev_shared_data_prepare();
724 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
726 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
727 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
731 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
734 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
739 rte_eth_dev_socket_id(uint16_t port_id)
741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
742 return rte_eth_devices[port_id].data->numa_node;
746 rte_eth_dev_get_sec_ctx(uint16_t port_id)
748 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
749 return rte_eth_devices[port_id].security_ctx;
753 rte_eth_dev_count(void)
755 return rte_eth_dev_count_avail();
759 rte_eth_dev_count_avail(void)
766 RTE_ETH_FOREACH_DEV(p)
773 rte_eth_dev_count_total(void)
775 uint16_t port, count = 0;
777 RTE_ETH_FOREACH_VALID_DEV(port)
784 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
791 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
795 /* shouldn't check 'rte_eth_devices[i].data',
796 * because it might be overwritten by VDEV PMD */
797 tmp = rte_eth_dev_shared_data->data[port_id].name;
803 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
808 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
812 RTE_ETH_FOREACH_VALID_DEV(pid)
813 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
822 eth_err(uint16_t port_id, int ret)
826 if (rte_eth_dev_is_removed(port_id))
832 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
834 uint16_t old_nb_queues = dev->data->nb_rx_queues;
838 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
839 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
840 sizeof(dev->data->rx_queues[0]) * nb_queues,
841 RTE_CACHE_LINE_SIZE);
842 if (dev->data->rx_queues == NULL) {
843 dev->data->nb_rx_queues = 0;
846 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
849 rxq = dev->data->rx_queues;
851 for (i = nb_queues; i < old_nb_queues; i++)
852 (*dev->dev_ops->rx_queue_release)(rxq[i]);
853 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
854 RTE_CACHE_LINE_SIZE);
857 if (nb_queues > old_nb_queues) {
858 uint16_t new_qs = nb_queues - old_nb_queues;
860 memset(rxq + old_nb_queues, 0,
861 sizeof(rxq[0]) * new_qs);
864 dev->data->rx_queues = rxq;
866 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
869 rxq = dev->data->rx_queues;
871 for (i = nb_queues; i < old_nb_queues; i++)
872 (*dev->dev_ops->rx_queue_release)(rxq[i]);
874 rte_free(dev->data->rx_queues);
875 dev->data->rx_queues = NULL;
877 dev->data->nb_rx_queues = nb_queues;
882 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
884 struct rte_eth_dev *dev;
886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
888 dev = &rte_eth_devices[port_id];
889 if (!dev->data->dev_started) {
891 "Port %u must be started before start any queue\n",
896 if (rx_queue_id >= dev->data->nb_rx_queues) {
897 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
903 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
905 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
906 rx_queue_id, port_id);
910 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
916 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
918 struct rte_eth_dev *dev;
920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
922 dev = &rte_eth_devices[port_id];
923 if (rx_queue_id >= dev->data->nb_rx_queues) {
924 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
930 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
932 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
933 rx_queue_id, port_id);
937 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
942 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
944 struct rte_eth_dev *dev;
946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
948 dev = &rte_eth_devices[port_id];
949 if (!dev->data->dev_started) {
951 "Port %u must be started before start any queue\n",
956 if (tx_queue_id >= dev->data->nb_tx_queues) {
957 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
963 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
965 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
966 tx_queue_id, port_id);
970 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
974 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
976 struct rte_eth_dev *dev;
978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
980 dev = &rte_eth_devices[port_id];
981 if (tx_queue_id >= dev->data->nb_tx_queues) {
982 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
988 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
990 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
991 tx_queue_id, port_id);
995 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1000 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1002 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1006 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1007 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1008 sizeof(dev->data->tx_queues[0]) * nb_queues,
1009 RTE_CACHE_LINE_SIZE);
1010 if (dev->data->tx_queues == NULL) {
1011 dev->data->nb_tx_queues = 0;
1014 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1017 txq = dev->data->tx_queues;
1019 for (i = nb_queues; i < old_nb_queues; i++)
1020 (*dev->dev_ops->tx_queue_release)(txq[i]);
1021 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1022 RTE_CACHE_LINE_SIZE);
1025 if (nb_queues > old_nb_queues) {
1026 uint16_t new_qs = nb_queues - old_nb_queues;
1028 memset(txq + old_nb_queues, 0,
1029 sizeof(txq[0]) * new_qs);
1032 dev->data->tx_queues = txq;
1034 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1037 txq = dev->data->tx_queues;
1039 for (i = nb_queues; i < old_nb_queues; i++)
1040 (*dev->dev_ops->tx_queue_release)(txq[i]);
1042 rte_free(dev->data->tx_queues);
1043 dev->data->tx_queues = NULL;
1045 dev->data->nb_tx_queues = nb_queues;
1050 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1053 case ETH_SPEED_NUM_10M:
1054 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1055 case ETH_SPEED_NUM_100M:
1056 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1057 case ETH_SPEED_NUM_1G:
1058 return ETH_LINK_SPEED_1G;
1059 case ETH_SPEED_NUM_2_5G:
1060 return ETH_LINK_SPEED_2_5G;
1061 case ETH_SPEED_NUM_5G:
1062 return ETH_LINK_SPEED_5G;
1063 case ETH_SPEED_NUM_10G:
1064 return ETH_LINK_SPEED_10G;
1065 case ETH_SPEED_NUM_20G:
1066 return ETH_LINK_SPEED_20G;
1067 case ETH_SPEED_NUM_25G:
1068 return ETH_LINK_SPEED_25G;
1069 case ETH_SPEED_NUM_40G:
1070 return ETH_LINK_SPEED_40G;
1071 case ETH_SPEED_NUM_50G:
1072 return ETH_LINK_SPEED_50G;
1073 case ETH_SPEED_NUM_56G:
1074 return ETH_LINK_SPEED_56G;
1075 case ETH_SPEED_NUM_100G:
1076 return ETH_LINK_SPEED_100G;
1083 rte_eth_dev_rx_offload_name(uint64_t offload)
1085 const char *name = "UNKNOWN";
1088 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1089 if (offload == rte_rx_offload_names[i].offload) {
1090 name = rte_rx_offload_names[i].name;
1099 rte_eth_dev_tx_offload_name(uint64_t offload)
1101 const char *name = "UNKNOWN";
1104 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1105 if (offload == rte_tx_offload_names[i].offload) {
1106 name = rte_tx_offload_names[i].name;
1115 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1116 const struct rte_eth_conf *dev_conf)
1118 struct rte_eth_dev *dev;
1119 struct rte_eth_dev_info dev_info;
1120 struct rte_eth_conf orig_conf;
1124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1126 dev = &rte_eth_devices[port_id];
1128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1131 if (dev->data->dev_started) {
1133 "Port %u must be stopped to allow configuration\n",
1138 /* Store original config, as rollback required on failure */
1139 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1142 * Copy the dev_conf parameter into the dev structure.
1143 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1145 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1147 rte_eth_dev_info_get(port_id, &dev_info);
1149 /* If number of queues specified by application for both Rx and Tx is
1150 * zero, use driver preferred values. This cannot be done individually
1151 * as it is valid for either Tx or Rx (but not both) to be zero.
1152 * If driver does not provide any preferred valued, fall back on
1155 if (nb_rx_q == 0 && nb_tx_q == 0) {
1156 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1158 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1159 nb_tx_q = dev_info.default_txportconf.nb_queues;
1161 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1164 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1166 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1167 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1172 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1174 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1175 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1181 * Check that the numbers of RX and TX queues are not greater
1182 * than the maximum number of RX and TX queues supported by the
1183 * configured device.
1185 if (nb_rx_q > dev_info.max_rx_queues) {
1186 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1187 port_id, nb_rx_q, dev_info.max_rx_queues);
1192 if (nb_tx_q > dev_info.max_tx_queues) {
1193 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1194 port_id, nb_tx_q, dev_info.max_tx_queues);
1199 /* Check that the device supports requested interrupts */
1200 if ((dev_conf->intr_conf.lsc == 1) &&
1201 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1202 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1203 dev->device->driver->name);
1207 if ((dev_conf->intr_conf.rmv == 1) &&
1208 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1209 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1210 dev->device->driver->name);
1216 * If jumbo frames are enabled, check that the maximum RX packet
1217 * length is supported by the configured device.
1219 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1220 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1222 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1223 port_id, dev_conf->rxmode.max_rx_pkt_len,
1224 dev_info.max_rx_pktlen);
1227 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1229 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1230 port_id, dev_conf->rxmode.max_rx_pkt_len,
1231 (unsigned int)RTE_ETHER_MIN_LEN);
1236 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1237 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1238 /* Use default value */
1239 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1243 /* Any requested offloading must be within its device capabilities */
1244 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1245 dev_conf->rxmode.offloads) {
1247 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1248 "capabilities 0x%"PRIx64" in %s()\n",
1249 port_id, dev_conf->rxmode.offloads,
1250 dev_info.rx_offload_capa,
1255 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1256 dev_conf->txmode.offloads) {
1258 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1259 "capabilities 0x%"PRIx64" in %s()\n",
1260 port_id, dev_conf->txmode.offloads,
1261 dev_info.tx_offload_capa,
1267 /* Check that device supports requested rss hash functions. */
1268 if ((dev_info.flow_type_rss_offloads |
1269 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1270 dev_info.flow_type_rss_offloads) {
1272 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1273 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1274 dev_info.flow_type_rss_offloads);
1280 * Setup new number of RX/TX queues and reconfigure device.
1282 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1285 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1291 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1294 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1296 rte_eth_dev_rx_queue_config(dev, 0);
1301 diag = (*dev->dev_ops->dev_configure)(dev);
1303 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1305 rte_eth_dev_rx_queue_config(dev, 0);
1306 rte_eth_dev_tx_queue_config(dev, 0);
1307 ret = eth_err(port_id, diag);
1311 /* Initialize Rx profiling if enabled at compilation time. */
1312 diag = __rte_eth_dev_profile_init(port_id, dev);
1314 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1316 rte_eth_dev_rx_queue_config(dev, 0);
1317 rte_eth_dev_tx_queue_config(dev, 0);
1318 ret = eth_err(port_id, diag);
1325 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1331 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1333 if (dev->data->dev_started) {
1334 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1335 dev->data->port_id);
1339 rte_eth_dev_rx_queue_config(dev, 0);
1340 rte_eth_dev_tx_queue_config(dev, 0);
1342 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1346 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1347 struct rte_eth_dev_info *dev_info)
1349 struct rte_ether_addr *addr;
1354 /* replay MAC address configuration including default MAC */
1355 addr = &dev->data->mac_addrs[0];
1356 if (*dev->dev_ops->mac_addr_set != NULL)
1357 (*dev->dev_ops->mac_addr_set)(dev, addr);
1358 else if (*dev->dev_ops->mac_addr_add != NULL)
1359 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1361 if (*dev->dev_ops->mac_addr_add != NULL) {
1362 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1363 addr = &dev->data->mac_addrs[i];
1365 /* skip zero address */
1366 if (rte_is_zero_ether_addr(addr))
1370 pool_mask = dev->data->mac_pool_sel[i];
1373 if (pool_mask & 1ULL)
1374 (*dev->dev_ops->mac_addr_add)(dev,
1378 } while (pool_mask);
1384 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1385 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1387 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1388 rte_eth_dev_mac_restore(dev, dev_info);
1390 /* replay promiscuous configuration */
1391 if (rte_eth_promiscuous_get(port_id) == 1)
1392 rte_eth_promiscuous_enable(port_id);
1393 else if (rte_eth_promiscuous_get(port_id) == 0)
1394 rte_eth_promiscuous_disable(port_id);
1396 /* replay all multicast configuration */
1397 if (rte_eth_allmulticast_get(port_id) == 1)
1398 rte_eth_allmulticast_enable(port_id);
1399 else if (rte_eth_allmulticast_get(port_id) == 0)
1400 rte_eth_allmulticast_disable(port_id);
1404 rte_eth_dev_start(uint16_t port_id)
1406 struct rte_eth_dev *dev;
1407 struct rte_eth_dev_info dev_info;
1410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1412 dev = &rte_eth_devices[port_id];
1414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1416 if (dev->data->dev_started != 0) {
1417 RTE_ETHDEV_LOG(INFO,
1418 "Device with port_id=%"PRIu16" already started\n",
1423 rte_eth_dev_info_get(port_id, &dev_info);
1425 /* Lets restore MAC now if device does not support live change */
1426 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1427 rte_eth_dev_mac_restore(dev, &dev_info);
1429 diag = (*dev->dev_ops->dev_start)(dev);
1431 dev->data->dev_started = 1;
1433 return eth_err(port_id, diag);
1435 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1437 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1438 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1439 (*dev->dev_ops->link_update)(dev, 0);
1445 rte_eth_dev_stop(uint16_t port_id)
1447 struct rte_eth_dev *dev;
1449 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1450 dev = &rte_eth_devices[port_id];
1452 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1454 if (dev->data->dev_started == 0) {
1455 RTE_ETHDEV_LOG(INFO,
1456 "Device with port_id=%"PRIu16" already stopped\n",
1461 dev->data->dev_started = 0;
1462 (*dev->dev_ops->dev_stop)(dev);
1466 rte_eth_dev_set_link_up(uint16_t port_id)
1468 struct rte_eth_dev *dev;
1470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1472 dev = &rte_eth_devices[port_id];
1474 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1475 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1479 rte_eth_dev_set_link_down(uint16_t port_id)
1481 struct rte_eth_dev *dev;
1483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1485 dev = &rte_eth_devices[port_id];
1487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1488 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1492 rte_eth_dev_close(uint16_t port_id)
1494 struct rte_eth_dev *dev;
1496 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1497 dev = &rte_eth_devices[port_id];
1499 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1500 dev->data->dev_started = 0;
1501 (*dev->dev_ops->dev_close)(dev);
1503 /* check behaviour flag - temporary for PMD migration */
1504 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1505 /* new behaviour: send event + reset state + free all data */
1506 rte_eth_dev_release_port(dev);
1509 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1510 "The driver %s should migrate to the new behaviour.\n",
1511 dev->device->driver->name);
1512 /* old behaviour: only free queue arrays */
1513 dev->data->nb_rx_queues = 0;
1514 rte_free(dev->data->rx_queues);
1515 dev->data->rx_queues = NULL;
1516 dev->data->nb_tx_queues = 0;
1517 rte_free(dev->data->tx_queues);
1518 dev->data->tx_queues = NULL;
1522 rte_eth_dev_reset(uint16_t port_id)
1524 struct rte_eth_dev *dev;
1527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1528 dev = &rte_eth_devices[port_id];
1530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1532 rte_eth_dev_stop(port_id);
1533 ret = dev->dev_ops->dev_reset(dev);
1535 return eth_err(port_id, ret);
1539 rte_eth_dev_is_removed(uint16_t port_id)
1541 struct rte_eth_dev *dev;
1544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1546 dev = &rte_eth_devices[port_id];
1548 if (dev->state == RTE_ETH_DEV_REMOVED)
1551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1553 ret = dev->dev_ops->is_removed(dev);
1555 /* Device is physically removed. */
1556 dev->state = RTE_ETH_DEV_REMOVED;
1562 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1563 uint16_t nb_rx_desc, unsigned int socket_id,
1564 const struct rte_eth_rxconf *rx_conf,
1565 struct rte_mempool *mp)
1568 uint32_t mbp_buf_size;
1569 struct rte_eth_dev *dev;
1570 struct rte_eth_dev_info dev_info;
1571 struct rte_eth_rxconf local_conf;
1574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1576 dev = &rte_eth_devices[port_id];
1577 if (rx_queue_id >= dev->data->nb_rx_queues) {
1578 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1583 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1587 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1591 * Check the size of the mbuf data buffer.
1592 * This value must be provided in the private data of the memory pool.
1593 * First check that the memory pool has a valid private data.
1595 rte_eth_dev_info_get(port_id, &dev_info);
1596 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1597 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1598 mp->name, (int)mp->private_data_size,
1599 (int)sizeof(struct rte_pktmbuf_pool_private));
1602 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1604 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1606 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1607 mp->name, (int)mbp_buf_size,
1608 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1609 (int)RTE_PKTMBUF_HEADROOM,
1610 (int)dev_info.min_rx_bufsize);
1614 /* Use default specified by driver, if nb_rx_desc is zero */
1615 if (nb_rx_desc == 0) {
1616 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1617 /* If driver default is also zero, fall back on EAL default */
1618 if (nb_rx_desc == 0)
1619 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1622 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1623 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1624 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1627 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1628 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1629 dev_info.rx_desc_lim.nb_min,
1630 dev_info.rx_desc_lim.nb_align);
1634 if (dev->data->dev_started &&
1635 !(dev_info.dev_capa &
1636 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1639 if (dev->data->dev_started &&
1640 (dev->data->rx_queue_state[rx_queue_id] !=
1641 RTE_ETH_QUEUE_STATE_STOPPED))
1644 rxq = dev->data->rx_queues;
1645 if (rxq[rx_queue_id]) {
1646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1648 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1649 rxq[rx_queue_id] = NULL;
1652 if (rx_conf == NULL)
1653 rx_conf = &dev_info.default_rxconf;
1655 local_conf = *rx_conf;
1658 * If an offloading has already been enabled in
1659 * rte_eth_dev_configure(), it has been enabled on all queues,
1660 * so there is no need to enable it in this queue again.
1661 * The local_conf.offloads input to underlying PMD only carries
1662 * those offloadings which are only enabled on this queue and
1663 * not enabled on all queues.
1665 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1668 * New added offloadings for this queue are those not enabled in
1669 * rte_eth_dev_configure() and they must be per-queue type.
1670 * A pure per-port offloading can't be enabled on a queue while
1671 * disabled on another queue. A pure per-port offloading can't
1672 * be enabled for any queue as new added one if it hasn't been
1673 * enabled in rte_eth_dev_configure().
1675 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1676 local_conf.offloads) {
1678 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1679 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1680 port_id, rx_queue_id, local_conf.offloads,
1681 dev_info.rx_queue_offload_capa,
1686 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1687 socket_id, &local_conf, mp);
1689 if (!dev->data->min_rx_buf_size ||
1690 dev->data->min_rx_buf_size > mbp_buf_size)
1691 dev->data->min_rx_buf_size = mbp_buf_size;
1694 return eth_err(port_id, ret);
1698 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1699 uint16_t nb_tx_desc, unsigned int socket_id,
1700 const struct rte_eth_txconf *tx_conf)
1702 struct rte_eth_dev *dev;
1703 struct rte_eth_dev_info dev_info;
1704 struct rte_eth_txconf local_conf;
1707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1709 dev = &rte_eth_devices[port_id];
1710 if (tx_queue_id >= dev->data->nb_tx_queues) {
1711 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1718 rte_eth_dev_info_get(port_id, &dev_info);
1720 /* Use default specified by driver, if nb_tx_desc is zero */
1721 if (nb_tx_desc == 0) {
1722 nb_tx_desc = dev_info.default_txportconf.ring_size;
1723 /* If driver default is zero, fall back on EAL default */
1724 if (nb_tx_desc == 0)
1725 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1727 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1728 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1729 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1731 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1732 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1733 dev_info.tx_desc_lim.nb_min,
1734 dev_info.tx_desc_lim.nb_align);
1738 if (dev->data->dev_started &&
1739 !(dev_info.dev_capa &
1740 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1743 if (dev->data->dev_started &&
1744 (dev->data->tx_queue_state[tx_queue_id] !=
1745 RTE_ETH_QUEUE_STATE_STOPPED))
1748 txq = dev->data->tx_queues;
1749 if (txq[tx_queue_id]) {
1750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1752 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1753 txq[tx_queue_id] = NULL;
1756 if (tx_conf == NULL)
1757 tx_conf = &dev_info.default_txconf;
1759 local_conf = *tx_conf;
1762 * If an offloading has already been enabled in
1763 * rte_eth_dev_configure(), it has been enabled on all queues,
1764 * so there is no need to enable it in this queue again.
1765 * The local_conf.offloads input to underlying PMD only carries
1766 * those offloadings which are only enabled on this queue and
1767 * not enabled on all queues.
1769 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1772 * New added offloadings for this queue are those not enabled in
1773 * rte_eth_dev_configure() and they must be per-queue type.
1774 * A pure per-port offloading can't be enabled on a queue while
1775 * disabled on another queue. A pure per-port offloading can't
1776 * be enabled for any queue as new added one if it hasn't been
1777 * enabled in rte_eth_dev_configure().
1779 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1780 local_conf.offloads) {
1782 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1783 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1784 port_id, tx_queue_id, local_conf.offloads,
1785 dev_info.tx_queue_offload_capa,
1790 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1791 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1795 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1796 void *userdata __rte_unused)
1800 for (i = 0; i < unsent; i++)
1801 rte_pktmbuf_free(pkts[i]);
1805 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1808 uint64_t *count = userdata;
1811 for (i = 0; i < unsent; i++)
1812 rte_pktmbuf_free(pkts[i]);
1818 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1819 buffer_tx_error_fn cbfn, void *userdata)
1821 buffer->error_callback = cbfn;
1822 buffer->error_userdata = userdata;
1827 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1834 buffer->size = size;
1835 if (buffer->error_callback == NULL) {
1836 ret = rte_eth_tx_buffer_set_err_callback(
1837 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1844 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1846 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1849 /* Validate Input Data. Bail if not valid or not supported. */
1850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1853 /* Call driver to free pending mbufs. */
1854 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1856 return eth_err(port_id, ret);
1860 rte_eth_promiscuous_enable(uint16_t port_id)
1862 struct rte_eth_dev *dev;
1864 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1865 dev = &rte_eth_devices[port_id];
1867 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1868 (*dev->dev_ops->promiscuous_enable)(dev);
1869 dev->data->promiscuous = 1;
1873 rte_eth_promiscuous_disable(uint16_t port_id)
1875 struct rte_eth_dev *dev;
1877 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1878 dev = &rte_eth_devices[port_id];
1880 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1881 dev->data->promiscuous = 0;
1882 (*dev->dev_ops->promiscuous_disable)(dev);
1886 rte_eth_promiscuous_get(uint16_t port_id)
1888 struct rte_eth_dev *dev;
1890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1892 dev = &rte_eth_devices[port_id];
1893 return dev->data->promiscuous;
1897 rte_eth_allmulticast_enable(uint16_t port_id)
1899 struct rte_eth_dev *dev;
1901 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1902 dev = &rte_eth_devices[port_id];
1904 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1905 (*dev->dev_ops->allmulticast_enable)(dev);
1906 dev->data->all_multicast = 1;
1910 rte_eth_allmulticast_disable(uint16_t port_id)
1912 struct rte_eth_dev *dev;
1914 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1915 dev = &rte_eth_devices[port_id];
1917 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1918 dev->data->all_multicast = 0;
1919 (*dev->dev_ops->allmulticast_disable)(dev);
1923 rte_eth_allmulticast_get(uint16_t port_id)
1925 struct rte_eth_dev *dev;
1927 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1929 dev = &rte_eth_devices[port_id];
1930 return dev->data->all_multicast;
1934 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1936 struct rte_eth_dev *dev;
1938 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1939 dev = &rte_eth_devices[port_id];
1941 if (dev->data->dev_conf.intr_conf.lsc &&
1942 dev->data->dev_started)
1943 rte_eth_linkstatus_get(dev, eth_link);
1945 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1946 (*dev->dev_ops->link_update)(dev, 1);
1947 *eth_link = dev->data->dev_link;
1952 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1954 struct rte_eth_dev *dev;
1956 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1957 dev = &rte_eth_devices[port_id];
1959 if (dev->data->dev_conf.intr_conf.lsc &&
1960 dev->data->dev_started)
1961 rte_eth_linkstatus_get(dev, eth_link);
1963 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1964 (*dev->dev_ops->link_update)(dev, 0);
1965 *eth_link = dev->data->dev_link;
1970 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1972 struct rte_eth_dev *dev;
1974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1976 dev = &rte_eth_devices[port_id];
1977 memset(stats, 0, sizeof(*stats));
1979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1980 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1981 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1985 rte_eth_stats_reset(uint16_t port_id)
1987 struct rte_eth_dev *dev;
1989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1990 dev = &rte_eth_devices[port_id];
1992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1993 (*dev->dev_ops->stats_reset)(dev);
1994 dev->data->rx_mbuf_alloc_failed = 0;
2000 get_xstats_basic_count(struct rte_eth_dev *dev)
2002 uint16_t nb_rxqs, nb_txqs;
2005 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2006 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2008 count = RTE_NB_STATS;
2009 count += nb_rxqs * RTE_NB_RXQ_STATS;
2010 count += nb_txqs * RTE_NB_TXQ_STATS;
2016 get_xstats_count(uint16_t port_id)
2018 struct rte_eth_dev *dev;
2021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2022 dev = &rte_eth_devices[port_id];
2023 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2024 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2027 return eth_err(port_id, count);
2029 if (dev->dev_ops->xstats_get_names != NULL) {
2030 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2032 return eth_err(port_id, count);
2037 count += get_xstats_basic_count(dev);
2043 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2046 int cnt_xstats, idx_xstat;
2048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2051 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2056 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2061 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2062 if (cnt_xstats < 0) {
2063 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2067 /* Get id-name lookup table */
2068 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2070 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2071 port_id, xstats_names, cnt_xstats, NULL)) {
2072 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2076 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2077 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2086 /* retrieve basic stats names */
2088 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2089 struct rte_eth_xstat_name *xstats_names)
2091 int cnt_used_entries = 0;
2092 uint32_t idx, id_queue;
2095 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2096 strlcpy(xstats_names[cnt_used_entries].name,
2097 rte_stats_strings[idx].name,
2098 sizeof(xstats_names[0].name));
2101 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2102 for (id_queue = 0; id_queue < num_q; id_queue++) {
2103 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2104 snprintf(xstats_names[cnt_used_entries].name,
2105 sizeof(xstats_names[0].name),
2107 id_queue, rte_rxq_stats_strings[idx].name);
2112 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2113 for (id_queue = 0; id_queue < num_q; id_queue++) {
2114 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2115 snprintf(xstats_names[cnt_used_entries].name,
2116 sizeof(xstats_names[0].name),
2118 id_queue, rte_txq_stats_strings[idx].name);
2122 return cnt_used_entries;
2125 /* retrieve ethdev extended statistics names */
2127 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2128 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2131 struct rte_eth_xstat_name *xstats_names_copy;
2132 unsigned int no_basic_stat_requested = 1;
2133 unsigned int no_ext_stat_requested = 1;
2134 unsigned int expected_entries;
2135 unsigned int basic_count;
2136 struct rte_eth_dev *dev;
2140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2141 dev = &rte_eth_devices[port_id];
2143 basic_count = get_xstats_basic_count(dev);
2144 ret = get_xstats_count(port_id);
2147 expected_entries = (unsigned int)ret;
2149 /* Return max number of stats if no ids given */
2152 return expected_entries;
2153 else if (xstats_names && size < expected_entries)
2154 return expected_entries;
2157 if (ids && !xstats_names)
2160 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2161 uint64_t ids_copy[size];
2163 for (i = 0; i < size; i++) {
2164 if (ids[i] < basic_count) {
2165 no_basic_stat_requested = 0;
2170 * Convert ids to xstats ids that PMD knows.
2171 * ids known by user are basic + extended stats.
2173 ids_copy[i] = ids[i] - basic_count;
2176 if (no_basic_stat_requested)
2177 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2178 xstats_names, ids_copy, size);
2181 /* Retrieve all stats */
2183 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2185 if (num_stats < 0 || num_stats > (int)expected_entries)
2188 return expected_entries;
2191 xstats_names_copy = calloc(expected_entries,
2192 sizeof(struct rte_eth_xstat_name));
2194 if (!xstats_names_copy) {
2195 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2200 for (i = 0; i < size; i++) {
2201 if (ids[i] >= basic_count) {
2202 no_ext_stat_requested = 0;
2208 /* Fill xstats_names_copy structure */
2209 if (ids && no_ext_stat_requested) {
2210 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2212 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2215 free(xstats_names_copy);
2221 for (i = 0; i < size; i++) {
2222 if (ids[i] >= expected_entries) {
2223 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2224 free(xstats_names_copy);
2227 xstats_names[i] = xstats_names_copy[ids[i]];
2230 free(xstats_names_copy);
2235 rte_eth_xstats_get_names(uint16_t port_id,
2236 struct rte_eth_xstat_name *xstats_names,
2239 struct rte_eth_dev *dev;
2240 int cnt_used_entries;
2241 int cnt_expected_entries;
2242 int cnt_driver_entries;
2244 cnt_expected_entries = get_xstats_count(port_id);
2245 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2246 (int)size < cnt_expected_entries)
2247 return cnt_expected_entries;
2249 /* port_id checked in get_xstats_count() */
2250 dev = &rte_eth_devices[port_id];
2252 cnt_used_entries = rte_eth_basic_stats_get_names(
2255 if (dev->dev_ops->xstats_get_names != NULL) {
2256 /* If there are any driver-specific xstats, append them
2259 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2261 xstats_names + cnt_used_entries,
2262 size - cnt_used_entries);
2263 if (cnt_driver_entries < 0)
2264 return eth_err(port_id, cnt_driver_entries);
2265 cnt_used_entries += cnt_driver_entries;
2268 return cnt_used_entries;
2273 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2275 struct rte_eth_dev *dev;
2276 struct rte_eth_stats eth_stats;
2277 unsigned int count = 0, i, q;
2278 uint64_t val, *stats_ptr;
2279 uint16_t nb_rxqs, nb_txqs;
2282 ret = rte_eth_stats_get(port_id, ð_stats);
2286 dev = &rte_eth_devices[port_id];
2288 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2289 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2292 for (i = 0; i < RTE_NB_STATS; i++) {
2293 stats_ptr = RTE_PTR_ADD(ð_stats,
2294 rte_stats_strings[i].offset);
2296 xstats[count++].value = val;
2300 for (q = 0; q < nb_rxqs; q++) {
2301 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2302 stats_ptr = RTE_PTR_ADD(ð_stats,
2303 rte_rxq_stats_strings[i].offset +
2304 q * sizeof(uint64_t));
2306 xstats[count++].value = val;
2311 for (q = 0; q < nb_txqs; q++) {
2312 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2313 stats_ptr = RTE_PTR_ADD(ð_stats,
2314 rte_txq_stats_strings[i].offset +
2315 q * sizeof(uint64_t));
2317 xstats[count++].value = val;
2323 /* retrieve ethdev extended statistics */
2325 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2326 uint64_t *values, unsigned int size)
2328 unsigned int no_basic_stat_requested = 1;
2329 unsigned int no_ext_stat_requested = 1;
2330 unsigned int num_xstats_filled;
2331 unsigned int basic_count;
2332 uint16_t expected_entries;
2333 struct rte_eth_dev *dev;
2337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2338 ret = get_xstats_count(port_id);
2341 expected_entries = (uint16_t)ret;
2342 struct rte_eth_xstat xstats[expected_entries];
2343 dev = &rte_eth_devices[port_id];
2344 basic_count = get_xstats_basic_count(dev);
2346 /* Return max number of stats if no ids given */
2349 return expected_entries;
2350 else if (values && size < expected_entries)
2351 return expected_entries;
2357 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2358 unsigned int basic_count = get_xstats_basic_count(dev);
2359 uint64_t ids_copy[size];
2361 for (i = 0; i < size; i++) {
2362 if (ids[i] < basic_count) {
2363 no_basic_stat_requested = 0;
2368 * Convert ids to xstats ids that PMD knows.
2369 * ids known by user are basic + extended stats.
2371 ids_copy[i] = ids[i] - basic_count;
2374 if (no_basic_stat_requested)
2375 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2380 for (i = 0; i < size; i++) {
2381 if (ids[i] >= basic_count) {
2382 no_ext_stat_requested = 0;
2388 /* Fill the xstats structure */
2389 if (ids && no_ext_stat_requested)
2390 ret = rte_eth_basic_stats_get(port_id, xstats);
2392 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2396 num_xstats_filled = (unsigned int)ret;
2398 /* Return all stats */
2400 for (i = 0; i < num_xstats_filled; i++)
2401 values[i] = xstats[i].value;
2402 return expected_entries;
2406 for (i = 0; i < size; i++) {
2407 if (ids[i] >= expected_entries) {
2408 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2411 values[i] = xstats[ids[i]].value;
2417 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2420 struct rte_eth_dev *dev;
2421 unsigned int count = 0, i;
2422 signed int xcount = 0;
2423 uint16_t nb_rxqs, nb_txqs;
2426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2428 dev = &rte_eth_devices[port_id];
2430 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2431 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2433 /* Return generic statistics */
2434 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2435 (nb_txqs * RTE_NB_TXQ_STATS);
2437 /* implemented by the driver */
2438 if (dev->dev_ops->xstats_get != NULL) {
2439 /* Retrieve the xstats from the driver at the end of the
2442 xcount = (*dev->dev_ops->xstats_get)(dev,
2443 xstats ? xstats + count : NULL,
2444 (n > count) ? n - count : 0);
2447 return eth_err(port_id, xcount);
2450 if (n < count + xcount || xstats == NULL)
2451 return count + xcount;
2453 /* now fill the xstats structure */
2454 ret = rte_eth_basic_stats_get(port_id, xstats);
2459 for (i = 0; i < count; i++)
2461 /* add an offset to driver-specific stats */
2462 for ( ; i < count + xcount; i++)
2463 xstats[i].id += count;
2465 return count + xcount;
2468 /* reset ethdev extended statistics */
2470 rte_eth_xstats_reset(uint16_t port_id)
2472 struct rte_eth_dev *dev;
2474 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2475 dev = &rte_eth_devices[port_id];
2477 /* implemented by the driver */
2478 if (dev->dev_ops->xstats_reset != NULL) {
2479 (*dev->dev_ops->xstats_reset)(dev);
2483 /* fallback to default */
2484 rte_eth_stats_reset(port_id);
2488 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2491 struct rte_eth_dev *dev;
2493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2495 dev = &rte_eth_devices[port_id];
2497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2499 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2502 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2505 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2508 return (*dev->dev_ops->queue_stats_mapping_set)
2509 (dev, queue_id, stat_idx, is_rx);
2514 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2517 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2518 stat_idx, STAT_QMAP_TX));
2523 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2526 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2527 stat_idx, STAT_QMAP_RX));
2531 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2533 struct rte_eth_dev *dev;
2535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2536 dev = &rte_eth_devices[port_id];
2538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2539 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2540 fw_version, fw_size));
2544 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2546 struct rte_eth_dev *dev;
2547 const struct rte_eth_desc_lim lim = {
2548 .nb_max = UINT16_MAX,
2551 .nb_seg_max = UINT16_MAX,
2552 .nb_mtu_seg_max = UINT16_MAX,
2555 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2556 dev = &rte_eth_devices[port_id];
2558 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2559 dev_info->rx_desc_lim = lim;
2560 dev_info->tx_desc_lim = lim;
2561 dev_info->device = dev->device;
2562 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2563 dev_info->max_mtu = UINT16_MAX;
2565 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2566 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2567 dev_info->driver_name = dev->device->driver->name;
2568 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2569 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2571 dev_info->dev_flags = &dev->data->dev_flags;
2575 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2576 uint32_t *ptypes, int num)
2579 struct rte_eth_dev *dev;
2580 const uint32_t *all_ptypes;
2582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2583 dev = &rte_eth_devices[port_id];
2584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2585 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2590 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2591 if (all_ptypes[i] & ptype_mask) {
2593 ptypes[j] = all_ptypes[i];
2601 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2603 struct rte_eth_dev *dev;
2605 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2606 dev = &rte_eth_devices[port_id];
2607 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2612 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2614 struct rte_eth_dev *dev;
2616 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2618 dev = &rte_eth_devices[port_id];
2619 *mtu = dev->data->mtu;
2624 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2627 struct rte_eth_dev_info dev_info;
2628 struct rte_eth_dev *dev;
2630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2631 dev = &rte_eth_devices[port_id];
2632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2635 * Check if the device supports dev_infos_get, if it does not
2636 * skip min_mtu/max_mtu validation here as this requires values
2637 * that are populated within the call to rte_eth_dev_info_get()
2638 * which relies on dev->dev_ops->dev_infos_get.
2640 if (*dev->dev_ops->dev_infos_get != NULL) {
2641 rte_eth_dev_info_get(port_id, &dev_info);
2642 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2646 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2648 dev->data->mtu = mtu;
2650 return eth_err(port_id, ret);
2654 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2656 struct rte_eth_dev *dev;
2659 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2660 dev = &rte_eth_devices[port_id];
2661 if (!(dev->data->dev_conf.rxmode.offloads &
2662 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2663 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2668 if (vlan_id > 4095) {
2669 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2675 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2677 struct rte_vlan_filter_conf *vfc;
2681 vfc = &dev->data->vlan_filter_conf;
2682 vidx = vlan_id / 64;
2683 vbit = vlan_id % 64;
2686 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2688 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2691 return eth_err(port_id, ret);
2695 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2698 struct rte_eth_dev *dev;
2700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2701 dev = &rte_eth_devices[port_id];
2702 if (rx_queue_id >= dev->data->nb_rx_queues) {
2703 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2708 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2714 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2715 enum rte_vlan_type vlan_type,
2718 struct rte_eth_dev *dev;
2720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721 dev = &rte_eth_devices[port_id];
2722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2724 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2729 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2731 struct rte_eth_dev *dev;
2735 uint64_t orig_offloads;
2736 uint64_t *dev_offloads;
2738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2739 dev = &rte_eth_devices[port_id];
2741 /* save original values in case of failure */
2742 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2743 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2745 /*check which option changed by application*/
2746 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2747 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2750 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2752 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2753 mask |= ETH_VLAN_STRIP_MASK;
2756 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2757 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2760 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2762 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2763 mask |= ETH_VLAN_FILTER_MASK;
2766 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2767 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2770 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2772 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2773 mask |= ETH_VLAN_EXTEND_MASK;
2776 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2777 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2780 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2782 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2783 mask |= ETH_QINQ_STRIP_MASK;
2790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2791 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2793 /* hit an error restore original values */
2794 *dev_offloads = orig_offloads;
2797 return eth_err(port_id, ret);
2801 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2803 struct rte_eth_dev *dev;
2804 uint64_t *dev_offloads;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2808 dev = &rte_eth_devices[port_id];
2809 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2811 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2812 ret |= ETH_VLAN_STRIP_OFFLOAD;
2814 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2815 ret |= ETH_VLAN_FILTER_OFFLOAD;
2817 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2818 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2820 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2821 ret |= DEV_RX_OFFLOAD_QINQ_STRIP;
2827 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2835 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2839 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2841 struct rte_eth_dev *dev;
2843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2844 dev = &rte_eth_devices[port_id];
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2846 memset(fc_conf, 0, sizeof(*fc_conf));
2847 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2851 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2853 struct rte_eth_dev *dev;
2855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2856 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2857 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2861 dev = &rte_eth_devices[port_id];
2862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2863 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2867 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2868 struct rte_eth_pfc_conf *pfc_conf)
2870 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2874 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2878 dev = &rte_eth_devices[port_id];
2879 /* High water, low water validation are device specific */
2880 if (*dev->dev_ops->priority_flow_ctrl_set)
2881 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2887 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2895 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2896 for (i = 0; i < num; i++) {
2897 if (reta_conf[i].mask)
2905 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2909 uint16_t i, idx, shift;
2915 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2919 for (i = 0; i < reta_size; i++) {
2920 idx = i / RTE_RETA_GROUP_SIZE;
2921 shift = i % RTE_RETA_GROUP_SIZE;
2922 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2923 (reta_conf[idx].reta[shift] >= max_rxq)) {
2925 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2927 reta_conf[idx].reta[shift], max_rxq);
2936 rte_eth_dev_rss_reta_update(uint16_t port_id,
2937 struct rte_eth_rss_reta_entry64 *reta_conf,
2940 struct rte_eth_dev *dev;
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 /* Check mask bits */
2945 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2949 dev = &rte_eth_devices[port_id];
2951 /* Check entry value */
2952 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2953 dev->data->nb_rx_queues);
2957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2958 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2963 rte_eth_dev_rss_reta_query(uint16_t port_id,
2964 struct rte_eth_rss_reta_entry64 *reta_conf,
2967 struct rte_eth_dev *dev;
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 /* Check mask bits */
2973 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2977 dev = &rte_eth_devices[port_id];
2978 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2979 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2984 rte_eth_dev_rss_hash_update(uint16_t port_id,
2985 struct rte_eth_rss_conf *rss_conf)
2987 struct rte_eth_dev *dev;
2988 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2990 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2991 dev = &rte_eth_devices[port_id];
2992 rte_eth_dev_info_get(port_id, &dev_info);
2993 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2994 dev_info.flow_type_rss_offloads) {
2996 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2997 port_id, rss_conf->rss_hf,
2998 dev_info.flow_type_rss_offloads);
3001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3002 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3007 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3008 struct rte_eth_rss_conf *rss_conf)
3010 struct rte_eth_dev *dev;
3012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3013 dev = &rte_eth_devices[port_id];
3014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3015 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3020 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3021 struct rte_eth_udp_tunnel *udp_tunnel)
3023 struct rte_eth_dev *dev;
3025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3026 if (udp_tunnel == NULL) {
3027 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3031 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3032 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3036 dev = &rte_eth_devices[port_id];
3037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3038 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3043 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3044 struct rte_eth_udp_tunnel *udp_tunnel)
3046 struct rte_eth_dev *dev;
3048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 dev = &rte_eth_devices[port_id];
3051 if (udp_tunnel == NULL) {
3052 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3056 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3057 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3062 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3067 rte_eth_led_on(uint16_t port_id)
3069 struct rte_eth_dev *dev;
3071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3072 dev = &rte_eth_devices[port_id];
3073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3074 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3078 rte_eth_led_off(uint16_t port_id)
3080 struct rte_eth_dev *dev;
3082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3083 dev = &rte_eth_devices[port_id];
3084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3085 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3089 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3093 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3095 struct rte_eth_dev_info dev_info;
3096 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 rte_eth_dev_info_get(port_id, &dev_info);
3102 for (i = 0; i < dev_info.max_mac_addrs; i++)
3103 if (memcmp(addr, &dev->data->mac_addrs[i],
3104 RTE_ETHER_ADDR_LEN) == 0)
3110 static const struct rte_ether_addr null_mac_addr;
3113 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3116 struct rte_eth_dev *dev;
3121 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3122 dev = &rte_eth_devices[port_id];
3123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3125 if (rte_is_zero_ether_addr(addr)) {
3126 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3130 if (pool >= ETH_64_POOLS) {
3131 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3135 index = get_mac_addr_index(port_id, addr);
3137 index = get_mac_addr_index(port_id, &null_mac_addr);
3139 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3144 pool_mask = dev->data->mac_pool_sel[index];
3146 /* Check if both MAC address and pool is already there, and do nothing */
3147 if (pool_mask & (1ULL << pool))
3152 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3155 /* Update address in NIC data structure */
3156 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3158 /* Update pool bitmap in NIC data structure */
3159 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3162 return eth_err(port_id, ret);
3166 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3168 struct rte_eth_dev *dev;
3171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3172 dev = &rte_eth_devices[port_id];
3173 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3175 index = get_mac_addr_index(port_id, addr);
3178 "Port %u: Cannot remove default MAC address\n",
3181 } else if (index < 0)
3182 return 0; /* Do nothing if address wasn't found */
3185 (*dev->dev_ops->mac_addr_remove)(dev, index);
3187 /* Update address in NIC data structure */
3188 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3190 /* reset pool bitmap */
3191 dev->data->mac_pool_sel[index] = 0;
3197 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3199 struct rte_eth_dev *dev;
3202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3204 if (!rte_is_valid_assigned_ether_addr(addr))
3207 dev = &rte_eth_devices[port_id];
3208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3210 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3214 /* Update default address in NIC data structure */
3215 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3222 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3226 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3228 struct rte_eth_dev_info dev_info;
3229 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3232 rte_eth_dev_info_get(port_id, &dev_info);
3233 if (!dev->data->hash_mac_addrs)
3236 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3237 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3238 RTE_ETHER_ADDR_LEN) == 0)
3245 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3250 struct rte_eth_dev *dev;
3252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3254 dev = &rte_eth_devices[port_id];
3255 if (rte_is_zero_ether_addr(addr)) {
3256 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3261 index = get_hash_mac_addr_index(port_id, addr);
3262 /* Check if it's already there, and do nothing */
3263 if ((index >= 0) && on)
3269 "Port %u: the MAC address was not set in UTA\n",
3274 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3276 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3283 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3285 /* Update address in NIC data structure */
3287 rte_ether_addr_copy(addr,
3288 &dev->data->hash_mac_addrs[index]);
3290 rte_ether_addr_copy(&null_mac_addr,
3291 &dev->data->hash_mac_addrs[index]);
3294 return eth_err(port_id, ret);
3298 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3300 struct rte_eth_dev *dev;
3302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3304 dev = &rte_eth_devices[port_id];
3306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3307 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3311 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3314 struct rte_eth_dev *dev;
3315 struct rte_eth_dev_info dev_info;
3316 struct rte_eth_link link;
3318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3320 dev = &rte_eth_devices[port_id];
3321 rte_eth_dev_info_get(port_id, &dev_info);
3322 link = dev->data->dev_link;
3324 if (queue_idx > dev_info.max_tx_queues) {
3326 "Set queue rate limit:port %u: invalid queue id=%u\n",
3327 port_id, queue_idx);
3331 if (tx_rate > link.link_speed) {
3333 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3334 tx_rate, link.link_speed);
3338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3339 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3340 queue_idx, tx_rate));
3344 rte_eth_mirror_rule_set(uint16_t port_id,
3345 struct rte_eth_mirror_conf *mirror_conf,
3346 uint8_t rule_id, uint8_t on)
3348 struct rte_eth_dev *dev;
3350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3351 if (mirror_conf->rule_type == 0) {
3352 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3356 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3357 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3362 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3363 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3364 (mirror_conf->pool_mask == 0)) {
3366 "Invalid mirror pool, pool mask can not be 0\n");
3370 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3371 mirror_conf->vlan.vlan_mask == 0) {
3373 "Invalid vlan mask, vlan mask can not be 0\n");
3377 dev = &rte_eth_devices[port_id];
3378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3380 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3381 mirror_conf, rule_id, on));
3385 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3387 struct rte_eth_dev *dev;
3389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3391 dev = &rte_eth_devices[port_id];
3392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3394 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3398 RTE_INIT(eth_dev_init_cb_lists)
3402 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3403 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3407 rte_eth_dev_callback_register(uint16_t port_id,
3408 enum rte_eth_event_type event,
3409 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3411 struct rte_eth_dev *dev;
3412 struct rte_eth_dev_callback *user_cb;
3413 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3419 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3420 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3424 if (port_id == RTE_ETH_ALL) {
3426 last_port = RTE_MAX_ETHPORTS - 1;
3428 next_port = last_port = port_id;
3431 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3434 dev = &rte_eth_devices[next_port];
3436 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3437 if (user_cb->cb_fn == cb_fn &&
3438 user_cb->cb_arg == cb_arg &&
3439 user_cb->event == event) {
3444 /* create a new callback. */
3445 if (user_cb == NULL) {
3446 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3447 sizeof(struct rte_eth_dev_callback), 0);
3448 if (user_cb != NULL) {
3449 user_cb->cb_fn = cb_fn;
3450 user_cb->cb_arg = cb_arg;
3451 user_cb->event = event;
3452 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3455 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3456 rte_eth_dev_callback_unregister(port_id, event,
3462 } while (++next_port <= last_port);
3464 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3469 rte_eth_dev_callback_unregister(uint16_t port_id,
3470 enum rte_eth_event_type event,
3471 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3474 struct rte_eth_dev *dev;
3475 struct rte_eth_dev_callback *cb, *next;
3476 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3482 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3483 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3487 if (port_id == RTE_ETH_ALL) {
3489 last_port = RTE_MAX_ETHPORTS - 1;
3491 next_port = last_port = port_id;
3494 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3497 dev = &rte_eth_devices[next_port];
3499 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3502 next = TAILQ_NEXT(cb, next);
3504 if (cb->cb_fn != cb_fn || cb->event != event ||
3505 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3509 * if this callback is not executing right now,
3512 if (cb->active == 0) {
3513 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3519 } while (++next_port <= last_port);
3521 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3526 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3527 enum rte_eth_event_type event, void *ret_param)
3529 struct rte_eth_dev_callback *cb_lst;
3530 struct rte_eth_dev_callback dev_cb;
3533 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3534 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3535 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3539 if (ret_param != NULL)
3540 dev_cb.ret_param = ret_param;
3542 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3543 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3544 dev_cb.cb_arg, dev_cb.ret_param);
3545 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3548 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3553 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3558 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3560 dev->state = RTE_ETH_DEV_ATTACHED;
3564 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3567 struct rte_eth_dev *dev;
3568 struct rte_intr_handle *intr_handle;
3572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3574 dev = &rte_eth_devices[port_id];
3576 if (!dev->intr_handle) {
3577 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3581 intr_handle = dev->intr_handle;
3582 if (!intr_handle->intr_vec) {
3583 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3587 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3588 vec = intr_handle->intr_vec[qid];
3589 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3590 if (rc && rc != -EEXIST) {
3592 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3593 port_id, qid, op, epfd, vec);
3601 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3603 struct rte_intr_handle *intr_handle;
3604 struct rte_eth_dev *dev;
3605 unsigned int efd_idx;
3609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3611 dev = &rte_eth_devices[port_id];
3613 if (queue_id >= dev->data->nb_rx_queues) {
3614 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3618 if (!dev->intr_handle) {
3619 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3623 intr_handle = dev->intr_handle;
3624 if (!intr_handle->intr_vec) {
3625 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3629 vec = intr_handle->intr_vec[queue_id];
3630 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3631 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3632 fd = intr_handle->efds[efd_idx];
3637 const struct rte_memzone *
3638 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3639 uint16_t queue_id, size_t size, unsigned align,
3642 char z_name[RTE_MEMZONE_NAMESIZE];
3643 const struct rte_memzone *mz;
3646 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3647 dev->data->port_id, queue_id, ring_name);
3648 if (rc >= RTE_MEMZONE_NAMESIZE) {
3649 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3650 rte_errno = ENAMETOOLONG;
3654 mz = rte_memzone_lookup(z_name);
3658 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3659 RTE_MEMZONE_IOVA_CONTIG, align);
3663 rte_eth_dev_create(struct rte_device *device, const char *name,
3664 size_t priv_data_size,
3665 ethdev_bus_specific_init ethdev_bus_specific_init,
3666 void *bus_init_params,
3667 ethdev_init_t ethdev_init, void *init_params)
3669 struct rte_eth_dev *ethdev;
3672 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3674 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3675 ethdev = rte_eth_dev_allocate(name);
3679 if (priv_data_size) {
3680 ethdev->data->dev_private = rte_zmalloc_socket(
3681 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3684 if (!ethdev->data->dev_private) {
3685 RTE_LOG(ERR, EAL, "failed to allocate private data");
3691 ethdev = rte_eth_dev_attach_secondary(name);
3693 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3694 "ethdev doesn't exist");
3699 ethdev->device = device;
3701 if (ethdev_bus_specific_init) {
3702 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3705 "ethdev bus specific initialisation failed");
3710 retval = ethdev_init(ethdev, init_params);
3712 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3716 rte_eth_dev_probing_finish(ethdev);
3721 rte_eth_dev_release_port(ethdev);
3726 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3727 ethdev_uninit_t ethdev_uninit)
3731 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3735 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3737 ret = ethdev_uninit(ethdev);
3741 return rte_eth_dev_release_port(ethdev);
3745 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3746 int epfd, int op, void *data)
3749 struct rte_eth_dev *dev;
3750 struct rte_intr_handle *intr_handle;
3753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3755 dev = &rte_eth_devices[port_id];
3756 if (queue_id >= dev->data->nb_rx_queues) {
3757 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3761 if (!dev->intr_handle) {
3762 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3766 intr_handle = dev->intr_handle;
3767 if (!intr_handle->intr_vec) {
3768 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3772 vec = intr_handle->intr_vec[queue_id];
3773 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3774 if (rc && rc != -EEXIST) {
3776 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3777 port_id, queue_id, op, epfd, vec);
3785 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3788 struct rte_eth_dev *dev;
3790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3792 dev = &rte_eth_devices[port_id];
3794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3795 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3800 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3803 struct rte_eth_dev *dev;
3805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3807 dev = &rte_eth_devices[port_id];
3809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3810 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3816 rte_eth_dev_filter_supported(uint16_t port_id,
3817 enum rte_filter_type filter_type)
3819 struct rte_eth_dev *dev;
3821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3823 dev = &rte_eth_devices[port_id];
3824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3825 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3826 RTE_ETH_FILTER_NOP, NULL);
3830 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3831 enum rte_filter_op filter_op, void *arg)
3833 struct rte_eth_dev *dev;
3835 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3837 dev = &rte_eth_devices[port_id];
3838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3839 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3843 const struct rte_eth_rxtx_callback *
3844 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3845 rte_rx_callback_fn fn, void *user_param)
3847 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3848 rte_errno = ENOTSUP;
3851 /* check input parameters */
3852 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3853 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3857 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3865 cb->param = user_param;
3867 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3868 /* Add the callbacks in fifo order. */
3869 struct rte_eth_rxtx_callback *tail =
3870 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3873 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3880 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3885 const struct rte_eth_rxtx_callback *
3886 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3887 rte_rx_callback_fn fn, void *user_param)
3889 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3890 rte_errno = ENOTSUP;
3893 /* check input parameters */
3894 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3895 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3900 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3908 cb->param = user_param;
3910 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3911 /* Add the callbacks at fisrt position*/
3912 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3914 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3915 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3920 const struct rte_eth_rxtx_callback *
3921 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3922 rte_tx_callback_fn fn, void *user_param)
3924 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3925 rte_errno = ENOTSUP;
3928 /* check input parameters */
3929 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3930 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3935 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3943 cb->param = user_param;
3945 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3946 /* Add the callbacks in fifo order. */
3947 struct rte_eth_rxtx_callback *tail =
3948 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3951 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3958 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3964 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3965 const struct rte_eth_rxtx_callback *user_cb)
3967 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3970 /* Check input parameters. */
3971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3972 if (user_cb == NULL ||
3973 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3976 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3977 struct rte_eth_rxtx_callback *cb;
3978 struct rte_eth_rxtx_callback **prev_cb;
3981 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3982 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3983 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3985 if (cb == user_cb) {
3986 /* Remove the user cb from the callback list. */
3987 *prev_cb = cb->next;
3992 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3998 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3999 const struct rte_eth_rxtx_callback *user_cb)
4001 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4004 /* Check input parameters. */
4005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4006 if (user_cb == NULL ||
4007 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4010 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4012 struct rte_eth_rxtx_callback *cb;
4013 struct rte_eth_rxtx_callback **prev_cb;
4015 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4016 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4017 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4019 if (cb == user_cb) {
4020 /* Remove the user cb from the callback list. */
4021 *prev_cb = cb->next;
4026 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4032 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4033 struct rte_eth_rxq_info *qinfo)
4035 struct rte_eth_dev *dev;
4037 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4042 dev = &rte_eth_devices[port_id];
4043 if (queue_id >= dev->data->nb_rx_queues) {
4044 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4048 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4050 memset(qinfo, 0, sizeof(*qinfo));
4051 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4056 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4057 struct rte_eth_txq_info *qinfo)
4059 struct rte_eth_dev *dev;
4061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4066 dev = &rte_eth_devices[port_id];
4067 if (queue_id >= dev->data->nb_tx_queues) {
4068 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4074 memset(qinfo, 0, sizeof(*qinfo));
4075 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4081 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4082 struct rte_ether_addr *mc_addr_set,
4083 uint32_t nb_mc_addr)
4085 struct rte_eth_dev *dev;
4087 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4089 dev = &rte_eth_devices[port_id];
4090 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4091 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4092 mc_addr_set, nb_mc_addr));
4096 rte_eth_timesync_enable(uint16_t port_id)
4098 struct rte_eth_dev *dev;
4100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4101 dev = &rte_eth_devices[port_id];
4103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4104 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4108 rte_eth_timesync_disable(uint16_t port_id)
4110 struct rte_eth_dev *dev;
4112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4113 dev = &rte_eth_devices[port_id];
4115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4116 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4120 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4123 struct rte_eth_dev *dev;
4125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4126 dev = &rte_eth_devices[port_id];
4128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4129 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4130 (dev, timestamp, flags));
4134 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4135 struct timespec *timestamp)
4137 struct rte_eth_dev *dev;
4139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4140 dev = &rte_eth_devices[port_id];
4142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4143 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4148 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4150 struct rte_eth_dev *dev;
4152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4153 dev = &rte_eth_devices[port_id];
4155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4156 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4161 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4163 struct rte_eth_dev *dev;
4165 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4166 dev = &rte_eth_devices[port_id];
4168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4169 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4174 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4176 struct rte_eth_dev *dev;
4178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4179 dev = &rte_eth_devices[port_id];
4181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4182 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4187 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4189 struct rte_eth_dev *dev;
4191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4192 dev = &rte_eth_devices[port_id];
4194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4195 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4199 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4201 struct rte_eth_dev *dev;
4203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4205 dev = &rte_eth_devices[port_id];
4206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4207 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4211 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4213 struct rte_eth_dev *dev;
4215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4217 dev = &rte_eth_devices[port_id];
4218 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4219 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4223 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4225 struct rte_eth_dev *dev;
4227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4229 dev = &rte_eth_devices[port_id];
4230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4231 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4235 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4237 struct rte_eth_dev *dev;
4239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4241 dev = &rte_eth_devices[port_id];
4242 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4243 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4247 rte_eth_dev_get_module_info(uint16_t port_id,
4248 struct rte_eth_dev_module_info *modinfo)
4250 struct rte_eth_dev *dev;
4252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4254 dev = &rte_eth_devices[port_id];
4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4256 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4260 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4261 struct rte_dev_eeprom_info *info)
4263 struct rte_eth_dev *dev;
4265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4267 dev = &rte_eth_devices[port_id];
4268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4269 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4273 rte_eth_dev_get_dcb_info(uint16_t port_id,
4274 struct rte_eth_dcb_info *dcb_info)
4276 struct rte_eth_dev *dev;
4278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4280 dev = &rte_eth_devices[port_id];
4281 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4283 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4284 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4288 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4289 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4291 struct rte_eth_dev *dev;
4293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4294 if (l2_tunnel == NULL) {
4295 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4299 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4300 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4304 dev = &rte_eth_devices[port_id];
4305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4307 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4312 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4313 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4317 struct rte_eth_dev *dev;
4319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4321 if (l2_tunnel == NULL) {
4322 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4326 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4327 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4332 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4336 dev = &rte_eth_devices[port_id];
4337 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4339 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4340 l2_tunnel, mask, en));
4344 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4345 const struct rte_eth_desc_lim *desc_lim)
4347 if (desc_lim->nb_align != 0)
4348 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4350 if (desc_lim->nb_max != 0)
4351 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4353 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4357 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4358 uint16_t *nb_rx_desc,
4359 uint16_t *nb_tx_desc)
4361 struct rte_eth_dev *dev;
4362 struct rte_eth_dev_info dev_info;
4364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4366 dev = &rte_eth_devices[port_id];
4367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4369 rte_eth_dev_info_get(port_id, &dev_info);
4371 if (nb_rx_desc != NULL)
4372 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4374 if (nb_tx_desc != NULL)
4375 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4381 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4383 struct rte_eth_dev *dev;
4385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4390 dev = &rte_eth_devices[port_id];
4392 if (*dev->dev_ops->pool_ops_supported == NULL)
4393 return 1; /* all pools are supported */
4395 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4399 * A set of values to describe the possible states of a switch domain.
4401 enum rte_eth_switch_domain_state {
4402 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4403 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4407 * Array of switch domains available for allocation. Array is sized to
4408 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4409 * ethdev ports in a single process.
4411 static struct rte_eth_dev_switch {
4412 enum rte_eth_switch_domain_state state;
4413 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4416 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4420 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4422 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4423 i < RTE_MAX_ETHPORTS; i++) {
4424 if (rte_eth_switch_domains[i].state ==
4425 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4426 rte_eth_switch_domains[i].state =
4427 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4437 rte_eth_switch_domain_free(uint16_t domain_id)
4439 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4440 domain_id >= RTE_MAX_ETHPORTS)
4443 if (rte_eth_switch_domains[domain_id].state !=
4444 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4447 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4453 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4456 struct rte_kvargs_pair *pair;
4459 arglist->str = strdup(str_in);
4460 if (arglist->str == NULL)
4463 letter = arglist->str;
4466 pair = &arglist->pairs[0];
4469 case 0: /* Initial */
4472 else if (*letter == '\0')
4479 case 1: /* Parsing key */
4480 if (*letter == '=') {
4482 pair->value = letter + 1;
4484 } else if (*letter == ',' || *letter == '\0')
4489 case 2: /* Parsing value */
4492 else if (*letter == ',') {
4495 pair = &arglist->pairs[arglist->count];
4497 } else if (*letter == '\0') {
4500 pair = &arglist->pairs[arglist->count];
4505 case 3: /* Parsing list */
4508 else if (*letter == '\0')
4517 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4519 struct rte_kvargs args;
4520 struct rte_kvargs_pair *pair;
4524 memset(eth_da, 0, sizeof(*eth_da));
4526 result = rte_eth_devargs_tokenise(&args, dargs);
4530 for (i = 0; i < args.count; i++) {
4531 pair = &args.pairs[i];
4532 if (strcmp("representor", pair->key) == 0) {
4533 result = rte_eth_devargs_parse_list(pair->value,
4534 rte_eth_devargs_parse_representor_ports,
4548 RTE_INIT(ethdev_init_log)
4550 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4551 if (rte_eth_dev_logtype >= 0)
4552 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);