1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
42 #include "rte_ethdev_trace.h"
43 #include "rte_ethdev.h"
44 #include "rte_ethdev_driver.h"
45 #include "ethdev_profile.h"
46 #include "ethdev_private.h"
48 int rte_eth_dev_logtype;
50 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
51 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
505 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
511 * Attach to a port already registered by the primary process, which
512 * makes sure that the same device would have the same port id both
513 * in the primary and secondary process.
516 rte_eth_dev_attach_secondary(const char *name)
519 struct rte_eth_dev *eth_dev = NULL;
521 rte_eth_dev_shared_data_prepare();
523 /* Synchronize port attachment to primary port creation and release. */
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
530 if (i == RTE_MAX_ETHPORTS) {
532 "Device %s is not driven by the primary process\n",
535 eth_dev = eth_dev_get(i);
536 RTE_ASSERT(eth_dev->data->port_id == i);
539 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
549 rte_eth_dev_shared_data_prepare();
551 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552 _rte_eth_dev_callback_process(eth_dev,
553 RTE_ETH_EVENT_DESTROY, NULL);
555 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557 eth_dev->state = RTE_ETH_DEV_UNUSED;
559 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
560 rte_free(eth_dev->data->rx_queues);
561 rte_free(eth_dev->data->tx_queues);
562 rte_free(eth_dev->data->mac_addrs);
563 rte_free(eth_dev->data->hash_mac_addrs);
564 rte_free(eth_dev->data->dev_private);
565 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
568 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
574 rte_eth_dev_is_valid_port(uint16_t port_id)
576 if (port_id >= RTE_MAX_ETHPORTS ||
577 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
584 rte_eth_is_valid_owner_id(uint64_t owner_id)
586 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
587 rte_eth_dev_shared_data->next_owner_id <= owner_id)
593 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
595 port_id = rte_eth_find_next(port_id);
596 while (port_id < RTE_MAX_ETHPORTS &&
597 rte_eth_devices[port_id].data->owner.id != owner_id)
598 port_id = rte_eth_find_next(port_id + 1);
604 rte_eth_dev_owner_new(uint64_t *owner_id)
606 rte_eth_dev_shared_data_prepare();
608 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
610 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
612 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
617 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
618 const struct rte_eth_dev_owner *new_owner)
620 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
621 struct rte_eth_dev_owner *port_owner;
623 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
624 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
629 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
630 !rte_eth_is_valid_owner_id(old_owner_id)) {
632 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
633 old_owner_id, new_owner->id);
637 port_owner = &rte_eth_devices[port_id].data->owner;
638 if (port_owner->id != old_owner_id) {
640 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
641 port_id, port_owner->name, port_owner->id);
645 /* can not truncate (same structure) */
646 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
648 port_owner->id = new_owner->id;
650 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
651 port_id, new_owner->name, new_owner->id);
657 rte_eth_dev_owner_set(const uint16_t port_id,
658 const struct rte_eth_dev_owner *owner)
662 rte_eth_dev_shared_data_prepare();
664 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
666 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
668 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
673 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
675 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
676 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
679 rte_eth_dev_shared_data_prepare();
681 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
683 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
685 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
690 rte_eth_dev_owner_delete(const uint64_t owner_id)
695 rte_eth_dev_shared_data_prepare();
697 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699 if (rte_eth_is_valid_owner_id(owner_id)) {
700 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701 if (rte_eth_devices[port_id].data->owner.id == owner_id)
702 memset(&rte_eth_devices[port_id].data->owner, 0,
703 sizeof(struct rte_eth_dev_owner));
704 RTE_ETHDEV_LOG(NOTICE,
705 "All port owners owned by %016"PRIx64" identifier have removed\n",
709 "Invalid owner id=%016"PRIx64"\n",
714 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
720 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
723 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
725 rte_eth_dev_shared_data_prepare();
727 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
729 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
730 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
734 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
737 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
742 rte_eth_dev_socket_id(uint16_t port_id)
744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
745 return rte_eth_devices[port_id].data->numa_node;
749 rte_eth_dev_get_sec_ctx(uint16_t port_id)
751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
752 return rte_eth_devices[port_id].security_ctx;
756 rte_eth_dev_count_avail(void)
763 RTE_ETH_FOREACH_DEV(p)
770 rte_eth_dev_count_total(void)
772 uint16_t port, count = 0;
774 RTE_ETH_FOREACH_VALID_DEV(port)
781 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
792 /* shouldn't check 'rte_eth_devices[i].data',
793 * because it might be overwritten by VDEV PMD */
794 tmp = rte_eth_dev_shared_data->data[port_id].name;
800 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
805 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
809 RTE_ETH_FOREACH_VALID_DEV(pid)
810 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
819 eth_err(uint16_t port_id, int ret)
823 if (rte_eth_dev_is_removed(port_id))
829 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
831 uint16_t old_nb_queues = dev->data->nb_rx_queues;
835 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
836 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
837 sizeof(dev->data->rx_queues[0]) * nb_queues,
838 RTE_CACHE_LINE_SIZE);
839 if (dev->data->rx_queues == NULL) {
840 dev->data->nb_rx_queues = 0;
843 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
846 rxq = dev->data->rx_queues;
848 for (i = nb_queues; i < old_nb_queues; i++)
849 (*dev->dev_ops->rx_queue_release)(rxq[i]);
850 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
851 RTE_CACHE_LINE_SIZE);
854 if (nb_queues > old_nb_queues) {
855 uint16_t new_qs = nb_queues - old_nb_queues;
857 memset(rxq + old_nb_queues, 0,
858 sizeof(rxq[0]) * new_qs);
861 dev->data->rx_queues = rxq;
863 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
866 rxq = dev->data->rx_queues;
868 for (i = nb_queues; i < old_nb_queues; i++)
869 (*dev->dev_ops->rx_queue_release)(rxq[i]);
871 rte_free(dev->data->rx_queues);
872 dev->data->rx_queues = NULL;
874 dev->data->nb_rx_queues = nb_queues;
879 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
881 struct rte_eth_dev *dev;
883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
885 dev = &rte_eth_devices[port_id];
886 if (!dev->data->dev_started) {
888 "Port %u must be started before start any queue\n",
893 if (rx_queue_id >= dev->data->nb_rx_queues) {
894 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
900 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
902 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
903 rx_queue_id, port_id);
907 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
909 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
910 rx_queue_id, port_id);
914 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
920 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
922 struct rte_eth_dev *dev;
924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926 dev = &rte_eth_devices[port_id];
927 if (rx_queue_id >= dev->data->nb_rx_queues) {
928 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
934 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
936 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
937 rx_queue_id, port_id);
941 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
943 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
944 rx_queue_id, port_id);
948 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
953 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
955 struct rte_eth_dev *dev;
957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
959 dev = &rte_eth_devices[port_id];
960 if (!dev->data->dev_started) {
962 "Port %u must be started before start any queue\n",
967 if (tx_queue_id >= dev->data->nb_tx_queues) {
968 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
974 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
976 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
977 tx_queue_id, port_id);
981 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
983 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
984 tx_queue_id, port_id);
988 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
992 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
994 struct rte_eth_dev *dev;
996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
998 dev = &rte_eth_devices[port_id];
999 if (tx_queue_id >= dev->data->nb_tx_queues) {
1000 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1006 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1007 RTE_ETHDEV_LOG(INFO,
1008 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1009 tx_queue_id, port_id);
1013 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1014 RTE_ETHDEV_LOG(INFO,
1015 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1016 tx_queue_id, port_id);
1020 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1025 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1027 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1031 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1032 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1033 sizeof(dev->data->tx_queues[0]) * nb_queues,
1034 RTE_CACHE_LINE_SIZE);
1035 if (dev->data->tx_queues == NULL) {
1036 dev->data->nb_tx_queues = 0;
1039 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1042 txq = dev->data->tx_queues;
1044 for (i = nb_queues; i < old_nb_queues; i++)
1045 (*dev->dev_ops->tx_queue_release)(txq[i]);
1046 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1047 RTE_CACHE_LINE_SIZE);
1050 if (nb_queues > old_nb_queues) {
1051 uint16_t new_qs = nb_queues - old_nb_queues;
1053 memset(txq + old_nb_queues, 0,
1054 sizeof(txq[0]) * new_qs);
1057 dev->data->tx_queues = txq;
1059 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1062 txq = dev->data->tx_queues;
1064 for (i = nb_queues; i < old_nb_queues; i++)
1065 (*dev->dev_ops->tx_queue_release)(txq[i]);
1067 rte_free(dev->data->tx_queues);
1068 dev->data->tx_queues = NULL;
1070 dev->data->nb_tx_queues = nb_queues;
1075 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1078 case ETH_SPEED_NUM_10M:
1079 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1080 case ETH_SPEED_NUM_100M:
1081 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1082 case ETH_SPEED_NUM_1G:
1083 return ETH_LINK_SPEED_1G;
1084 case ETH_SPEED_NUM_2_5G:
1085 return ETH_LINK_SPEED_2_5G;
1086 case ETH_SPEED_NUM_5G:
1087 return ETH_LINK_SPEED_5G;
1088 case ETH_SPEED_NUM_10G:
1089 return ETH_LINK_SPEED_10G;
1090 case ETH_SPEED_NUM_20G:
1091 return ETH_LINK_SPEED_20G;
1092 case ETH_SPEED_NUM_25G:
1093 return ETH_LINK_SPEED_25G;
1094 case ETH_SPEED_NUM_40G:
1095 return ETH_LINK_SPEED_40G;
1096 case ETH_SPEED_NUM_50G:
1097 return ETH_LINK_SPEED_50G;
1098 case ETH_SPEED_NUM_56G:
1099 return ETH_LINK_SPEED_56G;
1100 case ETH_SPEED_NUM_100G:
1101 return ETH_LINK_SPEED_100G;
1108 rte_eth_dev_rx_offload_name(uint64_t offload)
1110 const char *name = "UNKNOWN";
1113 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1114 if (offload == rte_rx_offload_names[i].offload) {
1115 name = rte_rx_offload_names[i].name;
1124 rte_eth_dev_tx_offload_name(uint64_t offload)
1126 const char *name = "UNKNOWN";
1129 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1130 if (offload == rte_tx_offload_names[i].offload) {
1131 name = rte_tx_offload_names[i].name;
1140 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1141 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1145 if (dev_info_size == 0) {
1146 if (config_size != max_rx_pkt_len) {
1147 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1148 " %u != %u is not allowed\n",
1149 port_id, config_size, max_rx_pkt_len);
1152 } else if (config_size > dev_info_size) {
1153 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1154 "> max allowed value %u\n", port_id, config_size,
1157 } else if (config_size < RTE_ETHER_MIN_LEN) {
1158 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1159 "< min allowed value %u\n", port_id, config_size,
1160 (unsigned int)RTE_ETHER_MIN_LEN);
1167 * Validate offloads that are requested through rte_eth_dev_configure against
1168 * the offloads successfully set by the ethernet device.
1171 * The port identifier of the Ethernet device.
1172 * @param req_offloads
1173 * The offloads that have been requested through `rte_eth_dev_configure`.
1174 * @param set_offloads
1175 * The offloads successfully set by the ethernet device.
1176 * @param offload_type
1177 * The offload type i.e. Rx/Tx string.
1178 * @param offload_name
1179 * The function that prints the offload name.
1181 * - (0) if validation successful.
1182 * - (-EINVAL) if requested offload has been silently disabled.
1186 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1187 uint64_t set_offloads, const char *offload_type,
1188 const char *(*offload_name)(uint64_t))
1190 uint64_t offloads_diff = req_offloads ^ set_offloads;
1194 while (offloads_diff != 0) {
1195 /* Check if any offload is requested but not enabled. */
1196 offload = 1ULL << __builtin_ctzll(offloads_diff);
1197 if (offload & req_offloads) {
1199 "Port %u failed to enable %s offload %s\n",
1200 port_id, offload_type, offload_name(offload));
1204 /* Check if offload couldn't be disabled. */
1205 if (offload & set_offloads) {
1206 RTE_ETHDEV_LOG(DEBUG,
1207 "Port %u %s offload %s is not requested but enabled\n",
1208 port_id, offload_type, offload_name(offload));
1211 offloads_diff &= ~offload;
1218 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1219 const struct rte_eth_conf *dev_conf)
1221 struct rte_eth_dev *dev;
1222 struct rte_eth_dev_info dev_info;
1223 struct rte_eth_conf orig_conf;
1227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1229 dev = &rte_eth_devices[port_id];
1231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1233 if (dev->data->dev_started) {
1235 "Port %u must be stopped to allow configuration\n",
1240 /* Store original config, as rollback required on failure */
1241 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1244 * Copy the dev_conf parameter into the dev structure.
1245 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1247 if (dev_conf != &dev->data->dev_conf)
1248 memcpy(&dev->data->dev_conf, dev_conf,
1249 sizeof(dev->data->dev_conf));
1251 ret = rte_eth_dev_info_get(port_id, &dev_info);
1255 /* If number of queues specified by application for both Rx and Tx is
1256 * zero, use driver preferred values. This cannot be done individually
1257 * as it is valid for either Tx or Rx (but not both) to be zero.
1258 * If driver does not provide any preferred valued, fall back on
1261 if (nb_rx_q == 0 && nb_tx_q == 0) {
1262 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1264 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1265 nb_tx_q = dev_info.default_txportconf.nb_queues;
1267 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1270 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1272 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1273 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1278 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1280 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1281 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1287 * Check that the numbers of RX and TX queues are not greater
1288 * than the maximum number of RX and TX queues supported by the
1289 * configured device.
1291 if (nb_rx_q > dev_info.max_rx_queues) {
1292 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1293 port_id, nb_rx_q, dev_info.max_rx_queues);
1298 if (nb_tx_q > dev_info.max_tx_queues) {
1299 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1300 port_id, nb_tx_q, dev_info.max_tx_queues);
1305 /* Check that the device supports requested interrupts */
1306 if ((dev_conf->intr_conf.lsc == 1) &&
1307 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1308 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1309 dev->device->driver->name);
1313 if ((dev_conf->intr_conf.rmv == 1) &&
1314 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1315 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1316 dev->device->driver->name);
1322 * If jumbo frames are enabled, check that the maximum RX packet
1323 * length is supported by the configured device.
1325 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1326 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1328 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1329 port_id, dev_conf->rxmode.max_rx_pkt_len,
1330 dev_info.max_rx_pktlen);
1333 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1335 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1336 port_id, dev_conf->rxmode.max_rx_pkt_len,
1337 (unsigned int)RTE_ETHER_MIN_LEN);
1342 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1343 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1344 /* Use default value */
1345 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1350 * If LRO is enabled, check that the maximum aggregated packet
1351 * size is supported by the configured device.
1353 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1354 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1355 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1356 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1357 ret = check_lro_pkt_size(port_id,
1358 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1359 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1360 dev_info.max_lro_pkt_size);
1365 /* Any requested offloading must be within its device capabilities */
1366 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1367 dev_conf->rxmode.offloads) {
1369 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1370 "capabilities 0x%"PRIx64" in %s()\n",
1371 port_id, dev_conf->rxmode.offloads,
1372 dev_info.rx_offload_capa,
1377 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1378 dev_conf->txmode.offloads) {
1380 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1381 "capabilities 0x%"PRIx64" in %s()\n",
1382 port_id, dev_conf->txmode.offloads,
1383 dev_info.tx_offload_capa,
1389 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1390 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1392 /* Check that device supports requested rss hash functions. */
1393 if ((dev_info.flow_type_rss_offloads |
1394 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1395 dev_info.flow_type_rss_offloads) {
1397 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1398 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1399 dev_info.flow_type_rss_offloads);
1404 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1405 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1406 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1408 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1410 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1416 * Setup new number of RX/TX queues and reconfigure device.
1418 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1421 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1427 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1430 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1432 rte_eth_dev_rx_queue_config(dev, 0);
1437 diag = (*dev->dev_ops->dev_configure)(dev);
1439 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1441 ret = eth_err(port_id, diag);
1445 /* Initialize Rx profiling if enabled at compilation time. */
1446 diag = __rte_eth_dev_profile_init(port_id, dev);
1448 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1450 ret = eth_err(port_id, diag);
1454 /* Validate Rx offloads. */
1455 diag = validate_offloads(port_id,
1456 dev_conf->rxmode.offloads,
1457 dev->data->dev_conf.rxmode.offloads, "Rx",
1458 rte_eth_dev_rx_offload_name);
1464 /* Validate Tx offloads. */
1465 diag = validate_offloads(port_id,
1466 dev_conf->txmode.offloads,
1467 dev->data->dev_conf.txmode.offloads, "Tx",
1468 rte_eth_dev_tx_offload_name);
1474 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1477 rte_eth_dev_rx_queue_config(dev, 0);
1478 rte_eth_dev_tx_queue_config(dev, 0);
1480 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1482 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1487 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1489 if (dev->data->dev_started) {
1490 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1491 dev->data->port_id);
1495 rte_eth_dev_rx_queue_config(dev, 0);
1496 rte_eth_dev_tx_queue_config(dev, 0);
1498 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1502 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1503 struct rte_eth_dev_info *dev_info)
1505 struct rte_ether_addr *addr;
1510 /* replay MAC address configuration including default MAC */
1511 addr = &dev->data->mac_addrs[0];
1512 if (*dev->dev_ops->mac_addr_set != NULL)
1513 (*dev->dev_ops->mac_addr_set)(dev, addr);
1514 else if (*dev->dev_ops->mac_addr_add != NULL)
1515 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1517 if (*dev->dev_ops->mac_addr_add != NULL) {
1518 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1519 addr = &dev->data->mac_addrs[i];
1521 /* skip zero address */
1522 if (rte_is_zero_ether_addr(addr))
1526 pool_mask = dev->data->mac_pool_sel[i];
1529 if (pool_mask & 1ULL)
1530 (*dev->dev_ops->mac_addr_add)(dev,
1534 } while (pool_mask);
1540 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1541 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1545 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1546 rte_eth_dev_mac_restore(dev, dev_info);
1548 /* replay promiscuous configuration */
1550 * use callbacks directly since we don't need port_id check and
1551 * would like to bypass the same value set
1553 if (rte_eth_promiscuous_get(port_id) == 1 &&
1554 *dev->dev_ops->promiscuous_enable != NULL) {
1555 ret = eth_err(port_id,
1556 (*dev->dev_ops->promiscuous_enable)(dev));
1557 if (ret != 0 && ret != -ENOTSUP) {
1559 "Failed to enable promiscuous mode for device (port %u): %s\n",
1560 port_id, rte_strerror(-ret));
1563 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1564 *dev->dev_ops->promiscuous_disable != NULL) {
1565 ret = eth_err(port_id,
1566 (*dev->dev_ops->promiscuous_disable)(dev));
1567 if (ret != 0 && ret != -ENOTSUP) {
1569 "Failed to disable promiscuous mode for device (port %u): %s\n",
1570 port_id, rte_strerror(-ret));
1575 /* replay all multicast configuration */
1577 * use callbacks directly since we don't need port_id check and
1578 * would like to bypass the same value set
1580 if (rte_eth_allmulticast_get(port_id) == 1 &&
1581 *dev->dev_ops->allmulticast_enable != NULL) {
1582 ret = eth_err(port_id,
1583 (*dev->dev_ops->allmulticast_enable)(dev));
1584 if (ret != 0 && ret != -ENOTSUP) {
1586 "Failed to enable allmulticast mode for device (port %u): %s\n",
1587 port_id, rte_strerror(-ret));
1590 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1591 *dev->dev_ops->allmulticast_disable != NULL) {
1592 ret = eth_err(port_id,
1593 (*dev->dev_ops->allmulticast_disable)(dev));
1594 if (ret != 0 && ret != -ENOTSUP) {
1596 "Failed to disable allmulticast mode for device (port %u): %s\n",
1597 port_id, rte_strerror(-ret));
1606 rte_eth_dev_start(uint16_t port_id)
1608 struct rte_eth_dev *dev;
1609 struct rte_eth_dev_info dev_info;
1613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1615 dev = &rte_eth_devices[port_id];
1617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1619 if (dev->data->dev_started != 0) {
1620 RTE_ETHDEV_LOG(INFO,
1621 "Device with port_id=%"PRIu16" already started\n",
1626 ret = rte_eth_dev_info_get(port_id, &dev_info);
1630 /* Lets restore MAC now if device does not support live change */
1631 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1632 rte_eth_dev_mac_restore(dev, &dev_info);
1634 diag = (*dev->dev_ops->dev_start)(dev);
1636 dev->data->dev_started = 1;
1638 return eth_err(port_id, diag);
1640 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1643 "Error during restoring configuration for device (port %u): %s\n",
1644 port_id, rte_strerror(-ret));
1645 rte_eth_dev_stop(port_id);
1649 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1650 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1651 (*dev->dev_ops->link_update)(dev, 0);
1654 rte_ethdev_trace_start(port_id);
1659 rte_eth_dev_stop(uint16_t port_id)
1661 struct rte_eth_dev *dev;
1663 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1664 dev = &rte_eth_devices[port_id];
1666 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1668 if (dev->data->dev_started == 0) {
1669 RTE_ETHDEV_LOG(INFO,
1670 "Device with port_id=%"PRIu16" already stopped\n",
1675 dev->data->dev_started = 0;
1676 (*dev->dev_ops->dev_stop)(dev);
1677 rte_ethdev_trace_stop(port_id);
1681 rte_eth_dev_set_link_up(uint16_t port_id)
1683 struct rte_eth_dev *dev;
1685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1687 dev = &rte_eth_devices[port_id];
1689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1690 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1694 rte_eth_dev_set_link_down(uint16_t port_id)
1696 struct rte_eth_dev *dev;
1698 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1700 dev = &rte_eth_devices[port_id];
1702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1703 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1707 rte_eth_dev_close(uint16_t port_id)
1709 struct rte_eth_dev *dev;
1711 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1712 dev = &rte_eth_devices[port_id];
1714 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1715 dev->data->dev_started = 0;
1716 (*dev->dev_ops->dev_close)(dev);
1718 rte_ethdev_trace_close(port_id);
1719 /* check behaviour flag - temporary for PMD migration */
1720 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1721 /* new behaviour: send event + reset state + free all data */
1722 rte_eth_dev_release_port(dev);
1725 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1726 "The driver %s should migrate to the new behaviour.\n",
1727 dev->device->driver->name);
1728 /* old behaviour: only free queue arrays */
1729 dev->data->nb_rx_queues = 0;
1730 rte_free(dev->data->rx_queues);
1731 dev->data->rx_queues = NULL;
1732 dev->data->nb_tx_queues = 0;
1733 rte_free(dev->data->tx_queues);
1734 dev->data->tx_queues = NULL;
1738 rte_eth_dev_reset(uint16_t port_id)
1740 struct rte_eth_dev *dev;
1743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1744 dev = &rte_eth_devices[port_id];
1746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1748 rte_eth_dev_stop(port_id);
1749 ret = dev->dev_ops->dev_reset(dev);
1751 return eth_err(port_id, ret);
1755 rte_eth_dev_is_removed(uint16_t port_id)
1757 struct rte_eth_dev *dev;
1760 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1762 dev = &rte_eth_devices[port_id];
1764 if (dev->state == RTE_ETH_DEV_REMOVED)
1767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1769 ret = dev->dev_ops->is_removed(dev);
1771 /* Device is physically removed. */
1772 dev->state = RTE_ETH_DEV_REMOVED;
1778 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1779 uint16_t nb_rx_desc, unsigned int socket_id,
1780 const struct rte_eth_rxconf *rx_conf,
1781 struct rte_mempool *mp)
1784 uint32_t mbp_buf_size;
1785 struct rte_eth_dev *dev;
1786 struct rte_eth_dev_info dev_info;
1787 struct rte_eth_rxconf local_conf;
1790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1792 dev = &rte_eth_devices[port_id];
1793 if (rx_queue_id >= dev->data->nb_rx_queues) {
1794 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1799 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1806 * Check the size of the mbuf data buffer.
1807 * This value must be provided in the private data of the memory pool.
1808 * First check that the memory pool has a valid private data.
1810 ret = rte_eth_dev_info_get(port_id, &dev_info);
1814 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1815 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1816 mp->name, (int)mp->private_data_size,
1817 (int)sizeof(struct rte_pktmbuf_pool_private));
1820 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1822 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1824 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1825 mp->name, (int)mbp_buf_size,
1826 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1827 (int)RTE_PKTMBUF_HEADROOM,
1828 (int)dev_info.min_rx_bufsize);
1832 /* Use default specified by driver, if nb_rx_desc is zero */
1833 if (nb_rx_desc == 0) {
1834 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1835 /* If driver default is also zero, fall back on EAL default */
1836 if (nb_rx_desc == 0)
1837 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1840 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1841 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1842 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1845 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1846 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1847 dev_info.rx_desc_lim.nb_min,
1848 dev_info.rx_desc_lim.nb_align);
1852 if (dev->data->dev_started &&
1853 !(dev_info.dev_capa &
1854 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1857 if (dev->data->dev_started &&
1858 (dev->data->rx_queue_state[rx_queue_id] !=
1859 RTE_ETH_QUEUE_STATE_STOPPED))
1862 rxq = dev->data->rx_queues;
1863 if (rxq[rx_queue_id]) {
1864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1866 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1867 rxq[rx_queue_id] = NULL;
1870 if (rx_conf == NULL)
1871 rx_conf = &dev_info.default_rxconf;
1873 local_conf = *rx_conf;
1876 * If an offloading has already been enabled in
1877 * rte_eth_dev_configure(), it has been enabled on all queues,
1878 * so there is no need to enable it in this queue again.
1879 * The local_conf.offloads input to underlying PMD only carries
1880 * those offloadings which are only enabled on this queue and
1881 * not enabled on all queues.
1883 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1886 * New added offloadings for this queue are those not enabled in
1887 * rte_eth_dev_configure() and they must be per-queue type.
1888 * A pure per-port offloading can't be enabled on a queue while
1889 * disabled on another queue. A pure per-port offloading can't
1890 * be enabled for any queue as new added one if it hasn't been
1891 * enabled in rte_eth_dev_configure().
1893 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1894 local_conf.offloads) {
1896 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1897 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1898 port_id, rx_queue_id, local_conf.offloads,
1899 dev_info.rx_queue_offload_capa,
1905 * If LRO is enabled, check that the maximum aggregated packet
1906 * size is supported by the configured device.
1908 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1909 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1910 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1911 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1912 int ret = check_lro_pkt_size(port_id,
1913 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1914 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1915 dev_info.max_lro_pkt_size);
1920 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1921 socket_id, &local_conf, mp);
1923 if (!dev->data->min_rx_buf_size ||
1924 dev->data->min_rx_buf_size > mbp_buf_size)
1925 dev->data->min_rx_buf_size = mbp_buf_size;
1928 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1930 return eth_err(port_id, ret);
1934 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1935 uint16_t nb_rx_desc,
1936 const struct rte_eth_hairpin_conf *conf)
1939 struct rte_eth_dev *dev;
1940 struct rte_eth_hairpin_cap cap;
1945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1947 dev = &rte_eth_devices[port_id];
1948 if (rx_queue_id >= dev->data->nb_rx_queues) {
1949 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1952 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1955 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1957 /* if nb_rx_desc is zero use max number of desc from the driver. */
1958 if (nb_rx_desc == 0)
1959 nb_rx_desc = cap.max_nb_desc;
1960 if (nb_rx_desc > cap.max_nb_desc) {
1962 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1963 nb_rx_desc, cap.max_nb_desc);
1966 if (conf->peer_count > cap.max_rx_2_tx) {
1968 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1969 conf->peer_count, cap.max_rx_2_tx);
1972 if (conf->peer_count == 0) {
1974 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1978 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1979 cap.max_nb_queues != UINT16_MAX; i++) {
1980 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1983 if (count > cap.max_nb_queues) {
1984 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1988 if (dev->data->dev_started)
1990 rxq = dev->data->rx_queues;
1991 if (rxq[rx_queue_id] != NULL) {
1992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1994 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1995 rxq[rx_queue_id] = NULL;
1997 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2000 dev->data->rx_queue_state[rx_queue_id] =
2001 RTE_ETH_QUEUE_STATE_HAIRPIN;
2002 return eth_err(port_id, ret);
2006 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2007 uint16_t nb_tx_desc, unsigned int socket_id,
2008 const struct rte_eth_txconf *tx_conf)
2010 struct rte_eth_dev *dev;
2011 struct rte_eth_dev_info dev_info;
2012 struct rte_eth_txconf local_conf;
2016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2018 dev = &rte_eth_devices[port_id];
2019 if (tx_queue_id >= dev->data->nb_tx_queues) {
2020 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2026 ret = rte_eth_dev_info_get(port_id, &dev_info);
2030 /* Use default specified by driver, if nb_tx_desc is zero */
2031 if (nb_tx_desc == 0) {
2032 nb_tx_desc = dev_info.default_txportconf.ring_size;
2033 /* If driver default is zero, fall back on EAL default */
2034 if (nb_tx_desc == 0)
2035 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2037 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2038 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2039 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2041 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2042 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2043 dev_info.tx_desc_lim.nb_min,
2044 dev_info.tx_desc_lim.nb_align);
2048 if (dev->data->dev_started &&
2049 !(dev_info.dev_capa &
2050 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2053 if (dev->data->dev_started &&
2054 (dev->data->tx_queue_state[tx_queue_id] !=
2055 RTE_ETH_QUEUE_STATE_STOPPED))
2058 txq = dev->data->tx_queues;
2059 if (txq[tx_queue_id]) {
2060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2062 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2063 txq[tx_queue_id] = NULL;
2066 if (tx_conf == NULL)
2067 tx_conf = &dev_info.default_txconf;
2069 local_conf = *tx_conf;
2072 * If an offloading has already been enabled in
2073 * rte_eth_dev_configure(), it has been enabled on all queues,
2074 * so there is no need to enable it in this queue again.
2075 * The local_conf.offloads input to underlying PMD only carries
2076 * those offloadings which are only enabled on this queue and
2077 * not enabled on all queues.
2079 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2082 * New added offloadings for this queue are those not enabled in
2083 * rte_eth_dev_configure() and they must be per-queue type.
2084 * A pure per-port offloading can't be enabled on a queue while
2085 * disabled on another queue. A pure per-port offloading can't
2086 * be enabled for any queue as new added one if it hasn't been
2087 * enabled in rte_eth_dev_configure().
2089 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2090 local_conf.offloads) {
2092 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2093 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2094 port_id, tx_queue_id, local_conf.offloads,
2095 dev_info.tx_queue_offload_capa,
2100 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2101 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2102 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2106 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2107 uint16_t nb_tx_desc,
2108 const struct rte_eth_hairpin_conf *conf)
2110 struct rte_eth_dev *dev;
2111 struct rte_eth_hairpin_cap cap;
2117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2118 dev = &rte_eth_devices[port_id];
2119 if (tx_queue_id >= dev->data->nb_tx_queues) {
2120 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2123 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2128 /* if nb_rx_desc is zero use max number of desc from the driver. */
2129 if (nb_tx_desc == 0)
2130 nb_tx_desc = cap.max_nb_desc;
2131 if (nb_tx_desc > cap.max_nb_desc) {
2133 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2134 nb_tx_desc, cap.max_nb_desc);
2137 if (conf->peer_count > cap.max_tx_2_rx) {
2139 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2140 conf->peer_count, cap.max_tx_2_rx);
2143 if (conf->peer_count == 0) {
2145 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2149 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2150 cap.max_nb_queues != UINT16_MAX; i++) {
2151 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2154 if (count > cap.max_nb_queues) {
2155 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2159 if (dev->data->dev_started)
2161 txq = dev->data->tx_queues;
2162 if (txq[tx_queue_id] != NULL) {
2163 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2165 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2166 txq[tx_queue_id] = NULL;
2168 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2169 (dev, tx_queue_id, nb_tx_desc, conf);
2171 dev->data->tx_queue_state[tx_queue_id] =
2172 RTE_ETH_QUEUE_STATE_HAIRPIN;
2173 return eth_err(port_id, ret);
2177 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2178 void *userdata __rte_unused)
2182 for (i = 0; i < unsent; i++)
2183 rte_pktmbuf_free(pkts[i]);
2187 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2190 uint64_t *count = userdata;
2193 for (i = 0; i < unsent; i++)
2194 rte_pktmbuf_free(pkts[i]);
2200 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2201 buffer_tx_error_fn cbfn, void *userdata)
2203 buffer->error_callback = cbfn;
2204 buffer->error_userdata = userdata;
2209 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2216 buffer->size = size;
2217 if (buffer->error_callback == NULL) {
2218 ret = rte_eth_tx_buffer_set_err_callback(
2219 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2226 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2228 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2231 /* Validate Input Data. Bail if not valid or not supported. */
2232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2233 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2235 /* Call driver to free pending mbufs. */
2236 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2238 return eth_err(port_id, ret);
2242 rte_eth_promiscuous_enable(uint16_t port_id)
2244 struct rte_eth_dev *dev;
2247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2248 dev = &rte_eth_devices[port_id];
2250 if (dev->data->promiscuous == 1)
2253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2255 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2256 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2258 return eth_err(port_id, diag);
2262 rte_eth_promiscuous_disable(uint16_t port_id)
2264 struct rte_eth_dev *dev;
2267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2268 dev = &rte_eth_devices[port_id];
2270 if (dev->data->promiscuous == 0)
2273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2275 dev->data->promiscuous = 0;
2276 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2278 dev->data->promiscuous = 1;
2280 return eth_err(port_id, diag);
2284 rte_eth_promiscuous_get(uint16_t port_id)
2286 struct rte_eth_dev *dev;
2288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2290 dev = &rte_eth_devices[port_id];
2291 return dev->data->promiscuous;
2295 rte_eth_allmulticast_enable(uint16_t port_id)
2297 struct rte_eth_dev *dev;
2300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2301 dev = &rte_eth_devices[port_id];
2303 if (dev->data->all_multicast == 1)
2306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2307 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2308 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2310 return eth_err(port_id, diag);
2314 rte_eth_allmulticast_disable(uint16_t port_id)
2316 struct rte_eth_dev *dev;
2319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2320 dev = &rte_eth_devices[port_id];
2322 if (dev->data->all_multicast == 0)
2325 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2326 dev->data->all_multicast = 0;
2327 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2329 dev->data->all_multicast = 1;
2331 return eth_err(port_id, diag);
2335 rte_eth_allmulticast_get(uint16_t port_id)
2337 struct rte_eth_dev *dev;
2339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2341 dev = &rte_eth_devices[port_id];
2342 return dev->data->all_multicast;
2346 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2348 struct rte_eth_dev *dev;
2350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2351 dev = &rte_eth_devices[port_id];
2353 if (dev->data->dev_conf.intr_conf.lsc &&
2354 dev->data->dev_started)
2355 rte_eth_linkstatus_get(dev, eth_link);
2357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2358 (*dev->dev_ops->link_update)(dev, 1);
2359 *eth_link = dev->data->dev_link;
2366 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2368 struct rte_eth_dev *dev;
2370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2371 dev = &rte_eth_devices[port_id];
2373 if (dev->data->dev_conf.intr_conf.lsc &&
2374 dev->data->dev_started)
2375 rte_eth_linkstatus_get(dev, eth_link);
2377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2378 (*dev->dev_ops->link_update)(dev, 0);
2379 *eth_link = dev->data->dev_link;
2386 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2388 struct rte_eth_dev *dev;
2390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2392 dev = &rte_eth_devices[port_id];
2393 memset(stats, 0, sizeof(*stats));
2395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2396 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2397 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2401 rte_eth_stats_reset(uint16_t port_id)
2403 struct rte_eth_dev *dev;
2406 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2407 dev = &rte_eth_devices[port_id];
2409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2410 ret = (*dev->dev_ops->stats_reset)(dev);
2412 return eth_err(port_id, ret);
2414 dev->data->rx_mbuf_alloc_failed = 0;
2420 get_xstats_basic_count(struct rte_eth_dev *dev)
2422 uint16_t nb_rxqs, nb_txqs;
2425 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2426 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2428 count = RTE_NB_STATS;
2429 count += nb_rxqs * RTE_NB_RXQ_STATS;
2430 count += nb_txqs * RTE_NB_TXQ_STATS;
2436 get_xstats_count(uint16_t port_id)
2438 struct rte_eth_dev *dev;
2441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2442 dev = &rte_eth_devices[port_id];
2443 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2444 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2447 return eth_err(port_id, count);
2449 if (dev->dev_ops->xstats_get_names != NULL) {
2450 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2452 return eth_err(port_id, count);
2457 count += get_xstats_basic_count(dev);
2463 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2466 int cnt_xstats, idx_xstat;
2468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2471 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2476 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2481 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2482 if (cnt_xstats < 0) {
2483 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2487 /* Get id-name lookup table */
2488 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2490 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2491 port_id, xstats_names, cnt_xstats, NULL)) {
2492 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2496 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2497 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2506 /* retrieve basic stats names */
2508 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2509 struct rte_eth_xstat_name *xstats_names)
2511 int cnt_used_entries = 0;
2512 uint32_t idx, id_queue;
2515 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2516 strlcpy(xstats_names[cnt_used_entries].name,
2517 rte_stats_strings[idx].name,
2518 sizeof(xstats_names[0].name));
2521 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2522 for (id_queue = 0; id_queue < num_q; id_queue++) {
2523 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2524 snprintf(xstats_names[cnt_used_entries].name,
2525 sizeof(xstats_names[0].name),
2527 id_queue, rte_rxq_stats_strings[idx].name);
2532 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2533 for (id_queue = 0; id_queue < num_q; id_queue++) {
2534 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2535 snprintf(xstats_names[cnt_used_entries].name,
2536 sizeof(xstats_names[0].name),
2538 id_queue, rte_txq_stats_strings[idx].name);
2542 return cnt_used_entries;
2545 /* retrieve ethdev extended statistics names */
2547 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2548 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2551 struct rte_eth_xstat_name *xstats_names_copy;
2552 unsigned int no_basic_stat_requested = 1;
2553 unsigned int no_ext_stat_requested = 1;
2554 unsigned int expected_entries;
2555 unsigned int basic_count;
2556 struct rte_eth_dev *dev;
2560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2561 dev = &rte_eth_devices[port_id];
2563 basic_count = get_xstats_basic_count(dev);
2564 ret = get_xstats_count(port_id);
2567 expected_entries = (unsigned int)ret;
2569 /* Return max number of stats if no ids given */
2572 return expected_entries;
2573 else if (xstats_names && size < expected_entries)
2574 return expected_entries;
2577 if (ids && !xstats_names)
2580 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2581 uint64_t ids_copy[size];
2583 for (i = 0; i < size; i++) {
2584 if (ids[i] < basic_count) {
2585 no_basic_stat_requested = 0;
2590 * Convert ids to xstats ids that PMD knows.
2591 * ids known by user are basic + extended stats.
2593 ids_copy[i] = ids[i] - basic_count;
2596 if (no_basic_stat_requested)
2597 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2598 xstats_names, ids_copy, size);
2601 /* Retrieve all stats */
2603 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2605 if (num_stats < 0 || num_stats > (int)expected_entries)
2608 return expected_entries;
2611 xstats_names_copy = calloc(expected_entries,
2612 sizeof(struct rte_eth_xstat_name));
2614 if (!xstats_names_copy) {
2615 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2620 for (i = 0; i < size; i++) {
2621 if (ids[i] >= basic_count) {
2622 no_ext_stat_requested = 0;
2628 /* Fill xstats_names_copy structure */
2629 if (ids && no_ext_stat_requested) {
2630 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2632 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2635 free(xstats_names_copy);
2641 for (i = 0; i < size; i++) {
2642 if (ids[i] >= expected_entries) {
2643 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2644 free(xstats_names_copy);
2647 xstats_names[i] = xstats_names_copy[ids[i]];
2650 free(xstats_names_copy);
2655 rte_eth_xstats_get_names(uint16_t port_id,
2656 struct rte_eth_xstat_name *xstats_names,
2659 struct rte_eth_dev *dev;
2660 int cnt_used_entries;
2661 int cnt_expected_entries;
2662 int cnt_driver_entries;
2664 cnt_expected_entries = get_xstats_count(port_id);
2665 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2666 (int)size < cnt_expected_entries)
2667 return cnt_expected_entries;
2669 /* port_id checked in get_xstats_count() */
2670 dev = &rte_eth_devices[port_id];
2672 cnt_used_entries = rte_eth_basic_stats_get_names(
2675 if (dev->dev_ops->xstats_get_names != NULL) {
2676 /* If there are any driver-specific xstats, append them
2679 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2681 xstats_names + cnt_used_entries,
2682 size - cnt_used_entries);
2683 if (cnt_driver_entries < 0)
2684 return eth_err(port_id, cnt_driver_entries);
2685 cnt_used_entries += cnt_driver_entries;
2688 return cnt_used_entries;
2693 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2695 struct rte_eth_dev *dev;
2696 struct rte_eth_stats eth_stats;
2697 unsigned int count = 0, i, q;
2698 uint64_t val, *stats_ptr;
2699 uint16_t nb_rxqs, nb_txqs;
2702 ret = rte_eth_stats_get(port_id, ð_stats);
2706 dev = &rte_eth_devices[port_id];
2708 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2709 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2712 for (i = 0; i < RTE_NB_STATS; i++) {
2713 stats_ptr = RTE_PTR_ADD(ð_stats,
2714 rte_stats_strings[i].offset);
2716 xstats[count++].value = val;
2720 for (q = 0; q < nb_rxqs; q++) {
2721 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2722 stats_ptr = RTE_PTR_ADD(ð_stats,
2723 rte_rxq_stats_strings[i].offset +
2724 q * sizeof(uint64_t));
2726 xstats[count++].value = val;
2731 for (q = 0; q < nb_txqs; q++) {
2732 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2733 stats_ptr = RTE_PTR_ADD(ð_stats,
2734 rte_txq_stats_strings[i].offset +
2735 q * sizeof(uint64_t));
2737 xstats[count++].value = val;
2743 /* retrieve ethdev extended statistics */
2745 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2746 uint64_t *values, unsigned int size)
2748 unsigned int no_basic_stat_requested = 1;
2749 unsigned int no_ext_stat_requested = 1;
2750 unsigned int num_xstats_filled;
2751 unsigned int basic_count;
2752 uint16_t expected_entries;
2753 struct rte_eth_dev *dev;
2757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2758 ret = get_xstats_count(port_id);
2761 expected_entries = (uint16_t)ret;
2762 struct rte_eth_xstat xstats[expected_entries];
2763 dev = &rte_eth_devices[port_id];
2764 basic_count = get_xstats_basic_count(dev);
2766 /* Return max number of stats if no ids given */
2769 return expected_entries;
2770 else if (values && size < expected_entries)
2771 return expected_entries;
2777 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2778 unsigned int basic_count = get_xstats_basic_count(dev);
2779 uint64_t ids_copy[size];
2781 for (i = 0; i < size; i++) {
2782 if (ids[i] < basic_count) {
2783 no_basic_stat_requested = 0;
2788 * Convert ids to xstats ids that PMD knows.
2789 * ids known by user are basic + extended stats.
2791 ids_copy[i] = ids[i] - basic_count;
2794 if (no_basic_stat_requested)
2795 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2800 for (i = 0; i < size; i++) {
2801 if (ids[i] >= basic_count) {
2802 no_ext_stat_requested = 0;
2808 /* Fill the xstats structure */
2809 if (ids && no_ext_stat_requested)
2810 ret = rte_eth_basic_stats_get(port_id, xstats);
2812 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2816 num_xstats_filled = (unsigned int)ret;
2818 /* Return all stats */
2820 for (i = 0; i < num_xstats_filled; i++)
2821 values[i] = xstats[i].value;
2822 return expected_entries;
2826 for (i = 0; i < size; i++) {
2827 if (ids[i] >= expected_entries) {
2828 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2831 values[i] = xstats[ids[i]].value;
2837 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2840 struct rte_eth_dev *dev;
2841 unsigned int count = 0, i;
2842 signed int xcount = 0;
2843 uint16_t nb_rxqs, nb_txqs;
2846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2848 dev = &rte_eth_devices[port_id];
2850 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2851 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2853 /* Return generic statistics */
2854 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2855 (nb_txqs * RTE_NB_TXQ_STATS);
2857 /* implemented by the driver */
2858 if (dev->dev_ops->xstats_get != NULL) {
2859 /* Retrieve the xstats from the driver at the end of the
2862 xcount = (*dev->dev_ops->xstats_get)(dev,
2863 xstats ? xstats + count : NULL,
2864 (n > count) ? n - count : 0);
2867 return eth_err(port_id, xcount);
2870 if (n < count + xcount || xstats == NULL)
2871 return count + xcount;
2873 /* now fill the xstats structure */
2874 ret = rte_eth_basic_stats_get(port_id, xstats);
2879 for (i = 0; i < count; i++)
2881 /* add an offset to driver-specific stats */
2882 for ( ; i < count + xcount; i++)
2883 xstats[i].id += count;
2885 return count + xcount;
2888 /* reset ethdev extended statistics */
2890 rte_eth_xstats_reset(uint16_t port_id)
2892 struct rte_eth_dev *dev;
2894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2895 dev = &rte_eth_devices[port_id];
2897 /* implemented by the driver */
2898 if (dev->dev_ops->xstats_reset != NULL)
2899 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2901 /* fallback to default */
2902 return rte_eth_stats_reset(port_id);
2906 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2909 struct rte_eth_dev *dev;
2911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2913 dev = &rte_eth_devices[port_id];
2915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2917 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2920 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2923 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2926 return (*dev->dev_ops->queue_stats_mapping_set)
2927 (dev, queue_id, stat_idx, is_rx);
2932 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2935 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2936 stat_idx, STAT_QMAP_TX));
2941 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2944 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2945 stat_idx, STAT_QMAP_RX));
2949 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2951 struct rte_eth_dev *dev;
2953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2954 dev = &rte_eth_devices[port_id];
2956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2957 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2958 fw_version, fw_size));
2962 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2964 struct rte_eth_dev *dev;
2965 const struct rte_eth_desc_lim lim = {
2966 .nb_max = UINT16_MAX,
2969 .nb_seg_max = UINT16_MAX,
2970 .nb_mtu_seg_max = UINT16_MAX,
2975 * Init dev_info before port_id check since caller does not have
2976 * return status and does not know if get is successful or not.
2978 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2979 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2982 dev = &rte_eth_devices[port_id];
2984 dev_info->rx_desc_lim = lim;
2985 dev_info->tx_desc_lim = lim;
2986 dev_info->device = dev->device;
2987 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2988 dev_info->max_mtu = UINT16_MAX;
2990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2991 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2993 /* Cleanup already filled in device information */
2994 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2995 return eth_err(port_id, diag);
2998 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
2999 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3000 RTE_MAX_QUEUES_PER_PORT);
3001 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3002 RTE_MAX_QUEUES_PER_PORT);
3004 dev_info->driver_name = dev->device->driver->name;
3005 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3006 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3008 dev_info->dev_flags = &dev->data->dev_flags;
3014 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3015 uint32_t *ptypes, int num)
3018 struct rte_eth_dev *dev;
3019 const uint32_t *all_ptypes;
3021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3022 dev = &rte_eth_devices[port_id];
3023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3024 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3029 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3030 if (all_ptypes[i] & ptype_mask) {
3032 ptypes[j] = all_ptypes[i];
3040 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3041 uint32_t *set_ptypes, unsigned int num)
3043 const uint32_t valid_ptype_masks[] = {
3047 RTE_PTYPE_TUNNEL_MASK,
3048 RTE_PTYPE_INNER_L2_MASK,
3049 RTE_PTYPE_INNER_L3_MASK,
3050 RTE_PTYPE_INNER_L4_MASK,
3052 const uint32_t *all_ptypes;
3053 struct rte_eth_dev *dev;
3054 uint32_t unused_mask;
3058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3059 dev = &rte_eth_devices[port_id];
3061 if (num > 0 && set_ptypes == NULL)
3064 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3065 *dev->dev_ops->dev_ptypes_set == NULL) {
3070 if (ptype_mask == 0) {
3071 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3076 unused_mask = ptype_mask;
3077 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3078 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3079 if (mask && mask != valid_ptype_masks[i]) {
3083 unused_mask &= ~valid_ptype_masks[i];
3091 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3092 if (all_ptypes == NULL) {
3098 * Accommodate as many set_ptypes as possible. If the supplied
3099 * set_ptypes array is insufficient fill it partially.
3101 for (i = 0, j = 0; set_ptypes != NULL &&
3102 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3103 if (ptype_mask & all_ptypes[i]) {
3105 set_ptypes[j] = all_ptypes[i];
3113 if (set_ptypes != NULL && j < num)
3114 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3116 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3120 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3126 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3128 struct rte_eth_dev *dev;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3131 dev = &rte_eth_devices[port_id];
3132 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3138 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3140 struct rte_eth_dev *dev;
3142 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3144 dev = &rte_eth_devices[port_id];
3145 *mtu = dev->data->mtu;
3150 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3153 struct rte_eth_dev_info dev_info;
3154 struct rte_eth_dev *dev;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3161 * Check if the device supports dev_infos_get, if it does not
3162 * skip min_mtu/max_mtu validation here as this requires values
3163 * that are populated within the call to rte_eth_dev_info_get()
3164 * which relies on dev->dev_ops->dev_infos_get.
3166 if (*dev->dev_ops->dev_infos_get != NULL) {
3167 ret = rte_eth_dev_info_get(port_id, &dev_info);
3171 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3175 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3177 dev->data->mtu = mtu;
3179 return eth_err(port_id, ret);
3183 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3185 struct rte_eth_dev *dev;
3188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3189 dev = &rte_eth_devices[port_id];
3190 if (!(dev->data->dev_conf.rxmode.offloads &
3191 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3192 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3197 if (vlan_id > 4095) {
3198 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3204 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3206 struct rte_vlan_filter_conf *vfc;
3210 vfc = &dev->data->vlan_filter_conf;
3211 vidx = vlan_id / 64;
3212 vbit = vlan_id % 64;
3215 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3217 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3220 return eth_err(port_id, ret);
3224 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3227 struct rte_eth_dev *dev;
3229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3231 if (rx_queue_id >= dev->data->nb_rx_queues) {
3232 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3237 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3243 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3244 enum rte_vlan_type vlan_type,
3247 struct rte_eth_dev *dev;
3249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3250 dev = &rte_eth_devices[port_id];
3251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3253 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3258 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3260 struct rte_eth_dev *dev;
3264 uint64_t orig_offloads;
3265 uint64_t dev_offloads;
3267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3268 dev = &rte_eth_devices[port_id];
3270 /* save original values in case of failure */
3271 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3272 dev_offloads = orig_offloads;
3274 /* check which option changed by application */
3275 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3276 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3279 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3281 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3282 mask |= ETH_VLAN_STRIP_MASK;
3285 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3286 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3289 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3291 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3292 mask |= ETH_VLAN_FILTER_MASK;
3295 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3296 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3299 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3301 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3302 mask |= ETH_VLAN_EXTEND_MASK;
3305 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3306 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3309 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3311 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3312 mask |= ETH_QINQ_STRIP_MASK;
3319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3320 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3321 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3323 /* hit an error restore original values */
3324 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3327 return eth_err(port_id, ret);
3331 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3333 struct rte_eth_dev *dev;
3334 uint64_t *dev_offloads;
3337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3338 dev = &rte_eth_devices[port_id];
3339 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3341 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3342 ret |= ETH_VLAN_STRIP_OFFLOAD;
3344 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3345 ret |= ETH_VLAN_FILTER_OFFLOAD;
3347 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3348 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3350 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3351 ret |= ETH_QINQ_STRIP_OFFLOAD;
3357 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3359 struct rte_eth_dev *dev;
3361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3362 dev = &rte_eth_devices[port_id];
3363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3365 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3369 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3371 struct rte_eth_dev *dev;
3373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3374 dev = &rte_eth_devices[port_id];
3375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3376 memset(fc_conf, 0, sizeof(*fc_conf));
3377 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3381 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3383 struct rte_eth_dev *dev;
3385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3386 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3387 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3391 dev = &rte_eth_devices[port_id];
3392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3393 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3397 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3398 struct rte_eth_pfc_conf *pfc_conf)
3400 struct rte_eth_dev *dev;
3402 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3403 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3404 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3408 dev = &rte_eth_devices[port_id];
3409 /* High water, low water validation are device specific */
3410 if (*dev->dev_ops->priority_flow_ctrl_set)
3411 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3417 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3425 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3426 for (i = 0; i < num; i++) {
3427 if (reta_conf[i].mask)
3435 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3439 uint16_t i, idx, shift;
3445 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3449 for (i = 0; i < reta_size; i++) {
3450 idx = i / RTE_RETA_GROUP_SIZE;
3451 shift = i % RTE_RETA_GROUP_SIZE;
3452 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3453 (reta_conf[idx].reta[shift] >= max_rxq)) {
3455 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3457 reta_conf[idx].reta[shift], max_rxq);
3466 rte_eth_dev_rss_reta_update(uint16_t port_id,
3467 struct rte_eth_rss_reta_entry64 *reta_conf,
3470 struct rte_eth_dev *dev;
3473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3474 /* Check mask bits */
3475 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3479 dev = &rte_eth_devices[port_id];
3481 /* Check entry value */
3482 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3483 dev->data->nb_rx_queues);
3487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3488 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3493 rte_eth_dev_rss_reta_query(uint16_t port_id,
3494 struct rte_eth_rss_reta_entry64 *reta_conf,
3497 struct rte_eth_dev *dev;
3500 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3502 /* Check mask bits */
3503 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3507 dev = &rte_eth_devices[port_id];
3508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3509 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3514 rte_eth_dev_rss_hash_update(uint16_t port_id,
3515 struct rte_eth_rss_conf *rss_conf)
3517 struct rte_eth_dev *dev;
3518 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3523 ret = rte_eth_dev_info_get(port_id, &dev_info);
3527 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3529 dev = &rte_eth_devices[port_id];
3530 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3531 dev_info.flow_type_rss_offloads) {
3533 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3534 port_id, rss_conf->rss_hf,
3535 dev_info.flow_type_rss_offloads);
3538 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3539 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3544 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3545 struct rte_eth_rss_conf *rss_conf)
3547 struct rte_eth_dev *dev;
3549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3550 dev = &rte_eth_devices[port_id];
3551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3552 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3557 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3558 struct rte_eth_udp_tunnel *udp_tunnel)
3560 struct rte_eth_dev *dev;
3562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3563 if (udp_tunnel == NULL) {
3564 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3568 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3569 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3573 dev = &rte_eth_devices[port_id];
3574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3575 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3580 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3581 struct rte_eth_udp_tunnel *udp_tunnel)
3583 struct rte_eth_dev *dev;
3585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3586 dev = &rte_eth_devices[port_id];
3588 if (udp_tunnel == NULL) {
3589 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3593 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3594 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3598 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3599 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3604 rte_eth_led_on(uint16_t port_id)
3606 struct rte_eth_dev *dev;
3608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3609 dev = &rte_eth_devices[port_id];
3610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3611 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3615 rte_eth_led_off(uint16_t port_id)
3617 struct rte_eth_dev *dev;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3620 dev = &rte_eth_devices[port_id];
3621 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3622 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3626 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3630 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3632 struct rte_eth_dev_info dev_info;
3633 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3637 ret = rte_eth_dev_info_get(port_id, &dev_info);
3641 for (i = 0; i < dev_info.max_mac_addrs; i++)
3642 if (memcmp(addr, &dev->data->mac_addrs[i],
3643 RTE_ETHER_ADDR_LEN) == 0)
3649 static const struct rte_ether_addr null_mac_addr;
3652 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3655 struct rte_eth_dev *dev;
3660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3661 dev = &rte_eth_devices[port_id];
3662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3664 if (rte_is_zero_ether_addr(addr)) {
3665 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3669 if (pool >= ETH_64_POOLS) {
3670 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3674 index = get_mac_addr_index(port_id, addr);
3676 index = get_mac_addr_index(port_id, &null_mac_addr);
3678 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3683 pool_mask = dev->data->mac_pool_sel[index];
3685 /* Check if both MAC address and pool is already there, and do nothing */
3686 if (pool_mask & (1ULL << pool))
3691 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3694 /* Update address in NIC data structure */
3695 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3697 /* Update pool bitmap in NIC data structure */
3698 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3701 return eth_err(port_id, ret);
3705 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3707 struct rte_eth_dev *dev;
3710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3711 dev = &rte_eth_devices[port_id];
3712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3714 index = get_mac_addr_index(port_id, addr);
3717 "Port %u: Cannot remove default MAC address\n",
3720 } else if (index < 0)
3721 return 0; /* Do nothing if address wasn't found */
3724 (*dev->dev_ops->mac_addr_remove)(dev, index);
3726 /* Update address in NIC data structure */
3727 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3729 /* reset pool bitmap */
3730 dev->data->mac_pool_sel[index] = 0;
3736 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3738 struct rte_eth_dev *dev;
3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3743 if (!rte_is_valid_assigned_ether_addr(addr))
3746 dev = &rte_eth_devices[port_id];
3747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3749 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3753 /* Update default address in NIC data structure */
3754 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3761 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3765 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3767 struct rte_eth_dev_info dev_info;
3768 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3772 ret = rte_eth_dev_info_get(port_id, &dev_info);
3776 if (!dev->data->hash_mac_addrs)
3779 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3780 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3781 RTE_ETHER_ADDR_LEN) == 0)
3788 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3793 struct rte_eth_dev *dev;
3795 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3797 dev = &rte_eth_devices[port_id];
3798 if (rte_is_zero_ether_addr(addr)) {
3799 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3804 index = get_hash_mac_addr_index(port_id, addr);
3805 /* Check if it's already there, and do nothing */
3806 if ((index >= 0) && on)
3812 "Port %u: the MAC address was not set in UTA\n",
3817 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3819 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3826 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3828 /* Update address in NIC data structure */
3830 rte_ether_addr_copy(addr,
3831 &dev->data->hash_mac_addrs[index]);
3833 rte_ether_addr_copy(&null_mac_addr,
3834 &dev->data->hash_mac_addrs[index]);
3837 return eth_err(port_id, ret);
3841 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3843 struct rte_eth_dev *dev;
3845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3847 dev = &rte_eth_devices[port_id];
3849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3850 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3854 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3857 struct rte_eth_dev *dev;
3858 struct rte_eth_dev_info dev_info;
3859 struct rte_eth_link link;
3862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3864 ret = rte_eth_dev_info_get(port_id, &dev_info);
3868 dev = &rte_eth_devices[port_id];
3869 link = dev->data->dev_link;
3871 if (queue_idx > dev_info.max_tx_queues) {
3873 "Set queue rate limit:port %u: invalid queue id=%u\n",
3874 port_id, queue_idx);
3878 if (tx_rate > link.link_speed) {
3880 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3881 tx_rate, link.link_speed);
3885 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3886 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3887 queue_idx, tx_rate));
3891 rte_eth_mirror_rule_set(uint16_t port_id,
3892 struct rte_eth_mirror_conf *mirror_conf,
3893 uint8_t rule_id, uint8_t on)
3895 struct rte_eth_dev *dev;
3897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3898 if (mirror_conf->rule_type == 0) {
3899 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3903 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3904 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3909 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3910 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3911 (mirror_conf->pool_mask == 0)) {
3913 "Invalid mirror pool, pool mask can not be 0\n");
3917 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3918 mirror_conf->vlan.vlan_mask == 0) {
3920 "Invalid vlan mask, vlan mask can not be 0\n");
3924 dev = &rte_eth_devices[port_id];
3925 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3927 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3928 mirror_conf, rule_id, on));
3932 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3934 struct rte_eth_dev *dev;
3936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3938 dev = &rte_eth_devices[port_id];
3939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3941 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3945 RTE_INIT(eth_dev_init_cb_lists)
3949 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3950 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3954 rte_eth_dev_callback_register(uint16_t port_id,
3955 enum rte_eth_event_type event,
3956 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3958 struct rte_eth_dev *dev;
3959 struct rte_eth_dev_callback *user_cb;
3960 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3966 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3967 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3971 if (port_id == RTE_ETH_ALL) {
3973 last_port = RTE_MAX_ETHPORTS - 1;
3975 next_port = last_port = port_id;
3978 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3981 dev = &rte_eth_devices[next_port];
3983 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3984 if (user_cb->cb_fn == cb_fn &&
3985 user_cb->cb_arg == cb_arg &&
3986 user_cb->event == event) {
3991 /* create a new callback. */
3992 if (user_cb == NULL) {
3993 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3994 sizeof(struct rte_eth_dev_callback), 0);
3995 if (user_cb != NULL) {
3996 user_cb->cb_fn = cb_fn;
3997 user_cb->cb_arg = cb_arg;
3998 user_cb->event = event;
3999 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4002 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4003 rte_eth_dev_callback_unregister(port_id, event,
4009 } while (++next_port <= last_port);
4011 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4016 rte_eth_dev_callback_unregister(uint16_t port_id,
4017 enum rte_eth_event_type event,
4018 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4021 struct rte_eth_dev *dev;
4022 struct rte_eth_dev_callback *cb, *next;
4023 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4029 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4030 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4034 if (port_id == RTE_ETH_ALL) {
4036 last_port = RTE_MAX_ETHPORTS - 1;
4038 next_port = last_port = port_id;
4041 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4044 dev = &rte_eth_devices[next_port];
4046 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4049 next = TAILQ_NEXT(cb, next);
4051 if (cb->cb_fn != cb_fn || cb->event != event ||
4052 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4056 * if this callback is not executing right now,
4059 if (cb->active == 0) {
4060 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4066 } while (++next_port <= last_port);
4068 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4073 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4074 enum rte_eth_event_type event, void *ret_param)
4076 struct rte_eth_dev_callback *cb_lst;
4077 struct rte_eth_dev_callback dev_cb;
4080 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4081 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4082 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4086 if (ret_param != NULL)
4087 dev_cb.ret_param = ret_param;
4089 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4090 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4091 dev_cb.cb_arg, dev_cb.ret_param);
4092 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4095 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4100 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4105 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4107 dev->state = RTE_ETH_DEV_ATTACHED;
4111 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4114 struct rte_eth_dev *dev;
4115 struct rte_intr_handle *intr_handle;
4119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4121 dev = &rte_eth_devices[port_id];
4123 if (!dev->intr_handle) {
4124 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4128 intr_handle = dev->intr_handle;
4129 if (!intr_handle->intr_vec) {
4130 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4134 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4135 vec = intr_handle->intr_vec[qid];
4136 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4137 if (rc && rc != -EEXIST) {
4139 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4140 port_id, qid, op, epfd, vec);
4148 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4150 struct rte_intr_handle *intr_handle;
4151 struct rte_eth_dev *dev;
4152 unsigned int efd_idx;
4156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4158 dev = &rte_eth_devices[port_id];
4160 if (queue_id >= dev->data->nb_rx_queues) {
4161 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4165 if (!dev->intr_handle) {
4166 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4170 intr_handle = dev->intr_handle;
4171 if (!intr_handle->intr_vec) {
4172 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4176 vec = intr_handle->intr_vec[queue_id];
4177 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4178 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4179 fd = intr_handle->efds[efd_idx];
4184 const struct rte_memzone *
4185 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4186 uint16_t queue_id, size_t size, unsigned align,
4189 char z_name[RTE_MEMZONE_NAMESIZE];
4190 const struct rte_memzone *mz;
4193 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4194 dev->data->port_id, queue_id, ring_name);
4195 if (rc >= RTE_MEMZONE_NAMESIZE) {
4196 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4197 rte_errno = ENAMETOOLONG;
4201 mz = rte_memzone_lookup(z_name);
4205 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4206 RTE_MEMZONE_IOVA_CONTIG, align);
4210 rte_eth_dev_create(struct rte_device *device, const char *name,
4211 size_t priv_data_size,
4212 ethdev_bus_specific_init ethdev_bus_specific_init,
4213 void *bus_init_params,
4214 ethdev_init_t ethdev_init, void *init_params)
4216 struct rte_eth_dev *ethdev;
4219 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4221 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4222 ethdev = rte_eth_dev_allocate(name);
4226 if (priv_data_size) {
4227 ethdev->data->dev_private = rte_zmalloc_socket(
4228 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4231 if (!ethdev->data->dev_private) {
4232 RTE_LOG(ERR, EAL, "failed to allocate private data");
4238 ethdev = rte_eth_dev_attach_secondary(name);
4240 RTE_LOG(ERR, EAL, "secondary process attach failed, "
4241 "ethdev doesn't exist");
4246 ethdev->device = device;
4248 if (ethdev_bus_specific_init) {
4249 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4252 "ethdev bus specific initialisation failed");
4257 retval = ethdev_init(ethdev, init_params);
4259 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4263 rte_eth_dev_probing_finish(ethdev);
4268 rte_eth_dev_release_port(ethdev);
4273 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4274 ethdev_uninit_t ethdev_uninit)
4278 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4282 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4284 ret = ethdev_uninit(ethdev);
4288 return rte_eth_dev_release_port(ethdev);
4292 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4293 int epfd, int op, void *data)
4296 struct rte_eth_dev *dev;
4297 struct rte_intr_handle *intr_handle;
4300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4302 dev = &rte_eth_devices[port_id];
4303 if (queue_id >= dev->data->nb_rx_queues) {
4304 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4308 if (!dev->intr_handle) {
4309 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4313 intr_handle = dev->intr_handle;
4314 if (!intr_handle->intr_vec) {
4315 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4319 vec = intr_handle->intr_vec[queue_id];
4320 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4321 if (rc && rc != -EEXIST) {
4323 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4324 port_id, queue_id, op, epfd, vec);
4332 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4335 struct rte_eth_dev *dev;
4337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4339 dev = &rte_eth_devices[port_id];
4341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4342 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4347 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4350 struct rte_eth_dev *dev;
4352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4354 dev = &rte_eth_devices[port_id];
4356 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4357 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4363 rte_eth_dev_filter_supported(uint16_t port_id,
4364 enum rte_filter_type filter_type)
4366 struct rte_eth_dev *dev;
4368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4370 dev = &rte_eth_devices[port_id];
4371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4372 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4373 RTE_ETH_FILTER_NOP, NULL);
4377 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4378 enum rte_filter_op filter_op, void *arg)
4380 struct rte_eth_dev *dev;
4382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4384 dev = &rte_eth_devices[port_id];
4385 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4386 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4390 const struct rte_eth_rxtx_callback *
4391 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4392 rte_rx_callback_fn fn, void *user_param)
4394 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4395 rte_errno = ENOTSUP;
4398 struct rte_eth_dev *dev;
4400 /* check input parameters */
4401 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4402 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4406 dev = &rte_eth_devices[port_id];
4407 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4411 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4419 cb->param = user_param;
4421 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4422 /* Add the callbacks in fifo order. */
4423 struct rte_eth_rxtx_callback *tail =
4424 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4427 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4434 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4439 const struct rte_eth_rxtx_callback *
4440 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4441 rte_rx_callback_fn fn, void *user_param)
4443 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4444 rte_errno = ENOTSUP;
4447 /* check input parameters */
4448 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4449 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4454 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4462 cb->param = user_param;
4464 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4465 /* Add the callbacks at first position */
4466 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4468 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4469 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4474 const struct rte_eth_rxtx_callback *
4475 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4476 rte_tx_callback_fn fn, void *user_param)
4478 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4479 rte_errno = ENOTSUP;
4482 struct rte_eth_dev *dev;
4484 /* check input parameters */
4485 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4486 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4491 dev = &rte_eth_devices[port_id];
4492 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4497 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4505 cb->param = user_param;
4507 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4508 /* Add the callbacks in fifo order. */
4509 struct rte_eth_rxtx_callback *tail =
4510 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4513 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4520 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4526 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4527 const struct rte_eth_rxtx_callback *user_cb)
4529 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4532 /* Check input parameters. */
4533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4534 if (user_cb == NULL ||
4535 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4538 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4539 struct rte_eth_rxtx_callback *cb;
4540 struct rte_eth_rxtx_callback **prev_cb;
4543 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4544 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4545 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4547 if (cb == user_cb) {
4548 /* Remove the user cb from the callback list. */
4549 *prev_cb = cb->next;
4554 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4560 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4561 const struct rte_eth_rxtx_callback *user_cb)
4563 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4566 /* Check input parameters. */
4567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4568 if (user_cb == NULL ||
4569 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4572 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4574 struct rte_eth_rxtx_callback *cb;
4575 struct rte_eth_rxtx_callback **prev_cb;
4577 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4578 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4579 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4581 if (cb == user_cb) {
4582 /* Remove the user cb from the callback list. */
4583 *prev_cb = cb->next;
4588 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4594 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4595 struct rte_eth_rxq_info *qinfo)
4597 struct rte_eth_dev *dev;
4599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4604 dev = &rte_eth_devices[port_id];
4605 if (queue_id >= dev->data->nb_rx_queues) {
4606 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4610 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4611 RTE_ETHDEV_LOG(INFO,
4612 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4619 memset(qinfo, 0, sizeof(*qinfo));
4620 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4625 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4626 struct rte_eth_txq_info *qinfo)
4628 struct rte_eth_dev *dev;
4630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4635 dev = &rte_eth_devices[port_id];
4636 if (queue_id >= dev->data->nb_tx_queues) {
4637 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4641 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4642 RTE_ETHDEV_LOG(INFO,
4643 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4648 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4650 memset(qinfo, 0, sizeof(*qinfo));
4651 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4657 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4658 struct rte_eth_burst_mode *mode)
4660 struct rte_eth_dev *dev;
4662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4667 dev = &rte_eth_devices[port_id];
4669 if (queue_id >= dev->data->nb_rx_queues) {
4670 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4674 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4675 memset(mode, 0, sizeof(*mode));
4676 return eth_err(port_id,
4677 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4681 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4682 struct rte_eth_burst_mode *mode)
4684 struct rte_eth_dev *dev;
4686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4691 dev = &rte_eth_devices[port_id];
4693 if (queue_id >= dev->data->nb_tx_queues) {
4694 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4698 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4699 memset(mode, 0, sizeof(*mode));
4700 return eth_err(port_id,
4701 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4705 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4706 struct rte_ether_addr *mc_addr_set,
4707 uint32_t nb_mc_addr)
4709 struct rte_eth_dev *dev;
4711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4713 dev = &rte_eth_devices[port_id];
4714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4715 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4716 mc_addr_set, nb_mc_addr));
4720 rte_eth_timesync_enable(uint16_t port_id)
4722 struct rte_eth_dev *dev;
4724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4725 dev = &rte_eth_devices[port_id];
4727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4728 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4732 rte_eth_timesync_disable(uint16_t port_id)
4734 struct rte_eth_dev *dev;
4736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4737 dev = &rte_eth_devices[port_id];
4739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4740 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4744 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4747 struct rte_eth_dev *dev;
4749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4750 dev = &rte_eth_devices[port_id];
4752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4753 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4754 (dev, timestamp, flags));
4758 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4759 struct timespec *timestamp)
4761 struct rte_eth_dev *dev;
4763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4764 dev = &rte_eth_devices[port_id];
4766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4767 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4772 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4774 struct rte_eth_dev *dev;
4776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4777 dev = &rte_eth_devices[port_id];
4779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4780 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4785 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4787 struct rte_eth_dev *dev;
4789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4790 dev = &rte_eth_devices[port_id];
4792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4793 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4798 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4800 struct rte_eth_dev *dev;
4802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4803 dev = &rte_eth_devices[port_id];
4805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4806 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4811 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4813 struct rte_eth_dev *dev;
4815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4816 dev = &rte_eth_devices[port_id];
4818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4819 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4823 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4825 struct rte_eth_dev *dev;
4827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4829 dev = &rte_eth_devices[port_id];
4830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4831 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4835 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4837 struct rte_eth_dev *dev;
4839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4841 dev = &rte_eth_devices[port_id];
4842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4843 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4847 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4849 struct rte_eth_dev *dev;
4851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4853 dev = &rte_eth_devices[port_id];
4854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4855 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4859 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4861 struct rte_eth_dev *dev;
4863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4865 dev = &rte_eth_devices[port_id];
4866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4867 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4871 rte_eth_dev_get_module_info(uint16_t port_id,
4872 struct rte_eth_dev_module_info *modinfo)
4874 struct rte_eth_dev *dev;
4876 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4878 dev = &rte_eth_devices[port_id];
4879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4880 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4884 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4885 struct rte_dev_eeprom_info *info)
4887 struct rte_eth_dev *dev;
4889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4891 dev = &rte_eth_devices[port_id];
4892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4893 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4897 rte_eth_dev_get_dcb_info(uint16_t port_id,
4898 struct rte_eth_dcb_info *dcb_info)
4900 struct rte_eth_dev *dev;
4902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4904 dev = &rte_eth_devices[port_id];
4905 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4908 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4912 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4913 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4915 struct rte_eth_dev *dev;
4917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4918 if (l2_tunnel == NULL) {
4919 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4923 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4924 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4928 dev = &rte_eth_devices[port_id];
4929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4931 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4936 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4937 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4941 struct rte_eth_dev *dev;
4943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4945 if (l2_tunnel == NULL) {
4946 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4950 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4951 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4956 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4960 dev = &rte_eth_devices[port_id];
4961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4963 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4964 l2_tunnel, mask, en));
4968 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4969 const struct rte_eth_desc_lim *desc_lim)
4971 if (desc_lim->nb_align != 0)
4972 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4974 if (desc_lim->nb_max != 0)
4975 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4977 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4981 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4982 uint16_t *nb_rx_desc,
4983 uint16_t *nb_tx_desc)
4985 struct rte_eth_dev_info dev_info;
4988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4990 ret = rte_eth_dev_info_get(port_id, &dev_info);
4994 if (nb_rx_desc != NULL)
4995 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4997 if (nb_tx_desc != NULL)
4998 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5004 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5005 struct rte_eth_hairpin_cap *cap)
5007 struct rte_eth_dev *dev;
5009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5011 dev = &rte_eth_devices[port_id];
5012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5013 memset(cap, 0, sizeof(*cap));
5014 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5018 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5020 if (dev->data->rx_queue_state[queue_id] ==
5021 RTE_ETH_QUEUE_STATE_HAIRPIN)
5027 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5029 if (dev->data->tx_queue_state[queue_id] ==
5030 RTE_ETH_QUEUE_STATE_HAIRPIN)
5036 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5038 struct rte_eth_dev *dev;
5040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5045 dev = &rte_eth_devices[port_id];
5047 if (*dev->dev_ops->pool_ops_supported == NULL)
5048 return 1; /* all pools are supported */
5050 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5054 * A set of values to describe the possible states of a switch domain.
5056 enum rte_eth_switch_domain_state {
5057 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5058 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5062 * Array of switch domains available for allocation. Array is sized to
5063 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5064 * ethdev ports in a single process.
5066 static struct rte_eth_dev_switch {
5067 enum rte_eth_switch_domain_state state;
5068 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5071 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5075 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5077 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5078 if (rte_eth_switch_domains[i].state ==
5079 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5080 rte_eth_switch_domains[i].state =
5081 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5091 rte_eth_switch_domain_free(uint16_t domain_id)
5093 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5094 domain_id >= RTE_MAX_ETHPORTS)
5097 if (rte_eth_switch_domains[domain_id].state !=
5098 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5101 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5107 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5110 struct rte_kvargs_pair *pair;
5113 arglist->str = strdup(str_in);
5114 if (arglist->str == NULL)
5117 letter = arglist->str;
5120 pair = &arglist->pairs[0];
5123 case 0: /* Initial */
5126 else if (*letter == '\0')
5133 case 1: /* Parsing key */
5134 if (*letter == '=') {
5136 pair->value = letter + 1;
5138 } else if (*letter == ',' || *letter == '\0')
5143 case 2: /* Parsing value */
5146 else if (*letter == ',') {
5149 pair = &arglist->pairs[arglist->count];
5151 } else if (*letter == '\0') {
5154 pair = &arglist->pairs[arglist->count];
5159 case 3: /* Parsing list */
5162 else if (*letter == '\0')
5171 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5173 struct rte_kvargs args;
5174 struct rte_kvargs_pair *pair;
5178 memset(eth_da, 0, sizeof(*eth_da));
5180 result = rte_eth_devargs_tokenise(&args, dargs);
5184 for (i = 0; i < args.count; i++) {
5185 pair = &args.pairs[i];
5186 if (strcmp("representor", pair->key) == 0) {
5187 result = rte_eth_devargs_parse_list(pair->value,
5188 rte_eth_devargs_parse_representor_ports,
5202 RTE_INIT(ethdev_init_log)
5204 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
5205 if (rte_eth_dev_logtype >= 0)
5206 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);