1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
169 static const struct {
172 } rte_burst_option_names[] = {
173 { RTE_ETH_BURST_SCALAR, "Scalar" },
174 { RTE_ETH_BURST_VECTOR, "Vector" },
176 { RTE_ETH_BURST_ALTIVEC, "AltiVec" },
177 { RTE_ETH_BURST_NEON, "Neon" },
178 { RTE_ETH_BURST_SSE, "SSE" },
179 { RTE_ETH_BURST_AVX2, "AVX2" },
180 { RTE_ETH_BURST_AVX512, "AVX512" },
182 { RTE_ETH_BURST_SCATTERED, "Scattered" },
183 { RTE_ETH_BURST_BULK_ALLOC, "Bulk Alloc" },
184 { RTE_ETH_BURST_SIMPLE, "Simple" },
185 { RTE_ETH_BURST_PER_QUEUE, "Per Queue" },
189 * The user application callback description.
191 * It contains callback address to be registered by user application,
192 * the pointer to the parameters for callback, and the event type.
194 struct rte_eth_dev_callback {
195 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
196 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
197 void *cb_arg; /**< Parameter for callback */
198 void *ret_param; /**< Return parameter */
199 enum rte_eth_event_type event; /**< Interrupt event type */
200 uint32_t active; /**< Callback is executing */
209 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
212 struct rte_devargs devargs = {.args = NULL};
213 const char *bus_param_key;
214 char *bus_str = NULL;
215 char *cls_str = NULL;
218 memset(iter, 0, sizeof(*iter));
221 * The devargs string may use various syntaxes:
222 * - 0000:08:00.0,representor=[1-3]
223 * - pci:0000:06:00.0,representor=[0,5]
224 * - class=eth,mac=00:11:22:33:44:55
225 * A new syntax is in development (not yet supported):
226 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
230 * Handle pure class filter (i.e. without any bus-level argument),
231 * from future new syntax.
232 * rte_devargs_parse() is not yet supporting the new syntax,
233 * that's why this simple case is temporarily parsed here.
235 #define iter_anybus_str "class=eth,"
236 if (strncmp(devargs_str, iter_anybus_str,
237 strlen(iter_anybus_str)) == 0) {
238 iter->cls_str = devargs_str + strlen(iter_anybus_str);
242 /* Split bus, device and parameters. */
243 ret = rte_devargs_parse(&devargs, devargs_str);
248 * Assume parameters of old syntax can match only at ethdev level.
249 * Extra parameters will be ignored, thanks to "+" prefix.
251 str_size = strlen(devargs.args) + 2;
252 cls_str = malloc(str_size);
253 if (cls_str == NULL) {
257 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
258 if (ret != str_size - 1) {
262 iter->cls_str = cls_str;
263 free(devargs.args); /* allocated by rte_devargs_parse() */
266 iter->bus = devargs.bus;
267 if (iter->bus->dev_iterate == NULL) {
272 /* Convert bus args to new syntax for use with new API dev_iterate. */
273 if (strcmp(iter->bus->name, "vdev") == 0) {
274 bus_param_key = "name";
275 } else if (strcmp(iter->bus->name, "pci") == 0) {
276 bus_param_key = "addr";
281 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
282 bus_str = malloc(str_size);
283 if (bus_str == NULL) {
287 ret = snprintf(bus_str, str_size, "%s=%s",
288 bus_param_key, devargs.name);
289 if (ret != str_size - 1) {
293 iter->bus_str = bus_str;
296 iter->cls = rte_class_find_by_name("eth");
301 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
310 rte_eth_iterator_next(struct rte_dev_iterator *iter)
312 if (iter->cls == NULL) /* invalid ethdev iterator */
313 return RTE_MAX_ETHPORTS;
315 do { /* loop to try all matching rte_device */
316 /* If not pure ethdev filter and */
317 if (iter->bus != NULL &&
318 /* not in middle of rte_eth_dev iteration, */
319 iter->class_device == NULL) {
320 /* get next rte_device to try. */
321 iter->device = iter->bus->dev_iterate(
322 iter->device, iter->bus_str, iter);
323 if (iter->device == NULL)
324 break; /* no more rte_device candidate */
326 /* A device is matching bus part, need to check ethdev part. */
327 iter->class_device = iter->cls->dev_iterate(
328 iter->class_device, iter->cls_str, iter);
329 if (iter->class_device != NULL)
330 return eth_dev_to_id(iter->class_device); /* match */
331 } while (iter->bus != NULL); /* need to try next rte_device */
333 /* No more ethdev port to iterate. */
334 rte_eth_iterator_cleanup(iter);
335 return RTE_MAX_ETHPORTS;
339 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
341 if (iter->bus_str == NULL)
342 return; /* nothing to free in pure class filter */
343 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
344 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
345 memset(iter, 0, sizeof(*iter));
349 rte_eth_find_next(uint16_t port_id)
351 while (port_id < RTE_MAX_ETHPORTS &&
352 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
355 if (port_id >= RTE_MAX_ETHPORTS)
356 return RTE_MAX_ETHPORTS;
362 * Macro to iterate over all valid ports for internal usage.
363 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
365 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
366 for (port_id = rte_eth_find_next(0); \
367 port_id < RTE_MAX_ETHPORTS; \
368 port_id = rte_eth_find_next(port_id + 1))
371 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
373 port_id = rte_eth_find_next(port_id);
374 while (port_id < RTE_MAX_ETHPORTS &&
375 rte_eth_devices[port_id].device != parent)
376 port_id = rte_eth_find_next(port_id + 1);
382 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
384 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
385 return rte_eth_find_next_of(port_id,
386 rte_eth_devices[ref_port_id].device);
390 rte_eth_dev_shared_data_prepare(void)
392 const unsigned flags = 0;
393 const struct rte_memzone *mz;
395 rte_spinlock_lock(&rte_eth_shared_data_lock);
397 if (rte_eth_dev_shared_data == NULL) {
398 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
399 /* Allocate port data and ownership shared memory. */
400 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
401 sizeof(*rte_eth_dev_shared_data),
402 rte_socket_id(), flags);
404 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
406 rte_panic("Cannot allocate ethdev shared data\n");
408 rte_eth_dev_shared_data = mz->addr;
409 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
410 rte_eth_dev_shared_data->next_owner_id =
411 RTE_ETH_DEV_NO_OWNER + 1;
412 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
413 memset(rte_eth_dev_shared_data->data, 0,
414 sizeof(rte_eth_dev_shared_data->data));
418 rte_spinlock_unlock(&rte_eth_shared_data_lock);
422 is_allocated(const struct rte_eth_dev *ethdev)
424 return ethdev->data->name[0] != '\0';
427 static struct rte_eth_dev *
428 _rte_eth_dev_allocated(const char *name)
432 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
433 if (rte_eth_devices[i].data != NULL &&
434 strcmp(rte_eth_devices[i].data->name, name) == 0)
435 return &rte_eth_devices[i];
441 rte_eth_dev_allocated(const char *name)
443 struct rte_eth_dev *ethdev;
445 rte_eth_dev_shared_data_prepare();
447 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
449 ethdev = _rte_eth_dev_allocated(name);
451 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
457 rte_eth_dev_find_free_port(void)
461 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
462 /* Using shared name field to find a free port. */
463 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
464 RTE_ASSERT(rte_eth_devices[i].state ==
469 return RTE_MAX_ETHPORTS;
472 static struct rte_eth_dev *
473 eth_dev_get(uint16_t port_id)
475 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
477 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
483 rte_eth_dev_allocate(const char *name)
486 struct rte_eth_dev *eth_dev = NULL;
489 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
491 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
495 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
496 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
500 rte_eth_dev_shared_data_prepare();
502 /* Synchronize port creation between primary and secondary threads. */
503 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
505 if (_rte_eth_dev_allocated(name) != NULL) {
507 "Ethernet device with name %s already allocated\n",
512 port_id = rte_eth_dev_find_free_port();
513 if (port_id == RTE_MAX_ETHPORTS) {
515 "Reached maximum number of Ethernet ports\n");
519 eth_dev = eth_dev_get(port_id);
520 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
521 eth_dev->data->port_id = port_id;
522 eth_dev->data->mtu = RTE_ETHER_MTU;
525 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
531 * Attach to a port already registered by the primary process, which
532 * makes sure that the same device would have the same port id both
533 * in the primary and secondary process.
536 rte_eth_dev_attach_secondary(const char *name)
539 struct rte_eth_dev *eth_dev = NULL;
541 rte_eth_dev_shared_data_prepare();
543 /* Synchronize port attachment to primary port creation and release. */
544 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
546 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
547 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
550 if (i == RTE_MAX_ETHPORTS) {
552 "Device %s is not driven by the primary process\n",
555 eth_dev = eth_dev_get(i);
556 RTE_ASSERT(eth_dev->data->port_id == i);
559 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
564 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
569 rte_eth_dev_shared_data_prepare();
571 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
572 _rte_eth_dev_callback_process(eth_dev,
573 RTE_ETH_EVENT_DESTROY, NULL);
575 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
577 eth_dev->state = RTE_ETH_DEV_UNUSED;
579 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
580 rte_free(eth_dev->data->rx_queues);
581 rte_free(eth_dev->data->tx_queues);
582 rte_free(eth_dev->data->mac_addrs);
583 rte_free(eth_dev->data->hash_mac_addrs);
584 rte_free(eth_dev->data->dev_private);
585 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
588 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
594 rte_eth_dev_is_valid_port(uint16_t port_id)
596 if (port_id >= RTE_MAX_ETHPORTS ||
597 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
604 rte_eth_is_valid_owner_id(uint64_t owner_id)
606 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
607 rte_eth_dev_shared_data->next_owner_id <= owner_id)
613 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
615 port_id = rte_eth_find_next(port_id);
616 while (port_id < RTE_MAX_ETHPORTS &&
617 rte_eth_devices[port_id].data->owner.id != owner_id)
618 port_id = rte_eth_find_next(port_id + 1);
624 rte_eth_dev_owner_new(uint64_t *owner_id)
626 rte_eth_dev_shared_data_prepare();
628 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
630 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
632 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
637 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
638 const struct rte_eth_dev_owner *new_owner)
640 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
641 struct rte_eth_dev_owner *port_owner;
643 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
644 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
649 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
650 !rte_eth_is_valid_owner_id(old_owner_id)) {
652 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
653 old_owner_id, new_owner->id);
657 port_owner = &rte_eth_devices[port_id].data->owner;
658 if (port_owner->id != old_owner_id) {
660 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
661 port_id, port_owner->name, port_owner->id);
665 /* can not truncate (same structure) */
666 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
668 port_owner->id = new_owner->id;
670 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
671 port_id, new_owner->name, new_owner->id);
677 rte_eth_dev_owner_set(const uint16_t port_id,
678 const struct rte_eth_dev_owner *owner)
682 rte_eth_dev_shared_data_prepare();
684 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
686 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
688 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
693 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
695 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
696 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
699 rte_eth_dev_shared_data_prepare();
701 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
703 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
705 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
710 rte_eth_dev_owner_delete(const uint64_t owner_id)
715 rte_eth_dev_shared_data_prepare();
717 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
719 if (rte_eth_is_valid_owner_id(owner_id)) {
720 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
721 if (rte_eth_devices[port_id].data->owner.id == owner_id)
722 memset(&rte_eth_devices[port_id].data->owner, 0,
723 sizeof(struct rte_eth_dev_owner));
724 RTE_ETHDEV_LOG(NOTICE,
725 "All port owners owned by %016"PRIx64" identifier have removed\n",
729 "Invalid owner id=%016"PRIx64"\n",
734 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
740 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
743 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
745 rte_eth_dev_shared_data_prepare();
747 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
749 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
750 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
754 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
757 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
762 rte_eth_dev_socket_id(uint16_t port_id)
764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
765 return rte_eth_devices[port_id].data->numa_node;
769 rte_eth_dev_get_sec_ctx(uint16_t port_id)
771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
772 return rte_eth_devices[port_id].security_ctx;
776 rte_eth_dev_count(void)
778 return rte_eth_dev_count_avail();
782 rte_eth_dev_count_avail(void)
789 RTE_ETH_FOREACH_DEV(p)
796 rte_eth_dev_count_total(void)
798 uint16_t port, count = 0;
800 RTE_ETH_FOREACH_VALID_DEV(port)
807 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
814 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
818 /* shouldn't check 'rte_eth_devices[i].data',
819 * because it might be overwritten by VDEV PMD */
820 tmp = rte_eth_dev_shared_data->data[port_id].name;
826 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
831 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
835 RTE_ETH_FOREACH_VALID_DEV(pid)
836 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
845 eth_err(uint16_t port_id, int ret)
849 if (rte_eth_dev_is_removed(port_id))
855 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
857 uint16_t old_nb_queues = dev->data->nb_rx_queues;
861 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
862 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
863 sizeof(dev->data->rx_queues[0]) * nb_queues,
864 RTE_CACHE_LINE_SIZE);
865 if (dev->data->rx_queues == NULL) {
866 dev->data->nb_rx_queues = 0;
869 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
872 rxq = dev->data->rx_queues;
874 for (i = nb_queues; i < old_nb_queues; i++)
875 (*dev->dev_ops->rx_queue_release)(rxq[i]);
876 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
877 RTE_CACHE_LINE_SIZE);
880 if (nb_queues > old_nb_queues) {
881 uint16_t new_qs = nb_queues - old_nb_queues;
883 memset(rxq + old_nb_queues, 0,
884 sizeof(rxq[0]) * new_qs);
887 dev->data->rx_queues = rxq;
889 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
892 rxq = dev->data->rx_queues;
894 for (i = nb_queues; i < old_nb_queues; i++)
895 (*dev->dev_ops->rx_queue_release)(rxq[i]);
897 rte_free(dev->data->rx_queues);
898 dev->data->rx_queues = NULL;
900 dev->data->nb_rx_queues = nb_queues;
905 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
907 struct rte_eth_dev *dev;
909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
911 dev = &rte_eth_devices[port_id];
912 if (!dev->data->dev_started) {
914 "Port %u must be started before start any queue\n",
919 if (rx_queue_id >= dev->data->nb_rx_queues) {
920 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
926 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
928 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
929 rx_queue_id, port_id);
933 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
939 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
941 struct rte_eth_dev *dev;
943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
945 dev = &rte_eth_devices[port_id];
946 if (rx_queue_id >= dev->data->nb_rx_queues) {
947 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
953 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
955 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
956 rx_queue_id, port_id);
960 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
965 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
967 struct rte_eth_dev *dev;
969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
971 dev = &rte_eth_devices[port_id];
972 if (!dev->data->dev_started) {
974 "Port %u must be started before start any queue\n",
979 if (tx_queue_id >= dev->data->nb_tx_queues) {
980 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
986 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
988 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
989 tx_queue_id, port_id);
993 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
997 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
999 struct rte_eth_dev *dev;
1001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1003 dev = &rte_eth_devices[port_id];
1004 if (tx_queue_id >= dev->data->nb_tx_queues) {
1005 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1011 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1012 RTE_ETHDEV_LOG(INFO,
1013 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1014 tx_queue_id, port_id);
1018 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1023 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1025 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1029 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1030 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1031 sizeof(dev->data->tx_queues[0]) * nb_queues,
1032 RTE_CACHE_LINE_SIZE);
1033 if (dev->data->tx_queues == NULL) {
1034 dev->data->nb_tx_queues = 0;
1037 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1040 txq = dev->data->tx_queues;
1042 for (i = nb_queues; i < old_nb_queues; i++)
1043 (*dev->dev_ops->tx_queue_release)(txq[i]);
1044 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1045 RTE_CACHE_LINE_SIZE);
1048 if (nb_queues > old_nb_queues) {
1049 uint16_t new_qs = nb_queues - old_nb_queues;
1051 memset(txq + old_nb_queues, 0,
1052 sizeof(txq[0]) * new_qs);
1055 dev->data->tx_queues = txq;
1057 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1060 txq = dev->data->tx_queues;
1062 for (i = nb_queues; i < old_nb_queues; i++)
1063 (*dev->dev_ops->tx_queue_release)(txq[i]);
1065 rte_free(dev->data->tx_queues);
1066 dev->data->tx_queues = NULL;
1068 dev->data->nb_tx_queues = nb_queues;
1073 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1076 case ETH_SPEED_NUM_10M:
1077 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1078 case ETH_SPEED_NUM_100M:
1079 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1080 case ETH_SPEED_NUM_1G:
1081 return ETH_LINK_SPEED_1G;
1082 case ETH_SPEED_NUM_2_5G:
1083 return ETH_LINK_SPEED_2_5G;
1084 case ETH_SPEED_NUM_5G:
1085 return ETH_LINK_SPEED_5G;
1086 case ETH_SPEED_NUM_10G:
1087 return ETH_LINK_SPEED_10G;
1088 case ETH_SPEED_NUM_20G:
1089 return ETH_LINK_SPEED_20G;
1090 case ETH_SPEED_NUM_25G:
1091 return ETH_LINK_SPEED_25G;
1092 case ETH_SPEED_NUM_40G:
1093 return ETH_LINK_SPEED_40G;
1094 case ETH_SPEED_NUM_50G:
1095 return ETH_LINK_SPEED_50G;
1096 case ETH_SPEED_NUM_56G:
1097 return ETH_LINK_SPEED_56G;
1098 case ETH_SPEED_NUM_100G:
1099 return ETH_LINK_SPEED_100G;
1106 rte_eth_dev_rx_offload_name(uint64_t offload)
1108 const char *name = "UNKNOWN";
1111 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1112 if (offload == rte_rx_offload_names[i].offload) {
1113 name = rte_rx_offload_names[i].name;
1122 rte_eth_dev_tx_offload_name(uint64_t offload)
1124 const char *name = "UNKNOWN";
1127 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1128 if (offload == rte_tx_offload_names[i].offload) {
1129 name = rte_tx_offload_names[i].name;
1138 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1139 const struct rte_eth_conf *dev_conf)
1141 struct rte_eth_dev *dev;
1142 struct rte_eth_dev_info dev_info;
1143 struct rte_eth_conf orig_conf;
1147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1149 dev = &rte_eth_devices[port_id];
1151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1153 if (dev->data->dev_started) {
1155 "Port %u must be stopped to allow configuration\n",
1160 /* Store original config, as rollback required on failure */
1161 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1164 * Copy the dev_conf parameter into the dev structure.
1165 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1167 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1169 ret = rte_eth_dev_info_get(port_id, &dev_info);
1173 /* If number of queues specified by application for both Rx and Tx is
1174 * zero, use driver preferred values. This cannot be done individually
1175 * as it is valid for either Tx or Rx (but not both) to be zero.
1176 * If driver does not provide any preferred valued, fall back on
1179 if (nb_rx_q == 0 && nb_tx_q == 0) {
1180 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1182 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1183 nb_tx_q = dev_info.default_txportconf.nb_queues;
1185 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1188 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1190 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1191 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1196 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1198 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1199 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1205 * Check that the numbers of RX and TX queues are not greater
1206 * than the maximum number of RX and TX queues supported by the
1207 * configured device.
1209 if (nb_rx_q > dev_info.max_rx_queues) {
1210 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1211 port_id, nb_rx_q, dev_info.max_rx_queues);
1216 if (nb_tx_q > dev_info.max_tx_queues) {
1217 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1218 port_id, nb_tx_q, dev_info.max_tx_queues);
1223 /* Check that the device supports requested interrupts */
1224 if ((dev_conf->intr_conf.lsc == 1) &&
1225 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1226 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1227 dev->device->driver->name);
1231 if ((dev_conf->intr_conf.rmv == 1) &&
1232 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1233 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1234 dev->device->driver->name);
1240 * If jumbo frames are enabled, check that the maximum RX packet
1241 * length is supported by the configured device.
1243 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1244 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1246 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1247 port_id, dev_conf->rxmode.max_rx_pkt_len,
1248 dev_info.max_rx_pktlen);
1251 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1253 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1254 port_id, dev_conf->rxmode.max_rx_pkt_len,
1255 (unsigned int)RTE_ETHER_MIN_LEN);
1260 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1261 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1262 /* Use default value */
1263 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1267 /* Any requested offloading must be within its device capabilities */
1268 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1269 dev_conf->rxmode.offloads) {
1271 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1272 "capabilities 0x%"PRIx64" in %s()\n",
1273 port_id, dev_conf->rxmode.offloads,
1274 dev_info.rx_offload_capa,
1279 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1280 dev_conf->txmode.offloads) {
1282 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1283 "capabilities 0x%"PRIx64" in %s()\n",
1284 port_id, dev_conf->txmode.offloads,
1285 dev_info.tx_offload_capa,
1291 /* Check that device supports requested rss hash functions. */
1292 if ((dev_info.flow_type_rss_offloads |
1293 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1294 dev_info.flow_type_rss_offloads) {
1296 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1297 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1298 dev_info.flow_type_rss_offloads);
1304 * Setup new number of RX/TX queues and reconfigure device.
1306 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1309 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1315 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1318 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1320 rte_eth_dev_rx_queue_config(dev, 0);
1325 diag = (*dev->dev_ops->dev_configure)(dev);
1327 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1329 rte_eth_dev_rx_queue_config(dev, 0);
1330 rte_eth_dev_tx_queue_config(dev, 0);
1331 ret = eth_err(port_id, diag);
1335 /* Initialize Rx profiling if enabled at compilation time. */
1336 diag = __rte_eth_dev_profile_init(port_id, dev);
1338 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1340 rte_eth_dev_rx_queue_config(dev, 0);
1341 rte_eth_dev_tx_queue_config(dev, 0);
1342 ret = eth_err(port_id, diag);
1349 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1355 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1357 if (dev->data->dev_started) {
1358 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1359 dev->data->port_id);
1363 rte_eth_dev_rx_queue_config(dev, 0);
1364 rte_eth_dev_tx_queue_config(dev, 0);
1366 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1370 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1371 struct rte_eth_dev_info *dev_info)
1373 struct rte_ether_addr *addr;
1378 /* replay MAC address configuration including default MAC */
1379 addr = &dev->data->mac_addrs[0];
1380 if (*dev->dev_ops->mac_addr_set != NULL)
1381 (*dev->dev_ops->mac_addr_set)(dev, addr);
1382 else if (*dev->dev_ops->mac_addr_add != NULL)
1383 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1385 if (*dev->dev_ops->mac_addr_add != NULL) {
1386 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1387 addr = &dev->data->mac_addrs[i];
1389 /* skip zero address */
1390 if (rte_is_zero_ether_addr(addr))
1394 pool_mask = dev->data->mac_pool_sel[i];
1397 if (pool_mask & 1ULL)
1398 (*dev->dev_ops->mac_addr_add)(dev,
1402 } while (pool_mask);
1408 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1409 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1413 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1414 rte_eth_dev_mac_restore(dev, dev_info);
1416 /* replay promiscuous configuration */
1418 * use callbacks directly since we don't need port_id check and
1419 * would like to bypass the same value set
1421 if (rte_eth_promiscuous_get(port_id) == 1 &&
1422 *dev->dev_ops->promiscuous_enable != NULL) {
1423 ret = eth_err(port_id,
1424 (*dev->dev_ops->promiscuous_enable)(dev));
1425 if (ret != 0 && ret != -ENOTSUP) {
1427 "Failed to enable promiscuous mode for device (port %u): %s\n",
1428 port_id, rte_strerror(-ret));
1431 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1432 *dev->dev_ops->promiscuous_disable != NULL) {
1433 ret = eth_err(port_id,
1434 (*dev->dev_ops->promiscuous_disable)(dev));
1435 if (ret != 0 && ret != -ENOTSUP) {
1437 "Failed to disable promiscuous mode for device (port %u): %s\n",
1438 port_id, rte_strerror(-ret));
1443 /* replay all multicast configuration */
1445 * use callbacks directly since we don't need port_id check and
1446 * would like to bypass the same value set
1448 if (rte_eth_allmulticast_get(port_id) == 1 &&
1449 *dev->dev_ops->allmulticast_enable != NULL) {
1450 ret = eth_err(port_id,
1451 (*dev->dev_ops->allmulticast_enable)(dev));
1452 if (ret != 0 && ret != -ENOTSUP) {
1454 "Failed to enable allmulticast mode for device (port %u): %s\n",
1455 port_id, rte_strerror(-ret));
1458 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1459 *dev->dev_ops->allmulticast_disable != NULL) {
1460 ret = eth_err(port_id,
1461 (*dev->dev_ops->allmulticast_disable)(dev));
1462 if (ret != 0 && ret != -ENOTSUP) {
1464 "Failed to disable allmulticast mode for device (port %u): %s\n",
1465 port_id, rte_strerror(-ret));
1474 rte_eth_dev_start(uint16_t port_id)
1476 struct rte_eth_dev *dev;
1477 struct rte_eth_dev_info dev_info;
1481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1483 dev = &rte_eth_devices[port_id];
1485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1487 if (dev->data->dev_started != 0) {
1488 RTE_ETHDEV_LOG(INFO,
1489 "Device with port_id=%"PRIu16" already started\n",
1494 ret = rte_eth_dev_info_get(port_id, &dev_info);
1498 /* Lets restore MAC now if device does not support live change */
1499 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1500 rte_eth_dev_mac_restore(dev, &dev_info);
1502 diag = (*dev->dev_ops->dev_start)(dev);
1504 dev->data->dev_started = 1;
1506 return eth_err(port_id, diag);
1508 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1511 "Error during restoring configuration for device (port %u): %s\n",
1512 port_id, rte_strerror(-ret));
1513 rte_eth_dev_stop(port_id);
1517 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1518 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1519 (*dev->dev_ops->link_update)(dev, 0);
1525 rte_eth_dev_stop(uint16_t port_id)
1527 struct rte_eth_dev *dev;
1529 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1530 dev = &rte_eth_devices[port_id];
1532 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1534 if (dev->data->dev_started == 0) {
1535 RTE_ETHDEV_LOG(INFO,
1536 "Device with port_id=%"PRIu16" already stopped\n",
1541 dev->data->dev_started = 0;
1542 (*dev->dev_ops->dev_stop)(dev);
1546 rte_eth_dev_set_link_up(uint16_t port_id)
1548 struct rte_eth_dev *dev;
1550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1552 dev = &rte_eth_devices[port_id];
1554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1555 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1559 rte_eth_dev_set_link_down(uint16_t port_id)
1561 struct rte_eth_dev *dev;
1563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1565 dev = &rte_eth_devices[port_id];
1567 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1568 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1572 rte_eth_dev_close(uint16_t port_id)
1574 struct rte_eth_dev *dev;
1576 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1577 dev = &rte_eth_devices[port_id];
1579 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1580 dev->data->dev_started = 0;
1581 (*dev->dev_ops->dev_close)(dev);
1583 /* check behaviour flag - temporary for PMD migration */
1584 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1585 /* new behaviour: send event + reset state + free all data */
1586 rte_eth_dev_release_port(dev);
1589 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1590 "The driver %s should migrate to the new behaviour.\n",
1591 dev->device->driver->name);
1592 /* old behaviour: only free queue arrays */
1593 dev->data->nb_rx_queues = 0;
1594 rte_free(dev->data->rx_queues);
1595 dev->data->rx_queues = NULL;
1596 dev->data->nb_tx_queues = 0;
1597 rte_free(dev->data->tx_queues);
1598 dev->data->tx_queues = NULL;
1602 rte_eth_dev_reset(uint16_t port_id)
1604 struct rte_eth_dev *dev;
1607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1608 dev = &rte_eth_devices[port_id];
1610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1612 rte_eth_dev_stop(port_id);
1613 ret = dev->dev_ops->dev_reset(dev);
1615 return eth_err(port_id, ret);
1619 rte_eth_dev_is_removed(uint16_t port_id)
1621 struct rte_eth_dev *dev;
1624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1626 dev = &rte_eth_devices[port_id];
1628 if (dev->state == RTE_ETH_DEV_REMOVED)
1631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1633 ret = dev->dev_ops->is_removed(dev);
1635 /* Device is physically removed. */
1636 dev->state = RTE_ETH_DEV_REMOVED;
1642 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1643 uint16_t nb_rx_desc, unsigned int socket_id,
1644 const struct rte_eth_rxconf *rx_conf,
1645 struct rte_mempool *mp)
1648 uint32_t mbp_buf_size;
1649 struct rte_eth_dev *dev;
1650 struct rte_eth_dev_info dev_info;
1651 struct rte_eth_rxconf local_conf;
1654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1656 dev = &rte_eth_devices[port_id];
1657 if (rx_queue_id >= dev->data->nb_rx_queues) {
1658 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1663 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1670 * Check the size of the mbuf data buffer.
1671 * This value must be provided in the private data of the memory pool.
1672 * First check that the memory pool has a valid private data.
1674 ret = rte_eth_dev_info_get(port_id, &dev_info);
1678 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1679 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1680 mp->name, (int)mp->private_data_size,
1681 (int)sizeof(struct rte_pktmbuf_pool_private));
1684 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1686 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1688 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1689 mp->name, (int)mbp_buf_size,
1690 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1691 (int)RTE_PKTMBUF_HEADROOM,
1692 (int)dev_info.min_rx_bufsize);
1696 /* Use default specified by driver, if nb_rx_desc is zero */
1697 if (nb_rx_desc == 0) {
1698 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1699 /* If driver default is also zero, fall back on EAL default */
1700 if (nb_rx_desc == 0)
1701 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1704 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1705 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1706 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1709 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1710 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1711 dev_info.rx_desc_lim.nb_min,
1712 dev_info.rx_desc_lim.nb_align);
1716 if (dev->data->dev_started &&
1717 !(dev_info.dev_capa &
1718 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1721 if (dev->data->dev_started &&
1722 (dev->data->rx_queue_state[rx_queue_id] !=
1723 RTE_ETH_QUEUE_STATE_STOPPED))
1726 rxq = dev->data->rx_queues;
1727 if (rxq[rx_queue_id]) {
1728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1730 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1731 rxq[rx_queue_id] = NULL;
1734 if (rx_conf == NULL)
1735 rx_conf = &dev_info.default_rxconf;
1737 local_conf = *rx_conf;
1740 * If an offloading has already been enabled in
1741 * rte_eth_dev_configure(), it has been enabled on all queues,
1742 * so there is no need to enable it in this queue again.
1743 * The local_conf.offloads input to underlying PMD only carries
1744 * those offloadings which are only enabled on this queue and
1745 * not enabled on all queues.
1747 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1750 * New added offloadings for this queue are those not enabled in
1751 * rte_eth_dev_configure() and they must be per-queue type.
1752 * A pure per-port offloading can't be enabled on a queue while
1753 * disabled on another queue. A pure per-port offloading can't
1754 * be enabled for any queue as new added one if it hasn't been
1755 * enabled in rte_eth_dev_configure().
1757 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1758 local_conf.offloads) {
1760 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1761 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1762 port_id, rx_queue_id, local_conf.offloads,
1763 dev_info.rx_queue_offload_capa,
1768 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1769 socket_id, &local_conf, mp);
1771 if (!dev->data->min_rx_buf_size ||
1772 dev->data->min_rx_buf_size > mbp_buf_size)
1773 dev->data->min_rx_buf_size = mbp_buf_size;
1776 return eth_err(port_id, ret);
1780 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1781 uint16_t nb_tx_desc, unsigned int socket_id,
1782 const struct rte_eth_txconf *tx_conf)
1784 struct rte_eth_dev *dev;
1785 struct rte_eth_dev_info dev_info;
1786 struct rte_eth_txconf local_conf;
1790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1792 dev = &rte_eth_devices[port_id];
1793 if (tx_queue_id >= dev->data->nb_tx_queues) {
1794 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1800 ret = rte_eth_dev_info_get(port_id, &dev_info);
1804 /* Use default specified by driver, if nb_tx_desc is zero */
1805 if (nb_tx_desc == 0) {
1806 nb_tx_desc = dev_info.default_txportconf.ring_size;
1807 /* If driver default is zero, fall back on EAL default */
1808 if (nb_tx_desc == 0)
1809 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1811 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1812 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1813 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1815 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1816 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1817 dev_info.tx_desc_lim.nb_min,
1818 dev_info.tx_desc_lim.nb_align);
1822 if (dev->data->dev_started &&
1823 !(dev_info.dev_capa &
1824 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1827 if (dev->data->dev_started &&
1828 (dev->data->tx_queue_state[tx_queue_id] !=
1829 RTE_ETH_QUEUE_STATE_STOPPED))
1832 txq = dev->data->tx_queues;
1833 if (txq[tx_queue_id]) {
1834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1836 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1837 txq[tx_queue_id] = NULL;
1840 if (tx_conf == NULL)
1841 tx_conf = &dev_info.default_txconf;
1843 local_conf = *tx_conf;
1846 * If an offloading has already been enabled in
1847 * rte_eth_dev_configure(), it has been enabled on all queues,
1848 * so there is no need to enable it in this queue again.
1849 * The local_conf.offloads input to underlying PMD only carries
1850 * those offloadings which are only enabled on this queue and
1851 * not enabled on all queues.
1853 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1856 * New added offloadings for this queue are those not enabled in
1857 * rte_eth_dev_configure() and they must be per-queue type.
1858 * A pure per-port offloading can't be enabled on a queue while
1859 * disabled on another queue. A pure per-port offloading can't
1860 * be enabled for any queue as new added one if it hasn't been
1861 * enabled in rte_eth_dev_configure().
1863 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1864 local_conf.offloads) {
1866 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1867 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1868 port_id, tx_queue_id, local_conf.offloads,
1869 dev_info.tx_queue_offload_capa,
1874 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1875 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1879 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1880 void *userdata __rte_unused)
1884 for (i = 0; i < unsent; i++)
1885 rte_pktmbuf_free(pkts[i]);
1889 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1892 uint64_t *count = userdata;
1895 for (i = 0; i < unsent; i++)
1896 rte_pktmbuf_free(pkts[i]);
1902 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1903 buffer_tx_error_fn cbfn, void *userdata)
1905 buffer->error_callback = cbfn;
1906 buffer->error_userdata = userdata;
1911 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1918 buffer->size = size;
1919 if (buffer->error_callback == NULL) {
1920 ret = rte_eth_tx_buffer_set_err_callback(
1921 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1928 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1930 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1933 /* Validate Input Data. Bail if not valid or not supported. */
1934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1937 /* Call driver to free pending mbufs. */
1938 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1940 return eth_err(port_id, ret);
1944 rte_eth_promiscuous_enable(uint16_t port_id)
1946 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1950 dev = &rte_eth_devices[port_id];
1952 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
1954 if (dev->data->promiscuous == 0) {
1955 diag = (*dev->dev_ops->promiscuous_enable)(dev);
1956 dev->data->promiscuous = (diag == 0) ? 1 : 0;
1959 return eth_err(port_id, diag);
1963 rte_eth_promiscuous_disable(uint16_t port_id)
1965 struct rte_eth_dev *dev;
1968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1969 dev = &rte_eth_devices[port_id];
1971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
1973 if (dev->data->promiscuous == 1) {
1974 dev->data->promiscuous = 0;
1975 diag = (*dev->dev_ops->promiscuous_disable)(dev);
1977 dev->data->promiscuous = 1;
1980 return eth_err(port_id, diag);
1984 rte_eth_promiscuous_get(uint16_t port_id)
1986 struct rte_eth_dev *dev;
1988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1990 dev = &rte_eth_devices[port_id];
1991 return dev->data->promiscuous;
1995 rte_eth_allmulticast_enable(uint16_t port_id)
1997 struct rte_eth_dev *dev;
2000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2001 dev = &rte_eth_devices[port_id];
2003 if (dev->data->all_multicast == 1)
2006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2007 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2008 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2010 return eth_err(port_id, diag);
2014 rte_eth_allmulticast_disable(uint16_t port_id)
2016 struct rte_eth_dev *dev;
2019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2020 dev = &rte_eth_devices[port_id];
2022 if (dev->data->all_multicast == 0)
2025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2026 dev->data->all_multicast = 0;
2027 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2029 dev->data->all_multicast = 1;
2031 return eth_err(port_id, diag);
2035 rte_eth_allmulticast_get(uint16_t port_id)
2037 struct rte_eth_dev *dev;
2039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2041 dev = &rte_eth_devices[port_id];
2042 return dev->data->all_multicast;
2046 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2048 struct rte_eth_dev *dev;
2050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2051 dev = &rte_eth_devices[port_id];
2053 if (dev->data->dev_conf.intr_conf.lsc &&
2054 dev->data->dev_started)
2055 rte_eth_linkstatus_get(dev, eth_link);
2057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2058 (*dev->dev_ops->link_update)(dev, 1);
2059 *eth_link = dev->data->dev_link;
2066 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2068 struct rte_eth_dev *dev;
2070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2071 dev = &rte_eth_devices[port_id];
2073 if (dev->data->dev_conf.intr_conf.lsc &&
2074 dev->data->dev_started)
2075 rte_eth_linkstatus_get(dev, eth_link);
2077 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2078 (*dev->dev_ops->link_update)(dev, 0);
2079 *eth_link = dev->data->dev_link;
2086 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2088 struct rte_eth_dev *dev;
2090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2092 dev = &rte_eth_devices[port_id];
2093 memset(stats, 0, sizeof(*stats));
2095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2096 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2097 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2101 rte_eth_stats_reset(uint16_t port_id)
2103 struct rte_eth_dev *dev;
2106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2107 dev = &rte_eth_devices[port_id];
2109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2110 ret = (*dev->dev_ops->stats_reset)(dev);
2112 return eth_err(port_id, ret);
2114 dev->data->rx_mbuf_alloc_failed = 0;
2120 get_xstats_basic_count(struct rte_eth_dev *dev)
2122 uint16_t nb_rxqs, nb_txqs;
2125 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2126 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2128 count = RTE_NB_STATS;
2129 count += nb_rxqs * RTE_NB_RXQ_STATS;
2130 count += nb_txqs * RTE_NB_TXQ_STATS;
2136 get_xstats_count(uint16_t port_id)
2138 struct rte_eth_dev *dev;
2141 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2142 dev = &rte_eth_devices[port_id];
2143 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2144 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2147 return eth_err(port_id, count);
2149 if (dev->dev_ops->xstats_get_names != NULL) {
2150 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2152 return eth_err(port_id, count);
2157 count += get_xstats_basic_count(dev);
2163 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2166 int cnt_xstats, idx_xstat;
2168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2171 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2176 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2181 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2182 if (cnt_xstats < 0) {
2183 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2187 /* Get id-name lookup table */
2188 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2190 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2191 port_id, xstats_names, cnt_xstats, NULL)) {
2192 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2196 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2197 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2206 /* retrieve basic stats names */
2208 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2209 struct rte_eth_xstat_name *xstats_names)
2211 int cnt_used_entries = 0;
2212 uint32_t idx, id_queue;
2215 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2216 strlcpy(xstats_names[cnt_used_entries].name,
2217 rte_stats_strings[idx].name,
2218 sizeof(xstats_names[0].name));
2221 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2222 for (id_queue = 0; id_queue < num_q; id_queue++) {
2223 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2224 snprintf(xstats_names[cnt_used_entries].name,
2225 sizeof(xstats_names[0].name),
2227 id_queue, rte_rxq_stats_strings[idx].name);
2232 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2233 for (id_queue = 0; id_queue < num_q; id_queue++) {
2234 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2235 snprintf(xstats_names[cnt_used_entries].name,
2236 sizeof(xstats_names[0].name),
2238 id_queue, rte_txq_stats_strings[idx].name);
2242 return cnt_used_entries;
2245 /* retrieve ethdev extended statistics names */
2247 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2248 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2251 struct rte_eth_xstat_name *xstats_names_copy;
2252 unsigned int no_basic_stat_requested = 1;
2253 unsigned int no_ext_stat_requested = 1;
2254 unsigned int expected_entries;
2255 unsigned int basic_count;
2256 struct rte_eth_dev *dev;
2260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2261 dev = &rte_eth_devices[port_id];
2263 basic_count = get_xstats_basic_count(dev);
2264 ret = get_xstats_count(port_id);
2267 expected_entries = (unsigned int)ret;
2269 /* Return max number of stats if no ids given */
2272 return expected_entries;
2273 else if (xstats_names && size < expected_entries)
2274 return expected_entries;
2277 if (ids && !xstats_names)
2280 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2281 uint64_t ids_copy[size];
2283 for (i = 0; i < size; i++) {
2284 if (ids[i] < basic_count) {
2285 no_basic_stat_requested = 0;
2290 * Convert ids to xstats ids that PMD knows.
2291 * ids known by user are basic + extended stats.
2293 ids_copy[i] = ids[i] - basic_count;
2296 if (no_basic_stat_requested)
2297 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2298 xstats_names, ids_copy, size);
2301 /* Retrieve all stats */
2303 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2305 if (num_stats < 0 || num_stats > (int)expected_entries)
2308 return expected_entries;
2311 xstats_names_copy = calloc(expected_entries,
2312 sizeof(struct rte_eth_xstat_name));
2314 if (!xstats_names_copy) {
2315 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2320 for (i = 0; i < size; i++) {
2321 if (ids[i] >= basic_count) {
2322 no_ext_stat_requested = 0;
2328 /* Fill xstats_names_copy structure */
2329 if (ids && no_ext_stat_requested) {
2330 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2332 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2335 free(xstats_names_copy);
2341 for (i = 0; i < size; i++) {
2342 if (ids[i] >= expected_entries) {
2343 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2344 free(xstats_names_copy);
2347 xstats_names[i] = xstats_names_copy[ids[i]];
2350 free(xstats_names_copy);
2355 rte_eth_xstats_get_names(uint16_t port_id,
2356 struct rte_eth_xstat_name *xstats_names,
2359 struct rte_eth_dev *dev;
2360 int cnt_used_entries;
2361 int cnt_expected_entries;
2362 int cnt_driver_entries;
2364 cnt_expected_entries = get_xstats_count(port_id);
2365 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2366 (int)size < cnt_expected_entries)
2367 return cnt_expected_entries;
2369 /* port_id checked in get_xstats_count() */
2370 dev = &rte_eth_devices[port_id];
2372 cnt_used_entries = rte_eth_basic_stats_get_names(
2375 if (dev->dev_ops->xstats_get_names != NULL) {
2376 /* If there are any driver-specific xstats, append them
2379 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2381 xstats_names + cnt_used_entries,
2382 size - cnt_used_entries);
2383 if (cnt_driver_entries < 0)
2384 return eth_err(port_id, cnt_driver_entries);
2385 cnt_used_entries += cnt_driver_entries;
2388 return cnt_used_entries;
2393 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2395 struct rte_eth_dev *dev;
2396 struct rte_eth_stats eth_stats;
2397 unsigned int count = 0, i, q;
2398 uint64_t val, *stats_ptr;
2399 uint16_t nb_rxqs, nb_txqs;
2402 ret = rte_eth_stats_get(port_id, ð_stats);
2406 dev = &rte_eth_devices[port_id];
2408 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2409 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2412 for (i = 0; i < RTE_NB_STATS; i++) {
2413 stats_ptr = RTE_PTR_ADD(ð_stats,
2414 rte_stats_strings[i].offset);
2416 xstats[count++].value = val;
2420 for (q = 0; q < nb_rxqs; q++) {
2421 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2422 stats_ptr = RTE_PTR_ADD(ð_stats,
2423 rte_rxq_stats_strings[i].offset +
2424 q * sizeof(uint64_t));
2426 xstats[count++].value = val;
2431 for (q = 0; q < nb_txqs; q++) {
2432 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2433 stats_ptr = RTE_PTR_ADD(ð_stats,
2434 rte_txq_stats_strings[i].offset +
2435 q * sizeof(uint64_t));
2437 xstats[count++].value = val;
2443 /* retrieve ethdev extended statistics */
2445 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2446 uint64_t *values, unsigned int size)
2448 unsigned int no_basic_stat_requested = 1;
2449 unsigned int no_ext_stat_requested = 1;
2450 unsigned int num_xstats_filled;
2451 unsigned int basic_count;
2452 uint16_t expected_entries;
2453 struct rte_eth_dev *dev;
2457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2458 ret = get_xstats_count(port_id);
2461 expected_entries = (uint16_t)ret;
2462 struct rte_eth_xstat xstats[expected_entries];
2463 dev = &rte_eth_devices[port_id];
2464 basic_count = get_xstats_basic_count(dev);
2466 /* Return max number of stats if no ids given */
2469 return expected_entries;
2470 else if (values && size < expected_entries)
2471 return expected_entries;
2477 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2478 unsigned int basic_count = get_xstats_basic_count(dev);
2479 uint64_t ids_copy[size];
2481 for (i = 0; i < size; i++) {
2482 if (ids[i] < basic_count) {
2483 no_basic_stat_requested = 0;
2488 * Convert ids to xstats ids that PMD knows.
2489 * ids known by user are basic + extended stats.
2491 ids_copy[i] = ids[i] - basic_count;
2494 if (no_basic_stat_requested)
2495 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2500 for (i = 0; i < size; i++) {
2501 if (ids[i] >= basic_count) {
2502 no_ext_stat_requested = 0;
2508 /* Fill the xstats structure */
2509 if (ids && no_ext_stat_requested)
2510 ret = rte_eth_basic_stats_get(port_id, xstats);
2512 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2516 num_xstats_filled = (unsigned int)ret;
2518 /* Return all stats */
2520 for (i = 0; i < num_xstats_filled; i++)
2521 values[i] = xstats[i].value;
2522 return expected_entries;
2526 for (i = 0; i < size; i++) {
2527 if (ids[i] >= expected_entries) {
2528 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2531 values[i] = xstats[ids[i]].value;
2537 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2540 struct rte_eth_dev *dev;
2541 unsigned int count = 0, i;
2542 signed int xcount = 0;
2543 uint16_t nb_rxqs, nb_txqs;
2546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2548 dev = &rte_eth_devices[port_id];
2550 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2551 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2553 /* Return generic statistics */
2554 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2555 (nb_txqs * RTE_NB_TXQ_STATS);
2557 /* implemented by the driver */
2558 if (dev->dev_ops->xstats_get != NULL) {
2559 /* Retrieve the xstats from the driver at the end of the
2562 xcount = (*dev->dev_ops->xstats_get)(dev,
2563 xstats ? xstats + count : NULL,
2564 (n > count) ? n - count : 0);
2567 return eth_err(port_id, xcount);
2570 if (n < count + xcount || xstats == NULL)
2571 return count + xcount;
2573 /* now fill the xstats structure */
2574 ret = rte_eth_basic_stats_get(port_id, xstats);
2579 for (i = 0; i < count; i++)
2581 /* add an offset to driver-specific stats */
2582 for ( ; i < count + xcount; i++)
2583 xstats[i].id += count;
2585 return count + xcount;
2588 /* reset ethdev extended statistics */
2590 rte_eth_xstats_reset(uint16_t port_id)
2592 struct rte_eth_dev *dev;
2594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2595 dev = &rte_eth_devices[port_id];
2597 /* implemented by the driver */
2598 if (dev->dev_ops->xstats_reset != NULL)
2599 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2601 /* fallback to default */
2602 return rte_eth_stats_reset(port_id);
2606 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2609 struct rte_eth_dev *dev;
2611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2617 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2620 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2623 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2626 return (*dev->dev_ops->queue_stats_mapping_set)
2627 (dev, queue_id, stat_idx, is_rx);
2632 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2635 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2636 stat_idx, STAT_QMAP_TX));
2641 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2644 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2645 stat_idx, STAT_QMAP_RX));
2649 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2651 struct rte_eth_dev *dev;
2653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2654 dev = &rte_eth_devices[port_id];
2656 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2657 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2658 fw_version, fw_size));
2662 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2664 struct rte_eth_dev *dev;
2665 const struct rte_eth_desc_lim lim = {
2666 .nb_max = UINT16_MAX,
2669 .nb_seg_max = UINT16_MAX,
2670 .nb_mtu_seg_max = UINT16_MAX,
2675 * Init dev_info before port_id check since caller does not have
2676 * return status and does not know if get is successful or not.
2678 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2681 dev = &rte_eth_devices[port_id];
2683 dev_info->rx_desc_lim = lim;
2684 dev_info->tx_desc_lim = lim;
2685 dev_info->device = dev->device;
2686 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2687 dev_info->max_mtu = UINT16_MAX;
2689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2690 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2692 /* Cleanup already filled in device information */
2693 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2694 return eth_err(port_id, diag);
2697 dev_info->driver_name = dev->device->driver->name;
2698 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2699 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2701 dev_info->dev_flags = &dev->data->dev_flags;
2707 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2708 uint32_t *ptypes, int num)
2711 struct rte_eth_dev *dev;
2712 const uint32_t *all_ptypes;
2714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2715 dev = &rte_eth_devices[port_id];
2716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2717 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2722 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2723 if (all_ptypes[i] & ptype_mask) {
2725 ptypes[j] = all_ptypes[i];
2733 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2735 struct rte_eth_dev *dev;
2737 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2738 dev = &rte_eth_devices[port_id];
2739 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2746 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2752 dev = &rte_eth_devices[port_id];
2753 *mtu = dev->data->mtu;
2758 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2761 struct rte_eth_dev_info dev_info;
2762 struct rte_eth_dev *dev;
2764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2769 * Check if the device supports dev_infos_get, if it does not
2770 * skip min_mtu/max_mtu validation here as this requires values
2771 * that are populated within the call to rte_eth_dev_info_get()
2772 * which relies on dev->dev_ops->dev_infos_get.
2774 if (*dev->dev_ops->dev_infos_get != NULL) {
2775 ret = rte_eth_dev_info_get(port_id, &dev_info);
2779 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2783 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2785 dev->data->mtu = mtu;
2787 return eth_err(port_id, ret);
2791 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2793 struct rte_eth_dev *dev;
2796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2797 dev = &rte_eth_devices[port_id];
2798 if (!(dev->data->dev_conf.rxmode.offloads &
2799 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2800 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2805 if (vlan_id > 4095) {
2806 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2812 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2814 struct rte_vlan_filter_conf *vfc;
2818 vfc = &dev->data->vlan_filter_conf;
2819 vidx = vlan_id / 64;
2820 vbit = vlan_id % 64;
2823 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2825 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2828 return eth_err(port_id, ret);
2832 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2835 struct rte_eth_dev *dev;
2837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2838 dev = &rte_eth_devices[port_id];
2839 if (rx_queue_id >= dev->data->nb_rx_queues) {
2840 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2845 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2851 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2852 enum rte_vlan_type vlan_type,
2855 struct rte_eth_dev *dev;
2857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2858 dev = &rte_eth_devices[port_id];
2859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2861 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2866 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2868 struct rte_eth_dev *dev;
2872 uint64_t orig_offloads;
2873 uint64_t *dev_offloads;
2875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 dev = &rte_eth_devices[port_id];
2878 /* save original values in case of failure */
2879 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2880 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2882 /*check which option changed by application*/
2883 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2884 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2887 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2889 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2890 mask |= ETH_VLAN_STRIP_MASK;
2893 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2894 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2897 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2899 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2900 mask |= ETH_VLAN_FILTER_MASK;
2903 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2904 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2907 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2909 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2910 mask |= ETH_VLAN_EXTEND_MASK;
2913 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2914 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2917 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2919 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2920 mask |= ETH_QINQ_STRIP_MASK;
2927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2928 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2930 /* hit an error restore original values */
2931 *dev_offloads = orig_offloads;
2934 return eth_err(port_id, ret);
2938 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2940 struct rte_eth_dev *dev;
2941 uint64_t *dev_offloads;
2944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2945 dev = &rte_eth_devices[port_id];
2946 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2948 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2949 ret |= ETH_VLAN_STRIP_OFFLOAD;
2951 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2952 ret |= ETH_VLAN_FILTER_OFFLOAD;
2954 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2955 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2957 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2958 ret |= ETH_QINQ_STRIP_OFFLOAD;
2964 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2966 struct rte_eth_dev *dev;
2968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2969 dev = &rte_eth_devices[port_id];
2970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2972 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2976 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2978 struct rte_eth_dev *dev;
2980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2981 dev = &rte_eth_devices[port_id];
2982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2983 memset(fc_conf, 0, sizeof(*fc_conf));
2984 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2988 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2990 struct rte_eth_dev *dev;
2992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2993 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2994 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2998 dev = &rte_eth_devices[port_id];
2999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3000 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3004 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3005 struct rte_eth_pfc_conf *pfc_conf)
3007 struct rte_eth_dev *dev;
3009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3010 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3011 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3015 dev = &rte_eth_devices[port_id];
3016 /* High water, low water validation are device specific */
3017 if (*dev->dev_ops->priority_flow_ctrl_set)
3018 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3024 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3032 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3033 for (i = 0; i < num; i++) {
3034 if (reta_conf[i].mask)
3042 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3046 uint16_t i, idx, shift;
3052 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3056 for (i = 0; i < reta_size; i++) {
3057 idx = i / RTE_RETA_GROUP_SIZE;
3058 shift = i % RTE_RETA_GROUP_SIZE;
3059 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3060 (reta_conf[idx].reta[shift] >= max_rxq)) {
3062 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3064 reta_conf[idx].reta[shift], max_rxq);
3073 rte_eth_dev_rss_reta_update(uint16_t port_id,
3074 struct rte_eth_rss_reta_entry64 *reta_conf,
3077 struct rte_eth_dev *dev;
3080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3081 /* Check mask bits */
3082 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3086 dev = &rte_eth_devices[port_id];
3088 /* Check entry value */
3089 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3090 dev->data->nb_rx_queues);
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3095 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3100 rte_eth_dev_rss_reta_query(uint16_t port_id,
3101 struct rte_eth_rss_reta_entry64 *reta_conf,
3104 struct rte_eth_dev *dev;
3107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3109 /* Check mask bits */
3110 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3114 dev = &rte_eth_devices[port_id];
3115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3116 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3121 rte_eth_dev_rss_hash_update(uint16_t port_id,
3122 struct rte_eth_rss_conf *rss_conf)
3124 struct rte_eth_dev *dev;
3125 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3130 ret = rte_eth_dev_info_get(port_id, &dev_info);
3134 dev = &rte_eth_devices[port_id];
3135 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3136 dev_info.flow_type_rss_offloads) {
3138 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3139 port_id, rss_conf->rss_hf,
3140 dev_info.flow_type_rss_offloads);
3143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3144 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3149 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3150 struct rte_eth_rss_conf *rss_conf)
3152 struct rte_eth_dev *dev;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3155 dev = &rte_eth_devices[port_id];
3156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3157 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3162 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3163 struct rte_eth_udp_tunnel *udp_tunnel)
3165 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3168 if (udp_tunnel == NULL) {
3169 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3173 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3174 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3178 dev = &rte_eth_devices[port_id];
3179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3180 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3185 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3186 struct rte_eth_udp_tunnel *udp_tunnel)
3188 struct rte_eth_dev *dev;
3190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3191 dev = &rte_eth_devices[port_id];
3193 if (udp_tunnel == NULL) {
3194 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3198 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3199 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3204 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3209 rte_eth_led_on(uint16_t port_id)
3211 struct rte_eth_dev *dev;
3213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3214 dev = &rte_eth_devices[port_id];
3215 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3216 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3220 rte_eth_led_off(uint16_t port_id)
3222 struct rte_eth_dev *dev;
3224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3225 dev = &rte_eth_devices[port_id];
3226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3227 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3231 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3235 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3237 struct rte_eth_dev_info dev_info;
3238 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3242 ret = rte_eth_dev_info_get(port_id, &dev_info);
3246 for (i = 0; i < dev_info.max_mac_addrs; i++)
3247 if (memcmp(addr, &dev->data->mac_addrs[i],
3248 RTE_ETHER_ADDR_LEN) == 0)
3254 static const struct rte_ether_addr null_mac_addr;
3257 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3260 struct rte_eth_dev *dev;
3265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3266 dev = &rte_eth_devices[port_id];
3267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3269 if (rte_is_zero_ether_addr(addr)) {
3270 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3274 if (pool >= ETH_64_POOLS) {
3275 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3279 index = get_mac_addr_index(port_id, addr);
3281 index = get_mac_addr_index(port_id, &null_mac_addr);
3283 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3288 pool_mask = dev->data->mac_pool_sel[index];
3290 /* Check if both MAC address and pool is already there, and do nothing */
3291 if (pool_mask & (1ULL << pool))
3296 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3299 /* Update address in NIC data structure */
3300 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3302 /* Update pool bitmap in NIC data structure */
3303 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3306 return eth_err(port_id, ret);
3310 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3312 struct rte_eth_dev *dev;
3315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3316 dev = &rte_eth_devices[port_id];
3317 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3319 index = get_mac_addr_index(port_id, addr);
3322 "Port %u: Cannot remove default MAC address\n",
3325 } else if (index < 0)
3326 return 0; /* Do nothing if address wasn't found */
3329 (*dev->dev_ops->mac_addr_remove)(dev, index);
3331 /* Update address in NIC data structure */
3332 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3334 /* reset pool bitmap */
3335 dev->data->mac_pool_sel[index] = 0;
3341 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3343 struct rte_eth_dev *dev;
3346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3348 if (!rte_is_valid_assigned_ether_addr(addr))
3351 dev = &rte_eth_devices[port_id];
3352 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3354 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3358 /* Update default address in NIC data structure */
3359 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3366 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3370 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3372 struct rte_eth_dev_info dev_info;
3373 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3377 ret = rte_eth_dev_info_get(port_id, &dev_info);
3381 if (!dev->data->hash_mac_addrs)
3384 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3385 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3386 RTE_ETHER_ADDR_LEN) == 0)
3393 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3398 struct rte_eth_dev *dev;
3400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3402 dev = &rte_eth_devices[port_id];
3403 if (rte_is_zero_ether_addr(addr)) {
3404 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3409 index = get_hash_mac_addr_index(port_id, addr);
3410 /* Check if it's already there, and do nothing */
3411 if ((index >= 0) && on)
3417 "Port %u: the MAC address was not set in UTA\n",
3422 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3424 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3430 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3431 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3433 /* Update address in NIC data structure */
3435 rte_ether_addr_copy(addr,
3436 &dev->data->hash_mac_addrs[index]);
3438 rte_ether_addr_copy(&null_mac_addr,
3439 &dev->data->hash_mac_addrs[index]);
3442 return eth_err(port_id, ret);
3446 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3448 struct rte_eth_dev *dev;
3450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3452 dev = &rte_eth_devices[port_id];
3454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3455 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3459 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3462 struct rte_eth_dev *dev;
3463 struct rte_eth_dev_info dev_info;
3464 struct rte_eth_link link;
3467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3469 ret = rte_eth_dev_info_get(port_id, &dev_info);
3473 dev = &rte_eth_devices[port_id];
3474 link = dev->data->dev_link;
3476 if (queue_idx > dev_info.max_tx_queues) {
3478 "Set queue rate limit:port %u: invalid queue id=%u\n",
3479 port_id, queue_idx);
3483 if (tx_rate > link.link_speed) {
3485 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3486 tx_rate, link.link_speed);
3490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3491 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3492 queue_idx, tx_rate));
3496 rte_eth_mirror_rule_set(uint16_t port_id,
3497 struct rte_eth_mirror_conf *mirror_conf,
3498 uint8_t rule_id, uint8_t on)
3500 struct rte_eth_dev *dev;
3502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3503 if (mirror_conf->rule_type == 0) {
3504 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3508 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3509 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3514 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3515 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3516 (mirror_conf->pool_mask == 0)) {
3518 "Invalid mirror pool, pool mask can not be 0\n");
3522 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3523 mirror_conf->vlan.vlan_mask == 0) {
3525 "Invalid vlan mask, vlan mask can not be 0\n");
3529 dev = &rte_eth_devices[port_id];
3530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3532 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3533 mirror_conf, rule_id, on));
3537 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3539 struct rte_eth_dev *dev;
3541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3543 dev = &rte_eth_devices[port_id];
3544 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3546 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3550 RTE_INIT(eth_dev_init_cb_lists)
3554 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3555 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3559 rte_eth_dev_callback_register(uint16_t port_id,
3560 enum rte_eth_event_type event,
3561 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3563 struct rte_eth_dev *dev;
3564 struct rte_eth_dev_callback *user_cb;
3565 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3571 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3572 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3576 if (port_id == RTE_ETH_ALL) {
3578 last_port = RTE_MAX_ETHPORTS - 1;
3580 next_port = last_port = port_id;
3583 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3586 dev = &rte_eth_devices[next_port];
3588 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3589 if (user_cb->cb_fn == cb_fn &&
3590 user_cb->cb_arg == cb_arg &&
3591 user_cb->event == event) {
3596 /* create a new callback. */
3597 if (user_cb == NULL) {
3598 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3599 sizeof(struct rte_eth_dev_callback), 0);
3600 if (user_cb != NULL) {
3601 user_cb->cb_fn = cb_fn;
3602 user_cb->cb_arg = cb_arg;
3603 user_cb->event = event;
3604 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3607 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3608 rte_eth_dev_callback_unregister(port_id, event,
3614 } while (++next_port <= last_port);
3616 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3621 rte_eth_dev_callback_unregister(uint16_t port_id,
3622 enum rte_eth_event_type event,
3623 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3626 struct rte_eth_dev *dev;
3627 struct rte_eth_dev_callback *cb, *next;
3628 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3634 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3635 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3639 if (port_id == RTE_ETH_ALL) {
3641 last_port = RTE_MAX_ETHPORTS - 1;
3643 next_port = last_port = port_id;
3646 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3649 dev = &rte_eth_devices[next_port];
3651 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3654 next = TAILQ_NEXT(cb, next);
3656 if (cb->cb_fn != cb_fn || cb->event != event ||
3657 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3661 * if this callback is not executing right now,
3664 if (cb->active == 0) {
3665 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3671 } while (++next_port <= last_port);
3673 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3678 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3679 enum rte_eth_event_type event, void *ret_param)
3681 struct rte_eth_dev_callback *cb_lst;
3682 struct rte_eth_dev_callback dev_cb;
3685 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3686 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3687 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3691 if (ret_param != NULL)
3692 dev_cb.ret_param = ret_param;
3694 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3695 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3696 dev_cb.cb_arg, dev_cb.ret_param);
3697 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3700 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3705 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3710 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3712 dev->state = RTE_ETH_DEV_ATTACHED;
3716 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3719 struct rte_eth_dev *dev;
3720 struct rte_intr_handle *intr_handle;
3724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3726 dev = &rte_eth_devices[port_id];
3728 if (!dev->intr_handle) {
3729 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3733 intr_handle = dev->intr_handle;
3734 if (!intr_handle->intr_vec) {
3735 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3739 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3740 vec = intr_handle->intr_vec[qid];
3741 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3742 if (rc && rc != -EEXIST) {
3744 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3745 port_id, qid, op, epfd, vec);
3753 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3755 struct rte_intr_handle *intr_handle;
3756 struct rte_eth_dev *dev;
3757 unsigned int efd_idx;
3761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3763 dev = &rte_eth_devices[port_id];
3765 if (queue_id >= dev->data->nb_rx_queues) {
3766 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3770 if (!dev->intr_handle) {
3771 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3775 intr_handle = dev->intr_handle;
3776 if (!intr_handle->intr_vec) {
3777 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3781 vec = intr_handle->intr_vec[queue_id];
3782 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3783 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3784 fd = intr_handle->efds[efd_idx];
3789 const struct rte_memzone *
3790 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3791 uint16_t queue_id, size_t size, unsigned align,
3794 char z_name[RTE_MEMZONE_NAMESIZE];
3795 const struct rte_memzone *mz;
3798 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3799 dev->data->port_id, queue_id, ring_name);
3800 if (rc >= RTE_MEMZONE_NAMESIZE) {
3801 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3802 rte_errno = ENAMETOOLONG;
3806 mz = rte_memzone_lookup(z_name);
3810 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3811 RTE_MEMZONE_IOVA_CONTIG, align);
3815 rte_eth_dev_create(struct rte_device *device, const char *name,
3816 size_t priv_data_size,
3817 ethdev_bus_specific_init ethdev_bus_specific_init,
3818 void *bus_init_params,
3819 ethdev_init_t ethdev_init, void *init_params)
3821 struct rte_eth_dev *ethdev;
3824 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3826 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3827 ethdev = rte_eth_dev_allocate(name);
3831 if (priv_data_size) {
3832 ethdev->data->dev_private = rte_zmalloc_socket(
3833 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3836 if (!ethdev->data->dev_private) {
3837 RTE_LOG(ERR, EAL, "failed to allocate private data");
3843 ethdev = rte_eth_dev_attach_secondary(name);
3845 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3846 "ethdev doesn't exist");
3851 ethdev->device = device;
3853 if (ethdev_bus_specific_init) {
3854 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3857 "ethdev bus specific initialisation failed");
3862 retval = ethdev_init(ethdev, init_params);
3864 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3868 rte_eth_dev_probing_finish(ethdev);
3873 rte_eth_dev_release_port(ethdev);
3878 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3879 ethdev_uninit_t ethdev_uninit)
3883 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3887 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3889 ret = ethdev_uninit(ethdev);
3893 return rte_eth_dev_release_port(ethdev);
3897 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3898 int epfd, int op, void *data)
3901 struct rte_eth_dev *dev;
3902 struct rte_intr_handle *intr_handle;
3905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3907 dev = &rte_eth_devices[port_id];
3908 if (queue_id >= dev->data->nb_rx_queues) {
3909 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3913 if (!dev->intr_handle) {
3914 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3918 intr_handle = dev->intr_handle;
3919 if (!intr_handle->intr_vec) {
3920 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3924 vec = intr_handle->intr_vec[queue_id];
3925 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3926 if (rc && rc != -EEXIST) {
3928 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3929 port_id, queue_id, op, epfd, vec);
3937 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3940 struct rte_eth_dev *dev;
3942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3944 dev = &rte_eth_devices[port_id];
3946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3947 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3952 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3955 struct rte_eth_dev *dev;
3957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3959 dev = &rte_eth_devices[port_id];
3961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3962 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3968 rte_eth_dev_filter_supported(uint16_t port_id,
3969 enum rte_filter_type filter_type)
3971 struct rte_eth_dev *dev;
3973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3975 dev = &rte_eth_devices[port_id];
3976 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3977 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3978 RTE_ETH_FILTER_NOP, NULL);
3982 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3983 enum rte_filter_op filter_op, void *arg)
3985 struct rte_eth_dev *dev;
3987 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3989 dev = &rte_eth_devices[port_id];
3990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3991 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3995 const struct rte_eth_rxtx_callback *
3996 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3997 rte_rx_callback_fn fn, void *user_param)
3999 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4000 rte_errno = ENOTSUP;
4003 /* check input parameters */
4004 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4005 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4009 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4017 cb->param = user_param;
4019 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4020 /* Add the callbacks in fifo order. */
4021 struct rte_eth_rxtx_callback *tail =
4022 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4025 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4032 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4037 const struct rte_eth_rxtx_callback *
4038 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4039 rte_rx_callback_fn fn, void *user_param)
4041 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4042 rte_errno = ENOTSUP;
4045 /* check input parameters */
4046 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4047 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4052 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4060 cb->param = user_param;
4062 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4063 /* Add the callbacks at fisrt position*/
4064 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4066 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4067 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4072 const struct rte_eth_rxtx_callback *
4073 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4074 rte_tx_callback_fn fn, void *user_param)
4076 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4077 rte_errno = ENOTSUP;
4080 /* check input parameters */
4081 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4082 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4087 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4095 cb->param = user_param;
4097 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4098 /* Add the callbacks in fifo order. */
4099 struct rte_eth_rxtx_callback *tail =
4100 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4103 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4110 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4116 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4117 const struct rte_eth_rxtx_callback *user_cb)
4119 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4122 /* Check input parameters. */
4123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4124 if (user_cb == NULL ||
4125 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4128 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4129 struct rte_eth_rxtx_callback *cb;
4130 struct rte_eth_rxtx_callback **prev_cb;
4133 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4134 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4135 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4137 if (cb == user_cb) {
4138 /* Remove the user cb from the callback list. */
4139 *prev_cb = cb->next;
4144 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4150 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4151 const struct rte_eth_rxtx_callback *user_cb)
4153 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4156 /* Check input parameters. */
4157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4158 if (user_cb == NULL ||
4159 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4162 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4164 struct rte_eth_rxtx_callback *cb;
4165 struct rte_eth_rxtx_callback **prev_cb;
4167 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4168 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4169 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4171 if (cb == user_cb) {
4172 /* Remove the user cb from the callback list. */
4173 *prev_cb = cb->next;
4178 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4184 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4185 struct rte_eth_rxq_info *qinfo)
4187 struct rte_eth_dev *dev;
4189 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4194 dev = &rte_eth_devices[port_id];
4195 if (queue_id >= dev->data->nb_rx_queues) {
4196 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4202 memset(qinfo, 0, sizeof(*qinfo));
4203 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4208 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4209 struct rte_eth_txq_info *qinfo)
4211 struct rte_eth_dev *dev;
4213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4218 dev = &rte_eth_devices[port_id];
4219 if (queue_id >= dev->data->nb_tx_queues) {
4220 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4226 memset(qinfo, 0, sizeof(*qinfo));
4227 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4233 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4234 struct rte_eth_burst_mode *mode)
4236 struct rte_eth_dev *dev;
4238 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4243 dev = &rte_eth_devices[port_id];
4245 if (queue_id >= dev->data->nb_rx_queues) {
4246 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4251 memset(mode, 0, sizeof(*mode));
4252 return eth_err(port_id,
4253 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4257 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4258 struct rte_eth_burst_mode *mode)
4260 struct rte_eth_dev *dev;
4262 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4267 dev = &rte_eth_devices[port_id];
4269 if (queue_id >= dev->data->nb_tx_queues) {
4270 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4275 memset(mode, 0, sizeof(*mode));
4276 return eth_err(port_id,
4277 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4281 rte_eth_burst_mode_option_name(uint64_t option)
4283 const char *name = "";
4286 for (i = 0; i < RTE_DIM(rte_burst_option_names); ++i) {
4287 if (option == rte_burst_option_names[i].option) {
4288 name = rte_burst_option_names[i].name;
4297 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4298 struct rte_ether_addr *mc_addr_set,
4299 uint32_t nb_mc_addr)
4301 struct rte_eth_dev *dev;
4303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4305 dev = &rte_eth_devices[port_id];
4306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4307 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4308 mc_addr_set, nb_mc_addr));
4312 rte_eth_timesync_enable(uint16_t port_id)
4314 struct rte_eth_dev *dev;
4316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4317 dev = &rte_eth_devices[port_id];
4319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4320 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4324 rte_eth_timesync_disable(uint16_t port_id)
4326 struct rte_eth_dev *dev;
4328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4329 dev = &rte_eth_devices[port_id];
4331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4332 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4336 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4339 struct rte_eth_dev *dev;
4341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4342 dev = &rte_eth_devices[port_id];
4344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4345 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4346 (dev, timestamp, flags));
4350 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4351 struct timespec *timestamp)
4353 struct rte_eth_dev *dev;
4355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4356 dev = &rte_eth_devices[port_id];
4358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4359 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4364 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4366 struct rte_eth_dev *dev;
4368 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4369 dev = &rte_eth_devices[port_id];
4371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4372 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4377 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4379 struct rte_eth_dev *dev;
4381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4382 dev = &rte_eth_devices[port_id];
4384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4385 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4390 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4392 struct rte_eth_dev *dev;
4394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4395 dev = &rte_eth_devices[port_id];
4397 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4398 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4403 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4405 struct rte_eth_dev *dev;
4407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4408 dev = &rte_eth_devices[port_id];
4410 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4411 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4415 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4417 struct rte_eth_dev *dev;
4419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4421 dev = &rte_eth_devices[port_id];
4422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4423 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4427 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4429 struct rte_eth_dev *dev;
4431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4433 dev = &rte_eth_devices[port_id];
4434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4435 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4439 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4441 struct rte_eth_dev *dev;
4443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4445 dev = &rte_eth_devices[port_id];
4446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4447 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4451 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4453 struct rte_eth_dev *dev;
4455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4457 dev = &rte_eth_devices[port_id];
4458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4459 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4463 rte_eth_dev_get_module_info(uint16_t port_id,
4464 struct rte_eth_dev_module_info *modinfo)
4466 struct rte_eth_dev *dev;
4468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4470 dev = &rte_eth_devices[port_id];
4471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4472 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4476 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4477 struct rte_dev_eeprom_info *info)
4479 struct rte_eth_dev *dev;
4481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4483 dev = &rte_eth_devices[port_id];
4484 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4485 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4489 rte_eth_dev_get_dcb_info(uint16_t port_id,
4490 struct rte_eth_dcb_info *dcb_info)
4492 struct rte_eth_dev *dev;
4494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4496 dev = &rte_eth_devices[port_id];
4497 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4500 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4504 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4505 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4507 struct rte_eth_dev *dev;
4509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4510 if (l2_tunnel == NULL) {
4511 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4515 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4516 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4520 dev = &rte_eth_devices[port_id];
4521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4523 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4528 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4529 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4533 struct rte_eth_dev *dev;
4535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4537 if (l2_tunnel == NULL) {
4538 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4542 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4543 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4548 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4552 dev = &rte_eth_devices[port_id];
4553 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4555 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4556 l2_tunnel, mask, en));
4560 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4561 const struct rte_eth_desc_lim *desc_lim)
4563 if (desc_lim->nb_align != 0)
4564 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4566 if (desc_lim->nb_max != 0)
4567 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4569 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4573 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4574 uint16_t *nb_rx_desc,
4575 uint16_t *nb_tx_desc)
4577 struct rte_eth_dev_info dev_info;
4580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4582 ret = rte_eth_dev_info_get(port_id, &dev_info);
4586 if (nb_rx_desc != NULL)
4587 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4589 if (nb_tx_desc != NULL)
4590 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4596 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4598 struct rte_eth_dev *dev;
4600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4605 dev = &rte_eth_devices[port_id];
4607 if (*dev->dev_ops->pool_ops_supported == NULL)
4608 return 1; /* all pools are supported */
4610 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4614 * A set of values to describe the possible states of a switch domain.
4616 enum rte_eth_switch_domain_state {
4617 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4618 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4622 * Array of switch domains available for allocation. Array is sized to
4623 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4624 * ethdev ports in a single process.
4626 static struct rte_eth_dev_switch {
4627 enum rte_eth_switch_domain_state state;
4628 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4631 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4635 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4637 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4638 i < RTE_MAX_ETHPORTS; i++) {
4639 if (rte_eth_switch_domains[i].state ==
4640 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4641 rte_eth_switch_domains[i].state =
4642 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4652 rte_eth_switch_domain_free(uint16_t domain_id)
4654 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4655 domain_id >= RTE_MAX_ETHPORTS)
4658 if (rte_eth_switch_domains[domain_id].state !=
4659 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4662 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4668 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4671 struct rte_kvargs_pair *pair;
4674 arglist->str = strdup(str_in);
4675 if (arglist->str == NULL)
4678 letter = arglist->str;
4681 pair = &arglist->pairs[0];
4684 case 0: /* Initial */
4687 else if (*letter == '\0')
4694 case 1: /* Parsing key */
4695 if (*letter == '=') {
4697 pair->value = letter + 1;
4699 } else if (*letter == ',' || *letter == '\0')
4704 case 2: /* Parsing value */
4707 else if (*letter == ',') {
4710 pair = &arglist->pairs[arglist->count];
4712 } else if (*letter == '\0') {
4715 pair = &arglist->pairs[arglist->count];
4720 case 3: /* Parsing list */
4723 else if (*letter == '\0')
4732 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4734 struct rte_kvargs args;
4735 struct rte_kvargs_pair *pair;
4739 memset(eth_da, 0, sizeof(*eth_da));
4741 result = rte_eth_devargs_tokenise(&args, dargs);
4745 for (i = 0; i < args.count; i++) {
4746 pair = &args.pairs[i];
4747 if (strcmp("representor", pair->key) == 0) {
4748 result = rte_eth_devargs_parse_list(pair->value,
4749 rte_eth_devargs_parse_representor_ports,
4763 RTE_INIT(ethdev_init_log)
4765 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4766 if (rte_eth_dev_logtype >= 0)
4767 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);