1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
191 struct rte_devargs devargs = {.args = NULL};
192 const char *bus_param_key;
193 char *bus_str = NULL;
194 char *cls_str = NULL;
197 memset(iter, 0, sizeof(*iter));
200 * The devargs string may use various syntaxes:
201 * - 0000:08:00.0,representor=[1-3]
202 * - pci:0000:06:00.0,representor=[0,5]
203 * - class=eth,mac=00:11:22:33:44:55
204 * A new syntax is in development (not yet supported):
205 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
209 * Handle pure class filter (i.e. without any bus-level argument),
210 * from future new syntax.
211 * rte_devargs_parse() is not yet supporting the new syntax,
212 * that's why this simple case is temporarily parsed here.
214 #define iter_anybus_str "class=eth,"
215 if (strncmp(devargs_str, iter_anybus_str,
216 strlen(iter_anybus_str)) == 0) {
217 iter->cls_str = devargs_str + strlen(iter_anybus_str);
221 /* Split bus, device and parameters. */
222 ret = rte_devargs_parse(&devargs, devargs_str);
227 * Assume parameters of old syntax can match only at ethdev level.
228 * Extra parameters will be ignored, thanks to "+" prefix.
230 str_size = strlen(devargs.args) + 2;
231 cls_str = malloc(str_size);
232 if (cls_str == NULL) {
236 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
237 if (ret != str_size - 1) {
241 iter->cls_str = cls_str;
242 free(devargs.args); /* allocated by rte_devargs_parse() */
245 iter->bus = devargs.bus;
246 if (iter->bus->dev_iterate == NULL) {
251 /* Convert bus args to new syntax for use with new API dev_iterate. */
252 if (strcmp(iter->bus->name, "vdev") == 0) {
253 bus_param_key = "name";
254 } else if (strcmp(iter->bus->name, "pci") == 0) {
255 bus_param_key = "addr";
260 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
261 bus_str = malloc(str_size);
262 if (bus_str == NULL) {
266 ret = snprintf(bus_str, str_size, "%s=%s",
267 bus_param_key, devargs.name);
268 if (ret != str_size - 1) {
272 iter->bus_str = bus_str;
275 iter->cls = rte_class_find_by_name("eth");
280 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
289 rte_eth_iterator_next(struct rte_dev_iterator *iter)
291 if (iter->cls == NULL) /* invalid ethdev iterator */
292 return RTE_MAX_ETHPORTS;
294 do { /* loop to try all matching rte_device */
295 /* If not pure ethdev filter and */
296 if (iter->bus != NULL &&
297 /* not in middle of rte_eth_dev iteration, */
298 iter->class_device == NULL) {
299 /* get next rte_device to try. */
300 iter->device = iter->bus->dev_iterate(
301 iter->device, iter->bus_str, iter);
302 if (iter->device == NULL)
303 break; /* no more rte_device candidate */
305 /* A device is matching bus part, need to check ethdev part. */
306 iter->class_device = iter->cls->dev_iterate(
307 iter->class_device, iter->cls_str, iter);
308 if (iter->class_device != NULL)
309 return eth_dev_to_id(iter->class_device); /* match */
310 } while (iter->bus != NULL); /* need to try next rte_device */
312 /* No more ethdev port to iterate. */
313 rte_eth_iterator_cleanup(iter);
314 return RTE_MAX_ETHPORTS;
318 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
320 if (iter->bus_str == NULL)
321 return; /* nothing to free in pure class filter */
322 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
323 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
324 memset(iter, 0, sizeof(*iter));
328 rte_eth_find_next(uint16_t port_id)
330 while (port_id < RTE_MAX_ETHPORTS &&
331 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
334 if (port_id >= RTE_MAX_ETHPORTS)
335 return RTE_MAX_ETHPORTS;
341 * Macro to iterate over all valid ports for internal usage.
342 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
344 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
345 for (port_id = rte_eth_find_next(0); \
346 port_id < RTE_MAX_ETHPORTS; \
347 port_id = rte_eth_find_next(port_id + 1))
350 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
352 port_id = rte_eth_find_next(port_id);
353 while (port_id < RTE_MAX_ETHPORTS &&
354 rte_eth_devices[port_id].device != parent)
355 port_id = rte_eth_find_next(port_id + 1);
361 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
363 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
364 return rte_eth_find_next_of(port_id,
365 rte_eth_devices[ref_port_id].device);
369 rte_eth_dev_shared_data_prepare(void)
371 const unsigned flags = 0;
372 const struct rte_memzone *mz;
374 rte_spinlock_lock(&rte_eth_shared_data_lock);
376 if (rte_eth_dev_shared_data == NULL) {
377 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
378 /* Allocate port data and ownership shared memory. */
379 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
380 sizeof(*rte_eth_dev_shared_data),
381 rte_socket_id(), flags);
383 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
385 rte_panic("Cannot allocate ethdev shared data\n");
387 rte_eth_dev_shared_data = mz->addr;
388 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
389 rte_eth_dev_shared_data->next_owner_id =
390 RTE_ETH_DEV_NO_OWNER + 1;
391 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
392 memset(rte_eth_dev_shared_data->data, 0,
393 sizeof(rte_eth_dev_shared_data->data));
397 rte_spinlock_unlock(&rte_eth_shared_data_lock);
401 is_allocated(const struct rte_eth_dev *ethdev)
403 return ethdev->data->name[0] != '\0';
406 static struct rte_eth_dev *
407 _rte_eth_dev_allocated(const char *name)
411 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
412 if (rte_eth_devices[i].data != NULL &&
413 strcmp(rte_eth_devices[i].data->name, name) == 0)
414 return &rte_eth_devices[i];
420 rte_eth_dev_allocated(const char *name)
422 struct rte_eth_dev *ethdev;
424 rte_eth_dev_shared_data_prepare();
426 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
428 ethdev = _rte_eth_dev_allocated(name);
430 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
436 rte_eth_dev_find_free_port(void)
440 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 /* Using shared name field to find a free port. */
442 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
443 RTE_ASSERT(rte_eth_devices[i].state ==
448 return RTE_MAX_ETHPORTS;
451 static struct rte_eth_dev *
452 eth_dev_get(uint16_t port_id)
454 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
456 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
462 rte_eth_dev_allocate(const char *name)
465 struct rte_eth_dev *eth_dev = NULL;
468 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
470 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
474 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
475 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
479 rte_eth_dev_shared_data_prepare();
481 /* Synchronize port creation between primary and secondary threads. */
482 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484 if (_rte_eth_dev_allocated(name) != NULL) {
486 "Ethernet device with name %s already allocated\n",
491 port_id = rte_eth_dev_find_free_port();
492 if (port_id == RTE_MAX_ETHPORTS) {
494 "Reached maximum number of Ethernet ports\n");
498 eth_dev = eth_dev_get(port_id);
499 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
500 eth_dev->data->port_id = port_id;
501 eth_dev->data->mtu = RTE_ETHER_MTU;
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
510 * Attach to a port already registered by the primary process, which
511 * makes sure that the same device would have the same port id both
512 * in the primary and secondary process.
515 rte_eth_dev_attach_secondary(const char *name)
518 struct rte_eth_dev *eth_dev = NULL;
520 rte_eth_dev_shared_data_prepare();
522 /* Synchronize port attachment to primary port creation and release. */
523 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
525 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
526 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
529 if (i == RTE_MAX_ETHPORTS) {
531 "Device %s is not driven by the primary process\n",
534 eth_dev = eth_dev_get(i);
535 RTE_ASSERT(eth_dev->data->port_id == i);
538 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
543 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
548 rte_eth_dev_shared_data_prepare();
550 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
551 _rte_eth_dev_callback_process(eth_dev,
552 RTE_ETH_EVENT_DESTROY, NULL);
554 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
556 eth_dev->state = RTE_ETH_DEV_UNUSED;
558 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
559 rte_free(eth_dev->data->rx_queues);
560 rte_free(eth_dev->data->tx_queues);
561 rte_free(eth_dev->data->mac_addrs);
562 rte_free(eth_dev->data->hash_mac_addrs);
563 rte_free(eth_dev->data->dev_private);
564 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
567 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
573 rte_eth_dev_is_valid_port(uint16_t port_id)
575 if (port_id >= RTE_MAX_ETHPORTS ||
576 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
583 rte_eth_is_valid_owner_id(uint64_t owner_id)
585 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
586 rte_eth_dev_shared_data->next_owner_id <= owner_id)
592 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
594 port_id = rte_eth_find_next(port_id);
595 while (port_id < RTE_MAX_ETHPORTS &&
596 rte_eth_devices[port_id].data->owner.id != owner_id)
597 port_id = rte_eth_find_next(port_id + 1);
603 rte_eth_dev_owner_new(uint64_t *owner_id)
605 rte_eth_dev_shared_data_prepare();
607 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
609 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
611 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
616 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
617 const struct rte_eth_dev_owner *new_owner)
619 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
620 struct rte_eth_dev_owner *port_owner;
622 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
623 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
628 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
629 !rte_eth_is_valid_owner_id(old_owner_id)) {
631 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
632 old_owner_id, new_owner->id);
636 port_owner = &rte_eth_devices[port_id].data->owner;
637 if (port_owner->id != old_owner_id) {
639 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
640 port_id, port_owner->name, port_owner->id);
644 /* can not truncate (same structure) */
645 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
647 port_owner->id = new_owner->id;
649 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
650 port_id, new_owner->name, new_owner->id);
656 rte_eth_dev_owner_set(const uint16_t port_id,
657 const struct rte_eth_dev_owner *owner)
661 rte_eth_dev_shared_data_prepare();
663 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
665 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
667 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
672 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
674 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
675 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
678 rte_eth_dev_shared_data_prepare();
680 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
682 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
684 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
689 rte_eth_dev_owner_delete(const uint64_t owner_id)
694 rte_eth_dev_shared_data_prepare();
696 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
698 if (rte_eth_is_valid_owner_id(owner_id)) {
699 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
700 if (rte_eth_devices[port_id].data->owner.id == owner_id)
701 memset(&rte_eth_devices[port_id].data->owner, 0,
702 sizeof(struct rte_eth_dev_owner));
703 RTE_ETHDEV_LOG(NOTICE,
704 "All port owners owned by %016"PRIx64" identifier have removed\n",
708 "Invalid owner id=%016"PRIx64"\n",
713 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
719 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
722 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
724 rte_eth_dev_shared_data_prepare();
726 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
728 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
729 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
733 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
736 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
741 rte_eth_dev_socket_id(uint16_t port_id)
743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
744 return rte_eth_devices[port_id].data->numa_node;
748 rte_eth_dev_get_sec_ctx(uint16_t port_id)
750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
751 return rte_eth_devices[port_id].security_ctx;
755 rte_eth_dev_count_avail(void)
762 RTE_ETH_FOREACH_DEV(p)
769 rte_eth_dev_count_total(void)
771 uint16_t port, count = 0;
773 RTE_ETH_FOREACH_VALID_DEV(port)
780 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
787 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
791 /* shouldn't check 'rte_eth_devices[i].data',
792 * because it might be overwritten by VDEV PMD */
793 tmp = rte_eth_dev_shared_data->data[port_id].name;
799 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
804 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
808 RTE_ETH_FOREACH_VALID_DEV(pid)
809 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
818 eth_err(uint16_t port_id, int ret)
822 if (rte_eth_dev_is_removed(port_id))
828 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
830 uint16_t old_nb_queues = dev->data->nb_rx_queues;
834 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
835 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
836 sizeof(dev->data->rx_queues[0]) * nb_queues,
837 RTE_CACHE_LINE_SIZE);
838 if (dev->data->rx_queues == NULL) {
839 dev->data->nb_rx_queues = 0;
842 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
845 rxq = dev->data->rx_queues;
847 for (i = nb_queues; i < old_nb_queues; i++)
848 (*dev->dev_ops->rx_queue_release)(rxq[i]);
849 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
850 RTE_CACHE_LINE_SIZE);
853 if (nb_queues > old_nb_queues) {
854 uint16_t new_qs = nb_queues - old_nb_queues;
856 memset(rxq + old_nb_queues, 0,
857 sizeof(rxq[0]) * new_qs);
860 dev->data->rx_queues = rxq;
862 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
865 rxq = dev->data->rx_queues;
867 for (i = nb_queues; i < old_nb_queues; i++)
868 (*dev->dev_ops->rx_queue_release)(rxq[i]);
870 rte_free(dev->data->rx_queues);
871 dev->data->rx_queues = NULL;
873 dev->data->nb_rx_queues = nb_queues;
878 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
880 struct rte_eth_dev *dev;
882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
884 dev = &rte_eth_devices[port_id];
885 if (!dev->data->dev_started) {
887 "Port %u must be started before start any queue\n",
892 if (rx_queue_id >= dev->data->nb_rx_queues) {
893 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
899 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
901 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
902 rx_queue_id, port_id);
906 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
908 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
909 rx_queue_id, port_id);
913 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
919 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
921 struct rte_eth_dev *dev;
923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
925 dev = &rte_eth_devices[port_id];
926 if (rx_queue_id >= dev->data->nb_rx_queues) {
927 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
933 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
935 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
936 rx_queue_id, port_id);
940 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
942 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
943 rx_queue_id, port_id);
947 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
952 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
959 if (!dev->data->dev_started) {
961 "Port %u must be started before start any queue\n",
966 if (tx_queue_id >= dev->data->nb_tx_queues) {
967 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
973 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
975 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
976 tx_queue_id, port_id);
980 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
982 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
983 tx_queue_id, port_id);
987 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
991 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
993 struct rte_eth_dev *dev;
995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
997 dev = &rte_eth_devices[port_id];
998 if (tx_queue_id >= dev->data->nb_tx_queues) {
999 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1005 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1006 RTE_ETHDEV_LOG(INFO,
1007 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1008 tx_queue_id, port_id);
1012 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1013 RTE_ETHDEV_LOG(INFO,
1014 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1015 tx_queue_id, port_id);
1019 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1024 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1026 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1030 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1031 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1032 sizeof(dev->data->tx_queues[0]) * nb_queues,
1033 RTE_CACHE_LINE_SIZE);
1034 if (dev->data->tx_queues == NULL) {
1035 dev->data->nb_tx_queues = 0;
1038 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1041 txq = dev->data->tx_queues;
1043 for (i = nb_queues; i < old_nb_queues; i++)
1044 (*dev->dev_ops->tx_queue_release)(txq[i]);
1045 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1046 RTE_CACHE_LINE_SIZE);
1049 if (nb_queues > old_nb_queues) {
1050 uint16_t new_qs = nb_queues - old_nb_queues;
1052 memset(txq + old_nb_queues, 0,
1053 sizeof(txq[0]) * new_qs);
1056 dev->data->tx_queues = txq;
1058 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1061 txq = dev->data->tx_queues;
1063 for (i = nb_queues; i < old_nb_queues; i++)
1064 (*dev->dev_ops->tx_queue_release)(txq[i]);
1066 rte_free(dev->data->tx_queues);
1067 dev->data->tx_queues = NULL;
1069 dev->data->nb_tx_queues = nb_queues;
1074 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1077 case ETH_SPEED_NUM_10M:
1078 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1079 case ETH_SPEED_NUM_100M:
1080 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1081 case ETH_SPEED_NUM_1G:
1082 return ETH_LINK_SPEED_1G;
1083 case ETH_SPEED_NUM_2_5G:
1084 return ETH_LINK_SPEED_2_5G;
1085 case ETH_SPEED_NUM_5G:
1086 return ETH_LINK_SPEED_5G;
1087 case ETH_SPEED_NUM_10G:
1088 return ETH_LINK_SPEED_10G;
1089 case ETH_SPEED_NUM_20G:
1090 return ETH_LINK_SPEED_20G;
1091 case ETH_SPEED_NUM_25G:
1092 return ETH_LINK_SPEED_25G;
1093 case ETH_SPEED_NUM_40G:
1094 return ETH_LINK_SPEED_40G;
1095 case ETH_SPEED_NUM_50G:
1096 return ETH_LINK_SPEED_50G;
1097 case ETH_SPEED_NUM_56G:
1098 return ETH_LINK_SPEED_56G;
1099 case ETH_SPEED_NUM_100G:
1100 return ETH_LINK_SPEED_100G;
1107 rte_eth_dev_rx_offload_name(uint64_t offload)
1109 const char *name = "UNKNOWN";
1112 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1113 if (offload == rte_rx_offload_names[i].offload) {
1114 name = rte_rx_offload_names[i].name;
1123 rte_eth_dev_tx_offload_name(uint64_t offload)
1125 const char *name = "UNKNOWN";
1128 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1129 if (offload == rte_tx_offload_names[i].offload) {
1130 name = rte_tx_offload_names[i].name;
1139 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1140 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1144 if (dev_info_size == 0) {
1145 if (config_size != max_rx_pkt_len) {
1146 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1147 " %u != %u is not allowed\n",
1148 port_id, config_size, max_rx_pkt_len);
1151 } else if (config_size > dev_info_size) {
1152 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1153 "> max allowed value %u\n", port_id, config_size,
1156 } else if (config_size < RTE_ETHER_MIN_LEN) {
1157 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1158 "< min allowed value %u\n", port_id, config_size,
1159 (unsigned int)RTE_ETHER_MIN_LEN);
1166 * Validate offloads that are requested through rte_eth_dev_configure against
1167 * the offloads successfuly set by the ethernet device.
1170 * The port identifier of the Ethernet device.
1171 * @param req_offloads
1172 * The offloads that have been requested through `rte_eth_dev_configure`.
1173 * @param set_offloads
1174 * The offloads successfuly set by the ethernet device.
1175 * @param offload_type
1176 * The offload type i.e. Rx/Tx string.
1177 * @param offload_name
1178 * The function that prints the offload name.
1180 * - (0) if validation successful.
1181 * - (-EINVAL) if requested offload has been silently disabled.
1185 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1186 uint64_t set_offloads, const char *offload_type,
1187 const char *(*offload_name)(uint64_t))
1189 uint64_t offloads_diff = req_offloads ^ set_offloads;
1193 while (offloads_diff != 0) {
1194 /* Check if any offload is requested but not enabled. */
1195 offload = 1ULL << __builtin_ctzll(offloads_diff);
1196 if (offload & req_offloads) {
1198 "Port %u failed to enable %s offload %s\n",
1199 port_id, offload_type, offload_name(offload));
1203 /* Chech if offload couldn't be disabled. */
1204 if (offload & set_offloads) {
1205 RTE_ETHDEV_LOG(DEBUG,
1206 "Port %u %s offload %s is not requested but enabled\n",
1207 port_id, offload_type, offload_name(offload));
1210 offloads_diff &= ~offload;
1217 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1218 const struct rte_eth_conf *dev_conf)
1220 struct rte_eth_dev *dev;
1221 struct rte_eth_dev_info dev_info;
1222 struct rte_eth_conf orig_conf;
1226 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1228 dev = &rte_eth_devices[port_id];
1230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1232 if (dev->data->dev_started) {
1234 "Port %u must be stopped to allow configuration\n",
1239 /* Store original config, as rollback required on failure */
1240 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1243 * Copy the dev_conf parameter into the dev structure.
1244 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1246 if (dev_conf != &dev->data->dev_conf)
1247 memcpy(&dev->data->dev_conf, dev_conf,
1248 sizeof(dev->data->dev_conf));
1250 ret = rte_eth_dev_info_get(port_id, &dev_info);
1254 /* If number of queues specified by application for both Rx and Tx is
1255 * zero, use driver preferred values. This cannot be done individually
1256 * as it is valid for either Tx or Rx (but not both) to be zero.
1257 * If driver does not provide any preferred valued, fall back on
1260 if (nb_rx_q == 0 && nb_tx_q == 0) {
1261 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1263 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1264 nb_tx_q = dev_info.default_txportconf.nb_queues;
1266 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1269 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1271 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1272 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1277 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1279 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1280 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1286 * Check that the numbers of RX and TX queues are not greater
1287 * than the maximum number of RX and TX queues supported by the
1288 * configured device.
1290 if (nb_rx_q > dev_info.max_rx_queues) {
1291 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1292 port_id, nb_rx_q, dev_info.max_rx_queues);
1297 if (nb_tx_q > dev_info.max_tx_queues) {
1298 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1299 port_id, nb_tx_q, dev_info.max_tx_queues);
1304 /* Check that the device supports requested interrupts */
1305 if ((dev_conf->intr_conf.lsc == 1) &&
1306 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1307 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1308 dev->device->driver->name);
1312 if ((dev_conf->intr_conf.rmv == 1) &&
1313 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1314 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1315 dev->device->driver->name);
1321 * If jumbo frames are enabled, check that the maximum RX packet
1322 * length is supported by the configured device.
1324 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1325 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1327 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1328 port_id, dev_conf->rxmode.max_rx_pkt_len,
1329 dev_info.max_rx_pktlen);
1332 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1334 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1335 port_id, dev_conf->rxmode.max_rx_pkt_len,
1336 (unsigned int)RTE_ETHER_MIN_LEN);
1341 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1342 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1343 /* Use default value */
1344 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1349 * If LRO is enabled, check that the maximum aggregated packet
1350 * size is supported by the configured device.
1352 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1353 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1354 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1355 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1356 ret = check_lro_pkt_size(port_id,
1357 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1358 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1359 dev_info.max_lro_pkt_size);
1364 /* Any requested offloading must be within its device capabilities */
1365 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1366 dev_conf->rxmode.offloads) {
1368 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1369 "capabilities 0x%"PRIx64" in %s()\n",
1370 port_id, dev_conf->rxmode.offloads,
1371 dev_info.rx_offload_capa,
1376 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1377 dev_conf->txmode.offloads) {
1379 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1380 "capabilities 0x%"PRIx64" in %s()\n",
1381 port_id, dev_conf->txmode.offloads,
1382 dev_info.tx_offload_capa,
1388 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1389 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1391 /* Check that device supports requested rss hash functions. */
1392 if ((dev_info.flow_type_rss_offloads |
1393 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1394 dev_info.flow_type_rss_offloads) {
1396 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1397 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1398 dev_info.flow_type_rss_offloads);
1403 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1404 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1405 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1407 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1409 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1415 * Setup new number of RX/TX queues and reconfigure device.
1417 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1420 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1426 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1429 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1431 rte_eth_dev_rx_queue_config(dev, 0);
1436 diag = (*dev->dev_ops->dev_configure)(dev);
1438 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1440 ret = eth_err(port_id, diag);
1444 /* Initialize Rx profiling if enabled at compilation time. */
1445 diag = __rte_eth_dev_profile_init(port_id, dev);
1447 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1449 ret = eth_err(port_id, diag);
1453 /* Validate Rx offloads. */
1454 diag = validate_offloads(port_id,
1455 dev_conf->rxmode.offloads,
1456 dev->data->dev_conf.rxmode.offloads, "Rx",
1457 rte_eth_dev_rx_offload_name);
1463 /* Validate Tx offloads. */
1464 diag = validate_offloads(port_id,
1465 dev_conf->txmode.offloads,
1466 dev->data->dev_conf.txmode.offloads, "Tx",
1467 rte_eth_dev_tx_offload_name);
1475 rte_eth_dev_rx_queue_config(dev, 0);
1476 rte_eth_dev_tx_queue_config(dev, 0);
1478 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1484 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1486 if (dev->data->dev_started) {
1487 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1488 dev->data->port_id);
1492 rte_eth_dev_rx_queue_config(dev, 0);
1493 rte_eth_dev_tx_queue_config(dev, 0);
1495 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1499 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1500 struct rte_eth_dev_info *dev_info)
1502 struct rte_ether_addr *addr;
1507 /* replay MAC address configuration including default MAC */
1508 addr = &dev->data->mac_addrs[0];
1509 if (*dev->dev_ops->mac_addr_set != NULL)
1510 (*dev->dev_ops->mac_addr_set)(dev, addr);
1511 else if (*dev->dev_ops->mac_addr_add != NULL)
1512 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1514 if (*dev->dev_ops->mac_addr_add != NULL) {
1515 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1516 addr = &dev->data->mac_addrs[i];
1518 /* skip zero address */
1519 if (rte_is_zero_ether_addr(addr))
1523 pool_mask = dev->data->mac_pool_sel[i];
1526 if (pool_mask & 1ULL)
1527 (*dev->dev_ops->mac_addr_add)(dev,
1531 } while (pool_mask);
1537 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1538 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1542 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1543 rte_eth_dev_mac_restore(dev, dev_info);
1545 /* replay promiscuous configuration */
1547 * use callbacks directly since we don't need port_id check and
1548 * would like to bypass the same value set
1550 if (rte_eth_promiscuous_get(port_id) == 1 &&
1551 *dev->dev_ops->promiscuous_enable != NULL) {
1552 ret = eth_err(port_id,
1553 (*dev->dev_ops->promiscuous_enable)(dev));
1554 if (ret != 0 && ret != -ENOTSUP) {
1556 "Failed to enable promiscuous mode for device (port %u): %s\n",
1557 port_id, rte_strerror(-ret));
1560 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1561 *dev->dev_ops->promiscuous_disable != NULL) {
1562 ret = eth_err(port_id,
1563 (*dev->dev_ops->promiscuous_disable)(dev));
1564 if (ret != 0 && ret != -ENOTSUP) {
1566 "Failed to disable promiscuous mode for device (port %u): %s\n",
1567 port_id, rte_strerror(-ret));
1572 /* replay all multicast configuration */
1574 * use callbacks directly since we don't need port_id check and
1575 * would like to bypass the same value set
1577 if (rte_eth_allmulticast_get(port_id) == 1 &&
1578 *dev->dev_ops->allmulticast_enable != NULL) {
1579 ret = eth_err(port_id,
1580 (*dev->dev_ops->allmulticast_enable)(dev));
1581 if (ret != 0 && ret != -ENOTSUP) {
1583 "Failed to enable allmulticast mode for device (port %u): %s\n",
1584 port_id, rte_strerror(-ret));
1587 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1588 *dev->dev_ops->allmulticast_disable != NULL) {
1589 ret = eth_err(port_id,
1590 (*dev->dev_ops->allmulticast_disable)(dev));
1591 if (ret != 0 && ret != -ENOTSUP) {
1593 "Failed to disable allmulticast mode for device (port %u): %s\n",
1594 port_id, rte_strerror(-ret));
1603 rte_eth_dev_start(uint16_t port_id)
1605 struct rte_eth_dev *dev;
1606 struct rte_eth_dev_info dev_info;
1610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1612 dev = &rte_eth_devices[port_id];
1614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1616 if (dev->data->dev_started != 0) {
1617 RTE_ETHDEV_LOG(INFO,
1618 "Device with port_id=%"PRIu16" already started\n",
1623 ret = rte_eth_dev_info_get(port_id, &dev_info);
1627 /* Lets restore MAC now if device does not support live change */
1628 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1629 rte_eth_dev_mac_restore(dev, &dev_info);
1631 diag = (*dev->dev_ops->dev_start)(dev);
1633 dev->data->dev_started = 1;
1635 return eth_err(port_id, diag);
1637 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1640 "Error during restoring configuration for device (port %u): %s\n",
1641 port_id, rte_strerror(-ret));
1642 rte_eth_dev_stop(port_id);
1646 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1648 (*dev->dev_ops->link_update)(dev, 0);
1654 rte_eth_dev_stop(uint16_t port_id)
1656 struct rte_eth_dev *dev;
1658 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1659 dev = &rte_eth_devices[port_id];
1661 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1663 if (dev->data->dev_started == 0) {
1664 RTE_ETHDEV_LOG(INFO,
1665 "Device with port_id=%"PRIu16" already stopped\n",
1670 dev->data->dev_started = 0;
1671 (*dev->dev_ops->dev_stop)(dev);
1675 rte_eth_dev_set_link_up(uint16_t port_id)
1677 struct rte_eth_dev *dev;
1679 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1681 dev = &rte_eth_devices[port_id];
1683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1684 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1688 rte_eth_dev_set_link_down(uint16_t port_id)
1690 struct rte_eth_dev *dev;
1692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1694 dev = &rte_eth_devices[port_id];
1696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1697 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1701 rte_eth_dev_close(uint16_t port_id)
1703 struct rte_eth_dev *dev;
1705 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1706 dev = &rte_eth_devices[port_id];
1708 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1709 dev->data->dev_started = 0;
1710 (*dev->dev_ops->dev_close)(dev);
1712 /* check behaviour flag - temporary for PMD migration */
1713 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1714 /* new behaviour: send event + reset state + free all data */
1715 rte_eth_dev_release_port(dev);
1718 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1719 "The driver %s should migrate to the new behaviour.\n",
1720 dev->device->driver->name);
1721 /* old behaviour: only free queue arrays */
1722 dev->data->nb_rx_queues = 0;
1723 rte_free(dev->data->rx_queues);
1724 dev->data->rx_queues = NULL;
1725 dev->data->nb_tx_queues = 0;
1726 rte_free(dev->data->tx_queues);
1727 dev->data->tx_queues = NULL;
1731 rte_eth_dev_reset(uint16_t port_id)
1733 struct rte_eth_dev *dev;
1736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1737 dev = &rte_eth_devices[port_id];
1739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1741 rte_eth_dev_stop(port_id);
1742 ret = dev->dev_ops->dev_reset(dev);
1744 return eth_err(port_id, ret);
1748 rte_eth_dev_is_removed(uint16_t port_id)
1750 struct rte_eth_dev *dev;
1753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1755 dev = &rte_eth_devices[port_id];
1757 if (dev->state == RTE_ETH_DEV_REMOVED)
1760 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1762 ret = dev->dev_ops->is_removed(dev);
1764 /* Device is physically removed. */
1765 dev->state = RTE_ETH_DEV_REMOVED;
1771 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1772 uint16_t nb_rx_desc, unsigned int socket_id,
1773 const struct rte_eth_rxconf *rx_conf,
1774 struct rte_mempool *mp)
1777 uint32_t mbp_buf_size;
1778 struct rte_eth_dev *dev;
1779 struct rte_eth_dev_info dev_info;
1780 struct rte_eth_rxconf local_conf;
1783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1785 dev = &rte_eth_devices[port_id];
1786 if (rx_queue_id >= dev->data->nb_rx_queues) {
1787 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1792 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1799 * Check the size of the mbuf data buffer.
1800 * This value must be provided in the private data of the memory pool.
1801 * First check that the memory pool has a valid private data.
1803 ret = rte_eth_dev_info_get(port_id, &dev_info);
1807 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1808 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1809 mp->name, (int)mp->private_data_size,
1810 (int)sizeof(struct rte_pktmbuf_pool_private));
1813 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1815 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1817 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1818 mp->name, (int)mbp_buf_size,
1819 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1820 (int)RTE_PKTMBUF_HEADROOM,
1821 (int)dev_info.min_rx_bufsize);
1825 /* Use default specified by driver, if nb_rx_desc is zero */
1826 if (nb_rx_desc == 0) {
1827 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1828 /* If driver default is also zero, fall back on EAL default */
1829 if (nb_rx_desc == 0)
1830 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1833 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1834 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1835 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1838 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1839 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1840 dev_info.rx_desc_lim.nb_min,
1841 dev_info.rx_desc_lim.nb_align);
1845 if (dev->data->dev_started &&
1846 !(dev_info.dev_capa &
1847 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1850 if (dev->data->dev_started &&
1851 (dev->data->rx_queue_state[rx_queue_id] !=
1852 RTE_ETH_QUEUE_STATE_STOPPED))
1855 rxq = dev->data->rx_queues;
1856 if (rxq[rx_queue_id]) {
1857 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1859 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1860 rxq[rx_queue_id] = NULL;
1863 if (rx_conf == NULL)
1864 rx_conf = &dev_info.default_rxconf;
1866 local_conf = *rx_conf;
1869 * If an offloading has already been enabled in
1870 * rte_eth_dev_configure(), it has been enabled on all queues,
1871 * so there is no need to enable it in this queue again.
1872 * The local_conf.offloads input to underlying PMD only carries
1873 * those offloadings which are only enabled on this queue and
1874 * not enabled on all queues.
1876 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1879 * New added offloadings for this queue are those not enabled in
1880 * rte_eth_dev_configure() and they must be per-queue type.
1881 * A pure per-port offloading can't be enabled on a queue while
1882 * disabled on another queue. A pure per-port offloading can't
1883 * be enabled for any queue as new added one if it hasn't been
1884 * enabled in rte_eth_dev_configure().
1886 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1887 local_conf.offloads) {
1889 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1890 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1891 port_id, rx_queue_id, local_conf.offloads,
1892 dev_info.rx_queue_offload_capa,
1898 * If LRO is enabled, check that the maximum aggregated packet
1899 * size is supported by the configured device.
1901 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1902 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1903 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1904 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1905 int ret = check_lro_pkt_size(port_id,
1906 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1907 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1908 dev_info.max_lro_pkt_size);
1913 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1914 socket_id, &local_conf, mp);
1916 if (!dev->data->min_rx_buf_size ||
1917 dev->data->min_rx_buf_size > mbp_buf_size)
1918 dev->data->min_rx_buf_size = mbp_buf_size;
1921 return eth_err(port_id, ret);
1925 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1926 uint16_t nb_rx_desc,
1927 const struct rte_eth_hairpin_conf *conf)
1930 struct rte_eth_dev *dev;
1931 struct rte_eth_hairpin_cap cap;
1936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1938 dev = &rte_eth_devices[port_id];
1939 if (rx_queue_id >= dev->data->nb_rx_queues) {
1940 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1943 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1948 /* if nb_rx_desc is zero use max number of desc from the driver. */
1949 if (nb_rx_desc == 0)
1950 nb_rx_desc = cap.max_nb_desc;
1951 if (nb_rx_desc > cap.max_nb_desc) {
1953 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1954 nb_rx_desc, cap.max_nb_desc);
1957 if (conf->peer_count > cap.max_rx_2_tx) {
1959 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1960 conf->peer_count, cap.max_rx_2_tx);
1963 if (conf->peer_count == 0) {
1965 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1969 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1970 cap.max_nb_queues != UINT16_MAX; i++) {
1971 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1974 if (count > cap.max_nb_queues) {
1975 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1979 if (dev->data->dev_started)
1981 rxq = dev->data->rx_queues;
1982 if (rxq[rx_queue_id] != NULL) {
1983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1985 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1986 rxq[rx_queue_id] = NULL;
1988 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1991 dev->data->rx_queue_state[rx_queue_id] =
1992 RTE_ETH_QUEUE_STATE_HAIRPIN;
1993 return eth_err(port_id, ret);
1997 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1998 uint16_t nb_tx_desc, unsigned int socket_id,
1999 const struct rte_eth_txconf *tx_conf)
2001 struct rte_eth_dev *dev;
2002 struct rte_eth_dev_info dev_info;
2003 struct rte_eth_txconf local_conf;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2009 dev = &rte_eth_devices[port_id];
2010 if (tx_queue_id >= dev->data->nb_tx_queues) {
2011 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2017 ret = rte_eth_dev_info_get(port_id, &dev_info);
2021 /* Use default specified by driver, if nb_tx_desc is zero */
2022 if (nb_tx_desc == 0) {
2023 nb_tx_desc = dev_info.default_txportconf.ring_size;
2024 /* If driver default is zero, fall back on EAL default */
2025 if (nb_tx_desc == 0)
2026 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2028 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2029 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2030 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2032 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2033 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2034 dev_info.tx_desc_lim.nb_min,
2035 dev_info.tx_desc_lim.nb_align);
2039 if (dev->data->dev_started &&
2040 !(dev_info.dev_capa &
2041 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2044 if (dev->data->dev_started &&
2045 (dev->data->tx_queue_state[tx_queue_id] !=
2046 RTE_ETH_QUEUE_STATE_STOPPED))
2049 txq = dev->data->tx_queues;
2050 if (txq[tx_queue_id]) {
2051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2053 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2054 txq[tx_queue_id] = NULL;
2057 if (tx_conf == NULL)
2058 tx_conf = &dev_info.default_txconf;
2060 local_conf = *tx_conf;
2063 * If an offloading has already been enabled in
2064 * rte_eth_dev_configure(), it has been enabled on all queues,
2065 * so there is no need to enable it in this queue again.
2066 * The local_conf.offloads input to underlying PMD only carries
2067 * those offloadings which are only enabled on this queue and
2068 * not enabled on all queues.
2070 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2073 * New added offloadings for this queue are those not enabled in
2074 * rte_eth_dev_configure() and they must be per-queue type.
2075 * A pure per-port offloading can't be enabled on a queue while
2076 * disabled on another queue. A pure per-port offloading can't
2077 * be enabled for any queue as new added one if it hasn't been
2078 * enabled in rte_eth_dev_configure().
2080 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2081 local_conf.offloads) {
2083 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2084 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2085 port_id, tx_queue_id, local_conf.offloads,
2086 dev_info.tx_queue_offload_capa,
2091 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2092 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2096 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2097 uint16_t nb_tx_desc,
2098 const struct rte_eth_hairpin_conf *conf)
2100 struct rte_eth_dev *dev;
2101 struct rte_eth_hairpin_cap cap;
2107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2108 dev = &rte_eth_devices[port_id];
2109 if (tx_queue_id >= dev->data->nb_tx_queues) {
2110 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2113 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2118 /* if nb_rx_desc is zero use max number of desc from the driver. */
2119 if (nb_tx_desc == 0)
2120 nb_tx_desc = cap.max_nb_desc;
2121 if (nb_tx_desc > cap.max_nb_desc) {
2123 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2124 nb_tx_desc, cap.max_nb_desc);
2127 if (conf->peer_count > cap.max_tx_2_rx) {
2129 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2130 conf->peer_count, cap.max_tx_2_rx);
2133 if (conf->peer_count == 0) {
2135 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2139 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2140 cap.max_nb_queues != UINT16_MAX; i++) {
2141 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2144 if (count > cap.max_nb_queues) {
2145 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2149 if (dev->data->dev_started)
2151 txq = dev->data->tx_queues;
2152 if (txq[tx_queue_id] != NULL) {
2153 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2155 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2156 txq[tx_queue_id] = NULL;
2158 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2159 (dev, tx_queue_id, nb_tx_desc, conf);
2161 dev->data->tx_queue_state[tx_queue_id] =
2162 RTE_ETH_QUEUE_STATE_HAIRPIN;
2163 return eth_err(port_id, ret);
2167 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2168 void *userdata __rte_unused)
2172 for (i = 0; i < unsent; i++)
2173 rte_pktmbuf_free(pkts[i]);
2177 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2180 uint64_t *count = userdata;
2183 for (i = 0; i < unsent; i++)
2184 rte_pktmbuf_free(pkts[i]);
2190 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2191 buffer_tx_error_fn cbfn, void *userdata)
2193 buffer->error_callback = cbfn;
2194 buffer->error_userdata = userdata;
2199 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2206 buffer->size = size;
2207 if (buffer->error_callback == NULL) {
2208 ret = rte_eth_tx_buffer_set_err_callback(
2209 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2216 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2218 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2221 /* Validate Input Data. Bail if not valid or not supported. */
2222 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2225 /* Call driver to free pending mbufs. */
2226 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2228 return eth_err(port_id, ret);
2232 rte_eth_promiscuous_enable(uint16_t port_id)
2234 struct rte_eth_dev *dev;
2237 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2238 dev = &rte_eth_devices[port_id];
2240 if (dev->data->promiscuous == 1)
2243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2245 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2246 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2248 return eth_err(port_id, diag);
2252 rte_eth_promiscuous_disable(uint16_t port_id)
2254 struct rte_eth_dev *dev;
2257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2258 dev = &rte_eth_devices[port_id];
2260 if (dev->data->promiscuous == 0)
2263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2265 dev->data->promiscuous = 0;
2266 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2268 dev->data->promiscuous = 1;
2270 return eth_err(port_id, diag);
2274 rte_eth_promiscuous_get(uint16_t port_id)
2276 struct rte_eth_dev *dev;
2278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2280 dev = &rte_eth_devices[port_id];
2281 return dev->data->promiscuous;
2285 rte_eth_allmulticast_enable(uint16_t port_id)
2287 struct rte_eth_dev *dev;
2290 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2291 dev = &rte_eth_devices[port_id];
2293 if (dev->data->all_multicast == 1)
2296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2297 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2298 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2300 return eth_err(port_id, diag);
2304 rte_eth_allmulticast_disable(uint16_t port_id)
2306 struct rte_eth_dev *dev;
2309 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2310 dev = &rte_eth_devices[port_id];
2312 if (dev->data->all_multicast == 0)
2315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2316 dev->data->all_multicast = 0;
2317 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2319 dev->data->all_multicast = 1;
2321 return eth_err(port_id, diag);
2325 rte_eth_allmulticast_get(uint16_t port_id)
2327 struct rte_eth_dev *dev;
2329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2331 dev = &rte_eth_devices[port_id];
2332 return dev->data->all_multicast;
2336 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2338 struct rte_eth_dev *dev;
2340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2341 dev = &rte_eth_devices[port_id];
2343 if (dev->data->dev_conf.intr_conf.lsc &&
2344 dev->data->dev_started)
2345 rte_eth_linkstatus_get(dev, eth_link);
2347 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2348 (*dev->dev_ops->link_update)(dev, 1);
2349 *eth_link = dev->data->dev_link;
2356 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2358 struct rte_eth_dev *dev;
2360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2361 dev = &rte_eth_devices[port_id];
2363 if (dev->data->dev_conf.intr_conf.lsc &&
2364 dev->data->dev_started)
2365 rte_eth_linkstatus_get(dev, eth_link);
2367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2368 (*dev->dev_ops->link_update)(dev, 0);
2369 *eth_link = dev->data->dev_link;
2376 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2378 struct rte_eth_dev *dev;
2380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2382 dev = &rte_eth_devices[port_id];
2383 memset(stats, 0, sizeof(*stats));
2385 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2386 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2387 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2391 rte_eth_stats_reset(uint16_t port_id)
2393 struct rte_eth_dev *dev;
2396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2397 dev = &rte_eth_devices[port_id];
2399 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2400 ret = (*dev->dev_ops->stats_reset)(dev);
2402 return eth_err(port_id, ret);
2404 dev->data->rx_mbuf_alloc_failed = 0;
2410 get_xstats_basic_count(struct rte_eth_dev *dev)
2412 uint16_t nb_rxqs, nb_txqs;
2415 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2416 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2418 count = RTE_NB_STATS;
2419 count += nb_rxqs * RTE_NB_RXQ_STATS;
2420 count += nb_txqs * RTE_NB_TXQ_STATS;
2426 get_xstats_count(uint16_t port_id)
2428 struct rte_eth_dev *dev;
2431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2432 dev = &rte_eth_devices[port_id];
2433 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2434 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2437 return eth_err(port_id, count);
2439 if (dev->dev_ops->xstats_get_names != NULL) {
2440 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2442 return eth_err(port_id, count);
2447 count += get_xstats_basic_count(dev);
2453 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2456 int cnt_xstats, idx_xstat;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2461 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2466 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2471 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2472 if (cnt_xstats < 0) {
2473 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2477 /* Get id-name lookup table */
2478 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2480 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2481 port_id, xstats_names, cnt_xstats, NULL)) {
2482 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2486 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2487 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2496 /* retrieve basic stats names */
2498 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2499 struct rte_eth_xstat_name *xstats_names)
2501 int cnt_used_entries = 0;
2502 uint32_t idx, id_queue;
2505 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2506 strlcpy(xstats_names[cnt_used_entries].name,
2507 rte_stats_strings[idx].name,
2508 sizeof(xstats_names[0].name));
2511 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2512 for (id_queue = 0; id_queue < num_q; id_queue++) {
2513 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2514 snprintf(xstats_names[cnt_used_entries].name,
2515 sizeof(xstats_names[0].name),
2517 id_queue, rte_rxq_stats_strings[idx].name);
2522 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2523 for (id_queue = 0; id_queue < num_q; id_queue++) {
2524 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2525 snprintf(xstats_names[cnt_used_entries].name,
2526 sizeof(xstats_names[0].name),
2528 id_queue, rte_txq_stats_strings[idx].name);
2532 return cnt_used_entries;
2535 /* retrieve ethdev extended statistics names */
2537 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2538 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2541 struct rte_eth_xstat_name *xstats_names_copy;
2542 unsigned int no_basic_stat_requested = 1;
2543 unsigned int no_ext_stat_requested = 1;
2544 unsigned int expected_entries;
2545 unsigned int basic_count;
2546 struct rte_eth_dev *dev;
2550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2551 dev = &rte_eth_devices[port_id];
2553 basic_count = get_xstats_basic_count(dev);
2554 ret = get_xstats_count(port_id);
2557 expected_entries = (unsigned int)ret;
2559 /* Return max number of stats if no ids given */
2562 return expected_entries;
2563 else if (xstats_names && size < expected_entries)
2564 return expected_entries;
2567 if (ids && !xstats_names)
2570 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2571 uint64_t ids_copy[size];
2573 for (i = 0; i < size; i++) {
2574 if (ids[i] < basic_count) {
2575 no_basic_stat_requested = 0;
2580 * Convert ids to xstats ids that PMD knows.
2581 * ids known by user are basic + extended stats.
2583 ids_copy[i] = ids[i] - basic_count;
2586 if (no_basic_stat_requested)
2587 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2588 xstats_names, ids_copy, size);
2591 /* Retrieve all stats */
2593 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2595 if (num_stats < 0 || num_stats > (int)expected_entries)
2598 return expected_entries;
2601 xstats_names_copy = calloc(expected_entries,
2602 sizeof(struct rte_eth_xstat_name));
2604 if (!xstats_names_copy) {
2605 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2610 for (i = 0; i < size; i++) {
2611 if (ids[i] >= basic_count) {
2612 no_ext_stat_requested = 0;
2618 /* Fill xstats_names_copy structure */
2619 if (ids && no_ext_stat_requested) {
2620 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2622 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2625 free(xstats_names_copy);
2631 for (i = 0; i < size; i++) {
2632 if (ids[i] >= expected_entries) {
2633 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2634 free(xstats_names_copy);
2637 xstats_names[i] = xstats_names_copy[ids[i]];
2640 free(xstats_names_copy);
2645 rte_eth_xstats_get_names(uint16_t port_id,
2646 struct rte_eth_xstat_name *xstats_names,
2649 struct rte_eth_dev *dev;
2650 int cnt_used_entries;
2651 int cnt_expected_entries;
2652 int cnt_driver_entries;
2654 cnt_expected_entries = get_xstats_count(port_id);
2655 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2656 (int)size < cnt_expected_entries)
2657 return cnt_expected_entries;
2659 /* port_id checked in get_xstats_count() */
2660 dev = &rte_eth_devices[port_id];
2662 cnt_used_entries = rte_eth_basic_stats_get_names(
2665 if (dev->dev_ops->xstats_get_names != NULL) {
2666 /* If there are any driver-specific xstats, append them
2669 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2671 xstats_names + cnt_used_entries,
2672 size - cnt_used_entries);
2673 if (cnt_driver_entries < 0)
2674 return eth_err(port_id, cnt_driver_entries);
2675 cnt_used_entries += cnt_driver_entries;
2678 return cnt_used_entries;
2683 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2685 struct rte_eth_dev *dev;
2686 struct rte_eth_stats eth_stats;
2687 unsigned int count = 0, i, q;
2688 uint64_t val, *stats_ptr;
2689 uint16_t nb_rxqs, nb_txqs;
2692 ret = rte_eth_stats_get(port_id, ð_stats);
2696 dev = &rte_eth_devices[port_id];
2698 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2699 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2702 for (i = 0; i < RTE_NB_STATS; i++) {
2703 stats_ptr = RTE_PTR_ADD(ð_stats,
2704 rte_stats_strings[i].offset);
2706 xstats[count++].value = val;
2710 for (q = 0; q < nb_rxqs; q++) {
2711 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2712 stats_ptr = RTE_PTR_ADD(ð_stats,
2713 rte_rxq_stats_strings[i].offset +
2714 q * sizeof(uint64_t));
2716 xstats[count++].value = val;
2721 for (q = 0; q < nb_txqs; q++) {
2722 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2723 stats_ptr = RTE_PTR_ADD(ð_stats,
2724 rte_txq_stats_strings[i].offset +
2725 q * sizeof(uint64_t));
2727 xstats[count++].value = val;
2733 /* retrieve ethdev extended statistics */
2735 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2736 uint64_t *values, unsigned int size)
2738 unsigned int no_basic_stat_requested = 1;
2739 unsigned int no_ext_stat_requested = 1;
2740 unsigned int num_xstats_filled;
2741 unsigned int basic_count;
2742 uint16_t expected_entries;
2743 struct rte_eth_dev *dev;
2747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2748 ret = get_xstats_count(port_id);
2751 expected_entries = (uint16_t)ret;
2752 struct rte_eth_xstat xstats[expected_entries];
2753 dev = &rte_eth_devices[port_id];
2754 basic_count = get_xstats_basic_count(dev);
2756 /* Return max number of stats if no ids given */
2759 return expected_entries;
2760 else if (values && size < expected_entries)
2761 return expected_entries;
2767 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2768 unsigned int basic_count = get_xstats_basic_count(dev);
2769 uint64_t ids_copy[size];
2771 for (i = 0; i < size; i++) {
2772 if (ids[i] < basic_count) {
2773 no_basic_stat_requested = 0;
2778 * Convert ids to xstats ids that PMD knows.
2779 * ids known by user are basic + extended stats.
2781 ids_copy[i] = ids[i] - basic_count;
2784 if (no_basic_stat_requested)
2785 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2790 for (i = 0; i < size; i++) {
2791 if (ids[i] >= basic_count) {
2792 no_ext_stat_requested = 0;
2798 /* Fill the xstats structure */
2799 if (ids && no_ext_stat_requested)
2800 ret = rte_eth_basic_stats_get(port_id, xstats);
2802 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2806 num_xstats_filled = (unsigned int)ret;
2808 /* Return all stats */
2810 for (i = 0; i < num_xstats_filled; i++)
2811 values[i] = xstats[i].value;
2812 return expected_entries;
2816 for (i = 0; i < size; i++) {
2817 if (ids[i] >= expected_entries) {
2818 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2821 values[i] = xstats[ids[i]].value;
2827 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2830 struct rte_eth_dev *dev;
2831 unsigned int count = 0, i;
2832 signed int xcount = 0;
2833 uint16_t nb_rxqs, nb_txqs;
2836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2838 dev = &rte_eth_devices[port_id];
2840 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2841 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2843 /* Return generic statistics */
2844 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2845 (nb_txqs * RTE_NB_TXQ_STATS);
2847 /* implemented by the driver */
2848 if (dev->dev_ops->xstats_get != NULL) {
2849 /* Retrieve the xstats from the driver at the end of the
2852 xcount = (*dev->dev_ops->xstats_get)(dev,
2853 xstats ? xstats + count : NULL,
2854 (n > count) ? n - count : 0);
2857 return eth_err(port_id, xcount);
2860 if (n < count + xcount || xstats == NULL)
2861 return count + xcount;
2863 /* now fill the xstats structure */
2864 ret = rte_eth_basic_stats_get(port_id, xstats);
2869 for (i = 0; i < count; i++)
2871 /* add an offset to driver-specific stats */
2872 for ( ; i < count + xcount; i++)
2873 xstats[i].id += count;
2875 return count + xcount;
2878 /* reset ethdev extended statistics */
2880 rte_eth_xstats_reset(uint16_t port_id)
2882 struct rte_eth_dev *dev;
2884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2885 dev = &rte_eth_devices[port_id];
2887 /* implemented by the driver */
2888 if (dev->dev_ops->xstats_reset != NULL)
2889 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2891 /* fallback to default */
2892 return rte_eth_stats_reset(port_id);
2896 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2899 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2903 dev = &rte_eth_devices[port_id];
2905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2907 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2910 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2913 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2916 return (*dev->dev_ops->queue_stats_mapping_set)
2917 (dev, queue_id, stat_idx, is_rx);
2922 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2925 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2926 stat_idx, STAT_QMAP_TX));
2931 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2934 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2935 stat_idx, STAT_QMAP_RX));
2939 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2941 struct rte_eth_dev *dev;
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 dev = &rte_eth_devices[port_id];
2946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2947 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2948 fw_version, fw_size));
2952 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2954 struct rte_eth_dev *dev;
2955 const struct rte_eth_desc_lim lim = {
2956 .nb_max = UINT16_MAX,
2959 .nb_seg_max = UINT16_MAX,
2960 .nb_mtu_seg_max = UINT16_MAX,
2965 * Init dev_info before port_id check since caller does not have
2966 * return status and does not know if get is successful or not.
2968 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2969 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 dev = &rte_eth_devices[port_id];
2974 dev_info->rx_desc_lim = lim;
2975 dev_info->tx_desc_lim = lim;
2976 dev_info->device = dev->device;
2977 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2978 dev_info->max_mtu = UINT16_MAX;
2980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2981 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2983 /* Cleanup already filled in device information */
2984 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2985 return eth_err(port_id, diag);
2988 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
2989 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
2990 RTE_MAX_QUEUES_PER_PORT);
2991 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
2992 RTE_MAX_QUEUES_PER_PORT);
2994 dev_info->driver_name = dev->device->driver->name;
2995 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2996 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2998 dev_info->dev_flags = &dev->data->dev_flags;
3004 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3005 uint32_t *ptypes, int num)
3008 struct rte_eth_dev *dev;
3009 const uint32_t *all_ptypes;
3011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3012 dev = &rte_eth_devices[port_id];
3013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3014 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3019 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3020 if (all_ptypes[i] & ptype_mask) {
3022 ptypes[j] = all_ptypes[i];
3030 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3031 uint32_t *set_ptypes, unsigned int num)
3033 const uint32_t valid_ptype_masks[] = {
3037 RTE_PTYPE_TUNNEL_MASK,
3038 RTE_PTYPE_INNER_L2_MASK,
3039 RTE_PTYPE_INNER_L3_MASK,
3040 RTE_PTYPE_INNER_L4_MASK,
3042 const uint32_t *all_ptypes;
3043 struct rte_eth_dev *dev;
3044 uint32_t unused_mask;
3048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 dev = &rte_eth_devices[port_id];
3051 if (num > 0 && set_ptypes == NULL)
3054 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3055 *dev->dev_ops->dev_ptypes_set == NULL) {
3060 if (ptype_mask == 0) {
3061 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3066 unused_mask = ptype_mask;
3067 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3068 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3069 if (mask && mask != valid_ptype_masks[i]) {
3073 unused_mask &= ~valid_ptype_masks[i];
3081 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3082 if (all_ptypes == NULL) {
3088 * Accommodate as many set_ptypes as possible. If the supplied
3089 * set_ptypes array is insufficient fill it partially.
3091 for (i = 0, j = 0; set_ptypes != NULL &&
3092 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3093 if (ptype_mask & all_ptypes[i]) {
3095 set_ptypes[j] = all_ptypes[i];
3103 if (set_ptypes != NULL && j < num)
3104 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3106 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3110 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3116 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3118 struct rte_eth_dev *dev;
3120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3121 dev = &rte_eth_devices[port_id];
3122 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3128 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3130 struct rte_eth_dev *dev;
3132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3134 dev = &rte_eth_devices[port_id];
3135 *mtu = dev->data->mtu;
3140 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3143 struct rte_eth_dev_info dev_info;
3144 struct rte_eth_dev *dev;
3146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3147 dev = &rte_eth_devices[port_id];
3148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3151 * Check if the device supports dev_infos_get, if it does not
3152 * skip min_mtu/max_mtu validation here as this requires values
3153 * that are populated within the call to rte_eth_dev_info_get()
3154 * which relies on dev->dev_ops->dev_infos_get.
3156 if (*dev->dev_ops->dev_infos_get != NULL) {
3157 ret = rte_eth_dev_info_get(port_id, &dev_info);
3161 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3165 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3167 dev->data->mtu = mtu;
3169 return eth_err(port_id, ret);
3173 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3175 struct rte_eth_dev *dev;
3178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3179 dev = &rte_eth_devices[port_id];
3180 if (!(dev->data->dev_conf.rxmode.offloads &
3181 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3182 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3187 if (vlan_id > 4095) {
3188 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3192 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3194 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3196 struct rte_vlan_filter_conf *vfc;
3200 vfc = &dev->data->vlan_filter_conf;
3201 vidx = vlan_id / 64;
3202 vbit = vlan_id % 64;
3205 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3207 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3210 return eth_err(port_id, ret);
3214 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3217 struct rte_eth_dev *dev;
3219 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3220 dev = &rte_eth_devices[port_id];
3221 if (rx_queue_id >= dev->data->nb_rx_queues) {
3222 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3227 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3233 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3234 enum rte_vlan_type vlan_type,
3237 struct rte_eth_dev *dev;
3239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3240 dev = &rte_eth_devices[port_id];
3241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3243 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3248 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3250 struct rte_eth_dev *dev;
3254 uint64_t orig_offloads;
3255 uint64_t dev_offloads;
3257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3258 dev = &rte_eth_devices[port_id];
3260 /* save original values in case of failure */
3261 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3262 dev_offloads = orig_offloads;
3264 /*check which option changed by application*/
3265 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3266 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3269 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3271 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3272 mask |= ETH_VLAN_STRIP_MASK;
3275 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3276 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3279 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3281 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3282 mask |= ETH_VLAN_FILTER_MASK;
3285 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3286 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3289 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3291 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3292 mask |= ETH_VLAN_EXTEND_MASK;
3295 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3296 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3299 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3301 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3302 mask |= ETH_QINQ_STRIP_MASK;
3309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3310 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3311 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3313 /* hit an error restore original values */
3314 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3317 return eth_err(port_id, ret);
3321 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3323 struct rte_eth_dev *dev;
3324 uint64_t *dev_offloads;
3327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3328 dev = &rte_eth_devices[port_id];
3329 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3331 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3332 ret |= ETH_VLAN_STRIP_OFFLOAD;
3334 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3335 ret |= ETH_VLAN_FILTER_OFFLOAD;
3337 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3338 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3340 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3341 ret |= ETH_QINQ_STRIP_OFFLOAD;
3347 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3349 struct rte_eth_dev *dev;
3351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3352 dev = &rte_eth_devices[port_id];
3353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3355 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3359 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3361 struct rte_eth_dev *dev;
3363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3364 dev = &rte_eth_devices[port_id];
3365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3366 memset(fc_conf, 0, sizeof(*fc_conf));
3367 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3371 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3373 struct rte_eth_dev *dev;
3375 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3376 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3377 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3381 dev = &rte_eth_devices[port_id];
3382 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3383 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3387 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3388 struct rte_eth_pfc_conf *pfc_conf)
3390 struct rte_eth_dev *dev;
3392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3393 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3394 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3398 dev = &rte_eth_devices[port_id];
3399 /* High water, low water validation are device specific */
3400 if (*dev->dev_ops->priority_flow_ctrl_set)
3401 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3407 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3415 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3416 for (i = 0; i < num; i++) {
3417 if (reta_conf[i].mask)
3425 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3429 uint16_t i, idx, shift;
3435 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3439 for (i = 0; i < reta_size; i++) {
3440 idx = i / RTE_RETA_GROUP_SIZE;
3441 shift = i % RTE_RETA_GROUP_SIZE;
3442 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3443 (reta_conf[idx].reta[shift] >= max_rxq)) {
3445 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3447 reta_conf[idx].reta[shift], max_rxq);
3456 rte_eth_dev_rss_reta_update(uint16_t port_id,
3457 struct rte_eth_rss_reta_entry64 *reta_conf,
3460 struct rte_eth_dev *dev;
3463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3464 /* Check mask bits */
3465 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3469 dev = &rte_eth_devices[port_id];
3471 /* Check entry value */
3472 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3473 dev->data->nb_rx_queues);
3477 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3478 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3483 rte_eth_dev_rss_reta_query(uint16_t port_id,
3484 struct rte_eth_rss_reta_entry64 *reta_conf,
3487 struct rte_eth_dev *dev;
3490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3492 /* Check mask bits */
3493 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3497 dev = &rte_eth_devices[port_id];
3498 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3499 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3504 rte_eth_dev_rss_hash_update(uint16_t port_id,
3505 struct rte_eth_rss_conf *rss_conf)
3507 struct rte_eth_dev *dev;
3508 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3513 ret = rte_eth_dev_info_get(port_id, &dev_info);
3517 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3519 dev = &rte_eth_devices[port_id];
3520 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3521 dev_info.flow_type_rss_offloads) {
3523 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3524 port_id, rss_conf->rss_hf,
3525 dev_info.flow_type_rss_offloads);
3528 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3529 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3534 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3535 struct rte_eth_rss_conf *rss_conf)
3537 struct rte_eth_dev *dev;
3539 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3540 dev = &rte_eth_devices[port_id];
3541 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3542 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3547 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3548 struct rte_eth_udp_tunnel *udp_tunnel)
3550 struct rte_eth_dev *dev;
3552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3553 if (udp_tunnel == NULL) {
3554 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3558 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3559 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3563 dev = &rte_eth_devices[port_id];
3564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3565 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3570 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3571 struct rte_eth_udp_tunnel *udp_tunnel)
3573 struct rte_eth_dev *dev;
3575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3576 dev = &rte_eth_devices[port_id];
3578 if (udp_tunnel == NULL) {
3579 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3583 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3584 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3589 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3594 rte_eth_led_on(uint16_t port_id)
3596 struct rte_eth_dev *dev;
3598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3599 dev = &rte_eth_devices[port_id];
3600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3601 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3605 rte_eth_led_off(uint16_t port_id)
3607 struct rte_eth_dev *dev;
3609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3610 dev = &rte_eth_devices[port_id];
3611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3612 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3616 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3620 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3622 struct rte_eth_dev_info dev_info;
3623 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3627 ret = rte_eth_dev_info_get(port_id, &dev_info);
3631 for (i = 0; i < dev_info.max_mac_addrs; i++)
3632 if (memcmp(addr, &dev->data->mac_addrs[i],
3633 RTE_ETHER_ADDR_LEN) == 0)
3639 static const struct rte_ether_addr null_mac_addr;
3642 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3645 struct rte_eth_dev *dev;
3650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3651 dev = &rte_eth_devices[port_id];
3652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3654 if (rte_is_zero_ether_addr(addr)) {
3655 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3659 if (pool >= ETH_64_POOLS) {
3660 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3664 index = get_mac_addr_index(port_id, addr);
3666 index = get_mac_addr_index(port_id, &null_mac_addr);
3668 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3673 pool_mask = dev->data->mac_pool_sel[index];
3675 /* Check if both MAC address and pool is already there, and do nothing */
3676 if (pool_mask & (1ULL << pool))
3681 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3684 /* Update address in NIC data structure */
3685 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3687 /* Update pool bitmap in NIC data structure */
3688 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3691 return eth_err(port_id, ret);
3695 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3697 struct rte_eth_dev *dev;
3700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3701 dev = &rte_eth_devices[port_id];
3702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3704 index = get_mac_addr_index(port_id, addr);
3707 "Port %u: Cannot remove default MAC address\n",
3710 } else if (index < 0)
3711 return 0; /* Do nothing if address wasn't found */
3714 (*dev->dev_ops->mac_addr_remove)(dev, index);
3716 /* Update address in NIC data structure */
3717 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3719 /* reset pool bitmap */
3720 dev->data->mac_pool_sel[index] = 0;
3726 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3728 struct rte_eth_dev *dev;
3731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3733 if (!rte_is_valid_assigned_ether_addr(addr))
3736 dev = &rte_eth_devices[port_id];
3737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3739 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3743 /* Update default address in NIC data structure */
3744 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3751 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3755 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3757 struct rte_eth_dev_info dev_info;
3758 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3762 ret = rte_eth_dev_info_get(port_id, &dev_info);
3766 if (!dev->data->hash_mac_addrs)
3769 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3770 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3771 RTE_ETHER_ADDR_LEN) == 0)
3778 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3783 struct rte_eth_dev *dev;
3785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3787 dev = &rte_eth_devices[port_id];
3788 if (rte_is_zero_ether_addr(addr)) {
3789 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3794 index = get_hash_mac_addr_index(port_id, addr);
3795 /* Check if it's already there, and do nothing */
3796 if ((index >= 0) && on)
3802 "Port %u: the MAC address was not set in UTA\n",
3807 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3809 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3816 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3818 /* Update address in NIC data structure */
3820 rte_ether_addr_copy(addr,
3821 &dev->data->hash_mac_addrs[index]);
3823 rte_ether_addr_copy(&null_mac_addr,
3824 &dev->data->hash_mac_addrs[index]);
3827 return eth_err(port_id, ret);
3831 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3833 struct rte_eth_dev *dev;
3835 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3837 dev = &rte_eth_devices[port_id];
3839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3840 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3844 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3847 struct rte_eth_dev *dev;
3848 struct rte_eth_dev_info dev_info;
3849 struct rte_eth_link link;
3852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3854 ret = rte_eth_dev_info_get(port_id, &dev_info);
3858 dev = &rte_eth_devices[port_id];
3859 link = dev->data->dev_link;
3861 if (queue_idx > dev_info.max_tx_queues) {
3863 "Set queue rate limit:port %u: invalid queue id=%u\n",
3864 port_id, queue_idx);
3868 if (tx_rate > link.link_speed) {
3870 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3871 tx_rate, link.link_speed);
3875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3876 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3877 queue_idx, tx_rate));
3881 rte_eth_mirror_rule_set(uint16_t port_id,
3882 struct rte_eth_mirror_conf *mirror_conf,
3883 uint8_t rule_id, uint8_t on)
3885 struct rte_eth_dev *dev;
3887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3888 if (mirror_conf->rule_type == 0) {
3889 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3893 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3894 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3899 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3900 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3901 (mirror_conf->pool_mask == 0)) {
3903 "Invalid mirror pool, pool mask can not be 0\n");
3907 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3908 mirror_conf->vlan.vlan_mask == 0) {
3910 "Invalid vlan mask, vlan mask can not be 0\n");
3914 dev = &rte_eth_devices[port_id];
3915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3917 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3918 mirror_conf, rule_id, on));
3922 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3924 struct rte_eth_dev *dev;
3926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3928 dev = &rte_eth_devices[port_id];
3929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3931 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3935 RTE_INIT(eth_dev_init_cb_lists)
3939 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3940 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3944 rte_eth_dev_callback_register(uint16_t port_id,
3945 enum rte_eth_event_type event,
3946 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3948 struct rte_eth_dev *dev;
3949 struct rte_eth_dev_callback *user_cb;
3950 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3956 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3957 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3961 if (port_id == RTE_ETH_ALL) {
3963 last_port = RTE_MAX_ETHPORTS - 1;
3965 next_port = last_port = port_id;
3968 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3971 dev = &rte_eth_devices[next_port];
3973 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3974 if (user_cb->cb_fn == cb_fn &&
3975 user_cb->cb_arg == cb_arg &&
3976 user_cb->event == event) {
3981 /* create a new callback. */
3982 if (user_cb == NULL) {
3983 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3984 sizeof(struct rte_eth_dev_callback), 0);
3985 if (user_cb != NULL) {
3986 user_cb->cb_fn = cb_fn;
3987 user_cb->cb_arg = cb_arg;
3988 user_cb->event = event;
3989 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3992 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3993 rte_eth_dev_callback_unregister(port_id, event,
3999 } while (++next_port <= last_port);
4001 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4006 rte_eth_dev_callback_unregister(uint16_t port_id,
4007 enum rte_eth_event_type event,
4008 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4011 struct rte_eth_dev *dev;
4012 struct rte_eth_dev_callback *cb, *next;
4013 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4019 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4020 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4024 if (port_id == RTE_ETH_ALL) {
4026 last_port = RTE_MAX_ETHPORTS - 1;
4028 next_port = last_port = port_id;
4031 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4034 dev = &rte_eth_devices[next_port];
4036 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4039 next = TAILQ_NEXT(cb, next);
4041 if (cb->cb_fn != cb_fn || cb->event != event ||
4042 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4046 * if this callback is not executing right now,
4049 if (cb->active == 0) {
4050 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4056 } while (++next_port <= last_port);
4058 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4063 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4064 enum rte_eth_event_type event, void *ret_param)
4066 struct rte_eth_dev_callback *cb_lst;
4067 struct rte_eth_dev_callback dev_cb;
4070 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4071 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4072 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4076 if (ret_param != NULL)
4077 dev_cb.ret_param = ret_param;
4079 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4080 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4081 dev_cb.cb_arg, dev_cb.ret_param);
4082 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4085 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4090 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4095 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4097 dev->state = RTE_ETH_DEV_ATTACHED;
4101 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4104 struct rte_eth_dev *dev;
4105 struct rte_intr_handle *intr_handle;
4109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4111 dev = &rte_eth_devices[port_id];
4113 if (!dev->intr_handle) {
4114 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4118 intr_handle = dev->intr_handle;
4119 if (!intr_handle->intr_vec) {
4120 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4124 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4125 vec = intr_handle->intr_vec[qid];
4126 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4127 if (rc && rc != -EEXIST) {
4129 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4130 port_id, qid, op, epfd, vec);
4138 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4140 struct rte_intr_handle *intr_handle;
4141 struct rte_eth_dev *dev;
4142 unsigned int efd_idx;
4146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4148 dev = &rte_eth_devices[port_id];
4150 if (queue_id >= dev->data->nb_rx_queues) {
4151 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4155 if (!dev->intr_handle) {
4156 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4160 intr_handle = dev->intr_handle;
4161 if (!intr_handle->intr_vec) {
4162 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4166 vec = intr_handle->intr_vec[queue_id];
4167 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4168 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4169 fd = intr_handle->efds[efd_idx];
4174 const struct rte_memzone *
4175 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4176 uint16_t queue_id, size_t size, unsigned align,
4179 char z_name[RTE_MEMZONE_NAMESIZE];
4180 const struct rte_memzone *mz;
4183 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4184 dev->data->port_id, queue_id, ring_name);
4185 if (rc >= RTE_MEMZONE_NAMESIZE) {
4186 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4187 rte_errno = ENAMETOOLONG;
4191 mz = rte_memzone_lookup(z_name);
4195 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4196 RTE_MEMZONE_IOVA_CONTIG, align);
4200 rte_eth_dev_create(struct rte_device *device, const char *name,
4201 size_t priv_data_size,
4202 ethdev_bus_specific_init ethdev_bus_specific_init,
4203 void *bus_init_params,
4204 ethdev_init_t ethdev_init, void *init_params)
4206 struct rte_eth_dev *ethdev;
4209 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4211 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4212 ethdev = rte_eth_dev_allocate(name);
4216 if (priv_data_size) {
4217 ethdev->data->dev_private = rte_zmalloc_socket(
4218 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4221 if (!ethdev->data->dev_private) {
4222 RTE_LOG(ERR, EAL, "failed to allocate private data");
4228 ethdev = rte_eth_dev_attach_secondary(name);
4230 RTE_LOG(ERR, EAL, "secondary process attach failed, "
4231 "ethdev doesn't exist");
4236 ethdev->device = device;
4238 if (ethdev_bus_specific_init) {
4239 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4242 "ethdev bus specific initialisation failed");
4247 retval = ethdev_init(ethdev, init_params);
4249 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4253 rte_eth_dev_probing_finish(ethdev);
4258 rte_eth_dev_release_port(ethdev);
4263 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4264 ethdev_uninit_t ethdev_uninit)
4268 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4272 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4274 ret = ethdev_uninit(ethdev);
4278 return rte_eth_dev_release_port(ethdev);
4282 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4283 int epfd, int op, void *data)
4286 struct rte_eth_dev *dev;
4287 struct rte_intr_handle *intr_handle;
4290 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4292 dev = &rte_eth_devices[port_id];
4293 if (queue_id >= dev->data->nb_rx_queues) {
4294 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4298 if (!dev->intr_handle) {
4299 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4303 intr_handle = dev->intr_handle;
4304 if (!intr_handle->intr_vec) {
4305 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4309 vec = intr_handle->intr_vec[queue_id];
4310 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4311 if (rc && rc != -EEXIST) {
4313 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4314 port_id, queue_id, op, epfd, vec);
4322 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4325 struct rte_eth_dev *dev;
4327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4329 dev = &rte_eth_devices[port_id];
4331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4332 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4337 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4340 struct rte_eth_dev *dev;
4342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4344 dev = &rte_eth_devices[port_id];
4346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4347 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4353 rte_eth_dev_filter_supported(uint16_t port_id,
4354 enum rte_filter_type filter_type)
4356 struct rte_eth_dev *dev;
4358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4360 dev = &rte_eth_devices[port_id];
4361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4362 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4363 RTE_ETH_FILTER_NOP, NULL);
4367 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4368 enum rte_filter_op filter_op, void *arg)
4370 struct rte_eth_dev *dev;
4372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4374 dev = &rte_eth_devices[port_id];
4375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4376 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4380 const struct rte_eth_rxtx_callback *
4381 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4382 rte_rx_callback_fn fn, void *user_param)
4384 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4385 rte_errno = ENOTSUP;
4388 struct rte_eth_dev *dev;
4390 /* check input parameters */
4391 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4392 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4396 dev = &rte_eth_devices[port_id];
4397 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4401 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4409 cb->param = user_param;
4411 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4412 /* Add the callbacks in fifo order. */
4413 struct rte_eth_rxtx_callback *tail =
4414 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4417 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4424 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4429 const struct rte_eth_rxtx_callback *
4430 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4431 rte_rx_callback_fn fn, void *user_param)
4433 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4434 rte_errno = ENOTSUP;
4437 /* check input parameters */
4438 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4439 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4444 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4452 cb->param = user_param;
4454 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4455 /* Add the callbacks at fisrt position*/
4456 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4458 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4459 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4464 const struct rte_eth_rxtx_callback *
4465 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4466 rte_tx_callback_fn fn, void *user_param)
4468 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4469 rte_errno = ENOTSUP;
4472 struct rte_eth_dev *dev;
4474 /* check input parameters */
4475 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4476 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4481 dev = &rte_eth_devices[port_id];
4482 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4487 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4495 cb->param = user_param;
4497 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4498 /* Add the callbacks in fifo order. */
4499 struct rte_eth_rxtx_callback *tail =
4500 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4503 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4510 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4516 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4517 const struct rte_eth_rxtx_callback *user_cb)
4519 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4522 /* Check input parameters. */
4523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4524 if (user_cb == NULL ||
4525 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4528 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4529 struct rte_eth_rxtx_callback *cb;
4530 struct rte_eth_rxtx_callback **prev_cb;
4533 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4534 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4535 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4537 if (cb == user_cb) {
4538 /* Remove the user cb from the callback list. */
4539 *prev_cb = cb->next;
4544 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4550 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4551 const struct rte_eth_rxtx_callback *user_cb)
4553 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4556 /* Check input parameters. */
4557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4558 if (user_cb == NULL ||
4559 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4562 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4564 struct rte_eth_rxtx_callback *cb;
4565 struct rte_eth_rxtx_callback **prev_cb;
4567 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4568 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4569 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4571 if (cb == user_cb) {
4572 /* Remove the user cb from the callback list. */
4573 *prev_cb = cb->next;
4578 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4584 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4585 struct rte_eth_rxq_info *qinfo)
4587 struct rte_eth_dev *dev;
4589 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4594 dev = &rte_eth_devices[port_id];
4595 if (queue_id >= dev->data->nb_rx_queues) {
4596 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4600 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4601 RTE_ETHDEV_LOG(INFO,
4602 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4609 memset(qinfo, 0, sizeof(*qinfo));
4610 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4615 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4616 struct rte_eth_txq_info *qinfo)
4618 struct rte_eth_dev *dev;
4620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4625 dev = &rte_eth_devices[port_id];
4626 if (queue_id >= dev->data->nb_tx_queues) {
4627 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4631 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4632 RTE_ETHDEV_LOG(INFO,
4633 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4640 memset(qinfo, 0, sizeof(*qinfo));
4641 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4647 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4648 struct rte_eth_burst_mode *mode)
4650 struct rte_eth_dev *dev;
4652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4657 dev = &rte_eth_devices[port_id];
4659 if (queue_id >= dev->data->nb_rx_queues) {
4660 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4665 memset(mode, 0, sizeof(*mode));
4666 return eth_err(port_id,
4667 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4671 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4672 struct rte_eth_burst_mode *mode)
4674 struct rte_eth_dev *dev;
4676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4681 dev = &rte_eth_devices[port_id];
4683 if (queue_id >= dev->data->nb_tx_queues) {
4684 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4689 memset(mode, 0, sizeof(*mode));
4690 return eth_err(port_id,
4691 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4695 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4696 struct rte_ether_addr *mc_addr_set,
4697 uint32_t nb_mc_addr)
4699 struct rte_eth_dev *dev;
4701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4703 dev = &rte_eth_devices[port_id];
4704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4705 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4706 mc_addr_set, nb_mc_addr));
4710 rte_eth_timesync_enable(uint16_t port_id)
4712 struct rte_eth_dev *dev;
4714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4715 dev = &rte_eth_devices[port_id];
4717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4718 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4722 rte_eth_timesync_disable(uint16_t port_id)
4724 struct rte_eth_dev *dev;
4726 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4727 dev = &rte_eth_devices[port_id];
4729 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4730 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4734 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4737 struct rte_eth_dev *dev;
4739 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4740 dev = &rte_eth_devices[port_id];
4742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4743 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4744 (dev, timestamp, flags));
4748 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4749 struct timespec *timestamp)
4751 struct rte_eth_dev *dev;
4753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4754 dev = &rte_eth_devices[port_id];
4756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4757 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4762 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4764 struct rte_eth_dev *dev;
4766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4767 dev = &rte_eth_devices[port_id];
4769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4770 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4775 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4777 struct rte_eth_dev *dev;
4779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4780 dev = &rte_eth_devices[port_id];
4782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4783 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4788 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4790 struct rte_eth_dev *dev;
4792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4793 dev = &rte_eth_devices[port_id];
4795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4796 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4801 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4803 struct rte_eth_dev *dev;
4805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4806 dev = &rte_eth_devices[port_id];
4808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4809 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4813 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4815 struct rte_eth_dev *dev;
4817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4819 dev = &rte_eth_devices[port_id];
4820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4821 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4825 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4827 struct rte_eth_dev *dev;
4829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4831 dev = &rte_eth_devices[port_id];
4832 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4833 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4837 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4839 struct rte_eth_dev *dev;
4841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4843 dev = &rte_eth_devices[port_id];
4844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4845 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4849 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4851 struct rte_eth_dev *dev;
4853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4855 dev = &rte_eth_devices[port_id];
4856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4857 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4861 rte_eth_dev_get_module_info(uint16_t port_id,
4862 struct rte_eth_dev_module_info *modinfo)
4864 struct rte_eth_dev *dev;
4866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4868 dev = &rte_eth_devices[port_id];
4869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4870 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4874 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4875 struct rte_dev_eeprom_info *info)
4877 struct rte_eth_dev *dev;
4879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4881 dev = &rte_eth_devices[port_id];
4882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4883 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4887 rte_eth_dev_get_dcb_info(uint16_t port_id,
4888 struct rte_eth_dcb_info *dcb_info)
4890 struct rte_eth_dev *dev;
4892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4894 dev = &rte_eth_devices[port_id];
4895 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4898 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4902 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4903 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4905 struct rte_eth_dev *dev;
4907 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4908 if (l2_tunnel == NULL) {
4909 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4913 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4914 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4918 dev = &rte_eth_devices[port_id];
4919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4921 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4926 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4927 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4931 struct rte_eth_dev *dev;
4933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4935 if (l2_tunnel == NULL) {
4936 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4940 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4941 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4946 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4950 dev = &rte_eth_devices[port_id];
4951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4953 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4954 l2_tunnel, mask, en));
4958 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4959 const struct rte_eth_desc_lim *desc_lim)
4961 if (desc_lim->nb_align != 0)
4962 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4964 if (desc_lim->nb_max != 0)
4965 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4967 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4971 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4972 uint16_t *nb_rx_desc,
4973 uint16_t *nb_tx_desc)
4975 struct rte_eth_dev_info dev_info;
4978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4980 ret = rte_eth_dev_info_get(port_id, &dev_info);
4984 if (nb_rx_desc != NULL)
4985 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4987 if (nb_tx_desc != NULL)
4988 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4994 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
4995 struct rte_eth_hairpin_cap *cap)
4997 struct rte_eth_dev *dev;
4999 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5001 dev = &rte_eth_devices[port_id];
5002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5003 memset(cap, 0, sizeof(*cap));
5004 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5008 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5010 if (dev->data->rx_queue_state[queue_id] ==
5011 RTE_ETH_QUEUE_STATE_HAIRPIN)
5017 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5019 if (dev->data->tx_queue_state[queue_id] ==
5020 RTE_ETH_QUEUE_STATE_HAIRPIN)
5026 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5028 struct rte_eth_dev *dev;
5030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5035 dev = &rte_eth_devices[port_id];
5037 if (*dev->dev_ops->pool_ops_supported == NULL)
5038 return 1; /* all pools are supported */
5040 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5044 * A set of values to describe the possible states of a switch domain.
5046 enum rte_eth_switch_domain_state {
5047 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5048 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5052 * Array of switch domains available for allocation. Array is sized to
5053 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5054 * ethdev ports in a single process.
5056 static struct rte_eth_dev_switch {
5057 enum rte_eth_switch_domain_state state;
5058 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5061 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5065 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5067 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5068 if (rte_eth_switch_domains[i].state ==
5069 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5070 rte_eth_switch_domains[i].state =
5071 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5081 rte_eth_switch_domain_free(uint16_t domain_id)
5083 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5084 domain_id >= RTE_MAX_ETHPORTS)
5087 if (rte_eth_switch_domains[domain_id].state !=
5088 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5091 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5097 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5100 struct rte_kvargs_pair *pair;
5103 arglist->str = strdup(str_in);
5104 if (arglist->str == NULL)
5107 letter = arglist->str;
5110 pair = &arglist->pairs[0];
5113 case 0: /* Initial */
5116 else if (*letter == '\0')
5123 case 1: /* Parsing key */
5124 if (*letter == '=') {
5126 pair->value = letter + 1;
5128 } else if (*letter == ',' || *letter == '\0')
5133 case 2: /* Parsing value */
5136 else if (*letter == ',') {
5139 pair = &arglist->pairs[arglist->count];
5141 } else if (*letter == '\0') {
5144 pair = &arglist->pairs[arglist->count];
5149 case 3: /* Parsing list */
5152 else if (*letter == '\0')
5161 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5163 struct rte_kvargs args;
5164 struct rte_kvargs_pair *pair;
5168 memset(eth_da, 0, sizeof(*eth_da));
5170 result = rte_eth_devargs_tokenise(&args, dargs);
5174 for (i = 0; i < args.count; i++) {
5175 pair = &args.pairs[i];
5176 if (strcmp("representor", pair->key) == 0) {
5177 result = rte_eth_devargs_parse_list(pair->value,
5178 rte_eth_devargs_parse_representor_ports,
5192 RTE_INIT(ethdev_init_log)
5194 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
5195 if (rte_eth_dev_logtype >= 0)
5196 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);