1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
696 rte_eth_dev_shared_data_prepare();
698 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
700 if (rte_eth_is_valid_owner_id(owner_id)) {
701 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
702 if (rte_eth_devices[port_id].data->owner.id == owner_id)
703 memset(&rte_eth_devices[port_id].data->owner, 0,
704 sizeof(struct rte_eth_dev_owner));
705 RTE_ETHDEV_LOG(NOTICE,
706 "All port owners owned by %016"PRIx64" identifier have removed\n",
710 "Invalid owner id=%016"PRIx64"\n",
715 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
721 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
724 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
726 rte_eth_dev_shared_data_prepare();
728 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
730 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
731 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
735 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
738 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
743 rte_eth_dev_socket_id(uint16_t port_id)
745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
746 return rte_eth_devices[port_id].data->numa_node;
750 rte_eth_dev_get_sec_ctx(uint16_t port_id)
752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
753 return rte_eth_devices[port_id].security_ctx;
757 rte_eth_dev_count(void)
759 return rte_eth_dev_count_avail();
763 rte_eth_dev_count_avail(void)
770 RTE_ETH_FOREACH_DEV(p)
777 rte_eth_dev_count_total(void)
779 uint16_t port, count = 0;
781 RTE_ETH_FOREACH_VALID_DEV(port)
788 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
795 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
799 /* shouldn't check 'rte_eth_devices[i].data',
800 * because it might be overwritten by VDEV PMD */
801 tmp = rte_eth_dev_shared_data->data[port_id].name;
807 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
812 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
816 RTE_ETH_FOREACH_VALID_DEV(pid)
817 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
826 eth_err(uint16_t port_id, int ret)
830 if (rte_eth_dev_is_removed(port_id))
836 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
838 uint16_t old_nb_queues = dev->data->nb_rx_queues;
842 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
843 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
844 sizeof(dev->data->rx_queues[0]) * nb_queues,
845 RTE_CACHE_LINE_SIZE);
846 if (dev->data->rx_queues == NULL) {
847 dev->data->nb_rx_queues = 0;
850 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
853 rxq = dev->data->rx_queues;
855 for (i = nb_queues; i < old_nb_queues; i++)
856 (*dev->dev_ops->rx_queue_release)(rxq[i]);
857 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
858 RTE_CACHE_LINE_SIZE);
861 if (nb_queues > old_nb_queues) {
862 uint16_t new_qs = nb_queues - old_nb_queues;
864 memset(rxq + old_nb_queues, 0,
865 sizeof(rxq[0]) * new_qs);
868 dev->data->rx_queues = rxq;
870 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
873 rxq = dev->data->rx_queues;
875 for (i = nb_queues; i < old_nb_queues; i++)
876 (*dev->dev_ops->rx_queue_release)(rxq[i]);
878 rte_free(dev->data->rx_queues);
879 dev->data->rx_queues = NULL;
881 dev->data->nb_rx_queues = nb_queues;
886 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
888 struct rte_eth_dev *dev;
890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
892 dev = &rte_eth_devices[port_id];
893 if (!dev->data->dev_started) {
895 "Port %u must be started before start any queue\n",
900 if (rx_queue_id >= dev->data->nb_rx_queues) {
901 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
907 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
909 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
910 rx_queue_id, port_id);
914 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
920 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
922 struct rte_eth_dev *dev;
924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926 dev = &rte_eth_devices[port_id];
927 if (rx_queue_id >= dev->data->nb_rx_queues) {
928 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
934 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
936 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
937 rx_queue_id, port_id);
941 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
946 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
948 struct rte_eth_dev *dev;
950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
952 dev = &rte_eth_devices[port_id];
953 if (!dev->data->dev_started) {
955 "Port %u must be started before start any queue\n",
960 if (tx_queue_id >= dev->data->nb_tx_queues) {
961 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
967 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
969 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
970 tx_queue_id, port_id);
974 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
978 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
980 struct rte_eth_dev *dev;
982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
984 dev = &rte_eth_devices[port_id];
985 if (tx_queue_id >= dev->data->nb_tx_queues) {
986 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
992 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
994 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
995 tx_queue_id, port_id);
999 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1004 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1006 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1010 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1011 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1012 sizeof(dev->data->tx_queues[0]) * nb_queues,
1013 RTE_CACHE_LINE_SIZE);
1014 if (dev->data->tx_queues == NULL) {
1015 dev->data->nb_tx_queues = 0;
1018 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1021 txq = dev->data->tx_queues;
1023 for (i = nb_queues; i < old_nb_queues; i++)
1024 (*dev->dev_ops->tx_queue_release)(txq[i]);
1025 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1026 RTE_CACHE_LINE_SIZE);
1029 if (nb_queues > old_nb_queues) {
1030 uint16_t new_qs = nb_queues - old_nb_queues;
1032 memset(txq + old_nb_queues, 0,
1033 sizeof(txq[0]) * new_qs);
1036 dev->data->tx_queues = txq;
1038 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1041 txq = dev->data->tx_queues;
1043 for (i = nb_queues; i < old_nb_queues; i++)
1044 (*dev->dev_ops->tx_queue_release)(txq[i]);
1046 rte_free(dev->data->tx_queues);
1047 dev->data->tx_queues = NULL;
1049 dev->data->nb_tx_queues = nb_queues;
1054 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1057 case ETH_SPEED_NUM_10M:
1058 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1059 case ETH_SPEED_NUM_100M:
1060 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1061 case ETH_SPEED_NUM_1G:
1062 return ETH_LINK_SPEED_1G;
1063 case ETH_SPEED_NUM_2_5G:
1064 return ETH_LINK_SPEED_2_5G;
1065 case ETH_SPEED_NUM_5G:
1066 return ETH_LINK_SPEED_5G;
1067 case ETH_SPEED_NUM_10G:
1068 return ETH_LINK_SPEED_10G;
1069 case ETH_SPEED_NUM_20G:
1070 return ETH_LINK_SPEED_20G;
1071 case ETH_SPEED_NUM_25G:
1072 return ETH_LINK_SPEED_25G;
1073 case ETH_SPEED_NUM_40G:
1074 return ETH_LINK_SPEED_40G;
1075 case ETH_SPEED_NUM_50G:
1076 return ETH_LINK_SPEED_50G;
1077 case ETH_SPEED_NUM_56G:
1078 return ETH_LINK_SPEED_56G;
1079 case ETH_SPEED_NUM_100G:
1080 return ETH_LINK_SPEED_100G;
1087 rte_eth_dev_rx_offload_name(uint64_t offload)
1089 const char *name = "UNKNOWN";
1092 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1093 if (offload == rte_rx_offload_names[i].offload) {
1094 name = rte_rx_offload_names[i].name;
1103 rte_eth_dev_tx_offload_name(uint64_t offload)
1105 const char *name = "UNKNOWN";
1108 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1109 if (offload == rte_tx_offload_names[i].offload) {
1110 name = rte_tx_offload_names[i].name;
1119 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1120 const struct rte_eth_conf *dev_conf)
1122 struct rte_eth_dev *dev;
1123 struct rte_eth_dev_info dev_info;
1124 struct rte_eth_conf orig_conf;
1128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1130 dev = &rte_eth_devices[port_id];
1132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1134 if (dev->data->dev_started) {
1136 "Port %u must be stopped to allow configuration\n",
1141 /* Store original config, as rollback required on failure */
1142 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1145 * Copy the dev_conf parameter into the dev structure.
1146 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1148 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1150 ret = rte_eth_dev_info_get(port_id, &dev_info);
1154 /* If number of queues specified by application for both Rx and Tx is
1155 * zero, use driver preferred values. This cannot be done individually
1156 * as it is valid for either Tx or Rx (but not both) to be zero.
1157 * If driver does not provide any preferred valued, fall back on
1160 if (nb_rx_q == 0 && nb_tx_q == 0) {
1161 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1163 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1164 nb_tx_q = dev_info.default_txportconf.nb_queues;
1166 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1169 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1171 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1172 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1177 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1179 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1180 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1186 * Check that the numbers of RX and TX queues are not greater
1187 * than the maximum number of RX and TX queues supported by the
1188 * configured device.
1190 if (nb_rx_q > dev_info.max_rx_queues) {
1191 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1192 port_id, nb_rx_q, dev_info.max_rx_queues);
1197 if (nb_tx_q > dev_info.max_tx_queues) {
1198 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1199 port_id, nb_tx_q, dev_info.max_tx_queues);
1204 /* Check that the device supports requested interrupts */
1205 if ((dev_conf->intr_conf.lsc == 1) &&
1206 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1207 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1208 dev->device->driver->name);
1212 if ((dev_conf->intr_conf.rmv == 1) &&
1213 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1214 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1215 dev->device->driver->name);
1221 * If jumbo frames are enabled, check that the maximum RX packet
1222 * length is supported by the configured device.
1224 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1225 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1227 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1228 port_id, dev_conf->rxmode.max_rx_pkt_len,
1229 dev_info.max_rx_pktlen);
1232 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1234 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1235 port_id, dev_conf->rxmode.max_rx_pkt_len,
1236 (unsigned int)RTE_ETHER_MIN_LEN);
1241 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1242 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1243 /* Use default value */
1244 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1248 /* Any requested offloading must be within its device capabilities */
1249 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1250 dev_conf->rxmode.offloads) {
1252 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1253 "capabilities 0x%"PRIx64" in %s()\n",
1254 port_id, dev_conf->rxmode.offloads,
1255 dev_info.rx_offload_capa,
1260 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1261 dev_conf->txmode.offloads) {
1263 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1264 "capabilities 0x%"PRIx64" in %s()\n",
1265 port_id, dev_conf->txmode.offloads,
1266 dev_info.tx_offload_capa,
1272 /* Check that device supports requested rss hash functions. */
1273 if ((dev_info.flow_type_rss_offloads |
1274 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1275 dev_info.flow_type_rss_offloads) {
1277 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1278 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1279 dev_info.flow_type_rss_offloads);
1285 * Setup new number of RX/TX queues and reconfigure device.
1287 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1290 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1296 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1299 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1301 rte_eth_dev_rx_queue_config(dev, 0);
1306 diag = (*dev->dev_ops->dev_configure)(dev);
1308 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1310 rte_eth_dev_rx_queue_config(dev, 0);
1311 rte_eth_dev_tx_queue_config(dev, 0);
1312 ret = eth_err(port_id, diag);
1316 /* Initialize Rx profiling if enabled at compilation time. */
1317 diag = __rte_eth_dev_profile_init(port_id, dev);
1319 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1321 rte_eth_dev_rx_queue_config(dev, 0);
1322 rte_eth_dev_tx_queue_config(dev, 0);
1323 ret = eth_err(port_id, diag);
1330 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1336 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1338 if (dev->data->dev_started) {
1339 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1340 dev->data->port_id);
1344 rte_eth_dev_rx_queue_config(dev, 0);
1345 rte_eth_dev_tx_queue_config(dev, 0);
1347 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1351 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1352 struct rte_eth_dev_info *dev_info)
1354 struct rte_ether_addr *addr;
1359 /* replay MAC address configuration including default MAC */
1360 addr = &dev->data->mac_addrs[0];
1361 if (*dev->dev_ops->mac_addr_set != NULL)
1362 (*dev->dev_ops->mac_addr_set)(dev, addr);
1363 else if (*dev->dev_ops->mac_addr_add != NULL)
1364 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1366 if (*dev->dev_ops->mac_addr_add != NULL) {
1367 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1368 addr = &dev->data->mac_addrs[i];
1370 /* skip zero address */
1371 if (rte_is_zero_ether_addr(addr))
1375 pool_mask = dev->data->mac_pool_sel[i];
1378 if (pool_mask & 1ULL)
1379 (*dev->dev_ops->mac_addr_add)(dev,
1383 } while (pool_mask);
1389 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1390 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1394 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1395 rte_eth_dev_mac_restore(dev, dev_info);
1397 /* replay promiscuous configuration */
1399 * use callbacks directly since we don't need port_id check and
1400 * would like to bypass the same value set
1402 if (rte_eth_promiscuous_get(port_id) == 1 &&
1403 *dev->dev_ops->promiscuous_enable != NULL) {
1404 ret = eth_err(port_id,
1405 (*dev->dev_ops->promiscuous_enable)(dev));
1406 if (ret != 0 && ret != -ENOTSUP) {
1408 "Failed to enable promiscuous mode for device (port %u): %s\n",
1409 port_id, rte_strerror(-ret));
1412 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1413 *dev->dev_ops->promiscuous_disable != NULL) {
1414 ret = eth_err(port_id,
1415 (*dev->dev_ops->promiscuous_disable)(dev));
1416 if (ret != 0 && ret != -ENOTSUP) {
1418 "Failed to disable promiscuous mode for device (port %u): %s\n",
1419 port_id, rte_strerror(-ret));
1424 /* replay all multicast configuration */
1426 * use callbacks directly since we don't need port_id check and
1427 * would like to bypass the same value set
1429 if (rte_eth_allmulticast_get(port_id) == 1 &&
1430 *dev->dev_ops->allmulticast_enable != NULL) {
1431 ret = eth_err(port_id,
1432 (*dev->dev_ops->allmulticast_enable)(dev));
1433 if (ret != 0 && ret != -ENOTSUP) {
1435 "Failed to enable allmulticast mode for device (port %u): %s\n",
1436 port_id, rte_strerror(-ret));
1439 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1440 *dev->dev_ops->allmulticast_disable != NULL) {
1441 ret = eth_err(port_id,
1442 (*dev->dev_ops->allmulticast_disable)(dev));
1443 if (ret != 0 && ret != -ENOTSUP) {
1445 "Failed to disable allmulticast mode for device (port %u): %s\n",
1446 port_id, rte_strerror(-ret));
1455 rte_eth_dev_start(uint16_t port_id)
1457 struct rte_eth_dev *dev;
1458 struct rte_eth_dev_info dev_info;
1462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1464 dev = &rte_eth_devices[port_id];
1466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1468 if (dev->data->dev_started != 0) {
1469 RTE_ETHDEV_LOG(INFO,
1470 "Device with port_id=%"PRIu16" already started\n",
1475 ret = rte_eth_dev_info_get(port_id, &dev_info);
1479 /* Lets restore MAC now if device does not support live change */
1480 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1481 rte_eth_dev_mac_restore(dev, &dev_info);
1483 diag = (*dev->dev_ops->dev_start)(dev);
1485 dev->data->dev_started = 1;
1487 return eth_err(port_id, diag);
1489 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1492 "Error during restoring configuration for device (port %u): %s\n",
1493 port_id, rte_strerror(-ret));
1494 rte_eth_dev_stop(port_id);
1498 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1500 (*dev->dev_ops->link_update)(dev, 0);
1506 rte_eth_dev_stop(uint16_t port_id)
1508 struct rte_eth_dev *dev;
1510 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1511 dev = &rte_eth_devices[port_id];
1513 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1515 if (dev->data->dev_started == 0) {
1516 RTE_ETHDEV_LOG(INFO,
1517 "Device with port_id=%"PRIu16" already stopped\n",
1522 dev->data->dev_started = 0;
1523 (*dev->dev_ops->dev_stop)(dev);
1527 rte_eth_dev_set_link_up(uint16_t port_id)
1529 struct rte_eth_dev *dev;
1531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1533 dev = &rte_eth_devices[port_id];
1535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1536 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1540 rte_eth_dev_set_link_down(uint16_t port_id)
1542 struct rte_eth_dev *dev;
1544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1546 dev = &rte_eth_devices[port_id];
1548 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1549 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1553 rte_eth_dev_close(uint16_t port_id)
1555 struct rte_eth_dev *dev;
1557 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1558 dev = &rte_eth_devices[port_id];
1560 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1561 dev->data->dev_started = 0;
1562 (*dev->dev_ops->dev_close)(dev);
1564 /* check behaviour flag - temporary for PMD migration */
1565 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1566 /* new behaviour: send event + reset state + free all data */
1567 rte_eth_dev_release_port(dev);
1570 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1571 "The driver %s should migrate to the new behaviour.\n",
1572 dev->device->driver->name);
1573 /* old behaviour: only free queue arrays */
1574 dev->data->nb_rx_queues = 0;
1575 rte_free(dev->data->rx_queues);
1576 dev->data->rx_queues = NULL;
1577 dev->data->nb_tx_queues = 0;
1578 rte_free(dev->data->tx_queues);
1579 dev->data->tx_queues = NULL;
1583 rte_eth_dev_reset(uint16_t port_id)
1585 struct rte_eth_dev *dev;
1588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1589 dev = &rte_eth_devices[port_id];
1591 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1593 rte_eth_dev_stop(port_id);
1594 ret = dev->dev_ops->dev_reset(dev);
1596 return eth_err(port_id, ret);
1600 rte_eth_dev_is_removed(uint16_t port_id)
1602 struct rte_eth_dev *dev;
1605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1607 dev = &rte_eth_devices[port_id];
1609 if (dev->state == RTE_ETH_DEV_REMOVED)
1612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1614 ret = dev->dev_ops->is_removed(dev);
1616 /* Device is physically removed. */
1617 dev->state = RTE_ETH_DEV_REMOVED;
1623 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1624 uint16_t nb_rx_desc, unsigned int socket_id,
1625 const struct rte_eth_rxconf *rx_conf,
1626 struct rte_mempool *mp)
1629 uint32_t mbp_buf_size;
1630 struct rte_eth_dev *dev;
1631 struct rte_eth_dev_info dev_info;
1632 struct rte_eth_rxconf local_conf;
1635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1637 dev = &rte_eth_devices[port_id];
1638 if (rx_queue_id >= dev->data->nb_rx_queues) {
1639 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1644 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1648 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1651 * Check the size of the mbuf data buffer.
1652 * This value must be provided in the private data of the memory pool.
1653 * First check that the memory pool has a valid private data.
1655 ret = rte_eth_dev_info_get(port_id, &dev_info);
1659 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1660 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1661 mp->name, (int)mp->private_data_size,
1662 (int)sizeof(struct rte_pktmbuf_pool_private));
1665 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1667 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1669 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1670 mp->name, (int)mbp_buf_size,
1671 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1672 (int)RTE_PKTMBUF_HEADROOM,
1673 (int)dev_info.min_rx_bufsize);
1677 /* Use default specified by driver, if nb_rx_desc is zero */
1678 if (nb_rx_desc == 0) {
1679 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1680 /* If driver default is also zero, fall back on EAL default */
1681 if (nb_rx_desc == 0)
1682 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1685 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1686 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1687 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1690 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1691 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1692 dev_info.rx_desc_lim.nb_min,
1693 dev_info.rx_desc_lim.nb_align);
1697 if (dev->data->dev_started &&
1698 !(dev_info.dev_capa &
1699 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1702 if (dev->data->dev_started &&
1703 (dev->data->rx_queue_state[rx_queue_id] !=
1704 RTE_ETH_QUEUE_STATE_STOPPED))
1707 rxq = dev->data->rx_queues;
1708 if (rxq[rx_queue_id]) {
1709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1711 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1712 rxq[rx_queue_id] = NULL;
1715 if (rx_conf == NULL)
1716 rx_conf = &dev_info.default_rxconf;
1718 local_conf = *rx_conf;
1721 * If an offloading has already been enabled in
1722 * rte_eth_dev_configure(), it has been enabled on all queues,
1723 * so there is no need to enable it in this queue again.
1724 * The local_conf.offloads input to underlying PMD only carries
1725 * those offloadings which are only enabled on this queue and
1726 * not enabled on all queues.
1728 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1731 * New added offloadings for this queue are those not enabled in
1732 * rte_eth_dev_configure() and they must be per-queue type.
1733 * A pure per-port offloading can't be enabled on a queue while
1734 * disabled on another queue. A pure per-port offloading can't
1735 * be enabled for any queue as new added one if it hasn't been
1736 * enabled in rte_eth_dev_configure().
1738 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1739 local_conf.offloads) {
1741 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1742 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1743 port_id, rx_queue_id, local_conf.offloads,
1744 dev_info.rx_queue_offload_capa,
1749 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1750 socket_id, &local_conf, mp);
1752 if (!dev->data->min_rx_buf_size ||
1753 dev->data->min_rx_buf_size > mbp_buf_size)
1754 dev->data->min_rx_buf_size = mbp_buf_size;
1757 return eth_err(port_id, ret);
1761 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1762 uint16_t nb_tx_desc, unsigned int socket_id,
1763 const struct rte_eth_txconf *tx_conf)
1765 struct rte_eth_dev *dev;
1766 struct rte_eth_dev_info dev_info;
1767 struct rte_eth_txconf local_conf;
1771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1773 dev = &rte_eth_devices[port_id];
1774 if (tx_queue_id >= dev->data->nb_tx_queues) {
1775 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1781 ret = rte_eth_dev_info_get(port_id, &dev_info);
1785 /* Use default specified by driver, if nb_tx_desc is zero */
1786 if (nb_tx_desc == 0) {
1787 nb_tx_desc = dev_info.default_txportconf.ring_size;
1788 /* If driver default is zero, fall back on EAL default */
1789 if (nb_tx_desc == 0)
1790 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1792 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1793 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1794 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1796 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1797 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1798 dev_info.tx_desc_lim.nb_min,
1799 dev_info.tx_desc_lim.nb_align);
1803 if (dev->data->dev_started &&
1804 !(dev_info.dev_capa &
1805 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1808 if (dev->data->dev_started &&
1809 (dev->data->tx_queue_state[tx_queue_id] !=
1810 RTE_ETH_QUEUE_STATE_STOPPED))
1813 txq = dev->data->tx_queues;
1814 if (txq[tx_queue_id]) {
1815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1817 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1818 txq[tx_queue_id] = NULL;
1821 if (tx_conf == NULL)
1822 tx_conf = &dev_info.default_txconf;
1824 local_conf = *tx_conf;
1827 * If an offloading has already been enabled in
1828 * rte_eth_dev_configure(), it has been enabled on all queues,
1829 * so there is no need to enable it in this queue again.
1830 * The local_conf.offloads input to underlying PMD only carries
1831 * those offloadings which are only enabled on this queue and
1832 * not enabled on all queues.
1834 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1837 * New added offloadings for this queue are those not enabled in
1838 * rte_eth_dev_configure() and they must be per-queue type.
1839 * A pure per-port offloading can't be enabled on a queue while
1840 * disabled on another queue. A pure per-port offloading can't
1841 * be enabled for any queue as new added one if it hasn't been
1842 * enabled in rte_eth_dev_configure().
1844 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1845 local_conf.offloads) {
1847 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1848 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1849 port_id, tx_queue_id, local_conf.offloads,
1850 dev_info.tx_queue_offload_capa,
1855 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1856 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1860 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1861 void *userdata __rte_unused)
1865 for (i = 0; i < unsent; i++)
1866 rte_pktmbuf_free(pkts[i]);
1870 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1873 uint64_t *count = userdata;
1876 for (i = 0; i < unsent; i++)
1877 rte_pktmbuf_free(pkts[i]);
1883 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1884 buffer_tx_error_fn cbfn, void *userdata)
1886 buffer->error_callback = cbfn;
1887 buffer->error_userdata = userdata;
1892 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1899 buffer->size = size;
1900 if (buffer->error_callback == NULL) {
1901 ret = rte_eth_tx_buffer_set_err_callback(
1902 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1909 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1911 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1914 /* Validate Input Data. Bail if not valid or not supported. */
1915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1918 /* Call driver to free pending mbufs. */
1919 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1921 return eth_err(port_id, ret);
1925 rte_eth_promiscuous_enable(uint16_t port_id)
1927 struct rte_eth_dev *dev;
1930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1931 dev = &rte_eth_devices[port_id];
1933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
1935 if (dev->data->promiscuous == 0) {
1936 diag = (*dev->dev_ops->promiscuous_enable)(dev);
1937 dev->data->promiscuous = (diag == 0) ? 1 : 0;
1940 return eth_err(port_id, diag);
1944 rte_eth_promiscuous_disable(uint16_t port_id)
1946 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1950 dev = &rte_eth_devices[port_id];
1952 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
1954 if (dev->data->promiscuous == 1) {
1955 dev->data->promiscuous = 0;
1956 diag = (*dev->dev_ops->promiscuous_disable)(dev);
1958 dev->data->promiscuous = 1;
1961 return eth_err(port_id, diag);
1965 rte_eth_promiscuous_get(uint16_t port_id)
1967 struct rte_eth_dev *dev;
1969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1971 dev = &rte_eth_devices[port_id];
1972 return dev->data->promiscuous;
1976 rte_eth_allmulticast_enable(uint16_t port_id)
1978 struct rte_eth_dev *dev;
1981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1982 dev = &rte_eth_devices[port_id];
1984 if (dev->data->all_multicast == 1)
1987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
1988 diag = (*dev->dev_ops->allmulticast_enable)(dev);
1989 dev->data->all_multicast = (diag == 0) ? 1 : 0;
1991 return eth_err(port_id, diag);
1995 rte_eth_allmulticast_disable(uint16_t port_id)
1997 struct rte_eth_dev *dev;
2000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2001 dev = &rte_eth_devices[port_id];
2003 if (dev->data->all_multicast == 0)
2006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2007 dev->data->all_multicast = 0;
2008 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2010 dev->data->all_multicast = 1;
2012 return eth_err(port_id, diag);
2016 rte_eth_allmulticast_get(uint16_t port_id)
2018 struct rte_eth_dev *dev;
2020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2022 dev = &rte_eth_devices[port_id];
2023 return dev->data->all_multicast;
2027 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2029 struct rte_eth_dev *dev;
2031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2032 dev = &rte_eth_devices[port_id];
2034 if (dev->data->dev_conf.intr_conf.lsc &&
2035 dev->data->dev_started)
2036 rte_eth_linkstatus_get(dev, eth_link);
2038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2039 (*dev->dev_ops->link_update)(dev, 1);
2040 *eth_link = dev->data->dev_link;
2047 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2049 struct rte_eth_dev *dev;
2051 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2052 dev = &rte_eth_devices[port_id];
2054 if (dev->data->dev_conf.intr_conf.lsc &&
2055 dev->data->dev_started)
2056 rte_eth_linkstatus_get(dev, eth_link);
2058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2059 (*dev->dev_ops->link_update)(dev, 0);
2060 *eth_link = dev->data->dev_link;
2067 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2069 struct rte_eth_dev *dev;
2071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2073 dev = &rte_eth_devices[port_id];
2074 memset(stats, 0, sizeof(*stats));
2076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2077 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2078 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2082 rte_eth_stats_reset(uint16_t port_id)
2084 struct rte_eth_dev *dev;
2087 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2088 dev = &rte_eth_devices[port_id];
2090 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2091 ret = (*dev->dev_ops->stats_reset)(dev);
2093 return eth_err(port_id, ret);
2095 dev->data->rx_mbuf_alloc_failed = 0;
2101 get_xstats_basic_count(struct rte_eth_dev *dev)
2103 uint16_t nb_rxqs, nb_txqs;
2106 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2107 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2109 count = RTE_NB_STATS;
2110 count += nb_rxqs * RTE_NB_RXQ_STATS;
2111 count += nb_txqs * RTE_NB_TXQ_STATS;
2117 get_xstats_count(uint16_t port_id)
2119 struct rte_eth_dev *dev;
2122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2123 dev = &rte_eth_devices[port_id];
2124 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2125 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2128 return eth_err(port_id, count);
2130 if (dev->dev_ops->xstats_get_names != NULL) {
2131 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2133 return eth_err(port_id, count);
2138 count += get_xstats_basic_count(dev);
2144 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2147 int cnt_xstats, idx_xstat;
2149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2152 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2157 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2162 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2163 if (cnt_xstats < 0) {
2164 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2168 /* Get id-name lookup table */
2169 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2171 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2172 port_id, xstats_names, cnt_xstats, NULL)) {
2173 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2177 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2178 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2187 /* retrieve basic stats names */
2189 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2190 struct rte_eth_xstat_name *xstats_names)
2192 int cnt_used_entries = 0;
2193 uint32_t idx, id_queue;
2196 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2197 strlcpy(xstats_names[cnt_used_entries].name,
2198 rte_stats_strings[idx].name,
2199 sizeof(xstats_names[0].name));
2202 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2203 for (id_queue = 0; id_queue < num_q; id_queue++) {
2204 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2205 snprintf(xstats_names[cnt_used_entries].name,
2206 sizeof(xstats_names[0].name),
2208 id_queue, rte_rxq_stats_strings[idx].name);
2213 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2214 for (id_queue = 0; id_queue < num_q; id_queue++) {
2215 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2216 snprintf(xstats_names[cnt_used_entries].name,
2217 sizeof(xstats_names[0].name),
2219 id_queue, rte_txq_stats_strings[idx].name);
2223 return cnt_used_entries;
2226 /* retrieve ethdev extended statistics names */
2228 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2229 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2232 struct rte_eth_xstat_name *xstats_names_copy;
2233 unsigned int no_basic_stat_requested = 1;
2234 unsigned int no_ext_stat_requested = 1;
2235 unsigned int expected_entries;
2236 unsigned int basic_count;
2237 struct rte_eth_dev *dev;
2241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2242 dev = &rte_eth_devices[port_id];
2244 basic_count = get_xstats_basic_count(dev);
2245 ret = get_xstats_count(port_id);
2248 expected_entries = (unsigned int)ret;
2250 /* Return max number of stats if no ids given */
2253 return expected_entries;
2254 else if (xstats_names && size < expected_entries)
2255 return expected_entries;
2258 if (ids && !xstats_names)
2261 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2262 uint64_t ids_copy[size];
2264 for (i = 0; i < size; i++) {
2265 if (ids[i] < basic_count) {
2266 no_basic_stat_requested = 0;
2271 * Convert ids to xstats ids that PMD knows.
2272 * ids known by user are basic + extended stats.
2274 ids_copy[i] = ids[i] - basic_count;
2277 if (no_basic_stat_requested)
2278 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2279 xstats_names, ids_copy, size);
2282 /* Retrieve all stats */
2284 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2286 if (num_stats < 0 || num_stats > (int)expected_entries)
2289 return expected_entries;
2292 xstats_names_copy = calloc(expected_entries,
2293 sizeof(struct rte_eth_xstat_name));
2295 if (!xstats_names_copy) {
2296 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2301 for (i = 0; i < size; i++) {
2302 if (ids[i] >= basic_count) {
2303 no_ext_stat_requested = 0;
2309 /* Fill xstats_names_copy structure */
2310 if (ids && no_ext_stat_requested) {
2311 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2313 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2316 free(xstats_names_copy);
2322 for (i = 0; i < size; i++) {
2323 if (ids[i] >= expected_entries) {
2324 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2325 free(xstats_names_copy);
2328 xstats_names[i] = xstats_names_copy[ids[i]];
2331 free(xstats_names_copy);
2336 rte_eth_xstats_get_names(uint16_t port_id,
2337 struct rte_eth_xstat_name *xstats_names,
2340 struct rte_eth_dev *dev;
2341 int cnt_used_entries;
2342 int cnt_expected_entries;
2343 int cnt_driver_entries;
2345 cnt_expected_entries = get_xstats_count(port_id);
2346 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2347 (int)size < cnt_expected_entries)
2348 return cnt_expected_entries;
2350 /* port_id checked in get_xstats_count() */
2351 dev = &rte_eth_devices[port_id];
2353 cnt_used_entries = rte_eth_basic_stats_get_names(
2356 if (dev->dev_ops->xstats_get_names != NULL) {
2357 /* If there are any driver-specific xstats, append them
2360 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2362 xstats_names + cnt_used_entries,
2363 size - cnt_used_entries);
2364 if (cnt_driver_entries < 0)
2365 return eth_err(port_id, cnt_driver_entries);
2366 cnt_used_entries += cnt_driver_entries;
2369 return cnt_used_entries;
2374 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2376 struct rte_eth_dev *dev;
2377 struct rte_eth_stats eth_stats;
2378 unsigned int count = 0, i, q;
2379 uint64_t val, *stats_ptr;
2380 uint16_t nb_rxqs, nb_txqs;
2383 ret = rte_eth_stats_get(port_id, ð_stats);
2387 dev = &rte_eth_devices[port_id];
2389 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2390 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2393 for (i = 0; i < RTE_NB_STATS; i++) {
2394 stats_ptr = RTE_PTR_ADD(ð_stats,
2395 rte_stats_strings[i].offset);
2397 xstats[count++].value = val;
2401 for (q = 0; q < nb_rxqs; q++) {
2402 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2403 stats_ptr = RTE_PTR_ADD(ð_stats,
2404 rte_rxq_stats_strings[i].offset +
2405 q * sizeof(uint64_t));
2407 xstats[count++].value = val;
2412 for (q = 0; q < nb_txqs; q++) {
2413 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2414 stats_ptr = RTE_PTR_ADD(ð_stats,
2415 rte_txq_stats_strings[i].offset +
2416 q * sizeof(uint64_t));
2418 xstats[count++].value = val;
2424 /* retrieve ethdev extended statistics */
2426 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2427 uint64_t *values, unsigned int size)
2429 unsigned int no_basic_stat_requested = 1;
2430 unsigned int no_ext_stat_requested = 1;
2431 unsigned int num_xstats_filled;
2432 unsigned int basic_count;
2433 uint16_t expected_entries;
2434 struct rte_eth_dev *dev;
2438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2439 ret = get_xstats_count(port_id);
2442 expected_entries = (uint16_t)ret;
2443 struct rte_eth_xstat xstats[expected_entries];
2444 dev = &rte_eth_devices[port_id];
2445 basic_count = get_xstats_basic_count(dev);
2447 /* Return max number of stats if no ids given */
2450 return expected_entries;
2451 else if (values && size < expected_entries)
2452 return expected_entries;
2458 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2459 unsigned int basic_count = get_xstats_basic_count(dev);
2460 uint64_t ids_copy[size];
2462 for (i = 0; i < size; i++) {
2463 if (ids[i] < basic_count) {
2464 no_basic_stat_requested = 0;
2469 * Convert ids to xstats ids that PMD knows.
2470 * ids known by user are basic + extended stats.
2472 ids_copy[i] = ids[i] - basic_count;
2475 if (no_basic_stat_requested)
2476 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2481 for (i = 0; i < size; i++) {
2482 if (ids[i] >= basic_count) {
2483 no_ext_stat_requested = 0;
2489 /* Fill the xstats structure */
2490 if (ids && no_ext_stat_requested)
2491 ret = rte_eth_basic_stats_get(port_id, xstats);
2493 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2497 num_xstats_filled = (unsigned int)ret;
2499 /* Return all stats */
2501 for (i = 0; i < num_xstats_filled; i++)
2502 values[i] = xstats[i].value;
2503 return expected_entries;
2507 for (i = 0; i < size; i++) {
2508 if (ids[i] >= expected_entries) {
2509 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2512 values[i] = xstats[ids[i]].value;
2518 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2521 struct rte_eth_dev *dev;
2522 unsigned int count = 0, i;
2523 signed int xcount = 0;
2524 uint16_t nb_rxqs, nb_txqs;
2527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2529 dev = &rte_eth_devices[port_id];
2531 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2532 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2534 /* Return generic statistics */
2535 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2536 (nb_txqs * RTE_NB_TXQ_STATS);
2538 /* implemented by the driver */
2539 if (dev->dev_ops->xstats_get != NULL) {
2540 /* Retrieve the xstats from the driver at the end of the
2543 xcount = (*dev->dev_ops->xstats_get)(dev,
2544 xstats ? xstats + count : NULL,
2545 (n > count) ? n - count : 0);
2548 return eth_err(port_id, xcount);
2551 if (n < count + xcount || xstats == NULL)
2552 return count + xcount;
2554 /* now fill the xstats structure */
2555 ret = rte_eth_basic_stats_get(port_id, xstats);
2560 for (i = 0; i < count; i++)
2562 /* add an offset to driver-specific stats */
2563 for ( ; i < count + xcount; i++)
2564 xstats[i].id += count;
2566 return count + xcount;
2569 /* reset ethdev extended statistics */
2571 rte_eth_xstats_reset(uint16_t port_id)
2573 struct rte_eth_dev *dev;
2575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2576 dev = &rte_eth_devices[port_id];
2578 /* implemented by the driver */
2579 if (dev->dev_ops->xstats_reset != NULL)
2580 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2582 /* fallback to default */
2583 return rte_eth_stats_reset(port_id);
2587 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2590 struct rte_eth_dev *dev;
2592 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2594 dev = &rte_eth_devices[port_id];
2596 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2598 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2601 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2604 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2607 return (*dev->dev_ops->queue_stats_mapping_set)
2608 (dev, queue_id, stat_idx, is_rx);
2613 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2616 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2617 stat_idx, STAT_QMAP_TX));
2622 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2625 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2626 stat_idx, STAT_QMAP_RX));
2630 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2632 struct rte_eth_dev *dev;
2634 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2635 dev = &rte_eth_devices[port_id];
2637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2638 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2639 fw_version, fw_size));
2643 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2645 struct rte_eth_dev *dev;
2646 const struct rte_eth_desc_lim lim = {
2647 .nb_max = UINT16_MAX,
2650 .nb_seg_max = UINT16_MAX,
2651 .nb_mtu_seg_max = UINT16_MAX,
2656 * Init dev_info before port_id check since caller does not have
2657 * return status and does not know if get is successful or not.
2659 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2661 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2662 dev = &rte_eth_devices[port_id];
2664 dev_info->rx_desc_lim = lim;
2665 dev_info->tx_desc_lim = lim;
2666 dev_info->device = dev->device;
2667 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2668 dev_info->max_mtu = UINT16_MAX;
2670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2671 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2673 /* Cleanup already filled in device information */
2674 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2675 return eth_err(port_id, diag);
2678 dev_info->driver_name = dev->device->driver->name;
2679 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2680 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2682 dev_info->dev_flags = &dev->data->dev_flags;
2688 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2689 uint32_t *ptypes, int num)
2692 struct rte_eth_dev *dev;
2693 const uint32_t *all_ptypes;
2695 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2696 dev = &rte_eth_devices[port_id];
2697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2698 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2703 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2704 if (all_ptypes[i] & ptype_mask) {
2706 ptypes[j] = all_ptypes[i];
2714 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2716 struct rte_eth_dev *dev;
2718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2719 dev = &rte_eth_devices[port_id];
2720 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2727 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2729 struct rte_eth_dev *dev;
2731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2733 dev = &rte_eth_devices[port_id];
2734 *mtu = dev->data->mtu;
2739 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2742 struct rte_eth_dev_info dev_info;
2743 struct rte_eth_dev *dev;
2745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2746 dev = &rte_eth_devices[port_id];
2747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2750 * Check if the device supports dev_infos_get, if it does not
2751 * skip min_mtu/max_mtu validation here as this requires values
2752 * that are populated within the call to rte_eth_dev_info_get()
2753 * which relies on dev->dev_ops->dev_infos_get.
2755 if (*dev->dev_ops->dev_infos_get != NULL) {
2756 ret = rte_eth_dev_info_get(port_id, &dev_info);
2760 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2764 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2766 dev->data->mtu = mtu;
2768 return eth_err(port_id, ret);
2772 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2774 struct rte_eth_dev *dev;
2777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2778 dev = &rte_eth_devices[port_id];
2779 if (!(dev->data->dev_conf.rxmode.offloads &
2780 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2781 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2786 if (vlan_id > 4095) {
2787 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2793 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2795 struct rte_vlan_filter_conf *vfc;
2799 vfc = &dev->data->vlan_filter_conf;
2800 vidx = vlan_id / 64;
2801 vbit = vlan_id % 64;
2804 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2806 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2809 return eth_err(port_id, ret);
2813 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2816 struct rte_eth_dev *dev;
2818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2819 dev = &rte_eth_devices[port_id];
2820 if (rx_queue_id >= dev->data->nb_rx_queues) {
2821 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2826 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2832 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2833 enum rte_vlan_type vlan_type,
2836 struct rte_eth_dev *dev;
2838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2839 dev = &rte_eth_devices[port_id];
2840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2842 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2847 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2849 struct rte_eth_dev *dev;
2853 uint64_t orig_offloads;
2854 uint64_t *dev_offloads;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2857 dev = &rte_eth_devices[port_id];
2859 /* save original values in case of failure */
2860 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2861 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2863 /*check which option changed by application*/
2864 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2865 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2868 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2870 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2871 mask |= ETH_VLAN_STRIP_MASK;
2874 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2875 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2878 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2880 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2881 mask |= ETH_VLAN_FILTER_MASK;
2884 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2885 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2888 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2890 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2891 mask |= ETH_VLAN_EXTEND_MASK;
2894 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2895 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2898 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2900 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2901 mask |= ETH_QINQ_STRIP_MASK;
2908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2909 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2911 /* hit an error restore original values */
2912 *dev_offloads = orig_offloads;
2915 return eth_err(port_id, ret);
2919 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2921 struct rte_eth_dev *dev;
2922 uint64_t *dev_offloads;
2925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2926 dev = &rte_eth_devices[port_id];
2927 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2929 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2930 ret |= ETH_VLAN_STRIP_OFFLOAD;
2932 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2933 ret |= ETH_VLAN_FILTER_OFFLOAD;
2935 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2936 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2938 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2939 ret |= ETH_QINQ_STRIP_OFFLOAD;
2945 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2947 struct rte_eth_dev *dev;
2949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2950 dev = &rte_eth_devices[port_id];
2951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2953 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2957 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2959 struct rte_eth_dev *dev;
2961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2962 dev = &rte_eth_devices[port_id];
2963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2964 memset(fc_conf, 0, sizeof(*fc_conf));
2965 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2969 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2971 struct rte_eth_dev *dev;
2973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2974 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2975 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2979 dev = &rte_eth_devices[port_id];
2980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2981 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2985 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2986 struct rte_eth_pfc_conf *pfc_conf)
2988 struct rte_eth_dev *dev;
2990 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2991 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2992 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2996 dev = &rte_eth_devices[port_id];
2997 /* High water, low water validation are device specific */
2998 if (*dev->dev_ops->priority_flow_ctrl_set)
2999 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3005 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3013 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3014 for (i = 0; i < num; i++) {
3015 if (reta_conf[i].mask)
3023 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3027 uint16_t i, idx, shift;
3033 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3037 for (i = 0; i < reta_size; i++) {
3038 idx = i / RTE_RETA_GROUP_SIZE;
3039 shift = i % RTE_RETA_GROUP_SIZE;
3040 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3041 (reta_conf[idx].reta[shift] >= max_rxq)) {
3043 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3045 reta_conf[idx].reta[shift], max_rxq);
3054 rte_eth_dev_rss_reta_update(uint16_t port_id,
3055 struct rte_eth_rss_reta_entry64 *reta_conf,
3058 struct rte_eth_dev *dev;
3061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3062 /* Check mask bits */
3063 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3067 dev = &rte_eth_devices[port_id];
3069 /* Check entry value */
3070 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3071 dev->data->nb_rx_queues);
3075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3076 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3081 rte_eth_dev_rss_reta_query(uint16_t port_id,
3082 struct rte_eth_rss_reta_entry64 *reta_conf,
3085 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 /* Check mask bits */
3091 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3095 dev = &rte_eth_devices[port_id];
3096 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3097 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3102 rte_eth_dev_rss_hash_update(uint16_t port_id,
3103 struct rte_eth_rss_conf *rss_conf)
3105 struct rte_eth_dev *dev;
3106 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3111 ret = rte_eth_dev_info_get(port_id, &dev_info);
3115 dev = &rte_eth_devices[port_id];
3116 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3117 dev_info.flow_type_rss_offloads) {
3119 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3120 port_id, rss_conf->rss_hf,
3121 dev_info.flow_type_rss_offloads);
3124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3125 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3130 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3131 struct rte_eth_rss_conf *rss_conf)
3133 struct rte_eth_dev *dev;
3135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3136 dev = &rte_eth_devices[port_id];
3137 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3138 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3143 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3144 struct rte_eth_udp_tunnel *udp_tunnel)
3146 struct rte_eth_dev *dev;
3148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3149 if (udp_tunnel == NULL) {
3150 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3154 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3155 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3159 dev = &rte_eth_devices[port_id];
3160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3161 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3166 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3167 struct rte_eth_udp_tunnel *udp_tunnel)
3169 struct rte_eth_dev *dev;
3171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3172 dev = &rte_eth_devices[port_id];
3174 if (udp_tunnel == NULL) {
3175 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3179 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3180 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3185 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3190 rte_eth_led_on(uint16_t port_id)
3192 struct rte_eth_dev *dev;
3194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3195 dev = &rte_eth_devices[port_id];
3196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3197 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3201 rte_eth_led_off(uint16_t port_id)
3203 struct rte_eth_dev *dev;
3205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3206 dev = &rte_eth_devices[port_id];
3207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3208 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3212 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3216 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3218 struct rte_eth_dev_info dev_info;
3219 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3223 ret = rte_eth_dev_info_get(port_id, &dev_info);
3227 for (i = 0; i < dev_info.max_mac_addrs; i++)
3228 if (memcmp(addr, &dev->data->mac_addrs[i],
3229 RTE_ETHER_ADDR_LEN) == 0)
3235 static const struct rte_ether_addr null_mac_addr;
3238 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3241 struct rte_eth_dev *dev;
3246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3247 dev = &rte_eth_devices[port_id];
3248 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3250 if (rte_is_zero_ether_addr(addr)) {
3251 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3255 if (pool >= ETH_64_POOLS) {
3256 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3260 index = get_mac_addr_index(port_id, addr);
3262 index = get_mac_addr_index(port_id, &null_mac_addr);
3264 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3269 pool_mask = dev->data->mac_pool_sel[index];
3271 /* Check if both MAC address and pool is already there, and do nothing */
3272 if (pool_mask & (1ULL << pool))
3277 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3280 /* Update address in NIC data structure */
3281 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3283 /* Update pool bitmap in NIC data structure */
3284 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3287 return eth_err(port_id, ret);
3291 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3293 struct rte_eth_dev *dev;
3296 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3297 dev = &rte_eth_devices[port_id];
3298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3300 index = get_mac_addr_index(port_id, addr);
3303 "Port %u: Cannot remove default MAC address\n",
3306 } else if (index < 0)
3307 return 0; /* Do nothing if address wasn't found */
3310 (*dev->dev_ops->mac_addr_remove)(dev, index);
3312 /* Update address in NIC data structure */
3313 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3315 /* reset pool bitmap */
3316 dev->data->mac_pool_sel[index] = 0;
3322 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3324 struct rte_eth_dev *dev;
3327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3329 if (!rte_is_valid_assigned_ether_addr(addr))
3332 dev = &rte_eth_devices[port_id];
3333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3335 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3339 /* Update default address in NIC data structure */
3340 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3347 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3351 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3353 struct rte_eth_dev_info dev_info;
3354 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3358 ret = rte_eth_dev_info_get(port_id, &dev_info);
3362 if (!dev->data->hash_mac_addrs)
3365 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3366 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3367 RTE_ETHER_ADDR_LEN) == 0)
3374 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3379 struct rte_eth_dev *dev;
3381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3383 dev = &rte_eth_devices[port_id];
3384 if (rte_is_zero_ether_addr(addr)) {
3385 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3390 index = get_hash_mac_addr_index(port_id, addr);
3391 /* Check if it's already there, and do nothing */
3392 if ((index >= 0) && on)
3398 "Port %u: the MAC address was not set in UTA\n",
3403 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3405 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3411 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3412 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3414 /* Update address in NIC data structure */
3416 rte_ether_addr_copy(addr,
3417 &dev->data->hash_mac_addrs[index]);
3419 rte_ether_addr_copy(&null_mac_addr,
3420 &dev->data->hash_mac_addrs[index]);
3423 return eth_err(port_id, ret);
3427 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3429 struct rte_eth_dev *dev;
3431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3433 dev = &rte_eth_devices[port_id];
3435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3436 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3440 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3443 struct rte_eth_dev *dev;
3444 struct rte_eth_dev_info dev_info;
3445 struct rte_eth_link link;
3448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3450 ret = rte_eth_dev_info_get(port_id, &dev_info);
3454 dev = &rte_eth_devices[port_id];
3455 link = dev->data->dev_link;
3457 if (queue_idx > dev_info.max_tx_queues) {
3459 "Set queue rate limit:port %u: invalid queue id=%u\n",
3460 port_id, queue_idx);
3464 if (tx_rate > link.link_speed) {
3466 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3467 tx_rate, link.link_speed);
3471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3472 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3473 queue_idx, tx_rate));
3477 rte_eth_mirror_rule_set(uint16_t port_id,
3478 struct rte_eth_mirror_conf *mirror_conf,
3479 uint8_t rule_id, uint8_t on)
3481 struct rte_eth_dev *dev;
3483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3484 if (mirror_conf->rule_type == 0) {
3485 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3489 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3490 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3495 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3496 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3497 (mirror_conf->pool_mask == 0)) {
3499 "Invalid mirror pool, pool mask can not be 0\n");
3503 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3504 mirror_conf->vlan.vlan_mask == 0) {
3506 "Invalid vlan mask, vlan mask can not be 0\n");
3510 dev = &rte_eth_devices[port_id];
3511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3513 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3514 mirror_conf, rule_id, on));
3518 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3520 struct rte_eth_dev *dev;
3522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3524 dev = &rte_eth_devices[port_id];
3525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3527 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3531 RTE_INIT(eth_dev_init_cb_lists)
3535 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3536 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3540 rte_eth_dev_callback_register(uint16_t port_id,
3541 enum rte_eth_event_type event,
3542 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3544 struct rte_eth_dev *dev;
3545 struct rte_eth_dev_callback *user_cb;
3546 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3552 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3553 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3557 if (port_id == RTE_ETH_ALL) {
3559 last_port = RTE_MAX_ETHPORTS - 1;
3561 next_port = last_port = port_id;
3564 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3567 dev = &rte_eth_devices[next_port];
3569 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3570 if (user_cb->cb_fn == cb_fn &&
3571 user_cb->cb_arg == cb_arg &&
3572 user_cb->event == event) {
3577 /* create a new callback. */
3578 if (user_cb == NULL) {
3579 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3580 sizeof(struct rte_eth_dev_callback), 0);
3581 if (user_cb != NULL) {
3582 user_cb->cb_fn = cb_fn;
3583 user_cb->cb_arg = cb_arg;
3584 user_cb->event = event;
3585 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3588 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3589 rte_eth_dev_callback_unregister(port_id, event,
3595 } while (++next_port <= last_port);
3597 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3602 rte_eth_dev_callback_unregister(uint16_t port_id,
3603 enum rte_eth_event_type event,
3604 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3607 struct rte_eth_dev *dev;
3608 struct rte_eth_dev_callback *cb, *next;
3609 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3615 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3616 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3620 if (port_id == RTE_ETH_ALL) {
3622 last_port = RTE_MAX_ETHPORTS - 1;
3624 next_port = last_port = port_id;
3627 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3630 dev = &rte_eth_devices[next_port];
3632 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3635 next = TAILQ_NEXT(cb, next);
3637 if (cb->cb_fn != cb_fn || cb->event != event ||
3638 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3642 * if this callback is not executing right now,
3645 if (cb->active == 0) {
3646 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3652 } while (++next_port <= last_port);
3654 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3659 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3660 enum rte_eth_event_type event, void *ret_param)
3662 struct rte_eth_dev_callback *cb_lst;
3663 struct rte_eth_dev_callback dev_cb;
3666 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3667 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3668 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3672 if (ret_param != NULL)
3673 dev_cb.ret_param = ret_param;
3675 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3676 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3677 dev_cb.cb_arg, dev_cb.ret_param);
3678 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3681 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3686 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3691 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3693 dev->state = RTE_ETH_DEV_ATTACHED;
3697 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3700 struct rte_eth_dev *dev;
3701 struct rte_intr_handle *intr_handle;
3705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3707 dev = &rte_eth_devices[port_id];
3709 if (!dev->intr_handle) {
3710 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3714 intr_handle = dev->intr_handle;
3715 if (!intr_handle->intr_vec) {
3716 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3720 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3721 vec = intr_handle->intr_vec[qid];
3722 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3723 if (rc && rc != -EEXIST) {
3725 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3726 port_id, qid, op, epfd, vec);
3734 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3736 struct rte_intr_handle *intr_handle;
3737 struct rte_eth_dev *dev;
3738 unsigned int efd_idx;
3742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3744 dev = &rte_eth_devices[port_id];
3746 if (queue_id >= dev->data->nb_rx_queues) {
3747 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3751 if (!dev->intr_handle) {
3752 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3756 intr_handle = dev->intr_handle;
3757 if (!intr_handle->intr_vec) {
3758 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3762 vec = intr_handle->intr_vec[queue_id];
3763 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3764 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3765 fd = intr_handle->efds[efd_idx];
3770 const struct rte_memzone *
3771 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3772 uint16_t queue_id, size_t size, unsigned align,
3775 char z_name[RTE_MEMZONE_NAMESIZE];
3776 const struct rte_memzone *mz;
3779 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3780 dev->data->port_id, queue_id, ring_name);
3781 if (rc >= RTE_MEMZONE_NAMESIZE) {
3782 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3783 rte_errno = ENAMETOOLONG;
3787 mz = rte_memzone_lookup(z_name);
3791 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3792 RTE_MEMZONE_IOVA_CONTIG, align);
3796 rte_eth_dev_create(struct rte_device *device, const char *name,
3797 size_t priv_data_size,
3798 ethdev_bus_specific_init ethdev_bus_specific_init,
3799 void *bus_init_params,
3800 ethdev_init_t ethdev_init, void *init_params)
3802 struct rte_eth_dev *ethdev;
3805 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3807 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3808 ethdev = rte_eth_dev_allocate(name);
3812 if (priv_data_size) {
3813 ethdev->data->dev_private = rte_zmalloc_socket(
3814 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3817 if (!ethdev->data->dev_private) {
3818 RTE_LOG(ERR, EAL, "failed to allocate private data");
3824 ethdev = rte_eth_dev_attach_secondary(name);
3826 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3827 "ethdev doesn't exist");
3832 ethdev->device = device;
3834 if (ethdev_bus_specific_init) {
3835 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3838 "ethdev bus specific initialisation failed");
3843 retval = ethdev_init(ethdev, init_params);
3845 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3849 rte_eth_dev_probing_finish(ethdev);
3854 rte_eth_dev_release_port(ethdev);
3859 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3860 ethdev_uninit_t ethdev_uninit)
3864 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3868 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3870 ret = ethdev_uninit(ethdev);
3874 return rte_eth_dev_release_port(ethdev);
3878 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3879 int epfd, int op, void *data)
3882 struct rte_eth_dev *dev;
3883 struct rte_intr_handle *intr_handle;
3886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3888 dev = &rte_eth_devices[port_id];
3889 if (queue_id >= dev->data->nb_rx_queues) {
3890 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3894 if (!dev->intr_handle) {
3895 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3899 intr_handle = dev->intr_handle;
3900 if (!intr_handle->intr_vec) {
3901 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3905 vec = intr_handle->intr_vec[queue_id];
3906 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3907 if (rc && rc != -EEXIST) {
3909 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3910 port_id, queue_id, op, epfd, vec);
3918 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3921 struct rte_eth_dev *dev;
3923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3925 dev = &rte_eth_devices[port_id];
3927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3928 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3933 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3936 struct rte_eth_dev *dev;
3938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3940 dev = &rte_eth_devices[port_id];
3942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3943 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3949 rte_eth_dev_filter_supported(uint16_t port_id,
3950 enum rte_filter_type filter_type)
3952 struct rte_eth_dev *dev;
3954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3956 dev = &rte_eth_devices[port_id];
3957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3958 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3959 RTE_ETH_FILTER_NOP, NULL);
3963 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3964 enum rte_filter_op filter_op, void *arg)
3966 struct rte_eth_dev *dev;
3968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3970 dev = &rte_eth_devices[port_id];
3971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3972 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3976 const struct rte_eth_rxtx_callback *
3977 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3978 rte_rx_callback_fn fn, void *user_param)
3980 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3981 rte_errno = ENOTSUP;
3984 /* check input parameters */
3985 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3986 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3990 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3998 cb->param = user_param;
4000 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4001 /* Add the callbacks in fifo order. */
4002 struct rte_eth_rxtx_callback *tail =
4003 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4006 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4013 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4018 const struct rte_eth_rxtx_callback *
4019 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4020 rte_rx_callback_fn fn, void *user_param)
4022 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4023 rte_errno = ENOTSUP;
4026 /* check input parameters */
4027 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4028 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4033 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4041 cb->param = user_param;
4043 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4044 /* Add the callbacks at fisrt position*/
4045 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4047 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4048 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4053 const struct rte_eth_rxtx_callback *
4054 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4055 rte_tx_callback_fn fn, void *user_param)
4057 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4058 rte_errno = ENOTSUP;
4061 /* check input parameters */
4062 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4063 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4068 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4076 cb->param = user_param;
4078 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4079 /* Add the callbacks in fifo order. */
4080 struct rte_eth_rxtx_callback *tail =
4081 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4084 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4091 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4097 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4098 const struct rte_eth_rxtx_callback *user_cb)
4100 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4103 /* Check input parameters. */
4104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4105 if (user_cb == NULL ||
4106 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4109 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4110 struct rte_eth_rxtx_callback *cb;
4111 struct rte_eth_rxtx_callback **prev_cb;
4114 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4115 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4116 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4118 if (cb == user_cb) {
4119 /* Remove the user cb from the callback list. */
4120 *prev_cb = cb->next;
4125 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4131 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4132 const struct rte_eth_rxtx_callback *user_cb)
4134 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4137 /* Check input parameters. */
4138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4139 if (user_cb == NULL ||
4140 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4143 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4145 struct rte_eth_rxtx_callback *cb;
4146 struct rte_eth_rxtx_callback **prev_cb;
4148 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4149 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4150 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4152 if (cb == user_cb) {
4153 /* Remove the user cb from the callback list. */
4154 *prev_cb = cb->next;
4159 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4165 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4166 struct rte_eth_rxq_info *qinfo)
4168 struct rte_eth_dev *dev;
4170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4175 dev = &rte_eth_devices[port_id];
4176 if (queue_id >= dev->data->nb_rx_queues) {
4177 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4183 memset(qinfo, 0, sizeof(*qinfo));
4184 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4189 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4190 struct rte_eth_txq_info *qinfo)
4192 struct rte_eth_dev *dev;
4194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4200 if (queue_id >= dev->data->nb_tx_queues) {
4201 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4207 memset(qinfo, 0, sizeof(*qinfo));
4208 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4214 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4215 struct rte_ether_addr *mc_addr_set,
4216 uint32_t nb_mc_addr)
4218 struct rte_eth_dev *dev;
4220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4222 dev = &rte_eth_devices[port_id];
4223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4224 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4225 mc_addr_set, nb_mc_addr));
4229 rte_eth_timesync_enable(uint16_t port_id)
4231 struct rte_eth_dev *dev;
4233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4234 dev = &rte_eth_devices[port_id];
4236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4237 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4241 rte_eth_timesync_disable(uint16_t port_id)
4243 struct rte_eth_dev *dev;
4245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4246 dev = &rte_eth_devices[port_id];
4248 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4249 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4253 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4256 struct rte_eth_dev *dev;
4258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4259 dev = &rte_eth_devices[port_id];
4261 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4262 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4263 (dev, timestamp, flags));
4267 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4268 struct timespec *timestamp)
4270 struct rte_eth_dev *dev;
4272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4273 dev = &rte_eth_devices[port_id];
4275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4276 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4281 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4283 struct rte_eth_dev *dev;
4285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4286 dev = &rte_eth_devices[port_id];
4288 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4289 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4294 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4296 struct rte_eth_dev *dev;
4298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4299 dev = &rte_eth_devices[port_id];
4301 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4302 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4307 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4309 struct rte_eth_dev *dev;
4311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4312 dev = &rte_eth_devices[port_id];
4314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4315 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4320 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4322 struct rte_eth_dev *dev;
4324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4325 dev = &rte_eth_devices[port_id];
4327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4328 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4332 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4334 struct rte_eth_dev *dev;
4336 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4338 dev = &rte_eth_devices[port_id];
4339 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4340 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4344 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4346 struct rte_eth_dev *dev;
4348 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4350 dev = &rte_eth_devices[port_id];
4351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4352 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4356 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4358 struct rte_eth_dev *dev;
4360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4362 dev = &rte_eth_devices[port_id];
4363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4364 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4368 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4370 struct rte_eth_dev *dev;
4372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4374 dev = &rte_eth_devices[port_id];
4375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4376 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4380 rte_eth_dev_get_module_info(uint16_t port_id,
4381 struct rte_eth_dev_module_info *modinfo)
4383 struct rte_eth_dev *dev;
4385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4387 dev = &rte_eth_devices[port_id];
4388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4389 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4393 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4394 struct rte_dev_eeprom_info *info)
4396 struct rte_eth_dev *dev;
4398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4400 dev = &rte_eth_devices[port_id];
4401 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4402 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4406 rte_eth_dev_get_dcb_info(uint16_t port_id,
4407 struct rte_eth_dcb_info *dcb_info)
4409 struct rte_eth_dev *dev;
4411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4413 dev = &rte_eth_devices[port_id];
4414 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4417 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4421 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4422 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4424 struct rte_eth_dev *dev;
4426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4427 if (l2_tunnel == NULL) {
4428 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4432 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4433 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4437 dev = &rte_eth_devices[port_id];
4438 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4440 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4445 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4446 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4450 struct rte_eth_dev *dev;
4452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4454 if (l2_tunnel == NULL) {
4455 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4459 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4460 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4465 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4469 dev = &rte_eth_devices[port_id];
4470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4472 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4473 l2_tunnel, mask, en));
4477 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4478 const struct rte_eth_desc_lim *desc_lim)
4480 if (desc_lim->nb_align != 0)
4481 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4483 if (desc_lim->nb_max != 0)
4484 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4486 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4490 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4491 uint16_t *nb_rx_desc,
4492 uint16_t *nb_tx_desc)
4494 struct rte_eth_dev_info dev_info;
4497 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4499 ret = rte_eth_dev_info_get(port_id, &dev_info);
4503 if (nb_rx_desc != NULL)
4504 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4506 if (nb_tx_desc != NULL)
4507 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4513 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4515 struct rte_eth_dev *dev;
4517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4522 dev = &rte_eth_devices[port_id];
4524 if (*dev->dev_ops->pool_ops_supported == NULL)
4525 return 1; /* all pools are supported */
4527 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4531 * A set of values to describe the possible states of a switch domain.
4533 enum rte_eth_switch_domain_state {
4534 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4535 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4539 * Array of switch domains available for allocation. Array is sized to
4540 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4541 * ethdev ports in a single process.
4543 static struct rte_eth_dev_switch {
4544 enum rte_eth_switch_domain_state state;
4545 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4548 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4552 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4554 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4555 i < RTE_MAX_ETHPORTS; i++) {
4556 if (rte_eth_switch_domains[i].state ==
4557 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4558 rte_eth_switch_domains[i].state =
4559 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4569 rte_eth_switch_domain_free(uint16_t domain_id)
4571 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4572 domain_id >= RTE_MAX_ETHPORTS)
4575 if (rte_eth_switch_domains[domain_id].state !=
4576 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4579 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4585 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4588 struct rte_kvargs_pair *pair;
4591 arglist->str = strdup(str_in);
4592 if (arglist->str == NULL)
4595 letter = arglist->str;
4598 pair = &arglist->pairs[0];
4601 case 0: /* Initial */
4604 else if (*letter == '\0')
4611 case 1: /* Parsing key */
4612 if (*letter == '=') {
4614 pair->value = letter + 1;
4616 } else if (*letter == ',' || *letter == '\0')
4621 case 2: /* Parsing value */
4624 else if (*letter == ',') {
4627 pair = &arglist->pairs[arglist->count];
4629 } else if (*letter == '\0') {
4632 pair = &arglist->pairs[arglist->count];
4637 case 3: /* Parsing list */
4640 else if (*letter == '\0')
4649 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4651 struct rte_kvargs args;
4652 struct rte_kvargs_pair *pair;
4656 memset(eth_da, 0, sizeof(*eth_da));
4658 result = rte_eth_devargs_tokenise(&args, dargs);
4662 for (i = 0; i < args.count; i++) {
4663 pair = &args.pairs[i];
4664 if (strcmp("representor", pair->key) == 0) {
4665 result = rte_eth_devargs_parse_list(pair->value,
4666 rte_eth_devargs_parse_representor_ports,
4680 RTE_INIT(ethdev_init_log)
4682 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4683 if (rte_eth_dev_logtype >= 0)
4684 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);