1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 int rte_eth_dev_logtype;
51 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
52 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
54 /* spinlock for eth device callbacks */
55 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove rx callbacks */
58 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for add/remove tx callbacks */
61 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
63 /* spinlock for shared data allocation */
64 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* store statistics names and its offset in stats structure */
67 struct rte_eth_xstats_name_off {
68 char name[RTE_ETH_XSTATS_NAME_SIZE];
72 /* Shared memory between primary and secondary processes. */
74 uint64_t next_owner_id;
75 rte_spinlock_t ownership_lock;
76 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
77 } *rte_eth_dev_shared_data;
79 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
80 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
81 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
82 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
83 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
84 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
85 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
86 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
87 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
91 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
93 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
94 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
95 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
96 {"errors", offsetof(struct rte_eth_stats, q_errors)},
99 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 * Macro to iterate over all valid ports for internal usage.
344 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347 for (port_id = rte_eth_find_next(0); \
348 port_id < RTE_MAX_ETHPORTS; \
349 port_id = rte_eth_find_next(port_id + 1))
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
354 port_id = rte_eth_find_next(port_id);
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].device != parent)
357 port_id = rte_eth_find_next(port_id + 1);
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
365 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366 return rte_eth_find_next_of(port_id,
367 rte_eth_devices[ref_port_id].device);
371 rte_eth_dev_shared_data_prepare(void)
373 const unsigned flags = 0;
374 const struct rte_memzone *mz;
376 rte_spinlock_lock(&rte_eth_shared_data_lock);
378 if (rte_eth_dev_shared_data == NULL) {
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 /* Allocate port data and ownership shared memory. */
381 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382 sizeof(*rte_eth_dev_shared_data),
383 rte_socket_id(), flags);
385 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
387 rte_panic("Cannot allocate ethdev shared data\n");
389 rte_eth_dev_shared_data = mz->addr;
390 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391 rte_eth_dev_shared_data->next_owner_id =
392 RTE_ETH_DEV_NO_OWNER + 1;
393 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394 memset(rte_eth_dev_shared_data->data, 0,
395 sizeof(rte_eth_dev_shared_data->data));
399 rte_spinlock_unlock(&rte_eth_shared_data_lock);
403 is_allocated(const struct rte_eth_dev *ethdev)
405 return ethdev->data->name[0] != '\0';
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
413 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414 if (rte_eth_devices[i].data != NULL &&
415 strcmp(rte_eth_devices[i].data->name, name) == 0)
416 return &rte_eth_devices[i];
422 rte_eth_dev_allocated(const char *name)
424 struct rte_eth_dev *ethdev;
426 rte_eth_dev_shared_data_prepare();
428 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
430 ethdev = _rte_eth_dev_allocated(name);
432 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
438 rte_eth_dev_find_free_port(void)
442 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443 /* Using shared name field to find a free port. */
444 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445 RTE_ASSERT(rte_eth_devices[i].state ==
450 return RTE_MAX_ETHPORTS;
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
456 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
458 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
464 rte_eth_dev_allocate(const char *name)
467 struct rte_eth_dev *eth_dev = NULL;
470 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
472 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
476 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
481 rte_eth_dev_shared_data_prepare();
483 /* Synchronize port creation between primary and secondary threads. */
484 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
486 if (_rte_eth_dev_allocated(name) != NULL) {
488 "Ethernet device with name %s already allocated\n",
493 port_id = rte_eth_dev_find_free_port();
494 if (port_id == RTE_MAX_ETHPORTS) {
496 "Reached maximum number of Ethernet ports\n");
500 eth_dev = eth_dev_get(port_id);
501 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502 eth_dev->data->port_id = port_id;
503 eth_dev->data->mtu = RTE_ETHER_MTU;
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 _rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
560 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561 rte_free(eth_dev->data->rx_queues);
562 rte_free(eth_dev->data->tx_queues);
563 rte_free(eth_dev->data->mac_addrs);
564 rte_free(eth_dev->data->hash_mac_addrs);
565 rte_free(eth_dev->data->dev_private);
566 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
569 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
575 rte_eth_dev_is_valid_port(uint16_t port_id)
577 if (port_id >= RTE_MAX_ETHPORTS ||
578 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
587 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588 rte_eth_dev_shared_data->next_owner_id <= owner_id)
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
596 port_id = rte_eth_find_next(port_id);
597 while (port_id < RTE_MAX_ETHPORTS &&
598 rte_eth_devices[port_id].data->owner.id != owner_id)
599 port_id = rte_eth_find_next(port_id + 1);
605 rte_eth_dev_owner_new(uint64_t *owner_id)
607 rte_eth_dev_shared_data_prepare();
609 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
611 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
613 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619 const struct rte_eth_dev_owner *new_owner)
621 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622 struct rte_eth_dev_owner *port_owner;
624 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
630 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631 !rte_eth_is_valid_owner_id(old_owner_id)) {
633 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634 old_owner_id, new_owner->id);
638 port_owner = &rte_eth_devices[port_id].data->owner;
639 if (port_owner->id != old_owner_id) {
641 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642 port_id, port_owner->name, port_owner->id);
646 /* can not truncate (same structure) */
647 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
649 port_owner->id = new_owner->id;
651 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652 port_id, new_owner->name, new_owner->id);
658 rte_eth_dev_owner_set(const uint16_t port_id,
659 const struct rte_eth_dev_owner *owner)
663 rte_eth_dev_shared_data_prepare();
665 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
667 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
669 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
676 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
680 rte_eth_dev_shared_data_prepare();
682 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
684 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
686 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
696 rte_eth_dev_shared_data_prepare();
698 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
700 if (rte_eth_is_valid_owner_id(owner_id)) {
701 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
702 if (rte_eth_devices[port_id].data->owner.id == owner_id)
703 memset(&rte_eth_devices[port_id].data->owner, 0,
704 sizeof(struct rte_eth_dev_owner));
705 RTE_ETHDEV_LOG(NOTICE,
706 "All port owners owned by %016"PRIx64" identifier have removed\n",
710 "Invalid owner id=%016"PRIx64"\n",
715 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
721 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
724 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
726 rte_eth_dev_shared_data_prepare();
728 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
730 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
731 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
735 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
738 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
743 rte_eth_dev_socket_id(uint16_t port_id)
745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
746 return rte_eth_devices[port_id].data->numa_node;
750 rte_eth_dev_get_sec_ctx(uint16_t port_id)
752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
753 return rte_eth_devices[port_id].security_ctx;
757 rte_eth_dev_count_avail(void)
764 RTE_ETH_FOREACH_DEV(p)
771 rte_eth_dev_count_total(void)
773 uint16_t port, count = 0;
775 RTE_ETH_FOREACH_VALID_DEV(port)
782 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
793 /* shouldn't check 'rte_eth_devices[i].data',
794 * because it might be overwritten by VDEV PMD */
795 tmp = rte_eth_dev_shared_data->data[port_id].name;
801 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
806 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
810 RTE_ETH_FOREACH_VALID_DEV(pid)
811 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
820 eth_err(uint16_t port_id, int ret)
824 if (rte_eth_dev_is_removed(port_id))
830 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
832 uint16_t old_nb_queues = dev->data->nb_rx_queues;
836 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
837 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
838 sizeof(dev->data->rx_queues[0]) * nb_queues,
839 RTE_CACHE_LINE_SIZE);
840 if (dev->data->rx_queues == NULL) {
841 dev->data->nb_rx_queues = 0;
844 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
847 rxq = dev->data->rx_queues;
849 for (i = nb_queues; i < old_nb_queues; i++)
850 (*dev->dev_ops->rx_queue_release)(rxq[i]);
851 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
852 RTE_CACHE_LINE_SIZE);
855 if (nb_queues > old_nb_queues) {
856 uint16_t new_qs = nb_queues - old_nb_queues;
858 memset(rxq + old_nb_queues, 0,
859 sizeof(rxq[0]) * new_qs);
862 dev->data->rx_queues = rxq;
864 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
867 rxq = dev->data->rx_queues;
869 for (i = nb_queues; i < old_nb_queues; i++)
870 (*dev->dev_ops->rx_queue_release)(rxq[i]);
872 rte_free(dev->data->rx_queues);
873 dev->data->rx_queues = NULL;
875 dev->data->nb_rx_queues = nb_queues;
880 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
882 struct rte_eth_dev *dev;
884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
886 dev = &rte_eth_devices[port_id];
887 if (!dev->data->dev_started) {
889 "Port %u must be started before start any queue\n",
894 if (rx_queue_id >= dev->data->nb_rx_queues) {
895 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
901 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
903 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
904 rx_queue_id, port_id);
908 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
910 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
911 rx_queue_id, port_id);
915 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
921 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
923 struct rte_eth_dev *dev;
925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
927 dev = &rte_eth_devices[port_id];
928 if (rx_queue_id >= dev->data->nb_rx_queues) {
929 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
935 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
937 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
938 rx_queue_id, port_id);
942 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
944 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
945 rx_queue_id, port_id);
949 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
954 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
956 struct rte_eth_dev *dev;
958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
960 dev = &rte_eth_devices[port_id];
961 if (!dev->data->dev_started) {
963 "Port %u must be started before start any queue\n",
968 if (tx_queue_id >= dev->data->nb_tx_queues) {
969 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
975 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
977 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
978 tx_queue_id, port_id);
982 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
984 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
985 tx_queue_id, port_id);
989 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
993 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
995 struct rte_eth_dev *dev;
997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
999 dev = &rte_eth_devices[port_id];
1000 if (tx_queue_id >= dev->data->nb_tx_queues) {
1001 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1007 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1008 RTE_ETHDEV_LOG(INFO,
1009 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1010 tx_queue_id, port_id);
1014 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1015 RTE_ETHDEV_LOG(INFO,
1016 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1017 tx_queue_id, port_id);
1021 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1026 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1028 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1032 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1033 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1034 sizeof(dev->data->tx_queues[0]) * nb_queues,
1035 RTE_CACHE_LINE_SIZE);
1036 if (dev->data->tx_queues == NULL) {
1037 dev->data->nb_tx_queues = 0;
1040 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1043 txq = dev->data->tx_queues;
1045 for (i = nb_queues; i < old_nb_queues; i++)
1046 (*dev->dev_ops->tx_queue_release)(txq[i]);
1047 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1048 RTE_CACHE_LINE_SIZE);
1051 if (nb_queues > old_nb_queues) {
1052 uint16_t new_qs = nb_queues - old_nb_queues;
1054 memset(txq + old_nb_queues, 0,
1055 sizeof(txq[0]) * new_qs);
1058 dev->data->tx_queues = txq;
1060 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1063 txq = dev->data->tx_queues;
1065 for (i = nb_queues; i < old_nb_queues; i++)
1066 (*dev->dev_ops->tx_queue_release)(txq[i]);
1068 rte_free(dev->data->tx_queues);
1069 dev->data->tx_queues = NULL;
1071 dev->data->nb_tx_queues = nb_queues;
1076 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1079 case ETH_SPEED_NUM_10M:
1080 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1081 case ETH_SPEED_NUM_100M:
1082 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1083 case ETH_SPEED_NUM_1G:
1084 return ETH_LINK_SPEED_1G;
1085 case ETH_SPEED_NUM_2_5G:
1086 return ETH_LINK_SPEED_2_5G;
1087 case ETH_SPEED_NUM_5G:
1088 return ETH_LINK_SPEED_5G;
1089 case ETH_SPEED_NUM_10G:
1090 return ETH_LINK_SPEED_10G;
1091 case ETH_SPEED_NUM_20G:
1092 return ETH_LINK_SPEED_20G;
1093 case ETH_SPEED_NUM_25G:
1094 return ETH_LINK_SPEED_25G;
1095 case ETH_SPEED_NUM_40G:
1096 return ETH_LINK_SPEED_40G;
1097 case ETH_SPEED_NUM_50G:
1098 return ETH_LINK_SPEED_50G;
1099 case ETH_SPEED_NUM_56G:
1100 return ETH_LINK_SPEED_56G;
1101 case ETH_SPEED_NUM_100G:
1102 return ETH_LINK_SPEED_100G;
1103 case ETH_SPEED_NUM_200G:
1104 return ETH_LINK_SPEED_200G;
1111 rte_eth_dev_rx_offload_name(uint64_t offload)
1113 const char *name = "UNKNOWN";
1116 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1117 if (offload == rte_rx_offload_names[i].offload) {
1118 name = rte_rx_offload_names[i].name;
1127 rte_eth_dev_tx_offload_name(uint64_t offload)
1129 const char *name = "UNKNOWN";
1132 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1133 if (offload == rte_tx_offload_names[i].offload) {
1134 name = rte_tx_offload_names[i].name;
1143 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1144 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1148 if (dev_info_size == 0) {
1149 if (config_size != max_rx_pkt_len) {
1150 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1151 " %u != %u is not allowed\n",
1152 port_id, config_size, max_rx_pkt_len);
1155 } else if (config_size > dev_info_size) {
1156 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1157 "> max allowed value %u\n", port_id, config_size,
1160 } else if (config_size < RTE_ETHER_MIN_LEN) {
1161 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1162 "< min allowed value %u\n", port_id, config_size,
1163 (unsigned int)RTE_ETHER_MIN_LEN);
1170 * Validate offloads that are requested through rte_eth_dev_configure against
1171 * the offloads successfully set by the ethernet device.
1174 * The port identifier of the Ethernet device.
1175 * @param req_offloads
1176 * The offloads that have been requested through `rte_eth_dev_configure`.
1177 * @param set_offloads
1178 * The offloads successfully set by the ethernet device.
1179 * @param offload_type
1180 * The offload type i.e. Rx/Tx string.
1181 * @param offload_name
1182 * The function that prints the offload name.
1184 * - (0) if validation successful.
1185 * - (-EINVAL) if requested offload has been silently disabled.
1189 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1190 uint64_t set_offloads, const char *offload_type,
1191 const char *(*offload_name)(uint64_t))
1193 uint64_t offloads_diff = req_offloads ^ set_offloads;
1197 while (offloads_diff != 0) {
1198 /* Check if any offload is requested but not enabled. */
1199 offload = 1ULL << __builtin_ctzll(offloads_diff);
1200 if (offload & req_offloads) {
1202 "Port %u failed to enable %s offload %s\n",
1203 port_id, offload_type, offload_name(offload));
1207 /* Check if offload couldn't be disabled. */
1208 if (offload & set_offloads) {
1209 RTE_ETHDEV_LOG(DEBUG,
1210 "Port %u %s offload %s is not requested but enabled\n",
1211 port_id, offload_type, offload_name(offload));
1214 offloads_diff &= ~offload;
1221 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1222 const struct rte_eth_conf *dev_conf)
1224 struct rte_eth_dev *dev;
1225 struct rte_eth_dev_info dev_info;
1226 struct rte_eth_conf orig_conf;
1230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1232 dev = &rte_eth_devices[port_id];
1234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1236 if (dev->data->dev_started) {
1238 "Port %u must be stopped to allow configuration\n",
1243 /* Store original config, as rollback required on failure */
1244 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1247 * Copy the dev_conf parameter into the dev structure.
1248 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1250 if (dev_conf != &dev->data->dev_conf)
1251 memcpy(&dev->data->dev_conf, dev_conf,
1252 sizeof(dev->data->dev_conf));
1254 ret = rte_eth_dev_info_get(port_id, &dev_info);
1258 /* If number of queues specified by application for both Rx and Tx is
1259 * zero, use driver preferred values. This cannot be done individually
1260 * as it is valid for either Tx or Rx (but not both) to be zero.
1261 * If driver does not provide any preferred valued, fall back on
1264 if (nb_rx_q == 0 && nb_tx_q == 0) {
1265 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1267 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1268 nb_tx_q = dev_info.default_txportconf.nb_queues;
1270 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1273 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1275 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1276 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1281 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1283 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1284 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1290 * Check that the numbers of RX and TX queues are not greater
1291 * than the maximum number of RX and TX queues supported by the
1292 * configured device.
1294 if (nb_rx_q > dev_info.max_rx_queues) {
1295 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1296 port_id, nb_rx_q, dev_info.max_rx_queues);
1301 if (nb_tx_q > dev_info.max_tx_queues) {
1302 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1303 port_id, nb_tx_q, dev_info.max_tx_queues);
1308 /* Check that the device supports requested interrupts */
1309 if ((dev_conf->intr_conf.lsc == 1) &&
1310 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1311 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1312 dev->device->driver->name);
1316 if ((dev_conf->intr_conf.rmv == 1) &&
1317 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1318 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1319 dev->device->driver->name);
1325 * If jumbo frames are enabled, check that the maximum RX packet
1326 * length is supported by the configured device.
1328 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1329 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1331 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1332 port_id, dev_conf->rxmode.max_rx_pkt_len,
1333 dev_info.max_rx_pktlen);
1336 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1338 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1339 port_id, dev_conf->rxmode.max_rx_pkt_len,
1340 (unsigned int)RTE_ETHER_MIN_LEN);
1345 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1346 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1347 /* Use default value */
1348 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1353 * If LRO is enabled, check that the maximum aggregated packet
1354 * size is supported by the configured device.
1356 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1357 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1358 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1359 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1360 ret = check_lro_pkt_size(port_id,
1361 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1362 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1363 dev_info.max_lro_pkt_size);
1368 /* Any requested offloading must be within its device capabilities */
1369 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1370 dev_conf->rxmode.offloads) {
1372 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1373 "capabilities 0x%"PRIx64" in %s()\n",
1374 port_id, dev_conf->rxmode.offloads,
1375 dev_info.rx_offload_capa,
1380 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1381 dev_conf->txmode.offloads) {
1383 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1384 "capabilities 0x%"PRIx64" in %s()\n",
1385 port_id, dev_conf->txmode.offloads,
1386 dev_info.tx_offload_capa,
1392 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1393 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1395 /* Check that device supports requested rss hash functions. */
1396 if ((dev_info.flow_type_rss_offloads |
1397 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1398 dev_info.flow_type_rss_offloads) {
1400 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1401 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1402 dev_info.flow_type_rss_offloads);
1407 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1408 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1409 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1411 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1413 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1419 * Setup new number of RX/TX queues and reconfigure device.
1421 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1424 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1430 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1433 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1435 rte_eth_dev_rx_queue_config(dev, 0);
1440 diag = (*dev->dev_ops->dev_configure)(dev);
1442 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1444 ret = eth_err(port_id, diag);
1448 /* Initialize Rx profiling if enabled at compilation time. */
1449 diag = __rte_eth_dev_profile_init(port_id, dev);
1451 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1453 ret = eth_err(port_id, diag);
1457 /* Validate Rx offloads. */
1458 diag = validate_offloads(port_id,
1459 dev_conf->rxmode.offloads,
1460 dev->data->dev_conf.rxmode.offloads, "Rx",
1461 rte_eth_dev_rx_offload_name);
1467 /* Validate Tx offloads. */
1468 diag = validate_offloads(port_id,
1469 dev_conf->txmode.offloads,
1470 dev->data->dev_conf.txmode.offloads, "Tx",
1471 rte_eth_dev_tx_offload_name);
1477 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1480 rte_eth_dev_rx_queue_config(dev, 0);
1481 rte_eth_dev_tx_queue_config(dev, 0);
1483 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1485 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1490 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1492 if (dev->data->dev_started) {
1493 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1494 dev->data->port_id);
1498 rte_eth_dev_rx_queue_config(dev, 0);
1499 rte_eth_dev_tx_queue_config(dev, 0);
1501 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1505 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1506 struct rte_eth_dev_info *dev_info)
1508 struct rte_ether_addr *addr;
1513 /* replay MAC address configuration including default MAC */
1514 addr = &dev->data->mac_addrs[0];
1515 if (*dev->dev_ops->mac_addr_set != NULL)
1516 (*dev->dev_ops->mac_addr_set)(dev, addr);
1517 else if (*dev->dev_ops->mac_addr_add != NULL)
1518 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1520 if (*dev->dev_ops->mac_addr_add != NULL) {
1521 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1522 addr = &dev->data->mac_addrs[i];
1524 /* skip zero address */
1525 if (rte_is_zero_ether_addr(addr))
1529 pool_mask = dev->data->mac_pool_sel[i];
1532 if (pool_mask & 1ULL)
1533 (*dev->dev_ops->mac_addr_add)(dev,
1537 } while (pool_mask);
1543 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1544 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1548 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1549 rte_eth_dev_mac_restore(dev, dev_info);
1551 /* replay promiscuous configuration */
1553 * use callbacks directly since we don't need port_id check and
1554 * would like to bypass the same value set
1556 if (rte_eth_promiscuous_get(port_id) == 1 &&
1557 *dev->dev_ops->promiscuous_enable != NULL) {
1558 ret = eth_err(port_id,
1559 (*dev->dev_ops->promiscuous_enable)(dev));
1560 if (ret != 0 && ret != -ENOTSUP) {
1562 "Failed to enable promiscuous mode for device (port %u): %s\n",
1563 port_id, rte_strerror(-ret));
1566 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1567 *dev->dev_ops->promiscuous_disable != NULL) {
1568 ret = eth_err(port_id,
1569 (*dev->dev_ops->promiscuous_disable)(dev));
1570 if (ret != 0 && ret != -ENOTSUP) {
1572 "Failed to disable promiscuous mode for device (port %u): %s\n",
1573 port_id, rte_strerror(-ret));
1578 /* replay all multicast configuration */
1580 * use callbacks directly since we don't need port_id check and
1581 * would like to bypass the same value set
1583 if (rte_eth_allmulticast_get(port_id) == 1 &&
1584 *dev->dev_ops->allmulticast_enable != NULL) {
1585 ret = eth_err(port_id,
1586 (*dev->dev_ops->allmulticast_enable)(dev));
1587 if (ret != 0 && ret != -ENOTSUP) {
1589 "Failed to enable allmulticast mode for device (port %u): %s\n",
1590 port_id, rte_strerror(-ret));
1593 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1594 *dev->dev_ops->allmulticast_disable != NULL) {
1595 ret = eth_err(port_id,
1596 (*dev->dev_ops->allmulticast_disable)(dev));
1597 if (ret != 0 && ret != -ENOTSUP) {
1599 "Failed to disable allmulticast mode for device (port %u): %s\n",
1600 port_id, rte_strerror(-ret));
1609 rte_eth_dev_start(uint16_t port_id)
1611 struct rte_eth_dev *dev;
1612 struct rte_eth_dev_info dev_info;
1616 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1618 dev = &rte_eth_devices[port_id];
1620 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1622 if (dev->data->dev_started != 0) {
1623 RTE_ETHDEV_LOG(INFO,
1624 "Device with port_id=%"PRIu16" already started\n",
1629 ret = rte_eth_dev_info_get(port_id, &dev_info);
1633 /* Lets restore MAC now if device does not support live change */
1634 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1635 rte_eth_dev_mac_restore(dev, &dev_info);
1637 diag = (*dev->dev_ops->dev_start)(dev);
1639 dev->data->dev_started = 1;
1641 return eth_err(port_id, diag);
1643 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1646 "Error during restoring configuration for device (port %u): %s\n",
1647 port_id, rte_strerror(-ret));
1648 rte_eth_dev_stop(port_id);
1652 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1653 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1654 (*dev->dev_ops->link_update)(dev, 0);
1657 rte_ethdev_trace_start(port_id);
1662 rte_eth_dev_stop(uint16_t port_id)
1664 struct rte_eth_dev *dev;
1666 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1667 dev = &rte_eth_devices[port_id];
1669 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1671 if (dev->data->dev_started == 0) {
1672 RTE_ETHDEV_LOG(INFO,
1673 "Device with port_id=%"PRIu16" already stopped\n",
1678 dev->data->dev_started = 0;
1679 (*dev->dev_ops->dev_stop)(dev);
1680 rte_ethdev_trace_stop(port_id);
1684 rte_eth_dev_set_link_up(uint16_t port_id)
1686 struct rte_eth_dev *dev;
1688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1690 dev = &rte_eth_devices[port_id];
1692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1693 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1697 rte_eth_dev_set_link_down(uint16_t port_id)
1699 struct rte_eth_dev *dev;
1701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1703 dev = &rte_eth_devices[port_id];
1705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1706 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1710 rte_eth_dev_close(uint16_t port_id)
1712 struct rte_eth_dev *dev;
1714 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1715 dev = &rte_eth_devices[port_id];
1717 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1718 dev->data->dev_started = 0;
1719 (*dev->dev_ops->dev_close)(dev);
1721 rte_ethdev_trace_close(port_id);
1722 /* check behaviour flag - temporary for PMD migration */
1723 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1724 /* new behaviour: send event + reset state + free all data */
1725 rte_eth_dev_release_port(dev);
1728 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1729 "The driver %s should migrate to the new behaviour.\n",
1730 dev->device->driver->name);
1731 /* old behaviour: only free queue arrays */
1732 dev->data->nb_rx_queues = 0;
1733 rte_free(dev->data->rx_queues);
1734 dev->data->rx_queues = NULL;
1735 dev->data->nb_tx_queues = 0;
1736 rte_free(dev->data->tx_queues);
1737 dev->data->tx_queues = NULL;
1741 rte_eth_dev_reset(uint16_t port_id)
1743 struct rte_eth_dev *dev;
1746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1747 dev = &rte_eth_devices[port_id];
1749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1751 rte_eth_dev_stop(port_id);
1752 ret = dev->dev_ops->dev_reset(dev);
1754 return eth_err(port_id, ret);
1758 rte_eth_dev_is_removed(uint16_t port_id)
1760 struct rte_eth_dev *dev;
1763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1765 dev = &rte_eth_devices[port_id];
1767 if (dev->state == RTE_ETH_DEV_REMOVED)
1770 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1772 ret = dev->dev_ops->is_removed(dev);
1774 /* Device is physically removed. */
1775 dev->state = RTE_ETH_DEV_REMOVED;
1781 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1782 uint16_t nb_rx_desc, unsigned int socket_id,
1783 const struct rte_eth_rxconf *rx_conf,
1784 struct rte_mempool *mp)
1787 uint32_t mbp_buf_size;
1788 struct rte_eth_dev *dev;
1789 struct rte_eth_dev_info dev_info;
1790 struct rte_eth_rxconf local_conf;
1793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1795 dev = &rte_eth_devices[port_id];
1796 if (rx_queue_id >= dev->data->nb_rx_queues) {
1797 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1802 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1809 * Check the size of the mbuf data buffer.
1810 * This value must be provided in the private data of the memory pool.
1811 * First check that the memory pool has a valid private data.
1813 ret = rte_eth_dev_info_get(port_id, &dev_info);
1817 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1818 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1819 mp->name, (int)mp->private_data_size,
1820 (int)sizeof(struct rte_pktmbuf_pool_private));
1823 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1825 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1827 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1828 mp->name, (int)mbp_buf_size,
1829 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1830 (int)RTE_PKTMBUF_HEADROOM,
1831 (int)dev_info.min_rx_bufsize);
1835 /* Use default specified by driver, if nb_rx_desc is zero */
1836 if (nb_rx_desc == 0) {
1837 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1838 /* If driver default is also zero, fall back on EAL default */
1839 if (nb_rx_desc == 0)
1840 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1843 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1844 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1845 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1848 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1849 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1850 dev_info.rx_desc_lim.nb_min,
1851 dev_info.rx_desc_lim.nb_align);
1855 if (dev->data->dev_started &&
1856 !(dev_info.dev_capa &
1857 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1860 if (dev->data->dev_started &&
1861 (dev->data->rx_queue_state[rx_queue_id] !=
1862 RTE_ETH_QUEUE_STATE_STOPPED))
1865 rxq = dev->data->rx_queues;
1866 if (rxq[rx_queue_id]) {
1867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1869 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1870 rxq[rx_queue_id] = NULL;
1873 if (rx_conf == NULL)
1874 rx_conf = &dev_info.default_rxconf;
1876 local_conf = *rx_conf;
1879 * If an offloading has already been enabled in
1880 * rte_eth_dev_configure(), it has been enabled on all queues,
1881 * so there is no need to enable it in this queue again.
1882 * The local_conf.offloads input to underlying PMD only carries
1883 * those offloadings which are only enabled on this queue and
1884 * not enabled on all queues.
1886 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1889 * New added offloadings for this queue are those not enabled in
1890 * rte_eth_dev_configure() and they must be per-queue type.
1891 * A pure per-port offloading can't be enabled on a queue while
1892 * disabled on another queue. A pure per-port offloading can't
1893 * be enabled for any queue as new added one if it hasn't been
1894 * enabled in rte_eth_dev_configure().
1896 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1897 local_conf.offloads) {
1899 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1900 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1901 port_id, rx_queue_id, local_conf.offloads,
1902 dev_info.rx_queue_offload_capa,
1908 * If LRO is enabled, check that the maximum aggregated packet
1909 * size is supported by the configured device.
1911 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1912 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1913 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1914 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1915 int ret = check_lro_pkt_size(port_id,
1916 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1917 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1918 dev_info.max_lro_pkt_size);
1923 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1924 socket_id, &local_conf, mp);
1926 if (!dev->data->min_rx_buf_size ||
1927 dev->data->min_rx_buf_size > mbp_buf_size)
1928 dev->data->min_rx_buf_size = mbp_buf_size;
1931 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1933 return eth_err(port_id, ret);
1937 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1938 uint16_t nb_rx_desc,
1939 const struct rte_eth_hairpin_conf *conf)
1942 struct rte_eth_dev *dev;
1943 struct rte_eth_hairpin_cap cap;
1948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1950 dev = &rte_eth_devices[port_id];
1951 if (rx_queue_id >= dev->data->nb_rx_queues) {
1952 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1955 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1960 /* if nb_rx_desc is zero use max number of desc from the driver. */
1961 if (nb_rx_desc == 0)
1962 nb_rx_desc = cap.max_nb_desc;
1963 if (nb_rx_desc > cap.max_nb_desc) {
1965 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1966 nb_rx_desc, cap.max_nb_desc);
1969 if (conf->peer_count > cap.max_rx_2_tx) {
1971 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1972 conf->peer_count, cap.max_rx_2_tx);
1975 if (conf->peer_count == 0) {
1977 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1981 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1982 cap.max_nb_queues != UINT16_MAX; i++) {
1983 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1986 if (count > cap.max_nb_queues) {
1987 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1991 if (dev->data->dev_started)
1993 rxq = dev->data->rx_queues;
1994 if (rxq[rx_queue_id] != NULL) {
1995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1997 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1998 rxq[rx_queue_id] = NULL;
2000 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2003 dev->data->rx_queue_state[rx_queue_id] =
2004 RTE_ETH_QUEUE_STATE_HAIRPIN;
2005 return eth_err(port_id, ret);
2009 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2010 uint16_t nb_tx_desc, unsigned int socket_id,
2011 const struct rte_eth_txconf *tx_conf)
2013 struct rte_eth_dev *dev;
2014 struct rte_eth_dev_info dev_info;
2015 struct rte_eth_txconf local_conf;
2019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2021 dev = &rte_eth_devices[port_id];
2022 if (tx_queue_id >= dev->data->nb_tx_queues) {
2023 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2029 ret = rte_eth_dev_info_get(port_id, &dev_info);
2033 /* Use default specified by driver, if nb_tx_desc is zero */
2034 if (nb_tx_desc == 0) {
2035 nb_tx_desc = dev_info.default_txportconf.ring_size;
2036 /* If driver default is zero, fall back on EAL default */
2037 if (nb_tx_desc == 0)
2038 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2040 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2041 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2042 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2044 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2045 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2046 dev_info.tx_desc_lim.nb_min,
2047 dev_info.tx_desc_lim.nb_align);
2051 if (dev->data->dev_started &&
2052 !(dev_info.dev_capa &
2053 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2056 if (dev->data->dev_started &&
2057 (dev->data->tx_queue_state[tx_queue_id] !=
2058 RTE_ETH_QUEUE_STATE_STOPPED))
2061 txq = dev->data->tx_queues;
2062 if (txq[tx_queue_id]) {
2063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2065 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2066 txq[tx_queue_id] = NULL;
2069 if (tx_conf == NULL)
2070 tx_conf = &dev_info.default_txconf;
2072 local_conf = *tx_conf;
2075 * If an offloading has already been enabled in
2076 * rte_eth_dev_configure(), it has been enabled on all queues,
2077 * so there is no need to enable it in this queue again.
2078 * The local_conf.offloads input to underlying PMD only carries
2079 * those offloadings which are only enabled on this queue and
2080 * not enabled on all queues.
2082 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2085 * New added offloadings for this queue are those not enabled in
2086 * rte_eth_dev_configure() and they must be per-queue type.
2087 * A pure per-port offloading can't be enabled on a queue while
2088 * disabled on another queue. A pure per-port offloading can't
2089 * be enabled for any queue as new added one if it hasn't been
2090 * enabled in rte_eth_dev_configure().
2092 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2093 local_conf.offloads) {
2095 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2096 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2097 port_id, tx_queue_id, local_conf.offloads,
2098 dev_info.tx_queue_offload_capa,
2103 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2104 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2105 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2109 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2110 uint16_t nb_tx_desc,
2111 const struct rte_eth_hairpin_conf *conf)
2113 struct rte_eth_dev *dev;
2114 struct rte_eth_hairpin_cap cap;
2120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2121 dev = &rte_eth_devices[port_id];
2122 if (tx_queue_id >= dev->data->nb_tx_queues) {
2123 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2126 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2131 /* if nb_rx_desc is zero use max number of desc from the driver. */
2132 if (nb_tx_desc == 0)
2133 nb_tx_desc = cap.max_nb_desc;
2134 if (nb_tx_desc > cap.max_nb_desc) {
2136 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2137 nb_tx_desc, cap.max_nb_desc);
2140 if (conf->peer_count > cap.max_tx_2_rx) {
2142 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2143 conf->peer_count, cap.max_tx_2_rx);
2146 if (conf->peer_count == 0) {
2148 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2152 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2153 cap.max_nb_queues != UINT16_MAX; i++) {
2154 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2157 if (count > cap.max_nb_queues) {
2158 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2162 if (dev->data->dev_started)
2164 txq = dev->data->tx_queues;
2165 if (txq[tx_queue_id] != NULL) {
2166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2168 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2169 txq[tx_queue_id] = NULL;
2171 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2172 (dev, tx_queue_id, nb_tx_desc, conf);
2174 dev->data->tx_queue_state[tx_queue_id] =
2175 RTE_ETH_QUEUE_STATE_HAIRPIN;
2176 return eth_err(port_id, ret);
2180 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2181 void *userdata __rte_unused)
2185 for (i = 0; i < unsent; i++)
2186 rte_pktmbuf_free(pkts[i]);
2190 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2193 uint64_t *count = userdata;
2196 for (i = 0; i < unsent; i++)
2197 rte_pktmbuf_free(pkts[i]);
2203 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2204 buffer_tx_error_fn cbfn, void *userdata)
2206 buffer->error_callback = cbfn;
2207 buffer->error_userdata = userdata;
2212 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2219 buffer->size = size;
2220 if (buffer->error_callback == NULL) {
2221 ret = rte_eth_tx_buffer_set_err_callback(
2222 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2229 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2231 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2234 /* Validate Input Data. Bail if not valid or not supported. */
2235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2238 /* Call driver to free pending mbufs. */
2239 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2241 return eth_err(port_id, ret);
2245 rte_eth_promiscuous_enable(uint16_t port_id)
2247 struct rte_eth_dev *dev;
2250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2251 dev = &rte_eth_devices[port_id];
2253 if (dev->data->promiscuous == 1)
2256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2258 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2259 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2261 return eth_err(port_id, diag);
2265 rte_eth_promiscuous_disable(uint16_t port_id)
2267 struct rte_eth_dev *dev;
2270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2271 dev = &rte_eth_devices[port_id];
2273 if (dev->data->promiscuous == 0)
2276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2278 dev->data->promiscuous = 0;
2279 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2281 dev->data->promiscuous = 1;
2283 return eth_err(port_id, diag);
2287 rte_eth_promiscuous_get(uint16_t port_id)
2289 struct rte_eth_dev *dev;
2291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2293 dev = &rte_eth_devices[port_id];
2294 return dev->data->promiscuous;
2298 rte_eth_allmulticast_enable(uint16_t port_id)
2300 struct rte_eth_dev *dev;
2303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2304 dev = &rte_eth_devices[port_id];
2306 if (dev->data->all_multicast == 1)
2309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2310 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2311 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2313 return eth_err(port_id, diag);
2317 rte_eth_allmulticast_disable(uint16_t port_id)
2319 struct rte_eth_dev *dev;
2322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2323 dev = &rte_eth_devices[port_id];
2325 if (dev->data->all_multicast == 0)
2328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2329 dev->data->all_multicast = 0;
2330 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2332 dev->data->all_multicast = 1;
2334 return eth_err(port_id, diag);
2338 rte_eth_allmulticast_get(uint16_t port_id)
2340 struct rte_eth_dev *dev;
2342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2344 dev = &rte_eth_devices[port_id];
2345 return dev->data->all_multicast;
2349 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2351 struct rte_eth_dev *dev;
2353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2354 dev = &rte_eth_devices[port_id];
2356 if (dev->data->dev_conf.intr_conf.lsc &&
2357 dev->data->dev_started)
2358 rte_eth_linkstatus_get(dev, eth_link);
2360 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2361 (*dev->dev_ops->link_update)(dev, 1);
2362 *eth_link = dev->data->dev_link;
2369 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2371 struct rte_eth_dev *dev;
2373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2374 dev = &rte_eth_devices[port_id];
2376 if (dev->data->dev_conf.intr_conf.lsc &&
2377 dev->data->dev_started)
2378 rte_eth_linkstatus_get(dev, eth_link);
2380 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2381 (*dev->dev_ops->link_update)(dev, 0);
2382 *eth_link = dev->data->dev_link;
2389 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2391 struct rte_eth_dev *dev;
2393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2395 dev = &rte_eth_devices[port_id];
2396 memset(stats, 0, sizeof(*stats));
2398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2399 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2400 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2404 rte_eth_stats_reset(uint16_t port_id)
2406 struct rte_eth_dev *dev;
2409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2410 dev = &rte_eth_devices[port_id];
2412 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2413 ret = (*dev->dev_ops->stats_reset)(dev);
2415 return eth_err(port_id, ret);
2417 dev->data->rx_mbuf_alloc_failed = 0;
2423 get_xstats_basic_count(struct rte_eth_dev *dev)
2425 uint16_t nb_rxqs, nb_txqs;
2428 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2429 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2431 count = RTE_NB_STATS;
2432 count += nb_rxqs * RTE_NB_RXQ_STATS;
2433 count += nb_txqs * RTE_NB_TXQ_STATS;
2439 get_xstats_count(uint16_t port_id)
2441 struct rte_eth_dev *dev;
2444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2445 dev = &rte_eth_devices[port_id];
2446 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2447 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2450 return eth_err(port_id, count);
2452 if (dev->dev_ops->xstats_get_names != NULL) {
2453 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2455 return eth_err(port_id, count);
2460 count += get_xstats_basic_count(dev);
2466 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2469 int cnt_xstats, idx_xstat;
2471 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2479 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2484 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2485 if (cnt_xstats < 0) {
2486 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2490 /* Get id-name lookup table */
2491 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2493 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2494 port_id, xstats_names, cnt_xstats, NULL)) {
2495 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2499 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2500 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2509 /* retrieve basic stats names */
2511 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2512 struct rte_eth_xstat_name *xstats_names)
2514 int cnt_used_entries = 0;
2515 uint32_t idx, id_queue;
2518 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2519 strlcpy(xstats_names[cnt_used_entries].name,
2520 rte_stats_strings[idx].name,
2521 sizeof(xstats_names[0].name));
2524 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2525 for (id_queue = 0; id_queue < num_q; id_queue++) {
2526 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2527 snprintf(xstats_names[cnt_used_entries].name,
2528 sizeof(xstats_names[0].name),
2530 id_queue, rte_rxq_stats_strings[idx].name);
2535 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2536 for (id_queue = 0; id_queue < num_q; id_queue++) {
2537 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2538 snprintf(xstats_names[cnt_used_entries].name,
2539 sizeof(xstats_names[0].name),
2541 id_queue, rte_txq_stats_strings[idx].name);
2545 return cnt_used_entries;
2548 /* retrieve ethdev extended statistics names */
2550 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2551 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2554 struct rte_eth_xstat_name *xstats_names_copy;
2555 unsigned int no_basic_stat_requested = 1;
2556 unsigned int no_ext_stat_requested = 1;
2557 unsigned int expected_entries;
2558 unsigned int basic_count;
2559 struct rte_eth_dev *dev;
2563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2564 dev = &rte_eth_devices[port_id];
2566 basic_count = get_xstats_basic_count(dev);
2567 ret = get_xstats_count(port_id);
2570 expected_entries = (unsigned int)ret;
2572 /* Return max number of stats if no ids given */
2575 return expected_entries;
2576 else if (xstats_names && size < expected_entries)
2577 return expected_entries;
2580 if (ids && !xstats_names)
2583 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2584 uint64_t ids_copy[size];
2586 for (i = 0; i < size; i++) {
2587 if (ids[i] < basic_count) {
2588 no_basic_stat_requested = 0;
2593 * Convert ids to xstats ids that PMD knows.
2594 * ids known by user are basic + extended stats.
2596 ids_copy[i] = ids[i] - basic_count;
2599 if (no_basic_stat_requested)
2600 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2601 xstats_names, ids_copy, size);
2604 /* Retrieve all stats */
2606 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2608 if (num_stats < 0 || num_stats > (int)expected_entries)
2611 return expected_entries;
2614 xstats_names_copy = calloc(expected_entries,
2615 sizeof(struct rte_eth_xstat_name));
2617 if (!xstats_names_copy) {
2618 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2623 for (i = 0; i < size; i++) {
2624 if (ids[i] >= basic_count) {
2625 no_ext_stat_requested = 0;
2631 /* Fill xstats_names_copy structure */
2632 if (ids && no_ext_stat_requested) {
2633 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2635 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2638 free(xstats_names_copy);
2644 for (i = 0; i < size; i++) {
2645 if (ids[i] >= expected_entries) {
2646 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2647 free(xstats_names_copy);
2650 xstats_names[i] = xstats_names_copy[ids[i]];
2653 free(xstats_names_copy);
2658 rte_eth_xstats_get_names(uint16_t port_id,
2659 struct rte_eth_xstat_name *xstats_names,
2662 struct rte_eth_dev *dev;
2663 int cnt_used_entries;
2664 int cnt_expected_entries;
2665 int cnt_driver_entries;
2667 cnt_expected_entries = get_xstats_count(port_id);
2668 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2669 (int)size < cnt_expected_entries)
2670 return cnt_expected_entries;
2672 /* port_id checked in get_xstats_count() */
2673 dev = &rte_eth_devices[port_id];
2675 cnt_used_entries = rte_eth_basic_stats_get_names(
2678 if (dev->dev_ops->xstats_get_names != NULL) {
2679 /* If there are any driver-specific xstats, append them
2682 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2684 xstats_names + cnt_used_entries,
2685 size - cnt_used_entries);
2686 if (cnt_driver_entries < 0)
2687 return eth_err(port_id, cnt_driver_entries);
2688 cnt_used_entries += cnt_driver_entries;
2691 return cnt_used_entries;
2696 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2698 struct rte_eth_dev *dev;
2699 struct rte_eth_stats eth_stats;
2700 unsigned int count = 0, i, q;
2701 uint64_t val, *stats_ptr;
2702 uint16_t nb_rxqs, nb_txqs;
2705 ret = rte_eth_stats_get(port_id, ð_stats);
2709 dev = &rte_eth_devices[port_id];
2711 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2712 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2715 for (i = 0; i < RTE_NB_STATS; i++) {
2716 stats_ptr = RTE_PTR_ADD(ð_stats,
2717 rte_stats_strings[i].offset);
2719 xstats[count++].value = val;
2723 for (q = 0; q < nb_rxqs; q++) {
2724 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2725 stats_ptr = RTE_PTR_ADD(ð_stats,
2726 rte_rxq_stats_strings[i].offset +
2727 q * sizeof(uint64_t));
2729 xstats[count++].value = val;
2734 for (q = 0; q < nb_txqs; q++) {
2735 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2736 stats_ptr = RTE_PTR_ADD(ð_stats,
2737 rte_txq_stats_strings[i].offset +
2738 q * sizeof(uint64_t));
2740 xstats[count++].value = val;
2746 /* retrieve ethdev extended statistics */
2748 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2749 uint64_t *values, unsigned int size)
2751 unsigned int no_basic_stat_requested = 1;
2752 unsigned int no_ext_stat_requested = 1;
2753 unsigned int num_xstats_filled;
2754 unsigned int basic_count;
2755 uint16_t expected_entries;
2756 struct rte_eth_dev *dev;
2760 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2761 ret = get_xstats_count(port_id);
2764 expected_entries = (uint16_t)ret;
2765 struct rte_eth_xstat xstats[expected_entries];
2766 dev = &rte_eth_devices[port_id];
2767 basic_count = get_xstats_basic_count(dev);
2769 /* Return max number of stats if no ids given */
2772 return expected_entries;
2773 else if (values && size < expected_entries)
2774 return expected_entries;
2780 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2781 unsigned int basic_count = get_xstats_basic_count(dev);
2782 uint64_t ids_copy[size];
2784 for (i = 0; i < size; i++) {
2785 if (ids[i] < basic_count) {
2786 no_basic_stat_requested = 0;
2791 * Convert ids to xstats ids that PMD knows.
2792 * ids known by user are basic + extended stats.
2794 ids_copy[i] = ids[i] - basic_count;
2797 if (no_basic_stat_requested)
2798 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2803 for (i = 0; i < size; i++) {
2804 if (ids[i] >= basic_count) {
2805 no_ext_stat_requested = 0;
2811 /* Fill the xstats structure */
2812 if (ids && no_ext_stat_requested)
2813 ret = rte_eth_basic_stats_get(port_id, xstats);
2815 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2819 num_xstats_filled = (unsigned int)ret;
2821 /* Return all stats */
2823 for (i = 0; i < num_xstats_filled; i++)
2824 values[i] = xstats[i].value;
2825 return expected_entries;
2829 for (i = 0; i < size; i++) {
2830 if (ids[i] >= expected_entries) {
2831 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2834 values[i] = xstats[ids[i]].value;
2840 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2843 struct rte_eth_dev *dev;
2844 unsigned int count = 0, i;
2845 signed int xcount = 0;
2846 uint16_t nb_rxqs, nb_txqs;
2849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2851 dev = &rte_eth_devices[port_id];
2853 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2854 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2856 /* Return generic statistics */
2857 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2858 (nb_txqs * RTE_NB_TXQ_STATS);
2860 /* implemented by the driver */
2861 if (dev->dev_ops->xstats_get != NULL) {
2862 /* Retrieve the xstats from the driver at the end of the
2865 xcount = (*dev->dev_ops->xstats_get)(dev,
2866 xstats ? xstats + count : NULL,
2867 (n > count) ? n - count : 0);
2870 return eth_err(port_id, xcount);
2873 if (n < count + xcount || xstats == NULL)
2874 return count + xcount;
2876 /* now fill the xstats structure */
2877 ret = rte_eth_basic_stats_get(port_id, xstats);
2882 for (i = 0; i < count; i++)
2884 /* add an offset to driver-specific stats */
2885 for ( ; i < count + xcount; i++)
2886 xstats[i].id += count;
2888 return count + xcount;
2891 /* reset ethdev extended statistics */
2893 rte_eth_xstats_reset(uint16_t port_id)
2895 struct rte_eth_dev *dev;
2897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2898 dev = &rte_eth_devices[port_id];
2900 /* implemented by the driver */
2901 if (dev->dev_ops->xstats_reset != NULL)
2902 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2904 /* fallback to default */
2905 return rte_eth_stats_reset(port_id);
2909 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2912 struct rte_eth_dev *dev;
2914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2916 dev = &rte_eth_devices[port_id];
2918 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2920 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2923 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2926 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2929 return (*dev->dev_ops->queue_stats_mapping_set)
2930 (dev, queue_id, stat_idx, is_rx);
2935 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2938 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2939 stat_idx, STAT_QMAP_TX));
2944 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2947 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2948 stat_idx, STAT_QMAP_RX));
2952 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2954 struct rte_eth_dev *dev;
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 dev = &rte_eth_devices[port_id];
2959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2960 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2961 fw_version, fw_size));
2965 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2967 struct rte_eth_dev *dev;
2968 const struct rte_eth_desc_lim lim = {
2969 .nb_max = UINT16_MAX,
2972 .nb_seg_max = UINT16_MAX,
2973 .nb_mtu_seg_max = UINT16_MAX,
2978 * Init dev_info before port_id check since caller does not have
2979 * return status and does not know if get is successful or not.
2981 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2982 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2985 dev = &rte_eth_devices[port_id];
2987 dev_info->rx_desc_lim = lim;
2988 dev_info->tx_desc_lim = lim;
2989 dev_info->device = dev->device;
2990 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2991 dev_info->max_mtu = UINT16_MAX;
2993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2994 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2996 /* Cleanup already filled in device information */
2997 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2998 return eth_err(port_id, diag);
3001 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3002 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3003 RTE_MAX_QUEUES_PER_PORT);
3004 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3005 RTE_MAX_QUEUES_PER_PORT);
3007 dev_info->driver_name = dev->device->driver->name;
3008 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3009 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3011 dev_info->dev_flags = &dev->data->dev_flags;
3017 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3018 uint32_t *ptypes, int num)
3021 struct rte_eth_dev *dev;
3022 const uint32_t *all_ptypes;
3024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3025 dev = &rte_eth_devices[port_id];
3026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3027 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3032 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3033 if (all_ptypes[i] & ptype_mask) {
3035 ptypes[j] = all_ptypes[i];
3043 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3044 uint32_t *set_ptypes, unsigned int num)
3046 const uint32_t valid_ptype_masks[] = {
3050 RTE_PTYPE_TUNNEL_MASK,
3051 RTE_PTYPE_INNER_L2_MASK,
3052 RTE_PTYPE_INNER_L3_MASK,
3053 RTE_PTYPE_INNER_L4_MASK,
3055 const uint32_t *all_ptypes;
3056 struct rte_eth_dev *dev;
3057 uint32_t unused_mask;
3061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3062 dev = &rte_eth_devices[port_id];
3064 if (num > 0 && set_ptypes == NULL)
3067 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3068 *dev->dev_ops->dev_ptypes_set == NULL) {
3073 if (ptype_mask == 0) {
3074 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3079 unused_mask = ptype_mask;
3080 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3081 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3082 if (mask && mask != valid_ptype_masks[i]) {
3086 unused_mask &= ~valid_ptype_masks[i];
3094 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3095 if (all_ptypes == NULL) {
3101 * Accommodate as many set_ptypes as possible. If the supplied
3102 * set_ptypes array is insufficient fill it partially.
3104 for (i = 0, j = 0; set_ptypes != NULL &&
3105 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3106 if (ptype_mask & all_ptypes[i]) {
3108 set_ptypes[j] = all_ptypes[i];
3116 if (set_ptypes != NULL && j < num)
3117 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3119 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3123 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3129 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3131 struct rte_eth_dev *dev;
3133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3134 dev = &rte_eth_devices[port_id];
3135 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3141 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3143 struct rte_eth_dev *dev;
3145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3147 dev = &rte_eth_devices[port_id];
3148 *mtu = dev->data->mtu;
3153 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3156 struct rte_eth_dev_info dev_info;
3157 struct rte_eth_dev *dev;
3159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3160 dev = &rte_eth_devices[port_id];
3161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3164 * Check if the device supports dev_infos_get, if it does not
3165 * skip min_mtu/max_mtu validation here as this requires values
3166 * that are populated within the call to rte_eth_dev_info_get()
3167 * which relies on dev->dev_ops->dev_infos_get.
3169 if (*dev->dev_ops->dev_infos_get != NULL) {
3170 ret = rte_eth_dev_info_get(port_id, &dev_info);
3174 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3178 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3180 dev->data->mtu = mtu;
3182 return eth_err(port_id, ret);
3186 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3188 struct rte_eth_dev *dev;
3191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3192 dev = &rte_eth_devices[port_id];
3193 if (!(dev->data->dev_conf.rxmode.offloads &
3194 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3195 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3200 if (vlan_id > 4095) {
3201 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3207 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3209 struct rte_vlan_filter_conf *vfc;
3213 vfc = &dev->data->vlan_filter_conf;
3214 vidx = vlan_id / 64;
3215 vbit = vlan_id % 64;
3218 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3220 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3223 return eth_err(port_id, ret);
3227 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3230 struct rte_eth_dev *dev;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3233 dev = &rte_eth_devices[port_id];
3234 if (rx_queue_id >= dev->data->nb_rx_queues) {
3235 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3239 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3240 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3246 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3247 enum rte_vlan_type vlan_type,
3250 struct rte_eth_dev *dev;
3252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3253 dev = &rte_eth_devices[port_id];
3254 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3256 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3261 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3263 struct rte_eth_dev *dev;
3267 uint64_t orig_offloads;
3268 uint64_t dev_offloads;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3271 dev = &rte_eth_devices[port_id];
3273 /* save original values in case of failure */
3274 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3275 dev_offloads = orig_offloads;
3277 /* check which option changed by application */
3278 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3279 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3282 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3284 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3285 mask |= ETH_VLAN_STRIP_MASK;
3288 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3289 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3292 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3294 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3295 mask |= ETH_VLAN_FILTER_MASK;
3298 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3299 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3302 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3304 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3305 mask |= ETH_VLAN_EXTEND_MASK;
3308 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3309 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3312 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3314 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3315 mask |= ETH_QINQ_STRIP_MASK;
3322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3323 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3324 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3326 /* hit an error restore original values */
3327 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3330 return eth_err(port_id, ret);
3334 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3336 struct rte_eth_dev *dev;
3337 uint64_t *dev_offloads;
3340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3341 dev = &rte_eth_devices[port_id];
3342 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3344 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3345 ret |= ETH_VLAN_STRIP_OFFLOAD;
3347 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3348 ret |= ETH_VLAN_FILTER_OFFLOAD;
3350 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3351 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3353 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3354 ret |= ETH_QINQ_STRIP_OFFLOAD;
3360 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3362 struct rte_eth_dev *dev;
3364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3365 dev = &rte_eth_devices[port_id];
3366 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3368 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3372 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3374 struct rte_eth_dev *dev;
3376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3377 dev = &rte_eth_devices[port_id];
3378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3379 memset(fc_conf, 0, sizeof(*fc_conf));
3380 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3384 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3386 struct rte_eth_dev *dev;
3388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3389 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3390 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3394 dev = &rte_eth_devices[port_id];
3395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3396 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3400 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3401 struct rte_eth_pfc_conf *pfc_conf)
3403 struct rte_eth_dev *dev;
3405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3406 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3407 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3411 dev = &rte_eth_devices[port_id];
3412 /* High water, low water validation are device specific */
3413 if (*dev->dev_ops->priority_flow_ctrl_set)
3414 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3420 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3428 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3429 for (i = 0; i < num; i++) {
3430 if (reta_conf[i].mask)
3438 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3442 uint16_t i, idx, shift;
3448 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3452 for (i = 0; i < reta_size; i++) {
3453 idx = i / RTE_RETA_GROUP_SIZE;
3454 shift = i % RTE_RETA_GROUP_SIZE;
3455 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3456 (reta_conf[idx].reta[shift] >= max_rxq)) {
3458 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3460 reta_conf[idx].reta[shift], max_rxq);
3469 rte_eth_dev_rss_reta_update(uint16_t port_id,
3470 struct rte_eth_rss_reta_entry64 *reta_conf,
3473 struct rte_eth_dev *dev;
3476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3477 /* Check mask bits */
3478 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3482 dev = &rte_eth_devices[port_id];
3484 /* Check entry value */
3485 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3486 dev->data->nb_rx_queues);
3490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3491 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3496 rte_eth_dev_rss_reta_query(uint16_t port_id,
3497 struct rte_eth_rss_reta_entry64 *reta_conf,
3500 struct rte_eth_dev *dev;
3503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3505 /* Check mask bits */
3506 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3510 dev = &rte_eth_devices[port_id];
3511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3512 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3517 rte_eth_dev_rss_hash_update(uint16_t port_id,
3518 struct rte_eth_rss_conf *rss_conf)
3520 struct rte_eth_dev *dev;
3521 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3526 ret = rte_eth_dev_info_get(port_id, &dev_info);
3530 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3532 dev = &rte_eth_devices[port_id];
3533 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3534 dev_info.flow_type_rss_offloads) {
3536 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3537 port_id, rss_conf->rss_hf,
3538 dev_info.flow_type_rss_offloads);
3541 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3542 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3547 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3548 struct rte_eth_rss_conf *rss_conf)
3550 struct rte_eth_dev *dev;
3552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3553 dev = &rte_eth_devices[port_id];
3554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3555 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3560 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3561 struct rte_eth_udp_tunnel *udp_tunnel)
3563 struct rte_eth_dev *dev;
3565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3566 if (udp_tunnel == NULL) {
3567 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3571 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3572 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3576 dev = &rte_eth_devices[port_id];
3577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3578 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3583 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3584 struct rte_eth_udp_tunnel *udp_tunnel)
3586 struct rte_eth_dev *dev;
3588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3589 dev = &rte_eth_devices[port_id];
3591 if (udp_tunnel == NULL) {
3592 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3596 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3597 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3601 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3602 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3607 rte_eth_led_on(uint16_t port_id)
3609 struct rte_eth_dev *dev;
3611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 dev = &rte_eth_devices[port_id];
3613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3614 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3618 rte_eth_led_off(uint16_t port_id)
3620 struct rte_eth_dev *dev;
3622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3623 dev = &rte_eth_devices[port_id];
3624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3625 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3629 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3633 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3635 struct rte_eth_dev_info dev_info;
3636 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3640 ret = rte_eth_dev_info_get(port_id, &dev_info);
3644 for (i = 0; i < dev_info.max_mac_addrs; i++)
3645 if (memcmp(addr, &dev->data->mac_addrs[i],
3646 RTE_ETHER_ADDR_LEN) == 0)
3652 static const struct rte_ether_addr null_mac_addr;
3655 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3658 struct rte_eth_dev *dev;
3663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3664 dev = &rte_eth_devices[port_id];
3665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3667 if (rte_is_zero_ether_addr(addr)) {
3668 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3672 if (pool >= ETH_64_POOLS) {
3673 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3677 index = get_mac_addr_index(port_id, addr);
3679 index = get_mac_addr_index(port_id, &null_mac_addr);
3681 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3686 pool_mask = dev->data->mac_pool_sel[index];
3688 /* Check if both MAC address and pool is already there, and do nothing */
3689 if (pool_mask & (1ULL << pool))
3694 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3697 /* Update address in NIC data structure */
3698 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3700 /* Update pool bitmap in NIC data structure */
3701 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3704 return eth_err(port_id, ret);
3708 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3710 struct rte_eth_dev *dev;
3713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3714 dev = &rte_eth_devices[port_id];
3715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3717 index = get_mac_addr_index(port_id, addr);
3720 "Port %u: Cannot remove default MAC address\n",
3723 } else if (index < 0)
3724 return 0; /* Do nothing if address wasn't found */
3727 (*dev->dev_ops->mac_addr_remove)(dev, index);
3729 /* Update address in NIC data structure */
3730 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3732 /* reset pool bitmap */
3733 dev->data->mac_pool_sel[index] = 0;
3739 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3741 struct rte_eth_dev *dev;
3744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3746 if (!rte_is_valid_assigned_ether_addr(addr))
3749 dev = &rte_eth_devices[port_id];
3750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3752 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3756 /* Update default address in NIC data structure */
3757 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3764 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3768 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3770 struct rte_eth_dev_info dev_info;
3771 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3775 ret = rte_eth_dev_info_get(port_id, &dev_info);
3779 if (!dev->data->hash_mac_addrs)
3782 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3783 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3784 RTE_ETHER_ADDR_LEN) == 0)
3791 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3796 struct rte_eth_dev *dev;
3798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3800 dev = &rte_eth_devices[port_id];
3801 if (rte_is_zero_ether_addr(addr)) {
3802 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3807 index = get_hash_mac_addr_index(port_id, addr);
3808 /* Check if it's already there, and do nothing */
3809 if ((index >= 0) && on)
3815 "Port %u: the MAC address was not set in UTA\n",
3820 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3822 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3829 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3831 /* Update address in NIC data structure */
3833 rte_ether_addr_copy(addr,
3834 &dev->data->hash_mac_addrs[index]);
3836 rte_ether_addr_copy(&null_mac_addr,
3837 &dev->data->hash_mac_addrs[index]);
3840 return eth_err(port_id, ret);
3844 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3846 struct rte_eth_dev *dev;
3848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3850 dev = &rte_eth_devices[port_id];
3852 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3853 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3857 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3860 struct rte_eth_dev *dev;
3861 struct rte_eth_dev_info dev_info;
3862 struct rte_eth_link link;
3865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3867 ret = rte_eth_dev_info_get(port_id, &dev_info);
3871 dev = &rte_eth_devices[port_id];
3872 link = dev->data->dev_link;
3874 if (queue_idx > dev_info.max_tx_queues) {
3876 "Set queue rate limit:port %u: invalid queue id=%u\n",
3877 port_id, queue_idx);
3881 if (tx_rate > link.link_speed) {
3883 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3884 tx_rate, link.link_speed);
3888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3889 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3890 queue_idx, tx_rate));
3894 rte_eth_mirror_rule_set(uint16_t port_id,
3895 struct rte_eth_mirror_conf *mirror_conf,
3896 uint8_t rule_id, uint8_t on)
3898 struct rte_eth_dev *dev;
3900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3901 if (mirror_conf->rule_type == 0) {
3902 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3906 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3907 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3912 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3913 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3914 (mirror_conf->pool_mask == 0)) {
3916 "Invalid mirror pool, pool mask can not be 0\n");
3920 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3921 mirror_conf->vlan.vlan_mask == 0) {
3923 "Invalid vlan mask, vlan mask can not be 0\n");
3927 dev = &rte_eth_devices[port_id];
3928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3930 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3931 mirror_conf, rule_id, on));
3935 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3937 struct rte_eth_dev *dev;
3939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3941 dev = &rte_eth_devices[port_id];
3942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3944 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3948 RTE_INIT(eth_dev_init_cb_lists)
3952 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3953 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3957 rte_eth_dev_callback_register(uint16_t port_id,
3958 enum rte_eth_event_type event,
3959 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3961 struct rte_eth_dev *dev;
3962 struct rte_eth_dev_callback *user_cb;
3963 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3969 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3970 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3974 if (port_id == RTE_ETH_ALL) {
3976 last_port = RTE_MAX_ETHPORTS - 1;
3978 next_port = last_port = port_id;
3981 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3984 dev = &rte_eth_devices[next_port];
3986 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3987 if (user_cb->cb_fn == cb_fn &&
3988 user_cb->cb_arg == cb_arg &&
3989 user_cb->event == event) {
3994 /* create a new callback. */
3995 if (user_cb == NULL) {
3996 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3997 sizeof(struct rte_eth_dev_callback), 0);
3998 if (user_cb != NULL) {
3999 user_cb->cb_fn = cb_fn;
4000 user_cb->cb_arg = cb_arg;
4001 user_cb->event = event;
4002 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4005 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4006 rte_eth_dev_callback_unregister(port_id, event,
4012 } while (++next_port <= last_port);
4014 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4019 rte_eth_dev_callback_unregister(uint16_t port_id,
4020 enum rte_eth_event_type event,
4021 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4024 struct rte_eth_dev *dev;
4025 struct rte_eth_dev_callback *cb, *next;
4026 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4032 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4033 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4037 if (port_id == RTE_ETH_ALL) {
4039 last_port = RTE_MAX_ETHPORTS - 1;
4041 next_port = last_port = port_id;
4044 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4047 dev = &rte_eth_devices[next_port];
4049 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4052 next = TAILQ_NEXT(cb, next);
4054 if (cb->cb_fn != cb_fn || cb->event != event ||
4055 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4059 * if this callback is not executing right now,
4062 if (cb->active == 0) {
4063 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4069 } while (++next_port <= last_port);
4071 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4076 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4077 enum rte_eth_event_type event, void *ret_param)
4079 struct rte_eth_dev_callback *cb_lst;
4080 struct rte_eth_dev_callback dev_cb;
4083 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4084 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4085 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4089 if (ret_param != NULL)
4090 dev_cb.ret_param = ret_param;
4092 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4093 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4094 dev_cb.cb_arg, dev_cb.ret_param);
4095 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4098 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4103 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4108 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4110 dev->state = RTE_ETH_DEV_ATTACHED;
4114 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4117 struct rte_eth_dev *dev;
4118 struct rte_intr_handle *intr_handle;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4124 dev = &rte_eth_devices[port_id];
4126 if (!dev->intr_handle) {
4127 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4131 intr_handle = dev->intr_handle;
4132 if (!intr_handle->intr_vec) {
4133 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4137 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4138 vec = intr_handle->intr_vec[qid];
4139 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4140 if (rc && rc != -EEXIST) {
4142 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4143 port_id, qid, op, epfd, vec);
4151 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4153 struct rte_intr_handle *intr_handle;
4154 struct rte_eth_dev *dev;
4155 unsigned int efd_idx;
4159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4161 dev = &rte_eth_devices[port_id];
4163 if (queue_id >= dev->data->nb_rx_queues) {
4164 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4168 if (!dev->intr_handle) {
4169 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4173 intr_handle = dev->intr_handle;
4174 if (!intr_handle->intr_vec) {
4175 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4179 vec = intr_handle->intr_vec[queue_id];
4180 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4181 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4182 fd = intr_handle->efds[efd_idx];
4187 const struct rte_memzone *
4188 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4189 uint16_t queue_id, size_t size, unsigned align,
4192 char z_name[RTE_MEMZONE_NAMESIZE];
4193 const struct rte_memzone *mz;
4196 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4197 dev->data->port_id, queue_id, ring_name);
4198 if (rc >= RTE_MEMZONE_NAMESIZE) {
4199 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4200 rte_errno = ENAMETOOLONG;
4204 mz = rte_memzone_lookup(z_name);
4208 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4209 RTE_MEMZONE_IOVA_CONTIG, align);
4213 rte_eth_dev_create(struct rte_device *device, const char *name,
4214 size_t priv_data_size,
4215 ethdev_bus_specific_init ethdev_bus_specific_init,
4216 void *bus_init_params,
4217 ethdev_init_t ethdev_init, void *init_params)
4219 struct rte_eth_dev *ethdev;
4222 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4224 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4225 ethdev = rte_eth_dev_allocate(name);
4229 if (priv_data_size) {
4230 ethdev->data->dev_private = rte_zmalloc_socket(
4231 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4234 if (!ethdev->data->dev_private) {
4235 RTE_LOG(ERR, EAL, "failed to allocate private data");
4241 ethdev = rte_eth_dev_attach_secondary(name);
4243 RTE_LOG(ERR, EAL, "secondary process attach failed, "
4244 "ethdev doesn't exist");
4249 ethdev->device = device;
4251 if (ethdev_bus_specific_init) {
4252 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4255 "ethdev bus specific initialisation failed");
4260 retval = ethdev_init(ethdev, init_params);
4262 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4266 rte_eth_dev_probing_finish(ethdev);
4271 rte_eth_dev_release_port(ethdev);
4276 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4277 ethdev_uninit_t ethdev_uninit)
4281 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4285 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4287 ret = ethdev_uninit(ethdev);
4291 return rte_eth_dev_release_port(ethdev);
4295 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4296 int epfd, int op, void *data)
4299 struct rte_eth_dev *dev;
4300 struct rte_intr_handle *intr_handle;
4303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4305 dev = &rte_eth_devices[port_id];
4306 if (queue_id >= dev->data->nb_rx_queues) {
4307 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4311 if (!dev->intr_handle) {
4312 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4316 intr_handle = dev->intr_handle;
4317 if (!intr_handle->intr_vec) {
4318 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4322 vec = intr_handle->intr_vec[queue_id];
4323 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4324 if (rc && rc != -EEXIST) {
4326 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4327 port_id, queue_id, op, epfd, vec);
4335 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4338 struct rte_eth_dev *dev;
4340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4342 dev = &rte_eth_devices[port_id];
4344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4345 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4350 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4353 struct rte_eth_dev *dev;
4355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4357 dev = &rte_eth_devices[port_id];
4359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4360 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4366 rte_eth_dev_filter_supported(uint16_t port_id,
4367 enum rte_filter_type filter_type)
4369 struct rte_eth_dev *dev;
4371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4373 dev = &rte_eth_devices[port_id];
4374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4375 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4376 RTE_ETH_FILTER_NOP, NULL);
4380 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4381 enum rte_filter_op filter_op, void *arg)
4383 struct rte_eth_dev *dev;
4385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4387 dev = &rte_eth_devices[port_id];
4388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4389 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4393 const struct rte_eth_rxtx_callback *
4394 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4395 rte_rx_callback_fn fn, void *user_param)
4397 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4398 rte_errno = ENOTSUP;
4401 struct rte_eth_dev *dev;
4403 /* check input parameters */
4404 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4405 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4409 dev = &rte_eth_devices[port_id];
4410 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4414 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4422 cb->param = user_param;
4424 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4425 /* Add the callbacks in fifo order. */
4426 struct rte_eth_rxtx_callback *tail =
4427 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4430 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4437 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4442 const struct rte_eth_rxtx_callback *
4443 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4444 rte_rx_callback_fn fn, void *user_param)
4446 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4447 rte_errno = ENOTSUP;
4450 /* check input parameters */
4451 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4452 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4457 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4465 cb->param = user_param;
4467 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4468 /* Add the callbacks at first position */
4469 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4471 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4472 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4477 const struct rte_eth_rxtx_callback *
4478 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4479 rte_tx_callback_fn fn, void *user_param)
4481 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4482 rte_errno = ENOTSUP;
4485 struct rte_eth_dev *dev;
4487 /* check input parameters */
4488 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4489 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4494 dev = &rte_eth_devices[port_id];
4495 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4500 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4508 cb->param = user_param;
4510 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4511 /* Add the callbacks in fifo order. */
4512 struct rte_eth_rxtx_callback *tail =
4513 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4516 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4523 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4529 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4530 const struct rte_eth_rxtx_callback *user_cb)
4532 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4535 /* Check input parameters. */
4536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4537 if (user_cb == NULL ||
4538 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4541 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4542 struct rte_eth_rxtx_callback *cb;
4543 struct rte_eth_rxtx_callback **prev_cb;
4546 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4547 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4548 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4550 if (cb == user_cb) {
4551 /* Remove the user cb from the callback list. */
4552 *prev_cb = cb->next;
4557 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4563 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4564 const struct rte_eth_rxtx_callback *user_cb)
4566 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4569 /* Check input parameters. */
4570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4571 if (user_cb == NULL ||
4572 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4575 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4577 struct rte_eth_rxtx_callback *cb;
4578 struct rte_eth_rxtx_callback **prev_cb;
4580 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4581 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4582 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4584 if (cb == user_cb) {
4585 /* Remove the user cb from the callback list. */
4586 *prev_cb = cb->next;
4591 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4597 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4598 struct rte_eth_rxq_info *qinfo)
4600 struct rte_eth_dev *dev;
4602 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4607 dev = &rte_eth_devices[port_id];
4608 if (queue_id >= dev->data->nb_rx_queues) {
4609 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4613 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4614 RTE_ETHDEV_LOG(INFO,
4615 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4620 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4622 memset(qinfo, 0, sizeof(*qinfo));
4623 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4628 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4629 struct rte_eth_txq_info *qinfo)
4631 struct rte_eth_dev *dev;
4633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4638 dev = &rte_eth_devices[port_id];
4639 if (queue_id >= dev->data->nb_tx_queues) {
4640 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4644 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4645 RTE_ETHDEV_LOG(INFO,
4646 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4651 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4653 memset(qinfo, 0, sizeof(*qinfo));
4654 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4660 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4661 struct rte_eth_burst_mode *mode)
4663 struct rte_eth_dev *dev;
4665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4670 dev = &rte_eth_devices[port_id];
4672 if (queue_id >= dev->data->nb_rx_queues) {
4673 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4678 memset(mode, 0, sizeof(*mode));
4679 return eth_err(port_id,
4680 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4684 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4685 struct rte_eth_burst_mode *mode)
4687 struct rte_eth_dev *dev;
4689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4694 dev = &rte_eth_devices[port_id];
4696 if (queue_id >= dev->data->nb_tx_queues) {
4697 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4702 memset(mode, 0, sizeof(*mode));
4703 return eth_err(port_id,
4704 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4708 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4709 struct rte_ether_addr *mc_addr_set,
4710 uint32_t nb_mc_addr)
4712 struct rte_eth_dev *dev;
4714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4716 dev = &rte_eth_devices[port_id];
4717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4718 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4719 mc_addr_set, nb_mc_addr));
4723 rte_eth_timesync_enable(uint16_t port_id)
4725 struct rte_eth_dev *dev;
4727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4728 dev = &rte_eth_devices[port_id];
4730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4731 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4735 rte_eth_timesync_disable(uint16_t port_id)
4737 struct rte_eth_dev *dev;
4739 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4740 dev = &rte_eth_devices[port_id];
4742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4743 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4747 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4750 struct rte_eth_dev *dev;
4752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4753 dev = &rte_eth_devices[port_id];
4755 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4756 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4757 (dev, timestamp, flags));
4761 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4762 struct timespec *timestamp)
4764 struct rte_eth_dev *dev;
4766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4767 dev = &rte_eth_devices[port_id];
4769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4770 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4775 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4777 struct rte_eth_dev *dev;
4779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4780 dev = &rte_eth_devices[port_id];
4782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4783 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4788 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4790 struct rte_eth_dev *dev;
4792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4793 dev = &rte_eth_devices[port_id];
4795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4796 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4801 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4803 struct rte_eth_dev *dev;
4805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4806 dev = &rte_eth_devices[port_id];
4808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4809 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4814 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4816 struct rte_eth_dev *dev;
4818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4819 dev = &rte_eth_devices[port_id];
4821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4822 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4826 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4828 struct rte_eth_dev *dev;
4830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4832 dev = &rte_eth_devices[port_id];
4833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4834 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4838 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4840 struct rte_eth_dev *dev;
4842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4844 dev = &rte_eth_devices[port_id];
4845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4846 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4850 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4852 struct rte_eth_dev *dev;
4854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4856 dev = &rte_eth_devices[port_id];
4857 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4858 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4862 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4864 struct rte_eth_dev *dev;
4866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4868 dev = &rte_eth_devices[port_id];
4869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4870 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4874 rte_eth_dev_get_module_info(uint16_t port_id,
4875 struct rte_eth_dev_module_info *modinfo)
4877 struct rte_eth_dev *dev;
4879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4881 dev = &rte_eth_devices[port_id];
4882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4883 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4887 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4888 struct rte_dev_eeprom_info *info)
4890 struct rte_eth_dev *dev;
4892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4894 dev = &rte_eth_devices[port_id];
4895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4896 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4900 rte_eth_dev_get_dcb_info(uint16_t port_id,
4901 struct rte_eth_dcb_info *dcb_info)
4903 struct rte_eth_dev *dev;
4905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4907 dev = &rte_eth_devices[port_id];
4908 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4911 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4915 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4916 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4918 struct rte_eth_dev *dev;
4920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4921 if (l2_tunnel == NULL) {
4922 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4926 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4927 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4931 dev = &rte_eth_devices[port_id];
4932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4934 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4939 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4940 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4944 struct rte_eth_dev *dev;
4946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4948 if (l2_tunnel == NULL) {
4949 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4953 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4954 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4959 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4963 dev = &rte_eth_devices[port_id];
4964 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4966 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4967 l2_tunnel, mask, en));
4971 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4972 const struct rte_eth_desc_lim *desc_lim)
4974 if (desc_lim->nb_align != 0)
4975 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4977 if (desc_lim->nb_max != 0)
4978 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4980 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4984 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4985 uint16_t *nb_rx_desc,
4986 uint16_t *nb_tx_desc)
4988 struct rte_eth_dev_info dev_info;
4991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4993 ret = rte_eth_dev_info_get(port_id, &dev_info);
4997 if (nb_rx_desc != NULL)
4998 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5000 if (nb_tx_desc != NULL)
5001 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5007 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5008 struct rte_eth_hairpin_cap *cap)
5010 struct rte_eth_dev *dev;
5012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5014 dev = &rte_eth_devices[port_id];
5015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5016 memset(cap, 0, sizeof(*cap));
5017 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5021 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5023 if (dev->data->rx_queue_state[queue_id] ==
5024 RTE_ETH_QUEUE_STATE_HAIRPIN)
5030 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5032 if (dev->data->tx_queue_state[queue_id] ==
5033 RTE_ETH_QUEUE_STATE_HAIRPIN)
5039 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5041 struct rte_eth_dev *dev;
5043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5048 dev = &rte_eth_devices[port_id];
5050 if (*dev->dev_ops->pool_ops_supported == NULL)
5051 return 1; /* all pools are supported */
5053 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5057 * A set of values to describe the possible states of a switch domain.
5059 enum rte_eth_switch_domain_state {
5060 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5061 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5065 * Array of switch domains available for allocation. Array is sized to
5066 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5067 * ethdev ports in a single process.
5069 static struct rte_eth_dev_switch {
5070 enum rte_eth_switch_domain_state state;
5071 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5074 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5078 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5080 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5081 if (rte_eth_switch_domains[i].state ==
5082 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5083 rte_eth_switch_domains[i].state =
5084 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5094 rte_eth_switch_domain_free(uint16_t domain_id)
5096 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5097 domain_id >= RTE_MAX_ETHPORTS)
5100 if (rte_eth_switch_domains[domain_id].state !=
5101 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5104 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5110 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5113 struct rte_kvargs_pair *pair;
5116 arglist->str = strdup(str_in);
5117 if (arglist->str == NULL)
5120 letter = arglist->str;
5123 pair = &arglist->pairs[0];
5126 case 0: /* Initial */
5129 else if (*letter == '\0')
5136 case 1: /* Parsing key */
5137 if (*letter == '=') {
5139 pair->value = letter + 1;
5141 } else if (*letter == ',' || *letter == '\0')
5146 case 2: /* Parsing value */
5149 else if (*letter == ',') {
5152 pair = &arglist->pairs[arglist->count];
5154 } else if (*letter == '\0') {
5157 pair = &arglist->pairs[arglist->count];
5162 case 3: /* Parsing list */
5165 else if (*letter == '\0')
5174 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5176 struct rte_kvargs args;
5177 struct rte_kvargs_pair *pair;
5181 memset(eth_da, 0, sizeof(*eth_da));
5183 result = rte_eth_devargs_tokenise(&args, dargs);
5187 for (i = 0; i < args.count; i++) {
5188 pair = &args.pairs[i];
5189 if (strcmp("representor", pair->key) == 0) {
5190 result = rte_eth_devargs_parse_list(pair->value,
5191 rte_eth_devargs_parse_representor_ports,
5206 handle_port_list(const char *cmd __rte_unused,
5207 const char *params __rte_unused,
5208 struct rte_tel_data *d)
5212 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5213 RTE_ETH_FOREACH_DEV(port_id)
5214 rte_tel_data_add_array_int(d, port_id);
5219 handle_port_xstats(const char *cmd __rte_unused,
5221 struct rte_tel_data *d)
5223 struct rte_eth_xstat *eth_xstats;
5224 struct rte_eth_xstat_name *xstat_names;
5225 int port_id, num_xstats;
5228 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5231 port_id = atoi(params);
5232 if (!rte_eth_dev_is_valid_port(port_id))
5235 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5239 /* use one malloc for both names and stats */
5240 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5241 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5242 if (eth_xstats == NULL)
5244 xstat_names = (void *)ð_xstats[num_xstats];
5246 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5247 if (ret < 0 || ret > num_xstats) {
5252 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5253 if (ret < 0 || ret > num_xstats) {
5258 rte_tel_data_start_dict(d);
5259 for (i = 0; i < num_xstats; i++)
5260 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5261 eth_xstats[i].value);
5266 handle_port_link_status(const char *cmd __rte_unused,
5268 struct rte_tel_data *d)
5270 static const char *status_str = "status";
5272 struct rte_eth_link link;
5274 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5277 port_id = atoi(params);
5278 if (!rte_eth_dev_is_valid_port(port_id))
5281 ret = rte_eth_link_get(port_id, &link);
5285 rte_tel_data_start_dict(d);
5286 if (!link.link_status) {
5287 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5290 rte_tel_data_add_dict_string(d, status_str, "UP");
5291 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5292 rte_tel_data_add_dict_string(d, "duplex",
5293 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5294 "full-duplex" : "half-duplex");
5298 RTE_INIT(ethdev_init_log)
5300 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
5301 if (rte_eth_dev_logtype >= 0)
5302 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);
5303 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5304 "Returns list of available ethdev ports. Takes no parameters");
5305 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5306 "Returns the extended stats for a port. Parameters: int port_id");
5307 rte_telemetry_register_cmd("/ethdev/link_status",
5308 handle_port_link_status,
5309 "Returns the link status for a port. Parameters: int port_id");