1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
131 #undef RTE_RX_OFFLOAD_BIT2STR
133 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
134 { DEV_TX_OFFLOAD_##_name, #_name }
136 static const struct {
139 } rte_tx_offload_names[] = {
140 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
141 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
142 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
149 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
154 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
155 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
156 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
157 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 #undef RTE_TX_OFFLOAD_BIT2STR
163 * The user application callback description.
165 * It contains callback address to be registered by user application,
166 * the pointer to the parameters for callback, and the event type.
168 struct rte_eth_dev_callback {
169 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
170 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
171 void *cb_arg; /**< Parameter for callback */
172 void *ret_param; /**< Return parameter */
173 enum rte_eth_event_type event; /**< Interrupt event type */
174 uint32_t active; /**< Callback is executing */
183 rte_eth_find_next(uint16_t port_id)
185 while (port_id < RTE_MAX_ETHPORTS &&
186 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
190 if (port_id >= RTE_MAX_ETHPORTS)
191 return RTE_MAX_ETHPORTS;
197 rte_eth_dev_shared_data_prepare(void)
199 const unsigned flags = 0;
200 const struct rte_memzone *mz;
202 rte_spinlock_lock(&rte_eth_shared_data_lock);
204 if (rte_eth_dev_shared_data == NULL) {
205 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
206 /* Allocate port data and ownership shared memory. */
207 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
208 sizeof(*rte_eth_dev_shared_data),
209 rte_socket_id(), flags);
211 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
213 rte_panic("Cannot allocate ethdev shared data\n");
215 rte_eth_dev_shared_data = mz->addr;
216 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
217 rte_eth_dev_shared_data->next_owner_id =
218 RTE_ETH_DEV_NO_OWNER + 1;
219 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
220 memset(rte_eth_dev_shared_data->data, 0,
221 sizeof(rte_eth_dev_shared_data->data));
225 rte_spinlock_unlock(&rte_eth_shared_data_lock);
229 is_allocated(const struct rte_eth_dev *ethdev)
231 return ethdev->data->name[0] != '\0';
234 static struct rte_eth_dev *
235 _rte_eth_dev_allocated(const char *name)
239 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
240 if (rte_eth_devices[i].data != NULL &&
241 strcmp(rte_eth_devices[i].data->name, name) == 0)
242 return &rte_eth_devices[i];
248 rte_eth_dev_allocated(const char *name)
250 struct rte_eth_dev *ethdev;
252 rte_eth_dev_shared_data_prepare();
254 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
256 ethdev = _rte_eth_dev_allocated(name);
258 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
264 rte_eth_dev_find_free_port(void)
268 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
269 /* Using shared name field to find a free port. */
270 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
271 RTE_ASSERT(rte_eth_devices[i].state ==
276 return RTE_MAX_ETHPORTS;
279 static struct rte_eth_dev *
280 eth_dev_get(uint16_t port_id)
282 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
284 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
286 eth_dev_last_created_port = port_id;
292 rte_eth_dev_allocate(const char *name)
295 struct rte_eth_dev *eth_dev = NULL;
297 rte_eth_dev_shared_data_prepare();
299 /* Synchronize port creation between primary and secondary threads. */
300 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
302 if (_rte_eth_dev_allocated(name) != NULL) {
304 "Ethernet device with name %s already allocated\n",
309 port_id = rte_eth_dev_find_free_port();
310 if (port_id == RTE_MAX_ETHPORTS) {
312 "Reached maximum number of Ethernet ports\n");
316 eth_dev = eth_dev_get(port_id);
317 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
318 eth_dev->data->port_id = port_id;
319 eth_dev->data->mtu = ETHER_MTU;
322 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
328 * Attach to a port already registered by the primary process, which
329 * makes sure that the same device would have the same port id both
330 * in the primary and secondary process.
333 rte_eth_dev_attach_secondary(const char *name)
336 struct rte_eth_dev *eth_dev = NULL;
338 rte_eth_dev_shared_data_prepare();
340 /* Synchronize port attachment to primary port creation and release. */
341 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
343 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
344 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
347 if (i == RTE_MAX_ETHPORTS) {
349 "Device %s is not driven by the primary process\n",
352 eth_dev = eth_dev_get(i);
353 RTE_ASSERT(eth_dev->data->port_id == i);
356 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
361 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
366 rte_eth_dev_shared_data_prepare();
368 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
370 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
372 eth_dev->state = RTE_ETH_DEV_UNUSED;
374 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
376 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
382 rte_eth_dev_is_valid_port(uint16_t port_id)
384 if (port_id >= RTE_MAX_ETHPORTS ||
385 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
392 rte_eth_is_valid_owner_id(uint64_t owner_id)
394 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
395 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
396 RTE_ETHDEV_LOG(ERR, "Invalid owner_id=%016"PRIx64"\n",
404 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
406 while (port_id < RTE_MAX_ETHPORTS &&
407 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
408 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
409 rte_eth_devices[port_id].data->owner.id != owner_id))
412 if (port_id >= RTE_MAX_ETHPORTS)
413 return RTE_MAX_ETHPORTS;
418 int __rte_experimental
419 rte_eth_dev_owner_new(uint64_t *owner_id)
421 rte_eth_dev_shared_data_prepare();
423 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
425 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
427 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
433 const struct rte_eth_dev_owner *new_owner)
435 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
436 struct rte_eth_dev_owner *port_owner;
439 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
440 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
445 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
446 !rte_eth_is_valid_owner_id(old_owner_id))
449 port_owner = &rte_eth_devices[port_id].data->owner;
450 if (port_owner->id != old_owner_id) {
452 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
453 port_id, port_owner->name, port_owner->id);
457 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
459 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
460 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
463 port_owner->id = new_owner->id;
465 RTE_ETHDEV_LOG(ERR, "Port %u owner is %s_%016"PRIx64"\n",
466 port_id, new_owner->name, new_owner->id);
471 int __rte_experimental
472 rte_eth_dev_owner_set(const uint16_t port_id,
473 const struct rte_eth_dev_owner *owner)
477 rte_eth_dev_shared_data_prepare();
479 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
481 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
483 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
487 int __rte_experimental
488 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
490 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
491 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
494 rte_eth_dev_shared_data_prepare();
496 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
498 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
500 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
504 void __rte_experimental
505 rte_eth_dev_owner_delete(const uint64_t owner_id)
509 rte_eth_dev_shared_data_prepare();
511 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
513 if (rte_eth_is_valid_owner_id(owner_id)) {
514 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
515 if (rte_eth_devices[port_id].data->owner.id == owner_id)
516 memset(&rte_eth_devices[port_id].data->owner, 0,
517 sizeof(struct rte_eth_dev_owner));
519 "All port owners owned by %016"PRIx64" identifier have removed\n",
523 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
526 int __rte_experimental
527 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
530 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
532 rte_eth_dev_shared_data_prepare();
534 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
536 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
537 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
541 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
544 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
549 rte_eth_dev_socket_id(uint16_t port_id)
551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
552 return rte_eth_devices[port_id].data->numa_node;
556 rte_eth_dev_get_sec_ctx(uint16_t port_id)
558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
559 return rte_eth_devices[port_id].security_ctx;
563 rte_eth_dev_count(void)
565 return rte_eth_dev_count_avail();
569 rte_eth_dev_count_avail(void)
576 RTE_ETH_FOREACH_DEV(p)
582 uint16_t __rte_experimental
583 rte_eth_dev_count_total(void)
585 uint16_t port, count = 0;
587 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
588 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
595 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
602 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
606 /* shouldn't check 'rte_eth_devices[i].data',
607 * because it might be overwritten by VDEV PMD */
608 tmp = rte_eth_dev_shared_data->data[port_id].name;
614 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
619 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
623 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
624 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
625 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
635 eth_err(uint16_t port_id, int ret)
639 if (rte_eth_dev_is_removed(port_id))
644 /* attach the new device, then store port_id of the device */
646 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
648 int current = rte_eth_dev_count_total();
649 struct rte_devargs da;
652 memset(&da, 0, sizeof(da));
654 if ((devargs == NULL) || (port_id == NULL)) {
660 if (rte_devargs_parse(&da, "%s", devargs))
663 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
667 /* no point looking at the port count if no port exists */
668 if (!rte_eth_dev_count_total()) {
669 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
674 /* if nothing happened, there is a bug here, since some driver told us
675 * it did attach a device, but did not create a port.
676 * FIXME: race condition in case of plug-out of another device
678 if (current == rte_eth_dev_count_total()) {
683 *port_id = eth_dev_last_created_port;
691 /* detach the device, then store the name of the device */
693 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
695 struct rte_device *dev;
700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
702 dev_flags = rte_eth_devices[port_id].data->dev_flags;
703 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
705 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
709 dev = rte_eth_devices[port_id].device;
713 bus = rte_bus_find_by_device(dev);
717 ret = rte_eal_hotplug_remove(bus->name, dev->name);
721 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
726 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
728 uint16_t old_nb_queues = dev->data->nb_rx_queues;
732 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
733 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
734 sizeof(dev->data->rx_queues[0]) * nb_queues,
735 RTE_CACHE_LINE_SIZE);
736 if (dev->data->rx_queues == NULL) {
737 dev->data->nb_rx_queues = 0;
740 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
743 rxq = dev->data->rx_queues;
745 for (i = nb_queues; i < old_nb_queues; i++)
746 (*dev->dev_ops->rx_queue_release)(rxq[i]);
747 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
748 RTE_CACHE_LINE_SIZE);
751 if (nb_queues > old_nb_queues) {
752 uint16_t new_qs = nb_queues - old_nb_queues;
754 memset(rxq + old_nb_queues, 0,
755 sizeof(rxq[0]) * new_qs);
758 dev->data->rx_queues = rxq;
760 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
763 rxq = dev->data->rx_queues;
765 for (i = nb_queues; i < old_nb_queues; i++)
766 (*dev->dev_ops->rx_queue_release)(rxq[i]);
768 rte_free(dev->data->rx_queues);
769 dev->data->rx_queues = NULL;
771 dev->data->nb_rx_queues = nb_queues;
776 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
778 struct rte_eth_dev *dev;
780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
782 dev = &rte_eth_devices[port_id];
783 if (!dev->data->dev_started) {
785 "Port %u must be started before start any queue\n",
790 if (rx_queue_id >= dev->data->nb_rx_queues) {
791 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
797 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
799 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
800 rx_queue_id, port_id);
804 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
810 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
812 struct rte_eth_dev *dev;
814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
816 dev = &rte_eth_devices[port_id];
817 if (rx_queue_id >= dev->data->nb_rx_queues) {
818 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
824 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
826 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
827 rx_queue_id, port_id);
831 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
836 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
838 struct rte_eth_dev *dev;
840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
842 dev = &rte_eth_devices[port_id];
843 if (!dev->data->dev_started) {
845 "Port %u must be started before start any queue\n",
850 if (tx_queue_id >= dev->data->nb_tx_queues) {
851 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
857 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
859 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
860 tx_queue_id, port_id);
864 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
868 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
870 struct rte_eth_dev *dev;
872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
874 dev = &rte_eth_devices[port_id];
875 if (tx_queue_id >= dev->data->nb_tx_queues) {
876 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
882 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
884 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
885 tx_queue_id, port_id);
889 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
894 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
896 uint16_t old_nb_queues = dev->data->nb_tx_queues;
900 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
901 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
902 sizeof(dev->data->tx_queues[0]) * nb_queues,
903 RTE_CACHE_LINE_SIZE);
904 if (dev->data->tx_queues == NULL) {
905 dev->data->nb_tx_queues = 0;
908 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
911 txq = dev->data->tx_queues;
913 for (i = nb_queues; i < old_nb_queues; i++)
914 (*dev->dev_ops->tx_queue_release)(txq[i]);
915 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
916 RTE_CACHE_LINE_SIZE);
919 if (nb_queues > old_nb_queues) {
920 uint16_t new_qs = nb_queues - old_nb_queues;
922 memset(txq + old_nb_queues, 0,
923 sizeof(txq[0]) * new_qs);
926 dev->data->tx_queues = txq;
928 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
931 txq = dev->data->tx_queues;
933 for (i = nb_queues; i < old_nb_queues; i++)
934 (*dev->dev_ops->tx_queue_release)(txq[i]);
936 rte_free(dev->data->tx_queues);
937 dev->data->tx_queues = NULL;
939 dev->data->nb_tx_queues = nb_queues;
944 rte_eth_speed_bitflag(uint32_t speed, int duplex)
947 case ETH_SPEED_NUM_10M:
948 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
949 case ETH_SPEED_NUM_100M:
950 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
951 case ETH_SPEED_NUM_1G:
952 return ETH_LINK_SPEED_1G;
953 case ETH_SPEED_NUM_2_5G:
954 return ETH_LINK_SPEED_2_5G;
955 case ETH_SPEED_NUM_5G:
956 return ETH_LINK_SPEED_5G;
957 case ETH_SPEED_NUM_10G:
958 return ETH_LINK_SPEED_10G;
959 case ETH_SPEED_NUM_20G:
960 return ETH_LINK_SPEED_20G;
961 case ETH_SPEED_NUM_25G:
962 return ETH_LINK_SPEED_25G;
963 case ETH_SPEED_NUM_40G:
964 return ETH_LINK_SPEED_40G;
965 case ETH_SPEED_NUM_50G:
966 return ETH_LINK_SPEED_50G;
967 case ETH_SPEED_NUM_56G:
968 return ETH_LINK_SPEED_56G;
969 case ETH_SPEED_NUM_100G:
970 return ETH_LINK_SPEED_100G;
977 * A conversion function from rxmode bitfield API.
980 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
981 uint64_t *rx_offloads)
983 uint64_t offloads = 0;
985 if (rxmode->header_split == 1)
986 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
987 if (rxmode->hw_ip_checksum == 1)
988 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
989 if (rxmode->hw_vlan_filter == 1)
990 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
991 if (rxmode->hw_vlan_strip == 1)
992 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
993 if (rxmode->hw_vlan_extend == 1)
994 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
995 if (rxmode->jumbo_frame == 1)
996 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
997 if (rxmode->hw_strip_crc == 1)
998 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
999 if (rxmode->enable_scatter == 1)
1000 offloads |= DEV_RX_OFFLOAD_SCATTER;
1001 if (rxmode->enable_lro == 1)
1002 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
1003 if (rxmode->hw_timestamp == 1)
1004 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
1005 if (rxmode->security == 1)
1006 offloads |= DEV_RX_OFFLOAD_SECURITY;
1008 *rx_offloads = offloads;
1011 const char * __rte_experimental
1012 rte_eth_dev_rx_offload_name(uint64_t offload)
1014 const char *name = "UNKNOWN";
1017 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1018 if (offload == rte_rx_offload_names[i].offload) {
1019 name = rte_rx_offload_names[i].name;
1027 const char * __rte_experimental
1028 rte_eth_dev_tx_offload_name(uint64_t offload)
1030 const char *name = "UNKNOWN";
1033 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1034 if (offload == rte_tx_offload_names[i].offload) {
1035 name = rte_tx_offload_names[i].name;
1044 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1045 const struct rte_eth_conf *dev_conf)
1047 struct rte_eth_dev *dev;
1048 struct rte_eth_dev_info dev_info;
1049 struct rte_eth_conf local_conf = *dev_conf;
1052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1054 dev = &rte_eth_devices[port_id];
1056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1059 rte_eth_dev_info_get(port_id, &dev_info);
1061 /* If number of queues specified by application for both Rx and Tx is
1062 * zero, use driver preferred values. This cannot be done individually
1063 * as it is valid for either Tx or Rx (but not both) to be zero.
1064 * If driver does not provide any preferred valued, fall back on
1067 if (nb_rx_q == 0 && nb_tx_q == 0) {
1068 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1070 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1071 nb_tx_q = dev_info.default_txportconf.nb_queues;
1073 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1076 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1078 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1079 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1083 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1085 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1086 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1090 if (dev->data->dev_started) {
1092 "Port %u must be stopped to allow configuration\n",
1098 * Convert between the offloads API to enable PMDs to support
1101 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1102 rte_eth_convert_rx_offload_bitfield(
1103 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1105 /* Copy the dev_conf parameter into the dev structure */
1106 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1109 * Check that the numbers of RX and TX queues are not greater
1110 * than the maximum number of RX and TX queues supported by the
1111 * configured device.
1113 if (nb_rx_q > dev_info.max_rx_queues) {
1114 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1115 port_id, nb_rx_q, dev_info.max_rx_queues);
1119 if (nb_tx_q > dev_info.max_tx_queues) {
1120 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1121 port_id, nb_tx_q, dev_info.max_tx_queues);
1125 /* Check that the device supports requested interrupts */
1126 if ((dev_conf->intr_conf.lsc == 1) &&
1127 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1128 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1129 dev->device->driver->name);
1132 if ((dev_conf->intr_conf.rmv == 1) &&
1133 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1134 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1135 dev->device->driver->name);
1140 * If jumbo frames are enabled, check that the maximum RX packet
1141 * length is supported by the configured device.
1143 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1144 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1146 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1147 port_id, dev_conf->rxmode.max_rx_pkt_len,
1148 dev_info.max_rx_pktlen);
1150 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1152 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1153 port_id, dev_conf->rxmode.max_rx_pkt_len,
1154 (unsigned)ETHER_MIN_LEN);
1158 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1159 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1160 /* Use default value */
1161 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1165 /* Any requested offloading must be within its device capabilities */
1166 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1167 local_conf.rxmode.offloads) {
1169 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1170 "capabilities 0x%"PRIx64" in %s()\n",
1171 port_id, local_conf.rxmode.offloads,
1172 dev_info.rx_offload_capa,
1176 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1177 local_conf.txmode.offloads) {
1179 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1180 "capabilities 0x%"PRIx64" in %s()\n",
1181 port_id, local_conf.txmode.offloads,
1182 dev_info.tx_offload_capa,
1187 /* Check that device supports requested rss hash functions. */
1188 if ((dev_info.flow_type_rss_offloads |
1189 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1190 dev_info.flow_type_rss_offloads) {
1192 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1193 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1194 dev_info.flow_type_rss_offloads);
1199 * Setup new number of RX/TX queues and reconfigure device.
1201 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1204 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1209 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1212 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1214 rte_eth_dev_rx_queue_config(dev, 0);
1218 diag = (*dev->dev_ops->dev_configure)(dev);
1220 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1222 rte_eth_dev_rx_queue_config(dev, 0);
1223 rte_eth_dev_tx_queue_config(dev, 0);
1224 return eth_err(port_id, diag);
1227 /* Initialize Rx profiling if enabled at compilation time. */
1228 diag = __rte_eth_profile_rx_init(port_id, dev);
1230 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_profile_rx_init = %d\n",
1232 rte_eth_dev_rx_queue_config(dev, 0);
1233 rte_eth_dev_tx_queue_config(dev, 0);
1234 return eth_err(port_id, diag);
1241 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1243 if (dev->data->dev_started) {
1244 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1245 dev->data->port_id);
1249 rte_eth_dev_rx_queue_config(dev, 0);
1250 rte_eth_dev_tx_queue_config(dev, 0);
1252 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1256 rte_eth_dev_config_restore(uint16_t port_id)
1258 struct rte_eth_dev *dev;
1259 struct rte_eth_dev_info dev_info;
1260 struct ether_addr *addr;
1265 dev = &rte_eth_devices[port_id];
1267 rte_eth_dev_info_get(port_id, &dev_info);
1269 /* replay MAC address configuration including default MAC */
1270 addr = &dev->data->mac_addrs[0];
1271 if (*dev->dev_ops->mac_addr_set != NULL)
1272 (*dev->dev_ops->mac_addr_set)(dev, addr);
1273 else if (*dev->dev_ops->mac_addr_add != NULL)
1274 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1276 if (*dev->dev_ops->mac_addr_add != NULL) {
1277 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1278 addr = &dev->data->mac_addrs[i];
1280 /* skip zero address */
1281 if (is_zero_ether_addr(addr))
1285 pool_mask = dev->data->mac_pool_sel[i];
1288 if (pool_mask & 1ULL)
1289 (*dev->dev_ops->mac_addr_add)(dev,
1293 } while (pool_mask);
1297 /* replay promiscuous configuration */
1298 if (rte_eth_promiscuous_get(port_id) == 1)
1299 rte_eth_promiscuous_enable(port_id);
1300 else if (rte_eth_promiscuous_get(port_id) == 0)
1301 rte_eth_promiscuous_disable(port_id);
1303 /* replay all multicast configuration */
1304 if (rte_eth_allmulticast_get(port_id) == 1)
1305 rte_eth_allmulticast_enable(port_id);
1306 else if (rte_eth_allmulticast_get(port_id) == 0)
1307 rte_eth_allmulticast_disable(port_id);
1311 rte_eth_dev_start(uint16_t port_id)
1313 struct rte_eth_dev *dev;
1316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1318 dev = &rte_eth_devices[port_id];
1320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1322 if (dev->data->dev_started != 0) {
1324 "Device with port_id=%"PRIu16" already started\n",
1329 diag = (*dev->dev_ops->dev_start)(dev);
1331 dev->data->dev_started = 1;
1333 return eth_err(port_id, diag);
1335 rte_eth_dev_config_restore(port_id);
1337 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1339 (*dev->dev_ops->link_update)(dev, 0);
1345 rte_eth_dev_stop(uint16_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1350 dev = &rte_eth_devices[port_id];
1352 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1354 if (dev->data->dev_started == 0) {
1356 "Device with port_id=%"PRIu16" already stopped\n",
1361 dev->data->dev_started = 0;
1362 (*dev->dev_ops->dev_stop)(dev);
1366 rte_eth_dev_set_link_up(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1375 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1379 rte_eth_dev_set_link_down(uint16_t port_id)
1381 struct rte_eth_dev *dev;
1383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1385 dev = &rte_eth_devices[port_id];
1387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1388 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1392 rte_eth_dev_close(uint16_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1400 dev->data->dev_started = 0;
1401 (*dev->dev_ops->dev_close)(dev);
1403 dev->data->nb_rx_queues = 0;
1404 rte_free(dev->data->rx_queues);
1405 dev->data->rx_queues = NULL;
1406 dev->data->nb_tx_queues = 0;
1407 rte_free(dev->data->tx_queues);
1408 dev->data->tx_queues = NULL;
1412 rte_eth_dev_reset(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1418 dev = &rte_eth_devices[port_id];
1420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1422 rte_eth_dev_stop(port_id);
1423 ret = dev->dev_ops->dev_reset(dev);
1425 return eth_err(port_id, ret);
1428 int __rte_experimental
1429 rte_eth_dev_is_removed(uint16_t port_id)
1431 struct rte_eth_dev *dev;
1434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1436 dev = &rte_eth_devices[port_id];
1438 if (dev->state == RTE_ETH_DEV_REMOVED)
1441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1443 ret = dev->dev_ops->is_removed(dev);
1445 /* Device is physically removed. */
1446 dev->state = RTE_ETH_DEV_REMOVED;
1452 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1453 uint16_t nb_rx_desc, unsigned int socket_id,
1454 const struct rte_eth_rxconf *rx_conf,
1455 struct rte_mempool *mp)
1458 uint32_t mbp_buf_size;
1459 struct rte_eth_dev *dev;
1460 struct rte_eth_dev_info dev_info;
1461 struct rte_eth_rxconf local_conf;
1464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1466 dev = &rte_eth_devices[port_id];
1467 if (rx_queue_id >= dev->data->nb_rx_queues) {
1468 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1476 * Check the size of the mbuf data buffer.
1477 * This value must be provided in the private data of the memory pool.
1478 * First check that the memory pool has a valid private data.
1480 rte_eth_dev_info_get(port_id, &dev_info);
1481 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1482 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1483 mp->name, (int)mp->private_data_size,
1484 (int)sizeof(struct rte_pktmbuf_pool_private));
1487 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1489 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1491 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1492 mp->name, (int)mbp_buf_size,
1493 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1494 (int)RTE_PKTMBUF_HEADROOM,
1495 (int)dev_info.min_rx_bufsize);
1499 /* Use default specified by driver, if nb_rx_desc is zero */
1500 if (nb_rx_desc == 0) {
1501 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1502 /* If driver default is also zero, fall back on EAL default */
1503 if (nb_rx_desc == 0)
1504 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1507 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1508 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1509 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1512 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1513 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1514 dev_info.rx_desc_lim.nb_min,
1515 dev_info.rx_desc_lim.nb_align);
1519 if (dev->data->dev_started &&
1520 !(dev_info.dev_capa &
1521 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1524 if (dev->data->dev_started &&
1525 (dev->data->rx_queue_state[rx_queue_id] !=
1526 RTE_ETH_QUEUE_STATE_STOPPED))
1529 rxq = dev->data->rx_queues;
1530 if (rxq[rx_queue_id]) {
1531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1533 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1534 rxq[rx_queue_id] = NULL;
1537 if (rx_conf == NULL)
1538 rx_conf = &dev_info.default_rxconf;
1540 local_conf = *rx_conf;
1541 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1543 * Reflect port offloads to queue offloads in order for
1544 * offloads to not be discarded.
1546 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1547 &local_conf.offloads);
1551 * If an offloading has already been enabled in
1552 * rte_eth_dev_configure(), it has been enabled on all queues,
1553 * so there is no need to enable it in this queue again.
1554 * The local_conf.offloads input to underlying PMD only carries
1555 * those offloadings which are only enabled on this queue and
1556 * not enabled on all queues.
1558 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1561 * New added offloadings for this queue are those not enabled in
1562 * rte_eth_dev_configure() and they must be per-queue type.
1563 * A pure per-port offloading can't be enabled on a queue while
1564 * disabled on another queue. A pure per-port offloading can't
1565 * be enabled for any queue as new added one if it hasn't been
1566 * enabled in rte_eth_dev_configure().
1568 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1569 local_conf.offloads) {
1571 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1572 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1573 port_id, rx_queue_id, local_conf.offloads,
1574 dev_info.rx_queue_offload_capa,
1579 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1580 socket_id, &local_conf, mp);
1582 if (!dev->data->min_rx_buf_size ||
1583 dev->data->min_rx_buf_size > mbp_buf_size)
1584 dev->data->min_rx_buf_size = mbp_buf_size;
1587 return eth_err(port_id, ret);
1591 * Convert from tx offloads to txq_flags.
1594 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1598 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1599 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1600 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1601 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1602 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1603 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1604 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1605 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1606 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1607 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1608 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1609 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1615 * A conversion function from txq_flags API.
1618 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1620 uint64_t offloads = 0;
1622 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1623 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1624 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1625 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1626 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1627 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1628 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1629 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1630 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1631 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1632 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1633 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1634 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1636 *tx_offloads = offloads;
1640 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1641 uint16_t nb_tx_desc, unsigned int socket_id,
1642 const struct rte_eth_txconf *tx_conf)
1644 struct rte_eth_dev *dev;
1645 struct rte_eth_dev_info dev_info;
1646 struct rte_eth_txconf local_conf;
1649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1651 dev = &rte_eth_devices[port_id];
1652 if (tx_queue_id >= dev->data->nb_tx_queues) {
1653 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1660 rte_eth_dev_info_get(port_id, &dev_info);
1662 /* Use default specified by driver, if nb_tx_desc is zero */
1663 if (nb_tx_desc == 0) {
1664 nb_tx_desc = dev_info.default_txportconf.ring_size;
1665 /* If driver default is zero, fall back on EAL default */
1666 if (nb_tx_desc == 0)
1667 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1669 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1670 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1671 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1673 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1674 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1675 dev_info.tx_desc_lim.nb_min,
1676 dev_info.tx_desc_lim.nb_align);
1680 if (dev->data->dev_started &&
1681 !(dev_info.dev_capa &
1682 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1685 if (dev->data->dev_started &&
1686 (dev->data->tx_queue_state[tx_queue_id] !=
1687 RTE_ETH_QUEUE_STATE_STOPPED))
1690 txq = dev->data->tx_queues;
1691 if (txq[tx_queue_id]) {
1692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1694 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1695 txq[tx_queue_id] = NULL;
1698 if (tx_conf == NULL)
1699 tx_conf = &dev_info.default_txconf;
1702 * Convert between the offloads API to enable PMDs to support
1705 local_conf = *tx_conf;
1706 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1707 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1708 &local_conf.offloads);
1712 * If an offloading has already been enabled in
1713 * rte_eth_dev_configure(), it has been enabled on all queues,
1714 * so there is no need to enable it in this queue again.
1715 * The local_conf.offloads input to underlying PMD only carries
1716 * those offloadings which are only enabled on this queue and
1717 * not enabled on all queues.
1719 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1722 * New added offloadings for this queue are those not enabled in
1723 * rte_eth_dev_configure() and they must be per-queue type.
1724 * A pure per-port offloading can't be enabled on a queue while
1725 * disabled on another queue. A pure per-port offloading can't
1726 * be enabled for any queue as new added one if it hasn't been
1727 * enabled in rte_eth_dev_configure().
1729 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1730 local_conf.offloads) {
1732 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1733 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1734 port_id, tx_queue_id, local_conf.offloads,
1735 dev_info.tx_queue_offload_capa,
1740 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1741 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1745 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1746 void *userdata __rte_unused)
1750 for (i = 0; i < unsent; i++)
1751 rte_pktmbuf_free(pkts[i]);
1755 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1758 uint64_t *count = userdata;
1761 for (i = 0; i < unsent; i++)
1762 rte_pktmbuf_free(pkts[i]);
1768 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1769 buffer_tx_error_fn cbfn, void *userdata)
1771 buffer->error_callback = cbfn;
1772 buffer->error_userdata = userdata;
1777 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1784 buffer->size = size;
1785 if (buffer->error_callback == NULL) {
1786 ret = rte_eth_tx_buffer_set_err_callback(
1787 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1794 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1796 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1799 /* Validate Input Data. Bail if not valid or not supported. */
1800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1803 /* Call driver to free pending mbufs. */
1804 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1806 return eth_err(port_id, ret);
1810 rte_eth_promiscuous_enable(uint16_t port_id)
1812 struct rte_eth_dev *dev;
1814 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1815 dev = &rte_eth_devices[port_id];
1817 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1818 (*dev->dev_ops->promiscuous_enable)(dev);
1819 dev->data->promiscuous = 1;
1823 rte_eth_promiscuous_disable(uint16_t port_id)
1825 struct rte_eth_dev *dev;
1827 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1828 dev = &rte_eth_devices[port_id];
1830 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1831 dev->data->promiscuous = 0;
1832 (*dev->dev_ops->promiscuous_disable)(dev);
1836 rte_eth_promiscuous_get(uint16_t port_id)
1838 struct rte_eth_dev *dev;
1840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1842 dev = &rte_eth_devices[port_id];
1843 return dev->data->promiscuous;
1847 rte_eth_allmulticast_enable(uint16_t port_id)
1849 struct rte_eth_dev *dev;
1851 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1852 dev = &rte_eth_devices[port_id];
1854 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1855 (*dev->dev_ops->allmulticast_enable)(dev);
1856 dev->data->all_multicast = 1;
1860 rte_eth_allmulticast_disable(uint16_t port_id)
1862 struct rte_eth_dev *dev;
1864 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1865 dev = &rte_eth_devices[port_id];
1867 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1868 dev->data->all_multicast = 0;
1869 (*dev->dev_ops->allmulticast_disable)(dev);
1873 rte_eth_allmulticast_get(uint16_t port_id)
1875 struct rte_eth_dev *dev;
1877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1879 dev = &rte_eth_devices[port_id];
1880 return dev->data->all_multicast;
1884 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1886 struct rte_eth_dev *dev;
1888 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1889 dev = &rte_eth_devices[port_id];
1891 if (dev->data->dev_conf.intr_conf.lsc &&
1892 dev->data->dev_started)
1893 rte_eth_linkstatus_get(dev, eth_link);
1895 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1896 (*dev->dev_ops->link_update)(dev, 1);
1897 *eth_link = dev->data->dev_link;
1902 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1904 struct rte_eth_dev *dev;
1906 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1907 dev = &rte_eth_devices[port_id];
1909 if (dev->data->dev_conf.intr_conf.lsc &&
1910 dev->data->dev_started)
1911 rte_eth_linkstatus_get(dev, eth_link);
1913 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1914 (*dev->dev_ops->link_update)(dev, 0);
1915 *eth_link = dev->data->dev_link;
1920 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1922 struct rte_eth_dev *dev;
1924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1926 dev = &rte_eth_devices[port_id];
1927 memset(stats, 0, sizeof(*stats));
1929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1930 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1931 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1935 rte_eth_stats_reset(uint16_t port_id)
1937 struct rte_eth_dev *dev;
1939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1940 dev = &rte_eth_devices[port_id];
1942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1943 (*dev->dev_ops->stats_reset)(dev);
1944 dev->data->rx_mbuf_alloc_failed = 0;
1950 get_xstats_basic_count(struct rte_eth_dev *dev)
1952 uint16_t nb_rxqs, nb_txqs;
1955 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1956 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1958 count = RTE_NB_STATS;
1959 count += nb_rxqs * RTE_NB_RXQ_STATS;
1960 count += nb_txqs * RTE_NB_TXQ_STATS;
1966 get_xstats_count(uint16_t port_id)
1968 struct rte_eth_dev *dev;
1971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1972 dev = &rte_eth_devices[port_id];
1973 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1974 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1977 return eth_err(port_id, count);
1979 if (dev->dev_ops->xstats_get_names != NULL) {
1980 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1982 return eth_err(port_id, count);
1987 count += get_xstats_basic_count(dev);
1993 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1996 int cnt_xstats, idx_xstat;
1998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2001 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2006 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2011 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2012 if (cnt_xstats < 0) {
2013 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2017 /* Get id-name lookup table */
2018 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2020 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2021 port_id, xstats_names, cnt_xstats, NULL)) {
2022 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2026 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2027 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2036 /* retrieve basic stats names */
2038 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2039 struct rte_eth_xstat_name *xstats_names)
2041 int cnt_used_entries = 0;
2042 uint32_t idx, id_queue;
2045 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2046 snprintf(xstats_names[cnt_used_entries].name,
2047 sizeof(xstats_names[0].name),
2048 "%s", rte_stats_strings[idx].name);
2051 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2052 for (id_queue = 0; id_queue < num_q; id_queue++) {
2053 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2054 snprintf(xstats_names[cnt_used_entries].name,
2055 sizeof(xstats_names[0].name),
2057 id_queue, rte_rxq_stats_strings[idx].name);
2062 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2063 for (id_queue = 0; id_queue < num_q; id_queue++) {
2064 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2065 snprintf(xstats_names[cnt_used_entries].name,
2066 sizeof(xstats_names[0].name),
2068 id_queue, rte_txq_stats_strings[idx].name);
2072 return cnt_used_entries;
2075 /* retrieve ethdev extended statistics names */
2077 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2078 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2081 struct rte_eth_xstat_name *xstats_names_copy;
2082 unsigned int no_basic_stat_requested = 1;
2083 unsigned int no_ext_stat_requested = 1;
2084 unsigned int expected_entries;
2085 unsigned int basic_count;
2086 struct rte_eth_dev *dev;
2090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2091 dev = &rte_eth_devices[port_id];
2093 basic_count = get_xstats_basic_count(dev);
2094 ret = get_xstats_count(port_id);
2097 expected_entries = (unsigned int)ret;
2099 /* Return max number of stats if no ids given */
2102 return expected_entries;
2103 else if (xstats_names && size < expected_entries)
2104 return expected_entries;
2107 if (ids && !xstats_names)
2110 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2111 uint64_t ids_copy[size];
2113 for (i = 0; i < size; i++) {
2114 if (ids[i] < basic_count) {
2115 no_basic_stat_requested = 0;
2120 * Convert ids to xstats ids that PMD knows.
2121 * ids known by user are basic + extended stats.
2123 ids_copy[i] = ids[i] - basic_count;
2126 if (no_basic_stat_requested)
2127 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2128 xstats_names, ids_copy, size);
2131 /* Retrieve all stats */
2133 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2135 if (num_stats < 0 || num_stats > (int)expected_entries)
2138 return expected_entries;
2141 xstats_names_copy = calloc(expected_entries,
2142 sizeof(struct rte_eth_xstat_name));
2144 if (!xstats_names_copy) {
2145 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2150 for (i = 0; i < size; i++) {
2151 if (ids[i] >= basic_count) {
2152 no_ext_stat_requested = 0;
2158 /* Fill xstats_names_copy structure */
2159 if (ids && no_ext_stat_requested) {
2160 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2162 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2165 free(xstats_names_copy);
2171 for (i = 0; i < size; i++) {
2172 if (ids[i] >= expected_entries) {
2173 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2174 free(xstats_names_copy);
2177 xstats_names[i] = xstats_names_copy[ids[i]];
2180 free(xstats_names_copy);
2185 rte_eth_xstats_get_names(uint16_t port_id,
2186 struct rte_eth_xstat_name *xstats_names,
2189 struct rte_eth_dev *dev;
2190 int cnt_used_entries;
2191 int cnt_expected_entries;
2192 int cnt_driver_entries;
2194 cnt_expected_entries = get_xstats_count(port_id);
2195 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2196 (int)size < cnt_expected_entries)
2197 return cnt_expected_entries;
2199 /* port_id checked in get_xstats_count() */
2200 dev = &rte_eth_devices[port_id];
2202 cnt_used_entries = rte_eth_basic_stats_get_names(
2205 if (dev->dev_ops->xstats_get_names != NULL) {
2206 /* If there are any driver-specific xstats, append them
2209 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2211 xstats_names + cnt_used_entries,
2212 size - cnt_used_entries);
2213 if (cnt_driver_entries < 0)
2214 return eth_err(port_id, cnt_driver_entries);
2215 cnt_used_entries += cnt_driver_entries;
2218 return cnt_used_entries;
2223 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2225 struct rte_eth_dev *dev;
2226 struct rte_eth_stats eth_stats;
2227 unsigned int count = 0, i, q;
2228 uint64_t val, *stats_ptr;
2229 uint16_t nb_rxqs, nb_txqs;
2232 ret = rte_eth_stats_get(port_id, ð_stats);
2236 dev = &rte_eth_devices[port_id];
2238 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2239 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2242 for (i = 0; i < RTE_NB_STATS; i++) {
2243 stats_ptr = RTE_PTR_ADD(ð_stats,
2244 rte_stats_strings[i].offset);
2246 xstats[count++].value = val;
2250 for (q = 0; q < nb_rxqs; q++) {
2251 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2252 stats_ptr = RTE_PTR_ADD(ð_stats,
2253 rte_rxq_stats_strings[i].offset +
2254 q * sizeof(uint64_t));
2256 xstats[count++].value = val;
2261 for (q = 0; q < nb_txqs; q++) {
2262 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2263 stats_ptr = RTE_PTR_ADD(ð_stats,
2264 rte_txq_stats_strings[i].offset +
2265 q * sizeof(uint64_t));
2267 xstats[count++].value = val;
2273 /* retrieve ethdev extended statistics */
2275 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2276 uint64_t *values, unsigned int size)
2278 unsigned int no_basic_stat_requested = 1;
2279 unsigned int no_ext_stat_requested = 1;
2280 unsigned int num_xstats_filled;
2281 unsigned int basic_count;
2282 uint16_t expected_entries;
2283 struct rte_eth_dev *dev;
2287 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2288 ret = get_xstats_count(port_id);
2291 expected_entries = (uint16_t)ret;
2292 struct rte_eth_xstat xstats[expected_entries];
2293 dev = &rte_eth_devices[port_id];
2294 basic_count = get_xstats_basic_count(dev);
2296 /* Return max number of stats if no ids given */
2299 return expected_entries;
2300 else if (values && size < expected_entries)
2301 return expected_entries;
2307 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2308 unsigned int basic_count = get_xstats_basic_count(dev);
2309 uint64_t ids_copy[size];
2311 for (i = 0; i < size; i++) {
2312 if (ids[i] < basic_count) {
2313 no_basic_stat_requested = 0;
2318 * Convert ids to xstats ids that PMD knows.
2319 * ids known by user are basic + extended stats.
2321 ids_copy[i] = ids[i] - basic_count;
2324 if (no_basic_stat_requested)
2325 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2330 for (i = 0; i < size; i++) {
2331 if (ids[i] >= basic_count) {
2332 no_ext_stat_requested = 0;
2338 /* Fill the xstats structure */
2339 if (ids && no_ext_stat_requested)
2340 ret = rte_eth_basic_stats_get(port_id, xstats);
2342 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2346 num_xstats_filled = (unsigned int)ret;
2348 /* Return all stats */
2350 for (i = 0; i < num_xstats_filled; i++)
2351 values[i] = xstats[i].value;
2352 return expected_entries;
2356 for (i = 0; i < size; i++) {
2357 if (ids[i] >= expected_entries) {
2358 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2361 values[i] = xstats[ids[i]].value;
2367 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2370 struct rte_eth_dev *dev;
2371 unsigned int count = 0, i;
2372 signed int xcount = 0;
2373 uint16_t nb_rxqs, nb_txqs;
2376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2378 dev = &rte_eth_devices[port_id];
2380 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2381 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2383 /* Return generic statistics */
2384 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2385 (nb_txqs * RTE_NB_TXQ_STATS);
2387 /* implemented by the driver */
2388 if (dev->dev_ops->xstats_get != NULL) {
2389 /* Retrieve the xstats from the driver at the end of the
2392 xcount = (*dev->dev_ops->xstats_get)(dev,
2393 xstats ? xstats + count : NULL,
2394 (n > count) ? n - count : 0);
2397 return eth_err(port_id, xcount);
2400 if (n < count + xcount || xstats == NULL)
2401 return count + xcount;
2403 /* now fill the xstats structure */
2404 ret = rte_eth_basic_stats_get(port_id, xstats);
2409 for (i = 0; i < count; i++)
2411 /* add an offset to driver-specific stats */
2412 for ( ; i < count + xcount; i++)
2413 xstats[i].id += count;
2415 return count + xcount;
2418 /* reset ethdev extended statistics */
2420 rte_eth_xstats_reset(uint16_t port_id)
2422 struct rte_eth_dev *dev;
2424 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2425 dev = &rte_eth_devices[port_id];
2427 /* implemented by the driver */
2428 if (dev->dev_ops->xstats_reset != NULL) {
2429 (*dev->dev_ops->xstats_reset)(dev);
2433 /* fallback to default */
2434 rte_eth_stats_reset(port_id);
2438 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2441 struct rte_eth_dev *dev;
2443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2445 dev = &rte_eth_devices[port_id];
2447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2448 return (*dev->dev_ops->queue_stats_mapping_set)
2449 (dev, queue_id, stat_idx, is_rx);
2454 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2457 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2458 stat_idx, STAT_QMAP_TX));
2463 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2466 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2467 stat_idx, STAT_QMAP_RX));
2471 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2473 struct rte_eth_dev *dev;
2475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2476 dev = &rte_eth_devices[port_id];
2478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2479 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2480 fw_version, fw_size));
2484 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2486 struct rte_eth_dev *dev;
2487 struct rte_eth_txconf *txconf;
2488 const struct rte_eth_desc_lim lim = {
2489 .nb_max = UINT16_MAX,
2494 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2495 dev = &rte_eth_devices[port_id];
2497 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2498 dev_info->rx_desc_lim = lim;
2499 dev_info->tx_desc_lim = lim;
2500 dev_info->device = dev->device;
2502 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2503 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2504 dev_info->driver_name = dev->device->driver->name;
2505 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2506 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2508 dev_info->dev_flags = &dev->data->dev_flags;
2509 txconf = &dev_info->default_txconf;
2510 /* convert offload to txq_flags to support legacy app */
2511 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2515 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2516 uint32_t *ptypes, int num)
2519 struct rte_eth_dev *dev;
2520 const uint32_t *all_ptypes;
2522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2523 dev = &rte_eth_devices[port_id];
2524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2525 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2530 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2531 if (all_ptypes[i] & ptype_mask) {
2533 ptypes[j] = all_ptypes[i];
2541 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2543 struct rte_eth_dev *dev;
2545 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2546 dev = &rte_eth_devices[port_id];
2547 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2552 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2554 struct rte_eth_dev *dev;
2556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 dev = &rte_eth_devices[port_id];
2559 *mtu = dev->data->mtu;
2564 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2567 struct rte_eth_dev *dev;
2569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2570 dev = &rte_eth_devices[port_id];
2571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2573 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2575 dev->data->mtu = mtu;
2577 return eth_err(port_id, ret);
2581 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2583 struct rte_eth_dev *dev;
2586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2587 dev = &rte_eth_devices[port_id];
2588 if (!(dev->data->dev_conf.rxmode.offloads &
2589 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2590 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2595 if (vlan_id > 4095) {
2596 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2602 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2604 struct rte_vlan_filter_conf *vfc;
2608 vfc = &dev->data->vlan_filter_conf;
2609 vidx = vlan_id / 64;
2610 vbit = vlan_id % 64;
2613 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2615 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2618 return eth_err(port_id, ret);
2622 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2625 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2629 if (rx_queue_id >= dev->data->nb_rx_queues) {
2630 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2635 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2641 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2642 enum rte_vlan_type vlan_type,
2645 struct rte_eth_dev *dev;
2647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2648 dev = &rte_eth_devices[port_id];
2649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2651 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2656 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2658 struct rte_eth_dev *dev;
2662 uint64_t orig_offloads;
2664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2665 dev = &rte_eth_devices[port_id];
2667 /* save original values in case of failure */
2668 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2670 /*check which option changed by application*/
2671 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2672 org = !!(dev->data->dev_conf.rxmode.offloads &
2673 DEV_RX_OFFLOAD_VLAN_STRIP);
2676 dev->data->dev_conf.rxmode.offloads |=
2677 DEV_RX_OFFLOAD_VLAN_STRIP;
2679 dev->data->dev_conf.rxmode.offloads &=
2680 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2681 mask |= ETH_VLAN_STRIP_MASK;
2684 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2685 org = !!(dev->data->dev_conf.rxmode.offloads &
2686 DEV_RX_OFFLOAD_VLAN_FILTER);
2689 dev->data->dev_conf.rxmode.offloads |=
2690 DEV_RX_OFFLOAD_VLAN_FILTER;
2692 dev->data->dev_conf.rxmode.offloads &=
2693 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2694 mask |= ETH_VLAN_FILTER_MASK;
2697 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2698 org = !!(dev->data->dev_conf.rxmode.offloads &
2699 DEV_RX_OFFLOAD_VLAN_EXTEND);
2702 dev->data->dev_conf.rxmode.offloads |=
2703 DEV_RX_OFFLOAD_VLAN_EXTEND;
2705 dev->data->dev_conf.rxmode.offloads &=
2706 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2707 mask |= ETH_VLAN_EXTEND_MASK;
2714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2715 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2717 /* hit an error restore original values */
2718 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2721 return eth_err(port_id, ret);
2725 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2727 struct rte_eth_dev *dev;
2730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2731 dev = &rte_eth_devices[port_id];
2733 if (dev->data->dev_conf.rxmode.offloads &
2734 DEV_RX_OFFLOAD_VLAN_STRIP)
2735 ret |= ETH_VLAN_STRIP_OFFLOAD;
2737 if (dev->data->dev_conf.rxmode.offloads &
2738 DEV_RX_OFFLOAD_VLAN_FILTER)
2739 ret |= ETH_VLAN_FILTER_OFFLOAD;
2741 if (dev->data->dev_conf.rxmode.offloads &
2742 DEV_RX_OFFLOAD_VLAN_EXTEND)
2743 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2749 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2751 struct rte_eth_dev *dev;
2753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2754 dev = &rte_eth_devices[port_id];
2755 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2757 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2761 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2763 struct rte_eth_dev *dev;
2765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2766 dev = &rte_eth_devices[port_id];
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2768 memset(fc_conf, 0, sizeof(*fc_conf));
2769 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2773 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2775 struct rte_eth_dev *dev;
2777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2778 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2779 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2783 dev = &rte_eth_devices[port_id];
2784 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2785 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2789 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2790 struct rte_eth_pfc_conf *pfc_conf)
2792 struct rte_eth_dev *dev;
2794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2795 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2796 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2800 dev = &rte_eth_devices[port_id];
2801 /* High water, low water validation are device specific */
2802 if (*dev->dev_ops->priority_flow_ctrl_set)
2803 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2809 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2817 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2818 for (i = 0; i < num; i++) {
2819 if (reta_conf[i].mask)
2827 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2831 uint16_t i, idx, shift;
2837 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2841 for (i = 0; i < reta_size; i++) {
2842 idx = i / RTE_RETA_GROUP_SIZE;
2843 shift = i % RTE_RETA_GROUP_SIZE;
2844 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2845 (reta_conf[idx].reta[shift] >= max_rxq)) {
2847 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2849 reta_conf[idx].reta[shift], max_rxq);
2858 rte_eth_dev_rss_reta_update(uint16_t port_id,
2859 struct rte_eth_rss_reta_entry64 *reta_conf,
2862 struct rte_eth_dev *dev;
2865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2866 /* Check mask bits */
2867 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2871 dev = &rte_eth_devices[port_id];
2873 /* Check entry value */
2874 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2875 dev->data->nb_rx_queues);
2879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2880 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2885 rte_eth_dev_rss_reta_query(uint16_t port_id,
2886 struct rte_eth_rss_reta_entry64 *reta_conf,
2889 struct rte_eth_dev *dev;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2894 /* Check mask bits */
2895 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2899 dev = &rte_eth_devices[port_id];
2900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2901 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2906 rte_eth_dev_rss_hash_update(uint16_t port_id,
2907 struct rte_eth_rss_conf *rss_conf)
2909 struct rte_eth_dev *dev;
2910 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2913 dev = &rte_eth_devices[port_id];
2914 rte_eth_dev_info_get(port_id, &dev_info);
2915 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2916 dev_info.flow_type_rss_offloads) {
2918 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2919 port_id, rss_conf->rss_hf,
2920 dev_info.flow_type_rss_offloads);
2923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2924 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2929 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2930 struct rte_eth_rss_conf *rss_conf)
2932 struct rte_eth_dev *dev;
2934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2935 dev = &rte_eth_devices[port_id];
2936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2937 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2942 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2943 struct rte_eth_udp_tunnel *udp_tunnel)
2945 struct rte_eth_dev *dev;
2947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2948 if (udp_tunnel == NULL) {
2949 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2953 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2954 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2958 dev = &rte_eth_devices[port_id];
2959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2960 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2965 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2966 struct rte_eth_udp_tunnel *udp_tunnel)
2968 struct rte_eth_dev *dev;
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2971 dev = &rte_eth_devices[port_id];
2973 if (udp_tunnel == NULL) {
2974 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2978 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2979 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2984 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2989 rte_eth_led_on(uint16_t port_id)
2991 struct rte_eth_dev *dev;
2993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2994 dev = &rte_eth_devices[port_id];
2995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2996 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3000 rte_eth_led_off(uint16_t port_id)
3002 struct rte_eth_dev *dev;
3004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3005 dev = &rte_eth_devices[port_id];
3006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3007 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3011 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3015 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3017 struct rte_eth_dev_info dev_info;
3018 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3022 rte_eth_dev_info_get(port_id, &dev_info);
3024 for (i = 0; i < dev_info.max_mac_addrs; i++)
3025 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3031 static const struct ether_addr null_mac_addr;
3034 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3037 struct rte_eth_dev *dev;
3042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3043 dev = &rte_eth_devices[port_id];
3044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3046 if (is_zero_ether_addr(addr)) {
3047 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3051 if (pool >= ETH_64_POOLS) {
3052 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3056 index = get_mac_addr_index(port_id, addr);
3058 index = get_mac_addr_index(port_id, &null_mac_addr);
3060 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3065 pool_mask = dev->data->mac_pool_sel[index];
3067 /* Check if both MAC address and pool is already there, and do nothing */
3068 if (pool_mask & (1ULL << pool))
3073 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3076 /* Update address in NIC data structure */
3077 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3079 /* Update pool bitmap in NIC data structure */
3080 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3083 return eth_err(port_id, ret);
3087 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3089 struct rte_eth_dev *dev;
3092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3093 dev = &rte_eth_devices[port_id];
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3096 index = get_mac_addr_index(port_id, addr);
3099 "Port %u: Cannot remove default MAC address\n",
3102 } else if (index < 0)
3103 return 0; /* Do nothing if address wasn't found */
3106 (*dev->dev_ops->mac_addr_remove)(dev, index);
3108 /* Update address in NIC data structure */
3109 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3111 /* reset pool bitmap */
3112 dev->data->mac_pool_sel[index] = 0;
3118 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3120 struct rte_eth_dev *dev;
3123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3125 if (!is_valid_assigned_ether_addr(addr))
3128 dev = &rte_eth_devices[port_id];
3129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3131 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3135 /* Update default address in NIC data structure */
3136 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3143 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3147 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3149 struct rte_eth_dev_info dev_info;
3150 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3153 rte_eth_dev_info_get(port_id, &dev_info);
3154 if (!dev->data->hash_mac_addrs)
3157 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3158 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3159 ETHER_ADDR_LEN) == 0)
3166 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3171 struct rte_eth_dev *dev;
3173 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3175 dev = &rte_eth_devices[port_id];
3176 if (is_zero_ether_addr(addr)) {
3177 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3182 index = get_hash_mac_addr_index(port_id, addr);
3183 /* Check if it's already there, and do nothing */
3184 if ((index >= 0) && on)
3190 "Port %u: the MAC address was not set in UTA\n",
3195 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3197 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3204 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3206 /* Update address in NIC data structure */
3208 ether_addr_copy(addr,
3209 &dev->data->hash_mac_addrs[index]);
3211 ether_addr_copy(&null_mac_addr,
3212 &dev->data->hash_mac_addrs[index]);
3215 return eth_err(port_id, ret);
3219 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3221 struct rte_eth_dev *dev;
3223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3225 dev = &rte_eth_devices[port_id];
3227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3228 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3232 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3235 struct rte_eth_dev *dev;
3236 struct rte_eth_dev_info dev_info;
3237 struct rte_eth_link link;
3239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3241 dev = &rte_eth_devices[port_id];
3242 rte_eth_dev_info_get(port_id, &dev_info);
3243 link = dev->data->dev_link;
3245 if (queue_idx > dev_info.max_tx_queues) {
3247 "Set queue rate limit:port %u: invalid queue id=%u\n",
3248 port_id, queue_idx);
3252 if (tx_rate > link.link_speed) {
3254 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3255 tx_rate, link.link_speed);
3259 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3260 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3261 queue_idx, tx_rate));
3265 rte_eth_mirror_rule_set(uint16_t port_id,
3266 struct rte_eth_mirror_conf *mirror_conf,
3267 uint8_t rule_id, uint8_t on)
3269 struct rte_eth_dev *dev;
3271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3272 if (mirror_conf->rule_type == 0) {
3273 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3277 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3278 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3283 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3284 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3285 (mirror_conf->pool_mask == 0)) {
3287 "Invalid mirror pool, pool mask can not be 0\n");
3291 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3292 mirror_conf->vlan.vlan_mask == 0) {
3294 "Invalid vlan mask, vlan mask can not be 0\n");
3298 dev = &rte_eth_devices[port_id];
3299 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3301 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3302 mirror_conf, rule_id, on));
3306 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3308 struct rte_eth_dev *dev;
3310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3312 dev = &rte_eth_devices[port_id];
3313 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3315 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3319 RTE_INIT(eth_dev_init_cb_lists)
3323 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3324 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3328 rte_eth_dev_callback_register(uint16_t port_id,
3329 enum rte_eth_event_type event,
3330 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3332 struct rte_eth_dev *dev;
3333 struct rte_eth_dev_callback *user_cb;
3334 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3340 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3341 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3345 if (port_id == RTE_ETH_ALL) {
3347 last_port = RTE_MAX_ETHPORTS - 1;
3349 next_port = last_port = port_id;
3352 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3355 dev = &rte_eth_devices[next_port];
3357 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3358 if (user_cb->cb_fn == cb_fn &&
3359 user_cb->cb_arg == cb_arg &&
3360 user_cb->event == event) {
3365 /* create a new callback. */
3366 if (user_cb == NULL) {
3367 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3368 sizeof(struct rte_eth_dev_callback), 0);
3369 if (user_cb != NULL) {
3370 user_cb->cb_fn = cb_fn;
3371 user_cb->cb_arg = cb_arg;
3372 user_cb->event = event;
3373 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3376 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3377 rte_eth_dev_callback_unregister(port_id, event,
3383 } while (++next_port <= last_port);
3385 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3390 rte_eth_dev_callback_unregister(uint16_t port_id,
3391 enum rte_eth_event_type event,
3392 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3395 struct rte_eth_dev *dev;
3396 struct rte_eth_dev_callback *cb, *next;
3397 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3403 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3404 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3408 if (port_id == RTE_ETH_ALL) {
3410 last_port = RTE_MAX_ETHPORTS - 1;
3412 next_port = last_port = port_id;
3415 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3418 dev = &rte_eth_devices[next_port];
3420 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3423 next = TAILQ_NEXT(cb, next);
3425 if (cb->cb_fn != cb_fn || cb->event != event ||
3426 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3430 * if this callback is not executing right now,
3433 if (cb->active == 0) {
3434 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3440 } while (++next_port <= last_port);
3442 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3447 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3448 enum rte_eth_event_type event, void *ret_param)
3450 struct rte_eth_dev_callback *cb_lst;
3451 struct rte_eth_dev_callback dev_cb;
3454 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3455 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3456 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3460 if (ret_param != NULL)
3461 dev_cb.ret_param = ret_param;
3463 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3464 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3465 dev_cb.cb_arg, dev_cb.ret_param);
3466 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3469 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3474 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3479 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3481 dev->state = RTE_ETH_DEV_ATTACHED;
3485 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3488 struct rte_eth_dev *dev;
3489 struct rte_intr_handle *intr_handle;
3493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3495 dev = &rte_eth_devices[port_id];
3497 if (!dev->intr_handle) {
3498 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3502 intr_handle = dev->intr_handle;
3503 if (!intr_handle->intr_vec) {
3504 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3508 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3509 vec = intr_handle->intr_vec[qid];
3510 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3511 if (rc && rc != -EEXIST) {
3513 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3514 port_id, qid, op, epfd, vec);
3521 const struct rte_memzone *
3522 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3523 uint16_t queue_id, size_t size, unsigned align,
3526 char z_name[RTE_MEMZONE_NAMESIZE];
3527 const struct rte_memzone *mz;
3529 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3530 dev->device->driver->name, ring_name,
3531 dev->data->port_id, queue_id);
3533 mz = rte_memzone_lookup(z_name);
3537 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3538 RTE_MEMZONE_IOVA_CONTIG, align);
3541 int __rte_experimental
3542 rte_eth_dev_create(struct rte_device *device, const char *name,
3543 size_t priv_data_size,
3544 ethdev_bus_specific_init ethdev_bus_specific_init,
3545 void *bus_init_params,
3546 ethdev_init_t ethdev_init, void *init_params)
3548 struct rte_eth_dev *ethdev;
3551 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3553 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3554 ethdev = rte_eth_dev_allocate(name);
3560 if (priv_data_size) {
3561 ethdev->data->dev_private = rte_zmalloc_socket(
3562 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3565 if (!ethdev->data->dev_private) {
3566 RTE_LOG(ERR, EAL, "failed to allocate private data");
3572 ethdev = rte_eth_dev_attach_secondary(name);
3574 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3575 "ethdev doesn't exist");
3581 ethdev->device = device;
3583 if (ethdev_bus_specific_init) {
3584 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3587 "ethdev bus specific initialisation failed");
3592 retval = ethdev_init(ethdev, init_params);
3594 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3598 rte_eth_dev_probing_finish(ethdev);
3602 /* free ports private data if primary process */
3603 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3604 rte_free(ethdev->data->dev_private);
3606 rte_eth_dev_release_port(ethdev);
3611 int __rte_experimental
3612 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3613 ethdev_uninit_t ethdev_uninit)
3617 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3621 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3622 if (ethdev_uninit) {
3623 ret = ethdev_uninit(ethdev);
3628 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3629 rte_free(ethdev->data->dev_private);
3631 ethdev->data->dev_private = NULL;
3633 return rte_eth_dev_release_port(ethdev);
3637 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3638 int epfd, int op, void *data)
3641 struct rte_eth_dev *dev;
3642 struct rte_intr_handle *intr_handle;
3645 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3647 dev = &rte_eth_devices[port_id];
3648 if (queue_id >= dev->data->nb_rx_queues) {
3649 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3653 if (!dev->intr_handle) {
3654 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3658 intr_handle = dev->intr_handle;
3659 if (!intr_handle->intr_vec) {
3660 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3664 vec = intr_handle->intr_vec[queue_id];
3665 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3666 if (rc && rc != -EEXIST) {
3668 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3669 port_id, queue_id, op, epfd, vec);
3677 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3680 struct rte_eth_dev *dev;
3682 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3684 dev = &rte_eth_devices[port_id];
3686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3687 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3692 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3695 struct rte_eth_dev *dev;
3697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3699 dev = &rte_eth_devices[port_id];
3701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3702 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3708 rte_eth_dev_filter_supported(uint16_t port_id,
3709 enum rte_filter_type filter_type)
3711 struct rte_eth_dev *dev;
3713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3715 dev = &rte_eth_devices[port_id];
3716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3717 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3718 RTE_ETH_FILTER_NOP, NULL);
3722 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3723 enum rte_filter_op filter_op, void *arg)
3725 struct rte_eth_dev *dev;
3727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3729 dev = &rte_eth_devices[port_id];
3730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3731 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3735 const struct rte_eth_rxtx_callback *
3736 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3737 rte_rx_callback_fn fn, void *user_param)
3739 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3740 rte_errno = ENOTSUP;
3743 /* check input parameters */
3744 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3745 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3749 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3757 cb->param = user_param;
3759 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3760 /* Add the callbacks in fifo order. */
3761 struct rte_eth_rxtx_callback *tail =
3762 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3765 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3772 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3777 const struct rte_eth_rxtx_callback *
3778 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3779 rte_rx_callback_fn fn, void *user_param)
3781 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3782 rte_errno = ENOTSUP;
3785 /* check input parameters */
3786 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3787 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3792 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3800 cb->param = user_param;
3802 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3803 /* Add the callbacks at fisrt position*/
3804 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3806 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3807 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3812 const struct rte_eth_rxtx_callback *
3813 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3814 rte_tx_callback_fn fn, void *user_param)
3816 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3817 rte_errno = ENOTSUP;
3820 /* check input parameters */
3821 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3822 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3827 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3835 cb->param = user_param;
3837 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3838 /* Add the callbacks in fifo order. */
3839 struct rte_eth_rxtx_callback *tail =
3840 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3843 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3850 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3856 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3857 const struct rte_eth_rxtx_callback *user_cb)
3859 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3862 /* Check input parameters. */
3863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3864 if (user_cb == NULL ||
3865 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3868 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3869 struct rte_eth_rxtx_callback *cb;
3870 struct rte_eth_rxtx_callback **prev_cb;
3873 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3874 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3875 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3877 if (cb == user_cb) {
3878 /* Remove the user cb from the callback list. */
3879 *prev_cb = cb->next;
3884 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3890 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3891 const struct rte_eth_rxtx_callback *user_cb)
3893 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3896 /* Check input parameters. */
3897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3898 if (user_cb == NULL ||
3899 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3902 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3904 struct rte_eth_rxtx_callback *cb;
3905 struct rte_eth_rxtx_callback **prev_cb;
3907 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3908 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3909 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3911 if (cb == user_cb) {
3912 /* Remove the user cb from the callback list. */
3913 *prev_cb = cb->next;
3918 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3924 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3925 struct rte_eth_rxq_info *qinfo)
3927 struct rte_eth_dev *dev;
3929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3934 dev = &rte_eth_devices[port_id];
3935 if (queue_id >= dev->data->nb_rx_queues) {
3936 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3942 memset(qinfo, 0, sizeof(*qinfo));
3943 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3948 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3949 struct rte_eth_txq_info *qinfo)
3951 struct rte_eth_dev *dev;
3952 struct rte_eth_txconf *txconf = &qinfo->conf;
3954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3959 dev = &rte_eth_devices[port_id];
3960 if (queue_id >= dev->data->nb_tx_queues) {
3961 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3967 memset(qinfo, 0, sizeof(*qinfo));
3968 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3969 /* convert offload to txq_flags to support legacy app */
3970 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3976 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3977 struct ether_addr *mc_addr_set,
3978 uint32_t nb_mc_addr)
3980 struct rte_eth_dev *dev;
3982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3984 dev = &rte_eth_devices[port_id];
3985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3986 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3987 mc_addr_set, nb_mc_addr));
3991 rte_eth_timesync_enable(uint16_t port_id)
3993 struct rte_eth_dev *dev;
3995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3996 dev = &rte_eth_devices[port_id];
3998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3999 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4003 rte_eth_timesync_disable(uint16_t port_id)
4005 struct rte_eth_dev *dev;
4007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4008 dev = &rte_eth_devices[port_id];
4010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4011 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4015 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4018 struct rte_eth_dev *dev;
4020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4021 dev = &rte_eth_devices[port_id];
4023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4024 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4025 (dev, timestamp, flags));
4029 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4030 struct timespec *timestamp)
4032 struct rte_eth_dev *dev;
4034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4035 dev = &rte_eth_devices[port_id];
4037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4038 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4043 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4045 struct rte_eth_dev *dev;
4047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4048 dev = &rte_eth_devices[port_id];
4050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4051 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4056 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4058 struct rte_eth_dev *dev;
4060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4061 dev = &rte_eth_devices[port_id];
4063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4064 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4069 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4071 struct rte_eth_dev *dev;
4073 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4074 dev = &rte_eth_devices[port_id];
4076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4077 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4082 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4084 struct rte_eth_dev *dev;
4086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4088 dev = &rte_eth_devices[port_id];
4089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4090 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4094 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4096 struct rte_eth_dev *dev;
4098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4100 dev = &rte_eth_devices[port_id];
4101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4102 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4106 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4108 struct rte_eth_dev *dev;
4110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4112 dev = &rte_eth_devices[port_id];
4113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4114 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4118 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4120 struct rte_eth_dev *dev;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4124 dev = &rte_eth_devices[port_id];
4125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4126 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4129 int __rte_experimental
4130 rte_eth_dev_get_module_info(uint16_t port_id,
4131 struct rte_eth_dev_module_info *modinfo)
4133 struct rte_eth_dev *dev;
4135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4137 dev = &rte_eth_devices[port_id];
4138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4139 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4142 int __rte_experimental
4143 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4144 struct rte_dev_eeprom_info *info)
4146 struct rte_eth_dev *dev;
4148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4150 dev = &rte_eth_devices[port_id];
4151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4152 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4156 rte_eth_dev_get_dcb_info(uint16_t port_id,
4157 struct rte_eth_dcb_info *dcb_info)
4159 struct rte_eth_dev *dev;
4161 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4163 dev = &rte_eth_devices[port_id];
4164 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4167 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4171 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4172 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4174 struct rte_eth_dev *dev;
4176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4177 if (l2_tunnel == NULL) {
4178 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4182 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4183 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4187 dev = &rte_eth_devices[port_id];
4188 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4190 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4195 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4196 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4200 struct rte_eth_dev *dev;
4202 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4204 if (l2_tunnel == NULL) {
4205 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4209 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4210 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4215 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4219 dev = &rte_eth_devices[port_id];
4220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4222 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4223 l2_tunnel, mask, en));
4227 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4228 const struct rte_eth_desc_lim *desc_lim)
4230 if (desc_lim->nb_align != 0)
4231 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4233 if (desc_lim->nb_max != 0)
4234 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4236 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4240 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4241 uint16_t *nb_rx_desc,
4242 uint16_t *nb_tx_desc)
4244 struct rte_eth_dev *dev;
4245 struct rte_eth_dev_info dev_info;
4247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4249 dev = &rte_eth_devices[port_id];
4250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4252 rte_eth_dev_info_get(port_id, &dev_info);
4254 if (nb_rx_desc != NULL)
4255 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4257 if (nb_tx_desc != NULL)
4258 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4264 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4266 struct rte_eth_dev *dev;
4268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4273 dev = &rte_eth_devices[port_id];
4275 if (*dev->dev_ops->pool_ops_supported == NULL)
4276 return 1; /* all pools are supported */
4278 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4282 * A set of values to describe the possible states of a switch domain.
4284 enum rte_eth_switch_domain_state {
4285 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4286 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4290 * Array of switch domains available for allocation. Array is sized to
4291 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4292 * ethdev ports in a single process.
4294 struct rte_eth_dev_switch {
4295 enum rte_eth_switch_domain_state state;
4296 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4298 int __rte_experimental
4299 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4303 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4305 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4306 i < RTE_MAX_ETHPORTS; i++) {
4307 if (rte_eth_switch_domains[i].state ==
4308 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4309 rte_eth_switch_domains[i].state =
4310 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4319 int __rte_experimental
4320 rte_eth_switch_domain_free(uint16_t domain_id)
4322 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4323 domain_id >= RTE_MAX_ETHPORTS)
4326 if (rte_eth_switch_domains[domain_id].state !=
4327 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4330 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4335 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4338 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4341 struct rte_kvargs_pair *pair;
4344 arglist->str = strdup(str_in);
4345 if (arglist->str == NULL)
4348 letter = arglist->str;
4351 pair = &arglist->pairs[0];
4354 case 0: /* Initial */
4357 else if (*letter == '\0')
4364 case 1: /* Parsing key */
4365 if (*letter == '=') {
4367 pair->value = letter + 1;
4369 } else if (*letter == ',' || *letter == '\0')
4374 case 2: /* Parsing value */
4377 else if (*letter == ',') {
4380 pair = &arglist->pairs[arglist->count];
4382 } else if (*letter == '\0') {
4385 pair = &arglist->pairs[arglist->count];
4390 case 3: /* Parsing list */
4393 else if (*letter == '\0')
4402 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4410 /* Single element, not a list */
4411 return callback(str, data);
4413 /* Sanity check, then strip the brackets */
4414 str_start = &str[strlen(str) - 1];
4415 if (*str_start != ']') {
4416 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4422 /* Process list elements */
4432 } else if (state == 1) {
4433 if (*str == ',' || *str == '\0') {
4434 if (str > str_start) {
4435 /* Non-empty string fragment */
4437 result = callback(str_start, data);
4450 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4451 const uint16_t max_list)
4453 uint16_t lo, hi, val;
4456 result = sscanf(str, "%hu-%hu", &lo, &hi);
4458 if (*len_list >= max_list)
4460 list[(*len_list)++] = lo;
4461 } else if (result == 2) {
4462 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4464 for (val = lo; val <= hi; val++) {
4465 if (*len_list >= max_list)
4467 list[(*len_list)++] = val;
4476 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4478 struct rte_eth_devargs *eth_da = data;
4480 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4481 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4484 int __rte_experimental
4485 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4487 struct rte_kvargs args;
4488 struct rte_kvargs_pair *pair;
4492 memset(eth_da, 0, sizeof(*eth_da));
4494 result = rte_eth_devargs_tokenise(&args, dargs);
4498 for (i = 0; i < args.count; i++) {
4499 pair = &args.pairs[i];
4500 if (strcmp("representor", pair->key) == 0) {
4501 result = rte_eth_devargs_parse_list(pair->value,
4502 rte_eth_devargs_parse_representor_ports,
4516 RTE_INIT(ethdev_init_log);
4518 ethdev_init_log(void)
4520 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4521 if (rte_eth_dev_logtype >= 0)
4522 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);