1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint16_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
130 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
131 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
168 #undef RTE_TX_OFFLOAD_BIT2STR
171 * The user application callback description.
173 * It contains callback address to be registered by user application,
174 * the pointer to the parameters for callback, and the event type.
176 struct rte_eth_dev_callback {
177 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
178 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
179 void *cb_arg; /**< Parameter for callback */
180 void *ret_param; /**< Return parameter */
181 enum rte_eth_event_type event; /**< Interrupt event type */
182 uint32_t active; /**< Callback is executing */
191 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
194 struct rte_devargs devargs = {.args = NULL};
195 const char *bus_param_key;
196 char *bus_str = NULL;
197 char *cls_str = NULL;
200 memset(iter, 0, sizeof(*iter));
203 * The devargs string may use various syntaxes:
204 * - 0000:08:00.0,representor=[1-3]
205 * - pci:0000:06:00.0,representor=[0,5]
206 * - class=eth,mac=00:11:22:33:44:55
207 * A new syntax is in development (not yet supported):
208 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
212 * Handle pure class filter (i.e. without any bus-level argument),
213 * from future new syntax.
214 * rte_devargs_parse() is not yet supporting the new syntax,
215 * that's why this simple case is temporarily parsed here.
217 #define iter_anybus_str "class=eth,"
218 if (strncmp(devargs_str, iter_anybus_str,
219 strlen(iter_anybus_str)) == 0) {
220 iter->cls_str = devargs_str + strlen(iter_anybus_str);
224 /* Split bus, device and parameters. */
225 ret = rte_devargs_parse(&devargs, devargs_str);
230 * Assume parameters of old syntax can match only at ethdev level.
231 * Extra parameters will be ignored, thanks to "+" prefix.
233 str_size = strlen(devargs.args) + 2;
234 cls_str = malloc(str_size);
235 if (cls_str == NULL) {
239 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
240 if (ret != str_size - 1) {
244 iter->cls_str = cls_str;
245 free(devargs.args); /* allocated by rte_devargs_parse() */
248 iter->bus = devargs.bus;
249 if (iter->bus->dev_iterate == NULL) {
254 /* Convert bus args to new syntax for use with new API dev_iterate. */
255 if (strcmp(iter->bus->name, "vdev") == 0) {
256 bus_param_key = "name";
257 } else if (strcmp(iter->bus->name, "pci") == 0) {
258 bus_param_key = "addr";
263 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
264 bus_str = malloc(str_size);
265 if (bus_str == NULL) {
269 ret = snprintf(bus_str, str_size, "%s=%s",
270 bus_param_key, devargs.name);
271 if (ret != str_size - 1) {
275 iter->bus_str = bus_str;
278 iter->cls = rte_class_find_by_name("eth");
283 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
292 rte_eth_iterator_next(struct rte_dev_iterator *iter)
294 if (iter->cls == NULL) /* invalid ethdev iterator */
295 return RTE_MAX_ETHPORTS;
297 do { /* loop to try all matching rte_device */
298 /* If not pure ethdev filter and */
299 if (iter->bus != NULL &&
300 /* not in middle of rte_eth_dev iteration, */
301 iter->class_device == NULL) {
302 /* get next rte_device to try. */
303 iter->device = iter->bus->dev_iterate(
304 iter->device, iter->bus_str, iter);
305 if (iter->device == NULL)
306 break; /* no more rte_device candidate */
308 /* A device is matching bus part, need to check ethdev part. */
309 iter->class_device = iter->cls->dev_iterate(
310 iter->class_device, iter->cls_str, iter);
311 if (iter->class_device != NULL)
312 return eth_dev_to_id(iter->class_device); /* match */
313 } while (iter->bus != NULL); /* need to try next rte_device */
315 /* No more ethdev port to iterate. */
316 rte_eth_iterator_cleanup(iter);
317 return RTE_MAX_ETHPORTS;
321 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
323 if (iter->bus_str == NULL)
324 return; /* nothing to free in pure class filter */
325 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
326 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
327 memset(iter, 0, sizeof(*iter));
331 rte_eth_find_next(uint16_t port_id)
333 while (port_id < RTE_MAX_ETHPORTS &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
335 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
338 if (port_id >= RTE_MAX_ETHPORTS)
339 return RTE_MAX_ETHPORTS;
345 rte_eth_dev_shared_data_prepare(void)
347 const unsigned flags = 0;
348 const struct rte_memzone *mz;
350 rte_spinlock_lock(&rte_eth_shared_data_lock);
352 if (rte_eth_dev_shared_data == NULL) {
353 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
354 /* Allocate port data and ownership shared memory. */
355 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
356 sizeof(*rte_eth_dev_shared_data),
357 rte_socket_id(), flags);
359 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
361 rte_panic("Cannot allocate ethdev shared data\n");
363 rte_eth_dev_shared_data = mz->addr;
364 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
365 rte_eth_dev_shared_data->next_owner_id =
366 RTE_ETH_DEV_NO_OWNER + 1;
367 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
368 memset(rte_eth_dev_shared_data->data, 0,
369 sizeof(rte_eth_dev_shared_data->data));
373 rte_spinlock_unlock(&rte_eth_shared_data_lock);
377 is_allocated(const struct rte_eth_dev *ethdev)
379 return ethdev->data->name[0] != '\0';
382 static struct rte_eth_dev *
383 _rte_eth_dev_allocated(const char *name)
387 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
388 if (rte_eth_devices[i].data != NULL &&
389 strcmp(rte_eth_devices[i].data->name, name) == 0)
390 return &rte_eth_devices[i];
396 rte_eth_dev_allocated(const char *name)
398 struct rte_eth_dev *ethdev;
400 rte_eth_dev_shared_data_prepare();
402 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
404 ethdev = _rte_eth_dev_allocated(name);
406 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
412 rte_eth_dev_find_free_port(void)
416 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
417 /* Using shared name field to find a free port. */
418 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
419 RTE_ASSERT(rte_eth_devices[i].state ==
424 return RTE_MAX_ETHPORTS;
427 static struct rte_eth_dev *
428 eth_dev_get(uint16_t port_id)
430 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
432 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
434 eth_dev_last_created_port = port_id;
440 rte_eth_dev_allocate(const char *name)
443 struct rte_eth_dev *eth_dev = NULL;
445 rte_eth_dev_shared_data_prepare();
447 /* Synchronize port creation between primary and secondary threads. */
448 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
450 if (_rte_eth_dev_allocated(name) != NULL) {
452 "Ethernet device with name %s already allocated\n",
457 port_id = rte_eth_dev_find_free_port();
458 if (port_id == RTE_MAX_ETHPORTS) {
460 "Reached maximum number of Ethernet ports\n");
464 eth_dev = eth_dev_get(port_id);
465 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
466 eth_dev->data->port_id = port_id;
467 eth_dev->data->mtu = ETHER_MTU;
470 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
476 * Attach to a port already registered by the primary process, which
477 * makes sure that the same device would have the same port id both
478 * in the primary and secondary process.
481 rte_eth_dev_attach_secondary(const char *name)
484 struct rte_eth_dev *eth_dev = NULL;
486 rte_eth_dev_shared_data_prepare();
488 /* Synchronize port attachment to primary port creation and release. */
489 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
491 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
492 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
495 if (i == RTE_MAX_ETHPORTS) {
497 "Device %s is not driven by the primary process\n",
500 eth_dev = eth_dev_get(i);
501 RTE_ASSERT(eth_dev->data->port_id == i);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
509 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
514 rte_eth_dev_shared_data_prepare();
516 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
517 _rte_eth_dev_callback_process(eth_dev,
518 RTE_ETH_EVENT_DESTROY, NULL);
520 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
522 eth_dev->state = RTE_ETH_DEV_UNUSED;
524 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
525 rte_free(eth_dev->data->rx_queues);
526 rte_free(eth_dev->data->tx_queues);
527 rte_free(eth_dev->data->mac_addrs);
528 rte_free(eth_dev->data->hash_mac_addrs);
529 rte_free(eth_dev->data->dev_private);
530 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
533 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
539 rte_eth_dev_is_valid_port(uint16_t port_id)
541 if (port_id >= RTE_MAX_ETHPORTS ||
542 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
549 rte_eth_is_valid_owner_id(uint64_t owner_id)
551 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
552 rte_eth_dev_shared_data->next_owner_id <= owner_id)
558 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
560 while (port_id < RTE_MAX_ETHPORTS &&
561 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
562 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
563 rte_eth_devices[port_id].data->owner.id != owner_id))
566 if (port_id >= RTE_MAX_ETHPORTS)
567 return RTE_MAX_ETHPORTS;
572 int __rte_experimental
573 rte_eth_dev_owner_new(uint64_t *owner_id)
575 rte_eth_dev_shared_data_prepare();
577 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
579 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
581 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
586 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
587 const struct rte_eth_dev_owner *new_owner)
589 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
590 struct rte_eth_dev_owner *port_owner;
593 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
594 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
599 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
600 !rte_eth_is_valid_owner_id(old_owner_id)) {
602 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
603 old_owner_id, new_owner->id);
607 port_owner = &rte_eth_devices[port_id].data->owner;
608 if (port_owner->id != old_owner_id) {
610 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
611 port_id, port_owner->name, port_owner->id);
615 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
617 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
618 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
621 port_owner->id = new_owner->id;
623 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
624 port_id, new_owner->name, new_owner->id);
629 int __rte_experimental
630 rte_eth_dev_owner_set(const uint16_t port_id,
631 const struct rte_eth_dev_owner *owner)
635 rte_eth_dev_shared_data_prepare();
637 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
639 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
641 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
645 int __rte_experimental
646 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
648 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
649 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
652 rte_eth_dev_shared_data_prepare();
654 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
656 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
658 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
662 void __rte_experimental
663 rte_eth_dev_owner_delete(const uint64_t owner_id)
667 rte_eth_dev_shared_data_prepare();
669 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
671 if (rte_eth_is_valid_owner_id(owner_id)) {
672 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
673 if (rte_eth_devices[port_id].data->owner.id == owner_id)
674 memset(&rte_eth_devices[port_id].data->owner, 0,
675 sizeof(struct rte_eth_dev_owner));
676 RTE_ETHDEV_LOG(NOTICE,
677 "All port owners owned by %016"PRIx64" identifier have removed\n",
681 "Invalid owner id=%016"PRIx64"\n",
685 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
688 int __rte_experimental
689 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
692 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
694 rte_eth_dev_shared_data_prepare();
696 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
698 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
699 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
703 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
706 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
711 rte_eth_dev_socket_id(uint16_t port_id)
713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
714 return rte_eth_devices[port_id].data->numa_node;
718 rte_eth_dev_get_sec_ctx(uint16_t port_id)
720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
721 return rte_eth_devices[port_id].security_ctx;
725 rte_eth_dev_count(void)
727 return rte_eth_dev_count_avail();
731 rte_eth_dev_count_avail(void)
738 RTE_ETH_FOREACH_DEV(p)
744 uint16_t __rte_experimental
745 rte_eth_dev_count_total(void)
747 uint16_t port, count = 0;
749 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
750 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
757 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
764 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
768 /* shouldn't check 'rte_eth_devices[i].data',
769 * because it might be overwritten by VDEV PMD */
770 tmp = rte_eth_dev_shared_data->data[port_id].name;
776 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
781 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
785 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
786 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
787 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
797 eth_err(uint16_t port_id, int ret)
801 if (rte_eth_dev_is_removed(port_id))
807 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
809 uint16_t old_nb_queues = dev->data->nb_rx_queues;
813 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
814 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
815 sizeof(dev->data->rx_queues[0]) * nb_queues,
816 RTE_CACHE_LINE_SIZE);
817 if (dev->data->rx_queues == NULL) {
818 dev->data->nb_rx_queues = 0;
821 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
824 rxq = dev->data->rx_queues;
826 for (i = nb_queues; i < old_nb_queues; i++)
827 (*dev->dev_ops->rx_queue_release)(rxq[i]);
828 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
829 RTE_CACHE_LINE_SIZE);
832 if (nb_queues > old_nb_queues) {
833 uint16_t new_qs = nb_queues - old_nb_queues;
835 memset(rxq + old_nb_queues, 0,
836 sizeof(rxq[0]) * new_qs);
839 dev->data->rx_queues = rxq;
841 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
844 rxq = dev->data->rx_queues;
846 for (i = nb_queues; i < old_nb_queues; i++)
847 (*dev->dev_ops->rx_queue_release)(rxq[i]);
849 rte_free(dev->data->rx_queues);
850 dev->data->rx_queues = NULL;
852 dev->data->nb_rx_queues = nb_queues;
857 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
859 struct rte_eth_dev *dev;
861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
863 dev = &rte_eth_devices[port_id];
864 if (!dev->data->dev_started) {
866 "Port %u must be started before start any queue\n",
871 if (rx_queue_id >= dev->data->nb_rx_queues) {
872 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
878 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
880 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
881 rx_queue_id, port_id);
885 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
891 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
893 struct rte_eth_dev *dev;
895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
897 dev = &rte_eth_devices[port_id];
898 if (rx_queue_id >= dev->data->nb_rx_queues) {
899 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
905 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
907 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
908 rx_queue_id, port_id);
912 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
917 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
919 struct rte_eth_dev *dev;
921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
923 dev = &rte_eth_devices[port_id];
924 if (!dev->data->dev_started) {
926 "Port %u must be started before start any queue\n",
931 if (tx_queue_id >= dev->data->nb_tx_queues) {
932 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
938 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
940 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
941 tx_queue_id, port_id);
945 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
949 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
951 struct rte_eth_dev *dev;
953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
955 dev = &rte_eth_devices[port_id];
956 if (tx_queue_id >= dev->data->nb_tx_queues) {
957 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
963 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
965 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
966 tx_queue_id, port_id);
970 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
975 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
977 uint16_t old_nb_queues = dev->data->nb_tx_queues;
981 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
982 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
983 sizeof(dev->data->tx_queues[0]) * nb_queues,
984 RTE_CACHE_LINE_SIZE);
985 if (dev->data->tx_queues == NULL) {
986 dev->data->nb_tx_queues = 0;
989 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
992 txq = dev->data->tx_queues;
994 for (i = nb_queues; i < old_nb_queues; i++)
995 (*dev->dev_ops->tx_queue_release)(txq[i]);
996 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
997 RTE_CACHE_LINE_SIZE);
1000 if (nb_queues > old_nb_queues) {
1001 uint16_t new_qs = nb_queues - old_nb_queues;
1003 memset(txq + old_nb_queues, 0,
1004 sizeof(txq[0]) * new_qs);
1007 dev->data->tx_queues = txq;
1009 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1012 txq = dev->data->tx_queues;
1014 for (i = nb_queues; i < old_nb_queues; i++)
1015 (*dev->dev_ops->tx_queue_release)(txq[i]);
1017 rte_free(dev->data->tx_queues);
1018 dev->data->tx_queues = NULL;
1020 dev->data->nb_tx_queues = nb_queues;
1025 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1028 case ETH_SPEED_NUM_10M:
1029 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1030 case ETH_SPEED_NUM_100M:
1031 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1032 case ETH_SPEED_NUM_1G:
1033 return ETH_LINK_SPEED_1G;
1034 case ETH_SPEED_NUM_2_5G:
1035 return ETH_LINK_SPEED_2_5G;
1036 case ETH_SPEED_NUM_5G:
1037 return ETH_LINK_SPEED_5G;
1038 case ETH_SPEED_NUM_10G:
1039 return ETH_LINK_SPEED_10G;
1040 case ETH_SPEED_NUM_20G:
1041 return ETH_LINK_SPEED_20G;
1042 case ETH_SPEED_NUM_25G:
1043 return ETH_LINK_SPEED_25G;
1044 case ETH_SPEED_NUM_40G:
1045 return ETH_LINK_SPEED_40G;
1046 case ETH_SPEED_NUM_50G:
1047 return ETH_LINK_SPEED_50G;
1048 case ETH_SPEED_NUM_56G:
1049 return ETH_LINK_SPEED_56G;
1050 case ETH_SPEED_NUM_100G:
1051 return ETH_LINK_SPEED_100G;
1058 rte_eth_dev_rx_offload_name(uint64_t offload)
1060 const char *name = "UNKNOWN";
1063 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1064 if (offload == rte_rx_offload_names[i].offload) {
1065 name = rte_rx_offload_names[i].name;
1074 rte_eth_dev_tx_offload_name(uint64_t offload)
1076 const char *name = "UNKNOWN";
1079 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1080 if (offload == rte_tx_offload_names[i].offload) {
1081 name = rte_tx_offload_names[i].name;
1090 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1091 const struct rte_eth_conf *dev_conf)
1093 struct rte_eth_dev *dev;
1094 struct rte_eth_dev_info dev_info;
1095 struct rte_eth_conf orig_conf;
1099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1101 dev = &rte_eth_devices[port_id];
1103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1106 if (dev->data->dev_started) {
1108 "Port %u must be stopped to allow configuration\n",
1113 /* Store original config, as rollback required on failure */
1114 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1117 * Copy the dev_conf parameter into the dev structure.
1118 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1120 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1122 rte_eth_dev_info_get(port_id, &dev_info);
1124 /* If number of queues specified by application for both Rx and Tx is
1125 * zero, use driver preferred values. This cannot be done individually
1126 * as it is valid for either Tx or Rx (but not both) to be zero.
1127 * If driver does not provide any preferred valued, fall back on
1130 if (nb_rx_q == 0 && nb_tx_q == 0) {
1131 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1133 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1134 nb_tx_q = dev_info.default_txportconf.nb_queues;
1136 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1139 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1141 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1142 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1147 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1149 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1150 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1156 * Check that the numbers of RX and TX queues are not greater
1157 * than the maximum number of RX and TX queues supported by the
1158 * configured device.
1160 if (nb_rx_q > dev_info.max_rx_queues) {
1161 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1162 port_id, nb_rx_q, dev_info.max_rx_queues);
1167 if (nb_tx_q > dev_info.max_tx_queues) {
1168 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1169 port_id, nb_tx_q, dev_info.max_tx_queues);
1174 /* Check that the device supports requested interrupts */
1175 if ((dev_conf->intr_conf.lsc == 1) &&
1176 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1177 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1178 dev->device->driver->name);
1182 if ((dev_conf->intr_conf.rmv == 1) &&
1183 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1184 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1185 dev->device->driver->name);
1191 * If jumbo frames are enabled, check that the maximum RX packet
1192 * length is supported by the configured device.
1194 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1195 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1197 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1198 port_id, dev_conf->rxmode.max_rx_pkt_len,
1199 dev_info.max_rx_pktlen);
1202 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1204 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1205 port_id, dev_conf->rxmode.max_rx_pkt_len,
1206 (unsigned)ETHER_MIN_LEN);
1211 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1212 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1213 /* Use default value */
1214 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1218 /* Any requested offloading must be within its device capabilities */
1219 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1220 dev_conf->rxmode.offloads) {
1222 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1223 "capabilities 0x%"PRIx64" in %s()\n",
1224 port_id, dev_conf->rxmode.offloads,
1225 dev_info.rx_offload_capa,
1230 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1231 dev_conf->txmode.offloads) {
1233 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1234 "capabilities 0x%"PRIx64" in %s()\n",
1235 port_id, dev_conf->txmode.offloads,
1236 dev_info.tx_offload_capa,
1242 /* Check that device supports requested rss hash functions. */
1243 if ((dev_info.flow_type_rss_offloads |
1244 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1245 dev_info.flow_type_rss_offloads) {
1247 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1248 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1249 dev_info.flow_type_rss_offloads);
1255 * Setup new number of RX/TX queues and reconfigure device.
1257 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1260 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1266 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1269 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1271 rte_eth_dev_rx_queue_config(dev, 0);
1276 diag = (*dev->dev_ops->dev_configure)(dev);
1278 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1280 rte_eth_dev_rx_queue_config(dev, 0);
1281 rte_eth_dev_tx_queue_config(dev, 0);
1282 ret = eth_err(port_id, diag);
1286 /* Initialize Rx profiling if enabled at compilation time. */
1287 diag = __rte_eth_dev_profile_init(port_id, dev);
1289 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1291 rte_eth_dev_rx_queue_config(dev, 0);
1292 rte_eth_dev_tx_queue_config(dev, 0);
1293 ret = eth_err(port_id, diag);
1300 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1306 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1308 if (dev->data->dev_started) {
1309 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1310 dev->data->port_id);
1314 rte_eth_dev_rx_queue_config(dev, 0);
1315 rte_eth_dev_tx_queue_config(dev, 0);
1317 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1321 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1322 struct rte_eth_dev_info *dev_info)
1324 struct ether_addr *addr;
1329 /* replay MAC address configuration including default MAC */
1330 addr = &dev->data->mac_addrs[0];
1331 if (*dev->dev_ops->mac_addr_set != NULL)
1332 (*dev->dev_ops->mac_addr_set)(dev, addr);
1333 else if (*dev->dev_ops->mac_addr_add != NULL)
1334 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1336 if (*dev->dev_ops->mac_addr_add != NULL) {
1337 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1338 addr = &dev->data->mac_addrs[i];
1340 /* skip zero address */
1341 if (is_zero_ether_addr(addr))
1345 pool_mask = dev->data->mac_pool_sel[i];
1348 if (pool_mask & 1ULL)
1349 (*dev->dev_ops->mac_addr_add)(dev,
1353 } while (pool_mask);
1359 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1360 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1362 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1363 rte_eth_dev_mac_restore(dev, dev_info);
1365 /* replay promiscuous configuration */
1366 if (rte_eth_promiscuous_get(port_id) == 1)
1367 rte_eth_promiscuous_enable(port_id);
1368 else if (rte_eth_promiscuous_get(port_id) == 0)
1369 rte_eth_promiscuous_disable(port_id);
1371 /* replay all multicast configuration */
1372 if (rte_eth_allmulticast_get(port_id) == 1)
1373 rte_eth_allmulticast_enable(port_id);
1374 else if (rte_eth_allmulticast_get(port_id) == 0)
1375 rte_eth_allmulticast_disable(port_id);
1379 rte_eth_dev_start(uint16_t port_id)
1381 struct rte_eth_dev *dev;
1382 struct rte_eth_dev_info dev_info;
1385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1387 dev = &rte_eth_devices[port_id];
1389 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1391 if (dev->data->dev_started != 0) {
1392 RTE_ETHDEV_LOG(INFO,
1393 "Device with port_id=%"PRIu16" already started\n",
1398 rte_eth_dev_info_get(port_id, &dev_info);
1400 /* Lets restore MAC now if device does not support live change */
1401 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1402 rte_eth_dev_mac_restore(dev, &dev_info);
1404 diag = (*dev->dev_ops->dev_start)(dev);
1406 dev->data->dev_started = 1;
1408 return eth_err(port_id, diag);
1410 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1412 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1414 (*dev->dev_ops->link_update)(dev, 0);
1420 rte_eth_dev_stop(uint16_t port_id)
1422 struct rte_eth_dev *dev;
1424 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1425 dev = &rte_eth_devices[port_id];
1427 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1429 if (dev->data->dev_started == 0) {
1430 RTE_ETHDEV_LOG(INFO,
1431 "Device with port_id=%"PRIu16" already stopped\n",
1436 dev->data->dev_started = 0;
1437 (*dev->dev_ops->dev_stop)(dev);
1441 rte_eth_dev_set_link_up(uint16_t port_id)
1443 struct rte_eth_dev *dev;
1445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1447 dev = &rte_eth_devices[port_id];
1449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1450 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1454 rte_eth_dev_set_link_down(uint16_t port_id)
1456 struct rte_eth_dev *dev;
1458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1460 dev = &rte_eth_devices[port_id];
1462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1463 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1467 rte_eth_dev_close(uint16_t port_id)
1469 struct rte_eth_dev *dev;
1471 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1472 dev = &rte_eth_devices[port_id];
1474 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1475 dev->data->dev_started = 0;
1476 (*dev->dev_ops->dev_close)(dev);
1478 /* check behaviour flag - temporary for PMD migration */
1479 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1480 /* new behaviour: send event + reset state + free all data */
1481 rte_eth_dev_release_port(dev);
1484 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1485 "The driver %s should migrate to the new behaviour.\n",
1486 dev->device->driver->name);
1487 /* old behaviour: only free queue arrays */
1488 dev->data->nb_rx_queues = 0;
1489 rte_free(dev->data->rx_queues);
1490 dev->data->rx_queues = NULL;
1491 dev->data->nb_tx_queues = 0;
1492 rte_free(dev->data->tx_queues);
1493 dev->data->tx_queues = NULL;
1497 rte_eth_dev_reset(uint16_t port_id)
1499 struct rte_eth_dev *dev;
1502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1503 dev = &rte_eth_devices[port_id];
1505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1507 rte_eth_dev_stop(port_id);
1508 ret = dev->dev_ops->dev_reset(dev);
1510 return eth_err(port_id, ret);
1513 int __rte_experimental
1514 rte_eth_dev_is_removed(uint16_t port_id)
1516 struct rte_eth_dev *dev;
1519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1521 dev = &rte_eth_devices[port_id];
1523 if (dev->state == RTE_ETH_DEV_REMOVED)
1526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1528 ret = dev->dev_ops->is_removed(dev);
1530 /* Device is physically removed. */
1531 dev->state = RTE_ETH_DEV_REMOVED;
1537 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1538 uint16_t nb_rx_desc, unsigned int socket_id,
1539 const struct rte_eth_rxconf *rx_conf,
1540 struct rte_mempool *mp)
1543 uint32_t mbp_buf_size;
1544 struct rte_eth_dev *dev;
1545 struct rte_eth_dev_info dev_info;
1546 struct rte_eth_rxconf local_conf;
1549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1551 dev = &rte_eth_devices[port_id];
1552 if (rx_queue_id >= dev->data->nb_rx_queues) {
1553 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1561 * Check the size of the mbuf data buffer.
1562 * This value must be provided in the private data of the memory pool.
1563 * First check that the memory pool has a valid private data.
1565 rte_eth_dev_info_get(port_id, &dev_info);
1566 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1567 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1568 mp->name, (int)mp->private_data_size,
1569 (int)sizeof(struct rte_pktmbuf_pool_private));
1572 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1574 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1576 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1577 mp->name, (int)mbp_buf_size,
1578 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1579 (int)RTE_PKTMBUF_HEADROOM,
1580 (int)dev_info.min_rx_bufsize);
1584 /* Use default specified by driver, if nb_rx_desc is zero */
1585 if (nb_rx_desc == 0) {
1586 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1587 /* If driver default is also zero, fall back on EAL default */
1588 if (nb_rx_desc == 0)
1589 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1592 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1593 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1594 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1597 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1598 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1599 dev_info.rx_desc_lim.nb_min,
1600 dev_info.rx_desc_lim.nb_align);
1604 if (dev->data->dev_started &&
1605 !(dev_info.dev_capa &
1606 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1609 if (dev->data->dev_started &&
1610 (dev->data->rx_queue_state[rx_queue_id] !=
1611 RTE_ETH_QUEUE_STATE_STOPPED))
1614 rxq = dev->data->rx_queues;
1615 if (rxq[rx_queue_id]) {
1616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1618 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1619 rxq[rx_queue_id] = NULL;
1622 if (rx_conf == NULL)
1623 rx_conf = &dev_info.default_rxconf;
1625 local_conf = *rx_conf;
1628 * If an offloading has already been enabled in
1629 * rte_eth_dev_configure(), it has been enabled on all queues,
1630 * so there is no need to enable it in this queue again.
1631 * The local_conf.offloads input to underlying PMD only carries
1632 * those offloadings which are only enabled on this queue and
1633 * not enabled on all queues.
1635 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1638 * New added offloadings for this queue are those not enabled in
1639 * rte_eth_dev_configure() and they must be per-queue type.
1640 * A pure per-port offloading can't be enabled on a queue while
1641 * disabled on another queue. A pure per-port offloading can't
1642 * be enabled for any queue as new added one if it hasn't been
1643 * enabled in rte_eth_dev_configure().
1645 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1646 local_conf.offloads) {
1648 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1649 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1650 port_id, rx_queue_id, local_conf.offloads,
1651 dev_info.rx_queue_offload_capa,
1656 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1657 socket_id, &local_conf, mp);
1659 if (!dev->data->min_rx_buf_size ||
1660 dev->data->min_rx_buf_size > mbp_buf_size)
1661 dev->data->min_rx_buf_size = mbp_buf_size;
1664 return eth_err(port_id, ret);
1668 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1669 uint16_t nb_tx_desc, unsigned int socket_id,
1670 const struct rte_eth_txconf *tx_conf)
1672 struct rte_eth_dev *dev;
1673 struct rte_eth_dev_info dev_info;
1674 struct rte_eth_txconf local_conf;
1677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1679 dev = &rte_eth_devices[port_id];
1680 if (tx_queue_id >= dev->data->nb_tx_queues) {
1681 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1685 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1688 rte_eth_dev_info_get(port_id, &dev_info);
1690 /* Use default specified by driver, if nb_tx_desc is zero */
1691 if (nb_tx_desc == 0) {
1692 nb_tx_desc = dev_info.default_txportconf.ring_size;
1693 /* If driver default is zero, fall back on EAL default */
1694 if (nb_tx_desc == 0)
1695 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1697 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1698 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1699 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1701 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1702 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1703 dev_info.tx_desc_lim.nb_min,
1704 dev_info.tx_desc_lim.nb_align);
1708 if (dev->data->dev_started &&
1709 !(dev_info.dev_capa &
1710 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1713 if (dev->data->dev_started &&
1714 (dev->data->tx_queue_state[tx_queue_id] !=
1715 RTE_ETH_QUEUE_STATE_STOPPED))
1718 txq = dev->data->tx_queues;
1719 if (txq[tx_queue_id]) {
1720 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1722 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1723 txq[tx_queue_id] = NULL;
1726 if (tx_conf == NULL)
1727 tx_conf = &dev_info.default_txconf;
1729 local_conf = *tx_conf;
1732 * If an offloading has already been enabled in
1733 * rte_eth_dev_configure(), it has been enabled on all queues,
1734 * so there is no need to enable it in this queue again.
1735 * The local_conf.offloads input to underlying PMD only carries
1736 * those offloadings which are only enabled on this queue and
1737 * not enabled on all queues.
1739 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1742 * New added offloadings for this queue are those not enabled in
1743 * rte_eth_dev_configure() and they must be per-queue type.
1744 * A pure per-port offloading can't be enabled on a queue while
1745 * disabled on another queue. A pure per-port offloading can't
1746 * be enabled for any queue as new added one if it hasn't been
1747 * enabled in rte_eth_dev_configure().
1749 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1750 local_conf.offloads) {
1752 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1753 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1754 port_id, tx_queue_id, local_conf.offloads,
1755 dev_info.tx_queue_offload_capa,
1760 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1761 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1765 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1766 void *userdata __rte_unused)
1770 for (i = 0; i < unsent; i++)
1771 rte_pktmbuf_free(pkts[i]);
1775 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1778 uint64_t *count = userdata;
1781 for (i = 0; i < unsent; i++)
1782 rte_pktmbuf_free(pkts[i]);
1788 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1789 buffer_tx_error_fn cbfn, void *userdata)
1791 buffer->error_callback = cbfn;
1792 buffer->error_userdata = userdata;
1797 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1804 buffer->size = size;
1805 if (buffer->error_callback == NULL) {
1806 ret = rte_eth_tx_buffer_set_err_callback(
1807 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1814 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1816 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1819 /* Validate Input Data. Bail if not valid or not supported. */
1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1823 /* Call driver to free pending mbufs. */
1824 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1826 return eth_err(port_id, ret);
1830 rte_eth_promiscuous_enable(uint16_t port_id)
1832 struct rte_eth_dev *dev;
1834 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1835 dev = &rte_eth_devices[port_id];
1837 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1838 (*dev->dev_ops->promiscuous_enable)(dev);
1839 dev->data->promiscuous = 1;
1843 rte_eth_promiscuous_disable(uint16_t port_id)
1845 struct rte_eth_dev *dev;
1847 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1848 dev = &rte_eth_devices[port_id];
1850 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1851 dev->data->promiscuous = 0;
1852 (*dev->dev_ops->promiscuous_disable)(dev);
1856 rte_eth_promiscuous_get(uint16_t port_id)
1858 struct rte_eth_dev *dev;
1860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1862 dev = &rte_eth_devices[port_id];
1863 return dev->data->promiscuous;
1867 rte_eth_allmulticast_enable(uint16_t port_id)
1869 struct rte_eth_dev *dev;
1871 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1872 dev = &rte_eth_devices[port_id];
1874 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1875 (*dev->dev_ops->allmulticast_enable)(dev);
1876 dev->data->all_multicast = 1;
1880 rte_eth_allmulticast_disable(uint16_t port_id)
1882 struct rte_eth_dev *dev;
1884 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1885 dev = &rte_eth_devices[port_id];
1887 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1888 dev->data->all_multicast = 0;
1889 (*dev->dev_ops->allmulticast_disable)(dev);
1893 rte_eth_allmulticast_get(uint16_t port_id)
1895 struct rte_eth_dev *dev;
1897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1899 dev = &rte_eth_devices[port_id];
1900 return dev->data->all_multicast;
1904 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1906 struct rte_eth_dev *dev;
1908 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1909 dev = &rte_eth_devices[port_id];
1911 if (dev->data->dev_conf.intr_conf.lsc &&
1912 dev->data->dev_started)
1913 rte_eth_linkstatus_get(dev, eth_link);
1915 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1916 (*dev->dev_ops->link_update)(dev, 1);
1917 *eth_link = dev->data->dev_link;
1922 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1924 struct rte_eth_dev *dev;
1926 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1927 dev = &rte_eth_devices[port_id];
1929 if (dev->data->dev_conf.intr_conf.lsc &&
1930 dev->data->dev_started)
1931 rte_eth_linkstatus_get(dev, eth_link);
1933 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1934 (*dev->dev_ops->link_update)(dev, 0);
1935 *eth_link = dev->data->dev_link;
1940 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1942 struct rte_eth_dev *dev;
1944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1946 dev = &rte_eth_devices[port_id];
1947 memset(stats, 0, sizeof(*stats));
1949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1950 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1951 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1955 rte_eth_stats_reset(uint16_t port_id)
1957 struct rte_eth_dev *dev;
1959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1960 dev = &rte_eth_devices[port_id];
1962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1963 (*dev->dev_ops->stats_reset)(dev);
1964 dev->data->rx_mbuf_alloc_failed = 0;
1970 get_xstats_basic_count(struct rte_eth_dev *dev)
1972 uint16_t nb_rxqs, nb_txqs;
1975 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1976 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1978 count = RTE_NB_STATS;
1979 count += nb_rxqs * RTE_NB_RXQ_STATS;
1980 count += nb_txqs * RTE_NB_TXQ_STATS;
1986 get_xstats_count(uint16_t port_id)
1988 struct rte_eth_dev *dev;
1991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1992 dev = &rte_eth_devices[port_id];
1993 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1994 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1997 return eth_err(port_id, count);
1999 if (dev->dev_ops->xstats_get_names != NULL) {
2000 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2002 return eth_err(port_id, count);
2007 count += get_xstats_basic_count(dev);
2013 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2016 int cnt_xstats, idx_xstat;
2018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2021 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2026 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2031 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2032 if (cnt_xstats < 0) {
2033 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2037 /* Get id-name lookup table */
2038 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2040 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2041 port_id, xstats_names, cnt_xstats, NULL)) {
2042 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2046 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2047 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2056 /* retrieve basic stats names */
2058 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2059 struct rte_eth_xstat_name *xstats_names)
2061 int cnt_used_entries = 0;
2062 uint32_t idx, id_queue;
2065 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2066 snprintf(xstats_names[cnt_used_entries].name,
2067 sizeof(xstats_names[0].name),
2068 "%s", rte_stats_strings[idx].name);
2071 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2072 for (id_queue = 0; id_queue < num_q; id_queue++) {
2073 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2074 snprintf(xstats_names[cnt_used_entries].name,
2075 sizeof(xstats_names[0].name),
2077 id_queue, rte_rxq_stats_strings[idx].name);
2082 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2083 for (id_queue = 0; id_queue < num_q; id_queue++) {
2084 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2085 snprintf(xstats_names[cnt_used_entries].name,
2086 sizeof(xstats_names[0].name),
2088 id_queue, rte_txq_stats_strings[idx].name);
2092 return cnt_used_entries;
2095 /* retrieve ethdev extended statistics names */
2097 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2098 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2101 struct rte_eth_xstat_name *xstats_names_copy;
2102 unsigned int no_basic_stat_requested = 1;
2103 unsigned int no_ext_stat_requested = 1;
2104 unsigned int expected_entries;
2105 unsigned int basic_count;
2106 struct rte_eth_dev *dev;
2110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2111 dev = &rte_eth_devices[port_id];
2113 basic_count = get_xstats_basic_count(dev);
2114 ret = get_xstats_count(port_id);
2117 expected_entries = (unsigned int)ret;
2119 /* Return max number of stats if no ids given */
2122 return expected_entries;
2123 else if (xstats_names && size < expected_entries)
2124 return expected_entries;
2127 if (ids && !xstats_names)
2130 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2131 uint64_t ids_copy[size];
2133 for (i = 0; i < size; i++) {
2134 if (ids[i] < basic_count) {
2135 no_basic_stat_requested = 0;
2140 * Convert ids to xstats ids that PMD knows.
2141 * ids known by user are basic + extended stats.
2143 ids_copy[i] = ids[i] - basic_count;
2146 if (no_basic_stat_requested)
2147 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2148 xstats_names, ids_copy, size);
2151 /* Retrieve all stats */
2153 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2155 if (num_stats < 0 || num_stats > (int)expected_entries)
2158 return expected_entries;
2161 xstats_names_copy = calloc(expected_entries,
2162 sizeof(struct rte_eth_xstat_name));
2164 if (!xstats_names_copy) {
2165 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2170 for (i = 0; i < size; i++) {
2171 if (ids[i] >= basic_count) {
2172 no_ext_stat_requested = 0;
2178 /* Fill xstats_names_copy structure */
2179 if (ids && no_ext_stat_requested) {
2180 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2182 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2185 free(xstats_names_copy);
2191 for (i = 0; i < size; i++) {
2192 if (ids[i] >= expected_entries) {
2193 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2194 free(xstats_names_copy);
2197 xstats_names[i] = xstats_names_copy[ids[i]];
2200 free(xstats_names_copy);
2205 rte_eth_xstats_get_names(uint16_t port_id,
2206 struct rte_eth_xstat_name *xstats_names,
2209 struct rte_eth_dev *dev;
2210 int cnt_used_entries;
2211 int cnt_expected_entries;
2212 int cnt_driver_entries;
2214 cnt_expected_entries = get_xstats_count(port_id);
2215 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2216 (int)size < cnt_expected_entries)
2217 return cnt_expected_entries;
2219 /* port_id checked in get_xstats_count() */
2220 dev = &rte_eth_devices[port_id];
2222 cnt_used_entries = rte_eth_basic_stats_get_names(
2225 if (dev->dev_ops->xstats_get_names != NULL) {
2226 /* If there are any driver-specific xstats, append them
2229 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2231 xstats_names + cnt_used_entries,
2232 size - cnt_used_entries);
2233 if (cnt_driver_entries < 0)
2234 return eth_err(port_id, cnt_driver_entries);
2235 cnt_used_entries += cnt_driver_entries;
2238 return cnt_used_entries;
2243 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2245 struct rte_eth_dev *dev;
2246 struct rte_eth_stats eth_stats;
2247 unsigned int count = 0, i, q;
2248 uint64_t val, *stats_ptr;
2249 uint16_t nb_rxqs, nb_txqs;
2252 ret = rte_eth_stats_get(port_id, ð_stats);
2256 dev = &rte_eth_devices[port_id];
2258 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2259 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2262 for (i = 0; i < RTE_NB_STATS; i++) {
2263 stats_ptr = RTE_PTR_ADD(ð_stats,
2264 rte_stats_strings[i].offset);
2266 xstats[count++].value = val;
2270 for (q = 0; q < nb_rxqs; q++) {
2271 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2272 stats_ptr = RTE_PTR_ADD(ð_stats,
2273 rte_rxq_stats_strings[i].offset +
2274 q * sizeof(uint64_t));
2276 xstats[count++].value = val;
2281 for (q = 0; q < nb_txqs; q++) {
2282 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2283 stats_ptr = RTE_PTR_ADD(ð_stats,
2284 rte_txq_stats_strings[i].offset +
2285 q * sizeof(uint64_t));
2287 xstats[count++].value = val;
2293 /* retrieve ethdev extended statistics */
2295 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2296 uint64_t *values, unsigned int size)
2298 unsigned int no_basic_stat_requested = 1;
2299 unsigned int no_ext_stat_requested = 1;
2300 unsigned int num_xstats_filled;
2301 unsigned int basic_count;
2302 uint16_t expected_entries;
2303 struct rte_eth_dev *dev;
2307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2308 ret = get_xstats_count(port_id);
2311 expected_entries = (uint16_t)ret;
2312 struct rte_eth_xstat xstats[expected_entries];
2313 dev = &rte_eth_devices[port_id];
2314 basic_count = get_xstats_basic_count(dev);
2316 /* Return max number of stats if no ids given */
2319 return expected_entries;
2320 else if (values && size < expected_entries)
2321 return expected_entries;
2327 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2328 unsigned int basic_count = get_xstats_basic_count(dev);
2329 uint64_t ids_copy[size];
2331 for (i = 0; i < size; i++) {
2332 if (ids[i] < basic_count) {
2333 no_basic_stat_requested = 0;
2338 * Convert ids to xstats ids that PMD knows.
2339 * ids known by user are basic + extended stats.
2341 ids_copy[i] = ids[i] - basic_count;
2344 if (no_basic_stat_requested)
2345 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2350 for (i = 0; i < size; i++) {
2351 if (ids[i] >= basic_count) {
2352 no_ext_stat_requested = 0;
2358 /* Fill the xstats structure */
2359 if (ids && no_ext_stat_requested)
2360 ret = rte_eth_basic_stats_get(port_id, xstats);
2362 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2366 num_xstats_filled = (unsigned int)ret;
2368 /* Return all stats */
2370 for (i = 0; i < num_xstats_filled; i++)
2371 values[i] = xstats[i].value;
2372 return expected_entries;
2376 for (i = 0; i < size; i++) {
2377 if (ids[i] >= expected_entries) {
2378 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2381 values[i] = xstats[ids[i]].value;
2387 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2390 struct rte_eth_dev *dev;
2391 unsigned int count = 0, i;
2392 signed int xcount = 0;
2393 uint16_t nb_rxqs, nb_txqs;
2396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2398 dev = &rte_eth_devices[port_id];
2400 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2401 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2403 /* Return generic statistics */
2404 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2405 (nb_txqs * RTE_NB_TXQ_STATS);
2407 /* implemented by the driver */
2408 if (dev->dev_ops->xstats_get != NULL) {
2409 /* Retrieve the xstats from the driver at the end of the
2412 xcount = (*dev->dev_ops->xstats_get)(dev,
2413 xstats ? xstats + count : NULL,
2414 (n > count) ? n - count : 0);
2417 return eth_err(port_id, xcount);
2420 if (n < count + xcount || xstats == NULL)
2421 return count + xcount;
2423 /* now fill the xstats structure */
2424 ret = rte_eth_basic_stats_get(port_id, xstats);
2429 for (i = 0; i < count; i++)
2431 /* add an offset to driver-specific stats */
2432 for ( ; i < count + xcount; i++)
2433 xstats[i].id += count;
2435 return count + xcount;
2438 /* reset ethdev extended statistics */
2440 rte_eth_xstats_reset(uint16_t port_id)
2442 struct rte_eth_dev *dev;
2444 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2445 dev = &rte_eth_devices[port_id];
2447 /* implemented by the driver */
2448 if (dev->dev_ops->xstats_reset != NULL) {
2449 (*dev->dev_ops->xstats_reset)(dev);
2453 /* fallback to default */
2454 rte_eth_stats_reset(port_id);
2458 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2461 struct rte_eth_dev *dev;
2463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2465 dev = &rte_eth_devices[port_id];
2467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2469 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2472 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2475 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2478 return (*dev->dev_ops->queue_stats_mapping_set)
2479 (dev, queue_id, stat_idx, is_rx);
2484 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2487 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2488 stat_idx, STAT_QMAP_TX));
2493 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2496 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2497 stat_idx, STAT_QMAP_RX));
2501 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2503 struct rte_eth_dev *dev;
2505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2506 dev = &rte_eth_devices[port_id];
2508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2509 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2510 fw_version, fw_size));
2514 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2516 struct rte_eth_dev *dev;
2517 const struct rte_eth_desc_lim lim = {
2518 .nb_max = UINT16_MAX,
2523 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2524 dev = &rte_eth_devices[port_id];
2526 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2527 dev_info->rx_desc_lim = lim;
2528 dev_info->tx_desc_lim = lim;
2529 dev_info->device = dev->device;
2531 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2532 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2533 dev_info->driver_name = dev->device->driver->name;
2534 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2535 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2537 dev_info->dev_flags = &dev->data->dev_flags;
2541 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2542 uint32_t *ptypes, int num)
2545 struct rte_eth_dev *dev;
2546 const uint32_t *all_ptypes;
2548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2549 dev = &rte_eth_devices[port_id];
2550 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2551 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2556 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2557 if (all_ptypes[i] & ptype_mask) {
2559 ptypes[j] = all_ptypes[i];
2567 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2569 struct rte_eth_dev *dev;
2571 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2572 dev = &rte_eth_devices[port_id];
2573 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2578 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2580 struct rte_eth_dev *dev;
2582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2584 dev = &rte_eth_devices[port_id];
2585 *mtu = dev->data->mtu;
2590 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2593 struct rte_eth_dev *dev;
2595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2596 dev = &rte_eth_devices[port_id];
2597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2599 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2601 dev->data->mtu = mtu;
2603 return eth_err(port_id, ret);
2607 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2609 struct rte_eth_dev *dev;
2612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2614 if (!(dev->data->dev_conf.rxmode.offloads &
2615 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2616 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2621 if (vlan_id > 4095) {
2622 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2626 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2628 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2630 struct rte_vlan_filter_conf *vfc;
2634 vfc = &dev->data->vlan_filter_conf;
2635 vidx = vlan_id / 64;
2636 vbit = vlan_id % 64;
2639 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2641 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2644 return eth_err(port_id, ret);
2648 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2651 struct rte_eth_dev *dev;
2653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2654 dev = &rte_eth_devices[port_id];
2655 if (rx_queue_id >= dev->data->nb_rx_queues) {
2656 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2661 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2667 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2668 enum rte_vlan_type vlan_type,
2671 struct rte_eth_dev *dev;
2673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2674 dev = &rte_eth_devices[port_id];
2675 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2677 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2682 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2684 struct rte_eth_dev *dev;
2688 uint64_t orig_offloads;
2690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2691 dev = &rte_eth_devices[port_id];
2693 /* save original values in case of failure */
2694 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2696 /*check which option changed by application*/
2697 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2698 org = !!(dev->data->dev_conf.rxmode.offloads &
2699 DEV_RX_OFFLOAD_VLAN_STRIP);
2702 dev->data->dev_conf.rxmode.offloads |=
2703 DEV_RX_OFFLOAD_VLAN_STRIP;
2705 dev->data->dev_conf.rxmode.offloads &=
2706 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2707 mask |= ETH_VLAN_STRIP_MASK;
2710 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2711 org = !!(dev->data->dev_conf.rxmode.offloads &
2712 DEV_RX_OFFLOAD_VLAN_FILTER);
2715 dev->data->dev_conf.rxmode.offloads |=
2716 DEV_RX_OFFLOAD_VLAN_FILTER;
2718 dev->data->dev_conf.rxmode.offloads &=
2719 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2720 mask |= ETH_VLAN_FILTER_MASK;
2723 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2724 org = !!(dev->data->dev_conf.rxmode.offloads &
2725 DEV_RX_OFFLOAD_VLAN_EXTEND);
2728 dev->data->dev_conf.rxmode.offloads |=
2729 DEV_RX_OFFLOAD_VLAN_EXTEND;
2731 dev->data->dev_conf.rxmode.offloads &=
2732 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2733 mask |= ETH_VLAN_EXTEND_MASK;
2740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2741 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2743 /* hit an error restore original values */
2744 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2747 return eth_err(port_id, ret);
2751 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2753 struct rte_eth_dev *dev;
2756 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2757 dev = &rte_eth_devices[port_id];
2759 if (dev->data->dev_conf.rxmode.offloads &
2760 DEV_RX_OFFLOAD_VLAN_STRIP)
2761 ret |= ETH_VLAN_STRIP_OFFLOAD;
2763 if (dev->data->dev_conf.rxmode.offloads &
2764 DEV_RX_OFFLOAD_VLAN_FILTER)
2765 ret |= ETH_VLAN_FILTER_OFFLOAD;
2767 if (dev->data->dev_conf.rxmode.offloads &
2768 DEV_RX_OFFLOAD_VLAN_EXTEND)
2769 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2775 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2777 struct rte_eth_dev *dev;
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 dev = &rte_eth_devices[port_id];
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2783 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2787 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2789 struct rte_eth_dev *dev;
2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2792 dev = &rte_eth_devices[port_id];
2793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2794 memset(fc_conf, 0, sizeof(*fc_conf));
2795 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2799 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2801 struct rte_eth_dev *dev;
2803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2805 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2809 dev = &rte_eth_devices[port_id];
2810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2811 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2815 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2816 struct rte_eth_pfc_conf *pfc_conf)
2818 struct rte_eth_dev *dev;
2820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2821 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2822 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2826 dev = &rte_eth_devices[port_id];
2827 /* High water, low water validation are device specific */
2828 if (*dev->dev_ops->priority_flow_ctrl_set)
2829 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2835 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2843 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2844 for (i = 0; i < num; i++) {
2845 if (reta_conf[i].mask)
2853 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2857 uint16_t i, idx, shift;
2863 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2867 for (i = 0; i < reta_size; i++) {
2868 idx = i / RTE_RETA_GROUP_SIZE;
2869 shift = i % RTE_RETA_GROUP_SIZE;
2870 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2871 (reta_conf[idx].reta[shift] >= max_rxq)) {
2873 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2875 reta_conf[idx].reta[shift], max_rxq);
2884 rte_eth_dev_rss_reta_update(uint16_t port_id,
2885 struct rte_eth_rss_reta_entry64 *reta_conf,
2888 struct rte_eth_dev *dev;
2891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2892 /* Check mask bits */
2893 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2897 dev = &rte_eth_devices[port_id];
2899 /* Check entry value */
2900 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2901 dev->data->nb_rx_queues);
2905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2906 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2911 rte_eth_dev_rss_reta_query(uint16_t port_id,
2912 struct rte_eth_rss_reta_entry64 *reta_conf,
2915 struct rte_eth_dev *dev;
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2920 /* Check mask bits */
2921 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2925 dev = &rte_eth_devices[port_id];
2926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2927 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2932 rte_eth_dev_rss_hash_update(uint16_t port_id,
2933 struct rte_eth_rss_conf *rss_conf)
2935 struct rte_eth_dev *dev;
2936 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2939 dev = &rte_eth_devices[port_id];
2940 rte_eth_dev_info_get(port_id, &dev_info);
2941 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2942 dev_info.flow_type_rss_offloads) {
2944 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2945 port_id, rss_conf->rss_hf,
2946 dev_info.flow_type_rss_offloads);
2949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2950 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2955 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2956 struct rte_eth_rss_conf *rss_conf)
2958 struct rte_eth_dev *dev;
2960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2961 dev = &rte_eth_devices[port_id];
2962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2963 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2968 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2969 struct rte_eth_udp_tunnel *udp_tunnel)
2971 struct rte_eth_dev *dev;
2973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2974 if (udp_tunnel == NULL) {
2975 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2979 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2980 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2984 dev = &rte_eth_devices[port_id];
2985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2986 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2991 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2992 struct rte_eth_udp_tunnel *udp_tunnel)
2994 struct rte_eth_dev *dev;
2996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2997 dev = &rte_eth_devices[port_id];
2999 if (udp_tunnel == NULL) {
3000 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3004 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3005 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3010 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3015 rte_eth_led_on(uint16_t port_id)
3017 struct rte_eth_dev *dev;
3019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3020 dev = &rte_eth_devices[port_id];
3021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3022 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3026 rte_eth_led_off(uint16_t port_id)
3028 struct rte_eth_dev *dev;
3030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3031 dev = &rte_eth_devices[port_id];
3032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3033 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3037 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3041 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3043 struct rte_eth_dev_info dev_info;
3044 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3048 rte_eth_dev_info_get(port_id, &dev_info);
3050 for (i = 0; i < dev_info.max_mac_addrs; i++)
3051 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3057 static const struct ether_addr null_mac_addr;
3060 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3063 struct rte_eth_dev *dev;
3068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3069 dev = &rte_eth_devices[port_id];
3070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3072 if (is_zero_ether_addr(addr)) {
3073 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3077 if (pool >= ETH_64_POOLS) {
3078 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3082 index = get_mac_addr_index(port_id, addr);
3084 index = get_mac_addr_index(port_id, &null_mac_addr);
3086 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3091 pool_mask = dev->data->mac_pool_sel[index];
3093 /* Check if both MAC address and pool is already there, and do nothing */
3094 if (pool_mask & (1ULL << pool))
3099 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3102 /* Update address in NIC data structure */
3103 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3105 /* Update pool bitmap in NIC data structure */
3106 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3109 return eth_err(port_id, ret);
3113 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3115 struct rte_eth_dev *dev;
3118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 dev = &rte_eth_devices[port_id];
3120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3122 index = get_mac_addr_index(port_id, addr);
3125 "Port %u: Cannot remove default MAC address\n",
3128 } else if (index < 0)
3129 return 0; /* Do nothing if address wasn't found */
3132 (*dev->dev_ops->mac_addr_remove)(dev, index);
3134 /* Update address in NIC data structure */
3135 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3137 /* reset pool bitmap */
3138 dev->data->mac_pool_sel[index] = 0;
3144 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3146 struct rte_eth_dev *dev;
3149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3151 if (!is_valid_assigned_ether_addr(addr))
3154 dev = &rte_eth_devices[port_id];
3155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3157 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3161 /* Update default address in NIC data structure */
3162 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3169 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3173 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3175 struct rte_eth_dev_info dev_info;
3176 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3179 rte_eth_dev_info_get(port_id, &dev_info);
3180 if (!dev->data->hash_mac_addrs)
3183 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3184 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3185 ETHER_ADDR_LEN) == 0)
3192 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3197 struct rte_eth_dev *dev;
3199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3201 dev = &rte_eth_devices[port_id];
3202 if (is_zero_ether_addr(addr)) {
3203 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3208 index = get_hash_mac_addr_index(port_id, addr);
3209 /* Check if it's already there, and do nothing */
3210 if ((index >= 0) && on)
3216 "Port %u: the MAC address was not set in UTA\n",
3221 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3223 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3230 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3232 /* Update address in NIC data structure */
3234 ether_addr_copy(addr,
3235 &dev->data->hash_mac_addrs[index]);
3237 ether_addr_copy(&null_mac_addr,
3238 &dev->data->hash_mac_addrs[index]);
3241 return eth_err(port_id, ret);
3245 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3247 struct rte_eth_dev *dev;
3249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3251 dev = &rte_eth_devices[port_id];
3253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3254 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3258 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3261 struct rte_eth_dev *dev;
3262 struct rte_eth_dev_info dev_info;
3263 struct rte_eth_link link;
3265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3267 dev = &rte_eth_devices[port_id];
3268 rte_eth_dev_info_get(port_id, &dev_info);
3269 link = dev->data->dev_link;
3271 if (queue_idx > dev_info.max_tx_queues) {
3273 "Set queue rate limit:port %u: invalid queue id=%u\n",
3274 port_id, queue_idx);
3278 if (tx_rate > link.link_speed) {
3280 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3281 tx_rate, link.link_speed);
3285 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3286 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3287 queue_idx, tx_rate));
3291 rte_eth_mirror_rule_set(uint16_t port_id,
3292 struct rte_eth_mirror_conf *mirror_conf,
3293 uint8_t rule_id, uint8_t on)
3295 struct rte_eth_dev *dev;
3297 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3298 if (mirror_conf->rule_type == 0) {
3299 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3303 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3304 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3309 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3310 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3311 (mirror_conf->pool_mask == 0)) {
3313 "Invalid mirror pool, pool mask can not be 0\n");
3317 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3318 mirror_conf->vlan.vlan_mask == 0) {
3320 "Invalid vlan mask, vlan mask can not be 0\n");
3324 dev = &rte_eth_devices[port_id];
3325 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3327 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3328 mirror_conf, rule_id, on));
3332 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3334 struct rte_eth_dev *dev;
3336 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3338 dev = &rte_eth_devices[port_id];
3339 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3341 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3345 RTE_INIT(eth_dev_init_cb_lists)
3349 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3350 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3354 rte_eth_dev_callback_register(uint16_t port_id,
3355 enum rte_eth_event_type event,
3356 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3358 struct rte_eth_dev *dev;
3359 struct rte_eth_dev_callback *user_cb;
3360 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3366 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3367 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3371 if (port_id == RTE_ETH_ALL) {
3373 last_port = RTE_MAX_ETHPORTS - 1;
3375 next_port = last_port = port_id;
3378 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3381 dev = &rte_eth_devices[next_port];
3383 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3384 if (user_cb->cb_fn == cb_fn &&
3385 user_cb->cb_arg == cb_arg &&
3386 user_cb->event == event) {
3391 /* create a new callback. */
3392 if (user_cb == NULL) {
3393 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3394 sizeof(struct rte_eth_dev_callback), 0);
3395 if (user_cb != NULL) {
3396 user_cb->cb_fn = cb_fn;
3397 user_cb->cb_arg = cb_arg;
3398 user_cb->event = event;
3399 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3402 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3403 rte_eth_dev_callback_unregister(port_id, event,
3409 } while (++next_port <= last_port);
3411 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3416 rte_eth_dev_callback_unregister(uint16_t port_id,
3417 enum rte_eth_event_type event,
3418 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3421 struct rte_eth_dev *dev;
3422 struct rte_eth_dev_callback *cb, *next;
3423 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3429 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3430 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3434 if (port_id == RTE_ETH_ALL) {
3436 last_port = RTE_MAX_ETHPORTS - 1;
3438 next_port = last_port = port_id;
3441 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3444 dev = &rte_eth_devices[next_port];
3446 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3449 next = TAILQ_NEXT(cb, next);
3451 if (cb->cb_fn != cb_fn || cb->event != event ||
3452 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3456 * if this callback is not executing right now,
3459 if (cb->active == 0) {
3460 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3466 } while (++next_port <= last_port);
3468 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3473 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3474 enum rte_eth_event_type event, void *ret_param)
3476 struct rte_eth_dev_callback *cb_lst;
3477 struct rte_eth_dev_callback dev_cb;
3480 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3481 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3482 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3486 if (ret_param != NULL)
3487 dev_cb.ret_param = ret_param;
3489 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3490 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3491 dev_cb.cb_arg, dev_cb.ret_param);
3492 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3495 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3500 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3505 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3507 dev->state = RTE_ETH_DEV_ATTACHED;
3511 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3514 struct rte_eth_dev *dev;
3515 struct rte_intr_handle *intr_handle;
3519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3521 dev = &rte_eth_devices[port_id];
3523 if (!dev->intr_handle) {
3524 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3528 intr_handle = dev->intr_handle;
3529 if (!intr_handle->intr_vec) {
3530 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3534 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3535 vec = intr_handle->intr_vec[qid];
3536 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3537 if (rc && rc != -EEXIST) {
3539 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3540 port_id, qid, op, epfd, vec);
3547 int __rte_experimental
3548 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3550 struct rte_intr_handle *intr_handle;
3551 struct rte_eth_dev *dev;
3552 unsigned int efd_idx;
3556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3558 dev = &rte_eth_devices[port_id];
3560 if (queue_id >= dev->data->nb_rx_queues) {
3561 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3565 if (!dev->intr_handle) {
3566 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3570 intr_handle = dev->intr_handle;
3571 if (!intr_handle->intr_vec) {
3572 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3576 vec = intr_handle->intr_vec[queue_id];
3577 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3578 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3579 fd = intr_handle->efds[efd_idx];
3584 const struct rte_memzone *
3585 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3586 uint16_t queue_id, size_t size, unsigned align,
3589 char z_name[RTE_MEMZONE_NAMESIZE];
3590 const struct rte_memzone *mz;
3592 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3593 dev->data->port_id, queue_id, ring_name);
3595 mz = rte_memzone_lookup(z_name);
3599 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3600 RTE_MEMZONE_IOVA_CONTIG, align);
3603 int __rte_experimental
3604 rte_eth_dev_create(struct rte_device *device, const char *name,
3605 size_t priv_data_size,
3606 ethdev_bus_specific_init ethdev_bus_specific_init,
3607 void *bus_init_params,
3608 ethdev_init_t ethdev_init, void *init_params)
3610 struct rte_eth_dev *ethdev;
3613 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3615 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3616 ethdev = rte_eth_dev_allocate(name);
3620 if (priv_data_size) {
3621 ethdev->data->dev_private = rte_zmalloc_socket(
3622 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3625 if (!ethdev->data->dev_private) {
3626 RTE_LOG(ERR, EAL, "failed to allocate private data");
3632 ethdev = rte_eth_dev_attach_secondary(name);
3634 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3635 "ethdev doesn't exist");
3640 ethdev->device = device;
3642 if (ethdev_bus_specific_init) {
3643 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3646 "ethdev bus specific initialisation failed");
3651 retval = ethdev_init(ethdev, init_params);
3653 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3657 rte_eth_dev_probing_finish(ethdev);
3662 rte_eth_dev_release_port(ethdev);
3666 int __rte_experimental
3667 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3668 ethdev_uninit_t ethdev_uninit)
3672 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3676 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3678 ret = ethdev_uninit(ethdev);
3682 return rte_eth_dev_release_port(ethdev);
3686 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3687 int epfd, int op, void *data)
3690 struct rte_eth_dev *dev;
3691 struct rte_intr_handle *intr_handle;
3694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3696 dev = &rte_eth_devices[port_id];
3697 if (queue_id >= dev->data->nb_rx_queues) {
3698 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3702 if (!dev->intr_handle) {
3703 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3707 intr_handle = dev->intr_handle;
3708 if (!intr_handle->intr_vec) {
3709 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3713 vec = intr_handle->intr_vec[queue_id];
3714 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3715 if (rc && rc != -EEXIST) {
3717 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3718 port_id, queue_id, op, epfd, vec);
3726 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3729 struct rte_eth_dev *dev;
3731 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3733 dev = &rte_eth_devices[port_id];
3735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3736 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3741 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3744 struct rte_eth_dev *dev;
3746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3748 dev = &rte_eth_devices[port_id];
3750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3751 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3757 rte_eth_dev_filter_supported(uint16_t port_id,
3758 enum rte_filter_type filter_type)
3760 struct rte_eth_dev *dev;
3762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3764 dev = &rte_eth_devices[port_id];
3765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3766 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3767 RTE_ETH_FILTER_NOP, NULL);
3771 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3772 enum rte_filter_op filter_op, void *arg)
3774 struct rte_eth_dev *dev;
3776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3778 dev = &rte_eth_devices[port_id];
3779 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3780 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3784 const struct rte_eth_rxtx_callback *
3785 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3786 rte_rx_callback_fn fn, void *user_param)
3788 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3789 rte_errno = ENOTSUP;
3792 /* check input parameters */
3793 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3794 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3798 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3806 cb->param = user_param;
3808 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3809 /* Add the callbacks in fifo order. */
3810 struct rte_eth_rxtx_callback *tail =
3811 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3814 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3821 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3826 const struct rte_eth_rxtx_callback *
3827 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3828 rte_rx_callback_fn fn, void *user_param)
3830 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3831 rte_errno = ENOTSUP;
3834 /* check input parameters */
3835 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3836 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3841 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3849 cb->param = user_param;
3851 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3852 /* Add the callbacks at fisrt position*/
3853 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3855 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3856 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3861 const struct rte_eth_rxtx_callback *
3862 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3863 rte_tx_callback_fn fn, void *user_param)
3865 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3866 rte_errno = ENOTSUP;
3869 /* check input parameters */
3870 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3871 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3876 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3884 cb->param = user_param;
3886 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3887 /* Add the callbacks in fifo order. */
3888 struct rte_eth_rxtx_callback *tail =
3889 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3892 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3899 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3905 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3906 const struct rte_eth_rxtx_callback *user_cb)
3908 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3911 /* Check input parameters. */
3912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3913 if (user_cb == NULL ||
3914 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3917 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3918 struct rte_eth_rxtx_callback *cb;
3919 struct rte_eth_rxtx_callback **prev_cb;
3922 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3923 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3924 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3926 if (cb == user_cb) {
3927 /* Remove the user cb from the callback list. */
3928 *prev_cb = cb->next;
3933 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3939 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3940 const struct rte_eth_rxtx_callback *user_cb)
3942 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3945 /* Check input parameters. */
3946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3947 if (user_cb == NULL ||
3948 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3951 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3953 struct rte_eth_rxtx_callback *cb;
3954 struct rte_eth_rxtx_callback **prev_cb;
3956 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3957 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3958 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3960 if (cb == user_cb) {
3961 /* Remove the user cb from the callback list. */
3962 *prev_cb = cb->next;
3967 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3973 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3974 struct rte_eth_rxq_info *qinfo)
3976 struct rte_eth_dev *dev;
3978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3983 dev = &rte_eth_devices[port_id];
3984 if (queue_id >= dev->data->nb_rx_queues) {
3985 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3991 memset(qinfo, 0, sizeof(*qinfo));
3992 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3997 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3998 struct rte_eth_txq_info *qinfo)
4000 struct rte_eth_dev *dev;
4002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4007 dev = &rte_eth_devices[port_id];
4008 if (queue_id >= dev->data->nb_tx_queues) {
4009 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4015 memset(qinfo, 0, sizeof(*qinfo));
4016 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4022 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4023 struct ether_addr *mc_addr_set,
4024 uint32_t nb_mc_addr)
4026 struct rte_eth_dev *dev;
4028 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4030 dev = &rte_eth_devices[port_id];
4031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4032 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4033 mc_addr_set, nb_mc_addr));
4037 rte_eth_timesync_enable(uint16_t port_id)
4039 struct rte_eth_dev *dev;
4041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4042 dev = &rte_eth_devices[port_id];
4044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4045 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4049 rte_eth_timesync_disable(uint16_t port_id)
4051 struct rte_eth_dev *dev;
4053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4054 dev = &rte_eth_devices[port_id];
4056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4057 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4061 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4064 struct rte_eth_dev *dev;
4066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4067 dev = &rte_eth_devices[port_id];
4069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4070 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4071 (dev, timestamp, flags));
4075 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4076 struct timespec *timestamp)
4078 struct rte_eth_dev *dev;
4080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4081 dev = &rte_eth_devices[port_id];
4083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4084 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4089 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4091 struct rte_eth_dev *dev;
4093 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4094 dev = &rte_eth_devices[port_id];
4096 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4097 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4102 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4104 struct rte_eth_dev *dev;
4106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4107 dev = &rte_eth_devices[port_id];
4109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4110 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4115 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4117 struct rte_eth_dev *dev;
4119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4120 dev = &rte_eth_devices[port_id];
4122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4123 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4128 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4130 struct rte_eth_dev *dev;
4132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4134 dev = &rte_eth_devices[port_id];
4135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4136 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4140 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4142 struct rte_eth_dev *dev;
4144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4146 dev = &rte_eth_devices[port_id];
4147 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4148 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4152 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4154 struct rte_eth_dev *dev;
4156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4158 dev = &rte_eth_devices[port_id];
4159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4160 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4164 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4166 struct rte_eth_dev *dev;
4168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4170 dev = &rte_eth_devices[port_id];
4171 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4172 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4175 int __rte_experimental
4176 rte_eth_dev_get_module_info(uint16_t port_id,
4177 struct rte_eth_dev_module_info *modinfo)
4179 struct rte_eth_dev *dev;
4181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4183 dev = &rte_eth_devices[port_id];
4184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4185 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4188 int __rte_experimental
4189 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4190 struct rte_dev_eeprom_info *info)
4192 struct rte_eth_dev *dev;
4194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4196 dev = &rte_eth_devices[port_id];
4197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4198 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4202 rte_eth_dev_get_dcb_info(uint16_t port_id,
4203 struct rte_eth_dcb_info *dcb_info)
4205 struct rte_eth_dev *dev;
4207 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4209 dev = &rte_eth_devices[port_id];
4210 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4213 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4217 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4218 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4220 struct rte_eth_dev *dev;
4222 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4223 if (l2_tunnel == NULL) {
4224 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4228 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4229 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4233 dev = &rte_eth_devices[port_id];
4234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4236 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4241 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4242 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4246 struct rte_eth_dev *dev;
4248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4250 if (l2_tunnel == NULL) {
4251 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4255 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4256 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4261 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4265 dev = &rte_eth_devices[port_id];
4266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4268 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4269 l2_tunnel, mask, en));
4273 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4274 const struct rte_eth_desc_lim *desc_lim)
4276 if (desc_lim->nb_align != 0)
4277 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4279 if (desc_lim->nb_max != 0)
4280 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4282 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4286 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4287 uint16_t *nb_rx_desc,
4288 uint16_t *nb_tx_desc)
4290 struct rte_eth_dev *dev;
4291 struct rte_eth_dev_info dev_info;
4293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4295 dev = &rte_eth_devices[port_id];
4296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4298 rte_eth_dev_info_get(port_id, &dev_info);
4300 if (nb_rx_desc != NULL)
4301 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4303 if (nb_tx_desc != NULL)
4304 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4310 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4312 struct rte_eth_dev *dev;
4314 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4319 dev = &rte_eth_devices[port_id];
4321 if (*dev->dev_ops->pool_ops_supported == NULL)
4322 return 1; /* all pools are supported */
4324 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4328 * A set of values to describe the possible states of a switch domain.
4330 enum rte_eth_switch_domain_state {
4331 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4332 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4336 * Array of switch domains available for allocation. Array is sized to
4337 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4338 * ethdev ports in a single process.
4340 static struct rte_eth_dev_switch {
4341 enum rte_eth_switch_domain_state state;
4342 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4344 int __rte_experimental
4345 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4349 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4351 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4352 i < RTE_MAX_ETHPORTS; i++) {
4353 if (rte_eth_switch_domains[i].state ==
4354 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4355 rte_eth_switch_domains[i].state =
4356 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4365 int __rte_experimental
4366 rte_eth_switch_domain_free(uint16_t domain_id)
4368 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4369 domain_id >= RTE_MAX_ETHPORTS)
4372 if (rte_eth_switch_domains[domain_id].state !=
4373 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4376 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4382 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4385 struct rte_kvargs_pair *pair;
4388 arglist->str = strdup(str_in);
4389 if (arglist->str == NULL)
4392 letter = arglist->str;
4395 pair = &arglist->pairs[0];
4398 case 0: /* Initial */
4401 else if (*letter == '\0')
4408 case 1: /* Parsing key */
4409 if (*letter == '=') {
4411 pair->value = letter + 1;
4413 } else if (*letter == ',' || *letter == '\0')
4418 case 2: /* Parsing value */
4421 else if (*letter == ',') {
4424 pair = &arglist->pairs[arglist->count];
4426 } else if (*letter == '\0') {
4429 pair = &arglist->pairs[arglist->count];
4434 case 3: /* Parsing list */
4437 else if (*letter == '\0')
4445 int __rte_experimental
4446 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4448 struct rte_kvargs args;
4449 struct rte_kvargs_pair *pair;
4453 memset(eth_da, 0, sizeof(*eth_da));
4455 result = rte_eth_devargs_tokenise(&args, dargs);
4459 for (i = 0; i < args.count; i++) {
4460 pair = &args.pairs[i];
4461 if (strcmp("representor", pair->key) == 0) {
4462 result = rte_eth_devargs_parse_list(pair->value,
4463 rte_eth_devargs_parse_representor_ports,
4477 RTE_INIT(ethdev_init_log)
4479 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4480 if (rte_eth_dev_logtype >= 0)
4481 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);