1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 static int ethdev_logtype;
47 #define ethdev_log(level, fmt, ...) \
48 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
50 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
51 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 static uint16_t eth_dev_last_created_port;
54 /* spinlock for eth device callbacks */
55 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove rx callbacks */
58 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for add/remove tx callbacks */
61 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
63 /* spinlock for shared data allocation */
64 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* store statistics names and its offset in stats structure */
67 struct rte_eth_xstats_name_off {
68 char name[RTE_ETH_XSTATS_NAME_SIZE];
72 /* Shared memory between primary and secondary processes. */
74 uint64_t next_owner_id;
75 rte_spinlock_t ownership_lock;
76 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
77 } *rte_eth_dev_shared_data;
79 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
80 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
81 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
82 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
83 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
84 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
85 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
86 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
87 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
91 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
93 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
94 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
95 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
96 {"errors", offsetof(struct rte_eth_stats, q_errors)},
99 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
100 sizeof(rte_rxq_stats_strings[0]))
102 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
103 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
104 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
106 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
107 sizeof(rte_txq_stats_strings[0]))
109 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
110 { DEV_RX_OFFLOAD_##_name, #_name }
112 static const struct {
115 } rte_rx_offload_names[] = {
116 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
121 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
123 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
124 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
126 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
127 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
128 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
129 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
130 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
131 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
237 static struct rte_eth_dev *
238 _rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if (rte_eth_devices[i].data != NULL &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_allocated(const char *name)
253 struct rte_eth_dev *ethdev;
255 rte_eth_dev_shared_data_prepare();
257 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
259 ethdev = _rte_eth_dev_allocated(name);
261 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
267 rte_eth_dev_find_free_port(void)
271 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
272 /* Using shared name field to find a free port. */
273 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
274 RTE_ASSERT(rte_eth_devices[i].state ==
279 return RTE_MAX_ETHPORTS;
282 static struct rte_eth_dev *
283 eth_dev_get(uint16_t port_id)
285 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
287 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
289 eth_dev_last_created_port = port_id;
295 rte_eth_dev_allocate(const char *name)
298 struct rte_eth_dev *eth_dev = NULL;
300 rte_eth_dev_shared_data_prepare();
302 /* Synchronize port creation between primary and secondary threads. */
303 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
305 if (_rte_eth_dev_allocated(name) != NULL) {
306 ethdev_log(ERR, "Ethernet device with name %s already allocated",
311 port_id = rte_eth_dev_find_free_port();
312 if (port_id == RTE_MAX_ETHPORTS) {
313 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
371 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
373 eth_dev->state = RTE_ETH_DEV_UNUSED;
375 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
377 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
397 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016"PRIX64".\n", owner_id);
404 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
406 while (port_id < RTE_MAX_ETHPORTS &&
407 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
408 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
409 rte_eth_devices[port_id].data->owner.id != owner_id))
412 if (port_id >= RTE_MAX_ETHPORTS)
413 return RTE_MAX_ETHPORTS;
418 int __rte_experimental
419 rte_eth_dev_owner_new(uint64_t *owner_id)
421 rte_eth_dev_shared_data_prepare();
423 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
425 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
427 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
433 const struct rte_eth_dev_owner *new_owner)
435 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
436 struct rte_eth_dev_owner *port_owner;
439 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
440 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
444 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
445 !rte_eth_is_valid_owner_id(old_owner_id))
448 port_owner = &rte_eth_devices[port_id].data->owner;
449 if (port_owner->id != old_owner_id) {
450 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
451 " by %s_%016"PRIX64".\n", port_id,
452 port_owner->name, port_owner->id);
456 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
458 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
459 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
462 port_owner->id = new_owner->id;
464 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016"PRIX64".\n", port_id,
465 new_owner->name, new_owner->id);
470 int __rte_experimental
471 rte_eth_dev_owner_set(const uint16_t port_id,
472 const struct rte_eth_dev_owner *owner)
476 rte_eth_dev_shared_data_prepare();
478 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
480 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
482 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
486 int __rte_experimental
487 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
489 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
490 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
493 rte_eth_dev_shared_data_prepare();
495 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
497 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
499 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
503 void __rte_experimental
504 rte_eth_dev_owner_delete(const uint64_t owner_id)
508 rte_eth_dev_shared_data_prepare();
510 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
512 if (rte_eth_is_valid_owner_id(owner_id)) {
513 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
514 if (rte_eth_devices[port_id].data->owner.id == owner_id)
515 memset(&rte_eth_devices[port_id].data->owner, 0,
516 sizeof(struct rte_eth_dev_owner));
517 RTE_PMD_DEBUG_TRACE("All port owners owned by %016"PRIX64
518 " identifier have removed.\n", owner_id);
521 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
524 int __rte_experimental
525 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
528 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
530 rte_eth_dev_shared_data_prepare();
532 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
534 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
535 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
538 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
541 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
546 rte_eth_dev_socket_id(uint16_t port_id)
548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
549 return rte_eth_devices[port_id].data->numa_node;
553 rte_eth_dev_get_sec_ctx(uint16_t port_id)
555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
556 return rte_eth_devices[port_id].security_ctx;
560 rte_eth_dev_count(void)
562 return rte_eth_dev_count_avail();
566 rte_eth_dev_count_avail(void)
573 RTE_ETH_FOREACH_DEV(p)
579 uint16_t __rte_experimental
580 rte_eth_dev_count_total(void)
582 uint16_t port, count = 0;
584 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
585 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
592 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
599 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
603 /* shouldn't check 'rte_eth_devices[i].data',
604 * because it might be overwritten by VDEV PMD */
605 tmp = rte_eth_dev_shared_data->data[port_id].name;
611 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
616 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
620 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
621 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
622 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
632 eth_err(uint16_t port_id, int ret)
636 if (rte_eth_dev_is_removed(port_id))
641 /* attach the new device, then store port_id of the device */
643 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
645 int current = rte_eth_dev_count_total();
646 struct rte_devargs da;
649 memset(&da, 0, sizeof(da));
651 if ((devargs == NULL) || (port_id == NULL)) {
657 if (rte_devargs_parse(&da, "%s", devargs))
660 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
664 /* no point looking at the port count if no port exists */
665 if (!rte_eth_dev_count_total()) {
666 ethdev_log(ERR, "No port found for device (%s)", da.name);
671 /* if nothing happened, there is a bug here, since some driver told us
672 * it did attach a device, but did not create a port.
673 * FIXME: race condition in case of plug-out of another device
675 if (current == rte_eth_dev_count_total()) {
680 *port_id = eth_dev_last_created_port;
688 /* detach the device, then store the name of the device */
690 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
692 struct rte_device *dev;
697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
699 dev_flags = rte_eth_devices[port_id].data->dev_flags;
700 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
702 "Port %" PRIu16 " is bonded, cannot detach", port_id);
706 dev = rte_eth_devices[port_id].device;
710 bus = rte_bus_find_by_device(dev);
714 ret = rte_eal_hotplug_remove(bus->name, dev->name);
718 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
723 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
725 uint16_t old_nb_queues = dev->data->nb_rx_queues;
729 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
730 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
731 sizeof(dev->data->rx_queues[0]) * nb_queues,
732 RTE_CACHE_LINE_SIZE);
733 if (dev->data->rx_queues == NULL) {
734 dev->data->nb_rx_queues = 0;
737 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
740 rxq = dev->data->rx_queues;
742 for (i = nb_queues; i < old_nb_queues; i++)
743 (*dev->dev_ops->rx_queue_release)(rxq[i]);
744 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
745 RTE_CACHE_LINE_SIZE);
748 if (nb_queues > old_nb_queues) {
749 uint16_t new_qs = nb_queues - old_nb_queues;
751 memset(rxq + old_nb_queues, 0,
752 sizeof(rxq[0]) * new_qs);
755 dev->data->rx_queues = rxq;
757 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
760 rxq = dev->data->rx_queues;
762 for (i = nb_queues; i < old_nb_queues; i++)
763 (*dev->dev_ops->rx_queue_release)(rxq[i]);
765 rte_free(dev->data->rx_queues);
766 dev->data->rx_queues = NULL;
768 dev->data->nb_rx_queues = nb_queues;
773 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
775 struct rte_eth_dev *dev;
777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
779 dev = &rte_eth_devices[port_id];
780 if (!dev->data->dev_started) {
782 "port %d must be started before start any queue\n", port_id);
786 if (rx_queue_id >= dev->data->nb_rx_queues) {
787 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
793 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
794 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
795 " already started\n",
796 rx_queue_id, port_id);
800 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
806 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
808 struct rte_eth_dev *dev;
810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
812 dev = &rte_eth_devices[port_id];
813 if (rx_queue_id >= dev->data->nb_rx_queues) {
814 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
820 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
821 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
822 " already stopped\n",
823 rx_queue_id, port_id);
827 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
832 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
834 struct rte_eth_dev *dev;
836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
838 dev = &rte_eth_devices[port_id];
839 if (!dev->data->dev_started) {
841 "port %d must be started before start any queue\n", port_id);
845 if (tx_queue_id >= dev->data->nb_tx_queues) {
846 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
852 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
853 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
854 " already started\n",
855 tx_queue_id, port_id);
859 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
865 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
867 struct rte_eth_dev *dev;
869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
871 dev = &rte_eth_devices[port_id];
872 if (tx_queue_id >= dev->data->nb_tx_queues) {
873 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
879 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
880 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
881 " already stopped\n",
882 tx_queue_id, port_id);
886 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
891 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
893 uint16_t old_nb_queues = dev->data->nb_tx_queues;
897 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
898 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
899 sizeof(dev->data->tx_queues[0]) * nb_queues,
900 RTE_CACHE_LINE_SIZE);
901 if (dev->data->tx_queues == NULL) {
902 dev->data->nb_tx_queues = 0;
905 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
908 txq = dev->data->tx_queues;
910 for (i = nb_queues; i < old_nb_queues; i++)
911 (*dev->dev_ops->tx_queue_release)(txq[i]);
912 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
913 RTE_CACHE_LINE_SIZE);
916 if (nb_queues > old_nb_queues) {
917 uint16_t new_qs = nb_queues - old_nb_queues;
919 memset(txq + old_nb_queues, 0,
920 sizeof(txq[0]) * new_qs);
923 dev->data->tx_queues = txq;
925 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
928 txq = dev->data->tx_queues;
930 for (i = nb_queues; i < old_nb_queues; i++)
931 (*dev->dev_ops->tx_queue_release)(txq[i]);
933 rte_free(dev->data->tx_queues);
934 dev->data->tx_queues = NULL;
936 dev->data->nb_tx_queues = nb_queues;
941 rte_eth_speed_bitflag(uint32_t speed, int duplex)
944 case ETH_SPEED_NUM_10M:
945 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
946 case ETH_SPEED_NUM_100M:
947 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
948 case ETH_SPEED_NUM_1G:
949 return ETH_LINK_SPEED_1G;
950 case ETH_SPEED_NUM_2_5G:
951 return ETH_LINK_SPEED_2_5G;
952 case ETH_SPEED_NUM_5G:
953 return ETH_LINK_SPEED_5G;
954 case ETH_SPEED_NUM_10G:
955 return ETH_LINK_SPEED_10G;
956 case ETH_SPEED_NUM_20G:
957 return ETH_LINK_SPEED_20G;
958 case ETH_SPEED_NUM_25G:
959 return ETH_LINK_SPEED_25G;
960 case ETH_SPEED_NUM_40G:
961 return ETH_LINK_SPEED_40G;
962 case ETH_SPEED_NUM_50G:
963 return ETH_LINK_SPEED_50G;
964 case ETH_SPEED_NUM_56G:
965 return ETH_LINK_SPEED_56G;
966 case ETH_SPEED_NUM_100G:
967 return ETH_LINK_SPEED_100G;
974 * A conversion function from rxmode bitfield API.
977 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
978 uint64_t *rx_offloads)
980 uint64_t offloads = 0;
982 if (rxmode->header_split == 1)
983 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
984 if (rxmode->hw_ip_checksum == 1)
985 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
986 if (rxmode->hw_vlan_filter == 1)
987 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
988 if (rxmode->hw_vlan_strip == 1)
989 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
990 if (rxmode->hw_vlan_extend == 1)
991 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
992 if (rxmode->jumbo_frame == 1)
993 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
994 if (rxmode->hw_strip_crc == 1)
995 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
996 if (rxmode->enable_scatter == 1)
997 offloads |= DEV_RX_OFFLOAD_SCATTER;
998 if (rxmode->enable_lro == 1)
999 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
1000 if (rxmode->hw_timestamp == 1)
1001 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
1002 if (rxmode->security == 1)
1003 offloads |= DEV_RX_OFFLOAD_SECURITY;
1005 *rx_offloads = offloads;
1008 const char * __rte_experimental
1009 rte_eth_dev_rx_offload_name(uint64_t offload)
1011 const char *name = "UNKNOWN";
1014 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1015 if (offload == rte_rx_offload_names[i].offload) {
1016 name = rte_rx_offload_names[i].name;
1024 const char * __rte_experimental
1025 rte_eth_dev_tx_offload_name(uint64_t offload)
1027 const char *name = "UNKNOWN";
1030 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1031 if (offload == rte_tx_offload_names[i].offload) {
1032 name = rte_tx_offload_names[i].name;
1041 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1042 const struct rte_eth_conf *dev_conf)
1044 struct rte_eth_dev *dev;
1045 struct rte_eth_dev_info dev_info;
1046 struct rte_eth_conf local_conf = *dev_conf;
1049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1051 dev = &rte_eth_devices[port_id];
1053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1056 rte_eth_dev_info_get(port_id, &dev_info);
1058 /* If number of queues specified by application for both Rx and Tx is
1059 * zero, use driver preferred values. This cannot be done individually
1060 * as it is valid for either Tx or Rx (but not both) to be zero.
1061 * If driver does not provide any preferred valued, fall back on
1064 if (nb_rx_q == 0 && nb_tx_q == 0) {
1065 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1067 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1068 nb_tx_q = dev_info.default_txportconf.nb_queues;
1070 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1073 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1074 RTE_PMD_DEBUG_TRACE(
1075 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1076 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1080 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1081 RTE_PMD_DEBUG_TRACE(
1082 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1083 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1087 if (dev->data->dev_started) {
1088 RTE_PMD_DEBUG_TRACE(
1089 "port %d must be stopped to allow configuration\n", port_id);
1094 * Convert between the offloads API to enable PMDs to support
1097 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1098 rte_eth_convert_rx_offload_bitfield(
1099 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1101 /* Copy the dev_conf parameter into the dev structure */
1102 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1105 * Check that the numbers of RX and TX queues are not greater
1106 * than the maximum number of RX and TX queues supported by the
1107 * configured device.
1109 if (nb_rx_q > dev_info.max_rx_queues) {
1110 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1111 port_id, nb_rx_q, dev_info.max_rx_queues);
1115 if (nb_tx_q > dev_info.max_tx_queues) {
1116 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1117 port_id, nb_tx_q, dev_info.max_tx_queues);
1121 /* Check that the device supports requested interrupts */
1122 if ((dev_conf->intr_conf.lsc == 1) &&
1123 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1124 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1125 dev->device->driver->name);
1128 if ((dev_conf->intr_conf.rmv == 1) &&
1129 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1130 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1131 dev->device->driver->name);
1136 * If jumbo frames are enabled, check that the maximum RX packet
1137 * length is supported by the configured device.
1139 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1140 if (dev_conf->rxmode.max_rx_pkt_len >
1141 dev_info.max_rx_pktlen) {
1142 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1143 " > max valid value %u\n",
1145 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1146 (unsigned)dev_info.max_rx_pktlen);
1148 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1149 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1150 " < min valid value %u\n",
1152 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1153 (unsigned)ETHER_MIN_LEN);
1157 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1158 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1159 /* Use default value */
1160 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1164 /* Any requested offloading must be within its device capabilities */
1165 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1166 local_conf.rxmode.offloads) {
1167 ethdev_log(ERR, "ethdev port_id=%d requested Rx offloads "
1168 "0x%" PRIx64 " doesn't match Rx offloads "
1169 "capabilities 0x%" PRIx64 " in %s()\n",
1171 local_conf.rxmode.offloads,
1172 dev_info.rx_offload_capa,
1176 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1177 local_conf.txmode.offloads) {
1178 ethdev_log(ERR, "ethdev port_id=%d requested Tx offloads "
1179 "0x%" PRIx64 " doesn't match Tx offloads "
1180 "capabilities 0x%" PRIx64 " in %s()\n",
1182 local_conf.txmode.offloads,
1183 dev_info.tx_offload_capa,
1188 /* Check that device supports requested rss hash functions. */
1189 if ((dev_info.flow_type_rss_offloads |
1190 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1191 dev_info.flow_type_rss_offloads) {
1192 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1193 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1195 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1196 dev_info.flow_type_rss_offloads);
1201 * Setup new number of RX/TX queues and reconfigure device.
1203 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1205 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1210 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1212 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1214 rte_eth_dev_rx_queue_config(dev, 0);
1218 diag = (*dev->dev_ops->dev_configure)(dev);
1220 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1222 rte_eth_dev_rx_queue_config(dev, 0);
1223 rte_eth_dev_tx_queue_config(dev, 0);
1224 return eth_err(port_id, diag);
1227 /* Initialize Rx profiling if enabled at compilation time. */
1228 diag = __rte_eth_profile_rx_init(port_id, dev);
1230 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1232 rte_eth_dev_rx_queue_config(dev, 0);
1233 rte_eth_dev_tx_queue_config(dev, 0);
1234 return eth_err(port_id, diag);
1241 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1243 if (dev->data->dev_started) {
1244 RTE_PMD_DEBUG_TRACE(
1245 "port %d must be stopped to allow reset\n",
1246 dev->data->port_id);
1250 rte_eth_dev_rx_queue_config(dev, 0);
1251 rte_eth_dev_tx_queue_config(dev, 0);
1253 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1257 rte_eth_dev_config_restore(uint16_t port_id)
1259 struct rte_eth_dev *dev;
1260 struct rte_eth_dev_info dev_info;
1261 struct ether_addr *addr;
1266 dev = &rte_eth_devices[port_id];
1268 rte_eth_dev_info_get(port_id, &dev_info);
1270 /* replay MAC address configuration including default MAC */
1271 addr = &dev->data->mac_addrs[0];
1272 if (*dev->dev_ops->mac_addr_set != NULL)
1273 (*dev->dev_ops->mac_addr_set)(dev, addr);
1274 else if (*dev->dev_ops->mac_addr_add != NULL)
1275 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1277 if (*dev->dev_ops->mac_addr_add != NULL) {
1278 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1279 addr = &dev->data->mac_addrs[i];
1281 /* skip zero address */
1282 if (is_zero_ether_addr(addr))
1286 pool_mask = dev->data->mac_pool_sel[i];
1289 if (pool_mask & 1ULL)
1290 (*dev->dev_ops->mac_addr_add)(dev,
1294 } while (pool_mask);
1298 /* replay promiscuous configuration */
1299 if (rte_eth_promiscuous_get(port_id) == 1)
1300 rte_eth_promiscuous_enable(port_id);
1301 else if (rte_eth_promiscuous_get(port_id) == 0)
1302 rte_eth_promiscuous_disable(port_id);
1304 /* replay all multicast configuration */
1305 if (rte_eth_allmulticast_get(port_id) == 1)
1306 rte_eth_allmulticast_enable(port_id);
1307 else if (rte_eth_allmulticast_get(port_id) == 0)
1308 rte_eth_allmulticast_disable(port_id);
1312 rte_eth_dev_start(uint16_t port_id)
1314 struct rte_eth_dev *dev;
1317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1319 dev = &rte_eth_devices[port_id];
1321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1323 if (dev->data->dev_started != 0) {
1324 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1325 " already started\n",
1330 diag = (*dev->dev_ops->dev_start)(dev);
1332 dev->data->dev_started = 1;
1334 return eth_err(port_id, diag);
1336 rte_eth_dev_config_restore(port_id);
1338 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1339 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1340 (*dev->dev_ops->link_update)(dev, 0);
1346 rte_eth_dev_stop(uint16_t port_id)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1351 dev = &rte_eth_devices[port_id];
1353 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1355 if (dev->data->dev_started == 0) {
1356 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1357 " already stopped\n",
1362 dev->data->dev_started = 0;
1363 (*dev->dev_ops->dev_stop)(dev);
1367 rte_eth_dev_set_link_up(uint16_t port_id)
1369 struct rte_eth_dev *dev;
1371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1376 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1380 rte_eth_dev_set_link_down(uint16_t port_id)
1382 struct rte_eth_dev *dev;
1384 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1386 dev = &rte_eth_devices[port_id];
1388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1389 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1393 rte_eth_dev_close(uint16_t port_id)
1395 struct rte_eth_dev *dev;
1397 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1398 dev = &rte_eth_devices[port_id];
1400 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1401 dev->data->dev_started = 0;
1402 (*dev->dev_ops->dev_close)(dev);
1404 dev->data->nb_rx_queues = 0;
1405 rte_free(dev->data->rx_queues);
1406 dev->data->rx_queues = NULL;
1407 dev->data->nb_tx_queues = 0;
1408 rte_free(dev->data->tx_queues);
1409 dev->data->tx_queues = NULL;
1413 rte_eth_dev_reset(uint16_t port_id)
1415 struct rte_eth_dev *dev;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1419 dev = &rte_eth_devices[port_id];
1421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1423 rte_eth_dev_stop(port_id);
1424 ret = dev->dev_ops->dev_reset(dev);
1426 return eth_err(port_id, ret);
1429 int __rte_experimental
1430 rte_eth_dev_is_removed(uint16_t port_id)
1432 struct rte_eth_dev *dev;
1435 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1437 dev = &rte_eth_devices[port_id];
1439 if (dev->state == RTE_ETH_DEV_REMOVED)
1442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1444 ret = dev->dev_ops->is_removed(dev);
1446 /* Device is physically removed. */
1447 dev->state = RTE_ETH_DEV_REMOVED;
1453 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1454 uint16_t nb_rx_desc, unsigned int socket_id,
1455 const struct rte_eth_rxconf *rx_conf,
1456 struct rte_mempool *mp)
1459 uint32_t mbp_buf_size;
1460 struct rte_eth_dev *dev;
1461 struct rte_eth_dev_info dev_info;
1462 struct rte_eth_rxconf local_conf;
1465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1467 dev = &rte_eth_devices[port_id];
1468 if (rx_queue_id >= dev->data->nb_rx_queues) {
1469 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1474 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1477 * Check the size of the mbuf data buffer.
1478 * This value must be provided in the private data of the memory pool.
1479 * First check that the memory pool has a valid private data.
1481 rte_eth_dev_info_get(port_id, &dev_info);
1482 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1483 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1484 mp->name, (int) mp->private_data_size,
1485 (int) sizeof(struct rte_pktmbuf_pool_private));
1488 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1490 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1491 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1492 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1496 (int)(RTE_PKTMBUF_HEADROOM +
1497 dev_info.min_rx_bufsize),
1498 (int)RTE_PKTMBUF_HEADROOM,
1499 (int)dev_info.min_rx_bufsize);
1503 /* Use default specified by driver, if nb_rx_desc is zero */
1504 if (nb_rx_desc == 0) {
1505 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1506 /* If driver default is also zero, fall back on EAL default */
1507 if (nb_rx_desc == 0)
1508 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1511 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1512 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1513 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1515 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1516 "should be: <= %hu, = %hu, and a product of %hu\n",
1518 dev_info.rx_desc_lim.nb_max,
1519 dev_info.rx_desc_lim.nb_min,
1520 dev_info.rx_desc_lim.nb_align);
1524 if (dev->data->dev_started &&
1525 !(dev_info.dev_capa &
1526 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1529 if (dev->data->dev_started &&
1530 (dev->data->rx_queue_state[rx_queue_id] !=
1531 RTE_ETH_QUEUE_STATE_STOPPED))
1534 rxq = dev->data->rx_queues;
1535 if (rxq[rx_queue_id]) {
1536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1538 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1539 rxq[rx_queue_id] = NULL;
1542 if (rx_conf == NULL)
1543 rx_conf = &dev_info.default_rxconf;
1545 local_conf = *rx_conf;
1546 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1548 * Reflect port offloads to queue offloads in order for
1549 * offloads to not be discarded.
1551 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1552 &local_conf.offloads);
1556 * If an offloading has already been enabled in
1557 * rte_eth_dev_configure(), it has been enabled on all queues,
1558 * so there is no need to enable it in this queue again.
1559 * The local_conf.offloads input to underlying PMD only carries
1560 * those offloadings which are only enabled on this queue and
1561 * not enabled on all queues.
1563 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1566 * New added offloadings for this queue are those not enabled in
1567 * rte_eth_dev_configure() and they must be per-queue type.
1568 * A pure per-port offloading can't be enabled on a queue while
1569 * disabled on another queue. A pure per-port offloading can't
1570 * be enabled for any queue as new added one if it hasn't been
1571 * enabled in rte_eth_dev_configure().
1573 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1574 local_conf.offloads) {
1575 ethdev_log(ERR, "Ethdev port_id=%d rx_queue_id=%d, new "
1576 "added offloads 0x%" PRIx64 " must be "
1577 "within pre-queue offload capabilities 0x%"
1578 PRIx64 " in %s()\n",
1581 local_conf.offloads,
1582 dev_info.rx_queue_offload_capa,
1587 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1588 socket_id, &local_conf, mp);
1590 if (!dev->data->min_rx_buf_size ||
1591 dev->data->min_rx_buf_size > mbp_buf_size)
1592 dev->data->min_rx_buf_size = mbp_buf_size;
1595 return eth_err(port_id, ret);
1599 * Convert from tx offloads to txq_flags.
1602 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1606 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1607 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1608 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1609 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1610 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1611 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1612 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1613 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1614 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1615 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1616 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1617 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1623 * A conversion function from txq_flags API.
1626 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1628 uint64_t offloads = 0;
1630 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1631 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1632 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1633 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1634 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1635 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1636 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1637 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1638 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1639 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1640 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1641 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1642 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1644 *tx_offloads = offloads;
1648 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1649 uint16_t nb_tx_desc, unsigned int socket_id,
1650 const struct rte_eth_txconf *tx_conf)
1652 struct rte_eth_dev *dev;
1653 struct rte_eth_dev_info dev_info;
1654 struct rte_eth_txconf local_conf;
1657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1659 dev = &rte_eth_devices[port_id];
1660 if (tx_queue_id >= dev->data->nb_tx_queues) {
1661 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1668 rte_eth_dev_info_get(port_id, &dev_info);
1670 /* Use default specified by driver, if nb_tx_desc is zero */
1671 if (nb_tx_desc == 0) {
1672 nb_tx_desc = dev_info.default_txportconf.ring_size;
1673 /* If driver default is zero, fall back on EAL default */
1674 if (nb_tx_desc == 0)
1675 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1677 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1678 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1679 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1680 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1681 "should be: <= %hu, = %hu, and a product of %hu\n",
1683 dev_info.tx_desc_lim.nb_max,
1684 dev_info.tx_desc_lim.nb_min,
1685 dev_info.tx_desc_lim.nb_align);
1689 if (dev->data->dev_started &&
1690 !(dev_info.dev_capa &
1691 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1694 if (dev->data->dev_started &&
1695 (dev->data->tx_queue_state[tx_queue_id] !=
1696 RTE_ETH_QUEUE_STATE_STOPPED))
1699 txq = dev->data->tx_queues;
1700 if (txq[tx_queue_id]) {
1701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1703 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1704 txq[tx_queue_id] = NULL;
1707 if (tx_conf == NULL)
1708 tx_conf = &dev_info.default_txconf;
1711 * Convert between the offloads API to enable PMDs to support
1714 local_conf = *tx_conf;
1715 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1716 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1717 &local_conf.offloads);
1721 * If an offloading has already been enabled in
1722 * rte_eth_dev_configure(), it has been enabled on all queues,
1723 * so there is no need to enable it in this queue again.
1724 * The local_conf.offloads input to underlying PMD only carries
1725 * those offloadings which are only enabled on this queue and
1726 * not enabled on all queues.
1728 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1731 * New added offloadings for this queue are those not enabled in
1732 * rte_eth_dev_configure() and they must be per-queue type.
1733 * A pure per-port offloading can't be enabled on a queue while
1734 * disabled on another queue. A pure per-port offloading can't
1735 * be enabled for any queue as new added one if it hasn't been
1736 * enabled in rte_eth_dev_configure().
1738 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1739 local_conf.offloads) {
1740 ethdev_log(ERR, "Ethdev port_id=%d tx_queue_id=%d, new "
1741 "added offloads 0x%" PRIx64 " must be "
1742 "within pre-queue offload capabilities 0x%"
1743 PRIx64 " in %s()\n",
1746 local_conf.offloads,
1747 dev_info.tx_queue_offload_capa,
1752 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1753 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1757 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1758 void *userdata __rte_unused)
1762 for (i = 0; i < unsent; i++)
1763 rte_pktmbuf_free(pkts[i]);
1767 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1770 uint64_t *count = userdata;
1773 for (i = 0; i < unsent; i++)
1774 rte_pktmbuf_free(pkts[i]);
1780 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1781 buffer_tx_error_fn cbfn, void *userdata)
1783 buffer->error_callback = cbfn;
1784 buffer->error_userdata = userdata;
1789 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1796 buffer->size = size;
1797 if (buffer->error_callback == NULL) {
1798 ret = rte_eth_tx_buffer_set_err_callback(
1799 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1806 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1808 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1811 /* Validate Input Data. Bail if not valid or not supported. */
1812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1813 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1815 /* Call driver to free pending mbufs. */
1816 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1818 return eth_err(port_id, ret);
1822 rte_eth_promiscuous_enable(uint16_t port_id)
1824 struct rte_eth_dev *dev;
1826 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1827 dev = &rte_eth_devices[port_id];
1829 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1830 (*dev->dev_ops->promiscuous_enable)(dev);
1831 dev->data->promiscuous = 1;
1835 rte_eth_promiscuous_disable(uint16_t port_id)
1837 struct rte_eth_dev *dev;
1839 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1840 dev = &rte_eth_devices[port_id];
1842 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1843 dev->data->promiscuous = 0;
1844 (*dev->dev_ops->promiscuous_disable)(dev);
1848 rte_eth_promiscuous_get(uint16_t port_id)
1850 struct rte_eth_dev *dev;
1852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1854 dev = &rte_eth_devices[port_id];
1855 return dev->data->promiscuous;
1859 rte_eth_allmulticast_enable(uint16_t port_id)
1861 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1864 dev = &rte_eth_devices[port_id];
1866 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1867 (*dev->dev_ops->allmulticast_enable)(dev);
1868 dev->data->all_multicast = 1;
1872 rte_eth_allmulticast_disable(uint16_t port_id)
1874 struct rte_eth_dev *dev;
1876 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1877 dev = &rte_eth_devices[port_id];
1879 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1880 dev->data->all_multicast = 0;
1881 (*dev->dev_ops->allmulticast_disable)(dev);
1885 rte_eth_allmulticast_get(uint16_t port_id)
1887 struct rte_eth_dev *dev;
1889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1891 dev = &rte_eth_devices[port_id];
1892 return dev->data->all_multicast;
1896 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1898 struct rte_eth_dev *dev;
1900 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1901 dev = &rte_eth_devices[port_id];
1903 if (dev->data->dev_conf.intr_conf.lsc &&
1904 dev->data->dev_started)
1905 rte_eth_linkstatus_get(dev, eth_link);
1907 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1908 (*dev->dev_ops->link_update)(dev, 1);
1909 *eth_link = dev->data->dev_link;
1914 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1916 struct rte_eth_dev *dev;
1918 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1919 dev = &rte_eth_devices[port_id];
1921 if (dev->data->dev_conf.intr_conf.lsc &&
1922 dev->data->dev_started)
1923 rte_eth_linkstatus_get(dev, eth_link);
1925 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1926 (*dev->dev_ops->link_update)(dev, 0);
1927 *eth_link = dev->data->dev_link;
1932 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1934 struct rte_eth_dev *dev;
1936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1938 dev = &rte_eth_devices[port_id];
1939 memset(stats, 0, sizeof(*stats));
1941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1942 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1943 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1947 rte_eth_stats_reset(uint16_t port_id)
1949 struct rte_eth_dev *dev;
1951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1952 dev = &rte_eth_devices[port_id];
1954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1955 (*dev->dev_ops->stats_reset)(dev);
1956 dev->data->rx_mbuf_alloc_failed = 0;
1962 get_xstats_basic_count(struct rte_eth_dev *dev)
1964 uint16_t nb_rxqs, nb_txqs;
1967 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1968 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1970 count = RTE_NB_STATS;
1971 count += nb_rxqs * RTE_NB_RXQ_STATS;
1972 count += nb_txqs * RTE_NB_TXQ_STATS;
1978 get_xstats_count(uint16_t port_id)
1980 struct rte_eth_dev *dev;
1983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1984 dev = &rte_eth_devices[port_id];
1985 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1986 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1989 return eth_err(port_id, count);
1991 if (dev->dev_ops->xstats_get_names != NULL) {
1992 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1994 return eth_err(port_id, count);
1999 count += get_xstats_basic_count(dev);
2005 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2008 int cnt_xstats, idx_xstat;
2010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2013 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
2018 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
2023 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2024 if (cnt_xstats < 0) {
2025 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
2029 /* Get id-name lookup table */
2030 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2032 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2033 port_id, xstats_names, cnt_xstats, NULL)) {
2034 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
2038 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2039 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2048 /* retrieve basic stats names */
2050 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2051 struct rte_eth_xstat_name *xstats_names)
2053 int cnt_used_entries = 0;
2054 uint32_t idx, id_queue;
2057 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2058 snprintf(xstats_names[cnt_used_entries].name,
2059 sizeof(xstats_names[0].name),
2060 "%s", rte_stats_strings[idx].name);
2063 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2064 for (id_queue = 0; id_queue < num_q; id_queue++) {
2065 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2066 snprintf(xstats_names[cnt_used_entries].name,
2067 sizeof(xstats_names[0].name),
2069 id_queue, rte_rxq_stats_strings[idx].name);
2074 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2075 for (id_queue = 0; id_queue < num_q; id_queue++) {
2076 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2077 snprintf(xstats_names[cnt_used_entries].name,
2078 sizeof(xstats_names[0].name),
2080 id_queue, rte_txq_stats_strings[idx].name);
2084 return cnt_used_entries;
2087 /* retrieve ethdev extended statistics names */
2089 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2090 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2093 struct rte_eth_xstat_name *xstats_names_copy;
2094 unsigned int no_basic_stat_requested = 1;
2095 unsigned int no_ext_stat_requested = 1;
2096 unsigned int expected_entries;
2097 unsigned int basic_count;
2098 struct rte_eth_dev *dev;
2102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2103 dev = &rte_eth_devices[port_id];
2105 basic_count = get_xstats_basic_count(dev);
2106 ret = get_xstats_count(port_id);
2109 expected_entries = (unsigned int)ret;
2111 /* Return max number of stats if no ids given */
2114 return expected_entries;
2115 else if (xstats_names && size < expected_entries)
2116 return expected_entries;
2119 if (ids && !xstats_names)
2122 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2123 uint64_t ids_copy[size];
2125 for (i = 0; i < size; i++) {
2126 if (ids[i] < basic_count) {
2127 no_basic_stat_requested = 0;
2132 * Convert ids to xstats ids that PMD knows.
2133 * ids known by user are basic + extended stats.
2135 ids_copy[i] = ids[i] - basic_count;
2138 if (no_basic_stat_requested)
2139 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2140 xstats_names, ids_copy, size);
2143 /* Retrieve all stats */
2145 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2147 if (num_stats < 0 || num_stats > (int)expected_entries)
2150 return expected_entries;
2153 xstats_names_copy = calloc(expected_entries,
2154 sizeof(struct rte_eth_xstat_name));
2156 if (!xstats_names_copy) {
2157 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2162 for (i = 0; i < size; i++) {
2163 if (ids[i] >= basic_count) {
2164 no_ext_stat_requested = 0;
2170 /* Fill xstats_names_copy structure */
2171 if (ids && no_ext_stat_requested) {
2172 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2174 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2177 free(xstats_names_copy);
2183 for (i = 0; i < size; i++) {
2184 if (ids[i] >= expected_entries) {
2185 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2186 free(xstats_names_copy);
2189 xstats_names[i] = xstats_names_copy[ids[i]];
2192 free(xstats_names_copy);
2197 rte_eth_xstats_get_names(uint16_t port_id,
2198 struct rte_eth_xstat_name *xstats_names,
2201 struct rte_eth_dev *dev;
2202 int cnt_used_entries;
2203 int cnt_expected_entries;
2204 int cnt_driver_entries;
2206 cnt_expected_entries = get_xstats_count(port_id);
2207 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2208 (int)size < cnt_expected_entries)
2209 return cnt_expected_entries;
2211 /* port_id checked in get_xstats_count() */
2212 dev = &rte_eth_devices[port_id];
2214 cnt_used_entries = rte_eth_basic_stats_get_names(
2217 if (dev->dev_ops->xstats_get_names != NULL) {
2218 /* If there are any driver-specific xstats, append them
2221 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2223 xstats_names + cnt_used_entries,
2224 size - cnt_used_entries);
2225 if (cnt_driver_entries < 0)
2226 return eth_err(port_id, cnt_driver_entries);
2227 cnt_used_entries += cnt_driver_entries;
2230 return cnt_used_entries;
2235 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2237 struct rte_eth_dev *dev;
2238 struct rte_eth_stats eth_stats;
2239 unsigned int count = 0, i, q;
2240 uint64_t val, *stats_ptr;
2241 uint16_t nb_rxqs, nb_txqs;
2244 ret = rte_eth_stats_get(port_id, ð_stats);
2248 dev = &rte_eth_devices[port_id];
2250 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2251 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2254 for (i = 0; i < RTE_NB_STATS; i++) {
2255 stats_ptr = RTE_PTR_ADD(ð_stats,
2256 rte_stats_strings[i].offset);
2258 xstats[count++].value = val;
2262 for (q = 0; q < nb_rxqs; q++) {
2263 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2264 stats_ptr = RTE_PTR_ADD(ð_stats,
2265 rte_rxq_stats_strings[i].offset +
2266 q * sizeof(uint64_t));
2268 xstats[count++].value = val;
2273 for (q = 0; q < nb_txqs; q++) {
2274 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2275 stats_ptr = RTE_PTR_ADD(ð_stats,
2276 rte_txq_stats_strings[i].offset +
2277 q * sizeof(uint64_t));
2279 xstats[count++].value = val;
2285 /* retrieve ethdev extended statistics */
2287 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2288 uint64_t *values, unsigned int size)
2290 unsigned int no_basic_stat_requested = 1;
2291 unsigned int no_ext_stat_requested = 1;
2292 unsigned int num_xstats_filled;
2293 unsigned int basic_count;
2294 uint16_t expected_entries;
2295 struct rte_eth_dev *dev;
2299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2300 ret = get_xstats_count(port_id);
2303 expected_entries = (uint16_t)ret;
2304 struct rte_eth_xstat xstats[expected_entries];
2305 dev = &rte_eth_devices[port_id];
2306 basic_count = get_xstats_basic_count(dev);
2308 /* Return max number of stats if no ids given */
2311 return expected_entries;
2312 else if (values && size < expected_entries)
2313 return expected_entries;
2319 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2320 unsigned int basic_count = get_xstats_basic_count(dev);
2321 uint64_t ids_copy[size];
2323 for (i = 0; i < size; i++) {
2324 if (ids[i] < basic_count) {
2325 no_basic_stat_requested = 0;
2330 * Convert ids to xstats ids that PMD knows.
2331 * ids known by user are basic + extended stats.
2333 ids_copy[i] = ids[i] - basic_count;
2336 if (no_basic_stat_requested)
2337 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2342 for (i = 0; i < size; i++) {
2343 if (ids[i] >= basic_count) {
2344 no_ext_stat_requested = 0;
2350 /* Fill the xstats structure */
2351 if (ids && no_ext_stat_requested)
2352 ret = rte_eth_basic_stats_get(port_id, xstats);
2354 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2358 num_xstats_filled = (unsigned int)ret;
2360 /* Return all stats */
2362 for (i = 0; i < num_xstats_filled; i++)
2363 values[i] = xstats[i].value;
2364 return expected_entries;
2368 for (i = 0; i < size; i++) {
2369 if (ids[i] >= expected_entries) {
2370 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2373 values[i] = xstats[ids[i]].value;
2379 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2382 struct rte_eth_dev *dev;
2383 unsigned int count = 0, i;
2384 signed int xcount = 0;
2385 uint16_t nb_rxqs, nb_txqs;
2388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2390 dev = &rte_eth_devices[port_id];
2392 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2393 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2395 /* Return generic statistics */
2396 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2397 (nb_txqs * RTE_NB_TXQ_STATS);
2399 /* implemented by the driver */
2400 if (dev->dev_ops->xstats_get != NULL) {
2401 /* Retrieve the xstats from the driver at the end of the
2404 xcount = (*dev->dev_ops->xstats_get)(dev,
2405 xstats ? xstats + count : NULL,
2406 (n > count) ? n - count : 0);
2409 return eth_err(port_id, xcount);
2412 if (n < count + xcount || xstats == NULL)
2413 return count + xcount;
2415 /* now fill the xstats structure */
2416 ret = rte_eth_basic_stats_get(port_id, xstats);
2421 for (i = 0; i < count; i++)
2423 /* add an offset to driver-specific stats */
2424 for ( ; i < count + xcount; i++)
2425 xstats[i].id += count;
2427 return count + xcount;
2430 /* reset ethdev extended statistics */
2432 rte_eth_xstats_reset(uint16_t port_id)
2434 struct rte_eth_dev *dev;
2436 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2437 dev = &rte_eth_devices[port_id];
2439 /* implemented by the driver */
2440 if (dev->dev_ops->xstats_reset != NULL) {
2441 (*dev->dev_ops->xstats_reset)(dev);
2445 /* fallback to default */
2446 rte_eth_stats_reset(port_id);
2450 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2453 struct rte_eth_dev *dev;
2455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2457 dev = &rte_eth_devices[port_id];
2459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2460 return (*dev->dev_ops->queue_stats_mapping_set)
2461 (dev, queue_id, stat_idx, is_rx);
2466 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2469 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2470 stat_idx, STAT_QMAP_TX));
2475 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2478 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2479 stat_idx, STAT_QMAP_RX));
2483 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2485 struct rte_eth_dev *dev;
2487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2488 dev = &rte_eth_devices[port_id];
2490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2491 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2492 fw_version, fw_size));
2496 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2498 struct rte_eth_dev *dev;
2499 struct rte_eth_txconf *txconf;
2500 const struct rte_eth_desc_lim lim = {
2501 .nb_max = UINT16_MAX,
2506 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2507 dev = &rte_eth_devices[port_id];
2509 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2510 dev_info->rx_desc_lim = lim;
2511 dev_info->tx_desc_lim = lim;
2512 dev_info->device = dev->device;
2514 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2515 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2516 dev_info->driver_name = dev->device->driver->name;
2517 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2518 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2520 dev_info->dev_flags = &dev->data->dev_flags;
2521 txconf = &dev_info->default_txconf;
2522 /* convert offload to txq_flags to support legacy app */
2523 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2527 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2528 uint32_t *ptypes, int num)
2531 struct rte_eth_dev *dev;
2532 const uint32_t *all_ptypes;
2534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2535 dev = &rte_eth_devices[port_id];
2536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2537 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2542 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2543 if (all_ptypes[i] & ptype_mask) {
2545 ptypes[j] = all_ptypes[i];
2553 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2555 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2558 dev = &rte_eth_devices[port_id];
2559 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2564 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2566 struct rte_eth_dev *dev;
2568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2570 dev = &rte_eth_devices[port_id];
2571 *mtu = dev->data->mtu;
2576 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2579 struct rte_eth_dev *dev;
2581 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2582 dev = &rte_eth_devices[port_id];
2583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2585 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2587 dev->data->mtu = mtu;
2589 return eth_err(port_id, ret);
2593 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2595 struct rte_eth_dev *dev;
2598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2599 dev = &rte_eth_devices[port_id];
2600 if (!(dev->data->dev_conf.rxmode.offloads &
2601 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2602 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2606 if (vlan_id > 4095) {
2607 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2608 port_id, (unsigned) vlan_id);
2611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2613 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2615 struct rte_vlan_filter_conf *vfc;
2619 vfc = &dev->data->vlan_filter_conf;
2620 vidx = vlan_id / 64;
2621 vbit = vlan_id % 64;
2624 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2626 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2629 return eth_err(port_id, ret);
2633 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2636 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2639 dev = &rte_eth_devices[port_id];
2640 if (rx_queue_id >= dev->data->nb_rx_queues) {
2641 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2646 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2652 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2653 enum rte_vlan_type vlan_type,
2656 struct rte_eth_dev *dev;
2658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2659 dev = &rte_eth_devices[port_id];
2660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2662 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2667 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2669 struct rte_eth_dev *dev;
2673 uint64_t orig_offloads;
2675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2676 dev = &rte_eth_devices[port_id];
2678 /* save original values in case of failure */
2679 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2681 /*check which option changed by application*/
2682 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2683 org = !!(dev->data->dev_conf.rxmode.offloads &
2684 DEV_RX_OFFLOAD_VLAN_STRIP);
2687 dev->data->dev_conf.rxmode.offloads |=
2688 DEV_RX_OFFLOAD_VLAN_STRIP;
2690 dev->data->dev_conf.rxmode.offloads &=
2691 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2692 mask |= ETH_VLAN_STRIP_MASK;
2695 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2696 org = !!(dev->data->dev_conf.rxmode.offloads &
2697 DEV_RX_OFFLOAD_VLAN_FILTER);
2700 dev->data->dev_conf.rxmode.offloads |=
2701 DEV_RX_OFFLOAD_VLAN_FILTER;
2703 dev->data->dev_conf.rxmode.offloads &=
2704 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2705 mask |= ETH_VLAN_FILTER_MASK;
2708 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2709 org = !!(dev->data->dev_conf.rxmode.offloads &
2710 DEV_RX_OFFLOAD_VLAN_EXTEND);
2713 dev->data->dev_conf.rxmode.offloads |=
2714 DEV_RX_OFFLOAD_VLAN_EXTEND;
2716 dev->data->dev_conf.rxmode.offloads &=
2717 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2718 mask |= ETH_VLAN_EXTEND_MASK;
2725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2726 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2728 /* hit an error restore original values */
2729 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2732 return eth_err(port_id, ret);
2736 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2738 struct rte_eth_dev *dev;
2741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2742 dev = &rte_eth_devices[port_id];
2744 if (dev->data->dev_conf.rxmode.offloads &
2745 DEV_RX_OFFLOAD_VLAN_STRIP)
2746 ret |= ETH_VLAN_STRIP_OFFLOAD;
2748 if (dev->data->dev_conf.rxmode.offloads &
2749 DEV_RX_OFFLOAD_VLAN_FILTER)
2750 ret |= ETH_VLAN_FILTER_OFFLOAD;
2752 if (dev->data->dev_conf.rxmode.offloads &
2753 DEV_RX_OFFLOAD_VLAN_EXTEND)
2754 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2760 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2762 struct rte_eth_dev *dev;
2764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2768 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2772 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2774 struct rte_eth_dev *dev;
2776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2777 dev = &rte_eth_devices[port_id];
2778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2779 memset(fc_conf, 0, sizeof(*fc_conf));
2780 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2784 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2786 struct rte_eth_dev *dev;
2788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2789 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2790 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2794 dev = &rte_eth_devices[port_id];
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2796 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2800 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2801 struct rte_eth_pfc_conf *pfc_conf)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2806 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2807 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2811 dev = &rte_eth_devices[port_id];
2812 /* High water, low water validation are device specific */
2813 if (*dev->dev_ops->priority_flow_ctrl_set)
2814 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2820 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2828 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2829 for (i = 0; i < num; i++) {
2830 if (reta_conf[i].mask)
2838 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2842 uint16_t i, idx, shift;
2848 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2852 for (i = 0; i < reta_size; i++) {
2853 idx = i / RTE_RETA_GROUP_SIZE;
2854 shift = i % RTE_RETA_GROUP_SIZE;
2855 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2856 (reta_conf[idx].reta[shift] >= max_rxq)) {
2857 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2858 "the maximum rxq index: %u\n", idx, shift,
2859 reta_conf[idx].reta[shift], max_rxq);
2868 rte_eth_dev_rss_reta_update(uint16_t port_id,
2869 struct rte_eth_rss_reta_entry64 *reta_conf,
2872 struct rte_eth_dev *dev;
2875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 /* Check mask bits */
2877 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2881 dev = &rte_eth_devices[port_id];
2883 /* Check entry value */
2884 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2885 dev->data->nb_rx_queues);
2889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2890 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2895 rte_eth_dev_rss_reta_query(uint16_t port_id,
2896 struct rte_eth_rss_reta_entry64 *reta_conf,
2899 struct rte_eth_dev *dev;
2902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2904 /* Check mask bits */
2905 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2909 dev = &rte_eth_devices[port_id];
2910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2911 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2916 rte_eth_dev_rss_hash_update(uint16_t port_id,
2917 struct rte_eth_rss_conf *rss_conf)
2919 struct rte_eth_dev *dev;
2920 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2923 dev = &rte_eth_devices[port_id];
2924 rte_eth_dev_info_get(port_id, &dev_info);
2925 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2926 dev_info.flow_type_rss_offloads) {
2927 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2928 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2931 dev_info.flow_type_rss_offloads);
2934 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2935 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2940 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2941 struct rte_eth_rss_conf *rss_conf)
2943 struct rte_eth_dev *dev;
2945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2946 dev = &rte_eth_devices[port_id];
2947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2948 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2953 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2954 struct rte_eth_udp_tunnel *udp_tunnel)
2956 struct rte_eth_dev *dev;
2958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2959 if (udp_tunnel == NULL) {
2960 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2964 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2965 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2969 dev = &rte_eth_devices[port_id];
2970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2971 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2976 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2977 struct rte_eth_udp_tunnel *udp_tunnel)
2979 struct rte_eth_dev *dev;
2981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2982 dev = &rte_eth_devices[port_id];
2984 if (udp_tunnel == NULL) {
2985 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2989 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2990 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2994 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2995 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3000 rte_eth_led_on(uint16_t port_id)
3002 struct rte_eth_dev *dev;
3004 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3005 dev = &rte_eth_devices[port_id];
3006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3007 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3011 rte_eth_led_off(uint16_t port_id)
3013 struct rte_eth_dev *dev;
3015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3016 dev = &rte_eth_devices[port_id];
3017 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3018 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3022 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3026 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3028 struct rte_eth_dev_info dev_info;
3029 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3033 rte_eth_dev_info_get(port_id, &dev_info);
3035 for (i = 0; i < dev_info.max_mac_addrs; i++)
3036 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3042 static const struct ether_addr null_mac_addr;
3045 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3048 struct rte_eth_dev *dev;
3053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3054 dev = &rte_eth_devices[port_id];
3055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3057 if (is_zero_ether_addr(addr)) {
3058 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3062 if (pool >= ETH_64_POOLS) {
3063 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
3067 index = get_mac_addr_index(port_id, addr);
3069 index = get_mac_addr_index(port_id, &null_mac_addr);
3071 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3076 pool_mask = dev->data->mac_pool_sel[index];
3078 /* Check if both MAC address and pool is already there, and do nothing */
3079 if (pool_mask & (1ULL << pool))
3084 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3087 /* Update address in NIC data structure */
3088 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3090 /* Update pool bitmap in NIC data structure */
3091 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3094 return eth_err(port_id, ret);
3098 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3100 struct rte_eth_dev *dev;
3103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3104 dev = &rte_eth_devices[port_id];
3105 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3107 index = get_mac_addr_index(port_id, addr);
3109 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3111 } else if (index < 0)
3112 return 0; /* Do nothing if address wasn't found */
3115 (*dev->dev_ops->mac_addr_remove)(dev, index);
3117 /* Update address in NIC data structure */
3118 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3120 /* reset pool bitmap */
3121 dev->data->mac_pool_sel[index] = 0;
3127 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3129 struct rte_eth_dev *dev;
3132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3134 if (!is_valid_assigned_ether_addr(addr))
3137 dev = &rte_eth_devices[port_id];
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3140 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3144 /* Update default address in NIC data structure */
3145 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3152 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3156 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3158 struct rte_eth_dev_info dev_info;
3159 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3162 rte_eth_dev_info_get(port_id, &dev_info);
3163 if (!dev->data->hash_mac_addrs)
3166 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3167 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3168 ETHER_ADDR_LEN) == 0)
3175 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3180 struct rte_eth_dev *dev;
3182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3184 dev = &rte_eth_devices[port_id];
3185 if (is_zero_ether_addr(addr)) {
3186 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3191 index = get_hash_mac_addr_index(port_id, addr);
3192 /* Check if it's already there, and do nothing */
3193 if ((index >= 0) && on)
3198 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3199 "set in UTA\n", port_id);
3203 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3205 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3212 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3214 /* Update address in NIC data structure */
3216 ether_addr_copy(addr,
3217 &dev->data->hash_mac_addrs[index]);
3219 ether_addr_copy(&null_mac_addr,
3220 &dev->data->hash_mac_addrs[index]);
3223 return eth_err(port_id, ret);
3227 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3229 struct rte_eth_dev *dev;
3231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3233 dev = &rte_eth_devices[port_id];
3235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3236 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3240 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3243 struct rte_eth_dev *dev;
3244 struct rte_eth_dev_info dev_info;
3245 struct rte_eth_link link;
3247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3249 dev = &rte_eth_devices[port_id];
3250 rte_eth_dev_info_get(port_id, &dev_info);
3251 link = dev->data->dev_link;
3253 if (queue_idx > dev_info.max_tx_queues) {
3254 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3255 "invalid queue id=%d\n", port_id, queue_idx);
3259 if (tx_rate > link.link_speed) {
3260 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3261 "bigger than link speed= %d\n",
3262 tx_rate, link.link_speed);
3266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3267 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3268 queue_idx, tx_rate));
3272 rte_eth_mirror_rule_set(uint16_t port_id,
3273 struct rte_eth_mirror_conf *mirror_conf,
3274 uint8_t rule_id, uint8_t on)
3276 struct rte_eth_dev *dev;
3278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3279 if (mirror_conf->rule_type == 0) {
3280 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3284 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3285 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3290 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3291 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3292 (mirror_conf->pool_mask == 0)) {
3293 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3297 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3298 mirror_conf->vlan.vlan_mask == 0) {
3299 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3303 dev = &rte_eth_devices[port_id];
3304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3306 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3307 mirror_conf, rule_id, on));
3311 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3313 struct rte_eth_dev *dev;
3315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3317 dev = &rte_eth_devices[port_id];
3318 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3320 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3324 RTE_INIT(eth_dev_init_cb_lists)
3328 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3329 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3333 rte_eth_dev_callback_register(uint16_t port_id,
3334 enum rte_eth_event_type event,
3335 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3337 struct rte_eth_dev *dev;
3338 struct rte_eth_dev_callback *user_cb;
3339 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3345 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3346 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3350 if (port_id == RTE_ETH_ALL) {
3352 last_port = RTE_MAX_ETHPORTS - 1;
3354 next_port = last_port = port_id;
3357 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3360 dev = &rte_eth_devices[next_port];
3362 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3363 if (user_cb->cb_fn == cb_fn &&
3364 user_cb->cb_arg == cb_arg &&
3365 user_cb->event == event) {
3370 /* create a new callback. */
3371 if (user_cb == NULL) {
3372 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3373 sizeof(struct rte_eth_dev_callback), 0);
3374 if (user_cb != NULL) {
3375 user_cb->cb_fn = cb_fn;
3376 user_cb->cb_arg = cb_arg;
3377 user_cb->event = event;
3378 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3381 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3382 rte_eth_dev_callback_unregister(port_id, event,
3388 } while (++next_port <= last_port);
3390 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3395 rte_eth_dev_callback_unregister(uint16_t port_id,
3396 enum rte_eth_event_type event,
3397 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3400 struct rte_eth_dev *dev;
3401 struct rte_eth_dev_callback *cb, *next;
3402 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3408 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3409 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3413 if (port_id == RTE_ETH_ALL) {
3415 last_port = RTE_MAX_ETHPORTS - 1;
3417 next_port = last_port = port_id;
3420 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3423 dev = &rte_eth_devices[next_port];
3425 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3428 next = TAILQ_NEXT(cb, next);
3430 if (cb->cb_fn != cb_fn || cb->event != event ||
3431 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3435 * if this callback is not executing right now,
3438 if (cb->active == 0) {
3439 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3445 } while (++next_port <= last_port);
3447 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3452 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3453 enum rte_eth_event_type event, void *ret_param)
3455 struct rte_eth_dev_callback *cb_lst;
3456 struct rte_eth_dev_callback dev_cb;
3459 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3460 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3461 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3465 if (ret_param != NULL)
3466 dev_cb.ret_param = ret_param;
3468 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3469 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3470 dev_cb.cb_arg, dev_cb.ret_param);
3471 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3474 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3479 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3484 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3486 dev->state = RTE_ETH_DEV_ATTACHED;
3490 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3493 struct rte_eth_dev *dev;
3494 struct rte_intr_handle *intr_handle;
3498 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3500 dev = &rte_eth_devices[port_id];
3502 if (!dev->intr_handle) {
3503 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3507 intr_handle = dev->intr_handle;
3508 if (!intr_handle->intr_vec) {
3509 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3513 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3514 vec = intr_handle->intr_vec[qid];
3515 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3516 if (rc && rc != -EEXIST) {
3517 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3518 " op %d epfd %d vec %u\n",
3519 port_id, qid, op, epfd, vec);
3526 const struct rte_memzone *
3527 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3528 uint16_t queue_id, size_t size, unsigned align,
3531 char z_name[RTE_MEMZONE_NAMESIZE];
3532 const struct rte_memzone *mz;
3534 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3535 dev->device->driver->name, ring_name,
3536 dev->data->port_id, queue_id);
3538 mz = rte_memzone_lookup(z_name);
3542 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3543 RTE_MEMZONE_IOVA_CONTIG, align);
3546 int __rte_experimental
3547 rte_eth_dev_create(struct rte_device *device, const char *name,
3548 size_t priv_data_size,
3549 ethdev_bus_specific_init ethdev_bus_specific_init,
3550 void *bus_init_params,
3551 ethdev_init_t ethdev_init, void *init_params)
3553 struct rte_eth_dev *ethdev;
3556 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3558 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3559 ethdev = rte_eth_dev_allocate(name);
3565 if (priv_data_size) {
3566 ethdev->data->dev_private = rte_zmalloc_socket(
3567 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3570 if (!ethdev->data->dev_private) {
3571 RTE_LOG(ERR, EAL, "failed to allocate private data");
3577 ethdev = rte_eth_dev_attach_secondary(name);
3579 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3580 "ethdev doesn't exist");
3586 ethdev->device = device;
3588 if (ethdev_bus_specific_init) {
3589 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3592 "ethdev bus specific initialisation failed");
3597 retval = ethdev_init(ethdev, init_params);
3599 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3603 rte_eth_dev_probing_finish(ethdev);
3607 /* free ports private data if primary process */
3608 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3609 rte_free(ethdev->data->dev_private);
3611 rte_eth_dev_release_port(ethdev);
3616 int __rte_experimental
3617 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3618 ethdev_uninit_t ethdev_uninit)
3622 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3626 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3627 if (ethdev_uninit) {
3628 ret = ethdev_uninit(ethdev);
3633 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3634 rte_free(ethdev->data->dev_private);
3636 ethdev->data->dev_private = NULL;
3638 return rte_eth_dev_release_port(ethdev);
3642 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3643 int epfd, int op, void *data)
3646 struct rte_eth_dev *dev;
3647 struct rte_intr_handle *intr_handle;
3650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3652 dev = &rte_eth_devices[port_id];
3653 if (queue_id >= dev->data->nb_rx_queues) {
3654 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3658 if (!dev->intr_handle) {
3659 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3663 intr_handle = dev->intr_handle;
3664 if (!intr_handle->intr_vec) {
3665 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3669 vec = intr_handle->intr_vec[queue_id];
3670 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3671 if (rc && rc != -EEXIST) {
3672 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3673 " op %d epfd %d vec %u\n",
3674 port_id, queue_id, op, epfd, vec);
3682 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3685 struct rte_eth_dev *dev;
3687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3689 dev = &rte_eth_devices[port_id];
3691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3692 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3697 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3700 struct rte_eth_dev *dev;
3702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3704 dev = &rte_eth_devices[port_id];
3706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3707 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3713 rte_eth_dev_filter_supported(uint16_t port_id,
3714 enum rte_filter_type filter_type)
3716 struct rte_eth_dev *dev;
3718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3720 dev = &rte_eth_devices[port_id];
3721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3722 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3723 RTE_ETH_FILTER_NOP, NULL);
3727 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3728 enum rte_filter_op filter_op, void *arg)
3730 struct rte_eth_dev *dev;
3732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3734 dev = &rte_eth_devices[port_id];
3735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3736 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3740 const struct rte_eth_rxtx_callback *
3741 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3742 rte_rx_callback_fn fn, void *user_param)
3744 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3745 rte_errno = ENOTSUP;
3748 /* check input parameters */
3749 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3750 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3754 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3762 cb->param = user_param;
3764 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3765 /* Add the callbacks in fifo order. */
3766 struct rte_eth_rxtx_callback *tail =
3767 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3770 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3777 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3782 const struct rte_eth_rxtx_callback *
3783 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3784 rte_rx_callback_fn fn, void *user_param)
3786 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3787 rte_errno = ENOTSUP;
3790 /* check input parameters */
3791 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3792 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3797 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3805 cb->param = user_param;
3807 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3808 /* Add the callbacks at fisrt position*/
3809 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3811 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3812 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3817 const struct rte_eth_rxtx_callback *
3818 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3819 rte_tx_callback_fn fn, void *user_param)
3821 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3822 rte_errno = ENOTSUP;
3825 /* check input parameters */
3826 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3827 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3832 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3840 cb->param = user_param;
3842 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3843 /* Add the callbacks in fifo order. */
3844 struct rte_eth_rxtx_callback *tail =
3845 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3848 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3855 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3861 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3862 const struct rte_eth_rxtx_callback *user_cb)
3864 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3867 /* Check input parameters. */
3868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3869 if (user_cb == NULL ||
3870 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3873 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3874 struct rte_eth_rxtx_callback *cb;
3875 struct rte_eth_rxtx_callback **prev_cb;
3878 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3879 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3880 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3882 if (cb == user_cb) {
3883 /* Remove the user cb from the callback list. */
3884 *prev_cb = cb->next;
3889 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3895 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3896 const struct rte_eth_rxtx_callback *user_cb)
3898 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3901 /* Check input parameters. */
3902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3903 if (user_cb == NULL ||
3904 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3907 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3909 struct rte_eth_rxtx_callback *cb;
3910 struct rte_eth_rxtx_callback **prev_cb;
3912 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3913 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3914 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3916 if (cb == user_cb) {
3917 /* Remove the user cb from the callback list. */
3918 *prev_cb = cb->next;
3923 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3929 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3930 struct rte_eth_rxq_info *qinfo)
3932 struct rte_eth_dev *dev;
3934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3939 dev = &rte_eth_devices[port_id];
3940 if (queue_id >= dev->data->nb_rx_queues) {
3941 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3947 memset(qinfo, 0, sizeof(*qinfo));
3948 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3953 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3954 struct rte_eth_txq_info *qinfo)
3956 struct rte_eth_dev *dev;
3957 struct rte_eth_txconf *txconf = &qinfo->conf;
3959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3964 dev = &rte_eth_devices[port_id];
3965 if (queue_id >= dev->data->nb_tx_queues) {
3966 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3972 memset(qinfo, 0, sizeof(*qinfo));
3973 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3974 /* convert offload to txq_flags to support legacy app */
3975 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3981 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3982 struct ether_addr *mc_addr_set,
3983 uint32_t nb_mc_addr)
3985 struct rte_eth_dev *dev;
3987 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3989 dev = &rte_eth_devices[port_id];
3990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3991 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3992 mc_addr_set, nb_mc_addr));
3996 rte_eth_timesync_enable(uint16_t port_id)
3998 struct rte_eth_dev *dev;
4000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4001 dev = &rte_eth_devices[port_id];
4003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4004 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4008 rte_eth_timesync_disable(uint16_t port_id)
4010 struct rte_eth_dev *dev;
4012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4013 dev = &rte_eth_devices[port_id];
4015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4016 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4020 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4023 struct rte_eth_dev *dev;
4025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4026 dev = &rte_eth_devices[port_id];
4028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4029 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4030 (dev, timestamp, flags));
4034 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4035 struct timespec *timestamp)
4037 struct rte_eth_dev *dev;
4039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4040 dev = &rte_eth_devices[port_id];
4042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4043 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4048 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4050 struct rte_eth_dev *dev;
4052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4053 dev = &rte_eth_devices[port_id];
4055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4056 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4061 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4063 struct rte_eth_dev *dev;
4065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4066 dev = &rte_eth_devices[port_id];
4068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4069 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4074 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4076 struct rte_eth_dev *dev;
4078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4079 dev = &rte_eth_devices[port_id];
4081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4082 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4087 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4089 struct rte_eth_dev *dev;
4091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4093 dev = &rte_eth_devices[port_id];
4094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4095 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4099 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4101 struct rte_eth_dev *dev;
4103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4105 dev = &rte_eth_devices[port_id];
4106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4107 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4111 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4113 struct rte_eth_dev *dev;
4115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4117 dev = &rte_eth_devices[port_id];
4118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4119 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4123 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4125 struct rte_eth_dev *dev;
4127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4129 dev = &rte_eth_devices[port_id];
4130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4131 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4134 int __rte_experimental
4135 rte_eth_dev_get_module_info(uint16_t port_id,
4136 struct rte_eth_dev_module_info *modinfo)
4138 struct rte_eth_dev *dev;
4140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4142 dev = &rte_eth_devices[port_id];
4143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4144 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4147 int __rte_experimental
4148 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4149 struct rte_dev_eeprom_info *info)
4151 struct rte_eth_dev *dev;
4153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4155 dev = &rte_eth_devices[port_id];
4156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4157 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4161 rte_eth_dev_get_dcb_info(uint16_t port_id,
4162 struct rte_eth_dcb_info *dcb_info)
4164 struct rte_eth_dev *dev;
4166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4168 dev = &rte_eth_devices[port_id];
4169 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4171 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4172 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4176 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4177 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4179 struct rte_eth_dev *dev;
4181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4182 if (l2_tunnel == NULL) {
4183 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4187 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4188 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4192 dev = &rte_eth_devices[port_id];
4193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4195 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4200 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4201 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4205 struct rte_eth_dev *dev;
4207 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4209 if (l2_tunnel == NULL) {
4210 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4214 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4215 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4220 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4224 dev = &rte_eth_devices[port_id];
4225 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4227 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4228 l2_tunnel, mask, en));
4232 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4233 const struct rte_eth_desc_lim *desc_lim)
4235 if (desc_lim->nb_align != 0)
4236 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4238 if (desc_lim->nb_max != 0)
4239 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4241 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4245 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4246 uint16_t *nb_rx_desc,
4247 uint16_t *nb_tx_desc)
4249 struct rte_eth_dev *dev;
4250 struct rte_eth_dev_info dev_info;
4252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4254 dev = &rte_eth_devices[port_id];
4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4257 rte_eth_dev_info_get(port_id, &dev_info);
4259 if (nb_rx_desc != NULL)
4260 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4262 if (nb_tx_desc != NULL)
4263 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4269 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4271 struct rte_eth_dev *dev;
4273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4278 dev = &rte_eth_devices[port_id];
4280 if (*dev->dev_ops->pool_ops_supported == NULL)
4281 return 1; /* all pools are supported */
4283 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4287 * A set of values to describe the possible states of a switch domain.
4289 enum rte_eth_switch_domain_state {
4290 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4291 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4295 * Array of switch domains available for allocation. Array is sized to
4296 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4297 * ethdev ports in a single process.
4299 struct rte_eth_dev_switch {
4300 enum rte_eth_switch_domain_state state;
4301 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4303 int __rte_experimental
4304 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4308 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4310 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4311 i < RTE_MAX_ETHPORTS; i++) {
4312 if (rte_eth_switch_domains[i].state ==
4313 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4314 rte_eth_switch_domains[i].state =
4315 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4324 int __rte_experimental
4325 rte_eth_switch_domain_free(uint16_t domain_id)
4327 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4328 domain_id >= RTE_MAX_ETHPORTS)
4331 if (rte_eth_switch_domains[domain_id].state !=
4332 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4335 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4340 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4343 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4346 struct rte_kvargs_pair *pair;
4349 arglist->str = strdup(str_in);
4350 if (arglist->str == NULL)
4353 letter = arglist->str;
4356 pair = &arglist->pairs[0];
4359 case 0: /* Initial */
4362 else if (*letter == '\0')
4369 case 1: /* Parsing key */
4370 if (*letter == '=') {
4372 pair->value = letter + 1;
4374 } else if (*letter == ',' || *letter == '\0')
4379 case 2: /* Parsing value */
4382 else if (*letter == ',') {
4385 pair = &arglist->pairs[arglist->count];
4387 } else if (*letter == '\0') {
4390 pair = &arglist->pairs[arglist->count];
4395 case 3: /* Parsing list */
4398 else if (*letter == '\0')
4407 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4415 /* Single element, not a list */
4416 return callback(str, data);
4418 /* Sanity check, then strip the brackets */
4419 str_start = &str[strlen(str) - 1];
4420 if (*str_start != ']') {
4421 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4427 /* Process list elements */
4437 } else if (state == 1) {
4438 if (*str == ',' || *str == '\0') {
4439 if (str > str_start) {
4440 /* Non-empty string fragment */
4442 result = callback(str_start, data);
4455 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4456 const uint16_t max_list)
4458 uint16_t lo, hi, val;
4461 result = sscanf(str, "%hu-%hu", &lo, &hi);
4463 if (*len_list >= max_list)
4465 list[(*len_list)++] = lo;
4466 } else if (result == 2) {
4467 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4469 for (val = lo; val <= hi; val++) {
4470 if (*len_list >= max_list)
4472 list[(*len_list)++] = val;
4481 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4483 struct rte_eth_devargs *eth_da = data;
4485 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4486 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4489 int __rte_experimental
4490 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4492 struct rte_kvargs args;
4493 struct rte_kvargs_pair *pair;
4497 memset(eth_da, 0, sizeof(*eth_da));
4499 result = rte_eth_devargs_tokenise(&args, dargs);
4503 for (i = 0; i < args.count; i++) {
4504 pair = &args.pairs[i];
4505 if (strcmp("representor", pair->key) == 0) {
4506 result = rte_eth_devargs_parse_list(pair->value,
4507 rte_eth_devargs_parse_representor_ports,
4521 RTE_INIT(ethdev_init_log);
4523 ethdev_init_log(void)
4525 ethdev_logtype = rte_log_register("lib.ethdev");
4526 if (ethdev_logtype >= 0)
4527 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);