1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
169 static const struct {
172 } rte_burst_option_names[] = {
173 { RTE_ETH_BURST_SCALAR, "Scalar" },
174 { RTE_ETH_BURST_VECTOR, "Vector" },
176 { RTE_ETH_BURST_ALTIVEC, "AltiVec" },
177 { RTE_ETH_BURST_NEON, "Neon" },
178 { RTE_ETH_BURST_SSE, "SSE" },
179 { RTE_ETH_BURST_AVX2, "AVX2" },
180 { RTE_ETH_BURST_AVX512, "AVX512" },
182 { RTE_ETH_BURST_SCATTERED, "Scattered" },
183 { RTE_ETH_BURST_BULK_ALLOC, "Bulk Alloc" },
184 { RTE_ETH_BURST_SIMPLE, "Simple" },
185 { RTE_ETH_BURST_PER_QUEUE, "Per Queue" },
189 * The user application callback description.
191 * It contains callback address to be registered by user application,
192 * the pointer to the parameters for callback, and the event type.
194 struct rte_eth_dev_callback {
195 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
196 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
197 void *cb_arg; /**< Parameter for callback */
198 void *ret_param; /**< Return parameter */
199 enum rte_eth_event_type event; /**< Interrupt event type */
200 uint32_t active; /**< Callback is executing */
209 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
212 struct rte_devargs devargs = {.args = NULL};
213 const char *bus_param_key;
214 char *bus_str = NULL;
215 char *cls_str = NULL;
218 memset(iter, 0, sizeof(*iter));
221 * The devargs string may use various syntaxes:
222 * - 0000:08:00.0,representor=[1-3]
223 * - pci:0000:06:00.0,representor=[0,5]
224 * - class=eth,mac=00:11:22:33:44:55
225 * A new syntax is in development (not yet supported):
226 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
230 * Handle pure class filter (i.e. without any bus-level argument),
231 * from future new syntax.
232 * rte_devargs_parse() is not yet supporting the new syntax,
233 * that's why this simple case is temporarily parsed here.
235 #define iter_anybus_str "class=eth,"
236 if (strncmp(devargs_str, iter_anybus_str,
237 strlen(iter_anybus_str)) == 0) {
238 iter->cls_str = devargs_str + strlen(iter_anybus_str);
242 /* Split bus, device and parameters. */
243 ret = rte_devargs_parse(&devargs, devargs_str);
248 * Assume parameters of old syntax can match only at ethdev level.
249 * Extra parameters will be ignored, thanks to "+" prefix.
251 str_size = strlen(devargs.args) + 2;
252 cls_str = malloc(str_size);
253 if (cls_str == NULL) {
257 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
258 if (ret != str_size - 1) {
262 iter->cls_str = cls_str;
263 free(devargs.args); /* allocated by rte_devargs_parse() */
266 iter->bus = devargs.bus;
267 if (iter->bus->dev_iterate == NULL) {
272 /* Convert bus args to new syntax for use with new API dev_iterate. */
273 if (strcmp(iter->bus->name, "vdev") == 0) {
274 bus_param_key = "name";
275 } else if (strcmp(iter->bus->name, "pci") == 0) {
276 bus_param_key = "addr";
281 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
282 bus_str = malloc(str_size);
283 if (bus_str == NULL) {
287 ret = snprintf(bus_str, str_size, "%s=%s",
288 bus_param_key, devargs.name);
289 if (ret != str_size - 1) {
293 iter->bus_str = bus_str;
296 iter->cls = rte_class_find_by_name("eth");
301 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
310 rte_eth_iterator_next(struct rte_dev_iterator *iter)
312 if (iter->cls == NULL) /* invalid ethdev iterator */
313 return RTE_MAX_ETHPORTS;
315 do { /* loop to try all matching rte_device */
316 /* If not pure ethdev filter and */
317 if (iter->bus != NULL &&
318 /* not in middle of rte_eth_dev iteration, */
319 iter->class_device == NULL) {
320 /* get next rte_device to try. */
321 iter->device = iter->bus->dev_iterate(
322 iter->device, iter->bus_str, iter);
323 if (iter->device == NULL)
324 break; /* no more rte_device candidate */
326 /* A device is matching bus part, need to check ethdev part. */
327 iter->class_device = iter->cls->dev_iterate(
328 iter->class_device, iter->cls_str, iter);
329 if (iter->class_device != NULL)
330 return eth_dev_to_id(iter->class_device); /* match */
331 } while (iter->bus != NULL); /* need to try next rte_device */
333 /* No more ethdev port to iterate. */
334 rte_eth_iterator_cleanup(iter);
335 return RTE_MAX_ETHPORTS;
339 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
341 if (iter->bus_str == NULL)
342 return; /* nothing to free in pure class filter */
343 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
344 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
345 memset(iter, 0, sizeof(*iter));
349 rte_eth_find_next(uint16_t port_id)
351 while (port_id < RTE_MAX_ETHPORTS &&
352 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
355 if (port_id >= RTE_MAX_ETHPORTS)
356 return RTE_MAX_ETHPORTS;
362 * Macro to iterate over all valid ports for internal usage.
363 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
365 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
366 for (port_id = rte_eth_find_next(0); \
367 port_id < RTE_MAX_ETHPORTS; \
368 port_id = rte_eth_find_next(port_id + 1))
371 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
373 port_id = rte_eth_find_next(port_id);
374 while (port_id < RTE_MAX_ETHPORTS &&
375 rte_eth_devices[port_id].device != parent)
376 port_id = rte_eth_find_next(port_id + 1);
382 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
384 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
385 return rte_eth_find_next_of(port_id,
386 rte_eth_devices[ref_port_id].device);
390 rte_eth_dev_shared_data_prepare(void)
392 const unsigned flags = 0;
393 const struct rte_memzone *mz;
395 rte_spinlock_lock(&rte_eth_shared_data_lock);
397 if (rte_eth_dev_shared_data == NULL) {
398 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
399 /* Allocate port data and ownership shared memory. */
400 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
401 sizeof(*rte_eth_dev_shared_data),
402 rte_socket_id(), flags);
404 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
406 rte_panic("Cannot allocate ethdev shared data\n");
408 rte_eth_dev_shared_data = mz->addr;
409 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
410 rte_eth_dev_shared_data->next_owner_id =
411 RTE_ETH_DEV_NO_OWNER + 1;
412 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
413 memset(rte_eth_dev_shared_data->data, 0,
414 sizeof(rte_eth_dev_shared_data->data));
418 rte_spinlock_unlock(&rte_eth_shared_data_lock);
422 is_allocated(const struct rte_eth_dev *ethdev)
424 return ethdev->data->name[0] != '\0';
427 static struct rte_eth_dev *
428 _rte_eth_dev_allocated(const char *name)
432 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
433 if (rte_eth_devices[i].data != NULL &&
434 strcmp(rte_eth_devices[i].data->name, name) == 0)
435 return &rte_eth_devices[i];
441 rte_eth_dev_allocated(const char *name)
443 struct rte_eth_dev *ethdev;
445 rte_eth_dev_shared_data_prepare();
447 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
449 ethdev = _rte_eth_dev_allocated(name);
451 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
457 rte_eth_dev_find_free_port(void)
461 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
462 /* Using shared name field to find a free port. */
463 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
464 RTE_ASSERT(rte_eth_devices[i].state ==
469 return RTE_MAX_ETHPORTS;
472 static struct rte_eth_dev *
473 eth_dev_get(uint16_t port_id)
475 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
477 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
483 rte_eth_dev_allocate(const char *name)
486 struct rte_eth_dev *eth_dev = NULL;
489 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
491 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
495 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
496 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
500 rte_eth_dev_shared_data_prepare();
502 /* Synchronize port creation between primary and secondary threads. */
503 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
505 if (_rte_eth_dev_allocated(name) != NULL) {
507 "Ethernet device with name %s already allocated\n",
512 port_id = rte_eth_dev_find_free_port();
513 if (port_id == RTE_MAX_ETHPORTS) {
515 "Reached maximum number of Ethernet ports\n");
519 eth_dev = eth_dev_get(port_id);
520 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
521 eth_dev->data->port_id = port_id;
522 eth_dev->data->mtu = RTE_ETHER_MTU;
525 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
531 * Attach to a port already registered by the primary process, which
532 * makes sure that the same device would have the same port id both
533 * in the primary and secondary process.
536 rte_eth_dev_attach_secondary(const char *name)
539 struct rte_eth_dev *eth_dev = NULL;
541 rte_eth_dev_shared_data_prepare();
543 /* Synchronize port attachment to primary port creation and release. */
544 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
546 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
547 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
550 if (i == RTE_MAX_ETHPORTS) {
552 "Device %s is not driven by the primary process\n",
555 eth_dev = eth_dev_get(i);
556 RTE_ASSERT(eth_dev->data->port_id == i);
559 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
564 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
569 rte_eth_dev_shared_data_prepare();
571 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
572 _rte_eth_dev_callback_process(eth_dev,
573 RTE_ETH_EVENT_DESTROY, NULL);
575 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
577 eth_dev->state = RTE_ETH_DEV_UNUSED;
579 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
580 rte_free(eth_dev->data->rx_queues);
581 rte_free(eth_dev->data->tx_queues);
582 rte_free(eth_dev->data->mac_addrs);
583 rte_free(eth_dev->data->hash_mac_addrs);
584 rte_free(eth_dev->data->dev_private);
585 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
588 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
594 rte_eth_dev_is_valid_port(uint16_t port_id)
596 if (port_id >= RTE_MAX_ETHPORTS ||
597 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
604 rte_eth_is_valid_owner_id(uint64_t owner_id)
606 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
607 rte_eth_dev_shared_data->next_owner_id <= owner_id)
613 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
615 port_id = rte_eth_find_next(port_id);
616 while (port_id < RTE_MAX_ETHPORTS &&
617 rte_eth_devices[port_id].data->owner.id != owner_id)
618 port_id = rte_eth_find_next(port_id + 1);
624 rte_eth_dev_owner_new(uint64_t *owner_id)
626 rte_eth_dev_shared_data_prepare();
628 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
630 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
632 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
637 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
638 const struct rte_eth_dev_owner *new_owner)
640 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
641 struct rte_eth_dev_owner *port_owner;
643 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
644 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
649 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
650 !rte_eth_is_valid_owner_id(old_owner_id)) {
652 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
653 old_owner_id, new_owner->id);
657 port_owner = &rte_eth_devices[port_id].data->owner;
658 if (port_owner->id != old_owner_id) {
660 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
661 port_id, port_owner->name, port_owner->id);
665 /* can not truncate (same structure) */
666 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
668 port_owner->id = new_owner->id;
670 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
671 port_id, new_owner->name, new_owner->id);
677 rte_eth_dev_owner_set(const uint16_t port_id,
678 const struct rte_eth_dev_owner *owner)
682 rte_eth_dev_shared_data_prepare();
684 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
686 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
688 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
693 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
695 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
696 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
699 rte_eth_dev_shared_data_prepare();
701 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
703 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
705 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
710 rte_eth_dev_owner_delete(const uint64_t owner_id)
715 rte_eth_dev_shared_data_prepare();
717 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
719 if (rte_eth_is_valid_owner_id(owner_id)) {
720 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
721 if (rte_eth_devices[port_id].data->owner.id == owner_id)
722 memset(&rte_eth_devices[port_id].data->owner, 0,
723 sizeof(struct rte_eth_dev_owner));
724 RTE_ETHDEV_LOG(NOTICE,
725 "All port owners owned by %016"PRIx64" identifier have removed\n",
729 "Invalid owner id=%016"PRIx64"\n",
734 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
740 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
743 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
745 rte_eth_dev_shared_data_prepare();
747 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
749 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
750 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
754 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
757 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
762 rte_eth_dev_socket_id(uint16_t port_id)
764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
765 return rte_eth_devices[port_id].data->numa_node;
769 rte_eth_dev_get_sec_ctx(uint16_t port_id)
771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
772 return rte_eth_devices[port_id].security_ctx;
776 rte_eth_dev_count(void)
778 return rte_eth_dev_count_avail();
782 rte_eth_dev_count_avail(void)
789 RTE_ETH_FOREACH_DEV(p)
796 rte_eth_dev_count_total(void)
798 uint16_t port, count = 0;
800 RTE_ETH_FOREACH_VALID_DEV(port)
807 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
814 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
818 /* shouldn't check 'rte_eth_devices[i].data',
819 * because it might be overwritten by VDEV PMD */
820 tmp = rte_eth_dev_shared_data->data[port_id].name;
826 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
831 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
835 RTE_ETH_FOREACH_VALID_DEV(pid)
836 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
845 eth_err(uint16_t port_id, int ret)
849 if (rte_eth_dev_is_removed(port_id))
855 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
857 uint16_t old_nb_queues = dev->data->nb_rx_queues;
861 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
862 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
863 sizeof(dev->data->rx_queues[0]) * nb_queues,
864 RTE_CACHE_LINE_SIZE);
865 if (dev->data->rx_queues == NULL) {
866 dev->data->nb_rx_queues = 0;
869 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
872 rxq = dev->data->rx_queues;
874 for (i = nb_queues; i < old_nb_queues; i++)
875 (*dev->dev_ops->rx_queue_release)(rxq[i]);
876 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
877 RTE_CACHE_LINE_SIZE);
880 if (nb_queues > old_nb_queues) {
881 uint16_t new_qs = nb_queues - old_nb_queues;
883 memset(rxq + old_nb_queues, 0,
884 sizeof(rxq[0]) * new_qs);
887 dev->data->rx_queues = rxq;
889 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
892 rxq = dev->data->rx_queues;
894 for (i = nb_queues; i < old_nb_queues; i++)
895 (*dev->dev_ops->rx_queue_release)(rxq[i]);
897 rte_free(dev->data->rx_queues);
898 dev->data->rx_queues = NULL;
900 dev->data->nb_rx_queues = nb_queues;
905 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
907 struct rte_eth_dev *dev;
909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
911 dev = &rte_eth_devices[port_id];
912 if (!dev->data->dev_started) {
914 "Port %u must be started before start any queue\n",
919 if (rx_queue_id >= dev->data->nb_rx_queues) {
920 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
926 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
928 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
929 rx_queue_id, port_id);
933 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
939 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
941 struct rte_eth_dev *dev;
943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
945 dev = &rte_eth_devices[port_id];
946 if (rx_queue_id >= dev->data->nb_rx_queues) {
947 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
953 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
955 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
956 rx_queue_id, port_id);
960 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
965 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
967 struct rte_eth_dev *dev;
969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
971 dev = &rte_eth_devices[port_id];
972 if (!dev->data->dev_started) {
974 "Port %u must be started before start any queue\n",
979 if (tx_queue_id >= dev->data->nb_tx_queues) {
980 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
986 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
988 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
989 tx_queue_id, port_id);
993 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
997 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
999 struct rte_eth_dev *dev;
1001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1003 dev = &rte_eth_devices[port_id];
1004 if (tx_queue_id >= dev->data->nb_tx_queues) {
1005 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1011 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1012 RTE_ETHDEV_LOG(INFO,
1013 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1014 tx_queue_id, port_id);
1018 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1023 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1025 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1029 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1030 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1031 sizeof(dev->data->tx_queues[0]) * nb_queues,
1032 RTE_CACHE_LINE_SIZE);
1033 if (dev->data->tx_queues == NULL) {
1034 dev->data->nb_tx_queues = 0;
1037 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1040 txq = dev->data->tx_queues;
1042 for (i = nb_queues; i < old_nb_queues; i++)
1043 (*dev->dev_ops->tx_queue_release)(txq[i]);
1044 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1045 RTE_CACHE_LINE_SIZE);
1048 if (nb_queues > old_nb_queues) {
1049 uint16_t new_qs = nb_queues - old_nb_queues;
1051 memset(txq + old_nb_queues, 0,
1052 sizeof(txq[0]) * new_qs);
1055 dev->data->tx_queues = txq;
1057 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1060 txq = dev->data->tx_queues;
1062 for (i = nb_queues; i < old_nb_queues; i++)
1063 (*dev->dev_ops->tx_queue_release)(txq[i]);
1065 rte_free(dev->data->tx_queues);
1066 dev->data->tx_queues = NULL;
1068 dev->data->nb_tx_queues = nb_queues;
1073 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1076 case ETH_SPEED_NUM_10M:
1077 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1078 case ETH_SPEED_NUM_100M:
1079 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1080 case ETH_SPEED_NUM_1G:
1081 return ETH_LINK_SPEED_1G;
1082 case ETH_SPEED_NUM_2_5G:
1083 return ETH_LINK_SPEED_2_5G;
1084 case ETH_SPEED_NUM_5G:
1085 return ETH_LINK_SPEED_5G;
1086 case ETH_SPEED_NUM_10G:
1087 return ETH_LINK_SPEED_10G;
1088 case ETH_SPEED_NUM_20G:
1089 return ETH_LINK_SPEED_20G;
1090 case ETH_SPEED_NUM_25G:
1091 return ETH_LINK_SPEED_25G;
1092 case ETH_SPEED_NUM_40G:
1093 return ETH_LINK_SPEED_40G;
1094 case ETH_SPEED_NUM_50G:
1095 return ETH_LINK_SPEED_50G;
1096 case ETH_SPEED_NUM_56G:
1097 return ETH_LINK_SPEED_56G;
1098 case ETH_SPEED_NUM_100G:
1099 return ETH_LINK_SPEED_100G;
1106 rte_eth_dev_rx_offload_name(uint64_t offload)
1108 const char *name = "UNKNOWN";
1111 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1112 if (offload == rte_rx_offload_names[i].offload) {
1113 name = rte_rx_offload_names[i].name;
1122 rte_eth_dev_tx_offload_name(uint64_t offload)
1124 const char *name = "UNKNOWN";
1127 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1128 if (offload == rte_tx_offload_names[i].offload) {
1129 name = rte_tx_offload_names[i].name;
1138 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1139 const struct rte_eth_conf *dev_conf)
1141 struct rte_eth_dev *dev;
1142 struct rte_eth_dev_info dev_info;
1143 struct rte_eth_conf orig_conf;
1147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1149 dev = &rte_eth_devices[port_id];
1151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1153 if (dev->data->dev_started) {
1155 "Port %u must be stopped to allow configuration\n",
1160 /* Store original config, as rollback required on failure */
1161 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1164 * Copy the dev_conf parameter into the dev structure.
1165 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1167 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1169 ret = rte_eth_dev_info_get(port_id, &dev_info);
1173 /* If number of queues specified by application for both Rx and Tx is
1174 * zero, use driver preferred values. This cannot be done individually
1175 * as it is valid for either Tx or Rx (but not both) to be zero.
1176 * If driver does not provide any preferred valued, fall back on
1179 if (nb_rx_q == 0 && nb_tx_q == 0) {
1180 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1182 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1183 nb_tx_q = dev_info.default_txportconf.nb_queues;
1185 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1188 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1190 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1191 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1196 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1198 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1199 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1205 * Check that the numbers of RX and TX queues are not greater
1206 * than the maximum number of RX and TX queues supported by the
1207 * configured device.
1209 if (nb_rx_q > dev_info.max_rx_queues) {
1210 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1211 port_id, nb_rx_q, dev_info.max_rx_queues);
1216 if (nb_tx_q > dev_info.max_tx_queues) {
1217 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1218 port_id, nb_tx_q, dev_info.max_tx_queues);
1223 /* Check that the device supports requested interrupts */
1224 if ((dev_conf->intr_conf.lsc == 1) &&
1225 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1226 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1227 dev->device->driver->name);
1231 if ((dev_conf->intr_conf.rmv == 1) &&
1232 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1233 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1234 dev->device->driver->name);
1240 * If jumbo frames are enabled, check that the maximum RX packet
1241 * length is supported by the configured device.
1243 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1244 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1246 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1247 port_id, dev_conf->rxmode.max_rx_pkt_len,
1248 dev_info.max_rx_pktlen);
1251 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1253 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1254 port_id, dev_conf->rxmode.max_rx_pkt_len,
1255 (unsigned int)RTE_ETHER_MIN_LEN);
1260 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1261 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1262 /* Use default value */
1263 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1267 /* Any requested offloading must be within its device capabilities */
1268 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1269 dev_conf->rxmode.offloads) {
1271 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1272 "capabilities 0x%"PRIx64" in %s()\n",
1273 port_id, dev_conf->rxmode.offloads,
1274 dev_info.rx_offload_capa,
1279 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1280 dev_conf->txmode.offloads) {
1282 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1283 "capabilities 0x%"PRIx64" in %s()\n",
1284 port_id, dev_conf->txmode.offloads,
1285 dev_info.tx_offload_capa,
1291 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1292 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1294 /* Check that device supports requested rss hash functions. */
1295 if ((dev_info.flow_type_rss_offloads |
1296 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1297 dev_info.flow_type_rss_offloads) {
1299 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1300 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1301 dev_info.flow_type_rss_offloads);
1307 * Setup new number of RX/TX queues and reconfigure device.
1309 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1312 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1318 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1321 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1323 rte_eth_dev_rx_queue_config(dev, 0);
1328 diag = (*dev->dev_ops->dev_configure)(dev);
1330 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1332 rte_eth_dev_rx_queue_config(dev, 0);
1333 rte_eth_dev_tx_queue_config(dev, 0);
1334 ret = eth_err(port_id, diag);
1338 /* Initialize Rx profiling if enabled at compilation time. */
1339 diag = __rte_eth_dev_profile_init(port_id, dev);
1341 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1343 rte_eth_dev_rx_queue_config(dev, 0);
1344 rte_eth_dev_tx_queue_config(dev, 0);
1345 ret = eth_err(port_id, diag);
1352 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1358 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1360 if (dev->data->dev_started) {
1361 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1362 dev->data->port_id);
1366 rte_eth_dev_rx_queue_config(dev, 0);
1367 rte_eth_dev_tx_queue_config(dev, 0);
1369 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1373 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1374 struct rte_eth_dev_info *dev_info)
1376 struct rte_ether_addr *addr;
1381 /* replay MAC address configuration including default MAC */
1382 addr = &dev->data->mac_addrs[0];
1383 if (*dev->dev_ops->mac_addr_set != NULL)
1384 (*dev->dev_ops->mac_addr_set)(dev, addr);
1385 else if (*dev->dev_ops->mac_addr_add != NULL)
1386 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1388 if (*dev->dev_ops->mac_addr_add != NULL) {
1389 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1390 addr = &dev->data->mac_addrs[i];
1392 /* skip zero address */
1393 if (rte_is_zero_ether_addr(addr))
1397 pool_mask = dev->data->mac_pool_sel[i];
1400 if (pool_mask & 1ULL)
1401 (*dev->dev_ops->mac_addr_add)(dev,
1405 } while (pool_mask);
1411 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1412 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1416 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1417 rte_eth_dev_mac_restore(dev, dev_info);
1419 /* replay promiscuous configuration */
1421 * use callbacks directly since we don't need port_id check and
1422 * would like to bypass the same value set
1424 if (rte_eth_promiscuous_get(port_id) == 1 &&
1425 *dev->dev_ops->promiscuous_enable != NULL) {
1426 ret = eth_err(port_id,
1427 (*dev->dev_ops->promiscuous_enable)(dev));
1428 if (ret != 0 && ret != -ENOTSUP) {
1430 "Failed to enable promiscuous mode for device (port %u): %s\n",
1431 port_id, rte_strerror(-ret));
1434 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1435 *dev->dev_ops->promiscuous_disable != NULL) {
1436 ret = eth_err(port_id,
1437 (*dev->dev_ops->promiscuous_disable)(dev));
1438 if (ret != 0 && ret != -ENOTSUP) {
1440 "Failed to disable promiscuous mode for device (port %u): %s\n",
1441 port_id, rte_strerror(-ret));
1446 /* replay all multicast configuration */
1448 * use callbacks directly since we don't need port_id check and
1449 * would like to bypass the same value set
1451 if (rte_eth_allmulticast_get(port_id) == 1 &&
1452 *dev->dev_ops->allmulticast_enable != NULL) {
1453 ret = eth_err(port_id,
1454 (*dev->dev_ops->allmulticast_enable)(dev));
1455 if (ret != 0 && ret != -ENOTSUP) {
1457 "Failed to enable allmulticast mode for device (port %u): %s\n",
1458 port_id, rte_strerror(-ret));
1461 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1462 *dev->dev_ops->allmulticast_disable != NULL) {
1463 ret = eth_err(port_id,
1464 (*dev->dev_ops->allmulticast_disable)(dev));
1465 if (ret != 0 && ret != -ENOTSUP) {
1467 "Failed to disable allmulticast mode for device (port %u): %s\n",
1468 port_id, rte_strerror(-ret));
1477 rte_eth_dev_start(uint16_t port_id)
1479 struct rte_eth_dev *dev;
1480 struct rte_eth_dev_info dev_info;
1484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1486 dev = &rte_eth_devices[port_id];
1488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1490 if (dev->data->dev_started != 0) {
1491 RTE_ETHDEV_LOG(INFO,
1492 "Device with port_id=%"PRIu16" already started\n",
1497 ret = rte_eth_dev_info_get(port_id, &dev_info);
1501 /* Lets restore MAC now if device does not support live change */
1502 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1503 rte_eth_dev_mac_restore(dev, &dev_info);
1505 diag = (*dev->dev_ops->dev_start)(dev);
1507 dev->data->dev_started = 1;
1509 return eth_err(port_id, diag);
1511 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1514 "Error during restoring configuration for device (port %u): %s\n",
1515 port_id, rte_strerror(-ret));
1516 rte_eth_dev_stop(port_id);
1520 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1522 (*dev->dev_ops->link_update)(dev, 0);
1528 rte_eth_dev_stop(uint16_t port_id)
1530 struct rte_eth_dev *dev;
1532 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1533 dev = &rte_eth_devices[port_id];
1535 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1537 if (dev->data->dev_started == 0) {
1538 RTE_ETHDEV_LOG(INFO,
1539 "Device with port_id=%"PRIu16" already stopped\n",
1544 dev->data->dev_started = 0;
1545 (*dev->dev_ops->dev_stop)(dev);
1549 rte_eth_dev_set_link_up(uint16_t port_id)
1551 struct rte_eth_dev *dev;
1553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1555 dev = &rte_eth_devices[port_id];
1557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1558 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1562 rte_eth_dev_set_link_down(uint16_t port_id)
1564 struct rte_eth_dev *dev;
1566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1568 dev = &rte_eth_devices[port_id];
1570 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1571 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1575 rte_eth_dev_close(uint16_t port_id)
1577 struct rte_eth_dev *dev;
1579 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1580 dev = &rte_eth_devices[port_id];
1582 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1583 dev->data->dev_started = 0;
1584 (*dev->dev_ops->dev_close)(dev);
1586 /* check behaviour flag - temporary for PMD migration */
1587 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1588 /* new behaviour: send event + reset state + free all data */
1589 rte_eth_dev_release_port(dev);
1592 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1593 "The driver %s should migrate to the new behaviour.\n",
1594 dev->device->driver->name);
1595 /* old behaviour: only free queue arrays */
1596 dev->data->nb_rx_queues = 0;
1597 rte_free(dev->data->rx_queues);
1598 dev->data->rx_queues = NULL;
1599 dev->data->nb_tx_queues = 0;
1600 rte_free(dev->data->tx_queues);
1601 dev->data->tx_queues = NULL;
1605 rte_eth_dev_reset(uint16_t port_id)
1607 struct rte_eth_dev *dev;
1610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1611 dev = &rte_eth_devices[port_id];
1613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1615 rte_eth_dev_stop(port_id);
1616 ret = dev->dev_ops->dev_reset(dev);
1618 return eth_err(port_id, ret);
1622 rte_eth_dev_is_removed(uint16_t port_id)
1624 struct rte_eth_dev *dev;
1627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1629 dev = &rte_eth_devices[port_id];
1631 if (dev->state == RTE_ETH_DEV_REMOVED)
1634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1636 ret = dev->dev_ops->is_removed(dev);
1638 /* Device is physically removed. */
1639 dev->state = RTE_ETH_DEV_REMOVED;
1645 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1646 uint16_t nb_rx_desc, unsigned int socket_id,
1647 const struct rte_eth_rxconf *rx_conf,
1648 struct rte_mempool *mp)
1651 uint32_t mbp_buf_size;
1652 struct rte_eth_dev *dev;
1653 struct rte_eth_dev_info dev_info;
1654 struct rte_eth_rxconf local_conf;
1657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1659 dev = &rte_eth_devices[port_id];
1660 if (rx_queue_id >= dev->data->nb_rx_queues) {
1661 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1666 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1673 * Check the size of the mbuf data buffer.
1674 * This value must be provided in the private data of the memory pool.
1675 * First check that the memory pool has a valid private data.
1677 ret = rte_eth_dev_info_get(port_id, &dev_info);
1681 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1682 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1683 mp->name, (int)mp->private_data_size,
1684 (int)sizeof(struct rte_pktmbuf_pool_private));
1687 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1689 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1691 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1692 mp->name, (int)mbp_buf_size,
1693 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1694 (int)RTE_PKTMBUF_HEADROOM,
1695 (int)dev_info.min_rx_bufsize);
1699 /* Use default specified by driver, if nb_rx_desc is zero */
1700 if (nb_rx_desc == 0) {
1701 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1702 /* If driver default is also zero, fall back on EAL default */
1703 if (nb_rx_desc == 0)
1704 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1707 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1708 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1709 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1712 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1713 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1714 dev_info.rx_desc_lim.nb_min,
1715 dev_info.rx_desc_lim.nb_align);
1719 if (dev->data->dev_started &&
1720 !(dev_info.dev_capa &
1721 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1724 if (dev->data->dev_started &&
1725 (dev->data->rx_queue_state[rx_queue_id] !=
1726 RTE_ETH_QUEUE_STATE_STOPPED))
1729 rxq = dev->data->rx_queues;
1730 if (rxq[rx_queue_id]) {
1731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1733 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1734 rxq[rx_queue_id] = NULL;
1737 if (rx_conf == NULL)
1738 rx_conf = &dev_info.default_rxconf;
1740 local_conf = *rx_conf;
1743 * If an offloading has already been enabled in
1744 * rte_eth_dev_configure(), it has been enabled on all queues,
1745 * so there is no need to enable it in this queue again.
1746 * The local_conf.offloads input to underlying PMD only carries
1747 * those offloadings which are only enabled on this queue and
1748 * not enabled on all queues.
1750 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1753 * New added offloadings for this queue are those not enabled in
1754 * rte_eth_dev_configure() and they must be per-queue type.
1755 * A pure per-port offloading can't be enabled on a queue while
1756 * disabled on another queue. A pure per-port offloading can't
1757 * be enabled for any queue as new added one if it hasn't been
1758 * enabled in rte_eth_dev_configure().
1760 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1761 local_conf.offloads) {
1763 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1764 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1765 port_id, rx_queue_id, local_conf.offloads,
1766 dev_info.rx_queue_offload_capa,
1771 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1772 socket_id, &local_conf, mp);
1774 if (!dev->data->min_rx_buf_size ||
1775 dev->data->min_rx_buf_size > mbp_buf_size)
1776 dev->data->min_rx_buf_size = mbp_buf_size;
1779 return eth_err(port_id, ret);
1783 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1784 uint16_t nb_tx_desc, unsigned int socket_id,
1785 const struct rte_eth_txconf *tx_conf)
1787 struct rte_eth_dev *dev;
1788 struct rte_eth_dev_info dev_info;
1789 struct rte_eth_txconf local_conf;
1793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1795 dev = &rte_eth_devices[port_id];
1796 if (tx_queue_id >= dev->data->nb_tx_queues) {
1797 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1803 ret = rte_eth_dev_info_get(port_id, &dev_info);
1807 /* Use default specified by driver, if nb_tx_desc is zero */
1808 if (nb_tx_desc == 0) {
1809 nb_tx_desc = dev_info.default_txportconf.ring_size;
1810 /* If driver default is zero, fall back on EAL default */
1811 if (nb_tx_desc == 0)
1812 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1814 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1815 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1816 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1818 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1819 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1820 dev_info.tx_desc_lim.nb_min,
1821 dev_info.tx_desc_lim.nb_align);
1825 if (dev->data->dev_started &&
1826 !(dev_info.dev_capa &
1827 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1830 if (dev->data->dev_started &&
1831 (dev->data->tx_queue_state[tx_queue_id] !=
1832 RTE_ETH_QUEUE_STATE_STOPPED))
1835 txq = dev->data->tx_queues;
1836 if (txq[tx_queue_id]) {
1837 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1839 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1840 txq[tx_queue_id] = NULL;
1843 if (tx_conf == NULL)
1844 tx_conf = &dev_info.default_txconf;
1846 local_conf = *tx_conf;
1849 * If an offloading has already been enabled in
1850 * rte_eth_dev_configure(), it has been enabled on all queues,
1851 * so there is no need to enable it in this queue again.
1852 * The local_conf.offloads input to underlying PMD only carries
1853 * those offloadings which are only enabled on this queue and
1854 * not enabled on all queues.
1856 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1859 * New added offloadings for this queue are those not enabled in
1860 * rte_eth_dev_configure() and they must be per-queue type.
1861 * A pure per-port offloading can't be enabled on a queue while
1862 * disabled on another queue. A pure per-port offloading can't
1863 * be enabled for any queue as new added one if it hasn't been
1864 * enabled in rte_eth_dev_configure().
1866 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1867 local_conf.offloads) {
1869 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1870 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1871 port_id, tx_queue_id, local_conf.offloads,
1872 dev_info.tx_queue_offload_capa,
1877 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1878 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1882 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1883 void *userdata __rte_unused)
1887 for (i = 0; i < unsent; i++)
1888 rte_pktmbuf_free(pkts[i]);
1892 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1895 uint64_t *count = userdata;
1898 for (i = 0; i < unsent; i++)
1899 rte_pktmbuf_free(pkts[i]);
1905 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1906 buffer_tx_error_fn cbfn, void *userdata)
1908 buffer->error_callback = cbfn;
1909 buffer->error_userdata = userdata;
1914 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1921 buffer->size = size;
1922 if (buffer->error_callback == NULL) {
1923 ret = rte_eth_tx_buffer_set_err_callback(
1924 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1931 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1933 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1936 /* Validate Input Data. Bail if not valid or not supported. */
1937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1938 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1940 /* Call driver to free pending mbufs. */
1941 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1943 return eth_err(port_id, ret);
1947 rte_eth_promiscuous_enable(uint16_t port_id)
1949 struct rte_eth_dev *dev;
1952 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1953 dev = &rte_eth_devices[port_id];
1955 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
1957 if (dev->data->promiscuous == 0) {
1958 diag = (*dev->dev_ops->promiscuous_enable)(dev);
1959 dev->data->promiscuous = (diag == 0) ? 1 : 0;
1962 return eth_err(port_id, diag);
1966 rte_eth_promiscuous_disable(uint16_t port_id)
1968 struct rte_eth_dev *dev;
1971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1972 dev = &rte_eth_devices[port_id];
1974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
1976 if (dev->data->promiscuous == 1) {
1977 dev->data->promiscuous = 0;
1978 diag = (*dev->dev_ops->promiscuous_disable)(dev);
1980 dev->data->promiscuous = 1;
1983 return eth_err(port_id, diag);
1987 rte_eth_promiscuous_get(uint16_t port_id)
1989 struct rte_eth_dev *dev;
1991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1993 dev = &rte_eth_devices[port_id];
1994 return dev->data->promiscuous;
1998 rte_eth_allmulticast_enable(uint16_t port_id)
2000 struct rte_eth_dev *dev;
2003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2004 dev = &rte_eth_devices[port_id];
2006 if (dev->data->all_multicast == 1)
2009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2010 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2011 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2013 return eth_err(port_id, diag);
2017 rte_eth_allmulticast_disable(uint16_t port_id)
2019 struct rte_eth_dev *dev;
2022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2023 dev = &rte_eth_devices[port_id];
2025 if (dev->data->all_multicast == 0)
2028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2029 dev->data->all_multicast = 0;
2030 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2032 dev->data->all_multicast = 1;
2034 return eth_err(port_id, diag);
2038 rte_eth_allmulticast_get(uint16_t port_id)
2040 struct rte_eth_dev *dev;
2042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2044 dev = &rte_eth_devices[port_id];
2045 return dev->data->all_multicast;
2049 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2051 struct rte_eth_dev *dev;
2053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2054 dev = &rte_eth_devices[port_id];
2056 if (dev->data->dev_conf.intr_conf.lsc &&
2057 dev->data->dev_started)
2058 rte_eth_linkstatus_get(dev, eth_link);
2060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2061 (*dev->dev_ops->link_update)(dev, 1);
2062 *eth_link = dev->data->dev_link;
2069 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2071 struct rte_eth_dev *dev;
2073 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2074 dev = &rte_eth_devices[port_id];
2076 if (dev->data->dev_conf.intr_conf.lsc &&
2077 dev->data->dev_started)
2078 rte_eth_linkstatus_get(dev, eth_link);
2080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2081 (*dev->dev_ops->link_update)(dev, 0);
2082 *eth_link = dev->data->dev_link;
2089 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2091 struct rte_eth_dev *dev;
2093 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2095 dev = &rte_eth_devices[port_id];
2096 memset(stats, 0, sizeof(*stats));
2098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2099 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2100 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2104 rte_eth_stats_reset(uint16_t port_id)
2106 struct rte_eth_dev *dev;
2109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2110 dev = &rte_eth_devices[port_id];
2112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2113 ret = (*dev->dev_ops->stats_reset)(dev);
2115 return eth_err(port_id, ret);
2117 dev->data->rx_mbuf_alloc_failed = 0;
2123 get_xstats_basic_count(struct rte_eth_dev *dev)
2125 uint16_t nb_rxqs, nb_txqs;
2128 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2129 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2131 count = RTE_NB_STATS;
2132 count += nb_rxqs * RTE_NB_RXQ_STATS;
2133 count += nb_txqs * RTE_NB_TXQ_STATS;
2139 get_xstats_count(uint16_t port_id)
2141 struct rte_eth_dev *dev;
2144 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2145 dev = &rte_eth_devices[port_id];
2146 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2147 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2150 return eth_err(port_id, count);
2152 if (dev->dev_ops->xstats_get_names != NULL) {
2153 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2155 return eth_err(port_id, count);
2160 count += get_xstats_basic_count(dev);
2166 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2169 int cnt_xstats, idx_xstat;
2171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2174 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2179 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2184 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2185 if (cnt_xstats < 0) {
2186 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2190 /* Get id-name lookup table */
2191 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2193 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2194 port_id, xstats_names, cnt_xstats, NULL)) {
2195 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2199 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2200 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2209 /* retrieve basic stats names */
2211 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2212 struct rte_eth_xstat_name *xstats_names)
2214 int cnt_used_entries = 0;
2215 uint32_t idx, id_queue;
2218 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2219 strlcpy(xstats_names[cnt_used_entries].name,
2220 rte_stats_strings[idx].name,
2221 sizeof(xstats_names[0].name));
2224 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2225 for (id_queue = 0; id_queue < num_q; id_queue++) {
2226 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2227 snprintf(xstats_names[cnt_used_entries].name,
2228 sizeof(xstats_names[0].name),
2230 id_queue, rte_rxq_stats_strings[idx].name);
2235 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2236 for (id_queue = 0; id_queue < num_q; id_queue++) {
2237 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2238 snprintf(xstats_names[cnt_used_entries].name,
2239 sizeof(xstats_names[0].name),
2241 id_queue, rte_txq_stats_strings[idx].name);
2245 return cnt_used_entries;
2248 /* retrieve ethdev extended statistics names */
2250 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2251 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2254 struct rte_eth_xstat_name *xstats_names_copy;
2255 unsigned int no_basic_stat_requested = 1;
2256 unsigned int no_ext_stat_requested = 1;
2257 unsigned int expected_entries;
2258 unsigned int basic_count;
2259 struct rte_eth_dev *dev;
2263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2264 dev = &rte_eth_devices[port_id];
2266 basic_count = get_xstats_basic_count(dev);
2267 ret = get_xstats_count(port_id);
2270 expected_entries = (unsigned int)ret;
2272 /* Return max number of stats if no ids given */
2275 return expected_entries;
2276 else if (xstats_names && size < expected_entries)
2277 return expected_entries;
2280 if (ids && !xstats_names)
2283 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2284 uint64_t ids_copy[size];
2286 for (i = 0; i < size; i++) {
2287 if (ids[i] < basic_count) {
2288 no_basic_stat_requested = 0;
2293 * Convert ids to xstats ids that PMD knows.
2294 * ids known by user are basic + extended stats.
2296 ids_copy[i] = ids[i] - basic_count;
2299 if (no_basic_stat_requested)
2300 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2301 xstats_names, ids_copy, size);
2304 /* Retrieve all stats */
2306 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2308 if (num_stats < 0 || num_stats > (int)expected_entries)
2311 return expected_entries;
2314 xstats_names_copy = calloc(expected_entries,
2315 sizeof(struct rte_eth_xstat_name));
2317 if (!xstats_names_copy) {
2318 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2323 for (i = 0; i < size; i++) {
2324 if (ids[i] >= basic_count) {
2325 no_ext_stat_requested = 0;
2331 /* Fill xstats_names_copy structure */
2332 if (ids && no_ext_stat_requested) {
2333 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2335 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2338 free(xstats_names_copy);
2344 for (i = 0; i < size; i++) {
2345 if (ids[i] >= expected_entries) {
2346 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2347 free(xstats_names_copy);
2350 xstats_names[i] = xstats_names_copy[ids[i]];
2353 free(xstats_names_copy);
2358 rte_eth_xstats_get_names(uint16_t port_id,
2359 struct rte_eth_xstat_name *xstats_names,
2362 struct rte_eth_dev *dev;
2363 int cnt_used_entries;
2364 int cnt_expected_entries;
2365 int cnt_driver_entries;
2367 cnt_expected_entries = get_xstats_count(port_id);
2368 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2369 (int)size < cnt_expected_entries)
2370 return cnt_expected_entries;
2372 /* port_id checked in get_xstats_count() */
2373 dev = &rte_eth_devices[port_id];
2375 cnt_used_entries = rte_eth_basic_stats_get_names(
2378 if (dev->dev_ops->xstats_get_names != NULL) {
2379 /* If there are any driver-specific xstats, append them
2382 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2384 xstats_names + cnt_used_entries,
2385 size - cnt_used_entries);
2386 if (cnt_driver_entries < 0)
2387 return eth_err(port_id, cnt_driver_entries);
2388 cnt_used_entries += cnt_driver_entries;
2391 return cnt_used_entries;
2396 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2398 struct rte_eth_dev *dev;
2399 struct rte_eth_stats eth_stats;
2400 unsigned int count = 0, i, q;
2401 uint64_t val, *stats_ptr;
2402 uint16_t nb_rxqs, nb_txqs;
2405 ret = rte_eth_stats_get(port_id, ð_stats);
2409 dev = &rte_eth_devices[port_id];
2411 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2412 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2415 for (i = 0; i < RTE_NB_STATS; i++) {
2416 stats_ptr = RTE_PTR_ADD(ð_stats,
2417 rte_stats_strings[i].offset);
2419 xstats[count++].value = val;
2423 for (q = 0; q < nb_rxqs; q++) {
2424 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2425 stats_ptr = RTE_PTR_ADD(ð_stats,
2426 rte_rxq_stats_strings[i].offset +
2427 q * sizeof(uint64_t));
2429 xstats[count++].value = val;
2434 for (q = 0; q < nb_txqs; q++) {
2435 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2436 stats_ptr = RTE_PTR_ADD(ð_stats,
2437 rte_txq_stats_strings[i].offset +
2438 q * sizeof(uint64_t));
2440 xstats[count++].value = val;
2446 /* retrieve ethdev extended statistics */
2448 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2449 uint64_t *values, unsigned int size)
2451 unsigned int no_basic_stat_requested = 1;
2452 unsigned int no_ext_stat_requested = 1;
2453 unsigned int num_xstats_filled;
2454 unsigned int basic_count;
2455 uint16_t expected_entries;
2456 struct rte_eth_dev *dev;
2460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2461 ret = get_xstats_count(port_id);
2464 expected_entries = (uint16_t)ret;
2465 struct rte_eth_xstat xstats[expected_entries];
2466 dev = &rte_eth_devices[port_id];
2467 basic_count = get_xstats_basic_count(dev);
2469 /* Return max number of stats if no ids given */
2472 return expected_entries;
2473 else if (values && size < expected_entries)
2474 return expected_entries;
2480 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2481 unsigned int basic_count = get_xstats_basic_count(dev);
2482 uint64_t ids_copy[size];
2484 for (i = 0; i < size; i++) {
2485 if (ids[i] < basic_count) {
2486 no_basic_stat_requested = 0;
2491 * Convert ids to xstats ids that PMD knows.
2492 * ids known by user are basic + extended stats.
2494 ids_copy[i] = ids[i] - basic_count;
2497 if (no_basic_stat_requested)
2498 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2503 for (i = 0; i < size; i++) {
2504 if (ids[i] >= basic_count) {
2505 no_ext_stat_requested = 0;
2511 /* Fill the xstats structure */
2512 if (ids && no_ext_stat_requested)
2513 ret = rte_eth_basic_stats_get(port_id, xstats);
2515 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2519 num_xstats_filled = (unsigned int)ret;
2521 /* Return all stats */
2523 for (i = 0; i < num_xstats_filled; i++)
2524 values[i] = xstats[i].value;
2525 return expected_entries;
2529 for (i = 0; i < size; i++) {
2530 if (ids[i] >= expected_entries) {
2531 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2534 values[i] = xstats[ids[i]].value;
2540 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2543 struct rte_eth_dev *dev;
2544 unsigned int count = 0, i;
2545 signed int xcount = 0;
2546 uint16_t nb_rxqs, nb_txqs;
2549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2551 dev = &rte_eth_devices[port_id];
2553 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2554 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2556 /* Return generic statistics */
2557 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2558 (nb_txqs * RTE_NB_TXQ_STATS);
2560 /* implemented by the driver */
2561 if (dev->dev_ops->xstats_get != NULL) {
2562 /* Retrieve the xstats from the driver at the end of the
2565 xcount = (*dev->dev_ops->xstats_get)(dev,
2566 xstats ? xstats + count : NULL,
2567 (n > count) ? n - count : 0);
2570 return eth_err(port_id, xcount);
2573 if (n < count + xcount || xstats == NULL)
2574 return count + xcount;
2576 /* now fill the xstats structure */
2577 ret = rte_eth_basic_stats_get(port_id, xstats);
2582 for (i = 0; i < count; i++)
2584 /* add an offset to driver-specific stats */
2585 for ( ; i < count + xcount; i++)
2586 xstats[i].id += count;
2588 return count + xcount;
2591 /* reset ethdev extended statistics */
2593 rte_eth_xstats_reset(uint16_t port_id)
2595 struct rte_eth_dev *dev;
2597 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2598 dev = &rte_eth_devices[port_id];
2600 /* implemented by the driver */
2601 if (dev->dev_ops->xstats_reset != NULL)
2602 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2604 /* fallback to default */
2605 return rte_eth_stats_reset(port_id);
2609 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2612 struct rte_eth_dev *dev;
2614 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2616 dev = &rte_eth_devices[port_id];
2618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2620 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2623 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2626 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2629 return (*dev->dev_ops->queue_stats_mapping_set)
2630 (dev, queue_id, stat_idx, is_rx);
2635 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2638 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2639 stat_idx, STAT_QMAP_TX));
2644 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2647 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2648 stat_idx, STAT_QMAP_RX));
2652 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2657 dev = &rte_eth_devices[port_id];
2659 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2660 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2661 fw_version, fw_size));
2665 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2667 struct rte_eth_dev *dev;
2668 const struct rte_eth_desc_lim lim = {
2669 .nb_max = UINT16_MAX,
2672 .nb_seg_max = UINT16_MAX,
2673 .nb_mtu_seg_max = UINT16_MAX,
2678 * Init dev_info before port_id check since caller does not have
2679 * return status and does not know if get is successful or not.
2681 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2684 dev = &rte_eth_devices[port_id];
2686 dev_info->rx_desc_lim = lim;
2687 dev_info->tx_desc_lim = lim;
2688 dev_info->device = dev->device;
2689 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2690 dev_info->max_mtu = UINT16_MAX;
2692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2693 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2695 /* Cleanup already filled in device information */
2696 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2697 return eth_err(port_id, diag);
2700 dev_info->driver_name = dev->device->driver->name;
2701 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2702 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2704 dev_info->dev_flags = &dev->data->dev_flags;
2710 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2711 uint32_t *ptypes, int num)
2714 struct rte_eth_dev *dev;
2715 const uint32_t *all_ptypes;
2717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2718 dev = &rte_eth_devices[port_id];
2719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2720 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2725 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2726 if (all_ptypes[i] & ptype_mask) {
2728 ptypes[j] = all_ptypes[i];
2736 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2738 struct rte_eth_dev *dev;
2740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2741 dev = &rte_eth_devices[port_id];
2742 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2749 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2751 struct rte_eth_dev *dev;
2753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2755 dev = &rte_eth_devices[port_id];
2756 *mtu = dev->data->mtu;
2761 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2764 struct rte_eth_dev_info dev_info;
2765 struct rte_eth_dev *dev;
2767 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2768 dev = &rte_eth_devices[port_id];
2769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2772 * Check if the device supports dev_infos_get, if it does not
2773 * skip min_mtu/max_mtu validation here as this requires values
2774 * that are populated within the call to rte_eth_dev_info_get()
2775 * which relies on dev->dev_ops->dev_infos_get.
2777 if (*dev->dev_ops->dev_infos_get != NULL) {
2778 ret = rte_eth_dev_info_get(port_id, &dev_info);
2782 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2786 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2788 dev->data->mtu = mtu;
2790 return eth_err(port_id, ret);
2794 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2796 struct rte_eth_dev *dev;
2799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2800 dev = &rte_eth_devices[port_id];
2801 if (!(dev->data->dev_conf.rxmode.offloads &
2802 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2803 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2808 if (vlan_id > 4095) {
2809 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2813 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2815 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2817 struct rte_vlan_filter_conf *vfc;
2821 vfc = &dev->data->vlan_filter_conf;
2822 vidx = vlan_id / 64;
2823 vbit = vlan_id % 64;
2826 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2828 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2831 return eth_err(port_id, ret);
2835 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2838 struct rte_eth_dev *dev;
2840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2841 dev = &rte_eth_devices[port_id];
2842 if (rx_queue_id >= dev->data->nb_rx_queues) {
2843 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2848 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2854 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2855 enum rte_vlan_type vlan_type,
2858 struct rte_eth_dev *dev;
2860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2861 dev = &rte_eth_devices[port_id];
2862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2864 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2869 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2871 struct rte_eth_dev *dev;
2875 uint64_t orig_offloads;
2876 uint64_t *dev_offloads;
2878 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2879 dev = &rte_eth_devices[port_id];
2881 /* save original values in case of failure */
2882 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2883 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2885 /*check which option changed by application*/
2886 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2887 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
2890 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
2892 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
2893 mask |= ETH_VLAN_STRIP_MASK;
2896 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2897 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
2900 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
2902 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
2903 mask |= ETH_VLAN_FILTER_MASK;
2906 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2907 org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
2910 *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
2912 *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2913 mask |= ETH_VLAN_EXTEND_MASK;
2916 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
2917 org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
2920 *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
2922 *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
2923 mask |= ETH_QINQ_STRIP_MASK;
2930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2931 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2933 /* hit an error restore original values */
2934 *dev_offloads = orig_offloads;
2937 return eth_err(port_id, ret);
2941 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2943 struct rte_eth_dev *dev;
2944 uint64_t *dev_offloads;
2947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2948 dev = &rte_eth_devices[port_id];
2949 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
2951 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
2952 ret |= ETH_VLAN_STRIP_OFFLOAD;
2954 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
2955 ret |= ETH_VLAN_FILTER_OFFLOAD;
2957 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
2958 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2960 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
2961 ret |= ETH_QINQ_STRIP_OFFLOAD;
2967 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2969 struct rte_eth_dev *dev;
2971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 dev = &rte_eth_devices[port_id];
2973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2975 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2979 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2981 struct rte_eth_dev *dev;
2983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2984 dev = &rte_eth_devices[port_id];
2985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2986 memset(fc_conf, 0, sizeof(*fc_conf));
2987 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2991 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2993 struct rte_eth_dev *dev;
2995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2996 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2997 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3001 dev = &rte_eth_devices[port_id];
3002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3003 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3007 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3008 struct rte_eth_pfc_conf *pfc_conf)
3010 struct rte_eth_dev *dev;
3012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3013 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3014 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3018 dev = &rte_eth_devices[port_id];
3019 /* High water, low water validation are device specific */
3020 if (*dev->dev_ops->priority_flow_ctrl_set)
3021 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3027 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3035 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3036 for (i = 0; i < num; i++) {
3037 if (reta_conf[i].mask)
3045 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3049 uint16_t i, idx, shift;
3055 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3059 for (i = 0; i < reta_size; i++) {
3060 idx = i / RTE_RETA_GROUP_SIZE;
3061 shift = i % RTE_RETA_GROUP_SIZE;
3062 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3063 (reta_conf[idx].reta[shift] >= max_rxq)) {
3065 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3067 reta_conf[idx].reta[shift], max_rxq);
3076 rte_eth_dev_rss_reta_update(uint16_t port_id,
3077 struct rte_eth_rss_reta_entry64 *reta_conf,
3080 struct rte_eth_dev *dev;
3083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3084 /* Check mask bits */
3085 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3089 dev = &rte_eth_devices[port_id];
3091 /* Check entry value */
3092 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3093 dev->data->nb_rx_queues);
3097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3098 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3103 rte_eth_dev_rss_reta_query(uint16_t port_id,
3104 struct rte_eth_rss_reta_entry64 *reta_conf,
3107 struct rte_eth_dev *dev;
3110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3112 /* Check mask bits */
3113 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3117 dev = &rte_eth_devices[port_id];
3118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3119 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3124 rte_eth_dev_rss_hash_update(uint16_t port_id,
3125 struct rte_eth_rss_conf *rss_conf)
3127 struct rte_eth_dev *dev;
3128 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3133 ret = rte_eth_dev_info_get(port_id, &dev_info);
3137 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3139 dev = &rte_eth_devices[port_id];
3140 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3141 dev_info.flow_type_rss_offloads) {
3143 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3144 port_id, rss_conf->rss_hf,
3145 dev_info.flow_type_rss_offloads);
3148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3149 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3154 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3155 struct rte_eth_rss_conf *rss_conf)
3157 struct rte_eth_dev *dev;
3159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3160 dev = &rte_eth_devices[port_id];
3161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3162 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3167 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3168 struct rte_eth_udp_tunnel *udp_tunnel)
3170 struct rte_eth_dev *dev;
3172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3173 if (udp_tunnel == NULL) {
3174 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3178 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3179 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3183 dev = &rte_eth_devices[port_id];
3184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3185 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3190 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3191 struct rte_eth_udp_tunnel *udp_tunnel)
3193 struct rte_eth_dev *dev;
3195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3196 dev = &rte_eth_devices[port_id];
3198 if (udp_tunnel == NULL) {
3199 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3203 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3204 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3209 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3214 rte_eth_led_on(uint16_t port_id)
3216 struct rte_eth_dev *dev;
3218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3219 dev = &rte_eth_devices[port_id];
3220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3221 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3225 rte_eth_led_off(uint16_t port_id)
3227 struct rte_eth_dev *dev;
3229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3232 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3236 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3240 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3242 struct rte_eth_dev_info dev_info;
3243 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3247 ret = rte_eth_dev_info_get(port_id, &dev_info);
3251 for (i = 0; i < dev_info.max_mac_addrs; i++)
3252 if (memcmp(addr, &dev->data->mac_addrs[i],
3253 RTE_ETHER_ADDR_LEN) == 0)
3259 static const struct rte_ether_addr null_mac_addr;
3262 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3265 struct rte_eth_dev *dev;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3271 dev = &rte_eth_devices[port_id];
3272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3274 if (rte_is_zero_ether_addr(addr)) {
3275 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3279 if (pool >= ETH_64_POOLS) {
3280 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3284 index = get_mac_addr_index(port_id, addr);
3286 index = get_mac_addr_index(port_id, &null_mac_addr);
3288 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3293 pool_mask = dev->data->mac_pool_sel[index];
3295 /* Check if both MAC address and pool is already there, and do nothing */
3296 if (pool_mask & (1ULL << pool))
3301 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3304 /* Update address in NIC data structure */
3305 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3307 /* Update pool bitmap in NIC data structure */
3308 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3311 return eth_err(port_id, ret);
3315 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3317 struct rte_eth_dev *dev;
3320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3321 dev = &rte_eth_devices[port_id];
3322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3324 index = get_mac_addr_index(port_id, addr);
3327 "Port %u: Cannot remove default MAC address\n",
3330 } else if (index < 0)
3331 return 0; /* Do nothing if address wasn't found */
3334 (*dev->dev_ops->mac_addr_remove)(dev, index);
3336 /* Update address in NIC data structure */
3337 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3339 /* reset pool bitmap */
3340 dev->data->mac_pool_sel[index] = 0;
3346 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3348 struct rte_eth_dev *dev;
3351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3353 if (!rte_is_valid_assigned_ether_addr(addr))
3356 dev = &rte_eth_devices[port_id];
3357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3359 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3363 /* Update default address in NIC data structure */
3364 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3371 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3375 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3377 struct rte_eth_dev_info dev_info;
3378 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3382 ret = rte_eth_dev_info_get(port_id, &dev_info);
3386 if (!dev->data->hash_mac_addrs)
3389 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3390 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3391 RTE_ETHER_ADDR_LEN) == 0)
3398 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3403 struct rte_eth_dev *dev;
3405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3407 dev = &rte_eth_devices[port_id];
3408 if (rte_is_zero_ether_addr(addr)) {
3409 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3414 index = get_hash_mac_addr_index(port_id, addr);
3415 /* Check if it's already there, and do nothing */
3416 if ((index >= 0) && on)
3422 "Port %u: the MAC address was not set in UTA\n",
3427 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3429 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3436 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3438 /* Update address in NIC data structure */
3440 rte_ether_addr_copy(addr,
3441 &dev->data->hash_mac_addrs[index]);
3443 rte_ether_addr_copy(&null_mac_addr,
3444 &dev->data->hash_mac_addrs[index]);
3447 return eth_err(port_id, ret);
3451 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3453 struct rte_eth_dev *dev;
3455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3457 dev = &rte_eth_devices[port_id];
3459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3460 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3464 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3467 struct rte_eth_dev *dev;
3468 struct rte_eth_dev_info dev_info;
3469 struct rte_eth_link link;
3472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3474 ret = rte_eth_dev_info_get(port_id, &dev_info);
3478 dev = &rte_eth_devices[port_id];
3479 link = dev->data->dev_link;
3481 if (queue_idx > dev_info.max_tx_queues) {
3483 "Set queue rate limit:port %u: invalid queue id=%u\n",
3484 port_id, queue_idx);
3488 if (tx_rate > link.link_speed) {
3490 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3491 tx_rate, link.link_speed);
3495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3496 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3497 queue_idx, tx_rate));
3501 rte_eth_mirror_rule_set(uint16_t port_id,
3502 struct rte_eth_mirror_conf *mirror_conf,
3503 uint8_t rule_id, uint8_t on)
3505 struct rte_eth_dev *dev;
3507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3508 if (mirror_conf->rule_type == 0) {
3509 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3513 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3514 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3519 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3520 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3521 (mirror_conf->pool_mask == 0)) {
3523 "Invalid mirror pool, pool mask can not be 0\n");
3527 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3528 mirror_conf->vlan.vlan_mask == 0) {
3530 "Invalid vlan mask, vlan mask can not be 0\n");
3534 dev = &rte_eth_devices[port_id];
3535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3537 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3538 mirror_conf, rule_id, on));
3542 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3544 struct rte_eth_dev *dev;
3546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3548 dev = &rte_eth_devices[port_id];
3549 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3551 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3555 RTE_INIT(eth_dev_init_cb_lists)
3559 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3560 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3564 rte_eth_dev_callback_register(uint16_t port_id,
3565 enum rte_eth_event_type event,
3566 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3568 struct rte_eth_dev *dev;
3569 struct rte_eth_dev_callback *user_cb;
3570 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3576 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3577 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3581 if (port_id == RTE_ETH_ALL) {
3583 last_port = RTE_MAX_ETHPORTS - 1;
3585 next_port = last_port = port_id;
3588 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3591 dev = &rte_eth_devices[next_port];
3593 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3594 if (user_cb->cb_fn == cb_fn &&
3595 user_cb->cb_arg == cb_arg &&
3596 user_cb->event == event) {
3601 /* create a new callback. */
3602 if (user_cb == NULL) {
3603 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3604 sizeof(struct rte_eth_dev_callback), 0);
3605 if (user_cb != NULL) {
3606 user_cb->cb_fn = cb_fn;
3607 user_cb->cb_arg = cb_arg;
3608 user_cb->event = event;
3609 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3612 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3613 rte_eth_dev_callback_unregister(port_id, event,
3619 } while (++next_port <= last_port);
3621 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3626 rte_eth_dev_callback_unregister(uint16_t port_id,
3627 enum rte_eth_event_type event,
3628 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3631 struct rte_eth_dev *dev;
3632 struct rte_eth_dev_callback *cb, *next;
3633 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3639 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3640 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3644 if (port_id == RTE_ETH_ALL) {
3646 last_port = RTE_MAX_ETHPORTS - 1;
3648 next_port = last_port = port_id;
3651 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3654 dev = &rte_eth_devices[next_port];
3656 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3659 next = TAILQ_NEXT(cb, next);
3661 if (cb->cb_fn != cb_fn || cb->event != event ||
3662 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3666 * if this callback is not executing right now,
3669 if (cb->active == 0) {
3670 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3676 } while (++next_port <= last_port);
3678 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3683 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3684 enum rte_eth_event_type event, void *ret_param)
3686 struct rte_eth_dev_callback *cb_lst;
3687 struct rte_eth_dev_callback dev_cb;
3690 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3691 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3692 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3696 if (ret_param != NULL)
3697 dev_cb.ret_param = ret_param;
3699 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3700 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3701 dev_cb.cb_arg, dev_cb.ret_param);
3702 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3705 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3710 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3715 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3717 dev->state = RTE_ETH_DEV_ATTACHED;
3721 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3724 struct rte_eth_dev *dev;
3725 struct rte_intr_handle *intr_handle;
3729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3731 dev = &rte_eth_devices[port_id];
3733 if (!dev->intr_handle) {
3734 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3738 intr_handle = dev->intr_handle;
3739 if (!intr_handle->intr_vec) {
3740 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3744 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3745 vec = intr_handle->intr_vec[qid];
3746 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3747 if (rc && rc != -EEXIST) {
3749 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3750 port_id, qid, op, epfd, vec);
3758 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3760 struct rte_intr_handle *intr_handle;
3761 struct rte_eth_dev *dev;
3762 unsigned int efd_idx;
3766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3768 dev = &rte_eth_devices[port_id];
3770 if (queue_id >= dev->data->nb_rx_queues) {
3771 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3775 if (!dev->intr_handle) {
3776 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3780 intr_handle = dev->intr_handle;
3781 if (!intr_handle->intr_vec) {
3782 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3786 vec = intr_handle->intr_vec[queue_id];
3787 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3788 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3789 fd = intr_handle->efds[efd_idx];
3794 const struct rte_memzone *
3795 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3796 uint16_t queue_id, size_t size, unsigned align,
3799 char z_name[RTE_MEMZONE_NAMESIZE];
3800 const struct rte_memzone *mz;
3803 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3804 dev->data->port_id, queue_id, ring_name);
3805 if (rc >= RTE_MEMZONE_NAMESIZE) {
3806 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3807 rte_errno = ENAMETOOLONG;
3811 mz = rte_memzone_lookup(z_name);
3815 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3816 RTE_MEMZONE_IOVA_CONTIG, align);
3820 rte_eth_dev_create(struct rte_device *device, const char *name,
3821 size_t priv_data_size,
3822 ethdev_bus_specific_init ethdev_bus_specific_init,
3823 void *bus_init_params,
3824 ethdev_init_t ethdev_init, void *init_params)
3826 struct rte_eth_dev *ethdev;
3829 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3831 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3832 ethdev = rte_eth_dev_allocate(name);
3836 if (priv_data_size) {
3837 ethdev->data->dev_private = rte_zmalloc_socket(
3838 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3841 if (!ethdev->data->dev_private) {
3842 RTE_LOG(ERR, EAL, "failed to allocate private data");
3848 ethdev = rte_eth_dev_attach_secondary(name);
3850 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3851 "ethdev doesn't exist");
3856 ethdev->device = device;
3858 if (ethdev_bus_specific_init) {
3859 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3862 "ethdev bus specific initialisation failed");
3867 retval = ethdev_init(ethdev, init_params);
3869 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3873 rte_eth_dev_probing_finish(ethdev);
3878 rte_eth_dev_release_port(ethdev);
3883 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3884 ethdev_uninit_t ethdev_uninit)
3888 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3892 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3894 ret = ethdev_uninit(ethdev);
3898 return rte_eth_dev_release_port(ethdev);
3902 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3903 int epfd, int op, void *data)
3906 struct rte_eth_dev *dev;
3907 struct rte_intr_handle *intr_handle;
3910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3912 dev = &rte_eth_devices[port_id];
3913 if (queue_id >= dev->data->nb_rx_queues) {
3914 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3918 if (!dev->intr_handle) {
3919 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3923 intr_handle = dev->intr_handle;
3924 if (!intr_handle->intr_vec) {
3925 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3929 vec = intr_handle->intr_vec[queue_id];
3930 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3931 if (rc && rc != -EEXIST) {
3933 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3934 port_id, queue_id, op, epfd, vec);
3942 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3945 struct rte_eth_dev *dev;
3947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3949 dev = &rte_eth_devices[port_id];
3951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3952 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3957 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3960 struct rte_eth_dev *dev;
3962 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3964 dev = &rte_eth_devices[port_id];
3966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3967 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3973 rte_eth_dev_filter_supported(uint16_t port_id,
3974 enum rte_filter_type filter_type)
3976 struct rte_eth_dev *dev;
3978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3980 dev = &rte_eth_devices[port_id];
3981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3982 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3983 RTE_ETH_FILTER_NOP, NULL);
3987 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3988 enum rte_filter_op filter_op, void *arg)
3990 struct rte_eth_dev *dev;
3992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3994 dev = &rte_eth_devices[port_id];
3995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3996 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4000 const struct rte_eth_rxtx_callback *
4001 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4002 rte_rx_callback_fn fn, void *user_param)
4004 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4005 rte_errno = ENOTSUP;
4008 /* check input parameters */
4009 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4010 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4014 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4022 cb->param = user_param;
4024 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4025 /* Add the callbacks in fifo order. */
4026 struct rte_eth_rxtx_callback *tail =
4027 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4030 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4037 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4042 const struct rte_eth_rxtx_callback *
4043 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4044 rte_rx_callback_fn fn, void *user_param)
4046 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4047 rte_errno = ENOTSUP;
4050 /* check input parameters */
4051 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4052 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4057 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4065 cb->param = user_param;
4067 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4068 /* Add the callbacks at fisrt position*/
4069 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4071 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4072 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4077 const struct rte_eth_rxtx_callback *
4078 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4079 rte_tx_callback_fn fn, void *user_param)
4081 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4082 rte_errno = ENOTSUP;
4085 /* check input parameters */
4086 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4087 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4092 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4100 cb->param = user_param;
4102 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4103 /* Add the callbacks in fifo order. */
4104 struct rte_eth_rxtx_callback *tail =
4105 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4108 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4115 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4121 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4122 const struct rte_eth_rxtx_callback *user_cb)
4124 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4127 /* Check input parameters. */
4128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4129 if (user_cb == NULL ||
4130 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4133 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4134 struct rte_eth_rxtx_callback *cb;
4135 struct rte_eth_rxtx_callback **prev_cb;
4138 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4139 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4140 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4142 if (cb == user_cb) {
4143 /* Remove the user cb from the callback list. */
4144 *prev_cb = cb->next;
4149 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4155 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4156 const struct rte_eth_rxtx_callback *user_cb)
4158 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4161 /* Check input parameters. */
4162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4163 if (user_cb == NULL ||
4164 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4167 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4169 struct rte_eth_rxtx_callback *cb;
4170 struct rte_eth_rxtx_callback **prev_cb;
4172 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4173 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4174 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4176 if (cb == user_cb) {
4177 /* Remove the user cb from the callback list. */
4178 *prev_cb = cb->next;
4183 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4189 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4190 struct rte_eth_rxq_info *qinfo)
4192 struct rte_eth_dev *dev;
4194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4200 if (queue_id >= dev->data->nb_rx_queues) {
4201 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4207 memset(qinfo, 0, sizeof(*qinfo));
4208 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4213 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4214 struct rte_eth_txq_info *qinfo)
4216 struct rte_eth_dev *dev;
4218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4223 dev = &rte_eth_devices[port_id];
4224 if (queue_id >= dev->data->nb_tx_queues) {
4225 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4231 memset(qinfo, 0, sizeof(*qinfo));
4232 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4238 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4239 struct rte_eth_burst_mode *mode)
4241 struct rte_eth_dev *dev;
4243 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4248 dev = &rte_eth_devices[port_id];
4250 if (queue_id >= dev->data->nb_rx_queues) {
4251 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4256 memset(mode, 0, sizeof(*mode));
4257 return eth_err(port_id,
4258 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4262 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4263 struct rte_eth_burst_mode *mode)
4265 struct rte_eth_dev *dev;
4267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4272 dev = &rte_eth_devices[port_id];
4274 if (queue_id >= dev->data->nb_tx_queues) {
4275 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4280 memset(mode, 0, sizeof(*mode));
4281 return eth_err(port_id,
4282 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4286 rte_eth_burst_mode_option_name(uint64_t option)
4288 const char *name = "";
4291 for (i = 0; i < RTE_DIM(rte_burst_option_names); ++i) {
4292 if (option == rte_burst_option_names[i].option) {
4293 name = rte_burst_option_names[i].name;
4302 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4303 struct rte_ether_addr *mc_addr_set,
4304 uint32_t nb_mc_addr)
4306 struct rte_eth_dev *dev;
4308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4310 dev = &rte_eth_devices[port_id];
4311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4312 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4313 mc_addr_set, nb_mc_addr));
4317 rte_eth_timesync_enable(uint16_t port_id)
4319 struct rte_eth_dev *dev;
4321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4322 dev = &rte_eth_devices[port_id];
4324 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4325 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4329 rte_eth_timesync_disable(uint16_t port_id)
4331 struct rte_eth_dev *dev;
4333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4334 dev = &rte_eth_devices[port_id];
4336 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4337 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4341 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4344 struct rte_eth_dev *dev;
4346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4347 dev = &rte_eth_devices[port_id];
4349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4350 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4351 (dev, timestamp, flags));
4355 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4356 struct timespec *timestamp)
4358 struct rte_eth_dev *dev;
4360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4361 dev = &rte_eth_devices[port_id];
4363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4364 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4369 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4371 struct rte_eth_dev *dev;
4373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4374 dev = &rte_eth_devices[port_id];
4376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4377 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4382 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4384 struct rte_eth_dev *dev;
4386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4387 dev = &rte_eth_devices[port_id];
4389 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4390 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4395 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4397 struct rte_eth_dev *dev;
4399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4400 dev = &rte_eth_devices[port_id];
4402 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4403 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4408 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4410 struct rte_eth_dev *dev;
4412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4413 dev = &rte_eth_devices[port_id];
4415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4416 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4420 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4422 struct rte_eth_dev *dev;
4424 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4426 dev = &rte_eth_devices[port_id];
4427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4428 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4432 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4434 struct rte_eth_dev *dev;
4436 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4438 dev = &rte_eth_devices[port_id];
4439 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4440 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4444 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4446 struct rte_eth_dev *dev;
4448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4450 dev = &rte_eth_devices[port_id];
4451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4452 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4456 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4458 struct rte_eth_dev *dev;
4460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4462 dev = &rte_eth_devices[port_id];
4463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4464 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4468 rte_eth_dev_get_module_info(uint16_t port_id,
4469 struct rte_eth_dev_module_info *modinfo)
4471 struct rte_eth_dev *dev;
4473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4475 dev = &rte_eth_devices[port_id];
4476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4477 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4481 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4482 struct rte_dev_eeprom_info *info)
4484 struct rte_eth_dev *dev;
4486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4488 dev = &rte_eth_devices[port_id];
4489 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4490 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4494 rte_eth_dev_get_dcb_info(uint16_t port_id,
4495 struct rte_eth_dcb_info *dcb_info)
4497 struct rte_eth_dev *dev;
4499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4501 dev = &rte_eth_devices[port_id];
4502 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4504 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4505 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4509 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4510 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4512 struct rte_eth_dev *dev;
4514 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4515 if (l2_tunnel == NULL) {
4516 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4520 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4521 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4525 dev = &rte_eth_devices[port_id];
4526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4528 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4533 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4534 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4538 struct rte_eth_dev *dev;
4540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4542 if (l2_tunnel == NULL) {
4543 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4547 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4548 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4553 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4557 dev = &rte_eth_devices[port_id];
4558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4560 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4561 l2_tunnel, mask, en));
4565 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4566 const struct rte_eth_desc_lim *desc_lim)
4568 if (desc_lim->nb_align != 0)
4569 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4571 if (desc_lim->nb_max != 0)
4572 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4574 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4578 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4579 uint16_t *nb_rx_desc,
4580 uint16_t *nb_tx_desc)
4582 struct rte_eth_dev_info dev_info;
4585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4587 ret = rte_eth_dev_info_get(port_id, &dev_info);
4591 if (nb_rx_desc != NULL)
4592 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4594 if (nb_tx_desc != NULL)
4595 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4601 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4603 struct rte_eth_dev *dev;
4605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4610 dev = &rte_eth_devices[port_id];
4612 if (*dev->dev_ops->pool_ops_supported == NULL)
4613 return 1; /* all pools are supported */
4615 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4619 * A set of values to describe the possible states of a switch domain.
4621 enum rte_eth_switch_domain_state {
4622 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4623 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4627 * Array of switch domains available for allocation. Array is sized to
4628 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4629 * ethdev ports in a single process.
4631 static struct rte_eth_dev_switch {
4632 enum rte_eth_switch_domain_state state;
4633 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4636 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4640 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4642 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4643 i < RTE_MAX_ETHPORTS; i++) {
4644 if (rte_eth_switch_domains[i].state ==
4645 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4646 rte_eth_switch_domains[i].state =
4647 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4657 rte_eth_switch_domain_free(uint16_t domain_id)
4659 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4660 domain_id >= RTE_MAX_ETHPORTS)
4663 if (rte_eth_switch_domains[domain_id].state !=
4664 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4667 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4673 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4676 struct rte_kvargs_pair *pair;
4679 arglist->str = strdup(str_in);
4680 if (arglist->str == NULL)
4683 letter = arglist->str;
4686 pair = &arglist->pairs[0];
4689 case 0: /* Initial */
4692 else if (*letter == '\0')
4699 case 1: /* Parsing key */
4700 if (*letter == '=') {
4702 pair->value = letter + 1;
4704 } else if (*letter == ',' || *letter == '\0')
4709 case 2: /* Parsing value */
4712 else if (*letter == ',') {
4715 pair = &arglist->pairs[arglist->count];
4717 } else if (*letter == '\0') {
4720 pair = &arglist->pairs[arglist->count];
4725 case 3: /* Parsing list */
4728 else if (*letter == '\0')
4737 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4739 struct rte_kvargs args;
4740 struct rte_kvargs_pair *pair;
4744 memset(eth_da, 0, sizeof(*eth_da));
4746 result = rte_eth_devargs_tokenise(&args, dargs);
4750 for (i = 0; i < args.count; i++) {
4751 pair = &args.pairs[i];
4752 if (strcmp("representor", pair->key) == 0) {
4753 result = rte_eth_devargs_parse_list(pair->value,
4754 rte_eth_devargs_parse_representor_ports,
4768 RTE_INIT(ethdev_init_log)
4770 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4771 if (rte_eth_dev_logtype >= 0)
4772 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);