1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
336 if (port_id >= RTE_MAX_ETHPORTS)
337 return RTE_MAX_ETHPORTS;
343 rte_eth_dev_shared_data_prepare(void)
345 const unsigned flags = 0;
346 const struct rte_memzone *mz;
348 rte_spinlock_lock(&rte_eth_shared_data_lock);
350 if (rte_eth_dev_shared_data == NULL) {
351 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
352 /* Allocate port data and ownership shared memory. */
353 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
354 sizeof(*rte_eth_dev_shared_data),
355 rte_socket_id(), flags);
357 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
359 rte_panic("Cannot allocate ethdev shared data\n");
361 rte_eth_dev_shared_data = mz->addr;
362 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
363 rte_eth_dev_shared_data->next_owner_id =
364 RTE_ETH_DEV_NO_OWNER + 1;
365 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
366 memset(rte_eth_dev_shared_data->data, 0,
367 sizeof(rte_eth_dev_shared_data->data));
371 rte_spinlock_unlock(&rte_eth_shared_data_lock);
375 is_allocated(const struct rte_eth_dev *ethdev)
377 return ethdev->data->name[0] != '\0';
380 static struct rte_eth_dev *
381 _rte_eth_dev_allocated(const char *name)
385 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
386 if (rte_eth_devices[i].data != NULL &&
387 strcmp(rte_eth_devices[i].data->name, name) == 0)
388 return &rte_eth_devices[i];
394 rte_eth_dev_allocated(const char *name)
396 struct rte_eth_dev *ethdev;
398 rte_eth_dev_shared_data_prepare();
400 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
402 ethdev = _rte_eth_dev_allocated(name);
404 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
410 rte_eth_dev_find_free_port(void)
414 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
415 /* Using shared name field to find a free port. */
416 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
417 RTE_ASSERT(rte_eth_devices[i].state ==
422 return RTE_MAX_ETHPORTS;
425 static struct rte_eth_dev *
426 eth_dev_get(uint16_t port_id)
428 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
430 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
436 rte_eth_dev_allocate(const char *name)
439 struct rte_eth_dev *eth_dev = NULL;
442 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
444 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
448 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
449 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
453 rte_eth_dev_shared_data_prepare();
455 /* Synchronize port creation between primary and secondary threads. */
456 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
458 if (_rte_eth_dev_allocated(name) != NULL) {
460 "Ethernet device with name %s already allocated\n",
465 port_id = rte_eth_dev_find_free_port();
466 if (port_id == RTE_MAX_ETHPORTS) {
468 "Reached maximum number of Ethernet ports\n");
472 eth_dev = eth_dev_get(port_id);
473 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
474 eth_dev->data->port_id = port_id;
475 eth_dev->data->mtu = ETHER_MTU;
478 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
484 * Attach to a port already registered by the primary process, which
485 * makes sure that the same device would have the same port id both
486 * in the primary and secondary process.
489 rte_eth_dev_attach_secondary(const char *name)
492 struct rte_eth_dev *eth_dev = NULL;
494 rte_eth_dev_shared_data_prepare();
496 /* Synchronize port attachment to primary port creation and release. */
497 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
499 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
500 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
503 if (i == RTE_MAX_ETHPORTS) {
505 "Device %s is not driven by the primary process\n",
508 eth_dev = eth_dev_get(i);
509 RTE_ASSERT(eth_dev->data->port_id == i);
512 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
517 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
522 rte_eth_dev_shared_data_prepare();
524 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
525 _rte_eth_dev_callback_process(eth_dev,
526 RTE_ETH_EVENT_DESTROY, NULL);
528 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
530 eth_dev->state = RTE_ETH_DEV_UNUSED;
532 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
533 rte_free(eth_dev->data->rx_queues);
534 rte_free(eth_dev->data->tx_queues);
535 rte_free(eth_dev->data->mac_addrs);
536 rte_free(eth_dev->data->hash_mac_addrs);
537 rte_free(eth_dev->data->dev_private);
538 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
541 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
547 rte_eth_dev_is_valid_port(uint16_t port_id)
549 if (port_id >= RTE_MAX_ETHPORTS ||
550 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
557 rte_eth_is_valid_owner_id(uint64_t owner_id)
559 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
560 rte_eth_dev_shared_data->next_owner_id <= owner_id)
566 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
568 while (port_id < RTE_MAX_ETHPORTS &&
569 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED ||
570 rte_eth_devices[port_id].data->owner.id != owner_id))
573 if (port_id >= RTE_MAX_ETHPORTS)
574 return RTE_MAX_ETHPORTS;
579 int __rte_experimental
580 rte_eth_dev_owner_new(uint64_t *owner_id)
582 rte_eth_dev_shared_data_prepare();
584 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
586 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
588 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
593 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
594 const struct rte_eth_dev_owner *new_owner)
596 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
597 struct rte_eth_dev_owner *port_owner;
599 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
600 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
605 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
606 !rte_eth_is_valid_owner_id(old_owner_id)) {
608 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
609 old_owner_id, new_owner->id);
613 port_owner = &rte_eth_devices[port_id].data->owner;
614 if (port_owner->id != old_owner_id) {
616 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
617 port_id, port_owner->name, port_owner->id);
621 /* can not truncate (same structure) */
622 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
624 port_owner->id = new_owner->id;
626 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
627 port_id, new_owner->name, new_owner->id);
632 int __rte_experimental
633 rte_eth_dev_owner_set(const uint16_t port_id,
634 const struct rte_eth_dev_owner *owner)
638 rte_eth_dev_shared_data_prepare();
640 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
642 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
644 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
648 int __rte_experimental
649 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
651 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
652 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
655 rte_eth_dev_shared_data_prepare();
657 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
659 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
661 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
665 void __rte_experimental
666 rte_eth_dev_owner_delete(const uint64_t owner_id)
670 rte_eth_dev_shared_data_prepare();
672 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
674 if (rte_eth_is_valid_owner_id(owner_id)) {
675 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
676 if (rte_eth_devices[port_id].data->owner.id == owner_id)
677 memset(&rte_eth_devices[port_id].data->owner, 0,
678 sizeof(struct rte_eth_dev_owner));
679 RTE_ETHDEV_LOG(NOTICE,
680 "All port owners owned by %016"PRIx64" identifier have removed\n",
684 "Invalid owner id=%016"PRIx64"\n",
688 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
691 int __rte_experimental
692 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
695 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
697 rte_eth_dev_shared_data_prepare();
699 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
701 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
702 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
706 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
709 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
714 rte_eth_dev_socket_id(uint16_t port_id)
716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
717 return rte_eth_devices[port_id].data->numa_node;
721 rte_eth_dev_get_sec_ctx(uint16_t port_id)
723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
724 return rte_eth_devices[port_id].security_ctx;
728 rte_eth_dev_count(void)
730 return rte_eth_dev_count_avail();
734 rte_eth_dev_count_avail(void)
741 RTE_ETH_FOREACH_DEV(p)
747 uint16_t __rte_experimental
748 rte_eth_dev_count_total(void)
750 uint16_t port, count = 0;
752 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
753 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
760 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
767 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
771 /* shouldn't check 'rte_eth_devices[i].data',
772 * because it might be overwritten by VDEV PMD */
773 tmp = rte_eth_dev_shared_data->data[port_id].name;
779 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
784 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
788 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
789 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
790 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
800 eth_err(uint16_t port_id, int ret)
804 if (rte_eth_dev_is_removed(port_id))
810 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
812 uint16_t old_nb_queues = dev->data->nb_rx_queues;
816 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
817 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
818 sizeof(dev->data->rx_queues[0]) * nb_queues,
819 RTE_CACHE_LINE_SIZE);
820 if (dev->data->rx_queues == NULL) {
821 dev->data->nb_rx_queues = 0;
824 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
827 rxq = dev->data->rx_queues;
829 for (i = nb_queues; i < old_nb_queues; i++)
830 (*dev->dev_ops->rx_queue_release)(rxq[i]);
831 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
832 RTE_CACHE_LINE_SIZE);
835 if (nb_queues > old_nb_queues) {
836 uint16_t new_qs = nb_queues - old_nb_queues;
838 memset(rxq + old_nb_queues, 0,
839 sizeof(rxq[0]) * new_qs);
842 dev->data->rx_queues = rxq;
844 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
847 rxq = dev->data->rx_queues;
849 for (i = nb_queues; i < old_nb_queues; i++)
850 (*dev->dev_ops->rx_queue_release)(rxq[i]);
852 rte_free(dev->data->rx_queues);
853 dev->data->rx_queues = NULL;
855 dev->data->nb_rx_queues = nb_queues;
860 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
862 struct rte_eth_dev *dev;
864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
866 dev = &rte_eth_devices[port_id];
867 if (!dev->data->dev_started) {
869 "Port %u must be started before start any queue\n",
874 if (rx_queue_id >= dev->data->nb_rx_queues) {
875 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
881 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
883 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
884 rx_queue_id, port_id);
888 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
894 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
896 struct rte_eth_dev *dev;
898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
900 dev = &rte_eth_devices[port_id];
901 if (rx_queue_id >= dev->data->nb_rx_queues) {
902 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
908 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
910 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
911 rx_queue_id, port_id);
915 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
920 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
922 struct rte_eth_dev *dev;
924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926 dev = &rte_eth_devices[port_id];
927 if (!dev->data->dev_started) {
929 "Port %u must be started before start any queue\n",
934 if (tx_queue_id >= dev->data->nb_tx_queues) {
935 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
941 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
943 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
944 tx_queue_id, port_id);
948 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
952 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
959 if (tx_queue_id >= dev->data->nb_tx_queues) {
960 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
964 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
966 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
968 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
969 tx_queue_id, port_id);
973 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
978 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
980 uint16_t old_nb_queues = dev->data->nb_tx_queues;
984 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
985 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
986 sizeof(dev->data->tx_queues[0]) * nb_queues,
987 RTE_CACHE_LINE_SIZE);
988 if (dev->data->tx_queues == NULL) {
989 dev->data->nb_tx_queues = 0;
992 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
995 txq = dev->data->tx_queues;
997 for (i = nb_queues; i < old_nb_queues; i++)
998 (*dev->dev_ops->tx_queue_release)(txq[i]);
999 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1000 RTE_CACHE_LINE_SIZE);
1003 if (nb_queues > old_nb_queues) {
1004 uint16_t new_qs = nb_queues - old_nb_queues;
1006 memset(txq + old_nb_queues, 0,
1007 sizeof(txq[0]) * new_qs);
1010 dev->data->tx_queues = txq;
1012 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1015 txq = dev->data->tx_queues;
1017 for (i = nb_queues; i < old_nb_queues; i++)
1018 (*dev->dev_ops->tx_queue_release)(txq[i]);
1020 rte_free(dev->data->tx_queues);
1021 dev->data->tx_queues = NULL;
1023 dev->data->nb_tx_queues = nb_queues;
1028 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1031 case ETH_SPEED_NUM_10M:
1032 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1033 case ETH_SPEED_NUM_100M:
1034 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1035 case ETH_SPEED_NUM_1G:
1036 return ETH_LINK_SPEED_1G;
1037 case ETH_SPEED_NUM_2_5G:
1038 return ETH_LINK_SPEED_2_5G;
1039 case ETH_SPEED_NUM_5G:
1040 return ETH_LINK_SPEED_5G;
1041 case ETH_SPEED_NUM_10G:
1042 return ETH_LINK_SPEED_10G;
1043 case ETH_SPEED_NUM_20G:
1044 return ETH_LINK_SPEED_20G;
1045 case ETH_SPEED_NUM_25G:
1046 return ETH_LINK_SPEED_25G;
1047 case ETH_SPEED_NUM_40G:
1048 return ETH_LINK_SPEED_40G;
1049 case ETH_SPEED_NUM_50G:
1050 return ETH_LINK_SPEED_50G;
1051 case ETH_SPEED_NUM_56G:
1052 return ETH_LINK_SPEED_56G;
1053 case ETH_SPEED_NUM_100G:
1054 return ETH_LINK_SPEED_100G;
1061 rte_eth_dev_rx_offload_name(uint64_t offload)
1063 const char *name = "UNKNOWN";
1066 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1067 if (offload == rte_rx_offload_names[i].offload) {
1068 name = rte_rx_offload_names[i].name;
1077 rte_eth_dev_tx_offload_name(uint64_t offload)
1079 const char *name = "UNKNOWN";
1082 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1083 if (offload == rte_tx_offload_names[i].offload) {
1084 name = rte_tx_offload_names[i].name;
1093 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1094 const struct rte_eth_conf *dev_conf)
1096 struct rte_eth_dev *dev;
1097 struct rte_eth_dev_info dev_info;
1098 struct rte_eth_conf orig_conf;
1102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1104 dev = &rte_eth_devices[port_id];
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1109 if (dev->data->dev_started) {
1111 "Port %u must be stopped to allow configuration\n",
1116 /* Store original config, as rollback required on failure */
1117 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1120 * Copy the dev_conf parameter into the dev structure.
1121 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1123 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1125 rte_eth_dev_info_get(port_id, &dev_info);
1127 /* If number of queues specified by application for both Rx and Tx is
1128 * zero, use driver preferred values. This cannot be done individually
1129 * as it is valid for either Tx or Rx (but not both) to be zero.
1130 * If driver does not provide any preferred valued, fall back on
1133 if (nb_rx_q == 0 && nb_tx_q == 0) {
1134 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1136 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1137 nb_tx_q = dev_info.default_txportconf.nb_queues;
1139 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1142 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1144 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1145 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1150 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1152 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1153 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1159 * Check that the numbers of RX and TX queues are not greater
1160 * than the maximum number of RX and TX queues supported by the
1161 * configured device.
1163 if (nb_rx_q > dev_info.max_rx_queues) {
1164 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1165 port_id, nb_rx_q, dev_info.max_rx_queues);
1170 if (nb_tx_q > dev_info.max_tx_queues) {
1171 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1172 port_id, nb_tx_q, dev_info.max_tx_queues);
1177 /* Check that the device supports requested interrupts */
1178 if ((dev_conf->intr_conf.lsc == 1) &&
1179 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1180 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1181 dev->device->driver->name);
1185 if ((dev_conf->intr_conf.rmv == 1) &&
1186 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1187 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1188 dev->device->driver->name);
1194 * If jumbo frames are enabled, check that the maximum RX packet
1195 * length is supported by the configured device.
1197 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1198 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1200 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1201 port_id, dev_conf->rxmode.max_rx_pkt_len,
1202 dev_info.max_rx_pktlen);
1205 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1207 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1208 port_id, dev_conf->rxmode.max_rx_pkt_len,
1209 (unsigned)ETHER_MIN_LEN);
1214 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1215 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1216 /* Use default value */
1217 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1221 /* Any requested offloading must be within its device capabilities */
1222 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1223 dev_conf->rxmode.offloads) {
1225 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1226 "capabilities 0x%"PRIx64" in %s()\n",
1227 port_id, dev_conf->rxmode.offloads,
1228 dev_info.rx_offload_capa,
1233 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1234 dev_conf->txmode.offloads) {
1236 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1237 "capabilities 0x%"PRIx64" in %s()\n",
1238 port_id, dev_conf->txmode.offloads,
1239 dev_info.tx_offload_capa,
1245 /* Check that device supports requested rss hash functions. */
1246 if ((dev_info.flow_type_rss_offloads |
1247 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1248 dev_info.flow_type_rss_offloads) {
1250 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1251 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1252 dev_info.flow_type_rss_offloads);
1258 * Setup new number of RX/TX queues and reconfigure device.
1260 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1263 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1269 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1272 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1274 rte_eth_dev_rx_queue_config(dev, 0);
1279 diag = (*dev->dev_ops->dev_configure)(dev);
1281 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1283 rte_eth_dev_rx_queue_config(dev, 0);
1284 rte_eth_dev_tx_queue_config(dev, 0);
1285 ret = eth_err(port_id, diag);
1289 /* Initialize Rx profiling if enabled at compilation time. */
1290 diag = __rte_eth_dev_profile_init(port_id, dev);
1292 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1294 rte_eth_dev_rx_queue_config(dev, 0);
1295 rte_eth_dev_tx_queue_config(dev, 0);
1296 ret = eth_err(port_id, diag);
1303 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1309 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1311 if (dev->data->dev_started) {
1312 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1313 dev->data->port_id);
1317 rte_eth_dev_rx_queue_config(dev, 0);
1318 rte_eth_dev_tx_queue_config(dev, 0);
1320 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1324 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1325 struct rte_eth_dev_info *dev_info)
1327 struct ether_addr *addr;
1332 /* replay MAC address configuration including default MAC */
1333 addr = &dev->data->mac_addrs[0];
1334 if (*dev->dev_ops->mac_addr_set != NULL)
1335 (*dev->dev_ops->mac_addr_set)(dev, addr);
1336 else if (*dev->dev_ops->mac_addr_add != NULL)
1337 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1339 if (*dev->dev_ops->mac_addr_add != NULL) {
1340 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1341 addr = &dev->data->mac_addrs[i];
1343 /* skip zero address */
1344 if (is_zero_ether_addr(addr))
1348 pool_mask = dev->data->mac_pool_sel[i];
1351 if (pool_mask & 1ULL)
1352 (*dev->dev_ops->mac_addr_add)(dev,
1356 } while (pool_mask);
1362 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1363 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1365 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1366 rte_eth_dev_mac_restore(dev, dev_info);
1368 /* replay promiscuous configuration */
1369 if (rte_eth_promiscuous_get(port_id) == 1)
1370 rte_eth_promiscuous_enable(port_id);
1371 else if (rte_eth_promiscuous_get(port_id) == 0)
1372 rte_eth_promiscuous_disable(port_id);
1374 /* replay all multicast configuration */
1375 if (rte_eth_allmulticast_get(port_id) == 1)
1376 rte_eth_allmulticast_enable(port_id);
1377 else if (rte_eth_allmulticast_get(port_id) == 0)
1378 rte_eth_allmulticast_disable(port_id);
1382 rte_eth_dev_start(uint16_t port_id)
1384 struct rte_eth_dev *dev;
1385 struct rte_eth_dev_info dev_info;
1388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1390 dev = &rte_eth_devices[port_id];
1392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1394 if (dev->data->dev_started != 0) {
1395 RTE_ETHDEV_LOG(INFO,
1396 "Device with port_id=%"PRIu16" already started\n",
1401 rte_eth_dev_info_get(port_id, &dev_info);
1403 /* Lets restore MAC now if device does not support live change */
1404 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1405 rte_eth_dev_mac_restore(dev, &dev_info);
1407 diag = (*dev->dev_ops->dev_start)(dev);
1409 dev->data->dev_started = 1;
1411 return eth_err(port_id, diag);
1413 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1415 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1417 (*dev->dev_ops->link_update)(dev, 0);
1423 rte_eth_dev_stop(uint16_t port_id)
1425 struct rte_eth_dev *dev;
1427 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1428 dev = &rte_eth_devices[port_id];
1430 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1432 if (dev->data->dev_started == 0) {
1433 RTE_ETHDEV_LOG(INFO,
1434 "Device with port_id=%"PRIu16" already stopped\n",
1439 dev->data->dev_started = 0;
1440 (*dev->dev_ops->dev_stop)(dev);
1444 rte_eth_dev_set_link_up(uint16_t port_id)
1446 struct rte_eth_dev *dev;
1448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1450 dev = &rte_eth_devices[port_id];
1452 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1453 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1457 rte_eth_dev_set_link_down(uint16_t port_id)
1459 struct rte_eth_dev *dev;
1461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1463 dev = &rte_eth_devices[port_id];
1465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1466 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1470 rte_eth_dev_close(uint16_t port_id)
1472 struct rte_eth_dev *dev;
1474 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1475 dev = &rte_eth_devices[port_id];
1477 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1478 dev->data->dev_started = 0;
1479 (*dev->dev_ops->dev_close)(dev);
1481 /* check behaviour flag - temporary for PMD migration */
1482 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1483 /* new behaviour: send event + reset state + free all data */
1484 rte_eth_dev_release_port(dev);
1487 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1488 "The driver %s should migrate to the new behaviour.\n",
1489 dev->device->driver->name);
1490 /* old behaviour: only free queue arrays */
1491 dev->data->nb_rx_queues = 0;
1492 rte_free(dev->data->rx_queues);
1493 dev->data->rx_queues = NULL;
1494 dev->data->nb_tx_queues = 0;
1495 rte_free(dev->data->tx_queues);
1496 dev->data->tx_queues = NULL;
1500 rte_eth_dev_reset(uint16_t port_id)
1502 struct rte_eth_dev *dev;
1505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1506 dev = &rte_eth_devices[port_id];
1508 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1510 rte_eth_dev_stop(port_id);
1511 ret = dev->dev_ops->dev_reset(dev);
1513 return eth_err(port_id, ret);
1516 int __rte_experimental
1517 rte_eth_dev_is_removed(uint16_t port_id)
1519 struct rte_eth_dev *dev;
1522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1524 dev = &rte_eth_devices[port_id];
1526 if (dev->state == RTE_ETH_DEV_REMOVED)
1529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1531 ret = dev->dev_ops->is_removed(dev);
1533 /* Device is physically removed. */
1534 dev->state = RTE_ETH_DEV_REMOVED;
1540 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1541 uint16_t nb_rx_desc, unsigned int socket_id,
1542 const struct rte_eth_rxconf *rx_conf,
1543 struct rte_mempool *mp)
1546 uint32_t mbp_buf_size;
1547 struct rte_eth_dev *dev;
1548 struct rte_eth_dev_info dev_info;
1549 struct rte_eth_rxconf local_conf;
1552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1554 dev = &rte_eth_devices[port_id];
1555 if (rx_queue_id >= dev->data->nb_rx_queues) {
1556 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1561 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1564 * Check the size of the mbuf data buffer.
1565 * This value must be provided in the private data of the memory pool.
1566 * First check that the memory pool has a valid private data.
1568 rte_eth_dev_info_get(port_id, &dev_info);
1569 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1570 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1571 mp->name, (int)mp->private_data_size,
1572 (int)sizeof(struct rte_pktmbuf_pool_private));
1575 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1577 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1579 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1580 mp->name, (int)mbp_buf_size,
1581 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1582 (int)RTE_PKTMBUF_HEADROOM,
1583 (int)dev_info.min_rx_bufsize);
1587 /* Use default specified by driver, if nb_rx_desc is zero */
1588 if (nb_rx_desc == 0) {
1589 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1590 /* If driver default is also zero, fall back on EAL default */
1591 if (nb_rx_desc == 0)
1592 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1595 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1596 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1597 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1600 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1601 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1602 dev_info.rx_desc_lim.nb_min,
1603 dev_info.rx_desc_lim.nb_align);
1607 if (dev->data->dev_started &&
1608 !(dev_info.dev_capa &
1609 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1612 if (dev->data->dev_started &&
1613 (dev->data->rx_queue_state[rx_queue_id] !=
1614 RTE_ETH_QUEUE_STATE_STOPPED))
1617 rxq = dev->data->rx_queues;
1618 if (rxq[rx_queue_id]) {
1619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1621 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1622 rxq[rx_queue_id] = NULL;
1625 if (rx_conf == NULL)
1626 rx_conf = &dev_info.default_rxconf;
1628 local_conf = *rx_conf;
1631 * If an offloading has already been enabled in
1632 * rte_eth_dev_configure(), it has been enabled on all queues,
1633 * so there is no need to enable it in this queue again.
1634 * The local_conf.offloads input to underlying PMD only carries
1635 * those offloadings which are only enabled on this queue and
1636 * not enabled on all queues.
1638 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1641 * New added offloadings for this queue are those not enabled in
1642 * rte_eth_dev_configure() and they must be per-queue type.
1643 * A pure per-port offloading can't be enabled on a queue while
1644 * disabled on another queue. A pure per-port offloading can't
1645 * be enabled for any queue as new added one if it hasn't been
1646 * enabled in rte_eth_dev_configure().
1648 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1649 local_conf.offloads) {
1651 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1652 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1653 port_id, rx_queue_id, local_conf.offloads,
1654 dev_info.rx_queue_offload_capa,
1659 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1660 socket_id, &local_conf, mp);
1662 if (!dev->data->min_rx_buf_size ||
1663 dev->data->min_rx_buf_size > mbp_buf_size)
1664 dev->data->min_rx_buf_size = mbp_buf_size;
1667 return eth_err(port_id, ret);
1671 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1672 uint16_t nb_tx_desc, unsigned int socket_id,
1673 const struct rte_eth_txconf *tx_conf)
1675 struct rte_eth_dev *dev;
1676 struct rte_eth_dev_info dev_info;
1677 struct rte_eth_txconf local_conf;
1680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1682 dev = &rte_eth_devices[port_id];
1683 if (tx_queue_id >= dev->data->nb_tx_queues) {
1684 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1691 rte_eth_dev_info_get(port_id, &dev_info);
1693 /* Use default specified by driver, if nb_tx_desc is zero */
1694 if (nb_tx_desc == 0) {
1695 nb_tx_desc = dev_info.default_txportconf.ring_size;
1696 /* If driver default is zero, fall back on EAL default */
1697 if (nb_tx_desc == 0)
1698 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1700 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1701 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1702 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1704 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1705 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1706 dev_info.tx_desc_lim.nb_min,
1707 dev_info.tx_desc_lim.nb_align);
1711 if (dev->data->dev_started &&
1712 !(dev_info.dev_capa &
1713 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1716 if (dev->data->dev_started &&
1717 (dev->data->tx_queue_state[tx_queue_id] !=
1718 RTE_ETH_QUEUE_STATE_STOPPED))
1721 txq = dev->data->tx_queues;
1722 if (txq[tx_queue_id]) {
1723 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1725 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1726 txq[tx_queue_id] = NULL;
1729 if (tx_conf == NULL)
1730 tx_conf = &dev_info.default_txconf;
1732 local_conf = *tx_conf;
1735 * If an offloading has already been enabled in
1736 * rte_eth_dev_configure(), it has been enabled on all queues,
1737 * so there is no need to enable it in this queue again.
1738 * The local_conf.offloads input to underlying PMD only carries
1739 * those offloadings which are only enabled on this queue and
1740 * not enabled on all queues.
1742 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1745 * New added offloadings for this queue are those not enabled in
1746 * rte_eth_dev_configure() and they must be per-queue type.
1747 * A pure per-port offloading can't be enabled on a queue while
1748 * disabled on another queue. A pure per-port offloading can't
1749 * be enabled for any queue as new added one if it hasn't been
1750 * enabled in rte_eth_dev_configure().
1752 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1753 local_conf.offloads) {
1755 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1756 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1757 port_id, tx_queue_id, local_conf.offloads,
1758 dev_info.tx_queue_offload_capa,
1763 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1764 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1768 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1769 void *userdata __rte_unused)
1773 for (i = 0; i < unsent; i++)
1774 rte_pktmbuf_free(pkts[i]);
1778 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1781 uint64_t *count = userdata;
1784 for (i = 0; i < unsent; i++)
1785 rte_pktmbuf_free(pkts[i]);
1791 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1792 buffer_tx_error_fn cbfn, void *userdata)
1794 buffer->error_callback = cbfn;
1795 buffer->error_userdata = userdata;
1800 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1807 buffer->size = size;
1808 if (buffer->error_callback == NULL) {
1809 ret = rte_eth_tx_buffer_set_err_callback(
1810 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1817 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1819 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1822 /* Validate Input Data. Bail if not valid or not supported. */
1823 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1826 /* Call driver to free pending mbufs. */
1827 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1829 return eth_err(port_id, ret);
1833 rte_eth_promiscuous_enable(uint16_t port_id)
1835 struct rte_eth_dev *dev;
1837 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1838 dev = &rte_eth_devices[port_id];
1840 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1841 (*dev->dev_ops->promiscuous_enable)(dev);
1842 dev->data->promiscuous = 1;
1846 rte_eth_promiscuous_disable(uint16_t port_id)
1848 struct rte_eth_dev *dev;
1850 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1851 dev = &rte_eth_devices[port_id];
1853 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1854 dev->data->promiscuous = 0;
1855 (*dev->dev_ops->promiscuous_disable)(dev);
1859 rte_eth_promiscuous_get(uint16_t port_id)
1861 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1865 dev = &rte_eth_devices[port_id];
1866 return dev->data->promiscuous;
1870 rte_eth_allmulticast_enable(uint16_t port_id)
1872 struct rte_eth_dev *dev;
1874 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1875 dev = &rte_eth_devices[port_id];
1877 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1878 (*dev->dev_ops->allmulticast_enable)(dev);
1879 dev->data->all_multicast = 1;
1883 rte_eth_allmulticast_disable(uint16_t port_id)
1885 struct rte_eth_dev *dev;
1887 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1888 dev = &rte_eth_devices[port_id];
1890 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1891 dev->data->all_multicast = 0;
1892 (*dev->dev_ops->allmulticast_disable)(dev);
1896 rte_eth_allmulticast_get(uint16_t port_id)
1898 struct rte_eth_dev *dev;
1900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1902 dev = &rte_eth_devices[port_id];
1903 return dev->data->all_multicast;
1907 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1909 struct rte_eth_dev *dev;
1911 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1912 dev = &rte_eth_devices[port_id];
1914 if (dev->data->dev_conf.intr_conf.lsc &&
1915 dev->data->dev_started)
1916 rte_eth_linkstatus_get(dev, eth_link);
1918 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1919 (*dev->dev_ops->link_update)(dev, 1);
1920 *eth_link = dev->data->dev_link;
1925 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1927 struct rte_eth_dev *dev;
1929 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1930 dev = &rte_eth_devices[port_id];
1932 if (dev->data->dev_conf.intr_conf.lsc &&
1933 dev->data->dev_started)
1934 rte_eth_linkstatus_get(dev, eth_link);
1936 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1937 (*dev->dev_ops->link_update)(dev, 0);
1938 *eth_link = dev->data->dev_link;
1943 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1945 struct rte_eth_dev *dev;
1947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1949 dev = &rte_eth_devices[port_id];
1950 memset(stats, 0, sizeof(*stats));
1952 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1953 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1954 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1958 rte_eth_stats_reset(uint16_t port_id)
1960 struct rte_eth_dev *dev;
1962 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1963 dev = &rte_eth_devices[port_id];
1965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1966 (*dev->dev_ops->stats_reset)(dev);
1967 dev->data->rx_mbuf_alloc_failed = 0;
1973 get_xstats_basic_count(struct rte_eth_dev *dev)
1975 uint16_t nb_rxqs, nb_txqs;
1978 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1979 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1981 count = RTE_NB_STATS;
1982 count += nb_rxqs * RTE_NB_RXQ_STATS;
1983 count += nb_txqs * RTE_NB_TXQ_STATS;
1989 get_xstats_count(uint16_t port_id)
1991 struct rte_eth_dev *dev;
1994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1995 dev = &rte_eth_devices[port_id];
1996 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1997 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2000 return eth_err(port_id, count);
2002 if (dev->dev_ops->xstats_get_names != NULL) {
2003 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2005 return eth_err(port_id, count);
2010 count += get_xstats_basic_count(dev);
2016 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2019 int cnt_xstats, idx_xstat;
2021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2024 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2029 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2034 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2035 if (cnt_xstats < 0) {
2036 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2040 /* Get id-name lookup table */
2041 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2043 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2044 port_id, xstats_names, cnt_xstats, NULL)) {
2045 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2049 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2050 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2059 /* retrieve basic stats names */
2061 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2062 struct rte_eth_xstat_name *xstats_names)
2064 int cnt_used_entries = 0;
2065 uint32_t idx, id_queue;
2068 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2069 strlcpy(xstats_names[cnt_used_entries].name,
2070 rte_stats_strings[idx].name,
2071 sizeof(xstats_names[0].name));
2074 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2075 for (id_queue = 0; id_queue < num_q; id_queue++) {
2076 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2077 snprintf(xstats_names[cnt_used_entries].name,
2078 sizeof(xstats_names[0].name),
2080 id_queue, rte_rxq_stats_strings[idx].name);
2085 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2086 for (id_queue = 0; id_queue < num_q; id_queue++) {
2087 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2088 snprintf(xstats_names[cnt_used_entries].name,
2089 sizeof(xstats_names[0].name),
2091 id_queue, rte_txq_stats_strings[idx].name);
2095 return cnt_used_entries;
2098 /* retrieve ethdev extended statistics names */
2100 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2101 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2104 struct rte_eth_xstat_name *xstats_names_copy;
2105 unsigned int no_basic_stat_requested = 1;
2106 unsigned int no_ext_stat_requested = 1;
2107 unsigned int expected_entries;
2108 unsigned int basic_count;
2109 struct rte_eth_dev *dev;
2113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2114 dev = &rte_eth_devices[port_id];
2116 basic_count = get_xstats_basic_count(dev);
2117 ret = get_xstats_count(port_id);
2120 expected_entries = (unsigned int)ret;
2122 /* Return max number of stats if no ids given */
2125 return expected_entries;
2126 else if (xstats_names && size < expected_entries)
2127 return expected_entries;
2130 if (ids && !xstats_names)
2133 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2134 uint64_t ids_copy[size];
2136 for (i = 0; i < size; i++) {
2137 if (ids[i] < basic_count) {
2138 no_basic_stat_requested = 0;
2143 * Convert ids to xstats ids that PMD knows.
2144 * ids known by user are basic + extended stats.
2146 ids_copy[i] = ids[i] - basic_count;
2149 if (no_basic_stat_requested)
2150 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2151 xstats_names, ids_copy, size);
2154 /* Retrieve all stats */
2156 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2158 if (num_stats < 0 || num_stats > (int)expected_entries)
2161 return expected_entries;
2164 xstats_names_copy = calloc(expected_entries,
2165 sizeof(struct rte_eth_xstat_name));
2167 if (!xstats_names_copy) {
2168 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2173 for (i = 0; i < size; i++) {
2174 if (ids[i] >= basic_count) {
2175 no_ext_stat_requested = 0;
2181 /* Fill xstats_names_copy structure */
2182 if (ids && no_ext_stat_requested) {
2183 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2185 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2188 free(xstats_names_copy);
2194 for (i = 0; i < size; i++) {
2195 if (ids[i] >= expected_entries) {
2196 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2197 free(xstats_names_copy);
2200 xstats_names[i] = xstats_names_copy[ids[i]];
2203 free(xstats_names_copy);
2208 rte_eth_xstats_get_names(uint16_t port_id,
2209 struct rte_eth_xstat_name *xstats_names,
2212 struct rte_eth_dev *dev;
2213 int cnt_used_entries;
2214 int cnt_expected_entries;
2215 int cnt_driver_entries;
2217 cnt_expected_entries = get_xstats_count(port_id);
2218 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2219 (int)size < cnt_expected_entries)
2220 return cnt_expected_entries;
2222 /* port_id checked in get_xstats_count() */
2223 dev = &rte_eth_devices[port_id];
2225 cnt_used_entries = rte_eth_basic_stats_get_names(
2228 if (dev->dev_ops->xstats_get_names != NULL) {
2229 /* If there are any driver-specific xstats, append them
2232 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2234 xstats_names + cnt_used_entries,
2235 size - cnt_used_entries);
2236 if (cnt_driver_entries < 0)
2237 return eth_err(port_id, cnt_driver_entries);
2238 cnt_used_entries += cnt_driver_entries;
2241 return cnt_used_entries;
2246 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2248 struct rte_eth_dev *dev;
2249 struct rte_eth_stats eth_stats;
2250 unsigned int count = 0, i, q;
2251 uint64_t val, *stats_ptr;
2252 uint16_t nb_rxqs, nb_txqs;
2255 ret = rte_eth_stats_get(port_id, ð_stats);
2259 dev = &rte_eth_devices[port_id];
2261 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2262 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2265 for (i = 0; i < RTE_NB_STATS; i++) {
2266 stats_ptr = RTE_PTR_ADD(ð_stats,
2267 rte_stats_strings[i].offset);
2269 xstats[count++].value = val;
2273 for (q = 0; q < nb_rxqs; q++) {
2274 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2275 stats_ptr = RTE_PTR_ADD(ð_stats,
2276 rte_rxq_stats_strings[i].offset +
2277 q * sizeof(uint64_t));
2279 xstats[count++].value = val;
2284 for (q = 0; q < nb_txqs; q++) {
2285 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2286 stats_ptr = RTE_PTR_ADD(ð_stats,
2287 rte_txq_stats_strings[i].offset +
2288 q * sizeof(uint64_t));
2290 xstats[count++].value = val;
2296 /* retrieve ethdev extended statistics */
2298 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2299 uint64_t *values, unsigned int size)
2301 unsigned int no_basic_stat_requested = 1;
2302 unsigned int no_ext_stat_requested = 1;
2303 unsigned int num_xstats_filled;
2304 unsigned int basic_count;
2305 uint16_t expected_entries;
2306 struct rte_eth_dev *dev;
2310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2311 ret = get_xstats_count(port_id);
2314 expected_entries = (uint16_t)ret;
2315 struct rte_eth_xstat xstats[expected_entries];
2316 dev = &rte_eth_devices[port_id];
2317 basic_count = get_xstats_basic_count(dev);
2319 /* Return max number of stats if no ids given */
2322 return expected_entries;
2323 else if (values && size < expected_entries)
2324 return expected_entries;
2330 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2331 unsigned int basic_count = get_xstats_basic_count(dev);
2332 uint64_t ids_copy[size];
2334 for (i = 0; i < size; i++) {
2335 if (ids[i] < basic_count) {
2336 no_basic_stat_requested = 0;
2341 * Convert ids to xstats ids that PMD knows.
2342 * ids known by user are basic + extended stats.
2344 ids_copy[i] = ids[i] - basic_count;
2347 if (no_basic_stat_requested)
2348 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2353 for (i = 0; i < size; i++) {
2354 if (ids[i] >= basic_count) {
2355 no_ext_stat_requested = 0;
2361 /* Fill the xstats structure */
2362 if (ids && no_ext_stat_requested)
2363 ret = rte_eth_basic_stats_get(port_id, xstats);
2365 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2369 num_xstats_filled = (unsigned int)ret;
2371 /* Return all stats */
2373 for (i = 0; i < num_xstats_filled; i++)
2374 values[i] = xstats[i].value;
2375 return expected_entries;
2379 for (i = 0; i < size; i++) {
2380 if (ids[i] >= expected_entries) {
2381 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2384 values[i] = xstats[ids[i]].value;
2390 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2393 struct rte_eth_dev *dev;
2394 unsigned int count = 0, i;
2395 signed int xcount = 0;
2396 uint16_t nb_rxqs, nb_txqs;
2399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2401 dev = &rte_eth_devices[port_id];
2403 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2404 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2406 /* Return generic statistics */
2407 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2408 (nb_txqs * RTE_NB_TXQ_STATS);
2410 /* implemented by the driver */
2411 if (dev->dev_ops->xstats_get != NULL) {
2412 /* Retrieve the xstats from the driver at the end of the
2415 xcount = (*dev->dev_ops->xstats_get)(dev,
2416 xstats ? xstats + count : NULL,
2417 (n > count) ? n - count : 0);
2420 return eth_err(port_id, xcount);
2423 if (n < count + xcount || xstats == NULL)
2424 return count + xcount;
2426 /* now fill the xstats structure */
2427 ret = rte_eth_basic_stats_get(port_id, xstats);
2432 for (i = 0; i < count; i++)
2434 /* add an offset to driver-specific stats */
2435 for ( ; i < count + xcount; i++)
2436 xstats[i].id += count;
2438 return count + xcount;
2441 /* reset ethdev extended statistics */
2443 rte_eth_xstats_reset(uint16_t port_id)
2445 struct rte_eth_dev *dev;
2447 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2448 dev = &rte_eth_devices[port_id];
2450 /* implemented by the driver */
2451 if (dev->dev_ops->xstats_reset != NULL) {
2452 (*dev->dev_ops->xstats_reset)(dev);
2456 /* fallback to default */
2457 rte_eth_stats_reset(port_id);
2461 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2464 struct rte_eth_dev *dev;
2466 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2468 dev = &rte_eth_devices[port_id];
2470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2472 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2475 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2478 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2481 return (*dev->dev_ops->queue_stats_mapping_set)
2482 (dev, queue_id, stat_idx, is_rx);
2487 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2490 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2491 stat_idx, STAT_QMAP_TX));
2496 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2499 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2500 stat_idx, STAT_QMAP_RX));
2504 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2506 struct rte_eth_dev *dev;
2508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2509 dev = &rte_eth_devices[port_id];
2511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2512 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2513 fw_version, fw_size));
2517 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2519 struct rte_eth_dev *dev;
2520 const struct rte_eth_desc_lim lim = {
2521 .nb_max = UINT16_MAX,
2526 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2527 dev = &rte_eth_devices[port_id];
2529 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2530 dev_info->rx_desc_lim = lim;
2531 dev_info->tx_desc_lim = lim;
2532 dev_info->device = dev->device;
2533 dev_info->min_mtu = ETHER_MIN_MTU;
2534 dev_info->max_mtu = UINT16_MAX;
2536 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2537 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2538 dev_info->driver_name = dev->device->driver->name;
2539 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2540 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2542 dev_info->dev_flags = &dev->data->dev_flags;
2546 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2547 uint32_t *ptypes, int num)
2550 struct rte_eth_dev *dev;
2551 const uint32_t *all_ptypes;
2553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2554 dev = &rte_eth_devices[port_id];
2555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2556 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2561 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2562 if (all_ptypes[i] & ptype_mask) {
2564 ptypes[j] = all_ptypes[i];
2572 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2574 struct rte_eth_dev *dev;
2576 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2577 dev = &rte_eth_devices[port_id];
2578 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2583 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2585 struct rte_eth_dev *dev;
2587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2589 dev = &rte_eth_devices[port_id];
2590 *mtu = dev->data->mtu;
2595 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2598 struct rte_eth_dev_info dev_info;
2599 struct rte_eth_dev *dev;
2601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2602 dev = &rte_eth_devices[port_id];
2603 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2606 * Check if the device supports dev_infos_get, if it does not
2607 * skip min_mtu/max_mtu validation here as this requires values
2608 * that are populated within the call to rte_eth_dev_info_get()
2609 * which relies on dev->dev_ops->dev_infos_get.
2611 if (*dev->dev_ops->dev_infos_get != NULL) {
2612 rte_eth_dev_info_get(port_id, &dev_info);
2613 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
2617 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2619 dev->data->mtu = mtu;
2621 return eth_err(port_id, ret);
2625 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2627 struct rte_eth_dev *dev;
2630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2631 dev = &rte_eth_devices[port_id];
2632 if (!(dev->data->dev_conf.rxmode.offloads &
2633 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2634 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2639 if (vlan_id > 4095) {
2640 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2646 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2648 struct rte_vlan_filter_conf *vfc;
2652 vfc = &dev->data->vlan_filter_conf;
2653 vidx = vlan_id / 64;
2654 vbit = vlan_id % 64;
2657 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2659 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2662 return eth_err(port_id, ret);
2666 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2669 struct rte_eth_dev *dev;
2671 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2672 dev = &rte_eth_devices[port_id];
2673 if (rx_queue_id >= dev->data->nb_rx_queues) {
2674 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2678 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2679 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2685 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2686 enum rte_vlan_type vlan_type,
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 dev = &rte_eth_devices[port_id];
2693 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2695 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2700 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2702 struct rte_eth_dev *dev;
2706 uint64_t orig_offloads;
2708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2709 dev = &rte_eth_devices[port_id];
2711 /* save original values in case of failure */
2712 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2714 /*check which option changed by application*/
2715 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2716 org = !!(dev->data->dev_conf.rxmode.offloads &
2717 DEV_RX_OFFLOAD_VLAN_STRIP);
2720 dev->data->dev_conf.rxmode.offloads |=
2721 DEV_RX_OFFLOAD_VLAN_STRIP;
2723 dev->data->dev_conf.rxmode.offloads &=
2724 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2725 mask |= ETH_VLAN_STRIP_MASK;
2728 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2729 org = !!(dev->data->dev_conf.rxmode.offloads &
2730 DEV_RX_OFFLOAD_VLAN_FILTER);
2733 dev->data->dev_conf.rxmode.offloads |=
2734 DEV_RX_OFFLOAD_VLAN_FILTER;
2736 dev->data->dev_conf.rxmode.offloads &=
2737 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2738 mask |= ETH_VLAN_FILTER_MASK;
2741 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2742 org = !!(dev->data->dev_conf.rxmode.offloads &
2743 DEV_RX_OFFLOAD_VLAN_EXTEND);
2746 dev->data->dev_conf.rxmode.offloads |=
2747 DEV_RX_OFFLOAD_VLAN_EXTEND;
2749 dev->data->dev_conf.rxmode.offloads &=
2750 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2751 mask |= ETH_VLAN_EXTEND_MASK;
2758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2759 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2761 /* hit an error restore original values */
2762 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2765 return eth_err(port_id, ret);
2769 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2771 struct rte_eth_dev *dev;
2774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 dev = &rte_eth_devices[port_id];
2777 if (dev->data->dev_conf.rxmode.offloads &
2778 DEV_RX_OFFLOAD_VLAN_STRIP)
2779 ret |= ETH_VLAN_STRIP_OFFLOAD;
2781 if (dev->data->dev_conf.rxmode.offloads &
2782 DEV_RX_OFFLOAD_VLAN_FILTER)
2783 ret |= ETH_VLAN_FILTER_OFFLOAD;
2785 if (dev->data->dev_conf.rxmode.offloads &
2786 DEV_RX_OFFLOAD_VLAN_EXTEND)
2787 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2793 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2795 struct rte_eth_dev *dev;
2797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2798 dev = &rte_eth_devices[port_id];
2799 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2801 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2805 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2807 struct rte_eth_dev *dev;
2809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2810 dev = &rte_eth_devices[port_id];
2811 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2812 memset(fc_conf, 0, sizeof(*fc_conf));
2813 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2817 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2819 struct rte_eth_dev *dev;
2821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2823 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2827 dev = &rte_eth_devices[port_id];
2828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2829 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2833 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2834 struct rte_eth_pfc_conf *pfc_conf)
2836 struct rte_eth_dev *dev;
2838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2839 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2840 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2844 dev = &rte_eth_devices[port_id];
2845 /* High water, low water validation are device specific */
2846 if (*dev->dev_ops->priority_flow_ctrl_set)
2847 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2853 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2861 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2862 for (i = 0; i < num; i++) {
2863 if (reta_conf[i].mask)
2871 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2875 uint16_t i, idx, shift;
2881 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2885 for (i = 0; i < reta_size; i++) {
2886 idx = i / RTE_RETA_GROUP_SIZE;
2887 shift = i % RTE_RETA_GROUP_SIZE;
2888 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2889 (reta_conf[idx].reta[shift] >= max_rxq)) {
2891 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2893 reta_conf[idx].reta[shift], max_rxq);
2902 rte_eth_dev_rss_reta_update(uint16_t port_id,
2903 struct rte_eth_rss_reta_entry64 *reta_conf,
2906 struct rte_eth_dev *dev;
2909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2910 /* Check mask bits */
2911 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2915 dev = &rte_eth_devices[port_id];
2917 /* Check entry value */
2918 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2919 dev->data->nb_rx_queues);
2923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2924 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2929 rte_eth_dev_rss_reta_query(uint16_t port_id,
2930 struct rte_eth_rss_reta_entry64 *reta_conf,
2933 struct rte_eth_dev *dev;
2936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2938 /* Check mask bits */
2939 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2943 dev = &rte_eth_devices[port_id];
2944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2945 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2950 rte_eth_dev_rss_hash_update(uint16_t port_id,
2951 struct rte_eth_rss_conf *rss_conf)
2953 struct rte_eth_dev *dev;
2954 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2957 dev = &rte_eth_devices[port_id];
2958 rte_eth_dev_info_get(port_id, &dev_info);
2959 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2960 dev_info.flow_type_rss_offloads) {
2962 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2963 port_id, rss_conf->rss_hf,
2964 dev_info.flow_type_rss_offloads);
2967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2968 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2973 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2974 struct rte_eth_rss_conf *rss_conf)
2976 struct rte_eth_dev *dev;
2978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2979 dev = &rte_eth_devices[port_id];
2980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2981 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2986 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2987 struct rte_eth_udp_tunnel *udp_tunnel)
2989 struct rte_eth_dev *dev;
2991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2992 if (udp_tunnel == NULL) {
2993 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2997 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2998 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3002 dev = &rte_eth_devices[port_id];
3003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3004 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3009 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3010 struct rte_eth_udp_tunnel *udp_tunnel)
3012 struct rte_eth_dev *dev;
3014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3015 dev = &rte_eth_devices[port_id];
3017 if (udp_tunnel == NULL) {
3018 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3022 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3023 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3028 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3033 rte_eth_led_on(uint16_t port_id)
3035 struct rte_eth_dev *dev;
3037 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3038 dev = &rte_eth_devices[port_id];
3039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3040 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3044 rte_eth_led_off(uint16_t port_id)
3046 struct rte_eth_dev *dev;
3048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 dev = &rte_eth_devices[port_id];
3050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3051 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3055 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3059 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3061 struct rte_eth_dev_info dev_info;
3062 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3066 rte_eth_dev_info_get(port_id, &dev_info);
3068 for (i = 0; i < dev_info.max_mac_addrs; i++)
3069 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3075 static const struct ether_addr null_mac_addr;
3078 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3081 struct rte_eth_dev *dev;
3086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3087 dev = &rte_eth_devices[port_id];
3088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3090 if (is_zero_ether_addr(addr)) {
3091 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3095 if (pool >= ETH_64_POOLS) {
3096 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3100 index = get_mac_addr_index(port_id, addr);
3102 index = get_mac_addr_index(port_id, &null_mac_addr);
3104 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3109 pool_mask = dev->data->mac_pool_sel[index];
3111 /* Check if both MAC address and pool is already there, and do nothing */
3112 if (pool_mask & (1ULL << pool))
3117 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3120 /* Update address in NIC data structure */
3121 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3123 /* Update pool bitmap in NIC data structure */
3124 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3127 return eth_err(port_id, ret);
3131 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3133 struct rte_eth_dev *dev;
3136 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3137 dev = &rte_eth_devices[port_id];
3138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3140 index = get_mac_addr_index(port_id, addr);
3143 "Port %u: Cannot remove default MAC address\n",
3146 } else if (index < 0)
3147 return 0; /* Do nothing if address wasn't found */
3150 (*dev->dev_ops->mac_addr_remove)(dev, index);
3152 /* Update address in NIC data structure */
3153 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3155 /* reset pool bitmap */
3156 dev->data->mac_pool_sel[index] = 0;
3162 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3164 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3169 if (!is_valid_assigned_ether_addr(addr))
3172 dev = &rte_eth_devices[port_id];
3173 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3175 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3179 /* Update default address in NIC data structure */
3180 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3187 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3191 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3193 struct rte_eth_dev_info dev_info;
3194 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3197 rte_eth_dev_info_get(port_id, &dev_info);
3198 if (!dev->data->hash_mac_addrs)
3201 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3202 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3203 ETHER_ADDR_LEN) == 0)
3210 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3215 struct rte_eth_dev *dev;
3217 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3219 dev = &rte_eth_devices[port_id];
3220 if (is_zero_ether_addr(addr)) {
3221 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3226 index = get_hash_mac_addr_index(port_id, addr);
3227 /* Check if it's already there, and do nothing */
3228 if ((index >= 0) && on)
3234 "Port %u: the MAC address was not set in UTA\n",
3239 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3241 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3248 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3250 /* Update address in NIC data structure */
3252 ether_addr_copy(addr,
3253 &dev->data->hash_mac_addrs[index]);
3255 ether_addr_copy(&null_mac_addr,
3256 &dev->data->hash_mac_addrs[index]);
3259 return eth_err(port_id, ret);
3263 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3265 struct rte_eth_dev *dev;
3267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269 dev = &rte_eth_devices[port_id];
3271 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3272 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3276 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3279 struct rte_eth_dev *dev;
3280 struct rte_eth_dev_info dev_info;
3281 struct rte_eth_link link;
3283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3285 dev = &rte_eth_devices[port_id];
3286 rte_eth_dev_info_get(port_id, &dev_info);
3287 link = dev->data->dev_link;
3289 if (queue_idx > dev_info.max_tx_queues) {
3291 "Set queue rate limit:port %u: invalid queue id=%u\n",
3292 port_id, queue_idx);
3296 if (tx_rate > link.link_speed) {
3298 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3299 tx_rate, link.link_speed);
3303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3304 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3305 queue_idx, tx_rate));
3309 rte_eth_mirror_rule_set(uint16_t port_id,
3310 struct rte_eth_mirror_conf *mirror_conf,
3311 uint8_t rule_id, uint8_t on)
3313 struct rte_eth_dev *dev;
3315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3316 if (mirror_conf->rule_type == 0) {
3317 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3321 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3322 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3327 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3328 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3329 (mirror_conf->pool_mask == 0)) {
3331 "Invalid mirror pool, pool mask can not be 0\n");
3335 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3336 mirror_conf->vlan.vlan_mask == 0) {
3338 "Invalid vlan mask, vlan mask can not be 0\n");
3342 dev = &rte_eth_devices[port_id];
3343 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3345 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3346 mirror_conf, rule_id, on));
3350 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3352 struct rte_eth_dev *dev;
3354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3356 dev = &rte_eth_devices[port_id];
3357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3359 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3363 RTE_INIT(eth_dev_init_cb_lists)
3367 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3368 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3372 rte_eth_dev_callback_register(uint16_t port_id,
3373 enum rte_eth_event_type event,
3374 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3376 struct rte_eth_dev *dev;
3377 struct rte_eth_dev_callback *user_cb;
3378 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3384 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3385 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3389 if (port_id == RTE_ETH_ALL) {
3391 last_port = RTE_MAX_ETHPORTS - 1;
3393 next_port = last_port = port_id;
3396 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3399 dev = &rte_eth_devices[next_port];
3401 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3402 if (user_cb->cb_fn == cb_fn &&
3403 user_cb->cb_arg == cb_arg &&
3404 user_cb->event == event) {
3409 /* create a new callback. */
3410 if (user_cb == NULL) {
3411 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3412 sizeof(struct rte_eth_dev_callback), 0);
3413 if (user_cb != NULL) {
3414 user_cb->cb_fn = cb_fn;
3415 user_cb->cb_arg = cb_arg;
3416 user_cb->event = event;
3417 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3420 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3421 rte_eth_dev_callback_unregister(port_id, event,
3427 } while (++next_port <= last_port);
3429 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3434 rte_eth_dev_callback_unregister(uint16_t port_id,
3435 enum rte_eth_event_type event,
3436 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3439 struct rte_eth_dev *dev;
3440 struct rte_eth_dev_callback *cb, *next;
3441 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3447 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3448 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3452 if (port_id == RTE_ETH_ALL) {
3454 last_port = RTE_MAX_ETHPORTS - 1;
3456 next_port = last_port = port_id;
3459 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3462 dev = &rte_eth_devices[next_port];
3464 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3467 next = TAILQ_NEXT(cb, next);
3469 if (cb->cb_fn != cb_fn || cb->event != event ||
3470 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3474 * if this callback is not executing right now,
3477 if (cb->active == 0) {
3478 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3484 } while (++next_port <= last_port);
3486 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3491 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3492 enum rte_eth_event_type event, void *ret_param)
3494 struct rte_eth_dev_callback *cb_lst;
3495 struct rte_eth_dev_callback dev_cb;
3498 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3499 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3500 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3504 if (ret_param != NULL)
3505 dev_cb.ret_param = ret_param;
3507 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3508 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3509 dev_cb.cb_arg, dev_cb.ret_param);
3510 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3513 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3518 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3523 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3525 dev->state = RTE_ETH_DEV_ATTACHED;
3529 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3532 struct rte_eth_dev *dev;
3533 struct rte_intr_handle *intr_handle;
3537 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3539 dev = &rte_eth_devices[port_id];
3541 if (!dev->intr_handle) {
3542 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3546 intr_handle = dev->intr_handle;
3547 if (!intr_handle->intr_vec) {
3548 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3552 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3553 vec = intr_handle->intr_vec[qid];
3554 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3555 if (rc && rc != -EEXIST) {
3557 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3558 port_id, qid, op, epfd, vec);
3565 int __rte_experimental
3566 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3568 struct rte_intr_handle *intr_handle;
3569 struct rte_eth_dev *dev;
3570 unsigned int efd_idx;
3574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3576 dev = &rte_eth_devices[port_id];
3578 if (queue_id >= dev->data->nb_rx_queues) {
3579 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3583 if (!dev->intr_handle) {
3584 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3588 intr_handle = dev->intr_handle;
3589 if (!intr_handle->intr_vec) {
3590 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3594 vec = intr_handle->intr_vec[queue_id];
3595 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3596 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3597 fd = intr_handle->efds[efd_idx];
3602 const struct rte_memzone *
3603 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3604 uint16_t queue_id, size_t size, unsigned align,
3607 char z_name[RTE_MEMZONE_NAMESIZE];
3608 const struct rte_memzone *mz;
3611 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3612 dev->data->port_id, queue_id, ring_name);
3613 if (rc >= RTE_MEMZONE_NAMESIZE) {
3614 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3615 rte_errno = ENAMETOOLONG;
3619 mz = rte_memzone_lookup(z_name);
3623 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3624 RTE_MEMZONE_IOVA_CONTIG, align);
3627 int __rte_experimental
3628 rte_eth_dev_create(struct rte_device *device, const char *name,
3629 size_t priv_data_size,
3630 ethdev_bus_specific_init ethdev_bus_specific_init,
3631 void *bus_init_params,
3632 ethdev_init_t ethdev_init, void *init_params)
3634 struct rte_eth_dev *ethdev;
3637 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3639 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3640 ethdev = rte_eth_dev_allocate(name);
3644 if (priv_data_size) {
3645 ethdev->data->dev_private = rte_zmalloc_socket(
3646 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3649 if (!ethdev->data->dev_private) {
3650 RTE_LOG(ERR, EAL, "failed to allocate private data");
3656 ethdev = rte_eth_dev_attach_secondary(name);
3658 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3659 "ethdev doesn't exist");
3664 ethdev->device = device;
3666 if (ethdev_bus_specific_init) {
3667 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3670 "ethdev bus specific initialisation failed");
3675 retval = ethdev_init(ethdev, init_params);
3677 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3681 rte_eth_dev_probing_finish(ethdev);
3686 rte_eth_dev_release_port(ethdev);
3690 int __rte_experimental
3691 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3692 ethdev_uninit_t ethdev_uninit)
3696 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3700 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3702 ret = ethdev_uninit(ethdev);
3706 return rte_eth_dev_release_port(ethdev);
3710 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3711 int epfd, int op, void *data)
3714 struct rte_eth_dev *dev;
3715 struct rte_intr_handle *intr_handle;
3718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3720 dev = &rte_eth_devices[port_id];
3721 if (queue_id >= dev->data->nb_rx_queues) {
3722 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3726 if (!dev->intr_handle) {
3727 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3731 intr_handle = dev->intr_handle;
3732 if (!intr_handle->intr_vec) {
3733 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3737 vec = intr_handle->intr_vec[queue_id];
3738 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3739 if (rc && rc != -EEXIST) {
3741 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3742 port_id, queue_id, op, epfd, vec);
3750 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3753 struct rte_eth_dev *dev;
3755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3757 dev = &rte_eth_devices[port_id];
3759 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3760 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3765 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3768 struct rte_eth_dev *dev;
3770 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3772 dev = &rte_eth_devices[port_id];
3774 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3775 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3781 rte_eth_dev_filter_supported(uint16_t port_id,
3782 enum rte_filter_type filter_type)
3784 struct rte_eth_dev *dev;
3786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3788 dev = &rte_eth_devices[port_id];
3789 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3790 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3791 RTE_ETH_FILTER_NOP, NULL);
3795 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3796 enum rte_filter_op filter_op, void *arg)
3798 struct rte_eth_dev *dev;
3800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3802 dev = &rte_eth_devices[port_id];
3803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3804 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3808 const struct rte_eth_rxtx_callback *
3809 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3810 rte_rx_callback_fn fn, void *user_param)
3812 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3813 rte_errno = ENOTSUP;
3816 /* check input parameters */
3817 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3818 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3822 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3830 cb->param = user_param;
3832 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3833 /* Add the callbacks in fifo order. */
3834 struct rte_eth_rxtx_callback *tail =
3835 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3838 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3845 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3850 const struct rte_eth_rxtx_callback *
3851 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3852 rte_rx_callback_fn fn, void *user_param)
3854 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3855 rte_errno = ENOTSUP;
3858 /* check input parameters */
3859 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3860 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3865 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3873 cb->param = user_param;
3875 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3876 /* Add the callbacks at fisrt position*/
3877 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3879 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3880 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3885 const struct rte_eth_rxtx_callback *
3886 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3887 rte_tx_callback_fn fn, void *user_param)
3889 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3890 rte_errno = ENOTSUP;
3893 /* check input parameters */
3894 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3895 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3900 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3908 cb->param = user_param;
3910 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3911 /* Add the callbacks in fifo order. */
3912 struct rte_eth_rxtx_callback *tail =
3913 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3916 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3923 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3929 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3930 const struct rte_eth_rxtx_callback *user_cb)
3932 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3935 /* Check input parameters. */
3936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3937 if (user_cb == NULL ||
3938 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3941 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3942 struct rte_eth_rxtx_callback *cb;
3943 struct rte_eth_rxtx_callback **prev_cb;
3946 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3947 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3948 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3950 if (cb == user_cb) {
3951 /* Remove the user cb from the callback list. */
3952 *prev_cb = cb->next;
3957 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3963 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3964 const struct rte_eth_rxtx_callback *user_cb)
3966 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3969 /* Check input parameters. */
3970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3971 if (user_cb == NULL ||
3972 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3975 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3977 struct rte_eth_rxtx_callback *cb;
3978 struct rte_eth_rxtx_callback **prev_cb;
3980 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3981 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3982 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3984 if (cb == user_cb) {
3985 /* Remove the user cb from the callback list. */
3986 *prev_cb = cb->next;
3991 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3997 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3998 struct rte_eth_rxq_info *qinfo)
4000 struct rte_eth_dev *dev;
4002 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4007 dev = &rte_eth_devices[port_id];
4008 if (queue_id >= dev->data->nb_rx_queues) {
4009 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4015 memset(qinfo, 0, sizeof(*qinfo));
4016 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4021 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4022 struct rte_eth_txq_info *qinfo)
4024 struct rte_eth_dev *dev;
4026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4031 dev = &rte_eth_devices[port_id];
4032 if (queue_id >= dev->data->nb_tx_queues) {
4033 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4039 memset(qinfo, 0, sizeof(*qinfo));
4040 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4046 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4047 struct ether_addr *mc_addr_set,
4048 uint32_t nb_mc_addr)
4050 struct rte_eth_dev *dev;
4052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4054 dev = &rte_eth_devices[port_id];
4055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4056 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4057 mc_addr_set, nb_mc_addr));
4061 rte_eth_timesync_enable(uint16_t port_id)
4063 struct rte_eth_dev *dev;
4065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4066 dev = &rte_eth_devices[port_id];
4068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4069 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4073 rte_eth_timesync_disable(uint16_t port_id)
4075 struct rte_eth_dev *dev;
4077 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4078 dev = &rte_eth_devices[port_id];
4080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4081 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4085 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4088 struct rte_eth_dev *dev;
4090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4091 dev = &rte_eth_devices[port_id];
4093 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4094 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4095 (dev, timestamp, flags));
4099 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4100 struct timespec *timestamp)
4102 struct rte_eth_dev *dev;
4104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4105 dev = &rte_eth_devices[port_id];
4107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4108 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4113 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4115 struct rte_eth_dev *dev;
4117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4118 dev = &rte_eth_devices[port_id];
4120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4121 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4126 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4128 struct rte_eth_dev *dev;
4130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4131 dev = &rte_eth_devices[port_id];
4133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4134 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4139 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4141 struct rte_eth_dev *dev;
4143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4144 dev = &rte_eth_devices[port_id];
4146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4147 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4152 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4154 struct rte_eth_dev *dev;
4156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4158 dev = &rte_eth_devices[port_id];
4159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4160 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4164 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4166 struct rte_eth_dev *dev;
4168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4170 dev = &rte_eth_devices[port_id];
4171 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4172 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4176 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4178 struct rte_eth_dev *dev;
4180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4182 dev = &rte_eth_devices[port_id];
4183 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4184 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4188 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4190 struct rte_eth_dev *dev;
4192 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4194 dev = &rte_eth_devices[port_id];
4195 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4196 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4199 int __rte_experimental
4200 rte_eth_dev_get_module_info(uint16_t port_id,
4201 struct rte_eth_dev_module_info *modinfo)
4203 struct rte_eth_dev *dev;
4205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4207 dev = &rte_eth_devices[port_id];
4208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4209 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4212 int __rte_experimental
4213 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4214 struct rte_dev_eeprom_info *info)
4216 struct rte_eth_dev *dev;
4218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4220 dev = &rte_eth_devices[port_id];
4221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4222 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4226 rte_eth_dev_get_dcb_info(uint16_t port_id,
4227 struct rte_eth_dcb_info *dcb_info)
4229 struct rte_eth_dev *dev;
4231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4233 dev = &rte_eth_devices[port_id];
4234 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4237 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4241 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4242 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4244 struct rte_eth_dev *dev;
4246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4247 if (l2_tunnel == NULL) {
4248 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4252 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4253 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4257 dev = &rte_eth_devices[port_id];
4258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4260 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4265 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4266 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4270 struct rte_eth_dev *dev;
4272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4274 if (l2_tunnel == NULL) {
4275 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4279 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4280 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4285 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4289 dev = &rte_eth_devices[port_id];
4290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4292 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4293 l2_tunnel, mask, en));
4297 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4298 const struct rte_eth_desc_lim *desc_lim)
4300 if (desc_lim->nb_align != 0)
4301 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4303 if (desc_lim->nb_max != 0)
4304 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4306 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4310 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4311 uint16_t *nb_rx_desc,
4312 uint16_t *nb_tx_desc)
4314 struct rte_eth_dev *dev;
4315 struct rte_eth_dev_info dev_info;
4317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4319 dev = &rte_eth_devices[port_id];
4320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4322 rte_eth_dev_info_get(port_id, &dev_info);
4324 if (nb_rx_desc != NULL)
4325 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4327 if (nb_tx_desc != NULL)
4328 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4334 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4336 struct rte_eth_dev *dev;
4338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4343 dev = &rte_eth_devices[port_id];
4345 if (*dev->dev_ops->pool_ops_supported == NULL)
4346 return 1; /* all pools are supported */
4348 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4352 * A set of values to describe the possible states of a switch domain.
4354 enum rte_eth_switch_domain_state {
4355 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4356 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4360 * Array of switch domains available for allocation. Array is sized to
4361 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4362 * ethdev ports in a single process.
4364 static struct rte_eth_dev_switch {
4365 enum rte_eth_switch_domain_state state;
4366 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4368 int __rte_experimental
4369 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4373 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4375 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4376 i < RTE_MAX_ETHPORTS; i++) {
4377 if (rte_eth_switch_domains[i].state ==
4378 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4379 rte_eth_switch_domains[i].state =
4380 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4389 int __rte_experimental
4390 rte_eth_switch_domain_free(uint16_t domain_id)
4392 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4393 domain_id >= RTE_MAX_ETHPORTS)
4396 if (rte_eth_switch_domains[domain_id].state !=
4397 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4400 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4406 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4409 struct rte_kvargs_pair *pair;
4412 arglist->str = strdup(str_in);
4413 if (arglist->str == NULL)
4416 letter = arglist->str;
4419 pair = &arglist->pairs[0];
4422 case 0: /* Initial */
4425 else if (*letter == '\0')
4432 case 1: /* Parsing key */
4433 if (*letter == '=') {
4435 pair->value = letter + 1;
4437 } else if (*letter == ',' || *letter == '\0')
4442 case 2: /* Parsing value */
4445 else if (*letter == ',') {
4448 pair = &arglist->pairs[arglist->count];
4450 } else if (*letter == '\0') {
4453 pair = &arglist->pairs[arglist->count];
4458 case 3: /* Parsing list */
4461 else if (*letter == '\0')
4469 int __rte_experimental
4470 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4472 struct rte_kvargs args;
4473 struct rte_kvargs_pair *pair;
4477 memset(eth_da, 0, sizeof(*eth_da));
4479 result = rte_eth_devargs_tokenise(&args, dargs);
4483 for (i = 0; i < args.count; i++) {
4484 pair = &args.pairs[i];
4485 if (strcmp("representor", pair->key) == 0) {
4486 result = rte_eth_devargs_parse_list(pair->value,
4487 rte_eth_devargs_parse_representor_ports,
4501 RTE_INIT(ethdev_init_log)
4503 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4504 if (rte_eth_dev_logtype >= 0)
4505 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);