1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint16_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
130 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
131 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
168 #undef RTE_TX_OFFLOAD_BIT2STR
171 * The user application callback description.
173 * It contains callback address to be registered by user application,
174 * the pointer to the parameters for callback, and the event type.
176 struct rte_eth_dev_callback {
177 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
178 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
179 void *cb_arg; /**< Parameter for callback */
180 void *ret_param; /**< Return parameter */
181 enum rte_eth_event_type event; /**< Interrupt event type */
182 uint32_t active; /**< Callback is executing */
190 int __rte_experimental
191 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
194 struct rte_devargs devargs = {.args = NULL};
195 const char *bus_param_key;
196 char *bus_str = NULL;
197 char *cls_str = NULL;
200 memset(iter, 0, sizeof(*iter));
203 * The devargs string may use various syntaxes:
204 * - 0000:08:00.0,representor=[1-3]
205 * - pci:0000:06:00.0,representor=[0,5]
206 * - class=eth,mac=00:11:22:33:44:55
207 * A new syntax is in development (not yet supported):
208 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
212 * Handle pure class filter (i.e. without any bus-level argument),
213 * from future new syntax.
214 * rte_devargs_parse() is not yet supporting the new syntax,
215 * that's why this simple case is temporarily parsed here.
217 #define iter_anybus_str "class=eth,"
218 if (strncmp(devargs_str, iter_anybus_str,
219 strlen(iter_anybus_str)) == 0) {
220 iter->cls_str = devargs_str + strlen(iter_anybus_str);
224 /* Split bus, device and parameters. */
225 ret = rte_devargs_parse(&devargs, devargs_str);
230 * Assume parameters of old syntax can match only at ethdev level.
231 * Extra parameters will be ignored, thanks to "+" prefix.
233 str_size = strlen(devargs.args) + 2;
234 cls_str = malloc(str_size);
235 if (cls_str == NULL) {
239 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
240 if (ret != str_size - 1) {
244 iter->cls_str = cls_str;
245 free(devargs.args); /* allocated by rte_devargs_parse() */
248 iter->bus = devargs.bus;
249 if (iter->bus->dev_iterate == NULL) {
254 /* Convert bus args to new syntax for use with new API dev_iterate. */
255 if (strcmp(iter->bus->name, "vdev") == 0) {
256 bus_param_key = "name";
257 } else if (strcmp(iter->bus->name, "pci") == 0) {
258 bus_param_key = "addr";
263 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
264 bus_str = malloc(str_size);
265 if (bus_str == NULL) {
269 ret = snprintf(bus_str, str_size, "%s=%s",
270 bus_param_key, devargs.name);
271 if (ret != str_size - 1) {
275 iter->bus_str = bus_str;
278 iter->cls = rte_class_find_by_name("eth");
283 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 uint16_t __rte_experimental
292 rte_eth_iterator_next(struct rte_dev_iterator *iter)
294 if (iter->cls == NULL) /* invalid ethdev iterator */
295 return RTE_MAX_ETHPORTS;
297 do { /* loop to try all matching rte_device */
298 /* If not pure ethdev filter and */
299 if (iter->bus != NULL &&
300 /* not in middle of rte_eth_dev iteration, */
301 iter->class_device == NULL) {
302 /* get next rte_device to try. */
303 iter->device = iter->bus->dev_iterate(
304 iter->device, iter->bus_str, iter);
305 if (iter->device == NULL)
306 break; /* no more rte_device candidate */
308 /* A device is matching bus part, need to check ethdev part. */
309 iter->class_device = iter->cls->dev_iterate(
310 iter->class_device, iter->cls_str, iter);
311 if (iter->class_device != NULL)
312 return eth_dev_to_id(iter->class_device); /* match */
313 } while (iter->bus != NULL); /* need to try next rte_device */
315 /* No more ethdev port to iterate. */
316 rte_eth_iterator_cleanup(iter);
317 return RTE_MAX_ETHPORTS;
320 void __rte_experimental
321 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
323 if (iter->bus_str == NULL)
324 return; /* nothing to free in pure class filter */
325 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
326 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
327 memset(iter, 0, sizeof(*iter));
331 rte_eth_find_next(uint16_t port_id)
333 while (port_id < RTE_MAX_ETHPORTS &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
335 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
338 if (port_id >= RTE_MAX_ETHPORTS)
339 return RTE_MAX_ETHPORTS;
345 rte_eth_dev_shared_data_prepare(void)
347 const unsigned flags = 0;
348 const struct rte_memzone *mz;
350 rte_spinlock_lock(&rte_eth_shared_data_lock);
352 if (rte_eth_dev_shared_data == NULL) {
353 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
354 /* Allocate port data and ownership shared memory. */
355 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
356 sizeof(*rte_eth_dev_shared_data),
357 rte_socket_id(), flags);
359 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
361 rte_panic("Cannot allocate ethdev shared data\n");
363 rte_eth_dev_shared_data = mz->addr;
364 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
365 rte_eth_dev_shared_data->next_owner_id =
366 RTE_ETH_DEV_NO_OWNER + 1;
367 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
368 memset(rte_eth_dev_shared_data->data, 0,
369 sizeof(rte_eth_dev_shared_data->data));
373 rte_spinlock_unlock(&rte_eth_shared_data_lock);
377 is_allocated(const struct rte_eth_dev *ethdev)
379 return ethdev->data->name[0] != '\0';
382 static struct rte_eth_dev *
383 _rte_eth_dev_allocated(const char *name)
387 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
388 if (rte_eth_devices[i].data != NULL &&
389 strcmp(rte_eth_devices[i].data->name, name) == 0)
390 return &rte_eth_devices[i];
396 rte_eth_dev_allocated(const char *name)
398 struct rte_eth_dev *ethdev;
400 rte_eth_dev_shared_data_prepare();
402 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
404 ethdev = _rte_eth_dev_allocated(name);
406 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
412 rte_eth_dev_find_free_port(void)
416 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
417 /* Using shared name field to find a free port. */
418 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
419 RTE_ASSERT(rte_eth_devices[i].state ==
424 return RTE_MAX_ETHPORTS;
427 static struct rte_eth_dev *
428 eth_dev_get(uint16_t port_id)
430 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
432 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
434 eth_dev_last_created_port = port_id;
440 rte_eth_dev_allocate(const char *name)
443 struct rte_eth_dev *eth_dev = NULL;
445 rte_eth_dev_shared_data_prepare();
447 /* Synchronize port creation between primary and secondary threads. */
448 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
450 if (_rte_eth_dev_allocated(name) != NULL) {
452 "Ethernet device with name %s already allocated\n",
457 port_id = rte_eth_dev_find_free_port();
458 if (port_id == RTE_MAX_ETHPORTS) {
460 "Reached maximum number of Ethernet ports\n");
464 eth_dev = eth_dev_get(port_id);
465 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
466 eth_dev->data->port_id = port_id;
467 eth_dev->data->mtu = ETHER_MTU;
470 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
476 * Attach to a port already registered by the primary process, which
477 * makes sure that the same device would have the same port id both
478 * in the primary and secondary process.
481 rte_eth_dev_attach_secondary(const char *name)
484 struct rte_eth_dev *eth_dev = NULL;
486 rte_eth_dev_shared_data_prepare();
488 /* Synchronize port attachment to primary port creation and release. */
489 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
491 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
492 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
495 if (i == RTE_MAX_ETHPORTS) {
497 "Device %s is not driven by the primary process\n",
500 eth_dev = eth_dev_get(i);
501 RTE_ASSERT(eth_dev->data->port_id == i);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
509 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
514 rte_eth_dev_shared_data_prepare();
516 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
518 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
520 eth_dev->state = RTE_ETH_DEV_UNUSED;
522 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
523 rte_free(eth_dev->data->rx_queues);
524 rte_free(eth_dev->data->tx_queues);
525 rte_free(eth_dev->data->mac_addrs);
526 rte_free(eth_dev->data->hash_mac_addrs);
527 rte_free(eth_dev->data->dev_private);
528 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
531 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
537 rte_eth_dev_is_valid_port(uint16_t port_id)
539 if (port_id >= RTE_MAX_ETHPORTS ||
540 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
547 rte_eth_is_valid_owner_id(uint64_t owner_id)
549 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
550 rte_eth_dev_shared_data->next_owner_id <= owner_id)
556 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
558 while (port_id < RTE_MAX_ETHPORTS &&
559 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
560 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
561 rte_eth_devices[port_id].data->owner.id != owner_id))
564 if (port_id >= RTE_MAX_ETHPORTS)
565 return RTE_MAX_ETHPORTS;
570 int __rte_experimental
571 rte_eth_dev_owner_new(uint64_t *owner_id)
573 rte_eth_dev_shared_data_prepare();
575 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
577 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
579 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
584 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
585 const struct rte_eth_dev_owner *new_owner)
587 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
588 struct rte_eth_dev_owner *port_owner;
591 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
592 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
597 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
598 !rte_eth_is_valid_owner_id(old_owner_id)) {
600 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
601 old_owner_id, new_owner->id);
605 port_owner = &rte_eth_devices[port_id].data->owner;
606 if (port_owner->id != old_owner_id) {
608 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
609 port_id, port_owner->name, port_owner->id);
613 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
615 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
616 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
619 port_owner->id = new_owner->id;
621 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
622 port_id, new_owner->name, new_owner->id);
627 int __rte_experimental
628 rte_eth_dev_owner_set(const uint16_t port_id,
629 const struct rte_eth_dev_owner *owner)
633 rte_eth_dev_shared_data_prepare();
635 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
637 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
639 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
643 int __rte_experimental
644 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
646 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
647 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
650 rte_eth_dev_shared_data_prepare();
652 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
654 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
656 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
660 void __rte_experimental
661 rte_eth_dev_owner_delete(const uint64_t owner_id)
665 rte_eth_dev_shared_data_prepare();
667 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
669 if (rte_eth_is_valid_owner_id(owner_id)) {
670 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
671 if (rte_eth_devices[port_id].data->owner.id == owner_id)
672 memset(&rte_eth_devices[port_id].data->owner, 0,
673 sizeof(struct rte_eth_dev_owner));
674 RTE_ETHDEV_LOG(NOTICE,
675 "All port owners owned by %016"PRIx64" identifier have removed\n",
679 "Invalid owner id=%016"PRIx64"\n",
683 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
686 int __rte_experimental
687 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
690 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
692 rte_eth_dev_shared_data_prepare();
694 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
696 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
697 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
701 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
704 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
709 rte_eth_dev_socket_id(uint16_t port_id)
711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
712 return rte_eth_devices[port_id].data->numa_node;
716 rte_eth_dev_get_sec_ctx(uint16_t port_id)
718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
719 return rte_eth_devices[port_id].security_ctx;
723 rte_eth_dev_count(void)
725 return rte_eth_dev_count_avail();
729 rte_eth_dev_count_avail(void)
736 RTE_ETH_FOREACH_DEV(p)
742 uint16_t __rte_experimental
743 rte_eth_dev_count_total(void)
745 uint16_t port, count = 0;
747 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
748 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
755 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
762 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
766 /* shouldn't check 'rte_eth_devices[i].data',
767 * because it might be overwritten by VDEV PMD */
768 tmp = rte_eth_dev_shared_data->data[port_id].name;
774 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
779 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
783 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
784 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
785 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
795 eth_err(uint16_t port_id, int ret)
799 if (rte_eth_dev_is_removed(port_id))
805 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
807 uint16_t old_nb_queues = dev->data->nb_rx_queues;
811 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
812 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
813 sizeof(dev->data->rx_queues[0]) * nb_queues,
814 RTE_CACHE_LINE_SIZE);
815 if (dev->data->rx_queues == NULL) {
816 dev->data->nb_rx_queues = 0;
819 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
822 rxq = dev->data->rx_queues;
824 for (i = nb_queues; i < old_nb_queues; i++)
825 (*dev->dev_ops->rx_queue_release)(rxq[i]);
826 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
827 RTE_CACHE_LINE_SIZE);
830 if (nb_queues > old_nb_queues) {
831 uint16_t new_qs = nb_queues - old_nb_queues;
833 memset(rxq + old_nb_queues, 0,
834 sizeof(rxq[0]) * new_qs);
837 dev->data->rx_queues = rxq;
839 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
842 rxq = dev->data->rx_queues;
844 for (i = nb_queues; i < old_nb_queues; i++)
845 (*dev->dev_ops->rx_queue_release)(rxq[i]);
847 rte_free(dev->data->rx_queues);
848 dev->data->rx_queues = NULL;
850 dev->data->nb_rx_queues = nb_queues;
855 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
857 struct rte_eth_dev *dev;
859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
861 dev = &rte_eth_devices[port_id];
862 if (!dev->data->dev_started) {
864 "Port %u must be started before start any queue\n",
869 if (rx_queue_id >= dev->data->nb_rx_queues) {
870 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
874 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
876 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
878 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
879 rx_queue_id, port_id);
883 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
889 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
891 struct rte_eth_dev *dev;
893 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
895 dev = &rte_eth_devices[port_id];
896 if (rx_queue_id >= dev->data->nb_rx_queues) {
897 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
903 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
905 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
906 rx_queue_id, port_id);
910 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
915 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
917 struct rte_eth_dev *dev;
919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
921 dev = &rte_eth_devices[port_id];
922 if (!dev->data->dev_started) {
924 "Port %u must be started before start any queue\n",
929 if (tx_queue_id >= dev->data->nb_tx_queues) {
930 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
934 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
936 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
938 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
939 tx_queue_id, port_id);
943 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
947 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
949 struct rte_eth_dev *dev;
951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
953 dev = &rte_eth_devices[port_id];
954 if (tx_queue_id >= dev->data->nb_tx_queues) {
955 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
961 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
963 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
964 tx_queue_id, port_id);
968 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
973 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
975 uint16_t old_nb_queues = dev->data->nb_tx_queues;
979 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
980 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
981 sizeof(dev->data->tx_queues[0]) * nb_queues,
982 RTE_CACHE_LINE_SIZE);
983 if (dev->data->tx_queues == NULL) {
984 dev->data->nb_tx_queues = 0;
987 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
988 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
990 txq = dev->data->tx_queues;
992 for (i = nb_queues; i < old_nb_queues; i++)
993 (*dev->dev_ops->tx_queue_release)(txq[i]);
994 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
995 RTE_CACHE_LINE_SIZE);
998 if (nb_queues > old_nb_queues) {
999 uint16_t new_qs = nb_queues - old_nb_queues;
1001 memset(txq + old_nb_queues, 0,
1002 sizeof(txq[0]) * new_qs);
1005 dev->data->tx_queues = txq;
1007 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1008 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1010 txq = dev->data->tx_queues;
1012 for (i = nb_queues; i < old_nb_queues; i++)
1013 (*dev->dev_ops->tx_queue_release)(txq[i]);
1015 rte_free(dev->data->tx_queues);
1016 dev->data->tx_queues = NULL;
1018 dev->data->nb_tx_queues = nb_queues;
1023 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1026 case ETH_SPEED_NUM_10M:
1027 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1028 case ETH_SPEED_NUM_100M:
1029 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1030 case ETH_SPEED_NUM_1G:
1031 return ETH_LINK_SPEED_1G;
1032 case ETH_SPEED_NUM_2_5G:
1033 return ETH_LINK_SPEED_2_5G;
1034 case ETH_SPEED_NUM_5G:
1035 return ETH_LINK_SPEED_5G;
1036 case ETH_SPEED_NUM_10G:
1037 return ETH_LINK_SPEED_10G;
1038 case ETH_SPEED_NUM_20G:
1039 return ETH_LINK_SPEED_20G;
1040 case ETH_SPEED_NUM_25G:
1041 return ETH_LINK_SPEED_25G;
1042 case ETH_SPEED_NUM_40G:
1043 return ETH_LINK_SPEED_40G;
1044 case ETH_SPEED_NUM_50G:
1045 return ETH_LINK_SPEED_50G;
1046 case ETH_SPEED_NUM_56G:
1047 return ETH_LINK_SPEED_56G;
1048 case ETH_SPEED_NUM_100G:
1049 return ETH_LINK_SPEED_100G;
1055 const char * __rte_experimental
1056 rte_eth_dev_rx_offload_name(uint64_t offload)
1058 const char *name = "UNKNOWN";
1061 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1062 if (offload == rte_rx_offload_names[i].offload) {
1063 name = rte_rx_offload_names[i].name;
1071 const char * __rte_experimental
1072 rte_eth_dev_tx_offload_name(uint64_t offload)
1074 const char *name = "UNKNOWN";
1077 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1078 if (offload == rte_tx_offload_names[i].offload) {
1079 name = rte_tx_offload_names[i].name;
1088 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1089 const struct rte_eth_conf *dev_conf)
1091 struct rte_eth_dev *dev;
1092 struct rte_eth_dev_info dev_info;
1093 struct rte_eth_conf local_conf = *dev_conf;
1096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1098 dev = &rte_eth_devices[port_id];
1100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1103 rte_eth_dev_info_get(port_id, &dev_info);
1105 /* If number of queues specified by application for both Rx and Tx is
1106 * zero, use driver preferred values. This cannot be done individually
1107 * as it is valid for either Tx or Rx (but not both) to be zero.
1108 * If driver does not provide any preferred valued, fall back on
1111 if (nb_rx_q == 0 && nb_tx_q == 0) {
1112 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1114 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1115 nb_tx_q = dev_info.default_txportconf.nb_queues;
1117 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1120 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1122 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1123 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1127 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1129 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1130 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1134 if (dev->data->dev_started) {
1136 "Port %u must be stopped to allow configuration\n",
1141 /* Copy the dev_conf parameter into the dev structure */
1142 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1145 * Check that the numbers of RX and TX queues are not greater
1146 * than the maximum number of RX and TX queues supported by the
1147 * configured device.
1149 if (nb_rx_q > dev_info.max_rx_queues) {
1150 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1151 port_id, nb_rx_q, dev_info.max_rx_queues);
1155 if (nb_tx_q > dev_info.max_tx_queues) {
1156 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1157 port_id, nb_tx_q, dev_info.max_tx_queues);
1161 /* Check that the device supports requested interrupts */
1162 if ((dev_conf->intr_conf.lsc == 1) &&
1163 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1164 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1165 dev->device->driver->name);
1168 if ((dev_conf->intr_conf.rmv == 1) &&
1169 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1170 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1171 dev->device->driver->name);
1176 * If jumbo frames are enabled, check that the maximum RX packet
1177 * length is supported by the configured device.
1179 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1180 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1182 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1183 port_id, dev_conf->rxmode.max_rx_pkt_len,
1184 dev_info.max_rx_pktlen);
1186 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1188 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1189 port_id, dev_conf->rxmode.max_rx_pkt_len,
1190 (unsigned)ETHER_MIN_LEN);
1194 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1195 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1196 /* Use default value */
1197 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1201 /* Any requested offloading must be within its device capabilities */
1202 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1203 local_conf.rxmode.offloads) {
1205 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1206 "capabilities 0x%"PRIx64" in %s()\n",
1207 port_id, local_conf.rxmode.offloads,
1208 dev_info.rx_offload_capa,
1212 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1213 local_conf.txmode.offloads) {
1215 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1216 "capabilities 0x%"PRIx64" in %s()\n",
1217 port_id, local_conf.txmode.offloads,
1218 dev_info.tx_offload_capa,
1223 /* Check that device supports requested rss hash functions. */
1224 if ((dev_info.flow_type_rss_offloads |
1225 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1226 dev_info.flow_type_rss_offloads) {
1228 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1229 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1230 dev_info.flow_type_rss_offloads);
1235 * Setup new number of RX/TX queues and reconfigure device.
1237 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1240 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1245 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1248 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1250 rte_eth_dev_rx_queue_config(dev, 0);
1254 diag = (*dev->dev_ops->dev_configure)(dev);
1256 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1258 rte_eth_dev_rx_queue_config(dev, 0);
1259 rte_eth_dev_tx_queue_config(dev, 0);
1260 return eth_err(port_id, diag);
1263 /* Initialize Rx profiling if enabled at compilation time. */
1264 diag = __rte_eth_dev_profile_init(port_id, dev);
1266 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1268 rte_eth_dev_rx_queue_config(dev, 0);
1269 rte_eth_dev_tx_queue_config(dev, 0);
1270 return eth_err(port_id, diag);
1277 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1279 if (dev->data->dev_started) {
1280 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1281 dev->data->port_id);
1285 rte_eth_dev_rx_queue_config(dev, 0);
1286 rte_eth_dev_tx_queue_config(dev, 0);
1288 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1292 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1293 struct rte_eth_dev_info *dev_info)
1295 struct ether_addr *addr;
1300 /* replay MAC address configuration including default MAC */
1301 addr = &dev->data->mac_addrs[0];
1302 if (*dev->dev_ops->mac_addr_set != NULL)
1303 (*dev->dev_ops->mac_addr_set)(dev, addr);
1304 else if (*dev->dev_ops->mac_addr_add != NULL)
1305 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1307 if (*dev->dev_ops->mac_addr_add != NULL) {
1308 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1309 addr = &dev->data->mac_addrs[i];
1311 /* skip zero address */
1312 if (is_zero_ether_addr(addr))
1316 pool_mask = dev->data->mac_pool_sel[i];
1319 if (pool_mask & 1ULL)
1320 (*dev->dev_ops->mac_addr_add)(dev,
1324 } while (pool_mask);
1330 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1331 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1333 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1334 rte_eth_dev_mac_restore(dev, dev_info);
1336 /* replay promiscuous configuration */
1337 if (rte_eth_promiscuous_get(port_id) == 1)
1338 rte_eth_promiscuous_enable(port_id);
1339 else if (rte_eth_promiscuous_get(port_id) == 0)
1340 rte_eth_promiscuous_disable(port_id);
1342 /* replay all multicast configuration */
1343 if (rte_eth_allmulticast_get(port_id) == 1)
1344 rte_eth_allmulticast_enable(port_id);
1345 else if (rte_eth_allmulticast_get(port_id) == 0)
1346 rte_eth_allmulticast_disable(port_id);
1350 rte_eth_dev_start(uint16_t port_id)
1352 struct rte_eth_dev *dev;
1353 struct rte_eth_dev_info dev_info;
1356 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1358 dev = &rte_eth_devices[port_id];
1360 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1362 if (dev->data->dev_started != 0) {
1363 RTE_ETHDEV_LOG(INFO,
1364 "Device with port_id=%"PRIu16" already started\n",
1369 rte_eth_dev_info_get(port_id, &dev_info);
1371 /* Lets restore MAC now if device does not support live change */
1372 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1373 rte_eth_dev_mac_restore(dev, &dev_info);
1375 diag = (*dev->dev_ops->dev_start)(dev);
1377 dev->data->dev_started = 1;
1379 return eth_err(port_id, diag);
1381 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1383 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1385 (*dev->dev_ops->link_update)(dev, 0);
1391 rte_eth_dev_stop(uint16_t port_id)
1393 struct rte_eth_dev *dev;
1395 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1396 dev = &rte_eth_devices[port_id];
1398 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1400 if (dev->data->dev_started == 0) {
1401 RTE_ETHDEV_LOG(INFO,
1402 "Device with port_id=%"PRIu16" already stopped\n",
1407 dev->data->dev_started = 0;
1408 (*dev->dev_ops->dev_stop)(dev);
1412 rte_eth_dev_set_link_up(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1418 dev = &rte_eth_devices[port_id];
1420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1421 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1425 rte_eth_dev_set_link_down(uint16_t port_id)
1427 struct rte_eth_dev *dev;
1429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1431 dev = &rte_eth_devices[port_id];
1433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1434 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1438 rte_eth_dev_close(uint16_t port_id)
1440 struct rte_eth_dev *dev;
1442 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1443 dev = &rte_eth_devices[port_id];
1445 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1446 dev->data->dev_started = 0;
1447 (*dev->dev_ops->dev_close)(dev);
1449 /* check behaviour flag - temporary for PMD migration */
1450 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1451 /* new behaviour: send event + reset state + free all data */
1452 rte_eth_dev_release_port(dev);
1455 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1456 "The driver %s should migrate to the new behaviour.\n",
1457 dev->device->driver->name);
1458 /* old behaviour: only free queue arrays */
1459 dev->data->nb_rx_queues = 0;
1460 rte_free(dev->data->rx_queues);
1461 dev->data->rx_queues = NULL;
1462 dev->data->nb_tx_queues = 0;
1463 rte_free(dev->data->tx_queues);
1464 dev->data->tx_queues = NULL;
1468 rte_eth_dev_reset(uint16_t port_id)
1470 struct rte_eth_dev *dev;
1473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1474 dev = &rte_eth_devices[port_id];
1476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1478 rte_eth_dev_stop(port_id);
1479 ret = dev->dev_ops->dev_reset(dev);
1481 return eth_err(port_id, ret);
1484 int __rte_experimental
1485 rte_eth_dev_is_removed(uint16_t port_id)
1487 struct rte_eth_dev *dev;
1490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1492 dev = &rte_eth_devices[port_id];
1494 if (dev->state == RTE_ETH_DEV_REMOVED)
1497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1499 ret = dev->dev_ops->is_removed(dev);
1501 /* Device is physically removed. */
1502 dev->state = RTE_ETH_DEV_REMOVED;
1508 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1509 uint16_t nb_rx_desc, unsigned int socket_id,
1510 const struct rte_eth_rxconf *rx_conf,
1511 struct rte_mempool *mp)
1514 uint32_t mbp_buf_size;
1515 struct rte_eth_dev *dev;
1516 struct rte_eth_dev_info dev_info;
1517 struct rte_eth_rxconf local_conf;
1520 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1522 dev = &rte_eth_devices[port_id];
1523 if (rx_queue_id >= dev->data->nb_rx_queues) {
1524 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1528 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1532 * Check the size of the mbuf data buffer.
1533 * This value must be provided in the private data of the memory pool.
1534 * First check that the memory pool has a valid private data.
1536 rte_eth_dev_info_get(port_id, &dev_info);
1537 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1538 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1539 mp->name, (int)mp->private_data_size,
1540 (int)sizeof(struct rte_pktmbuf_pool_private));
1543 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1545 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1547 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1548 mp->name, (int)mbp_buf_size,
1549 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1550 (int)RTE_PKTMBUF_HEADROOM,
1551 (int)dev_info.min_rx_bufsize);
1555 /* Use default specified by driver, if nb_rx_desc is zero */
1556 if (nb_rx_desc == 0) {
1557 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1558 /* If driver default is also zero, fall back on EAL default */
1559 if (nb_rx_desc == 0)
1560 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1563 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1564 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1565 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1568 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1569 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1570 dev_info.rx_desc_lim.nb_min,
1571 dev_info.rx_desc_lim.nb_align);
1575 if (dev->data->dev_started &&
1576 !(dev_info.dev_capa &
1577 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1580 if (dev->data->dev_started &&
1581 (dev->data->rx_queue_state[rx_queue_id] !=
1582 RTE_ETH_QUEUE_STATE_STOPPED))
1585 rxq = dev->data->rx_queues;
1586 if (rxq[rx_queue_id]) {
1587 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1589 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1590 rxq[rx_queue_id] = NULL;
1593 if (rx_conf == NULL)
1594 rx_conf = &dev_info.default_rxconf;
1596 local_conf = *rx_conf;
1599 * If an offloading has already been enabled in
1600 * rte_eth_dev_configure(), it has been enabled on all queues,
1601 * so there is no need to enable it in this queue again.
1602 * The local_conf.offloads input to underlying PMD only carries
1603 * those offloadings which are only enabled on this queue and
1604 * not enabled on all queues.
1606 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1609 * New added offloadings for this queue are those not enabled in
1610 * rte_eth_dev_configure() and they must be per-queue type.
1611 * A pure per-port offloading can't be enabled on a queue while
1612 * disabled on another queue. A pure per-port offloading can't
1613 * be enabled for any queue as new added one if it hasn't been
1614 * enabled in rte_eth_dev_configure().
1616 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1617 local_conf.offloads) {
1619 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1620 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1621 port_id, rx_queue_id, local_conf.offloads,
1622 dev_info.rx_queue_offload_capa,
1627 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1628 socket_id, &local_conf, mp);
1630 if (!dev->data->min_rx_buf_size ||
1631 dev->data->min_rx_buf_size > mbp_buf_size)
1632 dev->data->min_rx_buf_size = mbp_buf_size;
1635 return eth_err(port_id, ret);
1639 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1640 uint16_t nb_tx_desc, unsigned int socket_id,
1641 const struct rte_eth_txconf *tx_conf)
1643 struct rte_eth_dev *dev;
1644 struct rte_eth_dev_info dev_info;
1645 struct rte_eth_txconf local_conf;
1648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1650 dev = &rte_eth_devices[port_id];
1651 if (tx_queue_id >= dev->data->nb_tx_queues) {
1652 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1656 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1659 rte_eth_dev_info_get(port_id, &dev_info);
1661 /* Use default specified by driver, if nb_tx_desc is zero */
1662 if (nb_tx_desc == 0) {
1663 nb_tx_desc = dev_info.default_txportconf.ring_size;
1664 /* If driver default is zero, fall back on EAL default */
1665 if (nb_tx_desc == 0)
1666 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1668 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1669 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1670 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1672 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1673 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1674 dev_info.tx_desc_lim.nb_min,
1675 dev_info.tx_desc_lim.nb_align);
1679 if (dev->data->dev_started &&
1680 !(dev_info.dev_capa &
1681 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1684 if (dev->data->dev_started &&
1685 (dev->data->tx_queue_state[tx_queue_id] !=
1686 RTE_ETH_QUEUE_STATE_STOPPED))
1689 txq = dev->data->tx_queues;
1690 if (txq[tx_queue_id]) {
1691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1693 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1694 txq[tx_queue_id] = NULL;
1697 if (tx_conf == NULL)
1698 tx_conf = &dev_info.default_txconf;
1700 local_conf = *tx_conf;
1703 * If an offloading has already been enabled in
1704 * rte_eth_dev_configure(), it has been enabled on all queues,
1705 * so there is no need to enable it in this queue again.
1706 * The local_conf.offloads input to underlying PMD only carries
1707 * those offloadings which are only enabled on this queue and
1708 * not enabled on all queues.
1710 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1713 * New added offloadings for this queue are those not enabled in
1714 * rte_eth_dev_configure() and they must be per-queue type.
1715 * A pure per-port offloading can't be enabled on a queue while
1716 * disabled on another queue. A pure per-port offloading can't
1717 * be enabled for any queue as new added one if it hasn't been
1718 * enabled in rte_eth_dev_configure().
1720 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1721 local_conf.offloads) {
1723 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1724 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1725 port_id, tx_queue_id, local_conf.offloads,
1726 dev_info.tx_queue_offload_capa,
1731 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1732 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1736 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1737 void *userdata __rte_unused)
1741 for (i = 0; i < unsent; i++)
1742 rte_pktmbuf_free(pkts[i]);
1746 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1749 uint64_t *count = userdata;
1752 for (i = 0; i < unsent; i++)
1753 rte_pktmbuf_free(pkts[i]);
1759 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1760 buffer_tx_error_fn cbfn, void *userdata)
1762 buffer->error_callback = cbfn;
1763 buffer->error_userdata = userdata;
1768 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1775 buffer->size = size;
1776 if (buffer->error_callback == NULL) {
1777 ret = rte_eth_tx_buffer_set_err_callback(
1778 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1785 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1787 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1790 /* Validate Input Data. Bail if not valid or not supported. */
1791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1794 /* Call driver to free pending mbufs. */
1795 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1797 return eth_err(port_id, ret);
1801 rte_eth_promiscuous_enable(uint16_t port_id)
1803 struct rte_eth_dev *dev;
1805 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1806 dev = &rte_eth_devices[port_id];
1808 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1809 (*dev->dev_ops->promiscuous_enable)(dev);
1810 dev->data->promiscuous = 1;
1814 rte_eth_promiscuous_disable(uint16_t port_id)
1816 struct rte_eth_dev *dev;
1818 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1819 dev = &rte_eth_devices[port_id];
1821 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1822 dev->data->promiscuous = 0;
1823 (*dev->dev_ops->promiscuous_disable)(dev);
1827 rte_eth_promiscuous_get(uint16_t port_id)
1829 struct rte_eth_dev *dev;
1831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1833 dev = &rte_eth_devices[port_id];
1834 return dev->data->promiscuous;
1838 rte_eth_allmulticast_enable(uint16_t port_id)
1840 struct rte_eth_dev *dev;
1842 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1843 dev = &rte_eth_devices[port_id];
1845 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1846 (*dev->dev_ops->allmulticast_enable)(dev);
1847 dev->data->all_multicast = 1;
1851 rte_eth_allmulticast_disable(uint16_t port_id)
1853 struct rte_eth_dev *dev;
1855 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1856 dev = &rte_eth_devices[port_id];
1858 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1859 dev->data->all_multicast = 0;
1860 (*dev->dev_ops->allmulticast_disable)(dev);
1864 rte_eth_allmulticast_get(uint16_t port_id)
1866 struct rte_eth_dev *dev;
1868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1870 dev = &rte_eth_devices[port_id];
1871 return dev->data->all_multicast;
1875 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1877 struct rte_eth_dev *dev;
1879 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1880 dev = &rte_eth_devices[port_id];
1882 if (dev->data->dev_conf.intr_conf.lsc &&
1883 dev->data->dev_started)
1884 rte_eth_linkstatus_get(dev, eth_link);
1886 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1887 (*dev->dev_ops->link_update)(dev, 1);
1888 *eth_link = dev->data->dev_link;
1893 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1895 struct rte_eth_dev *dev;
1897 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1898 dev = &rte_eth_devices[port_id];
1900 if (dev->data->dev_conf.intr_conf.lsc &&
1901 dev->data->dev_started)
1902 rte_eth_linkstatus_get(dev, eth_link);
1904 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1905 (*dev->dev_ops->link_update)(dev, 0);
1906 *eth_link = dev->data->dev_link;
1911 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1913 struct rte_eth_dev *dev;
1915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1917 dev = &rte_eth_devices[port_id];
1918 memset(stats, 0, sizeof(*stats));
1920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1921 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1922 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1926 rte_eth_stats_reset(uint16_t port_id)
1928 struct rte_eth_dev *dev;
1930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1931 dev = &rte_eth_devices[port_id];
1933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1934 (*dev->dev_ops->stats_reset)(dev);
1935 dev->data->rx_mbuf_alloc_failed = 0;
1941 get_xstats_basic_count(struct rte_eth_dev *dev)
1943 uint16_t nb_rxqs, nb_txqs;
1946 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1947 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1949 count = RTE_NB_STATS;
1950 count += nb_rxqs * RTE_NB_RXQ_STATS;
1951 count += nb_txqs * RTE_NB_TXQ_STATS;
1957 get_xstats_count(uint16_t port_id)
1959 struct rte_eth_dev *dev;
1962 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1963 dev = &rte_eth_devices[port_id];
1964 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1965 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1968 return eth_err(port_id, count);
1970 if (dev->dev_ops->xstats_get_names != NULL) {
1971 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1973 return eth_err(port_id, count);
1978 count += get_xstats_basic_count(dev);
1984 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1987 int cnt_xstats, idx_xstat;
1989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1992 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1997 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2002 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2003 if (cnt_xstats < 0) {
2004 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2008 /* Get id-name lookup table */
2009 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2011 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2012 port_id, xstats_names, cnt_xstats, NULL)) {
2013 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2017 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2018 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2027 /* retrieve basic stats names */
2029 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2030 struct rte_eth_xstat_name *xstats_names)
2032 int cnt_used_entries = 0;
2033 uint32_t idx, id_queue;
2036 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2037 snprintf(xstats_names[cnt_used_entries].name,
2038 sizeof(xstats_names[0].name),
2039 "%s", rte_stats_strings[idx].name);
2042 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2043 for (id_queue = 0; id_queue < num_q; id_queue++) {
2044 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2045 snprintf(xstats_names[cnt_used_entries].name,
2046 sizeof(xstats_names[0].name),
2048 id_queue, rte_rxq_stats_strings[idx].name);
2053 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2054 for (id_queue = 0; id_queue < num_q; id_queue++) {
2055 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2056 snprintf(xstats_names[cnt_used_entries].name,
2057 sizeof(xstats_names[0].name),
2059 id_queue, rte_txq_stats_strings[idx].name);
2063 return cnt_used_entries;
2066 /* retrieve ethdev extended statistics names */
2068 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2069 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2072 struct rte_eth_xstat_name *xstats_names_copy;
2073 unsigned int no_basic_stat_requested = 1;
2074 unsigned int no_ext_stat_requested = 1;
2075 unsigned int expected_entries;
2076 unsigned int basic_count;
2077 struct rte_eth_dev *dev;
2081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2082 dev = &rte_eth_devices[port_id];
2084 basic_count = get_xstats_basic_count(dev);
2085 ret = get_xstats_count(port_id);
2088 expected_entries = (unsigned int)ret;
2090 /* Return max number of stats if no ids given */
2093 return expected_entries;
2094 else if (xstats_names && size < expected_entries)
2095 return expected_entries;
2098 if (ids && !xstats_names)
2101 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2102 uint64_t ids_copy[size];
2104 for (i = 0; i < size; i++) {
2105 if (ids[i] < basic_count) {
2106 no_basic_stat_requested = 0;
2111 * Convert ids to xstats ids that PMD knows.
2112 * ids known by user are basic + extended stats.
2114 ids_copy[i] = ids[i] - basic_count;
2117 if (no_basic_stat_requested)
2118 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2119 xstats_names, ids_copy, size);
2122 /* Retrieve all stats */
2124 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2126 if (num_stats < 0 || num_stats > (int)expected_entries)
2129 return expected_entries;
2132 xstats_names_copy = calloc(expected_entries,
2133 sizeof(struct rte_eth_xstat_name));
2135 if (!xstats_names_copy) {
2136 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2141 for (i = 0; i < size; i++) {
2142 if (ids[i] >= basic_count) {
2143 no_ext_stat_requested = 0;
2149 /* Fill xstats_names_copy structure */
2150 if (ids && no_ext_stat_requested) {
2151 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2153 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2156 free(xstats_names_copy);
2162 for (i = 0; i < size; i++) {
2163 if (ids[i] >= expected_entries) {
2164 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2165 free(xstats_names_copy);
2168 xstats_names[i] = xstats_names_copy[ids[i]];
2171 free(xstats_names_copy);
2176 rte_eth_xstats_get_names(uint16_t port_id,
2177 struct rte_eth_xstat_name *xstats_names,
2180 struct rte_eth_dev *dev;
2181 int cnt_used_entries;
2182 int cnt_expected_entries;
2183 int cnt_driver_entries;
2185 cnt_expected_entries = get_xstats_count(port_id);
2186 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2187 (int)size < cnt_expected_entries)
2188 return cnt_expected_entries;
2190 /* port_id checked in get_xstats_count() */
2191 dev = &rte_eth_devices[port_id];
2193 cnt_used_entries = rte_eth_basic_stats_get_names(
2196 if (dev->dev_ops->xstats_get_names != NULL) {
2197 /* If there are any driver-specific xstats, append them
2200 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2202 xstats_names + cnt_used_entries,
2203 size - cnt_used_entries);
2204 if (cnt_driver_entries < 0)
2205 return eth_err(port_id, cnt_driver_entries);
2206 cnt_used_entries += cnt_driver_entries;
2209 return cnt_used_entries;
2214 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2216 struct rte_eth_dev *dev;
2217 struct rte_eth_stats eth_stats;
2218 unsigned int count = 0, i, q;
2219 uint64_t val, *stats_ptr;
2220 uint16_t nb_rxqs, nb_txqs;
2223 ret = rte_eth_stats_get(port_id, ð_stats);
2227 dev = &rte_eth_devices[port_id];
2229 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2230 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2233 for (i = 0; i < RTE_NB_STATS; i++) {
2234 stats_ptr = RTE_PTR_ADD(ð_stats,
2235 rte_stats_strings[i].offset);
2237 xstats[count++].value = val;
2241 for (q = 0; q < nb_rxqs; q++) {
2242 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2243 stats_ptr = RTE_PTR_ADD(ð_stats,
2244 rte_rxq_stats_strings[i].offset +
2245 q * sizeof(uint64_t));
2247 xstats[count++].value = val;
2252 for (q = 0; q < nb_txqs; q++) {
2253 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2254 stats_ptr = RTE_PTR_ADD(ð_stats,
2255 rte_txq_stats_strings[i].offset +
2256 q * sizeof(uint64_t));
2258 xstats[count++].value = val;
2264 /* retrieve ethdev extended statistics */
2266 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2267 uint64_t *values, unsigned int size)
2269 unsigned int no_basic_stat_requested = 1;
2270 unsigned int no_ext_stat_requested = 1;
2271 unsigned int num_xstats_filled;
2272 unsigned int basic_count;
2273 uint16_t expected_entries;
2274 struct rte_eth_dev *dev;
2278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2279 ret = get_xstats_count(port_id);
2282 expected_entries = (uint16_t)ret;
2283 struct rte_eth_xstat xstats[expected_entries];
2284 dev = &rte_eth_devices[port_id];
2285 basic_count = get_xstats_basic_count(dev);
2287 /* Return max number of stats if no ids given */
2290 return expected_entries;
2291 else if (values && size < expected_entries)
2292 return expected_entries;
2298 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2299 unsigned int basic_count = get_xstats_basic_count(dev);
2300 uint64_t ids_copy[size];
2302 for (i = 0; i < size; i++) {
2303 if (ids[i] < basic_count) {
2304 no_basic_stat_requested = 0;
2309 * Convert ids to xstats ids that PMD knows.
2310 * ids known by user are basic + extended stats.
2312 ids_copy[i] = ids[i] - basic_count;
2315 if (no_basic_stat_requested)
2316 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2321 for (i = 0; i < size; i++) {
2322 if (ids[i] >= basic_count) {
2323 no_ext_stat_requested = 0;
2329 /* Fill the xstats structure */
2330 if (ids && no_ext_stat_requested)
2331 ret = rte_eth_basic_stats_get(port_id, xstats);
2333 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2337 num_xstats_filled = (unsigned int)ret;
2339 /* Return all stats */
2341 for (i = 0; i < num_xstats_filled; i++)
2342 values[i] = xstats[i].value;
2343 return expected_entries;
2347 for (i = 0; i < size; i++) {
2348 if (ids[i] >= expected_entries) {
2349 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2352 values[i] = xstats[ids[i]].value;
2358 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2361 struct rte_eth_dev *dev;
2362 unsigned int count = 0, i;
2363 signed int xcount = 0;
2364 uint16_t nb_rxqs, nb_txqs;
2367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2369 dev = &rte_eth_devices[port_id];
2371 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2372 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2374 /* Return generic statistics */
2375 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2376 (nb_txqs * RTE_NB_TXQ_STATS);
2378 /* implemented by the driver */
2379 if (dev->dev_ops->xstats_get != NULL) {
2380 /* Retrieve the xstats from the driver at the end of the
2383 xcount = (*dev->dev_ops->xstats_get)(dev,
2384 xstats ? xstats + count : NULL,
2385 (n > count) ? n - count : 0);
2388 return eth_err(port_id, xcount);
2391 if (n < count + xcount || xstats == NULL)
2392 return count + xcount;
2394 /* now fill the xstats structure */
2395 ret = rte_eth_basic_stats_get(port_id, xstats);
2400 for (i = 0; i < count; i++)
2402 /* add an offset to driver-specific stats */
2403 for ( ; i < count + xcount; i++)
2404 xstats[i].id += count;
2406 return count + xcount;
2409 /* reset ethdev extended statistics */
2411 rte_eth_xstats_reset(uint16_t port_id)
2413 struct rte_eth_dev *dev;
2415 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2416 dev = &rte_eth_devices[port_id];
2418 /* implemented by the driver */
2419 if (dev->dev_ops->xstats_reset != NULL) {
2420 (*dev->dev_ops->xstats_reset)(dev);
2424 /* fallback to default */
2425 rte_eth_stats_reset(port_id);
2429 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2432 struct rte_eth_dev *dev;
2434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2436 dev = &rte_eth_devices[port_id];
2438 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2440 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2443 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2446 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2449 return (*dev->dev_ops->queue_stats_mapping_set)
2450 (dev, queue_id, stat_idx, is_rx);
2455 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2458 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2459 stat_idx, STAT_QMAP_TX));
2464 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2467 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2468 stat_idx, STAT_QMAP_RX));
2472 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2474 struct rte_eth_dev *dev;
2476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2477 dev = &rte_eth_devices[port_id];
2479 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2480 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2481 fw_version, fw_size));
2485 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2487 struct rte_eth_dev *dev;
2488 const struct rte_eth_desc_lim lim = {
2489 .nb_max = UINT16_MAX,
2494 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2495 dev = &rte_eth_devices[port_id];
2497 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2498 dev_info->rx_desc_lim = lim;
2499 dev_info->tx_desc_lim = lim;
2500 dev_info->device = dev->device;
2502 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2503 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2504 dev_info->driver_name = dev->device->driver->name;
2505 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2506 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2508 dev_info->dev_flags = &dev->data->dev_flags;
2512 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2513 uint32_t *ptypes, int num)
2516 struct rte_eth_dev *dev;
2517 const uint32_t *all_ptypes;
2519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2520 dev = &rte_eth_devices[port_id];
2521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2522 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2527 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2528 if (all_ptypes[i] & ptype_mask) {
2530 ptypes[j] = all_ptypes[i];
2538 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2540 struct rte_eth_dev *dev;
2542 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2543 dev = &rte_eth_devices[port_id];
2544 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2549 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2551 struct rte_eth_dev *dev;
2553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2555 dev = &rte_eth_devices[port_id];
2556 *mtu = dev->data->mtu;
2561 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2564 struct rte_eth_dev *dev;
2566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2567 dev = &rte_eth_devices[port_id];
2568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2570 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2572 dev->data->mtu = mtu;
2574 return eth_err(port_id, ret);
2578 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2580 struct rte_eth_dev *dev;
2583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2584 dev = &rte_eth_devices[port_id];
2585 if (!(dev->data->dev_conf.rxmode.offloads &
2586 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2587 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2592 if (vlan_id > 4095) {
2593 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2599 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2601 struct rte_vlan_filter_conf *vfc;
2605 vfc = &dev->data->vlan_filter_conf;
2606 vidx = vlan_id / 64;
2607 vbit = vlan_id % 64;
2610 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2612 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2615 return eth_err(port_id, ret);
2619 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2622 struct rte_eth_dev *dev;
2624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2625 dev = &rte_eth_devices[port_id];
2626 if (rx_queue_id >= dev->data->nb_rx_queues) {
2627 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2632 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2638 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2639 enum rte_vlan_type vlan_type,
2642 struct rte_eth_dev *dev;
2644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2645 dev = &rte_eth_devices[port_id];
2646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2648 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2653 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2655 struct rte_eth_dev *dev;
2659 uint64_t orig_offloads;
2661 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2662 dev = &rte_eth_devices[port_id];
2664 /* save original values in case of failure */
2665 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2667 /*check which option changed by application*/
2668 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2669 org = !!(dev->data->dev_conf.rxmode.offloads &
2670 DEV_RX_OFFLOAD_VLAN_STRIP);
2673 dev->data->dev_conf.rxmode.offloads |=
2674 DEV_RX_OFFLOAD_VLAN_STRIP;
2676 dev->data->dev_conf.rxmode.offloads &=
2677 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2678 mask |= ETH_VLAN_STRIP_MASK;
2681 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2682 org = !!(dev->data->dev_conf.rxmode.offloads &
2683 DEV_RX_OFFLOAD_VLAN_FILTER);
2686 dev->data->dev_conf.rxmode.offloads |=
2687 DEV_RX_OFFLOAD_VLAN_FILTER;
2689 dev->data->dev_conf.rxmode.offloads &=
2690 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2691 mask |= ETH_VLAN_FILTER_MASK;
2694 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2695 org = !!(dev->data->dev_conf.rxmode.offloads &
2696 DEV_RX_OFFLOAD_VLAN_EXTEND);
2699 dev->data->dev_conf.rxmode.offloads |=
2700 DEV_RX_OFFLOAD_VLAN_EXTEND;
2702 dev->data->dev_conf.rxmode.offloads &=
2703 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2704 mask |= ETH_VLAN_EXTEND_MASK;
2711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2712 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2714 /* hit an error restore original values */
2715 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2718 return eth_err(port_id, ret);
2722 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2724 struct rte_eth_dev *dev;
2727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2728 dev = &rte_eth_devices[port_id];
2730 if (dev->data->dev_conf.rxmode.offloads &
2731 DEV_RX_OFFLOAD_VLAN_STRIP)
2732 ret |= ETH_VLAN_STRIP_OFFLOAD;
2734 if (dev->data->dev_conf.rxmode.offloads &
2735 DEV_RX_OFFLOAD_VLAN_FILTER)
2736 ret |= ETH_VLAN_FILTER_OFFLOAD;
2738 if (dev->data->dev_conf.rxmode.offloads &
2739 DEV_RX_OFFLOAD_VLAN_EXTEND)
2740 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2746 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2751 dev = &rte_eth_devices[port_id];
2752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2754 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2758 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2760 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 dev = &rte_eth_devices[port_id];
2764 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2765 memset(fc_conf, 0, sizeof(*fc_conf));
2766 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2770 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2772 struct rte_eth_dev *dev;
2774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2776 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2780 dev = &rte_eth_devices[port_id];
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2782 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2786 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2787 struct rte_eth_pfc_conf *pfc_conf)
2789 struct rte_eth_dev *dev;
2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2792 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2793 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2797 dev = &rte_eth_devices[port_id];
2798 /* High water, low water validation are device specific */
2799 if (*dev->dev_ops->priority_flow_ctrl_set)
2800 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2806 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2814 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2815 for (i = 0; i < num; i++) {
2816 if (reta_conf[i].mask)
2824 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2828 uint16_t i, idx, shift;
2834 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2838 for (i = 0; i < reta_size; i++) {
2839 idx = i / RTE_RETA_GROUP_SIZE;
2840 shift = i % RTE_RETA_GROUP_SIZE;
2841 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2842 (reta_conf[idx].reta[shift] >= max_rxq)) {
2844 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2846 reta_conf[idx].reta[shift], max_rxq);
2855 rte_eth_dev_rss_reta_update(uint16_t port_id,
2856 struct rte_eth_rss_reta_entry64 *reta_conf,
2859 struct rte_eth_dev *dev;
2862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2863 /* Check mask bits */
2864 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2868 dev = &rte_eth_devices[port_id];
2870 /* Check entry value */
2871 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2872 dev->data->nb_rx_queues);
2876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2877 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2882 rte_eth_dev_rss_reta_query(uint16_t port_id,
2883 struct rte_eth_rss_reta_entry64 *reta_conf,
2886 struct rte_eth_dev *dev;
2889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2891 /* Check mask bits */
2892 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2896 dev = &rte_eth_devices[port_id];
2897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2898 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2903 rte_eth_dev_rss_hash_update(uint16_t port_id,
2904 struct rte_eth_rss_conf *rss_conf)
2906 struct rte_eth_dev *dev;
2907 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2910 dev = &rte_eth_devices[port_id];
2911 rte_eth_dev_info_get(port_id, &dev_info);
2912 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2913 dev_info.flow_type_rss_offloads) {
2915 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2916 port_id, rss_conf->rss_hf,
2917 dev_info.flow_type_rss_offloads);
2920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2921 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2926 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2927 struct rte_eth_rss_conf *rss_conf)
2929 struct rte_eth_dev *dev;
2931 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2932 dev = &rte_eth_devices[port_id];
2933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2934 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2939 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2940 struct rte_eth_udp_tunnel *udp_tunnel)
2942 struct rte_eth_dev *dev;
2944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2945 if (udp_tunnel == NULL) {
2946 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2950 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2951 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2955 dev = &rte_eth_devices[port_id];
2956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2957 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2962 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2963 struct rte_eth_udp_tunnel *udp_tunnel)
2965 struct rte_eth_dev *dev;
2967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2968 dev = &rte_eth_devices[port_id];
2970 if (udp_tunnel == NULL) {
2971 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2975 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2976 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2981 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2986 rte_eth_led_on(uint16_t port_id)
2988 struct rte_eth_dev *dev;
2990 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2991 dev = &rte_eth_devices[port_id];
2992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2993 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2997 rte_eth_led_off(uint16_t port_id)
2999 struct rte_eth_dev *dev;
3001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3002 dev = &rte_eth_devices[port_id];
3003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3004 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3008 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3012 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3014 struct rte_eth_dev_info dev_info;
3015 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3019 rte_eth_dev_info_get(port_id, &dev_info);
3021 for (i = 0; i < dev_info.max_mac_addrs; i++)
3022 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3028 static const struct ether_addr null_mac_addr;
3031 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3034 struct rte_eth_dev *dev;
3039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3040 dev = &rte_eth_devices[port_id];
3041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3043 if (is_zero_ether_addr(addr)) {
3044 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3048 if (pool >= ETH_64_POOLS) {
3049 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3053 index = get_mac_addr_index(port_id, addr);
3055 index = get_mac_addr_index(port_id, &null_mac_addr);
3057 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3062 pool_mask = dev->data->mac_pool_sel[index];
3064 /* Check if both MAC address and pool is already there, and do nothing */
3065 if (pool_mask & (1ULL << pool))
3070 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3073 /* Update address in NIC data structure */
3074 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3076 /* Update pool bitmap in NIC data structure */
3077 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3080 return eth_err(port_id, ret);
3084 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3086 struct rte_eth_dev *dev;
3089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 dev = &rte_eth_devices[port_id];
3091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3093 index = get_mac_addr_index(port_id, addr);
3096 "Port %u: Cannot remove default MAC address\n",
3099 } else if (index < 0)
3100 return 0; /* Do nothing if address wasn't found */
3103 (*dev->dev_ops->mac_addr_remove)(dev, index);
3105 /* Update address in NIC data structure */
3106 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3108 /* reset pool bitmap */
3109 dev->data->mac_pool_sel[index] = 0;
3115 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3117 struct rte_eth_dev *dev;
3120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3122 if (!is_valid_assigned_ether_addr(addr))
3125 dev = &rte_eth_devices[port_id];
3126 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3128 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3132 /* Update default address in NIC data structure */
3133 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3140 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3144 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3146 struct rte_eth_dev_info dev_info;
3147 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3150 rte_eth_dev_info_get(port_id, &dev_info);
3151 if (!dev->data->hash_mac_addrs)
3154 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3155 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3156 ETHER_ADDR_LEN) == 0)
3163 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3168 struct rte_eth_dev *dev;
3170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3172 dev = &rte_eth_devices[port_id];
3173 if (is_zero_ether_addr(addr)) {
3174 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3179 index = get_hash_mac_addr_index(port_id, addr);
3180 /* Check if it's already there, and do nothing */
3181 if ((index >= 0) && on)
3187 "Port %u: the MAC address was not set in UTA\n",
3192 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3194 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3201 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3203 /* Update address in NIC data structure */
3205 ether_addr_copy(addr,
3206 &dev->data->hash_mac_addrs[index]);
3208 ether_addr_copy(&null_mac_addr,
3209 &dev->data->hash_mac_addrs[index]);
3212 return eth_err(port_id, ret);
3216 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3218 struct rte_eth_dev *dev;
3220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3222 dev = &rte_eth_devices[port_id];
3224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3225 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3229 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3232 struct rte_eth_dev *dev;
3233 struct rte_eth_dev_info dev_info;
3234 struct rte_eth_link link;
3236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3238 dev = &rte_eth_devices[port_id];
3239 rte_eth_dev_info_get(port_id, &dev_info);
3240 link = dev->data->dev_link;
3242 if (queue_idx > dev_info.max_tx_queues) {
3244 "Set queue rate limit:port %u: invalid queue id=%u\n",
3245 port_id, queue_idx);
3249 if (tx_rate > link.link_speed) {
3251 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3252 tx_rate, link.link_speed);
3256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3257 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3258 queue_idx, tx_rate));
3262 rte_eth_mirror_rule_set(uint16_t port_id,
3263 struct rte_eth_mirror_conf *mirror_conf,
3264 uint8_t rule_id, uint8_t on)
3266 struct rte_eth_dev *dev;
3268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269 if (mirror_conf->rule_type == 0) {
3270 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3274 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3275 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3280 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3281 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3282 (mirror_conf->pool_mask == 0)) {
3284 "Invalid mirror pool, pool mask can not be 0\n");
3288 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3289 mirror_conf->vlan.vlan_mask == 0) {
3291 "Invalid vlan mask, vlan mask can not be 0\n");
3295 dev = &rte_eth_devices[port_id];
3296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3298 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3299 mirror_conf, rule_id, on));
3303 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3305 struct rte_eth_dev *dev;
3307 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3309 dev = &rte_eth_devices[port_id];
3310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3312 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3316 RTE_INIT(eth_dev_init_cb_lists)
3320 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3321 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3325 rte_eth_dev_callback_register(uint16_t port_id,
3326 enum rte_eth_event_type event,
3327 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3329 struct rte_eth_dev *dev;
3330 struct rte_eth_dev_callback *user_cb;
3331 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3337 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3338 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3342 if (port_id == RTE_ETH_ALL) {
3344 last_port = RTE_MAX_ETHPORTS - 1;
3346 next_port = last_port = port_id;
3349 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3352 dev = &rte_eth_devices[next_port];
3354 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3355 if (user_cb->cb_fn == cb_fn &&
3356 user_cb->cb_arg == cb_arg &&
3357 user_cb->event == event) {
3362 /* create a new callback. */
3363 if (user_cb == NULL) {
3364 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3365 sizeof(struct rte_eth_dev_callback), 0);
3366 if (user_cb != NULL) {
3367 user_cb->cb_fn = cb_fn;
3368 user_cb->cb_arg = cb_arg;
3369 user_cb->event = event;
3370 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3373 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3374 rte_eth_dev_callback_unregister(port_id, event,
3380 } while (++next_port <= last_port);
3382 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3387 rte_eth_dev_callback_unregister(uint16_t port_id,
3388 enum rte_eth_event_type event,
3389 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3392 struct rte_eth_dev *dev;
3393 struct rte_eth_dev_callback *cb, *next;
3394 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3400 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3401 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3405 if (port_id == RTE_ETH_ALL) {
3407 last_port = RTE_MAX_ETHPORTS - 1;
3409 next_port = last_port = port_id;
3412 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3415 dev = &rte_eth_devices[next_port];
3417 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3420 next = TAILQ_NEXT(cb, next);
3422 if (cb->cb_fn != cb_fn || cb->event != event ||
3423 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3427 * if this callback is not executing right now,
3430 if (cb->active == 0) {
3431 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3437 } while (++next_port <= last_port);
3439 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3444 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3445 enum rte_eth_event_type event, void *ret_param)
3447 struct rte_eth_dev_callback *cb_lst;
3448 struct rte_eth_dev_callback dev_cb;
3451 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3452 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3453 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3457 if (ret_param != NULL)
3458 dev_cb.ret_param = ret_param;
3460 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3461 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3462 dev_cb.cb_arg, dev_cb.ret_param);
3463 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3466 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3471 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3476 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3478 dev->state = RTE_ETH_DEV_ATTACHED;
3482 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3485 struct rte_eth_dev *dev;
3486 struct rte_intr_handle *intr_handle;
3490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3492 dev = &rte_eth_devices[port_id];
3494 if (!dev->intr_handle) {
3495 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3499 intr_handle = dev->intr_handle;
3500 if (!intr_handle->intr_vec) {
3501 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3505 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3506 vec = intr_handle->intr_vec[qid];
3507 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3508 if (rc && rc != -EEXIST) {
3510 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3511 port_id, qid, op, epfd, vec);
3518 int __rte_experimental
3519 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3521 struct rte_intr_handle *intr_handle;
3522 struct rte_eth_dev *dev;
3523 unsigned int efd_idx;
3527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3529 dev = &rte_eth_devices[port_id];
3531 if (queue_id >= dev->data->nb_rx_queues) {
3532 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3536 if (!dev->intr_handle) {
3537 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3541 intr_handle = dev->intr_handle;
3542 if (!intr_handle->intr_vec) {
3543 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3547 vec = intr_handle->intr_vec[queue_id];
3548 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3549 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3550 fd = intr_handle->efds[efd_idx];
3555 const struct rte_memzone *
3556 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3557 uint16_t queue_id, size_t size, unsigned align,
3560 char z_name[RTE_MEMZONE_NAMESIZE];
3561 const struct rte_memzone *mz;
3563 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3564 dev->data->port_id, queue_id, ring_name);
3566 mz = rte_memzone_lookup(z_name);
3570 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3571 RTE_MEMZONE_IOVA_CONTIG, align);
3574 int __rte_experimental
3575 rte_eth_dev_create(struct rte_device *device, const char *name,
3576 size_t priv_data_size,
3577 ethdev_bus_specific_init ethdev_bus_specific_init,
3578 void *bus_init_params,
3579 ethdev_init_t ethdev_init, void *init_params)
3581 struct rte_eth_dev *ethdev;
3584 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3586 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3587 ethdev = rte_eth_dev_allocate(name);
3591 if (priv_data_size) {
3592 ethdev->data->dev_private = rte_zmalloc_socket(
3593 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3596 if (!ethdev->data->dev_private) {
3597 RTE_LOG(ERR, EAL, "failed to allocate private data");
3603 ethdev = rte_eth_dev_attach_secondary(name);
3605 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3606 "ethdev doesn't exist");
3611 ethdev->device = device;
3613 if (ethdev_bus_specific_init) {
3614 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3617 "ethdev bus specific initialisation failed");
3622 retval = ethdev_init(ethdev, init_params);
3624 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3628 rte_eth_dev_probing_finish(ethdev);
3633 rte_eth_dev_release_port(ethdev);
3637 int __rte_experimental
3638 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3639 ethdev_uninit_t ethdev_uninit)
3643 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3647 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3648 if (ethdev_uninit) {
3649 ret = ethdev_uninit(ethdev);
3654 return rte_eth_dev_release_port(ethdev);
3658 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3659 int epfd, int op, void *data)
3662 struct rte_eth_dev *dev;
3663 struct rte_intr_handle *intr_handle;
3666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3668 dev = &rte_eth_devices[port_id];
3669 if (queue_id >= dev->data->nb_rx_queues) {
3670 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3674 if (!dev->intr_handle) {
3675 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3679 intr_handle = dev->intr_handle;
3680 if (!intr_handle->intr_vec) {
3681 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3685 vec = intr_handle->intr_vec[queue_id];
3686 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3687 if (rc && rc != -EEXIST) {
3689 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3690 port_id, queue_id, op, epfd, vec);
3698 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3701 struct rte_eth_dev *dev;
3703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3705 dev = &rte_eth_devices[port_id];
3707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3708 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3713 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3716 struct rte_eth_dev *dev;
3718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3720 dev = &rte_eth_devices[port_id];
3722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3723 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3729 rte_eth_dev_filter_supported(uint16_t port_id,
3730 enum rte_filter_type filter_type)
3732 struct rte_eth_dev *dev;
3734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3736 dev = &rte_eth_devices[port_id];
3737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3738 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3739 RTE_ETH_FILTER_NOP, NULL);
3743 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3744 enum rte_filter_op filter_op, void *arg)
3746 struct rte_eth_dev *dev;
3748 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3750 dev = &rte_eth_devices[port_id];
3751 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3752 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3756 const struct rte_eth_rxtx_callback *
3757 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3758 rte_rx_callback_fn fn, void *user_param)
3760 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3761 rte_errno = ENOTSUP;
3764 /* check input parameters */
3765 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3766 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3770 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3778 cb->param = user_param;
3780 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3781 /* Add the callbacks in fifo order. */
3782 struct rte_eth_rxtx_callback *tail =
3783 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3786 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3793 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3798 const struct rte_eth_rxtx_callback *
3799 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3800 rte_rx_callback_fn fn, void *user_param)
3802 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3803 rte_errno = ENOTSUP;
3806 /* check input parameters */
3807 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3808 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3813 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3821 cb->param = user_param;
3823 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3824 /* Add the callbacks at fisrt position*/
3825 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3827 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3828 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3833 const struct rte_eth_rxtx_callback *
3834 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3835 rte_tx_callback_fn fn, void *user_param)
3837 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3838 rte_errno = ENOTSUP;
3841 /* check input parameters */
3842 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3843 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3848 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3856 cb->param = user_param;
3858 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3859 /* Add the callbacks in fifo order. */
3860 struct rte_eth_rxtx_callback *tail =
3861 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3864 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3871 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3877 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3878 const struct rte_eth_rxtx_callback *user_cb)
3880 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3883 /* Check input parameters. */
3884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3885 if (user_cb == NULL ||
3886 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3889 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3890 struct rte_eth_rxtx_callback *cb;
3891 struct rte_eth_rxtx_callback **prev_cb;
3894 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3895 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3896 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3898 if (cb == user_cb) {
3899 /* Remove the user cb from the callback list. */
3900 *prev_cb = cb->next;
3905 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3911 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3912 const struct rte_eth_rxtx_callback *user_cb)
3914 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3917 /* Check input parameters. */
3918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3919 if (user_cb == NULL ||
3920 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3923 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3925 struct rte_eth_rxtx_callback *cb;
3926 struct rte_eth_rxtx_callback **prev_cb;
3928 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3929 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3930 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3932 if (cb == user_cb) {
3933 /* Remove the user cb from the callback list. */
3934 *prev_cb = cb->next;
3939 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3945 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3946 struct rte_eth_rxq_info *qinfo)
3948 struct rte_eth_dev *dev;
3950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3955 dev = &rte_eth_devices[port_id];
3956 if (queue_id >= dev->data->nb_rx_queues) {
3957 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3963 memset(qinfo, 0, sizeof(*qinfo));
3964 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3969 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3970 struct rte_eth_txq_info *qinfo)
3972 struct rte_eth_dev *dev;
3974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3979 dev = &rte_eth_devices[port_id];
3980 if (queue_id >= dev->data->nb_tx_queues) {
3981 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3987 memset(qinfo, 0, sizeof(*qinfo));
3988 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3994 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3995 struct ether_addr *mc_addr_set,
3996 uint32_t nb_mc_addr)
3998 struct rte_eth_dev *dev;
4000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4002 dev = &rte_eth_devices[port_id];
4003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4004 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4005 mc_addr_set, nb_mc_addr));
4009 rte_eth_timesync_enable(uint16_t port_id)
4011 struct rte_eth_dev *dev;
4013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4014 dev = &rte_eth_devices[port_id];
4016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4017 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4021 rte_eth_timesync_disable(uint16_t port_id)
4023 struct rte_eth_dev *dev;
4025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4026 dev = &rte_eth_devices[port_id];
4028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4029 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4033 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4036 struct rte_eth_dev *dev;
4038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4039 dev = &rte_eth_devices[port_id];
4041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4042 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4043 (dev, timestamp, flags));
4047 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4048 struct timespec *timestamp)
4050 struct rte_eth_dev *dev;
4052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4053 dev = &rte_eth_devices[port_id];
4055 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4056 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4061 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4063 struct rte_eth_dev *dev;
4065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4066 dev = &rte_eth_devices[port_id];
4068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4069 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4074 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4076 struct rte_eth_dev *dev;
4078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4079 dev = &rte_eth_devices[port_id];
4081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4082 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4087 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4089 struct rte_eth_dev *dev;
4091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4092 dev = &rte_eth_devices[port_id];
4094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4095 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4100 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4102 struct rte_eth_dev *dev;
4104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4106 dev = &rte_eth_devices[port_id];
4107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4108 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4112 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4114 struct rte_eth_dev *dev;
4116 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4118 dev = &rte_eth_devices[port_id];
4119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4120 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4124 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4126 struct rte_eth_dev *dev;
4128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4130 dev = &rte_eth_devices[port_id];
4131 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4132 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4136 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4138 struct rte_eth_dev *dev;
4140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4142 dev = &rte_eth_devices[port_id];
4143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4144 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4147 int __rte_experimental
4148 rte_eth_dev_get_module_info(uint16_t port_id,
4149 struct rte_eth_dev_module_info *modinfo)
4151 struct rte_eth_dev *dev;
4153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4155 dev = &rte_eth_devices[port_id];
4156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4157 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4160 int __rte_experimental
4161 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4162 struct rte_dev_eeprom_info *info)
4164 struct rte_eth_dev *dev;
4166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4168 dev = &rte_eth_devices[port_id];
4169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4170 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4174 rte_eth_dev_get_dcb_info(uint16_t port_id,
4175 struct rte_eth_dcb_info *dcb_info)
4177 struct rte_eth_dev *dev;
4179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4181 dev = &rte_eth_devices[port_id];
4182 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4185 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4189 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4190 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4192 struct rte_eth_dev *dev;
4194 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4195 if (l2_tunnel == NULL) {
4196 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4200 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4201 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4205 dev = &rte_eth_devices[port_id];
4206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4208 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4213 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4214 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4218 struct rte_eth_dev *dev;
4220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4222 if (l2_tunnel == NULL) {
4223 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4227 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4228 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4233 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4237 dev = &rte_eth_devices[port_id];
4238 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4240 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4241 l2_tunnel, mask, en));
4245 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4246 const struct rte_eth_desc_lim *desc_lim)
4248 if (desc_lim->nb_align != 0)
4249 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4251 if (desc_lim->nb_max != 0)
4252 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4254 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4258 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4259 uint16_t *nb_rx_desc,
4260 uint16_t *nb_tx_desc)
4262 struct rte_eth_dev *dev;
4263 struct rte_eth_dev_info dev_info;
4265 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4267 dev = &rte_eth_devices[port_id];
4268 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4270 rte_eth_dev_info_get(port_id, &dev_info);
4272 if (nb_rx_desc != NULL)
4273 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4275 if (nb_tx_desc != NULL)
4276 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4282 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4284 struct rte_eth_dev *dev;
4286 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4291 dev = &rte_eth_devices[port_id];
4293 if (*dev->dev_ops->pool_ops_supported == NULL)
4294 return 1; /* all pools are supported */
4296 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4300 * A set of values to describe the possible states of a switch domain.
4302 enum rte_eth_switch_domain_state {
4303 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4304 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4308 * Array of switch domains available for allocation. Array is sized to
4309 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4310 * ethdev ports in a single process.
4312 struct rte_eth_dev_switch {
4313 enum rte_eth_switch_domain_state state;
4314 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4316 int __rte_experimental
4317 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4321 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4323 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4324 i < RTE_MAX_ETHPORTS; i++) {
4325 if (rte_eth_switch_domains[i].state ==
4326 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4327 rte_eth_switch_domains[i].state =
4328 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4337 int __rte_experimental
4338 rte_eth_switch_domain_free(uint16_t domain_id)
4340 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4341 domain_id >= RTE_MAX_ETHPORTS)
4344 if (rte_eth_switch_domains[domain_id].state !=
4345 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4348 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4353 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4356 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4359 struct rte_kvargs_pair *pair;
4362 arglist->str = strdup(str_in);
4363 if (arglist->str == NULL)
4366 letter = arglist->str;
4369 pair = &arglist->pairs[0];
4372 case 0: /* Initial */
4375 else if (*letter == '\0')
4382 case 1: /* Parsing key */
4383 if (*letter == '=') {
4385 pair->value = letter + 1;
4387 } else if (*letter == ',' || *letter == '\0')
4392 case 2: /* Parsing value */
4395 else if (*letter == ',') {
4398 pair = &arglist->pairs[arglist->count];
4400 } else if (*letter == '\0') {
4403 pair = &arglist->pairs[arglist->count];
4408 case 3: /* Parsing list */
4411 else if (*letter == '\0')
4420 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4428 /* Single element, not a list */
4429 return callback(str, data);
4431 /* Sanity check, then strip the brackets */
4432 str_start = &str[strlen(str) - 1];
4433 if (*str_start != ']') {
4434 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4440 /* Process list elements */
4450 } else if (state == 1) {
4451 if (*str == ',' || *str == '\0') {
4452 if (str > str_start) {
4453 /* Non-empty string fragment */
4455 result = callback(str_start, data);
4468 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4469 const uint16_t max_list)
4471 uint16_t lo, hi, val;
4474 result = sscanf(str, "%hu-%hu", &lo, &hi);
4476 if (*len_list >= max_list)
4478 list[(*len_list)++] = lo;
4479 } else if (result == 2) {
4480 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4482 for (val = lo; val <= hi; val++) {
4483 if (*len_list >= max_list)
4485 list[(*len_list)++] = val;
4494 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4496 struct rte_eth_devargs *eth_da = data;
4498 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4499 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4502 int __rte_experimental
4503 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4505 struct rte_kvargs args;
4506 struct rte_kvargs_pair *pair;
4510 memset(eth_da, 0, sizeof(*eth_da));
4512 result = rte_eth_devargs_tokenise(&args, dargs);
4516 for (i = 0; i < args.count; i++) {
4517 pair = &args.pairs[i];
4518 if (strcmp("representor", pair->key) == 0) {
4519 result = rte_eth_devargs_parse_list(pair->value,
4520 rte_eth_devargs_parse_representor_ports,
4534 RTE_INIT(ethdev_init_log)
4536 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4537 if (rte_eth_dev_logtype >= 0)
4538 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);