1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
191 struct rte_devargs devargs = {.args = NULL};
192 const char *bus_param_key;
193 char *bus_str = NULL;
194 char *cls_str = NULL;
197 memset(iter, 0, sizeof(*iter));
200 * The devargs string may use various syntaxes:
201 * - 0000:08:00.0,representor=[1-3]
202 * - pci:0000:06:00.0,representor=[0,5]
203 * - class=eth,mac=00:11:22:33:44:55
204 * A new syntax is in development (not yet supported):
205 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
209 * Handle pure class filter (i.e. without any bus-level argument),
210 * from future new syntax.
211 * rte_devargs_parse() is not yet supporting the new syntax,
212 * that's why this simple case is temporarily parsed here.
214 #define iter_anybus_str "class=eth,"
215 if (strncmp(devargs_str, iter_anybus_str,
216 strlen(iter_anybus_str)) == 0) {
217 iter->cls_str = devargs_str + strlen(iter_anybus_str);
221 /* Split bus, device and parameters. */
222 ret = rte_devargs_parse(&devargs, devargs_str);
227 * Assume parameters of old syntax can match only at ethdev level.
228 * Extra parameters will be ignored, thanks to "+" prefix.
230 str_size = strlen(devargs.args) + 2;
231 cls_str = malloc(str_size);
232 if (cls_str == NULL) {
236 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
237 if (ret != str_size - 1) {
241 iter->cls_str = cls_str;
242 free(devargs.args); /* allocated by rte_devargs_parse() */
245 iter->bus = devargs.bus;
246 if (iter->bus->dev_iterate == NULL) {
251 /* Convert bus args to new syntax for use with new API dev_iterate. */
252 if (strcmp(iter->bus->name, "vdev") == 0) {
253 bus_param_key = "name";
254 } else if (strcmp(iter->bus->name, "pci") == 0) {
255 bus_param_key = "addr";
260 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
261 bus_str = malloc(str_size);
262 if (bus_str == NULL) {
266 ret = snprintf(bus_str, str_size, "%s=%s",
267 bus_param_key, devargs.name);
268 if (ret != str_size - 1) {
272 iter->bus_str = bus_str;
275 iter->cls = rte_class_find_by_name("eth");
280 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
289 rte_eth_iterator_next(struct rte_dev_iterator *iter)
291 if (iter->cls == NULL) /* invalid ethdev iterator */
292 return RTE_MAX_ETHPORTS;
294 do { /* loop to try all matching rte_device */
295 /* If not pure ethdev filter and */
296 if (iter->bus != NULL &&
297 /* not in middle of rte_eth_dev iteration, */
298 iter->class_device == NULL) {
299 /* get next rte_device to try. */
300 iter->device = iter->bus->dev_iterate(
301 iter->device, iter->bus_str, iter);
302 if (iter->device == NULL)
303 break; /* no more rte_device candidate */
305 /* A device is matching bus part, need to check ethdev part. */
306 iter->class_device = iter->cls->dev_iterate(
307 iter->class_device, iter->cls_str, iter);
308 if (iter->class_device != NULL)
309 return eth_dev_to_id(iter->class_device); /* match */
310 } while (iter->bus != NULL); /* need to try next rte_device */
312 /* No more ethdev port to iterate. */
313 rte_eth_iterator_cleanup(iter);
314 return RTE_MAX_ETHPORTS;
318 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
320 if (iter->bus_str == NULL)
321 return; /* nothing to free in pure class filter */
322 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
323 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
324 memset(iter, 0, sizeof(*iter));
328 rte_eth_find_next(uint16_t port_id)
330 while (port_id < RTE_MAX_ETHPORTS &&
331 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
334 if (port_id >= RTE_MAX_ETHPORTS)
335 return RTE_MAX_ETHPORTS;
341 * Macro to iterate over all valid ports for internal usage.
342 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
344 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
345 for (port_id = rte_eth_find_next(0); \
346 port_id < RTE_MAX_ETHPORTS; \
347 port_id = rte_eth_find_next(port_id + 1))
350 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
352 port_id = rte_eth_find_next(port_id);
353 while (port_id < RTE_MAX_ETHPORTS &&
354 rte_eth_devices[port_id].device != parent)
355 port_id = rte_eth_find_next(port_id + 1);
361 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
363 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
364 return rte_eth_find_next_of(port_id,
365 rte_eth_devices[ref_port_id].device);
369 rte_eth_dev_shared_data_prepare(void)
371 const unsigned flags = 0;
372 const struct rte_memzone *mz;
374 rte_spinlock_lock(&rte_eth_shared_data_lock);
376 if (rte_eth_dev_shared_data == NULL) {
377 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
378 /* Allocate port data and ownership shared memory. */
379 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
380 sizeof(*rte_eth_dev_shared_data),
381 rte_socket_id(), flags);
383 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
385 rte_panic("Cannot allocate ethdev shared data\n");
387 rte_eth_dev_shared_data = mz->addr;
388 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
389 rte_eth_dev_shared_data->next_owner_id =
390 RTE_ETH_DEV_NO_OWNER + 1;
391 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
392 memset(rte_eth_dev_shared_data->data, 0,
393 sizeof(rte_eth_dev_shared_data->data));
397 rte_spinlock_unlock(&rte_eth_shared_data_lock);
401 is_allocated(const struct rte_eth_dev *ethdev)
403 return ethdev->data->name[0] != '\0';
406 static struct rte_eth_dev *
407 _rte_eth_dev_allocated(const char *name)
411 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
412 if (rte_eth_devices[i].data != NULL &&
413 strcmp(rte_eth_devices[i].data->name, name) == 0)
414 return &rte_eth_devices[i];
420 rte_eth_dev_allocated(const char *name)
422 struct rte_eth_dev *ethdev;
424 rte_eth_dev_shared_data_prepare();
426 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
428 ethdev = _rte_eth_dev_allocated(name);
430 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
436 rte_eth_dev_find_free_port(void)
440 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 /* Using shared name field to find a free port. */
442 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
443 RTE_ASSERT(rte_eth_devices[i].state ==
448 return RTE_MAX_ETHPORTS;
451 static struct rte_eth_dev *
452 eth_dev_get(uint16_t port_id)
454 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
456 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
462 rte_eth_dev_allocate(const char *name)
465 struct rte_eth_dev *eth_dev = NULL;
468 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
470 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
474 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
475 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
479 rte_eth_dev_shared_data_prepare();
481 /* Synchronize port creation between primary and secondary threads. */
482 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484 if (_rte_eth_dev_allocated(name) != NULL) {
486 "Ethernet device with name %s already allocated\n",
491 port_id = rte_eth_dev_find_free_port();
492 if (port_id == RTE_MAX_ETHPORTS) {
494 "Reached maximum number of Ethernet ports\n");
498 eth_dev = eth_dev_get(port_id);
499 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
500 eth_dev->data->port_id = port_id;
501 eth_dev->data->mtu = RTE_ETHER_MTU;
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
510 * Attach to a port already registered by the primary process, which
511 * makes sure that the same device would have the same port id both
512 * in the primary and secondary process.
515 rte_eth_dev_attach_secondary(const char *name)
518 struct rte_eth_dev *eth_dev = NULL;
520 rte_eth_dev_shared_data_prepare();
522 /* Synchronize port attachment to primary port creation and release. */
523 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
525 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
526 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
529 if (i == RTE_MAX_ETHPORTS) {
531 "Device %s is not driven by the primary process\n",
534 eth_dev = eth_dev_get(i);
535 RTE_ASSERT(eth_dev->data->port_id == i);
538 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
543 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
548 rte_eth_dev_shared_data_prepare();
550 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
551 _rte_eth_dev_callback_process(eth_dev,
552 RTE_ETH_EVENT_DESTROY, NULL);
554 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
556 eth_dev->state = RTE_ETH_DEV_UNUSED;
558 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
559 rte_free(eth_dev->data->rx_queues);
560 rte_free(eth_dev->data->tx_queues);
561 rte_free(eth_dev->data->mac_addrs);
562 rte_free(eth_dev->data->hash_mac_addrs);
563 rte_free(eth_dev->data->dev_private);
564 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
567 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
573 rte_eth_dev_is_valid_port(uint16_t port_id)
575 if (port_id >= RTE_MAX_ETHPORTS ||
576 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
583 rte_eth_is_valid_owner_id(uint64_t owner_id)
585 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
586 rte_eth_dev_shared_data->next_owner_id <= owner_id)
592 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
594 port_id = rte_eth_find_next(port_id);
595 while (port_id < RTE_MAX_ETHPORTS &&
596 rte_eth_devices[port_id].data->owner.id != owner_id)
597 port_id = rte_eth_find_next(port_id + 1);
603 rte_eth_dev_owner_new(uint64_t *owner_id)
605 rte_eth_dev_shared_data_prepare();
607 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
609 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
611 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
616 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
617 const struct rte_eth_dev_owner *new_owner)
619 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
620 struct rte_eth_dev_owner *port_owner;
622 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
623 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
628 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
629 !rte_eth_is_valid_owner_id(old_owner_id)) {
631 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
632 old_owner_id, new_owner->id);
636 port_owner = &rte_eth_devices[port_id].data->owner;
637 if (port_owner->id != old_owner_id) {
639 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
640 port_id, port_owner->name, port_owner->id);
644 /* can not truncate (same structure) */
645 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
647 port_owner->id = new_owner->id;
649 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
650 port_id, new_owner->name, new_owner->id);
656 rte_eth_dev_owner_set(const uint16_t port_id,
657 const struct rte_eth_dev_owner *owner)
661 rte_eth_dev_shared_data_prepare();
663 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
665 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
667 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
672 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
674 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
675 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
678 rte_eth_dev_shared_data_prepare();
680 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
682 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
684 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
689 rte_eth_dev_owner_delete(const uint64_t owner_id)
694 rte_eth_dev_shared_data_prepare();
696 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
698 if (rte_eth_is_valid_owner_id(owner_id)) {
699 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
700 if (rte_eth_devices[port_id].data->owner.id == owner_id)
701 memset(&rte_eth_devices[port_id].data->owner, 0,
702 sizeof(struct rte_eth_dev_owner));
703 RTE_ETHDEV_LOG(NOTICE,
704 "All port owners owned by %016"PRIx64" identifier have removed\n",
708 "Invalid owner id=%016"PRIx64"\n",
713 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
719 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
722 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
724 rte_eth_dev_shared_data_prepare();
726 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
728 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
729 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
733 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
736 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
741 rte_eth_dev_socket_id(uint16_t port_id)
743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
744 return rte_eth_devices[port_id].data->numa_node;
748 rte_eth_dev_get_sec_ctx(uint16_t port_id)
750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
751 return rte_eth_devices[port_id].security_ctx;
755 rte_eth_dev_count_avail(void)
762 RTE_ETH_FOREACH_DEV(p)
769 rte_eth_dev_count_total(void)
771 uint16_t port, count = 0;
773 RTE_ETH_FOREACH_VALID_DEV(port)
780 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
787 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
791 /* shouldn't check 'rte_eth_devices[i].data',
792 * because it might be overwritten by VDEV PMD */
793 tmp = rte_eth_dev_shared_data->data[port_id].name;
799 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
804 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
808 RTE_ETH_FOREACH_VALID_DEV(pid)
809 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
818 eth_err(uint16_t port_id, int ret)
822 if (rte_eth_dev_is_removed(port_id))
828 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
830 uint16_t old_nb_queues = dev->data->nb_rx_queues;
834 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
835 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
836 sizeof(dev->data->rx_queues[0]) * nb_queues,
837 RTE_CACHE_LINE_SIZE);
838 if (dev->data->rx_queues == NULL) {
839 dev->data->nb_rx_queues = 0;
842 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
845 rxq = dev->data->rx_queues;
847 for (i = nb_queues; i < old_nb_queues; i++)
848 (*dev->dev_ops->rx_queue_release)(rxq[i]);
849 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
850 RTE_CACHE_LINE_SIZE);
853 if (nb_queues > old_nb_queues) {
854 uint16_t new_qs = nb_queues - old_nb_queues;
856 memset(rxq + old_nb_queues, 0,
857 sizeof(rxq[0]) * new_qs);
860 dev->data->rx_queues = rxq;
862 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
865 rxq = dev->data->rx_queues;
867 for (i = nb_queues; i < old_nb_queues; i++)
868 (*dev->dev_ops->rx_queue_release)(rxq[i]);
870 rte_free(dev->data->rx_queues);
871 dev->data->rx_queues = NULL;
873 dev->data->nb_rx_queues = nb_queues;
878 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
880 struct rte_eth_dev *dev;
882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
884 dev = &rte_eth_devices[port_id];
885 if (!dev->data->dev_started) {
887 "Port %u must be started before start any queue\n",
892 if (rx_queue_id >= dev->data->nb_rx_queues) {
893 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
899 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
901 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
902 rx_queue_id, port_id);
906 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
908 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
909 rx_queue_id, port_id);
913 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
919 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
921 struct rte_eth_dev *dev;
923 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
925 dev = &rte_eth_devices[port_id];
926 if (rx_queue_id >= dev->data->nb_rx_queues) {
927 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
933 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
935 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
936 rx_queue_id, port_id);
940 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
942 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
943 rx_queue_id, port_id);
947 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
952 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
954 struct rte_eth_dev *dev;
956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
958 dev = &rte_eth_devices[port_id];
959 if (!dev->data->dev_started) {
961 "Port %u must be started before start any queue\n",
966 if (tx_queue_id >= dev->data->nb_tx_queues) {
967 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
973 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
975 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
976 tx_queue_id, port_id);
980 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
982 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
983 tx_queue_id, port_id);
987 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
991 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
993 struct rte_eth_dev *dev;
995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
997 dev = &rte_eth_devices[port_id];
998 if (tx_queue_id >= dev->data->nb_tx_queues) {
999 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1005 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1006 RTE_ETHDEV_LOG(INFO,
1007 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1008 tx_queue_id, port_id);
1012 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1013 RTE_ETHDEV_LOG(INFO,
1014 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1015 tx_queue_id, port_id);
1019 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1024 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1026 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1030 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1031 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1032 sizeof(dev->data->tx_queues[0]) * nb_queues,
1033 RTE_CACHE_LINE_SIZE);
1034 if (dev->data->tx_queues == NULL) {
1035 dev->data->nb_tx_queues = 0;
1038 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1041 txq = dev->data->tx_queues;
1043 for (i = nb_queues; i < old_nb_queues; i++)
1044 (*dev->dev_ops->tx_queue_release)(txq[i]);
1045 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1046 RTE_CACHE_LINE_SIZE);
1049 if (nb_queues > old_nb_queues) {
1050 uint16_t new_qs = nb_queues - old_nb_queues;
1052 memset(txq + old_nb_queues, 0,
1053 sizeof(txq[0]) * new_qs);
1056 dev->data->tx_queues = txq;
1058 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1061 txq = dev->data->tx_queues;
1063 for (i = nb_queues; i < old_nb_queues; i++)
1064 (*dev->dev_ops->tx_queue_release)(txq[i]);
1066 rte_free(dev->data->tx_queues);
1067 dev->data->tx_queues = NULL;
1069 dev->data->nb_tx_queues = nb_queues;
1074 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1077 case ETH_SPEED_NUM_10M:
1078 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1079 case ETH_SPEED_NUM_100M:
1080 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1081 case ETH_SPEED_NUM_1G:
1082 return ETH_LINK_SPEED_1G;
1083 case ETH_SPEED_NUM_2_5G:
1084 return ETH_LINK_SPEED_2_5G;
1085 case ETH_SPEED_NUM_5G:
1086 return ETH_LINK_SPEED_5G;
1087 case ETH_SPEED_NUM_10G:
1088 return ETH_LINK_SPEED_10G;
1089 case ETH_SPEED_NUM_20G:
1090 return ETH_LINK_SPEED_20G;
1091 case ETH_SPEED_NUM_25G:
1092 return ETH_LINK_SPEED_25G;
1093 case ETH_SPEED_NUM_40G:
1094 return ETH_LINK_SPEED_40G;
1095 case ETH_SPEED_NUM_50G:
1096 return ETH_LINK_SPEED_50G;
1097 case ETH_SPEED_NUM_56G:
1098 return ETH_LINK_SPEED_56G;
1099 case ETH_SPEED_NUM_100G:
1100 return ETH_LINK_SPEED_100G;
1101 case ETH_SPEED_NUM_200G:
1102 return ETH_LINK_SPEED_200G;
1109 rte_eth_dev_rx_offload_name(uint64_t offload)
1111 const char *name = "UNKNOWN";
1114 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1115 if (offload == rte_rx_offload_names[i].offload) {
1116 name = rte_rx_offload_names[i].name;
1125 rte_eth_dev_tx_offload_name(uint64_t offload)
1127 const char *name = "UNKNOWN";
1130 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1131 if (offload == rte_tx_offload_names[i].offload) {
1132 name = rte_tx_offload_names[i].name;
1141 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1142 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1146 if (dev_info_size == 0) {
1147 if (config_size != max_rx_pkt_len) {
1148 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1149 " %u != %u is not allowed\n",
1150 port_id, config_size, max_rx_pkt_len);
1153 } else if (config_size > dev_info_size) {
1154 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1155 "> max allowed value %u\n", port_id, config_size,
1158 } else if (config_size < RTE_ETHER_MIN_LEN) {
1159 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1160 "< min allowed value %u\n", port_id, config_size,
1161 (unsigned int)RTE_ETHER_MIN_LEN);
1168 * Validate offloads that are requested through rte_eth_dev_configure against
1169 * the offloads successfully set by the ethernet device.
1172 * The port identifier of the Ethernet device.
1173 * @param req_offloads
1174 * The offloads that have been requested through `rte_eth_dev_configure`.
1175 * @param set_offloads
1176 * The offloads successfully set by the ethernet device.
1177 * @param offload_type
1178 * The offload type i.e. Rx/Tx string.
1179 * @param offload_name
1180 * The function that prints the offload name.
1182 * - (0) if validation successful.
1183 * - (-EINVAL) if requested offload has been silently disabled.
1187 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1188 uint64_t set_offloads, const char *offload_type,
1189 const char *(*offload_name)(uint64_t))
1191 uint64_t offloads_diff = req_offloads ^ set_offloads;
1195 while (offloads_diff != 0) {
1196 /* Check if any offload is requested but not enabled. */
1197 offload = 1ULL << __builtin_ctzll(offloads_diff);
1198 if (offload & req_offloads) {
1200 "Port %u failed to enable %s offload %s\n",
1201 port_id, offload_type, offload_name(offload));
1205 /* Check if offload couldn't be disabled. */
1206 if (offload & set_offloads) {
1207 RTE_ETHDEV_LOG(DEBUG,
1208 "Port %u %s offload %s is not requested but enabled\n",
1209 port_id, offload_type, offload_name(offload));
1212 offloads_diff &= ~offload;
1219 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1220 const struct rte_eth_conf *dev_conf)
1222 struct rte_eth_dev *dev;
1223 struct rte_eth_dev_info dev_info;
1224 struct rte_eth_conf orig_conf;
1228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1230 dev = &rte_eth_devices[port_id];
1232 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1234 if (dev->data->dev_started) {
1236 "Port %u must be stopped to allow configuration\n",
1241 /* Store original config, as rollback required on failure */
1242 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1245 * Copy the dev_conf parameter into the dev structure.
1246 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1248 if (dev_conf != &dev->data->dev_conf)
1249 memcpy(&dev->data->dev_conf, dev_conf,
1250 sizeof(dev->data->dev_conf));
1252 ret = rte_eth_dev_info_get(port_id, &dev_info);
1256 /* If number of queues specified by application for both Rx and Tx is
1257 * zero, use driver preferred values. This cannot be done individually
1258 * as it is valid for either Tx or Rx (but not both) to be zero.
1259 * If driver does not provide any preferred valued, fall back on
1262 if (nb_rx_q == 0 && nb_tx_q == 0) {
1263 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1265 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1266 nb_tx_q = dev_info.default_txportconf.nb_queues;
1268 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1271 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1273 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1274 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1279 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1281 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1282 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1288 * Check that the numbers of RX and TX queues are not greater
1289 * than the maximum number of RX and TX queues supported by the
1290 * configured device.
1292 if (nb_rx_q > dev_info.max_rx_queues) {
1293 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1294 port_id, nb_rx_q, dev_info.max_rx_queues);
1299 if (nb_tx_q > dev_info.max_tx_queues) {
1300 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1301 port_id, nb_tx_q, dev_info.max_tx_queues);
1306 /* Check that the device supports requested interrupts */
1307 if ((dev_conf->intr_conf.lsc == 1) &&
1308 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1309 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1310 dev->device->driver->name);
1314 if ((dev_conf->intr_conf.rmv == 1) &&
1315 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1316 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1317 dev->device->driver->name);
1323 * If jumbo frames are enabled, check that the maximum RX packet
1324 * length is supported by the configured device.
1326 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1327 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1329 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1330 port_id, dev_conf->rxmode.max_rx_pkt_len,
1331 dev_info.max_rx_pktlen);
1334 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1336 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1337 port_id, dev_conf->rxmode.max_rx_pkt_len,
1338 (unsigned int)RTE_ETHER_MIN_LEN);
1343 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1344 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1345 /* Use default value */
1346 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1351 * If LRO is enabled, check that the maximum aggregated packet
1352 * size is supported by the configured device.
1354 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1355 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1356 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1357 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1358 ret = check_lro_pkt_size(port_id,
1359 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1360 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1361 dev_info.max_lro_pkt_size);
1366 /* Any requested offloading must be within its device capabilities */
1367 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1368 dev_conf->rxmode.offloads) {
1370 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1371 "capabilities 0x%"PRIx64" in %s()\n",
1372 port_id, dev_conf->rxmode.offloads,
1373 dev_info.rx_offload_capa,
1378 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1379 dev_conf->txmode.offloads) {
1381 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1382 "capabilities 0x%"PRIx64" in %s()\n",
1383 port_id, dev_conf->txmode.offloads,
1384 dev_info.tx_offload_capa,
1390 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1391 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1393 /* Check that device supports requested rss hash functions. */
1394 if ((dev_info.flow_type_rss_offloads |
1395 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1396 dev_info.flow_type_rss_offloads) {
1398 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1399 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1400 dev_info.flow_type_rss_offloads);
1405 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1406 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1407 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1409 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1411 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1417 * Setup new number of RX/TX queues and reconfigure device.
1419 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1422 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1428 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1431 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1433 rte_eth_dev_rx_queue_config(dev, 0);
1438 diag = (*dev->dev_ops->dev_configure)(dev);
1440 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1442 ret = eth_err(port_id, diag);
1446 /* Initialize Rx profiling if enabled at compilation time. */
1447 diag = __rte_eth_dev_profile_init(port_id, dev);
1449 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1451 ret = eth_err(port_id, diag);
1455 /* Validate Rx offloads. */
1456 diag = validate_offloads(port_id,
1457 dev_conf->rxmode.offloads,
1458 dev->data->dev_conf.rxmode.offloads, "Rx",
1459 rte_eth_dev_rx_offload_name);
1465 /* Validate Tx offloads. */
1466 diag = validate_offloads(port_id,
1467 dev_conf->txmode.offloads,
1468 dev->data->dev_conf.txmode.offloads, "Tx",
1469 rte_eth_dev_tx_offload_name);
1475 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1478 rte_eth_dev_rx_queue_config(dev, 0);
1479 rte_eth_dev_tx_queue_config(dev, 0);
1481 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1483 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1488 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1490 if (dev->data->dev_started) {
1491 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1492 dev->data->port_id);
1496 rte_eth_dev_rx_queue_config(dev, 0);
1497 rte_eth_dev_tx_queue_config(dev, 0);
1499 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1503 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1504 struct rte_eth_dev_info *dev_info)
1506 struct rte_ether_addr *addr;
1511 /* replay MAC address configuration including default MAC */
1512 addr = &dev->data->mac_addrs[0];
1513 if (*dev->dev_ops->mac_addr_set != NULL)
1514 (*dev->dev_ops->mac_addr_set)(dev, addr);
1515 else if (*dev->dev_ops->mac_addr_add != NULL)
1516 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1518 if (*dev->dev_ops->mac_addr_add != NULL) {
1519 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1520 addr = &dev->data->mac_addrs[i];
1522 /* skip zero address */
1523 if (rte_is_zero_ether_addr(addr))
1527 pool_mask = dev->data->mac_pool_sel[i];
1530 if (pool_mask & 1ULL)
1531 (*dev->dev_ops->mac_addr_add)(dev,
1535 } while (pool_mask);
1541 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1542 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1546 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1547 rte_eth_dev_mac_restore(dev, dev_info);
1549 /* replay promiscuous configuration */
1551 * use callbacks directly since we don't need port_id check and
1552 * would like to bypass the same value set
1554 if (rte_eth_promiscuous_get(port_id) == 1 &&
1555 *dev->dev_ops->promiscuous_enable != NULL) {
1556 ret = eth_err(port_id,
1557 (*dev->dev_ops->promiscuous_enable)(dev));
1558 if (ret != 0 && ret != -ENOTSUP) {
1560 "Failed to enable promiscuous mode for device (port %u): %s\n",
1561 port_id, rte_strerror(-ret));
1564 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1565 *dev->dev_ops->promiscuous_disable != NULL) {
1566 ret = eth_err(port_id,
1567 (*dev->dev_ops->promiscuous_disable)(dev));
1568 if (ret != 0 && ret != -ENOTSUP) {
1570 "Failed to disable promiscuous mode for device (port %u): %s\n",
1571 port_id, rte_strerror(-ret));
1576 /* replay all multicast configuration */
1578 * use callbacks directly since we don't need port_id check and
1579 * would like to bypass the same value set
1581 if (rte_eth_allmulticast_get(port_id) == 1 &&
1582 *dev->dev_ops->allmulticast_enable != NULL) {
1583 ret = eth_err(port_id,
1584 (*dev->dev_ops->allmulticast_enable)(dev));
1585 if (ret != 0 && ret != -ENOTSUP) {
1587 "Failed to enable allmulticast mode for device (port %u): %s\n",
1588 port_id, rte_strerror(-ret));
1591 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1592 *dev->dev_ops->allmulticast_disable != NULL) {
1593 ret = eth_err(port_id,
1594 (*dev->dev_ops->allmulticast_disable)(dev));
1595 if (ret != 0 && ret != -ENOTSUP) {
1597 "Failed to disable allmulticast mode for device (port %u): %s\n",
1598 port_id, rte_strerror(-ret));
1607 rte_eth_dev_start(uint16_t port_id)
1609 struct rte_eth_dev *dev;
1610 struct rte_eth_dev_info dev_info;
1614 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1616 dev = &rte_eth_devices[port_id];
1618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1620 if (dev->data->dev_started != 0) {
1621 RTE_ETHDEV_LOG(INFO,
1622 "Device with port_id=%"PRIu16" already started\n",
1627 ret = rte_eth_dev_info_get(port_id, &dev_info);
1631 /* Lets restore MAC now if device does not support live change */
1632 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1633 rte_eth_dev_mac_restore(dev, &dev_info);
1635 diag = (*dev->dev_ops->dev_start)(dev);
1637 dev->data->dev_started = 1;
1639 return eth_err(port_id, diag);
1641 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1644 "Error during restoring configuration for device (port %u): %s\n",
1645 port_id, rte_strerror(-ret));
1646 rte_eth_dev_stop(port_id);
1650 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1651 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1652 (*dev->dev_ops->link_update)(dev, 0);
1655 rte_ethdev_trace_start(port_id);
1660 rte_eth_dev_stop(uint16_t port_id)
1662 struct rte_eth_dev *dev;
1664 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1665 dev = &rte_eth_devices[port_id];
1667 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1669 if (dev->data->dev_started == 0) {
1670 RTE_ETHDEV_LOG(INFO,
1671 "Device with port_id=%"PRIu16" already stopped\n",
1676 dev->data->dev_started = 0;
1677 (*dev->dev_ops->dev_stop)(dev);
1678 rte_ethdev_trace_stop(port_id);
1682 rte_eth_dev_set_link_up(uint16_t port_id)
1684 struct rte_eth_dev *dev;
1686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1688 dev = &rte_eth_devices[port_id];
1690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1691 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1695 rte_eth_dev_set_link_down(uint16_t port_id)
1697 struct rte_eth_dev *dev;
1699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1701 dev = &rte_eth_devices[port_id];
1703 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1704 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1708 rte_eth_dev_close(uint16_t port_id)
1710 struct rte_eth_dev *dev;
1712 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1713 dev = &rte_eth_devices[port_id];
1715 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1716 dev->data->dev_started = 0;
1717 (*dev->dev_ops->dev_close)(dev);
1719 rte_ethdev_trace_close(port_id);
1720 /* check behaviour flag - temporary for PMD migration */
1721 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1722 /* new behaviour: send event + reset state + free all data */
1723 rte_eth_dev_release_port(dev);
1726 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1727 "The driver %s should migrate to the new behaviour.\n",
1728 dev->device->driver->name);
1729 /* old behaviour: only free queue arrays */
1730 dev->data->nb_rx_queues = 0;
1731 rte_free(dev->data->rx_queues);
1732 dev->data->rx_queues = NULL;
1733 dev->data->nb_tx_queues = 0;
1734 rte_free(dev->data->tx_queues);
1735 dev->data->tx_queues = NULL;
1739 rte_eth_dev_reset(uint16_t port_id)
1741 struct rte_eth_dev *dev;
1744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1745 dev = &rte_eth_devices[port_id];
1747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1749 rte_eth_dev_stop(port_id);
1750 ret = dev->dev_ops->dev_reset(dev);
1752 return eth_err(port_id, ret);
1756 rte_eth_dev_is_removed(uint16_t port_id)
1758 struct rte_eth_dev *dev;
1761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1763 dev = &rte_eth_devices[port_id];
1765 if (dev->state == RTE_ETH_DEV_REMOVED)
1768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1770 ret = dev->dev_ops->is_removed(dev);
1772 /* Device is physically removed. */
1773 dev->state = RTE_ETH_DEV_REMOVED;
1779 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1780 uint16_t nb_rx_desc, unsigned int socket_id,
1781 const struct rte_eth_rxconf *rx_conf,
1782 struct rte_mempool *mp)
1785 uint32_t mbp_buf_size;
1786 struct rte_eth_dev *dev;
1787 struct rte_eth_dev_info dev_info;
1788 struct rte_eth_rxconf local_conf;
1791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1793 dev = &rte_eth_devices[port_id];
1794 if (rx_queue_id >= dev->data->nb_rx_queues) {
1795 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1800 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1807 * Check the size of the mbuf data buffer.
1808 * This value must be provided in the private data of the memory pool.
1809 * First check that the memory pool has a valid private data.
1811 ret = rte_eth_dev_info_get(port_id, &dev_info);
1815 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1816 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1817 mp->name, (int)mp->private_data_size,
1818 (int)sizeof(struct rte_pktmbuf_pool_private));
1821 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1823 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1825 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1826 mp->name, (int)mbp_buf_size,
1827 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1828 (int)RTE_PKTMBUF_HEADROOM,
1829 (int)dev_info.min_rx_bufsize);
1833 /* Use default specified by driver, if nb_rx_desc is zero */
1834 if (nb_rx_desc == 0) {
1835 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1836 /* If driver default is also zero, fall back on EAL default */
1837 if (nb_rx_desc == 0)
1838 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1841 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1842 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1843 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1846 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1847 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1848 dev_info.rx_desc_lim.nb_min,
1849 dev_info.rx_desc_lim.nb_align);
1853 if (dev->data->dev_started &&
1854 !(dev_info.dev_capa &
1855 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1858 if (dev->data->dev_started &&
1859 (dev->data->rx_queue_state[rx_queue_id] !=
1860 RTE_ETH_QUEUE_STATE_STOPPED))
1863 rxq = dev->data->rx_queues;
1864 if (rxq[rx_queue_id]) {
1865 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1867 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1868 rxq[rx_queue_id] = NULL;
1871 if (rx_conf == NULL)
1872 rx_conf = &dev_info.default_rxconf;
1874 local_conf = *rx_conf;
1877 * If an offloading has already been enabled in
1878 * rte_eth_dev_configure(), it has been enabled on all queues,
1879 * so there is no need to enable it in this queue again.
1880 * The local_conf.offloads input to underlying PMD only carries
1881 * those offloadings which are only enabled on this queue and
1882 * not enabled on all queues.
1884 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1887 * New added offloadings for this queue are those not enabled in
1888 * rte_eth_dev_configure() and they must be per-queue type.
1889 * A pure per-port offloading can't be enabled on a queue while
1890 * disabled on another queue. A pure per-port offloading can't
1891 * be enabled for any queue as new added one if it hasn't been
1892 * enabled in rte_eth_dev_configure().
1894 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1895 local_conf.offloads) {
1897 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1898 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1899 port_id, rx_queue_id, local_conf.offloads,
1900 dev_info.rx_queue_offload_capa,
1906 * If LRO is enabled, check that the maximum aggregated packet
1907 * size is supported by the configured device.
1909 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1910 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1911 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1912 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1913 int ret = check_lro_pkt_size(port_id,
1914 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1915 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1916 dev_info.max_lro_pkt_size);
1921 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1922 socket_id, &local_conf, mp);
1924 if (!dev->data->min_rx_buf_size ||
1925 dev->data->min_rx_buf_size > mbp_buf_size)
1926 dev->data->min_rx_buf_size = mbp_buf_size;
1929 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1931 return eth_err(port_id, ret);
1935 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1936 uint16_t nb_rx_desc,
1937 const struct rte_eth_hairpin_conf *conf)
1940 struct rte_eth_dev *dev;
1941 struct rte_eth_hairpin_cap cap;
1946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1948 dev = &rte_eth_devices[port_id];
1949 if (rx_queue_id >= dev->data->nb_rx_queues) {
1950 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1953 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1958 /* if nb_rx_desc is zero use max number of desc from the driver. */
1959 if (nb_rx_desc == 0)
1960 nb_rx_desc = cap.max_nb_desc;
1961 if (nb_rx_desc > cap.max_nb_desc) {
1963 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1964 nb_rx_desc, cap.max_nb_desc);
1967 if (conf->peer_count > cap.max_rx_2_tx) {
1969 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1970 conf->peer_count, cap.max_rx_2_tx);
1973 if (conf->peer_count == 0) {
1975 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1979 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1980 cap.max_nb_queues != UINT16_MAX; i++) {
1981 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1984 if (count > cap.max_nb_queues) {
1985 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1989 if (dev->data->dev_started)
1991 rxq = dev->data->rx_queues;
1992 if (rxq[rx_queue_id] != NULL) {
1993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1995 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1996 rxq[rx_queue_id] = NULL;
1998 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2001 dev->data->rx_queue_state[rx_queue_id] =
2002 RTE_ETH_QUEUE_STATE_HAIRPIN;
2003 return eth_err(port_id, ret);
2007 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2008 uint16_t nb_tx_desc, unsigned int socket_id,
2009 const struct rte_eth_txconf *tx_conf)
2011 struct rte_eth_dev *dev;
2012 struct rte_eth_dev_info dev_info;
2013 struct rte_eth_txconf local_conf;
2017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2019 dev = &rte_eth_devices[port_id];
2020 if (tx_queue_id >= dev->data->nb_tx_queues) {
2021 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2027 ret = rte_eth_dev_info_get(port_id, &dev_info);
2031 /* Use default specified by driver, if nb_tx_desc is zero */
2032 if (nb_tx_desc == 0) {
2033 nb_tx_desc = dev_info.default_txportconf.ring_size;
2034 /* If driver default is zero, fall back on EAL default */
2035 if (nb_tx_desc == 0)
2036 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2038 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2039 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2040 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2042 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2043 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2044 dev_info.tx_desc_lim.nb_min,
2045 dev_info.tx_desc_lim.nb_align);
2049 if (dev->data->dev_started &&
2050 !(dev_info.dev_capa &
2051 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2054 if (dev->data->dev_started &&
2055 (dev->data->tx_queue_state[tx_queue_id] !=
2056 RTE_ETH_QUEUE_STATE_STOPPED))
2059 txq = dev->data->tx_queues;
2060 if (txq[tx_queue_id]) {
2061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2063 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2064 txq[tx_queue_id] = NULL;
2067 if (tx_conf == NULL)
2068 tx_conf = &dev_info.default_txconf;
2070 local_conf = *tx_conf;
2073 * If an offloading has already been enabled in
2074 * rte_eth_dev_configure(), it has been enabled on all queues,
2075 * so there is no need to enable it in this queue again.
2076 * The local_conf.offloads input to underlying PMD only carries
2077 * those offloadings which are only enabled on this queue and
2078 * not enabled on all queues.
2080 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2083 * New added offloadings for this queue are those not enabled in
2084 * rte_eth_dev_configure() and they must be per-queue type.
2085 * A pure per-port offloading can't be enabled on a queue while
2086 * disabled on another queue. A pure per-port offloading can't
2087 * be enabled for any queue as new added one if it hasn't been
2088 * enabled in rte_eth_dev_configure().
2090 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2091 local_conf.offloads) {
2093 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2094 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2095 port_id, tx_queue_id, local_conf.offloads,
2096 dev_info.tx_queue_offload_capa,
2101 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2102 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2103 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2107 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2108 uint16_t nb_tx_desc,
2109 const struct rte_eth_hairpin_conf *conf)
2111 struct rte_eth_dev *dev;
2112 struct rte_eth_hairpin_cap cap;
2118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2119 dev = &rte_eth_devices[port_id];
2120 if (tx_queue_id >= dev->data->nb_tx_queues) {
2121 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2124 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2129 /* if nb_rx_desc is zero use max number of desc from the driver. */
2130 if (nb_tx_desc == 0)
2131 nb_tx_desc = cap.max_nb_desc;
2132 if (nb_tx_desc > cap.max_nb_desc) {
2134 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2135 nb_tx_desc, cap.max_nb_desc);
2138 if (conf->peer_count > cap.max_tx_2_rx) {
2140 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2141 conf->peer_count, cap.max_tx_2_rx);
2144 if (conf->peer_count == 0) {
2146 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2150 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2151 cap.max_nb_queues != UINT16_MAX; i++) {
2152 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2155 if (count > cap.max_nb_queues) {
2156 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2160 if (dev->data->dev_started)
2162 txq = dev->data->tx_queues;
2163 if (txq[tx_queue_id] != NULL) {
2164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2166 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2167 txq[tx_queue_id] = NULL;
2169 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2170 (dev, tx_queue_id, nb_tx_desc, conf);
2172 dev->data->tx_queue_state[tx_queue_id] =
2173 RTE_ETH_QUEUE_STATE_HAIRPIN;
2174 return eth_err(port_id, ret);
2178 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2179 void *userdata __rte_unused)
2183 for (i = 0; i < unsent; i++)
2184 rte_pktmbuf_free(pkts[i]);
2188 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2191 uint64_t *count = userdata;
2194 for (i = 0; i < unsent; i++)
2195 rte_pktmbuf_free(pkts[i]);
2201 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2202 buffer_tx_error_fn cbfn, void *userdata)
2204 buffer->error_callback = cbfn;
2205 buffer->error_userdata = userdata;
2210 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2217 buffer->size = size;
2218 if (buffer->error_callback == NULL) {
2219 ret = rte_eth_tx_buffer_set_err_callback(
2220 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2227 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2229 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2232 /* Validate Input Data. Bail if not valid or not supported. */
2233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2236 /* Call driver to free pending mbufs. */
2237 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2239 return eth_err(port_id, ret);
2243 rte_eth_promiscuous_enable(uint16_t port_id)
2245 struct rte_eth_dev *dev;
2248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2249 dev = &rte_eth_devices[port_id];
2251 if (dev->data->promiscuous == 1)
2254 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2256 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2257 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2259 return eth_err(port_id, diag);
2263 rte_eth_promiscuous_disable(uint16_t port_id)
2265 struct rte_eth_dev *dev;
2268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2269 dev = &rte_eth_devices[port_id];
2271 if (dev->data->promiscuous == 0)
2274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2276 dev->data->promiscuous = 0;
2277 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2279 dev->data->promiscuous = 1;
2281 return eth_err(port_id, diag);
2285 rte_eth_promiscuous_get(uint16_t port_id)
2287 struct rte_eth_dev *dev;
2289 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2291 dev = &rte_eth_devices[port_id];
2292 return dev->data->promiscuous;
2296 rte_eth_allmulticast_enable(uint16_t port_id)
2298 struct rte_eth_dev *dev;
2301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302 dev = &rte_eth_devices[port_id];
2304 if (dev->data->all_multicast == 1)
2307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2308 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2309 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2311 return eth_err(port_id, diag);
2315 rte_eth_allmulticast_disable(uint16_t port_id)
2317 struct rte_eth_dev *dev;
2320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2321 dev = &rte_eth_devices[port_id];
2323 if (dev->data->all_multicast == 0)
2326 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2327 dev->data->all_multicast = 0;
2328 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2330 dev->data->all_multicast = 1;
2332 return eth_err(port_id, diag);
2336 rte_eth_allmulticast_get(uint16_t port_id)
2338 struct rte_eth_dev *dev;
2340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2342 dev = &rte_eth_devices[port_id];
2343 return dev->data->all_multicast;
2347 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2349 struct rte_eth_dev *dev;
2351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352 dev = &rte_eth_devices[port_id];
2354 if (dev->data->dev_conf.intr_conf.lsc &&
2355 dev->data->dev_started)
2356 rte_eth_linkstatus_get(dev, eth_link);
2358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2359 (*dev->dev_ops->link_update)(dev, 1);
2360 *eth_link = dev->data->dev_link;
2367 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2369 struct rte_eth_dev *dev;
2371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372 dev = &rte_eth_devices[port_id];
2374 if (dev->data->dev_conf.intr_conf.lsc &&
2375 dev->data->dev_started)
2376 rte_eth_linkstatus_get(dev, eth_link);
2378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2379 (*dev->dev_ops->link_update)(dev, 0);
2380 *eth_link = dev->data->dev_link;
2387 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2389 struct rte_eth_dev *dev;
2391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2393 dev = &rte_eth_devices[port_id];
2394 memset(stats, 0, sizeof(*stats));
2396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2397 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2398 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2402 rte_eth_stats_reset(uint16_t port_id)
2404 struct rte_eth_dev *dev;
2407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2408 dev = &rte_eth_devices[port_id];
2410 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2411 ret = (*dev->dev_ops->stats_reset)(dev);
2413 return eth_err(port_id, ret);
2415 dev->data->rx_mbuf_alloc_failed = 0;
2421 get_xstats_basic_count(struct rte_eth_dev *dev)
2423 uint16_t nb_rxqs, nb_txqs;
2426 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2427 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2429 count = RTE_NB_STATS;
2430 count += nb_rxqs * RTE_NB_RXQ_STATS;
2431 count += nb_txqs * RTE_NB_TXQ_STATS;
2437 get_xstats_count(uint16_t port_id)
2439 struct rte_eth_dev *dev;
2442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2443 dev = &rte_eth_devices[port_id];
2444 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2445 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2448 return eth_err(port_id, count);
2450 if (dev->dev_ops->xstats_get_names != NULL) {
2451 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2453 return eth_err(port_id, count);
2458 count += get_xstats_basic_count(dev);
2464 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2467 int cnt_xstats, idx_xstat;
2469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2472 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2477 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2482 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2483 if (cnt_xstats < 0) {
2484 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2488 /* Get id-name lookup table */
2489 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2491 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2492 port_id, xstats_names, cnt_xstats, NULL)) {
2493 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2497 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2498 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2507 /* retrieve basic stats names */
2509 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2510 struct rte_eth_xstat_name *xstats_names)
2512 int cnt_used_entries = 0;
2513 uint32_t idx, id_queue;
2516 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2517 strlcpy(xstats_names[cnt_used_entries].name,
2518 rte_stats_strings[idx].name,
2519 sizeof(xstats_names[0].name));
2522 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2523 for (id_queue = 0; id_queue < num_q; id_queue++) {
2524 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2525 snprintf(xstats_names[cnt_used_entries].name,
2526 sizeof(xstats_names[0].name),
2528 id_queue, rte_rxq_stats_strings[idx].name);
2533 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2534 for (id_queue = 0; id_queue < num_q; id_queue++) {
2535 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2536 snprintf(xstats_names[cnt_used_entries].name,
2537 sizeof(xstats_names[0].name),
2539 id_queue, rte_txq_stats_strings[idx].name);
2543 return cnt_used_entries;
2546 /* retrieve ethdev extended statistics names */
2548 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2549 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2552 struct rte_eth_xstat_name *xstats_names_copy;
2553 unsigned int no_basic_stat_requested = 1;
2554 unsigned int no_ext_stat_requested = 1;
2555 unsigned int expected_entries;
2556 unsigned int basic_count;
2557 struct rte_eth_dev *dev;
2561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2562 dev = &rte_eth_devices[port_id];
2564 basic_count = get_xstats_basic_count(dev);
2565 ret = get_xstats_count(port_id);
2568 expected_entries = (unsigned int)ret;
2570 /* Return max number of stats if no ids given */
2573 return expected_entries;
2574 else if (xstats_names && size < expected_entries)
2575 return expected_entries;
2578 if (ids && !xstats_names)
2581 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2582 uint64_t ids_copy[size];
2584 for (i = 0; i < size; i++) {
2585 if (ids[i] < basic_count) {
2586 no_basic_stat_requested = 0;
2591 * Convert ids to xstats ids that PMD knows.
2592 * ids known by user are basic + extended stats.
2594 ids_copy[i] = ids[i] - basic_count;
2597 if (no_basic_stat_requested)
2598 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2599 xstats_names, ids_copy, size);
2602 /* Retrieve all stats */
2604 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2606 if (num_stats < 0 || num_stats > (int)expected_entries)
2609 return expected_entries;
2612 xstats_names_copy = calloc(expected_entries,
2613 sizeof(struct rte_eth_xstat_name));
2615 if (!xstats_names_copy) {
2616 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2621 for (i = 0; i < size; i++) {
2622 if (ids[i] >= basic_count) {
2623 no_ext_stat_requested = 0;
2629 /* Fill xstats_names_copy structure */
2630 if (ids && no_ext_stat_requested) {
2631 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2633 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2636 free(xstats_names_copy);
2642 for (i = 0; i < size; i++) {
2643 if (ids[i] >= expected_entries) {
2644 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2645 free(xstats_names_copy);
2648 xstats_names[i] = xstats_names_copy[ids[i]];
2651 free(xstats_names_copy);
2656 rte_eth_xstats_get_names(uint16_t port_id,
2657 struct rte_eth_xstat_name *xstats_names,
2660 struct rte_eth_dev *dev;
2661 int cnt_used_entries;
2662 int cnt_expected_entries;
2663 int cnt_driver_entries;
2665 cnt_expected_entries = get_xstats_count(port_id);
2666 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2667 (int)size < cnt_expected_entries)
2668 return cnt_expected_entries;
2670 /* port_id checked in get_xstats_count() */
2671 dev = &rte_eth_devices[port_id];
2673 cnt_used_entries = rte_eth_basic_stats_get_names(
2676 if (dev->dev_ops->xstats_get_names != NULL) {
2677 /* If there are any driver-specific xstats, append them
2680 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2682 xstats_names + cnt_used_entries,
2683 size - cnt_used_entries);
2684 if (cnt_driver_entries < 0)
2685 return eth_err(port_id, cnt_driver_entries);
2686 cnt_used_entries += cnt_driver_entries;
2689 return cnt_used_entries;
2694 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2696 struct rte_eth_dev *dev;
2697 struct rte_eth_stats eth_stats;
2698 unsigned int count = 0, i, q;
2699 uint64_t val, *stats_ptr;
2700 uint16_t nb_rxqs, nb_txqs;
2703 ret = rte_eth_stats_get(port_id, ð_stats);
2707 dev = &rte_eth_devices[port_id];
2709 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2710 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2713 for (i = 0; i < RTE_NB_STATS; i++) {
2714 stats_ptr = RTE_PTR_ADD(ð_stats,
2715 rte_stats_strings[i].offset);
2717 xstats[count++].value = val;
2721 for (q = 0; q < nb_rxqs; q++) {
2722 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2723 stats_ptr = RTE_PTR_ADD(ð_stats,
2724 rte_rxq_stats_strings[i].offset +
2725 q * sizeof(uint64_t));
2727 xstats[count++].value = val;
2732 for (q = 0; q < nb_txqs; q++) {
2733 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2734 stats_ptr = RTE_PTR_ADD(ð_stats,
2735 rte_txq_stats_strings[i].offset +
2736 q * sizeof(uint64_t));
2738 xstats[count++].value = val;
2744 /* retrieve ethdev extended statistics */
2746 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2747 uint64_t *values, unsigned int size)
2749 unsigned int no_basic_stat_requested = 1;
2750 unsigned int no_ext_stat_requested = 1;
2751 unsigned int num_xstats_filled;
2752 unsigned int basic_count;
2753 uint16_t expected_entries;
2754 struct rte_eth_dev *dev;
2758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2759 ret = get_xstats_count(port_id);
2762 expected_entries = (uint16_t)ret;
2763 struct rte_eth_xstat xstats[expected_entries];
2764 dev = &rte_eth_devices[port_id];
2765 basic_count = get_xstats_basic_count(dev);
2767 /* Return max number of stats if no ids given */
2770 return expected_entries;
2771 else if (values && size < expected_entries)
2772 return expected_entries;
2778 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2779 unsigned int basic_count = get_xstats_basic_count(dev);
2780 uint64_t ids_copy[size];
2782 for (i = 0; i < size; i++) {
2783 if (ids[i] < basic_count) {
2784 no_basic_stat_requested = 0;
2789 * Convert ids to xstats ids that PMD knows.
2790 * ids known by user are basic + extended stats.
2792 ids_copy[i] = ids[i] - basic_count;
2795 if (no_basic_stat_requested)
2796 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2801 for (i = 0; i < size; i++) {
2802 if (ids[i] >= basic_count) {
2803 no_ext_stat_requested = 0;
2809 /* Fill the xstats structure */
2810 if (ids && no_ext_stat_requested)
2811 ret = rte_eth_basic_stats_get(port_id, xstats);
2813 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2817 num_xstats_filled = (unsigned int)ret;
2819 /* Return all stats */
2821 for (i = 0; i < num_xstats_filled; i++)
2822 values[i] = xstats[i].value;
2823 return expected_entries;
2827 for (i = 0; i < size; i++) {
2828 if (ids[i] >= expected_entries) {
2829 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2832 values[i] = xstats[ids[i]].value;
2838 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2841 struct rte_eth_dev *dev;
2842 unsigned int count = 0, i;
2843 signed int xcount = 0;
2844 uint16_t nb_rxqs, nb_txqs;
2847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2849 dev = &rte_eth_devices[port_id];
2851 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2852 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2854 /* Return generic statistics */
2855 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2856 (nb_txqs * RTE_NB_TXQ_STATS);
2858 /* implemented by the driver */
2859 if (dev->dev_ops->xstats_get != NULL) {
2860 /* Retrieve the xstats from the driver at the end of the
2863 xcount = (*dev->dev_ops->xstats_get)(dev,
2864 xstats ? xstats + count : NULL,
2865 (n > count) ? n - count : 0);
2868 return eth_err(port_id, xcount);
2871 if (n < count + xcount || xstats == NULL)
2872 return count + xcount;
2874 /* now fill the xstats structure */
2875 ret = rte_eth_basic_stats_get(port_id, xstats);
2880 for (i = 0; i < count; i++)
2882 /* add an offset to driver-specific stats */
2883 for ( ; i < count + xcount; i++)
2884 xstats[i].id += count;
2886 return count + xcount;
2889 /* reset ethdev extended statistics */
2891 rte_eth_xstats_reset(uint16_t port_id)
2893 struct rte_eth_dev *dev;
2895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2896 dev = &rte_eth_devices[port_id];
2898 /* implemented by the driver */
2899 if (dev->dev_ops->xstats_reset != NULL)
2900 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2902 /* fallback to default */
2903 return rte_eth_stats_reset(port_id);
2907 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2910 struct rte_eth_dev *dev;
2912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2914 dev = &rte_eth_devices[port_id];
2916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2918 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2921 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2924 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2927 return (*dev->dev_ops->queue_stats_mapping_set)
2928 (dev, queue_id, stat_idx, is_rx);
2933 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2936 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2937 stat_idx, STAT_QMAP_TX));
2942 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2945 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2946 stat_idx, STAT_QMAP_RX));
2950 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2952 struct rte_eth_dev *dev;
2954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2955 dev = &rte_eth_devices[port_id];
2957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2958 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2959 fw_version, fw_size));
2963 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2965 struct rte_eth_dev *dev;
2966 const struct rte_eth_desc_lim lim = {
2967 .nb_max = UINT16_MAX,
2970 .nb_seg_max = UINT16_MAX,
2971 .nb_mtu_seg_max = UINT16_MAX,
2976 * Init dev_info before port_id check since caller does not have
2977 * return status and does not know if get is successful or not.
2979 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2980 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2983 dev = &rte_eth_devices[port_id];
2985 dev_info->rx_desc_lim = lim;
2986 dev_info->tx_desc_lim = lim;
2987 dev_info->device = dev->device;
2988 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2989 dev_info->max_mtu = UINT16_MAX;
2991 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2992 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2994 /* Cleanup already filled in device information */
2995 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2996 return eth_err(port_id, diag);
2999 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3000 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3001 RTE_MAX_QUEUES_PER_PORT);
3002 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3003 RTE_MAX_QUEUES_PER_PORT);
3005 dev_info->driver_name = dev->device->driver->name;
3006 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3007 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3009 dev_info->dev_flags = &dev->data->dev_flags;
3015 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3016 uint32_t *ptypes, int num)
3019 struct rte_eth_dev *dev;
3020 const uint32_t *all_ptypes;
3022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3023 dev = &rte_eth_devices[port_id];
3024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3025 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3030 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3031 if (all_ptypes[i] & ptype_mask) {
3033 ptypes[j] = all_ptypes[i];
3041 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3042 uint32_t *set_ptypes, unsigned int num)
3044 const uint32_t valid_ptype_masks[] = {
3048 RTE_PTYPE_TUNNEL_MASK,
3049 RTE_PTYPE_INNER_L2_MASK,
3050 RTE_PTYPE_INNER_L3_MASK,
3051 RTE_PTYPE_INNER_L4_MASK,
3053 const uint32_t *all_ptypes;
3054 struct rte_eth_dev *dev;
3055 uint32_t unused_mask;
3059 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3060 dev = &rte_eth_devices[port_id];
3062 if (num > 0 && set_ptypes == NULL)
3065 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3066 *dev->dev_ops->dev_ptypes_set == NULL) {
3071 if (ptype_mask == 0) {
3072 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3077 unused_mask = ptype_mask;
3078 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3079 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3080 if (mask && mask != valid_ptype_masks[i]) {
3084 unused_mask &= ~valid_ptype_masks[i];
3092 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3093 if (all_ptypes == NULL) {
3099 * Accommodate as many set_ptypes as possible. If the supplied
3100 * set_ptypes array is insufficient fill it partially.
3102 for (i = 0, j = 0; set_ptypes != NULL &&
3103 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3104 if (ptype_mask & all_ptypes[i]) {
3106 set_ptypes[j] = all_ptypes[i];
3114 if (set_ptypes != NULL && j < num)
3115 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3117 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3121 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3127 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3129 struct rte_eth_dev *dev;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132 dev = &rte_eth_devices[port_id];
3133 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3139 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3141 struct rte_eth_dev *dev;
3143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3145 dev = &rte_eth_devices[port_id];
3146 *mtu = dev->data->mtu;
3151 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3154 struct rte_eth_dev_info dev_info;
3155 struct rte_eth_dev *dev;
3157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3158 dev = &rte_eth_devices[port_id];
3159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3162 * Check if the device supports dev_infos_get, if it does not
3163 * skip min_mtu/max_mtu validation here as this requires values
3164 * that are populated within the call to rte_eth_dev_info_get()
3165 * which relies on dev->dev_ops->dev_infos_get.
3167 if (*dev->dev_ops->dev_infos_get != NULL) {
3168 ret = rte_eth_dev_info_get(port_id, &dev_info);
3172 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3176 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3178 dev->data->mtu = mtu;
3180 return eth_err(port_id, ret);
3184 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3186 struct rte_eth_dev *dev;
3189 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3190 dev = &rte_eth_devices[port_id];
3191 if (!(dev->data->dev_conf.rxmode.offloads &
3192 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3193 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3198 if (vlan_id > 4095) {
3199 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3205 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3207 struct rte_vlan_filter_conf *vfc;
3211 vfc = &dev->data->vlan_filter_conf;
3212 vidx = vlan_id / 64;
3213 vbit = vlan_id % 64;
3216 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3218 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3221 return eth_err(port_id, ret);
3225 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3228 struct rte_eth_dev *dev;
3230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3231 dev = &rte_eth_devices[port_id];
3232 if (rx_queue_id >= dev->data->nb_rx_queues) {
3233 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3238 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3244 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3245 enum rte_vlan_type vlan_type,
3248 struct rte_eth_dev *dev;
3250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3251 dev = &rte_eth_devices[port_id];
3252 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3254 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3259 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3261 struct rte_eth_dev *dev;
3265 uint64_t orig_offloads;
3266 uint64_t dev_offloads;
3268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269 dev = &rte_eth_devices[port_id];
3271 /* save original values in case of failure */
3272 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3273 dev_offloads = orig_offloads;
3275 /* check which option changed by application */
3276 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3277 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3280 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3282 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3283 mask |= ETH_VLAN_STRIP_MASK;
3286 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3287 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3290 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3292 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3293 mask |= ETH_VLAN_FILTER_MASK;
3296 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3297 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3300 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3302 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3303 mask |= ETH_VLAN_EXTEND_MASK;
3306 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3307 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3310 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3312 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3313 mask |= ETH_QINQ_STRIP_MASK;
3320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3321 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3322 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3324 /* hit an error restore original values */
3325 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3328 return eth_err(port_id, ret);
3332 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3334 struct rte_eth_dev *dev;
3335 uint64_t *dev_offloads;
3338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3339 dev = &rte_eth_devices[port_id];
3340 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3342 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3343 ret |= ETH_VLAN_STRIP_OFFLOAD;
3345 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3346 ret |= ETH_VLAN_FILTER_OFFLOAD;
3348 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3349 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3351 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3352 ret |= ETH_QINQ_STRIP_OFFLOAD;
3358 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3360 struct rte_eth_dev *dev;
3362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3363 dev = &rte_eth_devices[port_id];
3364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3366 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3370 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3372 struct rte_eth_dev *dev;
3374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3375 dev = &rte_eth_devices[port_id];
3376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3377 memset(fc_conf, 0, sizeof(*fc_conf));
3378 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3382 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3384 struct rte_eth_dev *dev;
3386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3387 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3388 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3392 dev = &rte_eth_devices[port_id];
3393 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3394 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3398 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3399 struct rte_eth_pfc_conf *pfc_conf)
3401 struct rte_eth_dev *dev;
3403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3404 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3405 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3409 dev = &rte_eth_devices[port_id];
3410 /* High water, low water validation are device specific */
3411 if (*dev->dev_ops->priority_flow_ctrl_set)
3412 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3418 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3426 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3427 for (i = 0; i < num; i++) {
3428 if (reta_conf[i].mask)
3436 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3440 uint16_t i, idx, shift;
3446 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3450 for (i = 0; i < reta_size; i++) {
3451 idx = i / RTE_RETA_GROUP_SIZE;
3452 shift = i % RTE_RETA_GROUP_SIZE;
3453 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3454 (reta_conf[idx].reta[shift] >= max_rxq)) {
3456 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3458 reta_conf[idx].reta[shift], max_rxq);
3467 rte_eth_dev_rss_reta_update(uint16_t port_id,
3468 struct rte_eth_rss_reta_entry64 *reta_conf,
3471 struct rte_eth_dev *dev;
3474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3475 /* Check mask bits */
3476 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3480 dev = &rte_eth_devices[port_id];
3482 /* Check entry value */
3483 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3484 dev->data->nb_rx_queues);
3488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3489 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3494 rte_eth_dev_rss_reta_query(uint16_t port_id,
3495 struct rte_eth_rss_reta_entry64 *reta_conf,
3498 struct rte_eth_dev *dev;
3501 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3503 /* Check mask bits */
3504 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3508 dev = &rte_eth_devices[port_id];
3509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3510 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3515 rte_eth_dev_rss_hash_update(uint16_t port_id,
3516 struct rte_eth_rss_conf *rss_conf)
3518 struct rte_eth_dev *dev;
3519 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3524 ret = rte_eth_dev_info_get(port_id, &dev_info);
3528 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3530 dev = &rte_eth_devices[port_id];
3531 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3532 dev_info.flow_type_rss_offloads) {
3534 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3535 port_id, rss_conf->rss_hf,
3536 dev_info.flow_type_rss_offloads);
3539 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3540 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3545 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3546 struct rte_eth_rss_conf *rss_conf)
3548 struct rte_eth_dev *dev;
3550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3551 dev = &rte_eth_devices[port_id];
3552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3553 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3558 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3559 struct rte_eth_udp_tunnel *udp_tunnel)
3561 struct rte_eth_dev *dev;
3563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3564 if (udp_tunnel == NULL) {
3565 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3569 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3570 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3574 dev = &rte_eth_devices[port_id];
3575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3576 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3581 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3582 struct rte_eth_udp_tunnel *udp_tunnel)
3584 struct rte_eth_dev *dev;
3586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3587 dev = &rte_eth_devices[port_id];
3589 if (udp_tunnel == NULL) {
3590 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3594 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3595 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3599 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3600 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3605 rte_eth_led_on(uint16_t port_id)
3607 struct rte_eth_dev *dev;
3609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3610 dev = &rte_eth_devices[port_id];
3611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3612 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3616 rte_eth_led_off(uint16_t port_id)
3618 struct rte_eth_dev *dev;
3620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3621 dev = &rte_eth_devices[port_id];
3622 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3623 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3627 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3631 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3633 struct rte_eth_dev_info dev_info;
3634 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3638 ret = rte_eth_dev_info_get(port_id, &dev_info);
3642 for (i = 0; i < dev_info.max_mac_addrs; i++)
3643 if (memcmp(addr, &dev->data->mac_addrs[i],
3644 RTE_ETHER_ADDR_LEN) == 0)
3650 static const struct rte_ether_addr null_mac_addr;
3653 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3656 struct rte_eth_dev *dev;
3661 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3662 dev = &rte_eth_devices[port_id];
3663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3665 if (rte_is_zero_ether_addr(addr)) {
3666 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3670 if (pool >= ETH_64_POOLS) {
3671 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3675 index = get_mac_addr_index(port_id, addr);
3677 index = get_mac_addr_index(port_id, &null_mac_addr);
3679 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3684 pool_mask = dev->data->mac_pool_sel[index];
3686 /* Check if both MAC address and pool is already there, and do nothing */
3687 if (pool_mask & (1ULL << pool))
3692 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3695 /* Update address in NIC data structure */
3696 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3698 /* Update pool bitmap in NIC data structure */
3699 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3702 return eth_err(port_id, ret);
3706 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3708 struct rte_eth_dev *dev;
3711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3712 dev = &rte_eth_devices[port_id];
3713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3715 index = get_mac_addr_index(port_id, addr);
3718 "Port %u: Cannot remove default MAC address\n",
3721 } else if (index < 0)
3722 return 0; /* Do nothing if address wasn't found */
3725 (*dev->dev_ops->mac_addr_remove)(dev, index);
3727 /* Update address in NIC data structure */
3728 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3730 /* reset pool bitmap */
3731 dev->data->mac_pool_sel[index] = 0;
3737 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3739 struct rte_eth_dev *dev;
3742 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3744 if (!rte_is_valid_assigned_ether_addr(addr))
3747 dev = &rte_eth_devices[port_id];
3748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3750 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3754 /* Update default address in NIC data structure */
3755 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3762 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3766 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3768 struct rte_eth_dev_info dev_info;
3769 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3773 ret = rte_eth_dev_info_get(port_id, &dev_info);
3777 if (!dev->data->hash_mac_addrs)
3780 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3781 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3782 RTE_ETHER_ADDR_LEN) == 0)
3789 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3794 struct rte_eth_dev *dev;
3796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3798 dev = &rte_eth_devices[port_id];
3799 if (rte_is_zero_ether_addr(addr)) {
3800 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3805 index = get_hash_mac_addr_index(port_id, addr);
3806 /* Check if it's already there, and do nothing */
3807 if ((index >= 0) && on)
3813 "Port %u: the MAC address was not set in UTA\n",
3818 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3820 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3827 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3829 /* Update address in NIC data structure */
3831 rte_ether_addr_copy(addr,
3832 &dev->data->hash_mac_addrs[index]);
3834 rte_ether_addr_copy(&null_mac_addr,
3835 &dev->data->hash_mac_addrs[index]);
3838 return eth_err(port_id, ret);
3842 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3844 struct rte_eth_dev *dev;
3846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3848 dev = &rte_eth_devices[port_id];
3850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3851 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3855 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3858 struct rte_eth_dev *dev;
3859 struct rte_eth_dev_info dev_info;
3860 struct rte_eth_link link;
3863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3865 ret = rte_eth_dev_info_get(port_id, &dev_info);
3869 dev = &rte_eth_devices[port_id];
3870 link = dev->data->dev_link;
3872 if (queue_idx > dev_info.max_tx_queues) {
3874 "Set queue rate limit:port %u: invalid queue id=%u\n",
3875 port_id, queue_idx);
3879 if (tx_rate > link.link_speed) {
3881 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3882 tx_rate, link.link_speed);
3886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3887 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3888 queue_idx, tx_rate));
3892 rte_eth_mirror_rule_set(uint16_t port_id,
3893 struct rte_eth_mirror_conf *mirror_conf,
3894 uint8_t rule_id, uint8_t on)
3896 struct rte_eth_dev *dev;
3898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3899 if (mirror_conf->rule_type == 0) {
3900 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3904 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3905 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3910 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3911 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3912 (mirror_conf->pool_mask == 0)) {
3914 "Invalid mirror pool, pool mask can not be 0\n");
3918 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3919 mirror_conf->vlan.vlan_mask == 0) {
3921 "Invalid vlan mask, vlan mask can not be 0\n");
3925 dev = &rte_eth_devices[port_id];
3926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3928 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3929 mirror_conf, rule_id, on));
3933 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3935 struct rte_eth_dev *dev;
3937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3939 dev = &rte_eth_devices[port_id];
3940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3942 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3946 RTE_INIT(eth_dev_init_cb_lists)
3950 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3951 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3955 rte_eth_dev_callback_register(uint16_t port_id,
3956 enum rte_eth_event_type event,
3957 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3959 struct rte_eth_dev *dev;
3960 struct rte_eth_dev_callback *user_cb;
3961 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3967 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3968 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3972 if (port_id == RTE_ETH_ALL) {
3974 last_port = RTE_MAX_ETHPORTS - 1;
3976 next_port = last_port = port_id;
3979 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3982 dev = &rte_eth_devices[next_port];
3984 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3985 if (user_cb->cb_fn == cb_fn &&
3986 user_cb->cb_arg == cb_arg &&
3987 user_cb->event == event) {
3992 /* create a new callback. */
3993 if (user_cb == NULL) {
3994 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3995 sizeof(struct rte_eth_dev_callback), 0);
3996 if (user_cb != NULL) {
3997 user_cb->cb_fn = cb_fn;
3998 user_cb->cb_arg = cb_arg;
3999 user_cb->event = event;
4000 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4003 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4004 rte_eth_dev_callback_unregister(port_id, event,
4010 } while (++next_port <= last_port);
4012 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4017 rte_eth_dev_callback_unregister(uint16_t port_id,
4018 enum rte_eth_event_type event,
4019 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4022 struct rte_eth_dev *dev;
4023 struct rte_eth_dev_callback *cb, *next;
4024 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4030 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4031 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4035 if (port_id == RTE_ETH_ALL) {
4037 last_port = RTE_MAX_ETHPORTS - 1;
4039 next_port = last_port = port_id;
4042 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4045 dev = &rte_eth_devices[next_port];
4047 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4050 next = TAILQ_NEXT(cb, next);
4052 if (cb->cb_fn != cb_fn || cb->event != event ||
4053 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4057 * if this callback is not executing right now,
4060 if (cb->active == 0) {
4061 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4067 } while (++next_port <= last_port);
4069 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4074 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4075 enum rte_eth_event_type event, void *ret_param)
4077 struct rte_eth_dev_callback *cb_lst;
4078 struct rte_eth_dev_callback dev_cb;
4081 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4082 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4083 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4087 if (ret_param != NULL)
4088 dev_cb.ret_param = ret_param;
4090 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4091 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4092 dev_cb.cb_arg, dev_cb.ret_param);
4093 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4096 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4101 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4106 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4108 dev->state = RTE_ETH_DEV_ATTACHED;
4112 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4115 struct rte_eth_dev *dev;
4116 struct rte_intr_handle *intr_handle;
4120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4122 dev = &rte_eth_devices[port_id];
4124 if (!dev->intr_handle) {
4125 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4129 intr_handle = dev->intr_handle;
4130 if (!intr_handle->intr_vec) {
4131 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4135 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4136 vec = intr_handle->intr_vec[qid];
4137 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4138 if (rc && rc != -EEXIST) {
4140 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4141 port_id, qid, op, epfd, vec);
4149 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4151 struct rte_intr_handle *intr_handle;
4152 struct rte_eth_dev *dev;
4153 unsigned int efd_idx;
4157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4159 dev = &rte_eth_devices[port_id];
4161 if (queue_id >= dev->data->nb_rx_queues) {
4162 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4166 if (!dev->intr_handle) {
4167 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4171 intr_handle = dev->intr_handle;
4172 if (!intr_handle->intr_vec) {
4173 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4177 vec = intr_handle->intr_vec[queue_id];
4178 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4179 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4180 fd = intr_handle->efds[efd_idx];
4185 const struct rte_memzone *
4186 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4187 uint16_t queue_id, size_t size, unsigned align,
4190 char z_name[RTE_MEMZONE_NAMESIZE];
4191 const struct rte_memzone *mz;
4194 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4195 dev->data->port_id, queue_id, ring_name);
4196 if (rc >= RTE_MEMZONE_NAMESIZE) {
4197 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4198 rte_errno = ENAMETOOLONG;
4202 mz = rte_memzone_lookup(z_name);
4206 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4207 RTE_MEMZONE_IOVA_CONTIG, align);
4211 rte_eth_dev_create(struct rte_device *device, const char *name,
4212 size_t priv_data_size,
4213 ethdev_bus_specific_init ethdev_bus_specific_init,
4214 void *bus_init_params,
4215 ethdev_init_t ethdev_init, void *init_params)
4217 struct rte_eth_dev *ethdev;
4220 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4222 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4223 ethdev = rte_eth_dev_allocate(name);
4227 if (priv_data_size) {
4228 ethdev->data->dev_private = rte_zmalloc_socket(
4229 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4232 if (!ethdev->data->dev_private) {
4233 RTE_LOG(ERR, EAL, "failed to allocate private data");
4239 ethdev = rte_eth_dev_attach_secondary(name);
4241 RTE_LOG(ERR, EAL, "secondary process attach failed, "
4242 "ethdev doesn't exist");
4247 ethdev->device = device;
4249 if (ethdev_bus_specific_init) {
4250 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4253 "ethdev bus specific initialisation failed");
4258 retval = ethdev_init(ethdev, init_params);
4260 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4264 rte_eth_dev_probing_finish(ethdev);
4269 rte_eth_dev_release_port(ethdev);
4274 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4275 ethdev_uninit_t ethdev_uninit)
4279 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4283 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4285 ret = ethdev_uninit(ethdev);
4289 return rte_eth_dev_release_port(ethdev);
4293 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4294 int epfd, int op, void *data)
4297 struct rte_eth_dev *dev;
4298 struct rte_intr_handle *intr_handle;
4301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4303 dev = &rte_eth_devices[port_id];
4304 if (queue_id >= dev->data->nb_rx_queues) {
4305 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4309 if (!dev->intr_handle) {
4310 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4314 intr_handle = dev->intr_handle;
4315 if (!intr_handle->intr_vec) {
4316 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4320 vec = intr_handle->intr_vec[queue_id];
4321 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4322 if (rc && rc != -EEXIST) {
4324 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4325 port_id, queue_id, op, epfd, vec);
4333 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4336 struct rte_eth_dev *dev;
4338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4340 dev = &rte_eth_devices[port_id];
4342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4343 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4348 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4351 struct rte_eth_dev *dev;
4353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4355 dev = &rte_eth_devices[port_id];
4357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4358 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4364 rte_eth_dev_filter_supported(uint16_t port_id,
4365 enum rte_filter_type filter_type)
4367 struct rte_eth_dev *dev;
4369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4371 dev = &rte_eth_devices[port_id];
4372 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4373 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4374 RTE_ETH_FILTER_NOP, NULL);
4378 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4379 enum rte_filter_op filter_op, void *arg)
4381 struct rte_eth_dev *dev;
4383 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4385 dev = &rte_eth_devices[port_id];
4386 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4387 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4391 const struct rte_eth_rxtx_callback *
4392 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4393 rte_rx_callback_fn fn, void *user_param)
4395 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4396 rte_errno = ENOTSUP;
4399 struct rte_eth_dev *dev;
4401 /* check input parameters */
4402 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4403 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4407 dev = &rte_eth_devices[port_id];
4408 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4412 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4420 cb->param = user_param;
4422 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4423 /* Add the callbacks in fifo order. */
4424 struct rte_eth_rxtx_callback *tail =
4425 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4428 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4435 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4440 const struct rte_eth_rxtx_callback *
4441 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4442 rte_rx_callback_fn fn, void *user_param)
4444 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4445 rte_errno = ENOTSUP;
4448 /* check input parameters */
4449 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4450 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4455 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4463 cb->param = user_param;
4465 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4466 /* Add the callbacks at first position */
4467 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4469 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4470 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4475 const struct rte_eth_rxtx_callback *
4476 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4477 rte_tx_callback_fn fn, void *user_param)
4479 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4480 rte_errno = ENOTSUP;
4483 struct rte_eth_dev *dev;
4485 /* check input parameters */
4486 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4487 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4492 dev = &rte_eth_devices[port_id];
4493 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4498 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4506 cb->param = user_param;
4508 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4509 /* Add the callbacks in fifo order. */
4510 struct rte_eth_rxtx_callback *tail =
4511 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4514 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4521 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4527 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4528 const struct rte_eth_rxtx_callback *user_cb)
4530 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4533 /* Check input parameters. */
4534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4535 if (user_cb == NULL ||
4536 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4539 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4540 struct rte_eth_rxtx_callback *cb;
4541 struct rte_eth_rxtx_callback **prev_cb;
4544 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4545 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4546 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4548 if (cb == user_cb) {
4549 /* Remove the user cb from the callback list. */
4550 *prev_cb = cb->next;
4555 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4561 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4562 const struct rte_eth_rxtx_callback *user_cb)
4564 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4567 /* Check input parameters. */
4568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4569 if (user_cb == NULL ||
4570 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4573 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4575 struct rte_eth_rxtx_callback *cb;
4576 struct rte_eth_rxtx_callback **prev_cb;
4578 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4579 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4580 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4582 if (cb == user_cb) {
4583 /* Remove the user cb from the callback list. */
4584 *prev_cb = cb->next;
4589 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4595 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4596 struct rte_eth_rxq_info *qinfo)
4598 struct rte_eth_dev *dev;
4600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4605 dev = &rte_eth_devices[port_id];
4606 if (queue_id >= dev->data->nb_rx_queues) {
4607 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4611 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4612 RTE_ETHDEV_LOG(INFO,
4613 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4620 memset(qinfo, 0, sizeof(*qinfo));
4621 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4626 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4627 struct rte_eth_txq_info *qinfo)
4629 struct rte_eth_dev *dev;
4631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4636 dev = &rte_eth_devices[port_id];
4637 if (queue_id >= dev->data->nb_tx_queues) {
4638 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4642 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4643 RTE_ETHDEV_LOG(INFO,
4644 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4651 memset(qinfo, 0, sizeof(*qinfo));
4652 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4658 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4659 struct rte_eth_burst_mode *mode)
4661 struct rte_eth_dev *dev;
4663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4668 dev = &rte_eth_devices[port_id];
4670 if (queue_id >= dev->data->nb_rx_queues) {
4671 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4675 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4676 memset(mode, 0, sizeof(*mode));
4677 return eth_err(port_id,
4678 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4682 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4683 struct rte_eth_burst_mode *mode)
4685 struct rte_eth_dev *dev;
4687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4692 dev = &rte_eth_devices[port_id];
4694 if (queue_id >= dev->data->nb_tx_queues) {
4695 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4700 memset(mode, 0, sizeof(*mode));
4701 return eth_err(port_id,
4702 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4706 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4707 struct rte_ether_addr *mc_addr_set,
4708 uint32_t nb_mc_addr)
4710 struct rte_eth_dev *dev;
4712 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4714 dev = &rte_eth_devices[port_id];
4715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4716 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4717 mc_addr_set, nb_mc_addr));
4721 rte_eth_timesync_enable(uint16_t port_id)
4723 struct rte_eth_dev *dev;
4725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4726 dev = &rte_eth_devices[port_id];
4728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4729 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4733 rte_eth_timesync_disable(uint16_t port_id)
4735 struct rte_eth_dev *dev;
4737 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4738 dev = &rte_eth_devices[port_id];
4740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4741 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4745 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4748 struct rte_eth_dev *dev;
4750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4751 dev = &rte_eth_devices[port_id];
4753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4754 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4755 (dev, timestamp, flags));
4759 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4760 struct timespec *timestamp)
4762 struct rte_eth_dev *dev;
4764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4765 dev = &rte_eth_devices[port_id];
4767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4768 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4773 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4775 struct rte_eth_dev *dev;
4777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4778 dev = &rte_eth_devices[port_id];
4780 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4781 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4786 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4788 struct rte_eth_dev *dev;
4790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4791 dev = &rte_eth_devices[port_id];
4793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4794 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4799 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4801 struct rte_eth_dev *dev;
4803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4804 dev = &rte_eth_devices[port_id];
4806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4807 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4812 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4814 struct rte_eth_dev *dev;
4816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4817 dev = &rte_eth_devices[port_id];
4819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4820 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4824 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4826 struct rte_eth_dev *dev;
4828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4830 dev = &rte_eth_devices[port_id];
4831 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4832 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4836 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4838 struct rte_eth_dev *dev;
4840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4842 dev = &rte_eth_devices[port_id];
4843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4844 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4848 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4850 struct rte_eth_dev *dev;
4852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4854 dev = &rte_eth_devices[port_id];
4855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4856 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4860 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4862 struct rte_eth_dev *dev;
4864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4866 dev = &rte_eth_devices[port_id];
4867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4868 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4872 rte_eth_dev_get_module_info(uint16_t port_id,
4873 struct rte_eth_dev_module_info *modinfo)
4875 struct rte_eth_dev *dev;
4877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4879 dev = &rte_eth_devices[port_id];
4880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4881 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4885 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4886 struct rte_dev_eeprom_info *info)
4888 struct rte_eth_dev *dev;
4890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4892 dev = &rte_eth_devices[port_id];
4893 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4894 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4898 rte_eth_dev_get_dcb_info(uint16_t port_id,
4899 struct rte_eth_dcb_info *dcb_info)
4901 struct rte_eth_dev *dev;
4903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4905 dev = &rte_eth_devices[port_id];
4906 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4909 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4913 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4914 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4916 struct rte_eth_dev *dev;
4918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4919 if (l2_tunnel == NULL) {
4920 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4924 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4925 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4929 dev = &rte_eth_devices[port_id];
4930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4932 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4937 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4938 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4942 struct rte_eth_dev *dev;
4944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4946 if (l2_tunnel == NULL) {
4947 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4951 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4952 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4957 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4961 dev = &rte_eth_devices[port_id];
4962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4964 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4965 l2_tunnel, mask, en));
4969 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4970 const struct rte_eth_desc_lim *desc_lim)
4972 if (desc_lim->nb_align != 0)
4973 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4975 if (desc_lim->nb_max != 0)
4976 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4978 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4982 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4983 uint16_t *nb_rx_desc,
4984 uint16_t *nb_tx_desc)
4986 struct rte_eth_dev_info dev_info;
4989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4991 ret = rte_eth_dev_info_get(port_id, &dev_info);
4995 if (nb_rx_desc != NULL)
4996 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4998 if (nb_tx_desc != NULL)
4999 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5005 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5006 struct rte_eth_hairpin_cap *cap)
5008 struct rte_eth_dev *dev;
5010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5012 dev = &rte_eth_devices[port_id];
5013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5014 memset(cap, 0, sizeof(*cap));
5015 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5019 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5021 if (dev->data->rx_queue_state[queue_id] ==
5022 RTE_ETH_QUEUE_STATE_HAIRPIN)
5028 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5030 if (dev->data->tx_queue_state[queue_id] ==
5031 RTE_ETH_QUEUE_STATE_HAIRPIN)
5037 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5039 struct rte_eth_dev *dev;
5041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5046 dev = &rte_eth_devices[port_id];
5048 if (*dev->dev_ops->pool_ops_supported == NULL)
5049 return 1; /* all pools are supported */
5051 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5055 * A set of values to describe the possible states of a switch domain.
5057 enum rte_eth_switch_domain_state {
5058 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5059 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5063 * Array of switch domains available for allocation. Array is sized to
5064 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5065 * ethdev ports in a single process.
5067 static struct rte_eth_dev_switch {
5068 enum rte_eth_switch_domain_state state;
5069 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5072 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5076 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5078 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5079 if (rte_eth_switch_domains[i].state ==
5080 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5081 rte_eth_switch_domains[i].state =
5082 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5092 rte_eth_switch_domain_free(uint16_t domain_id)
5094 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5095 domain_id >= RTE_MAX_ETHPORTS)
5098 if (rte_eth_switch_domains[domain_id].state !=
5099 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5102 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5108 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5111 struct rte_kvargs_pair *pair;
5114 arglist->str = strdup(str_in);
5115 if (arglist->str == NULL)
5118 letter = arglist->str;
5121 pair = &arglist->pairs[0];
5124 case 0: /* Initial */
5127 else if (*letter == '\0')
5134 case 1: /* Parsing key */
5135 if (*letter == '=') {
5137 pair->value = letter + 1;
5139 } else if (*letter == ',' || *letter == '\0')
5144 case 2: /* Parsing value */
5147 else if (*letter == ',') {
5150 pair = &arglist->pairs[arglist->count];
5152 } else if (*letter == '\0') {
5155 pair = &arglist->pairs[arglist->count];
5160 case 3: /* Parsing list */
5163 else if (*letter == '\0')
5172 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5174 struct rte_kvargs args;
5175 struct rte_kvargs_pair *pair;
5179 memset(eth_da, 0, sizeof(*eth_da));
5181 result = rte_eth_devargs_tokenise(&args, dargs);
5185 for (i = 0; i < args.count; i++) {
5186 pair = &args.pairs[i];
5187 if (strcmp("representor", pair->key) == 0) {
5188 result = rte_eth_devargs_parse_list(pair->value,
5189 rte_eth_devargs_parse_representor_ports,
5204 handle_port_list(const char *cmd __rte_unused,
5205 const char *params __rte_unused,
5206 struct rte_tel_data *d)
5210 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5211 RTE_ETH_FOREACH_DEV(port_id)
5212 rte_tel_data_add_array_int(d, port_id);
5217 handle_port_xstats(const char *cmd __rte_unused,
5219 struct rte_tel_data *d)
5221 struct rte_eth_xstat *eth_xstats;
5222 struct rte_eth_xstat_name *xstat_names;
5223 int port_id, num_xstats;
5226 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5229 port_id = atoi(params);
5230 if (!rte_eth_dev_is_valid_port(port_id))
5233 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5237 /* use one malloc for both names and stats */
5238 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5239 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5240 if (eth_xstats == NULL)
5242 xstat_names = (void *)ð_xstats[num_xstats];
5244 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5245 if (ret < 0 || ret > num_xstats) {
5250 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5251 if (ret < 0 || ret > num_xstats) {
5256 rte_tel_data_start_dict(d);
5257 for (i = 0; i < num_xstats; i++)
5258 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5259 eth_xstats[i].value);
5264 handle_port_link_status(const char *cmd __rte_unused,
5266 struct rte_tel_data *d)
5268 static const char *status_str = "status";
5270 struct rte_eth_link link;
5272 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5275 port_id = atoi(params);
5276 if (!rte_eth_dev_is_valid_port(port_id))
5279 ret = rte_eth_link_get(port_id, &link);
5283 rte_tel_data_start_dict(d);
5284 if (!link.link_status) {
5285 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5288 rte_tel_data_add_dict_string(d, status_str, "UP");
5289 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5290 rte_tel_data_add_dict_string(d, "duplex",
5291 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5292 "full-duplex" : "half-duplex");
5296 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5298 RTE_INIT(ethdev_init_telemetry)
5300 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5301 "Returns list of available ethdev ports. Takes no parameters");
5302 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5303 "Returns the extended stats for a port. Parameters: int port_id");
5304 rte_telemetry_register_cmd("/ethdev/link_status",
5305 handle_port_link_status,
5306 "Returns the link status for a port. Parameters: int port_id");