1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
505 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
511 * Attach to a port already registered by the primary process, which
512 * makes sure that the same device would have the same port id both
513 * in the primary and secondary process.
516 rte_eth_dev_attach_secondary(const char *name)
519 struct rte_eth_dev *eth_dev = NULL;
521 rte_eth_dev_shared_data_prepare();
523 /* Synchronize port attachment to primary port creation and release. */
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
530 if (i == RTE_MAX_ETHPORTS) {
532 "Device %s is not driven by the primary process\n",
535 eth_dev = eth_dev_get(i);
536 RTE_ASSERT(eth_dev->data->port_id == i);
539 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
549 rte_eth_dev_shared_data_prepare();
551 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552 rte_eth_dev_callback_process(eth_dev,
553 RTE_ETH_EVENT_DESTROY, NULL);
555 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557 eth_dev->state = RTE_ETH_DEV_UNUSED;
558 eth_dev->device = NULL;
559 eth_dev->intr_handle = NULL;
561 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
562 rte_free(eth_dev->data->rx_queues);
563 rte_free(eth_dev->data->tx_queues);
564 rte_free(eth_dev->data->mac_addrs);
565 rte_free(eth_dev->data->hash_mac_addrs);
566 rte_free(eth_dev->data->dev_private);
567 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
570 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
576 rte_eth_dev_is_valid_port(uint16_t port_id)
578 if (port_id >= RTE_MAX_ETHPORTS ||
579 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
586 rte_eth_is_valid_owner_id(uint64_t owner_id)
588 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
589 rte_eth_dev_shared_data->next_owner_id <= owner_id)
595 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
597 port_id = rte_eth_find_next(port_id);
598 while (port_id < RTE_MAX_ETHPORTS &&
599 rte_eth_devices[port_id].data->owner.id != owner_id)
600 port_id = rte_eth_find_next(port_id + 1);
606 rte_eth_dev_owner_new(uint64_t *owner_id)
608 rte_eth_dev_shared_data_prepare();
610 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
612 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
614 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
619 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
620 const struct rte_eth_dev_owner *new_owner)
622 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
623 struct rte_eth_dev_owner *port_owner;
625 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
626 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
631 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
632 !rte_eth_is_valid_owner_id(old_owner_id)) {
634 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
635 old_owner_id, new_owner->id);
639 port_owner = &rte_eth_devices[port_id].data->owner;
640 if (port_owner->id != old_owner_id) {
642 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
643 port_id, port_owner->name, port_owner->id);
647 /* can not truncate (same structure) */
648 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
650 port_owner->id = new_owner->id;
652 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
653 port_id, new_owner->name, new_owner->id);
659 rte_eth_dev_owner_set(const uint16_t port_id,
660 const struct rte_eth_dev_owner *owner)
664 rte_eth_dev_shared_data_prepare();
666 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
668 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
670 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
675 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
677 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
678 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
681 rte_eth_dev_shared_data_prepare();
683 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
685 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
687 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
692 rte_eth_dev_owner_delete(const uint64_t owner_id)
697 rte_eth_dev_shared_data_prepare();
699 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
701 if (rte_eth_is_valid_owner_id(owner_id)) {
702 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
703 if (rte_eth_devices[port_id].data->owner.id == owner_id)
704 memset(&rte_eth_devices[port_id].data->owner, 0,
705 sizeof(struct rte_eth_dev_owner));
706 RTE_ETHDEV_LOG(NOTICE,
707 "All port owners owned by %016"PRIx64" identifier have removed\n",
711 "Invalid owner id=%016"PRIx64"\n",
716 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
722 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
725 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
727 rte_eth_dev_shared_data_prepare();
729 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
731 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
732 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
736 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
739 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
744 rte_eth_dev_socket_id(uint16_t port_id)
746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
747 return rte_eth_devices[port_id].data->numa_node;
751 rte_eth_dev_get_sec_ctx(uint16_t port_id)
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
754 return rte_eth_devices[port_id].security_ctx;
758 rte_eth_dev_count_avail(void)
765 RTE_ETH_FOREACH_DEV(p)
772 rte_eth_dev_count_total(void)
774 uint16_t port, count = 0;
776 RTE_ETH_FOREACH_VALID_DEV(port)
783 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
790 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
794 /* shouldn't check 'rte_eth_devices[i].data',
795 * because it might be overwritten by VDEV PMD */
796 tmp = rte_eth_dev_shared_data->data[port_id].name;
802 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
807 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
811 RTE_ETH_FOREACH_VALID_DEV(pid)
812 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
821 eth_err(uint16_t port_id, int ret)
825 if (rte_eth_dev_is_removed(port_id))
831 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
833 uint16_t old_nb_queues = dev->data->nb_rx_queues;
837 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
838 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
839 sizeof(dev->data->rx_queues[0]) * nb_queues,
840 RTE_CACHE_LINE_SIZE);
841 if (dev->data->rx_queues == NULL) {
842 dev->data->nb_rx_queues = 0;
845 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
848 rxq = dev->data->rx_queues;
850 for (i = nb_queues; i < old_nb_queues; i++)
851 (*dev->dev_ops->rx_queue_release)(rxq[i]);
852 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
853 RTE_CACHE_LINE_SIZE);
856 if (nb_queues > old_nb_queues) {
857 uint16_t new_qs = nb_queues - old_nb_queues;
859 memset(rxq + old_nb_queues, 0,
860 sizeof(rxq[0]) * new_qs);
863 dev->data->rx_queues = rxq;
865 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
868 rxq = dev->data->rx_queues;
870 for (i = nb_queues; i < old_nb_queues; i++)
871 (*dev->dev_ops->rx_queue_release)(rxq[i]);
873 rte_free(dev->data->rx_queues);
874 dev->data->rx_queues = NULL;
876 dev->data->nb_rx_queues = nb_queues;
881 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
883 struct rte_eth_dev *dev;
885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
887 dev = &rte_eth_devices[port_id];
888 if (!dev->data->dev_started) {
890 "Port %u must be started before start any queue\n",
895 if (rx_queue_id >= dev->data->nb_rx_queues) {
896 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
902 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
904 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
905 rx_queue_id, port_id);
909 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
911 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
912 rx_queue_id, port_id);
916 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
922 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
924 struct rte_eth_dev *dev;
926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
928 dev = &rte_eth_devices[port_id];
929 if (rx_queue_id >= dev->data->nb_rx_queues) {
930 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
934 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
936 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
938 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
939 rx_queue_id, port_id);
943 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
945 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
946 rx_queue_id, port_id);
950 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
955 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
957 struct rte_eth_dev *dev;
959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
961 dev = &rte_eth_devices[port_id];
962 if (!dev->data->dev_started) {
964 "Port %u must be started before start any queue\n",
969 if (tx_queue_id >= dev->data->nb_tx_queues) {
970 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
976 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
978 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
979 tx_queue_id, port_id);
983 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
985 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
986 tx_queue_id, port_id);
990 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
994 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
996 struct rte_eth_dev *dev;
998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1000 dev = &rte_eth_devices[port_id];
1001 if (tx_queue_id >= dev->data->nb_tx_queues) {
1002 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1008 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1009 RTE_ETHDEV_LOG(INFO,
1010 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1011 tx_queue_id, port_id);
1015 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1016 RTE_ETHDEV_LOG(INFO,
1017 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1018 tx_queue_id, port_id);
1022 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1027 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1029 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1033 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1034 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1035 sizeof(dev->data->tx_queues[0]) * nb_queues,
1036 RTE_CACHE_LINE_SIZE);
1037 if (dev->data->tx_queues == NULL) {
1038 dev->data->nb_tx_queues = 0;
1041 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1044 txq = dev->data->tx_queues;
1046 for (i = nb_queues; i < old_nb_queues; i++)
1047 (*dev->dev_ops->tx_queue_release)(txq[i]);
1048 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1049 RTE_CACHE_LINE_SIZE);
1052 if (nb_queues > old_nb_queues) {
1053 uint16_t new_qs = nb_queues - old_nb_queues;
1055 memset(txq + old_nb_queues, 0,
1056 sizeof(txq[0]) * new_qs);
1059 dev->data->tx_queues = txq;
1061 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1064 txq = dev->data->tx_queues;
1066 for (i = nb_queues; i < old_nb_queues; i++)
1067 (*dev->dev_ops->tx_queue_release)(txq[i]);
1069 rte_free(dev->data->tx_queues);
1070 dev->data->tx_queues = NULL;
1072 dev->data->nb_tx_queues = nb_queues;
1077 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1080 case ETH_SPEED_NUM_10M:
1081 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1082 case ETH_SPEED_NUM_100M:
1083 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1084 case ETH_SPEED_NUM_1G:
1085 return ETH_LINK_SPEED_1G;
1086 case ETH_SPEED_NUM_2_5G:
1087 return ETH_LINK_SPEED_2_5G;
1088 case ETH_SPEED_NUM_5G:
1089 return ETH_LINK_SPEED_5G;
1090 case ETH_SPEED_NUM_10G:
1091 return ETH_LINK_SPEED_10G;
1092 case ETH_SPEED_NUM_20G:
1093 return ETH_LINK_SPEED_20G;
1094 case ETH_SPEED_NUM_25G:
1095 return ETH_LINK_SPEED_25G;
1096 case ETH_SPEED_NUM_40G:
1097 return ETH_LINK_SPEED_40G;
1098 case ETH_SPEED_NUM_50G:
1099 return ETH_LINK_SPEED_50G;
1100 case ETH_SPEED_NUM_56G:
1101 return ETH_LINK_SPEED_56G;
1102 case ETH_SPEED_NUM_100G:
1103 return ETH_LINK_SPEED_100G;
1104 case ETH_SPEED_NUM_200G:
1105 return ETH_LINK_SPEED_200G;
1112 rte_eth_dev_rx_offload_name(uint64_t offload)
1114 const char *name = "UNKNOWN";
1117 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1118 if (offload == rte_rx_offload_names[i].offload) {
1119 name = rte_rx_offload_names[i].name;
1128 rte_eth_dev_tx_offload_name(uint64_t offload)
1130 const char *name = "UNKNOWN";
1133 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1134 if (offload == rte_tx_offload_names[i].offload) {
1135 name = rte_tx_offload_names[i].name;
1144 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1145 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1149 if (dev_info_size == 0) {
1150 if (config_size != max_rx_pkt_len) {
1151 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1152 " %u != %u is not allowed\n",
1153 port_id, config_size, max_rx_pkt_len);
1156 } else if (config_size > dev_info_size) {
1157 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1158 "> max allowed value %u\n", port_id, config_size,
1161 } else if (config_size < RTE_ETHER_MIN_LEN) {
1162 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1163 "< min allowed value %u\n", port_id, config_size,
1164 (unsigned int)RTE_ETHER_MIN_LEN);
1171 * Validate offloads that are requested through rte_eth_dev_configure against
1172 * the offloads successfully set by the ethernet device.
1175 * The port identifier of the Ethernet device.
1176 * @param req_offloads
1177 * The offloads that have been requested through `rte_eth_dev_configure`.
1178 * @param set_offloads
1179 * The offloads successfully set by the ethernet device.
1180 * @param offload_type
1181 * The offload type i.e. Rx/Tx string.
1182 * @param offload_name
1183 * The function that prints the offload name.
1185 * - (0) if validation successful.
1186 * - (-EINVAL) if requested offload has been silently disabled.
1190 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1191 uint64_t set_offloads, const char *offload_type,
1192 const char *(*offload_name)(uint64_t))
1194 uint64_t offloads_diff = req_offloads ^ set_offloads;
1198 while (offloads_diff != 0) {
1199 /* Check if any offload is requested but not enabled. */
1200 offload = 1ULL << __builtin_ctzll(offloads_diff);
1201 if (offload & req_offloads) {
1203 "Port %u failed to enable %s offload %s\n",
1204 port_id, offload_type, offload_name(offload));
1208 /* Check if offload couldn't be disabled. */
1209 if (offload & set_offloads) {
1210 RTE_ETHDEV_LOG(DEBUG,
1211 "Port %u %s offload %s is not requested but enabled\n",
1212 port_id, offload_type, offload_name(offload));
1215 offloads_diff &= ~offload;
1222 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1223 const struct rte_eth_conf *dev_conf)
1225 struct rte_eth_dev *dev;
1226 struct rte_eth_dev_info dev_info;
1227 struct rte_eth_conf orig_conf;
1231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1233 dev = &rte_eth_devices[port_id];
1235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1237 if (dev->data->dev_started) {
1239 "Port %u must be stopped to allow configuration\n",
1244 /* Store original config, as rollback required on failure */
1245 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1248 * Copy the dev_conf parameter into the dev structure.
1249 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1251 if (dev_conf != &dev->data->dev_conf)
1252 memcpy(&dev->data->dev_conf, dev_conf,
1253 sizeof(dev->data->dev_conf));
1255 ret = rte_eth_dev_info_get(port_id, &dev_info);
1259 /* If number of queues specified by application for both Rx and Tx is
1260 * zero, use driver preferred values. This cannot be done individually
1261 * as it is valid for either Tx or Rx (but not both) to be zero.
1262 * If driver does not provide any preferred valued, fall back on
1265 if (nb_rx_q == 0 && nb_tx_q == 0) {
1266 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1268 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1269 nb_tx_q = dev_info.default_txportconf.nb_queues;
1271 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1274 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1276 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1277 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1282 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1284 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1285 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1291 * Check that the numbers of RX and TX queues are not greater
1292 * than the maximum number of RX and TX queues supported by the
1293 * configured device.
1295 if (nb_rx_q > dev_info.max_rx_queues) {
1296 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1297 port_id, nb_rx_q, dev_info.max_rx_queues);
1302 if (nb_tx_q > dev_info.max_tx_queues) {
1303 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1304 port_id, nb_tx_q, dev_info.max_tx_queues);
1309 /* Check that the device supports requested interrupts */
1310 if ((dev_conf->intr_conf.lsc == 1) &&
1311 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1312 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1313 dev->device->driver->name);
1317 if ((dev_conf->intr_conf.rmv == 1) &&
1318 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1319 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1320 dev->device->driver->name);
1326 * If jumbo frames are enabled, check that the maximum RX packet
1327 * length is supported by the configured device.
1329 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1330 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1332 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1333 port_id, dev_conf->rxmode.max_rx_pkt_len,
1334 dev_info.max_rx_pktlen);
1337 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1339 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1340 port_id, dev_conf->rxmode.max_rx_pkt_len,
1341 (unsigned int)RTE_ETHER_MIN_LEN);
1346 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1347 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1348 /* Use default value */
1349 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1354 * If LRO is enabled, check that the maximum aggregated packet
1355 * size is supported by the configured device.
1357 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1358 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1359 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1360 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1361 ret = check_lro_pkt_size(port_id,
1362 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1363 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1364 dev_info.max_lro_pkt_size);
1369 /* Any requested offloading must be within its device capabilities */
1370 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1371 dev_conf->rxmode.offloads) {
1373 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1374 "capabilities 0x%"PRIx64" in %s()\n",
1375 port_id, dev_conf->rxmode.offloads,
1376 dev_info.rx_offload_capa,
1381 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1382 dev_conf->txmode.offloads) {
1384 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1385 "capabilities 0x%"PRIx64" in %s()\n",
1386 port_id, dev_conf->txmode.offloads,
1387 dev_info.tx_offload_capa,
1393 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1394 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1396 /* Check that device supports requested rss hash functions. */
1397 if ((dev_info.flow_type_rss_offloads |
1398 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1399 dev_info.flow_type_rss_offloads) {
1401 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1402 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1403 dev_info.flow_type_rss_offloads);
1408 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1409 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1410 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1412 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1414 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1420 * Setup new number of RX/TX queues and reconfigure device.
1422 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1425 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1431 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1434 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1436 rte_eth_dev_rx_queue_config(dev, 0);
1441 diag = (*dev->dev_ops->dev_configure)(dev);
1443 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1445 ret = eth_err(port_id, diag);
1449 /* Initialize Rx profiling if enabled at compilation time. */
1450 diag = __rte_eth_dev_profile_init(port_id, dev);
1452 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1454 ret = eth_err(port_id, diag);
1458 /* Validate Rx offloads. */
1459 diag = validate_offloads(port_id,
1460 dev_conf->rxmode.offloads,
1461 dev->data->dev_conf.rxmode.offloads, "Rx",
1462 rte_eth_dev_rx_offload_name);
1468 /* Validate Tx offloads. */
1469 diag = validate_offloads(port_id,
1470 dev_conf->txmode.offloads,
1471 dev->data->dev_conf.txmode.offloads, "Tx",
1472 rte_eth_dev_tx_offload_name);
1478 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1481 rte_eth_dev_rx_queue_config(dev, 0);
1482 rte_eth_dev_tx_queue_config(dev, 0);
1484 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1486 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1491 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1493 if (dev->data->dev_started) {
1494 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1495 dev->data->port_id);
1499 rte_eth_dev_rx_queue_config(dev, 0);
1500 rte_eth_dev_tx_queue_config(dev, 0);
1502 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1506 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1507 struct rte_eth_dev_info *dev_info)
1509 struct rte_ether_addr *addr;
1514 /* replay MAC address configuration including default MAC */
1515 addr = &dev->data->mac_addrs[0];
1516 if (*dev->dev_ops->mac_addr_set != NULL)
1517 (*dev->dev_ops->mac_addr_set)(dev, addr);
1518 else if (*dev->dev_ops->mac_addr_add != NULL)
1519 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1521 if (*dev->dev_ops->mac_addr_add != NULL) {
1522 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1523 addr = &dev->data->mac_addrs[i];
1525 /* skip zero address */
1526 if (rte_is_zero_ether_addr(addr))
1530 pool_mask = dev->data->mac_pool_sel[i];
1533 if (pool_mask & 1ULL)
1534 (*dev->dev_ops->mac_addr_add)(dev,
1538 } while (pool_mask);
1544 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1545 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1549 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1550 rte_eth_dev_mac_restore(dev, dev_info);
1552 /* replay promiscuous configuration */
1554 * use callbacks directly since we don't need port_id check and
1555 * would like to bypass the same value set
1557 if (rte_eth_promiscuous_get(port_id) == 1 &&
1558 *dev->dev_ops->promiscuous_enable != NULL) {
1559 ret = eth_err(port_id,
1560 (*dev->dev_ops->promiscuous_enable)(dev));
1561 if (ret != 0 && ret != -ENOTSUP) {
1563 "Failed to enable promiscuous mode for device (port %u): %s\n",
1564 port_id, rte_strerror(-ret));
1567 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1568 *dev->dev_ops->promiscuous_disable != NULL) {
1569 ret = eth_err(port_id,
1570 (*dev->dev_ops->promiscuous_disable)(dev));
1571 if (ret != 0 && ret != -ENOTSUP) {
1573 "Failed to disable promiscuous mode for device (port %u): %s\n",
1574 port_id, rte_strerror(-ret));
1579 /* replay all multicast configuration */
1581 * use callbacks directly since we don't need port_id check and
1582 * would like to bypass the same value set
1584 if (rte_eth_allmulticast_get(port_id) == 1 &&
1585 *dev->dev_ops->allmulticast_enable != NULL) {
1586 ret = eth_err(port_id,
1587 (*dev->dev_ops->allmulticast_enable)(dev));
1588 if (ret != 0 && ret != -ENOTSUP) {
1590 "Failed to enable allmulticast mode for device (port %u): %s\n",
1591 port_id, rte_strerror(-ret));
1594 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1595 *dev->dev_ops->allmulticast_disable != NULL) {
1596 ret = eth_err(port_id,
1597 (*dev->dev_ops->allmulticast_disable)(dev));
1598 if (ret != 0 && ret != -ENOTSUP) {
1600 "Failed to disable allmulticast mode for device (port %u): %s\n",
1601 port_id, rte_strerror(-ret));
1610 rte_eth_dev_start(uint16_t port_id)
1612 struct rte_eth_dev *dev;
1613 struct rte_eth_dev_info dev_info;
1617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1619 dev = &rte_eth_devices[port_id];
1621 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1623 if (dev->data->dev_started != 0) {
1624 RTE_ETHDEV_LOG(INFO,
1625 "Device with port_id=%"PRIu16" already started\n",
1630 ret = rte_eth_dev_info_get(port_id, &dev_info);
1634 /* Lets restore MAC now if device does not support live change */
1635 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1636 rte_eth_dev_mac_restore(dev, &dev_info);
1638 diag = (*dev->dev_ops->dev_start)(dev);
1640 dev->data->dev_started = 1;
1642 return eth_err(port_id, diag);
1644 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1647 "Error during restoring configuration for device (port %u): %s\n",
1648 port_id, rte_strerror(-ret));
1649 rte_eth_dev_stop(port_id);
1653 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1655 (*dev->dev_ops->link_update)(dev, 0);
1658 rte_ethdev_trace_start(port_id);
1663 rte_eth_dev_stop(uint16_t port_id)
1665 struct rte_eth_dev *dev;
1667 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1668 dev = &rte_eth_devices[port_id];
1670 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1672 if (dev->data->dev_started == 0) {
1673 RTE_ETHDEV_LOG(INFO,
1674 "Device with port_id=%"PRIu16" already stopped\n",
1679 dev->data->dev_started = 0;
1680 (*dev->dev_ops->dev_stop)(dev);
1681 rte_ethdev_trace_stop(port_id);
1685 rte_eth_dev_set_link_up(uint16_t port_id)
1687 struct rte_eth_dev *dev;
1689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1691 dev = &rte_eth_devices[port_id];
1693 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1694 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1698 rte_eth_dev_set_link_down(uint16_t port_id)
1700 struct rte_eth_dev *dev;
1702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1704 dev = &rte_eth_devices[port_id];
1706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1707 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1711 rte_eth_dev_close(uint16_t port_id)
1713 struct rte_eth_dev *dev;
1715 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1716 dev = &rte_eth_devices[port_id];
1718 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1719 dev->data->dev_started = 0;
1720 (*dev->dev_ops->dev_close)(dev);
1722 rte_ethdev_trace_close(port_id);
1723 /* check behaviour flag - temporary for PMD migration */
1724 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1725 /* new behaviour: send event + reset state + free all data */
1726 rte_eth_dev_release_port(dev);
1729 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1730 "The driver %s should migrate to the new behaviour.\n",
1731 dev->device->driver->name);
1732 /* old behaviour: only free queue arrays */
1733 dev->data->nb_rx_queues = 0;
1734 rte_free(dev->data->rx_queues);
1735 dev->data->rx_queues = NULL;
1736 dev->data->nb_tx_queues = 0;
1737 rte_free(dev->data->tx_queues);
1738 dev->data->tx_queues = NULL;
1742 rte_eth_dev_reset(uint16_t port_id)
1744 struct rte_eth_dev *dev;
1747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1748 dev = &rte_eth_devices[port_id];
1750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1752 rte_eth_dev_stop(port_id);
1753 ret = dev->dev_ops->dev_reset(dev);
1755 return eth_err(port_id, ret);
1759 rte_eth_dev_is_removed(uint16_t port_id)
1761 struct rte_eth_dev *dev;
1764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1766 dev = &rte_eth_devices[port_id];
1768 if (dev->state == RTE_ETH_DEV_REMOVED)
1771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1773 ret = dev->dev_ops->is_removed(dev);
1775 /* Device is physically removed. */
1776 dev->state = RTE_ETH_DEV_REMOVED;
1782 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1783 uint16_t nb_rx_desc, unsigned int socket_id,
1784 const struct rte_eth_rxconf *rx_conf,
1785 struct rte_mempool *mp)
1788 uint32_t mbp_buf_size;
1789 struct rte_eth_dev *dev;
1790 struct rte_eth_dev_info dev_info;
1791 struct rte_eth_rxconf local_conf;
1794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1796 dev = &rte_eth_devices[port_id];
1797 if (rx_queue_id >= dev->data->nb_rx_queues) {
1798 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1803 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1810 * Check the size of the mbuf data buffer.
1811 * This value must be provided in the private data of the memory pool.
1812 * First check that the memory pool has a valid private data.
1814 ret = rte_eth_dev_info_get(port_id, &dev_info);
1818 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1819 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1820 mp->name, (int)mp->private_data_size,
1821 (int)sizeof(struct rte_pktmbuf_pool_private));
1824 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1826 if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1828 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1829 mp->name, (int)mbp_buf_size,
1830 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1831 (int)RTE_PKTMBUF_HEADROOM,
1832 (int)dev_info.min_rx_bufsize);
1836 /* Use default specified by driver, if nb_rx_desc is zero */
1837 if (nb_rx_desc == 0) {
1838 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1839 /* If driver default is also zero, fall back on EAL default */
1840 if (nb_rx_desc == 0)
1841 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1844 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1845 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1846 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1849 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1850 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1851 dev_info.rx_desc_lim.nb_min,
1852 dev_info.rx_desc_lim.nb_align);
1856 if (dev->data->dev_started &&
1857 !(dev_info.dev_capa &
1858 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1861 if (dev->data->dev_started &&
1862 (dev->data->rx_queue_state[rx_queue_id] !=
1863 RTE_ETH_QUEUE_STATE_STOPPED))
1866 rxq = dev->data->rx_queues;
1867 if (rxq[rx_queue_id]) {
1868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1870 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1871 rxq[rx_queue_id] = NULL;
1874 if (rx_conf == NULL)
1875 rx_conf = &dev_info.default_rxconf;
1877 local_conf = *rx_conf;
1880 * If an offloading has already been enabled in
1881 * rte_eth_dev_configure(), it has been enabled on all queues,
1882 * so there is no need to enable it in this queue again.
1883 * The local_conf.offloads input to underlying PMD only carries
1884 * those offloadings which are only enabled on this queue and
1885 * not enabled on all queues.
1887 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1890 * New added offloadings for this queue are those not enabled in
1891 * rte_eth_dev_configure() and they must be per-queue type.
1892 * A pure per-port offloading can't be enabled on a queue while
1893 * disabled on another queue. A pure per-port offloading can't
1894 * be enabled for any queue as new added one if it hasn't been
1895 * enabled in rte_eth_dev_configure().
1897 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1898 local_conf.offloads) {
1900 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1901 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1902 port_id, rx_queue_id, local_conf.offloads,
1903 dev_info.rx_queue_offload_capa,
1909 * If LRO is enabled, check that the maximum aggregated packet
1910 * size is supported by the configured device.
1912 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1913 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1914 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1915 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1916 int ret = check_lro_pkt_size(port_id,
1917 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1918 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1919 dev_info.max_lro_pkt_size);
1924 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1925 socket_id, &local_conf, mp);
1927 if (!dev->data->min_rx_buf_size ||
1928 dev->data->min_rx_buf_size > mbp_buf_size)
1929 dev->data->min_rx_buf_size = mbp_buf_size;
1932 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1934 return eth_err(port_id, ret);
1938 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1939 uint16_t nb_rx_desc,
1940 const struct rte_eth_hairpin_conf *conf)
1943 struct rte_eth_dev *dev;
1944 struct rte_eth_hairpin_cap cap;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1951 dev = &rte_eth_devices[port_id];
1952 if (rx_queue_id >= dev->data->nb_rx_queues) {
1953 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1956 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1961 /* if nb_rx_desc is zero use max number of desc from the driver. */
1962 if (nb_rx_desc == 0)
1963 nb_rx_desc = cap.max_nb_desc;
1964 if (nb_rx_desc > cap.max_nb_desc) {
1966 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1967 nb_rx_desc, cap.max_nb_desc);
1970 if (conf->peer_count > cap.max_rx_2_tx) {
1972 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1973 conf->peer_count, cap.max_rx_2_tx);
1976 if (conf->peer_count == 0) {
1978 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1982 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1983 cap.max_nb_queues != UINT16_MAX; i++) {
1984 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1987 if (count > cap.max_nb_queues) {
1988 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1992 if (dev->data->dev_started)
1994 rxq = dev->data->rx_queues;
1995 if (rxq[rx_queue_id] != NULL) {
1996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1998 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1999 rxq[rx_queue_id] = NULL;
2001 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2004 dev->data->rx_queue_state[rx_queue_id] =
2005 RTE_ETH_QUEUE_STATE_HAIRPIN;
2006 return eth_err(port_id, ret);
2010 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2011 uint16_t nb_tx_desc, unsigned int socket_id,
2012 const struct rte_eth_txconf *tx_conf)
2014 struct rte_eth_dev *dev;
2015 struct rte_eth_dev_info dev_info;
2016 struct rte_eth_txconf local_conf;
2020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2022 dev = &rte_eth_devices[port_id];
2023 if (tx_queue_id >= dev->data->nb_tx_queues) {
2024 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2030 ret = rte_eth_dev_info_get(port_id, &dev_info);
2034 /* Use default specified by driver, if nb_tx_desc is zero */
2035 if (nb_tx_desc == 0) {
2036 nb_tx_desc = dev_info.default_txportconf.ring_size;
2037 /* If driver default is zero, fall back on EAL default */
2038 if (nb_tx_desc == 0)
2039 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2041 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2042 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2043 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2045 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2046 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2047 dev_info.tx_desc_lim.nb_min,
2048 dev_info.tx_desc_lim.nb_align);
2052 if (dev->data->dev_started &&
2053 !(dev_info.dev_capa &
2054 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2057 if (dev->data->dev_started &&
2058 (dev->data->tx_queue_state[tx_queue_id] !=
2059 RTE_ETH_QUEUE_STATE_STOPPED))
2062 txq = dev->data->tx_queues;
2063 if (txq[tx_queue_id]) {
2064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2066 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2067 txq[tx_queue_id] = NULL;
2070 if (tx_conf == NULL)
2071 tx_conf = &dev_info.default_txconf;
2073 local_conf = *tx_conf;
2076 * If an offloading has already been enabled in
2077 * rte_eth_dev_configure(), it has been enabled on all queues,
2078 * so there is no need to enable it in this queue again.
2079 * The local_conf.offloads input to underlying PMD only carries
2080 * those offloadings which are only enabled on this queue and
2081 * not enabled on all queues.
2083 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2086 * New added offloadings for this queue are those not enabled in
2087 * rte_eth_dev_configure() and they must be per-queue type.
2088 * A pure per-port offloading can't be enabled on a queue while
2089 * disabled on another queue. A pure per-port offloading can't
2090 * be enabled for any queue as new added one if it hasn't been
2091 * enabled in rte_eth_dev_configure().
2093 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2094 local_conf.offloads) {
2096 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2097 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2098 port_id, tx_queue_id, local_conf.offloads,
2099 dev_info.tx_queue_offload_capa,
2104 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2105 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2106 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2110 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2111 uint16_t nb_tx_desc,
2112 const struct rte_eth_hairpin_conf *conf)
2114 struct rte_eth_dev *dev;
2115 struct rte_eth_hairpin_cap cap;
2121 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2122 dev = &rte_eth_devices[port_id];
2123 if (tx_queue_id >= dev->data->nb_tx_queues) {
2124 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2127 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2132 /* if nb_rx_desc is zero use max number of desc from the driver. */
2133 if (nb_tx_desc == 0)
2134 nb_tx_desc = cap.max_nb_desc;
2135 if (nb_tx_desc > cap.max_nb_desc) {
2137 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2138 nb_tx_desc, cap.max_nb_desc);
2141 if (conf->peer_count > cap.max_tx_2_rx) {
2143 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2144 conf->peer_count, cap.max_tx_2_rx);
2147 if (conf->peer_count == 0) {
2149 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2153 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2154 cap.max_nb_queues != UINT16_MAX; i++) {
2155 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2158 if (count > cap.max_nb_queues) {
2159 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2163 if (dev->data->dev_started)
2165 txq = dev->data->tx_queues;
2166 if (txq[tx_queue_id] != NULL) {
2167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2169 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2170 txq[tx_queue_id] = NULL;
2172 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2173 (dev, tx_queue_id, nb_tx_desc, conf);
2175 dev->data->tx_queue_state[tx_queue_id] =
2176 RTE_ETH_QUEUE_STATE_HAIRPIN;
2177 return eth_err(port_id, ret);
2181 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2182 void *userdata __rte_unused)
2186 for (i = 0; i < unsent; i++)
2187 rte_pktmbuf_free(pkts[i]);
2191 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2194 uint64_t *count = userdata;
2197 for (i = 0; i < unsent; i++)
2198 rte_pktmbuf_free(pkts[i]);
2204 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2205 buffer_tx_error_fn cbfn, void *userdata)
2207 buffer->error_callback = cbfn;
2208 buffer->error_userdata = userdata;
2213 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2220 buffer->size = size;
2221 if (buffer->error_callback == NULL) {
2222 ret = rte_eth_tx_buffer_set_err_callback(
2223 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2230 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2232 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2235 /* Validate Input Data. Bail if not valid or not supported. */
2236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2239 /* Call driver to free pending mbufs. */
2240 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2242 return eth_err(port_id, ret);
2246 rte_eth_promiscuous_enable(uint16_t port_id)
2248 struct rte_eth_dev *dev;
2251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2252 dev = &rte_eth_devices[port_id];
2254 if (dev->data->promiscuous == 1)
2257 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2259 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2260 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2262 return eth_err(port_id, diag);
2266 rte_eth_promiscuous_disable(uint16_t port_id)
2268 struct rte_eth_dev *dev;
2271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2272 dev = &rte_eth_devices[port_id];
2274 if (dev->data->promiscuous == 0)
2277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2279 dev->data->promiscuous = 0;
2280 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2282 dev->data->promiscuous = 1;
2284 return eth_err(port_id, diag);
2288 rte_eth_promiscuous_get(uint16_t port_id)
2290 struct rte_eth_dev *dev;
2292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2294 dev = &rte_eth_devices[port_id];
2295 return dev->data->promiscuous;
2299 rte_eth_allmulticast_enable(uint16_t port_id)
2301 struct rte_eth_dev *dev;
2304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2305 dev = &rte_eth_devices[port_id];
2307 if (dev->data->all_multicast == 1)
2310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2311 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2312 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2314 return eth_err(port_id, diag);
2318 rte_eth_allmulticast_disable(uint16_t port_id)
2320 struct rte_eth_dev *dev;
2323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2324 dev = &rte_eth_devices[port_id];
2326 if (dev->data->all_multicast == 0)
2329 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2330 dev->data->all_multicast = 0;
2331 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2333 dev->data->all_multicast = 1;
2335 return eth_err(port_id, diag);
2339 rte_eth_allmulticast_get(uint16_t port_id)
2341 struct rte_eth_dev *dev;
2343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2345 dev = &rte_eth_devices[port_id];
2346 return dev->data->all_multicast;
2350 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2352 struct rte_eth_dev *dev;
2354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2355 dev = &rte_eth_devices[port_id];
2357 if (dev->data->dev_conf.intr_conf.lsc &&
2358 dev->data->dev_started)
2359 rte_eth_linkstatus_get(dev, eth_link);
2361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2362 (*dev->dev_ops->link_update)(dev, 1);
2363 *eth_link = dev->data->dev_link;
2370 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2372 struct rte_eth_dev *dev;
2374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2375 dev = &rte_eth_devices[port_id];
2377 if (dev->data->dev_conf.intr_conf.lsc &&
2378 dev->data->dev_started)
2379 rte_eth_linkstatus_get(dev, eth_link);
2381 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2382 (*dev->dev_ops->link_update)(dev, 0);
2383 *eth_link = dev->data->dev_link;
2390 rte_eth_link_speed_to_str(uint32_t link_speed)
2392 switch (link_speed) {
2393 case ETH_SPEED_NUM_NONE: return "None";
2394 case ETH_SPEED_NUM_10M: return "10 Mbps";
2395 case ETH_SPEED_NUM_100M: return "100 Mbps";
2396 case ETH_SPEED_NUM_1G: return "1 Gbps";
2397 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2398 case ETH_SPEED_NUM_5G: return "5 Gbps";
2399 case ETH_SPEED_NUM_10G: return "10 Gbps";
2400 case ETH_SPEED_NUM_20G: return "20 Gbps";
2401 case ETH_SPEED_NUM_25G: return "25 Gbps";
2402 case ETH_SPEED_NUM_40G: return "40 Gbps";
2403 case ETH_SPEED_NUM_50G: return "50 Gbps";
2404 case ETH_SPEED_NUM_56G: return "56 Gbps";
2405 case ETH_SPEED_NUM_100G: return "100 Gbps";
2406 case ETH_SPEED_NUM_200G: return "200 Gbps";
2407 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2408 default: return "Invalid";
2413 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2415 if (eth_link->link_status == ETH_LINK_DOWN)
2416 return snprintf(str, len, "Link down");
2418 return snprintf(str, len, "Link up at %s %s %s",
2419 rte_eth_link_speed_to_str(eth_link->link_speed),
2420 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2422 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2423 "Autoneg" : "Fixed");
2427 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2429 struct rte_eth_dev *dev;
2431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2433 dev = &rte_eth_devices[port_id];
2434 memset(stats, 0, sizeof(*stats));
2436 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2437 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2438 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2442 rte_eth_stats_reset(uint16_t port_id)
2444 struct rte_eth_dev *dev;
2447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2448 dev = &rte_eth_devices[port_id];
2450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2451 ret = (*dev->dev_ops->stats_reset)(dev);
2453 return eth_err(port_id, ret);
2455 dev->data->rx_mbuf_alloc_failed = 0;
2461 get_xstats_basic_count(struct rte_eth_dev *dev)
2463 uint16_t nb_rxqs, nb_txqs;
2466 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2467 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2469 count = RTE_NB_STATS;
2470 count += nb_rxqs * RTE_NB_RXQ_STATS;
2471 count += nb_txqs * RTE_NB_TXQ_STATS;
2477 get_xstats_count(uint16_t port_id)
2479 struct rte_eth_dev *dev;
2482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2483 dev = &rte_eth_devices[port_id];
2484 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2485 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2488 return eth_err(port_id, count);
2490 if (dev->dev_ops->xstats_get_names != NULL) {
2491 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2493 return eth_err(port_id, count);
2498 count += get_xstats_basic_count(dev);
2504 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2507 int cnt_xstats, idx_xstat;
2509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2512 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2517 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2522 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2523 if (cnt_xstats < 0) {
2524 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2528 /* Get id-name lookup table */
2529 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2531 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2532 port_id, xstats_names, cnt_xstats, NULL)) {
2533 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2537 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2538 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2547 /* retrieve basic stats names */
2549 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2550 struct rte_eth_xstat_name *xstats_names)
2552 int cnt_used_entries = 0;
2553 uint32_t idx, id_queue;
2556 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2557 strlcpy(xstats_names[cnt_used_entries].name,
2558 rte_stats_strings[idx].name,
2559 sizeof(xstats_names[0].name));
2562 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2563 for (id_queue = 0; id_queue < num_q; id_queue++) {
2564 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2565 snprintf(xstats_names[cnt_used_entries].name,
2566 sizeof(xstats_names[0].name),
2568 id_queue, rte_rxq_stats_strings[idx].name);
2573 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2574 for (id_queue = 0; id_queue < num_q; id_queue++) {
2575 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2576 snprintf(xstats_names[cnt_used_entries].name,
2577 sizeof(xstats_names[0].name),
2579 id_queue, rte_txq_stats_strings[idx].name);
2583 return cnt_used_entries;
2586 /* retrieve ethdev extended statistics names */
2588 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2589 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2592 struct rte_eth_xstat_name *xstats_names_copy;
2593 unsigned int no_basic_stat_requested = 1;
2594 unsigned int no_ext_stat_requested = 1;
2595 unsigned int expected_entries;
2596 unsigned int basic_count;
2597 struct rte_eth_dev *dev;
2601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2602 dev = &rte_eth_devices[port_id];
2604 basic_count = get_xstats_basic_count(dev);
2605 ret = get_xstats_count(port_id);
2608 expected_entries = (unsigned int)ret;
2610 /* Return max number of stats if no ids given */
2613 return expected_entries;
2614 else if (xstats_names && size < expected_entries)
2615 return expected_entries;
2618 if (ids && !xstats_names)
2621 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2622 uint64_t ids_copy[size];
2624 for (i = 0; i < size; i++) {
2625 if (ids[i] < basic_count) {
2626 no_basic_stat_requested = 0;
2631 * Convert ids to xstats ids that PMD knows.
2632 * ids known by user are basic + extended stats.
2634 ids_copy[i] = ids[i] - basic_count;
2637 if (no_basic_stat_requested)
2638 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2639 xstats_names, ids_copy, size);
2642 /* Retrieve all stats */
2644 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2646 if (num_stats < 0 || num_stats > (int)expected_entries)
2649 return expected_entries;
2652 xstats_names_copy = calloc(expected_entries,
2653 sizeof(struct rte_eth_xstat_name));
2655 if (!xstats_names_copy) {
2656 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2661 for (i = 0; i < size; i++) {
2662 if (ids[i] >= basic_count) {
2663 no_ext_stat_requested = 0;
2669 /* Fill xstats_names_copy structure */
2670 if (ids && no_ext_stat_requested) {
2671 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2673 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2676 free(xstats_names_copy);
2682 for (i = 0; i < size; i++) {
2683 if (ids[i] >= expected_entries) {
2684 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2685 free(xstats_names_copy);
2688 xstats_names[i] = xstats_names_copy[ids[i]];
2691 free(xstats_names_copy);
2696 rte_eth_xstats_get_names(uint16_t port_id,
2697 struct rte_eth_xstat_name *xstats_names,
2700 struct rte_eth_dev *dev;
2701 int cnt_used_entries;
2702 int cnt_expected_entries;
2703 int cnt_driver_entries;
2705 cnt_expected_entries = get_xstats_count(port_id);
2706 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2707 (int)size < cnt_expected_entries)
2708 return cnt_expected_entries;
2710 /* port_id checked in get_xstats_count() */
2711 dev = &rte_eth_devices[port_id];
2713 cnt_used_entries = rte_eth_basic_stats_get_names(
2716 if (dev->dev_ops->xstats_get_names != NULL) {
2717 /* If there are any driver-specific xstats, append them
2720 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2722 xstats_names + cnt_used_entries,
2723 size - cnt_used_entries);
2724 if (cnt_driver_entries < 0)
2725 return eth_err(port_id, cnt_driver_entries);
2726 cnt_used_entries += cnt_driver_entries;
2729 return cnt_used_entries;
2734 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2736 struct rte_eth_dev *dev;
2737 struct rte_eth_stats eth_stats;
2738 unsigned int count = 0, i, q;
2739 uint64_t val, *stats_ptr;
2740 uint16_t nb_rxqs, nb_txqs;
2743 ret = rte_eth_stats_get(port_id, ð_stats);
2747 dev = &rte_eth_devices[port_id];
2749 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2750 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2753 for (i = 0; i < RTE_NB_STATS; i++) {
2754 stats_ptr = RTE_PTR_ADD(ð_stats,
2755 rte_stats_strings[i].offset);
2757 xstats[count++].value = val;
2761 for (q = 0; q < nb_rxqs; q++) {
2762 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2763 stats_ptr = RTE_PTR_ADD(ð_stats,
2764 rte_rxq_stats_strings[i].offset +
2765 q * sizeof(uint64_t));
2767 xstats[count++].value = val;
2772 for (q = 0; q < nb_txqs; q++) {
2773 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2774 stats_ptr = RTE_PTR_ADD(ð_stats,
2775 rte_txq_stats_strings[i].offset +
2776 q * sizeof(uint64_t));
2778 xstats[count++].value = val;
2784 /* retrieve ethdev extended statistics */
2786 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2787 uint64_t *values, unsigned int size)
2789 unsigned int no_basic_stat_requested = 1;
2790 unsigned int no_ext_stat_requested = 1;
2791 unsigned int num_xstats_filled;
2792 unsigned int basic_count;
2793 uint16_t expected_entries;
2794 struct rte_eth_dev *dev;
2798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2799 ret = get_xstats_count(port_id);
2802 expected_entries = (uint16_t)ret;
2803 struct rte_eth_xstat xstats[expected_entries];
2804 dev = &rte_eth_devices[port_id];
2805 basic_count = get_xstats_basic_count(dev);
2807 /* Return max number of stats if no ids given */
2810 return expected_entries;
2811 else if (values && size < expected_entries)
2812 return expected_entries;
2818 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2819 unsigned int basic_count = get_xstats_basic_count(dev);
2820 uint64_t ids_copy[size];
2822 for (i = 0; i < size; i++) {
2823 if (ids[i] < basic_count) {
2824 no_basic_stat_requested = 0;
2829 * Convert ids to xstats ids that PMD knows.
2830 * ids known by user are basic + extended stats.
2832 ids_copy[i] = ids[i] - basic_count;
2835 if (no_basic_stat_requested)
2836 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2841 for (i = 0; i < size; i++) {
2842 if (ids[i] >= basic_count) {
2843 no_ext_stat_requested = 0;
2849 /* Fill the xstats structure */
2850 if (ids && no_ext_stat_requested)
2851 ret = rte_eth_basic_stats_get(port_id, xstats);
2853 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2857 num_xstats_filled = (unsigned int)ret;
2859 /* Return all stats */
2861 for (i = 0; i < num_xstats_filled; i++)
2862 values[i] = xstats[i].value;
2863 return expected_entries;
2867 for (i = 0; i < size; i++) {
2868 if (ids[i] >= expected_entries) {
2869 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2872 values[i] = xstats[ids[i]].value;
2878 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2881 struct rte_eth_dev *dev;
2882 unsigned int count = 0, i;
2883 signed int xcount = 0;
2884 uint16_t nb_rxqs, nb_txqs;
2887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2889 dev = &rte_eth_devices[port_id];
2891 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2892 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2894 /* Return generic statistics */
2895 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2896 (nb_txqs * RTE_NB_TXQ_STATS);
2898 /* implemented by the driver */
2899 if (dev->dev_ops->xstats_get != NULL) {
2900 /* Retrieve the xstats from the driver at the end of the
2903 xcount = (*dev->dev_ops->xstats_get)(dev,
2904 xstats ? xstats + count : NULL,
2905 (n > count) ? n - count : 0);
2908 return eth_err(port_id, xcount);
2911 if (n < count + xcount || xstats == NULL)
2912 return count + xcount;
2914 /* now fill the xstats structure */
2915 ret = rte_eth_basic_stats_get(port_id, xstats);
2920 for (i = 0; i < count; i++)
2922 /* add an offset to driver-specific stats */
2923 for ( ; i < count + xcount; i++)
2924 xstats[i].id += count;
2926 return count + xcount;
2929 /* reset ethdev extended statistics */
2931 rte_eth_xstats_reset(uint16_t port_id)
2933 struct rte_eth_dev *dev;
2935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2936 dev = &rte_eth_devices[port_id];
2938 /* implemented by the driver */
2939 if (dev->dev_ops->xstats_reset != NULL)
2940 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2942 /* fallback to default */
2943 return rte_eth_stats_reset(port_id);
2947 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2950 struct rte_eth_dev *dev;
2952 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2954 dev = &rte_eth_devices[port_id];
2956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2958 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2961 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2964 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2967 return (*dev->dev_ops->queue_stats_mapping_set)
2968 (dev, queue_id, stat_idx, is_rx);
2973 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2976 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2977 stat_idx, STAT_QMAP_TX));
2982 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2985 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2986 stat_idx, STAT_QMAP_RX));
2990 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2992 struct rte_eth_dev *dev;
2994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2995 dev = &rte_eth_devices[port_id];
2997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2998 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2999 fw_version, fw_size));
3003 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3005 struct rte_eth_dev *dev;
3006 const struct rte_eth_desc_lim lim = {
3007 .nb_max = UINT16_MAX,
3010 .nb_seg_max = UINT16_MAX,
3011 .nb_mtu_seg_max = UINT16_MAX,
3016 * Init dev_info before port_id check since caller does not have
3017 * return status and does not know if get is successful or not.
3019 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3020 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3023 dev = &rte_eth_devices[port_id];
3025 dev_info->rx_desc_lim = lim;
3026 dev_info->tx_desc_lim = lim;
3027 dev_info->device = dev->device;
3028 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3029 dev_info->max_mtu = UINT16_MAX;
3031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3032 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3034 /* Cleanup already filled in device information */
3035 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3036 return eth_err(port_id, diag);
3039 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3040 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3041 RTE_MAX_QUEUES_PER_PORT);
3042 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3043 RTE_MAX_QUEUES_PER_PORT);
3045 dev_info->driver_name = dev->device->driver->name;
3046 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3047 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3049 dev_info->dev_flags = &dev->data->dev_flags;
3055 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3056 uint32_t *ptypes, int num)
3059 struct rte_eth_dev *dev;
3060 const uint32_t *all_ptypes;
3062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3063 dev = &rte_eth_devices[port_id];
3064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3065 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3070 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3071 if (all_ptypes[i] & ptype_mask) {
3073 ptypes[j] = all_ptypes[i];
3081 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3082 uint32_t *set_ptypes, unsigned int num)
3084 const uint32_t valid_ptype_masks[] = {
3088 RTE_PTYPE_TUNNEL_MASK,
3089 RTE_PTYPE_INNER_L2_MASK,
3090 RTE_PTYPE_INNER_L3_MASK,
3091 RTE_PTYPE_INNER_L4_MASK,
3093 const uint32_t *all_ptypes;
3094 struct rte_eth_dev *dev;
3095 uint32_t unused_mask;
3099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 dev = &rte_eth_devices[port_id];
3102 if (num > 0 && set_ptypes == NULL)
3105 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3106 *dev->dev_ops->dev_ptypes_set == NULL) {
3111 if (ptype_mask == 0) {
3112 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3117 unused_mask = ptype_mask;
3118 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3119 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3120 if (mask && mask != valid_ptype_masks[i]) {
3124 unused_mask &= ~valid_ptype_masks[i];
3132 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3133 if (all_ptypes == NULL) {
3139 * Accommodate as many set_ptypes as possible. If the supplied
3140 * set_ptypes array is insufficient fill it partially.
3142 for (i = 0, j = 0; set_ptypes != NULL &&
3143 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3144 if (ptype_mask & all_ptypes[i]) {
3146 set_ptypes[j] = all_ptypes[i];
3154 if (set_ptypes != NULL && j < num)
3155 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3157 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3161 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3167 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3169 struct rte_eth_dev *dev;
3171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3172 dev = &rte_eth_devices[port_id];
3173 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3179 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3181 struct rte_eth_dev *dev;
3183 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3185 dev = &rte_eth_devices[port_id];
3186 *mtu = dev->data->mtu;
3191 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3194 struct rte_eth_dev_info dev_info;
3195 struct rte_eth_dev *dev;
3197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3198 dev = &rte_eth_devices[port_id];
3199 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3202 * Check if the device supports dev_infos_get, if it does not
3203 * skip min_mtu/max_mtu validation here as this requires values
3204 * that are populated within the call to rte_eth_dev_info_get()
3205 * which relies on dev->dev_ops->dev_infos_get.
3207 if (*dev->dev_ops->dev_infos_get != NULL) {
3208 ret = rte_eth_dev_info_get(port_id, &dev_info);
3212 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3216 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3218 dev->data->mtu = mtu;
3220 return eth_err(port_id, ret);
3224 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3226 struct rte_eth_dev *dev;
3229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3231 if (!(dev->data->dev_conf.rxmode.offloads &
3232 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3233 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3238 if (vlan_id > 4095) {
3239 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3245 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3247 struct rte_vlan_filter_conf *vfc;
3251 vfc = &dev->data->vlan_filter_conf;
3252 vidx = vlan_id / 64;
3253 vbit = vlan_id % 64;
3256 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3258 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3261 return eth_err(port_id, ret);
3265 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3268 struct rte_eth_dev *dev;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3271 dev = &rte_eth_devices[port_id];
3272 if (rx_queue_id >= dev->data->nb_rx_queues) {
3273 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3278 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3284 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3285 enum rte_vlan_type vlan_type,
3288 struct rte_eth_dev *dev;
3290 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3291 dev = &rte_eth_devices[port_id];
3292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3294 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3299 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3301 struct rte_eth_dev_info dev_info;
3302 struct rte_eth_dev *dev;
3306 uint64_t orig_offloads;
3307 uint64_t dev_offloads;
3308 uint64_t new_offloads;
3310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3311 dev = &rte_eth_devices[port_id];
3313 /* save original values in case of failure */
3314 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3315 dev_offloads = orig_offloads;
3317 /* check which option changed by application */
3318 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3319 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3322 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3324 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3325 mask |= ETH_VLAN_STRIP_MASK;
3328 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3329 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3332 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3334 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3335 mask |= ETH_VLAN_FILTER_MASK;
3338 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3339 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3342 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3344 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3345 mask |= ETH_VLAN_EXTEND_MASK;
3348 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3349 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3352 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3354 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3355 mask |= ETH_QINQ_STRIP_MASK;
3362 ret = rte_eth_dev_info_get(port_id, &dev_info);
3366 /* Rx VLAN offloading must be within its device capabilities */
3367 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3368 new_offloads = dev_offloads & ~orig_offloads;
3370 "Ethdev port_id=%u requested new added VLAN offloads "
3371 "0x%" PRIx64 " must be within Rx offloads capabilities "
3372 "0x%" PRIx64 " in %s()\n",
3373 port_id, new_offloads, dev_info.rx_offload_capa,
3378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3379 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3380 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3382 /* hit an error restore original values */
3383 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3386 return eth_err(port_id, ret);
3390 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3392 struct rte_eth_dev *dev;
3393 uint64_t *dev_offloads;
3396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3397 dev = &rte_eth_devices[port_id];
3398 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3400 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3401 ret |= ETH_VLAN_STRIP_OFFLOAD;
3403 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3404 ret |= ETH_VLAN_FILTER_OFFLOAD;
3406 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3407 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3409 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3410 ret |= ETH_QINQ_STRIP_OFFLOAD;
3416 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3418 struct rte_eth_dev *dev;
3420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3421 dev = &rte_eth_devices[port_id];
3422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3424 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3428 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3430 struct rte_eth_dev *dev;
3432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3433 dev = &rte_eth_devices[port_id];
3434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3435 memset(fc_conf, 0, sizeof(*fc_conf));
3436 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3440 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3442 struct rte_eth_dev *dev;
3444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3445 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3446 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3450 dev = &rte_eth_devices[port_id];
3451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3452 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3456 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3457 struct rte_eth_pfc_conf *pfc_conf)
3459 struct rte_eth_dev *dev;
3461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3462 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3463 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3467 dev = &rte_eth_devices[port_id];
3468 /* High water, low water validation are device specific */
3469 if (*dev->dev_ops->priority_flow_ctrl_set)
3470 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3476 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3484 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3485 for (i = 0; i < num; i++) {
3486 if (reta_conf[i].mask)
3494 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3498 uint16_t i, idx, shift;
3504 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3508 for (i = 0; i < reta_size; i++) {
3509 idx = i / RTE_RETA_GROUP_SIZE;
3510 shift = i % RTE_RETA_GROUP_SIZE;
3511 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3512 (reta_conf[idx].reta[shift] >= max_rxq)) {
3514 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3516 reta_conf[idx].reta[shift], max_rxq);
3525 rte_eth_dev_rss_reta_update(uint16_t port_id,
3526 struct rte_eth_rss_reta_entry64 *reta_conf,
3529 struct rte_eth_dev *dev;
3532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3533 /* Check mask bits */
3534 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3538 dev = &rte_eth_devices[port_id];
3540 /* Check entry value */
3541 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3542 dev->data->nb_rx_queues);
3546 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3547 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3552 rte_eth_dev_rss_reta_query(uint16_t port_id,
3553 struct rte_eth_rss_reta_entry64 *reta_conf,
3556 struct rte_eth_dev *dev;
3559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3561 /* Check mask bits */
3562 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3566 dev = &rte_eth_devices[port_id];
3567 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3568 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3573 rte_eth_dev_rss_hash_update(uint16_t port_id,
3574 struct rte_eth_rss_conf *rss_conf)
3576 struct rte_eth_dev *dev;
3577 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3582 ret = rte_eth_dev_info_get(port_id, &dev_info);
3586 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3588 dev = &rte_eth_devices[port_id];
3589 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3590 dev_info.flow_type_rss_offloads) {
3592 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3593 port_id, rss_conf->rss_hf,
3594 dev_info.flow_type_rss_offloads);
3597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3598 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3603 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3604 struct rte_eth_rss_conf *rss_conf)
3606 struct rte_eth_dev *dev;
3608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3609 dev = &rte_eth_devices[port_id];
3610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3611 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3616 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3617 struct rte_eth_udp_tunnel *udp_tunnel)
3619 struct rte_eth_dev *dev;
3621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3622 if (udp_tunnel == NULL) {
3623 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3627 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3628 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3632 dev = &rte_eth_devices[port_id];
3633 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3634 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3639 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3640 struct rte_eth_udp_tunnel *udp_tunnel)
3642 struct rte_eth_dev *dev;
3644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3645 dev = &rte_eth_devices[port_id];
3647 if (udp_tunnel == NULL) {
3648 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3652 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3653 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3658 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3663 rte_eth_led_on(uint16_t port_id)
3665 struct rte_eth_dev *dev;
3667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3668 dev = &rte_eth_devices[port_id];
3669 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3670 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3674 rte_eth_led_off(uint16_t port_id)
3676 struct rte_eth_dev *dev;
3678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3679 dev = &rte_eth_devices[port_id];
3680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3681 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3685 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3689 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3691 struct rte_eth_dev_info dev_info;
3692 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3696 ret = rte_eth_dev_info_get(port_id, &dev_info);
3700 for (i = 0; i < dev_info.max_mac_addrs; i++)
3701 if (memcmp(addr, &dev->data->mac_addrs[i],
3702 RTE_ETHER_ADDR_LEN) == 0)
3708 static const struct rte_ether_addr null_mac_addr;
3711 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3714 struct rte_eth_dev *dev;
3719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3720 dev = &rte_eth_devices[port_id];
3721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3723 if (rte_is_zero_ether_addr(addr)) {
3724 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3728 if (pool >= ETH_64_POOLS) {
3729 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3733 index = get_mac_addr_index(port_id, addr);
3735 index = get_mac_addr_index(port_id, &null_mac_addr);
3737 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3742 pool_mask = dev->data->mac_pool_sel[index];
3744 /* Check if both MAC address and pool is already there, and do nothing */
3745 if (pool_mask & (1ULL << pool))
3750 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3753 /* Update address in NIC data structure */
3754 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3756 /* Update pool bitmap in NIC data structure */
3757 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3760 return eth_err(port_id, ret);
3764 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3766 struct rte_eth_dev *dev;
3769 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3770 dev = &rte_eth_devices[port_id];
3771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3773 index = get_mac_addr_index(port_id, addr);
3776 "Port %u: Cannot remove default MAC address\n",
3779 } else if (index < 0)
3780 return 0; /* Do nothing if address wasn't found */
3783 (*dev->dev_ops->mac_addr_remove)(dev, index);
3785 /* Update address in NIC data structure */
3786 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3788 /* reset pool bitmap */
3789 dev->data->mac_pool_sel[index] = 0;
3795 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3797 struct rte_eth_dev *dev;
3800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3802 if (!rte_is_valid_assigned_ether_addr(addr))
3805 dev = &rte_eth_devices[port_id];
3806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3808 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3812 /* Update default address in NIC data structure */
3813 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3820 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3824 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3826 struct rte_eth_dev_info dev_info;
3827 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3831 ret = rte_eth_dev_info_get(port_id, &dev_info);
3835 if (!dev->data->hash_mac_addrs)
3838 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3839 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3840 RTE_ETHER_ADDR_LEN) == 0)
3847 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3852 struct rte_eth_dev *dev;
3854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3856 dev = &rte_eth_devices[port_id];
3857 if (rte_is_zero_ether_addr(addr)) {
3858 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3863 index = get_hash_mac_addr_index(port_id, addr);
3864 /* Check if it's already there, and do nothing */
3865 if ((index >= 0) && on)
3871 "Port %u: the MAC address was not set in UTA\n",
3876 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3878 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3885 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3887 /* Update address in NIC data structure */
3889 rte_ether_addr_copy(addr,
3890 &dev->data->hash_mac_addrs[index]);
3892 rte_ether_addr_copy(&null_mac_addr,
3893 &dev->data->hash_mac_addrs[index]);
3896 return eth_err(port_id, ret);
3900 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3902 struct rte_eth_dev *dev;
3904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3906 dev = &rte_eth_devices[port_id];
3908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3909 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3913 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3916 struct rte_eth_dev *dev;
3917 struct rte_eth_dev_info dev_info;
3918 struct rte_eth_link link;
3921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3923 ret = rte_eth_dev_info_get(port_id, &dev_info);
3927 dev = &rte_eth_devices[port_id];
3928 link = dev->data->dev_link;
3930 if (queue_idx > dev_info.max_tx_queues) {
3932 "Set queue rate limit:port %u: invalid queue id=%u\n",
3933 port_id, queue_idx);
3937 if (tx_rate > link.link_speed) {
3939 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3940 tx_rate, link.link_speed);
3944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3945 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3946 queue_idx, tx_rate));
3950 rte_eth_mirror_rule_set(uint16_t port_id,
3951 struct rte_eth_mirror_conf *mirror_conf,
3952 uint8_t rule_id, uint8_t on)
3954 struct rte_eth_dev *dev;
3956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3957 if (mirror_conf->rule_type == 0) {
3958 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3962 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3963 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3968 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3969 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3970 (mirror_conf->pool_mask == 0)) {
3972 "Invalid mirror pool, pool mask can not be 0\n");
3976 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3977 mirror_conf->vlan.vlan_mask == 0) {
3979 "Invalid vlan mask, vlan mask can not be 0\n");
3983 dev = &rte_eth_devices[port_id];
3984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3986 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3987 mirror_conf, rule_id, on));
3991 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3993 struct rte_eth_dev *dev;
3995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3997 dev = &rte_eth_devices[port_id];
3998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4000 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4004 RTE_INIT(eth_dev_init_cb_lists)
4008 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4009 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4013 rte_eth_dev_callback_register(uint16_t port_id,
4014 enum rte_eth_event_type event,
4015 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4017 struct rte_eth_dev *dev;
4018 struct rte_eth_dev_callback *user_cb;
4019 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4025 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4026 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4030 if (port_id == RTE_ETH_ALL) {
4032 last_port = RTE_MAX_ETHPORTS - 1;
4034 next_port = last_port = port_id;
4037 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4040 dev = &rte_eth_devices[next_port];
4042 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4043 if (user_cb->cb_fn == cb_fn &&
4044 user_cb->cb_arg == cb_arg &&
4045 user_cb->event == event) {
4050 /* create a new callback. */
4051 if (user_cb == NULL) {
4052 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4053 sizeof(struct rte_eth_dev_callback), 0);
4054 if (user_cb != NULL) {
4055 user_cb->cb_fn = cb_fn;
4056 user_cb->cb_arg = cb_arg;
4057 user_cb->event = event;
4058 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4061 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4062 rte_eth_dev_callback_unregister(port_id, event,
4068 } while (++next_port <= last_port);
4070 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4075 rte_eth_dev_callback_unregister(uint16_t port_id,
4076 enum rte_eth_event_type event,
4077 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4080 struct rte_eth_dev *dev;
4081 struct rte_eth_dev_callback *cb, *next;
4082 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4088 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4089 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4093 if (port_id == RTE_ETH_ALL) {
4095 last_port = RTE_MAX_ETHPORTS - 1;
4097 next_port = last_port = port_id;
4100 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4103 dev = &rte_eth_devices[next_port];
4105 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4108 next = TAILQ_NEXT(cb, next);
4110 if (cb->cb_fn != cb_fn || cb->event != event ||
4111 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4115 * if this callback is not executing right now,
4118 if (cb->active == 0) {
4119 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4125 } while (++next_port <= last_port);
4127 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4132 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4133 enum rte_eth_event_type event, void *ret_param)
4135 struct rte_eth_dev_callback *cb_lst;
4136 struct rte_eth_dev_callback dev_cb;
4139 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4140 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4141 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4145 if (ret_param != NULL)
4146 dev_cb.ret_param = ret_param;
4148 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4149 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4150 dev_cb.cb_arg, dev_cb.ret_param);
4151 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4154 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4159 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4164 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4166 dev->state = RTE_ETH_DEV_ATTACHED;
4170 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4173 struct rte_eth_dev *dev;
4174 struct rte_intr_handle *intr_handle;
4178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4180 dev = &rte_eth_devices[port_id];
4182 if (!dev->intr_handle) {
4183 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4187 intr_handle = dev->intr_handle;
4188 if (!intr_handle->intr_vec) {
4189 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4193 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4194 vec = intr_handle->intr_vec[qid];
4195 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4196 if (rc && rc != -EEXIST) {
4198 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4199 port_id, qid, op, epfd, vec);
4207 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4209 struct rte_intr_handle *intr_handle;
4210 struct rte_eth_dev *dev;
4211 unsigned int efd_idx;
4215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4217 dev = &rte_eth_devices[port_id];
4219 if (queue_id >= dev->data->nb_rx_queues) {
4220 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4224 if (!dev->intr_handle) {
4225 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4229 intr_handle = dev->intr_handle;
4230 if (!intr_handle->intr_vec) {
4231 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4235 vec = intr_handle->intr_vec[queue_id];
4236 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4237 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4238 fd = intr_handle->efds[efd_idx];
4244 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4245 const char *ring_name)
4247 return snprintf(name, len, "eth_p%d_q%d_%s",
4248 port_id, queue_id, ring_name);
4251 const struct rte_memzone *
4252 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4253 uint16_t queue_id, size_t size, unsigned align,
4256 char z_name[RTE_MEMZONE_NAMESIZE];
4257 const struct rte_memzone *mz;
4260 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4261 queue_id, ring_name);
4262 if (rc >= RTE_MEMZONE_NAMESIZE) {
4263 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4264 rte_errno = ENAMETOOLONG;
4268 mz = rte_memzone_lookup(z_name);
4270 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4272 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4274 "memzone %s does not justify the requested attributes\n",
4282 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4283 RTE_MEMZONE_IOVA_CONTIG, align);
4287 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4290 char z_name[RTE_MEMZONE_NAMESIZE];
4291 const struct rte_memzone *mz;
4294 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4295 queue_id, ring_name);
4296 if (rc >= RTE_MEMZONE_NAMESIZE) {
4297 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4298 return -ENAMETOOLONG;
4301 mz = rte_memzone_lookup(z_name);
4303 rc = rte_memzone_free(mz);
4311 rte_eth_dev_create(struct rte_device *device, const char *name,
4312 size_t priv_data_size,
4313 ethdev_bus_specific_init ethdev_bus_specific_init,
4314 void *bus_init_params,
4315 ethdev_init_t ethdev_init, void *init_params)
4317 struct rte_eth_dev *ethdev;
4320 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4322 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4323 ethdev = rte_eth_dev_allocate(name);
4327 if (priv_data_size) {
4328 ethdev->data->dev_private = rte_zmalloc_socket(
4329 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4332 if (!ethdev->data->dev_private) {
4334 "failed to allocate private data\n");
4340 ethdev = rte_eth_dev_attach_secondary(name);
4343 "secondary process attach failed, ethdev doesn't exist\n");
4348 ethdev->device = device;
4350 if (ethdev_bus_specific_init) {
4351 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4354 "ethdev bus specific initialisation failed\n");
4359 retval = ethdev_init(ethdev, init_params);
4361 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4365 rte_eth_dev_probing_finish(ethdev);
4370 rte_eth_dev_release_port(ethdev);
4375 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4376 ethdev_uninit_t ethdev_uninit)
4380 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4384 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4386 ret = ethdev_uninit(ethdev);
4390 return rte_eth_dev_release_port(ethdev);
4394 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4395 int epfd, int op, void *data)
4398 struct rte_eth_dev *dev;
4399 struct rte_intr_handle *intr_handle;
4402 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4404 dev = &rte_eth_devices[port_id];
4405 if (queue_id >= dev->data->nb_rx_queues) {
4406 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4410 if (!dev->intr_handle) {
4411 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4415 intr_handle = dev->intr_handle;
4416 if (!intr_handle->intr_vec) {
4417 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4421 vec = intr_handle->intr_vec[queue_id];
4422 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4423 if (rc && rc != -EEXIST) {
4425 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4426 port_id, queue_id, op, epfd, vec);
4434 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4437 struct rte_eth_dev *dev;
4439 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4441 dev = &rte_eth_devices[port_id];
4443 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4444 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4449 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4452 struct rte_eth_dev *dev;
4454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4456 dev = &rte_eth_devices[port_id];
4458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4459 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4465 rte_eth_dev_filter_supported(uint16_t port_id,
4466 enum rte_filter_type filter_type)
4468 struct rte_eth_dev *dev;
4470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4472 dev = &rte_eth_devices[port_id];
4473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4474 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4475 RTE_ETH_FILTER_NOP, NULL);
4479 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4480 enum rte_filter_op filter_op, void *arg)
4482 struct rte_eth_dev *dev;
4484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4486 dev = &rte_eth_devices[port_id];
4487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4488 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4492 const struct rte_eth_rxtx_callback *
4493 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4494 rte_rx_callback_fn fn, void *user_param)
4496 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4497 rte_errno = ENOTSUP;
4500 struct rte_eth_dev *dev;
4502 /* check input parameters */
4503 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4504 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4508 dev = &rte_eth_devices[port_id];
4509 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4513 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4521 cb->param = user_param;
4523 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4524 /* Add the callbacks in fifo order. */
4525 struct rte_eth_rxtx_callback *tail =
4526 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4529 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4536 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4541 const struct rte_eth_rxtx_callback *
4542 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4543 rte_rx_callback_fn fn, void *user_param)
4545 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4546 rte_errno = ENOTSUP;
4549 /* check input parameters */
4550 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4551 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4556 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4564 cb->param = user_param;
4566 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4567 /* Add the callbacks at first position */
4568 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4570 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4571 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4576 const struct rte_eth_rxtx_callback *
4577 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4578 rte_tx_callback_fn fn, void *user_param)
4580 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4581 rte_errno = ENOTSUP;
4584 struct rte_eth_dev *dev;
4586 /* check input parameters */
4587 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4588 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4593 dev = &rte_eth_devices[port_id];
4594 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4599 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4607 cb->param = user_param;
4609 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4610 /* Add the callbacks in fifo order. */
4611 struct rte_eth_rxtx_callback *tail =
4612 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4615 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4622 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4628 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4629 const struct rte_eth_rxtx_callback *user_cb)
4631 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4634 /* Check input parameters. */
4635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4636 if (user_cb == NULL ||
4637 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4640 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4641 struct rte_eth_rxtx_callback *cb;
4642 struct rte_eth_rxtx_callback **prev_cb;
4645 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4646 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4647 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4649 if (cb == user_cb) {
4650 /* Remove the user cb from the callback list. */
4651 *prev_cb = cb->next;
4656 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4662 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4663 const struct rte_eth_rxtx_callback *user_cb)
4665 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4668 /* Check input parameters. */
4669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4670 if (user_cb == NULL ||
4671 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4674 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4676 struct rte_eth_rxtx_callback *cb;
4677 struct rte_eth_rxtx_callback **prev_cb;
4679 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4680 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4681 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4683 if (cb == user_cb) {
4684 /* Remove the user cb from the callback list. */
4685 *prev_cb = cb->next;
4690 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4696 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4697 struct rte_eth_rxq_info *qinfo)
4699 struct rte_eth_dev *dev;
4701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4706 dev = &rte_eth_devices[port_id];
4707 if (queue_id >= dev->data->nb_rx_queues) {
4708 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4712 if (dev->data->rx_queues[queue_id] == NULL) {
4714 "Rx queue %"PRIu16" of device with port_id=%"
4715 PRIu16" has not been setup\n",
4720 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4721 RTE_ETHDEV_LOG(INFO,
4722 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4729 memset(qinfo, 0, sizeof(*qinfo));
4730 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4735 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4736 struct rte_eth_txq_info *qinfo)
4738 struct rte_eth_dev *dev;
4740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4745 dev = &rte_eth_devices[port_id];
4746 if (queue_id >= dev->data->nb_tx_queues) {
4747 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4751 if (dev->data->tx_queues[queue_id] == NULL) {
4753 "Tx queue %"PRIu16" of device with port_id=%"
4754 PRIu16" has not been setup\n",
4759 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4760 RTE_ETHDEV_LOG(INFO,
4761 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4768 memset(qinfo, 0, sizeof(*qinfo));
4769 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4775 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4776 struct rte_eth_burst_mode *mode)
4778 struct rte_eth_dev *dev;
4780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4785 dev = &rte_eth_devices[port_id];
4787 if (queue_id >= dev->data->nb_rx_queues) {
4788 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4793 memset(mode, 0, sizeof(*mode));
4794 return eth_err(port_id,
4795 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4799 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4800 struct rte_eth_burst_mode *mode)
4802 struct rte_eth_dev *dev;
4804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4809 dev = &rte_eth_devices[port_id];
4811 if (queue_id >= dev->data->nb_tx_queues) {
4812 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4817 memset(mode, 0, sizeof(*mode));
4818 return eth_err(port_id,
4819 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4823 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4824 struct rte_ether_addr *mc_addr_set,
4825 uint32_t nb_mc_addr)
4827 struct rte_eth_dev *dev;
4829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4831 dev = &rte_eth_devices[port_id];
4832 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4833 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4834 mc_addr_set, nb_mc_addr));
4838 rte_eth_timesync_enable(uint16_t port_id)
4840 struct rte_eth_dev *dev;
4842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4843 dev = &rte_eth_devices[port_id];
4845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4846 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4850 rte_eth_timesync_disable(uint16_t port_id)
4852 struct rte_eth_dev *dev;
4854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4855 dev = &rte_eth_devices[port_id];
4857 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4858 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4862 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4865 struct rte_eth_dev *dev;
4867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4868 dev = &rte_eth_devices[port_id];
4870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4871 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4872 (dev, timestamp, flags));
4876 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4877 struct timespec *timestamp)
4879 struct rte_eth_dev *dev;
4881 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4882 dev = &rte_eth_devices[port_id];
4884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4885 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4890 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4892 struct rte_eth_dev *dev;
4894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4895 dev = &rte_eth_devices[port_id];
4897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4898 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4903 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4905 struct rte_eth_dev *dev;
4907 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4908 dev = &rte_eth_devices[port_id];
4910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4911 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4916 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4918 struct rte_eth_dev *dev;
4920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4921 dev = &rte_eth_devices[port_id];
4923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4924 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4929 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4931 struct rte_eth_dev *dev;
4933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4934 dev = &rte_eth_devices[port_id];
4936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4937 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4941 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4943 struct rte_eth_dev *dev;
4945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4947 dev = &rte_eth_devices[port_id];
4948 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4949 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4953 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4955 struct rte_eth_dev *dev;
4957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4959 dev = &rte_eth_devices[port_id];
4960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4961 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4965 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4967 struct rte_eth_dev *dev;
4969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4971 dev = &rte_eth_devices[port_id];
4972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4973 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4977 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4979 struct rte_eth_dev *dev;
4981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4983 dev = &rte_eth_devices[port_id];
4984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4985 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4989 rte_eth_dev_get_module_info(uint16_t port_id,
4990 struct rte_eth_dev_module_info *modinfo)
4992 struct rte_eth_dev *dev;
4994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4996 dev = &rte_eth_devices[port_id];
4997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4998 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5002 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5003 struct rte_dev_eeprom_info *info)
5005 struct rte_eth_dev *dev;
5007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5009 dev = &rte_eth_devices[port_id];
5010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5011 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5015 rte_eth_dev_get_dcb_info(uint16_t port_id,
5016 struct rte_eth_dcb_info *dcb_info)
5018 struct rte_eth_dev *dev;
5020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5022 dev = &rte_eth_devices[port_id];
5023 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5026 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5030 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5031 struct rte_eth_l2_tunnel_conf *l2_tunnel)
5033 struct rte_eth_dev *dev;
5035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5036 if (l2_tunnel == NULL) {
5037 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5041 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5042 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5046 dev = &rte_eth_devices[port_id];
5047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5049 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5054 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5055 struct rte_eth_l2_tunnel_conf *l2_tunnel,
5059 struct rte_eth_dev *dev;
5061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5063 if (l2_tunnel == NULL) {
5064 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5068 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5069 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5074 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5078 dev = &rte_eth_devices[port_id];
5079 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5081 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5082 l2_tunnel, mask, en));
5086 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5087 const struct rte_eth_desc_lim *desc_lim)
5089 if (desc_lim->nb_align != 0)
5090 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5092 if (desc_lim->nb_max != 0)
5093 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5095 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5099 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5100 uint16_t *nb_rx_desc,
5101 uint16_t *nb_tx_desc)
5103 struct rte_eth_dev_info dev_info;
5106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5108 ret = rte_eth_dev_info_get(port_id, &dev_info);
5112 if (nb_rx_desc != NULL)
5113 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5115 if (nb_tx_desc != NULL)
5116 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5122 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5123 struct rte_eth_hairpin_cap *cap)
5125 struct rte_eth_dev *dev;
5127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5129 dev = &rte_eth_devices[port_id];
5130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5131 memset(cap, 0, sizeof(*cap));
5132 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5136 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5138 if (dev->data->rx_queue_state[queue_id] ==
5139 RTE_ETH_QUEUE_STATE_HAIRPIN)
5145 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5147 if (dev->data->tx_queue_state[queue_id] ==
5148 RTE_ETH_QUEUE_STATE_HAIRPIN)
5154 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5156 struct rte_eth_dev *dev;
5158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5163 dev = &rte_eth_devices[port_id];
5165 if (*dev->dev_ops->pool_ops_supported == NULL)
5166 return 1; /* all pools are supported */
5168 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5172 * A set of values to describe the possible states of a switch domain.
5174 enum rte_eth_switch_domain_state {
5175 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5176 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5180 * Array of switch domains available for allocation. Array is sized to
5181 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5182 * ethdev ports in a single process.
5184 static struct rte_eth_dev_switch {
5185 enum rte_eth_switch_domain_state state;
5186 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5189 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5193 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5195 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5196 if (rte_eth_switch_domains[i].state ==
5197 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5198 rte_eth_switch_domains[i].state =
5199 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5209 rte_eth_switch_domain_free(uint16_t domain_id)
5211 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5212 domain_id >= RTE_MAX_ETHPORTS)
5215 if (rte_eth_switch_domains[domain_id].state !=
5216 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5219 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5225 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5228 struct rte_kvargs_pair *pair;
5231 arglist->str = strdup(str_in);
5232 if (arglist->str == NULL)
5235 letter = arglist->str;
5238 pair = &arglist->pairs[0];
5241 case 0: /* Initial */
5244 else if (*letter == '\0')
5251 case 1: /* Parsing key */
5252 if (*letter == '=') {
5254 pair->value = letter + 1;
5256 } else if (*letter == ',' || *letter == '\0')
5261 case 2: /* Parsing value */
5264 else if (*letter == ',') {
5267 pair = &arglist->pairs[arglist->count];
5269 } else if (*letter == '\0') {
5272 pair = &arglist->pairs[arglist->count];
5277 case 3: /* Parsing list */
5280 else if (*letter == '\0')
5289 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5291 struct rte_kvargs args;
5292 struct rte_kvargs_pair *pair;
5296 memset(eth_da, 0, sizeof(*eth_da));
5298 result = rte_eth_devargs_tokenise(&args, dargs);
5302 for (i = 0; i < args.count; i++) {
5303 pair = &args.pairs[i];
5304 if (strcmp("representor", pair->key) == 0) {
5305 result = rte_eth_devargs_parse_list(pair->value,
5306 rte_eth_devargs_parse_representor_ports,
5321 handle_port_list(const char *cmd __rte_unused,
5322 const char *params __rte_unused,
5323 struct rte_tel_data *d)
5327 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5328 RTE_ETH_FOREACH_DEV(port_id)
5329 rte_tel_data_add_array_int(d, port_id);
5334 handle_port_xstats(const char *cmd __rte_unused,
5336 struct rte_tel_data *d)
5338 struct rte_eth_xstat *eth_xstats;
5339 struct rte_eth_xstat_name *xstat_names;
5340 int port_id, num_xstats;
5343 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5346 port_id = atoi(params);
5347 if (!rte_eth_dev_is_valid_port(port_id))
5350 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5354 /* use one malloc for both names and stats */
5355 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5356 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5357 if (eth_xstats == NULL)
5359 xstat_names = (void *)ð_xstats[num_xstats];
5361 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5362 if (ret < 0 || ret > num_xstats) {
5367 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5368 if (ret < 0 || ret > num_xstats) {
5373 rte_tel_data_start_dict(d);
5374 for (i = 0; i < num_xstats; i++)
5375 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5376 eth_xstats[i].value);
5381 handle_port_link_status(const char *cmd __rte_unused,
5383 struct rte_tel_data *d)
5385 static const char *status_str = "status";
5387 struct rte_eth_link link;
5389 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5392 port_id = atoi(params);
5393 if (!rte_eth_dev_is_valid_port(port_id))
5396 ret = rte_eth_link_get(port_id, &link);
5400 rte_tel_data_start_dict(d);
5401 if (!link.link_status) {
5402 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5405 rte_tel_data_add_dict_string(d, status_str, "UP");
5406 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5407 rte_tel_data_add_dict_string(d, "duplex",
5408 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5409 "full-duplex" : "half-duplex");
5413 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5415 RTE_INIT(ethdev_init_telemetry)
5417 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5418 "Returns list of available ethdev ports. Takes no parameters");
5419 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5420 "Returns the extended stats for a port. Parameters: int port_id");
5421 rte_telemetry_register_cmd("/ethdev/link_status",
5422 handle_port_link_status,
5423 "Returns the link status for a port. Parameters: int port_id");