1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
164 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
167 #undef RTE_TX_OFFLOAD_BIT2STR
170 * The user application callback description.
172 * It contains callback address to be registered by user application,
173 * the pointer to the parameters for callback, and the event type.
175 struct rte_eth_dev_callback {
176 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
178 void *cb_arg; /**< Parameter for callback */
179 void *ret_param; /**< Return parameter */
180 enum rte_eth_event_type event; /**< Interrupt event type */
181 uint32_t active; /**< Callback is executing */
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
193 struct rte_devargs devargs = {.args = NULL};
194 const char *bus_param_key;
195 char *bus_str = NULL;
196 char *cls_str = NULL;
199 memset(iter, 0, sizeof(*iter));
202 * The devargs string may use various syntaxes:
203 * - 0000:08:00.0,representor=[1-3]
204 * - pci:0000:06:00.0,representor=[0,5]
205 * - class=eth,mac=00:11:22:33:44:55
206 * A new syntax is in development (not yet supported):
207 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
211 * Handle pure class filter (i.e. without any bus-level argument),
212 * from future new syntax.
213 * rte_devargs_parse() is not yet supporting the new syntax,
214 * that's why this simple case is temporarily parsed here.
216 #define iter_anybus_str "class=eth,"
217 if (strncmp(devargs_str, iter_anybus_str,
218 strlen(iter_anybus_str)) == 0) {
219 iter->cls_str = devargs_str + strlen(iter_anybus_str);
223 /* Split bus, device and parameters. */
224 ret = rte_devargs_parse(&devargs, devargs_str);
229 * Assume parameters of old syntax can match only at ethdev level.
230 * Extra parameters will be ignored, thanks to "+" prefix.
232 str_size = strlen(devargs.args) + 2;
233 cls_str = malloc(str_size);
234 if (cls_str == NULL) {
238 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239 if (ret != str_size - 1) {
243 iter->cls_str = cls_str;
244 free(devargs.args); /* allocated by rte_devargs_parse() */
247 iter->bus = devargs.bus;
248 if (iter->bus->dev_iterate == NULL) {
253 /* Convert bus args to new syntax for use with new API dev_iterate. */
254 if (strcmp(iter->bus->name, "vdev") == 0) {
255 bus_param_key = "name";
256 } else if (strcmp(iter->bus->name, "pci") == 0) {
257 bus_param_key = "addr";
262 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263 bus_str = malloc(str_size);
264 if (bus_str == NULL) {
268 ret = snprintf(bus_str, str_size, "%s=%s",
269 bus_param_key, devargs.name);
270 if (ret != str_size - 1) {
274 iter->bus_str = bus_str;
277 iter->cls = rte_class_find_by_name("eth");
282 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
293 if (iter->cls == NULL) /* invalid ethdev iterator */
294 return RTE_MAX_ETHPORTS;
296 do { /* loop to try all matching rte_device */
297 /* If not pure ethdev filter and */
298 if (iter->bus != NULL &&
299 /* not in middle of rte_eth_dev iteration, */
300 iter->class_device == NULL) {
301 /* get next rte_device to try. */
302 iter->device = iter->bus->dev_iterate(
303 iter->device, iter->bus_str, iter);
304 if (iter->device == NULL)
305 break; /* no more rte_device candidate */
307 /* A device is matching bus part, need to check ethdev part. */
308 iter->class_device = iter->cls->dev_iterate(
309 iter->class_device, iter->cls_str, iter);
310 if (iter->class_device != NULL)
311 return eth_dev_to_id(iter->class_device); /* match */
312 } while (iter->bus != NULL); /* need to try next rte_device */
314 /* No more ethdev port to iterate. */
315 rte_eth_iterator_cleanup(iter);
316 return RTE_MAX_ETHPORTS;
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
322 if (iter->bus_str == NULL)
323 return; /* nothing to free in pure class filter */
324 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326 memset(iter, 0, sizeof(*iter));
330 rte_eth_find_next(uint16_t port_id)
332 while (port_id < RTE_MAX_ETHPORTS &&
333 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
337 if (port_id >= RTE_MAX_ETHPORTS)
338 return RTE_MAX_ETHPORTS;
344 rte_eth_dev_shared_data_prepare(void)
346 const unsigned flags = 0;
347 const struct rte_memzone *mz;
349 rte_spinlock_lock(&rte_eth_shared_data_lock);
351 if (rte_eth_dev_shared_data == NULL) {
352 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
353 /* Allocate port data and ownership shared memory. */
354 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
355 sizeof(*rte_eth_dev_shared_data),
356 rte_socket_id(), flags);
358 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
360 rte_panic("Cannot allocate ethdev shared data\n");
362 rte_eth_dev_shared_data = mz->addr;
363 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
364 rte_eth_dev_shared_data->next_owner_id =
365 RTE_ETH_DEV_NO_OWNER + 1;
366 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
367 memset(rte_eth_dev_shared_data->data, 0,
368 sizeof(rte_eth_dev_shared_data->data));
372 rte_spinlock_unlock(&rte_eth_shared_data_lock);
376 is_allocated(const struct rte_eth_dev *ethdev)
378 return ethdev->data->name[0] != '\0';
381 static struct rte_eth_dev *
382 _rte_eth_dev_allocated(const char *name)
386 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
387 if (rte_eth_devices[i].data != NULL &&
388 strcmp(rte_eth_devices[i].data->name, name) == 0)
389 return &rte_eth_devices[i];
395 rte_eth_dev_allocated(const char *name)
397 struct rte_eth_dev *ethdev;
399 rte_eth_dev_shared_data_prepare();
401 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
403 ethdev = _rte_eth_dev_allocated(name);
405 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
411 rte_eth_dev_find_free_port(void)
415 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
416 /* Using shared name field to find a free port. */
417 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
418 RTE_ASSERT(rte_eth_devices[i].state ==
423 return RTE_MAX_ETHPORTS;
426 static struct rte_eth_dev *
427 eth_dev_get(uint16_t port_id)
429 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
431 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
437 rte_eth_dev_allocate(const char *name)
440 struct rte_eth_dev *eth_dev = NULL;
442 rte_eth_dev_shared_data_prepare();
444 /* Synchronize port creation between primary and secondary threads. */
445 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
447 if (_rte_eth_dev_allocated(name) != NULL) {
449 "Ethernet device with name %s already allocated\n",
454 port_id = rte_eth_dev_find_free_port();
455 if (port_id == RTE_MAX_ETHPORTS) {
457 "Reached maximum number of Ethernet ports\n");
461 eth_dev = eth_dev_get(port_id);
462 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
463 eth_dev->data->port_id = port_id;
464 eth_dev->data->mtu = RTE_ETHER_MTU;
467 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
473 * Attach to a port already registered by the primary process, which
474 * makes sure that the same device would have the same port id both
475 * in the primary and secondary process.
478 rte_eth_dev_attach_secondary(const char *name)
481 struct rte_eth_dev *eth_dev = NULL;
483 rte_eth_dev_shared_data_prepare();
485 /* Synchronize port attachment to primary port creation and release. */
486 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
488 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
489 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
492 if (i == RTE_MAX_ETHPORTS) {
494 "Device %s is not driven by the primary process\n",
497 eth_dev = eth_dev_get(i);
498 RTE_ASSERT(eth_dev->data->port_id == i);
501 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
506 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
511 rte_eth_dev_shared_data_prepare();
513 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
514 _rte_eth_dev_callback_process(eth_dev,
515 RTE_ETH_EVENT_DESTROY, NULL);
517 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
519 eth_dev->state = RTE_ETH_DEV_UNUSED;
521 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
522 rte_free(eth_dev->data->rx_queues);
523 rte_free(eth_dev->data->tx_queues);
524 rte_free(eth_dev->data->mac_addrs);
525 rte_free(eth_dev->data->hash_mac_addrs);
526 rte_free(eth_dev->data->dev_private);
527 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
530 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
536 rte_eth_dev_is_valid_port(uint16_t port_id)
538 if (port_id >= RTE_MAX_ETHPORTS ||
539 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
546 rte_eth_is_valid_owner_id(uint64_t owner_id)
548 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
549 rte_eth_dev_shared_data->next_owner_id <= owner_id)
555 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
557 while (port_id < RTE_MAX_ETHPORTS &&
558 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
559 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
560 rte_eth_devices[port_id].data->owner.id != owner_id))
563 if (port_id >= RTE_MAX_ETHPORTS)
564 return RTE_MAX_ETHPORTS;
569 int __rte_experimental
570 rte_eth_dev_owner_new(uint64_t *owner_id)
572 rte_eth_dev_shared_data_prepare();
574 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
576 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
578 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
583 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
584 const struct rte_eth_dev_owner *new_owner)
586 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
587 struct rte_eth_dev_owner *port_owner;
590 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
591 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
596 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
597 !rte_eth_is_valid_owner_id(old_owner_id)) {
599 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
600 old_owner_id, new_owner->id);
604 port_owner = &rte_eth_devices[port_id].data->owner;
605 if (port_owner->id != old_owner_id) {
607 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
608 port_id, port_owner->name, port_owner->id);
612 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
614 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
615 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
618 port_owner->id = new_owner->id;
620 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
621 port_id, new_owner->name, new_owner->id);
626 int __rte_experimental
627 rte_eth_dev_owner_set(const uint16_t port_id,
628 const struct rte_eth_dev_owner *owner)
632 rte_eth_dev_shared_data_prepare();
634 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
636 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
638 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
642 int __rte_experimental
643 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
645 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
646 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
649 rte_eth_dev_shared_data_prepare();
651 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
653 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
655 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
659 void __rte_experimental
660 rte_eth_dev_owner_delete(const uint64_t owner_id)
664 rte_eth_dev_shared_data_prepare();
666 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
668 if (rte_eth_is_valid_owner_id(owner_id)) {
669 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
670 if (rte_eth_devices[port_id].data->owner.id == owner_id)
671 memset(&rte_eth_devices[port_id].data->owner, 0,
672 sizeof(struct rte_eth_dev_owner));
673 RTE_ETHDEV_LOG(NOTICE,
674 "All port owners owned by %016"PRIx64" identifier have removed\n",
678 "Invalid owner id=%016"PRIx64"\n",
682 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
685 int __rte_experimental
686 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
689 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
691 rte_eth_dev_shared_data_prepare();
693 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
695 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
696 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
700 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
703 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
708 rte_eth_dev_socket_id(uint16_t port_id)
710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
711 return rte_eth_devices[port_id].data->numa_node;
715 rte_eth_dev_get_sec_ctx(uint16_t port_id)
717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
718 return rte_eth_devices[port_id].security_ctx;
722 rte_eth_dev_count(void)
724 return rte_eth_dev_count_avail();
728 rte_eth_dev_count_avail(void)
735 RTE_ETH_FOREACH_DEV(p)
741 uint16_t __rte_experimental
742 rte_eth_dev_count_total(void)
744 uint16_t port, count = 0;
746 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
747 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
754 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
761 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
765 /* shouldn't check 'rte_eth_devices[i].data',
766 * because it might be overwritten by VDEV PMD */
767 tmp = rte_eth_dev_shared_data->data[port_id].name;
773 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
778 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
782 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
783 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
784 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
794 eth_err(uint16_t port_id, int ret)
798 if (rte_eth_dev_is_removed(port_id))
804 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
806 uint16_t old_nb_queues = dev->data->nb_rx_queues;
810 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
811 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
812 sizeof(dev->data->rx_queues[0]) * nb_queues,
813 RTE_CACHE_LINE_SIZE);
814 if (dev->data->rx_queues == NULL) {
815 dev->data->nb_rx_queues = 0;
818 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
821 rxq = dev->data->rx_queues;
823 for (i = nb_queues; i < old_nb_queues; i++)
824 (*dev->dev_ops->rx_queue_release)(rxq[i]);
825 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
826 RTE_CACHE_LINE_SIZE);
829 if (nb_queues > old_nb_queues) {
830 uint16_t new_qs = nb_queues - old_nb_queues;
832 memset(rxq + old_nb_queues, 0,
833 sizeof(rxq[0]) * new_qs);
836 dev->data->rx_queues = rxq;
838 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
841 rxq = dev->data->rx_queues;
843 for (i = nb_queues; i < old_nb_queues; i++)
844 (*dev->dev_ops->rx_queue_release)(rxq[i]);
846 rte_free(dev->data->rx_queues);
847 dev->data->rx_queues = NULL;
849 dev->data->nb_rx_queues = nb_queues;
854 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
856 struct rte_eth_dev *dev;
858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
860 dev = &rte_eth_devices[port_id];
861 if (!dev->data->dev_started) {
863 "Port %u must be started before start any queue\n",
868 if (rx_queue_id >= dev->data->nb_rx_queues) {
869 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
873 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
875 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
877 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
878 rx_queue_id, port_id);
882 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
888 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
890 struct rte_eth_dev *dev;
892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
894 dev = &rte_eth_devices[port_id];
895 if (rx_queue_id >= dev->data->nb_rx_queues) {
896 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
902 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
904 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
905 rx_queue_id, port_id);
909 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
914 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
916 struct rte_eth_dev *dev;
918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
920 dev = &rte_eth_devices[port_id];
921 if (!dev->data->dev_started) {
923 "Port %u must be started before start any queue\n",
928 if (tx_queue_id >= dev->data->nb_tx_queues) {
929 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
935 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
937 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
938 tx_queue_id, port_id);
942 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
946 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
948 struct rte_eth_dev *dev;
950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
952 dev = &rte_eth_devices[port_id];
953 if (tx_queue_id >= dev->data->nb_tx_queues) {
954 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
960 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
962 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
963 tx_queue_id, port_id);
967 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
972 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
974 uint16_t old_nb_queues = dev->data->nb_tx_queues;
978 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
979 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
980 sizeof(dev->data->tx_queues[0]) * nb_queues,
981 RTE_CACHE_LINE_SIZE);
982 if (dev->data->tx_queues == NULL) {
983 dev->data->nb_tx_queues = 0;
986 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
989 txq = dev->data->tx_queues;
991 for (i = nb_queues; i < old_nb_queues; i++)
992 (*dev->dev_ops->tx_queue_release)(txq[i]);
993 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
994 RTE_CACHE_LINE_SIZE);
997 if (nb_queues > old_nb_queues) {
998 uint16_t new_qs = nb_queues - old_nb_queues;
1000 memset(txq + old_nb_queues, 0,
1001 sizeof(txq[0]) * new_qs);
1004 dev->data->tx_queues = txq;
1006 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1009 txq = dev->data->tx_queues;
1011 for (i = nb_queues; i < old_nb_queues; i++)
1012 (*dev->dev_ops->tx_queue_release)(txq[i]);
1014 rte_free(dev->data->tx_queues);
1015 dev->data->tx_queues = NULL;
1017 dev->data->nb_tx_queues = nb_queues;
1022 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1025 case ETH_SPEED_NUM_10M:
1026 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1027 case ETH_SPEED_NUM_100M:
1028 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1029 case ETH_SPEED_NUM_1G:
1030 return ETH_LINK_SPEED_1G;
1031 case ETH_SPEED_NUM_2_5G:
1032 return ETH_LINK_SPEED_2_5G;
1033 case ETH_SPEED_NUM_5G:
1034 return ETH_LINK_SPEED_5G;
1035 case ETH_SPEED_NUM_10G:
1036 return ETH_LINK_SPEED_10G;
1037 case ETH_SPEED_NUM_20G:
1038 return ETH_LINK_SPEED_20G;
1039 case ETH_SPEED_NUM_25G:
1040 return ETH_LINK_SPEED_25G;
1041 case ETH_SPEED_NUM_40G:
1042 return ETH_LINK_SPEED_40G;
1043 case ETH_SPEED_NUM_50G:
1044 return ETH_LINK_SPEED_50G;
1045 case ETH_SPEED_NUM_56G:
1046 return ETH_LINK_SPEED_56G;
1047 case ETH_SPEED_NUM_100G:
1048 return ETH_LINK_SPEED_100G;
1055 rte_eth_dev_rx_offload_name(uint64_t offload)
1057 const char *name = "UNKNOWN";
1060 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1061 if (offload == rte_rx_offload_names[i].offload) {
1062 name = rte_rx_offload_names[i].name;
1071 rte_eth_dev_tx_offload_name(uint64_t offload)
1073 const char *name = "UNKNOWN";
1076 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1077 if (offload == rte_tx_offload_names[i].offload) {
1078 name = rte_tx_offload_names[i].name;
1087 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1088 const struct rte_eth_conf *dev_conf)
1090 struct rte_eth_dev *dev;
1091 struct rte_eth_dev_info dev_info;
1092 struct rte_eth_conf orig_conf;
1096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1098 dev = &rte_eth_devices[port_id];
1100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1103 if (dev->data->dev_started) {
1105 "Port %u must be stopped to allow configuration\n",
1110 /* Store original config, as rollback required on failure */
1111 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1114 * Copy the dev_conf parameter into the dev structure.
1115 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1117 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1119 rte_eth_dev_info_get(port_id, &dev_info);
1121 /* If number of queues specified by application for both Rx and Tx is
1122 * zero, use driver preferred values. This cannot be done individually
1123 * as it is valid for either Tx or Rx (but not both) to be zero.
1124 * If driver does not provide any preferred valued, fall back on
1127 if (nb_rx_q == 0 && nb_tx_q == 0) {
1128 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1130 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1131 nb_tx_q = dev_info.default_txportconf.nb_queues;
1133 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1136 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1138 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1139 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1144 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1146 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1147 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1153 * Check that the numbers of RX and TX queues are not greater
1154 * than the maximum number of RX and TX queues supported by the
1155 * configured device.
1157 if (nb_rx_q > dev_info.max_rx_queues) {
1158 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1159 port_id, nb_rx_q, dev_info.max_rx_queues);
1164 if (nb_tx_q > dev_info.max_tx_queues) {
1165 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1166 port_id, nb_tx_q, dev_info.max_tx_queues);
1171 /* Check that the device supports requested interrupts */
1172 if ((dev_conf->intr_conf.lsc == 1) &&
1173 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1174 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1175 dev->device->driver->name);
1179 if ((dev_conf->intr_conf.rmv == 1) &&
1180 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1181 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1182 dev->device->driver->name);
1188 * If jumbo frames are enabled, check that the maximum RX packet
1189 * length is supported by the configured device.
1191 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1192 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1194 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1195 port_id, dev_conf->rxmode.max_rx_pkt_len,
1196 dev_info.max_rx_pktlen);
1199 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1201 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1202 port_id, dev_conf->rxmode.max_rx_pkt_len,
1203 (unsigned)RTE_ETHER_MIN_LEN);
1208 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1209 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1210 /* Use default value */
1211 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1215 /* Any requested offloading must be within its device capabilities */
1216 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1217 dev_conf->rxmode.offloads) {
1219 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1220 "capabilities 0x%"PRIx64" in %s()\n",
1221 port_id, dev_conf->rxmode.offloads,
1222 dev_info.rx_offload_capa,
1227 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1228 dev_conf->txmode.offloads) {
1230 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1231 "capabilities 0x%"PRIx64" in %s()\n",
1232 port_id, dev_conf->txmode.offloads,
1233 dev_info.tx_offload_capa,
1239 /* Check that device supports requested rss hash functions. */
1240 if ((dev_info.flow_type_rss_offloads |
1241 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1242 dev_info.flow_type_rss_offloads) {
1244 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1245 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1246 dev_info.flow_type_rss_offloads);
1252 * Setup new number of RX/TX queues and reconfigure device.
1254 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1257 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1263 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1266 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1268 rte_eth_dev_rx_queue_config(dev, 0);
1273 diag = (*dev->dev_ops->dev_configure)(dev);
1275 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1277 rte_eth_dev_rx_queue_config(dev, 0);
1278 rte_eth_dev_tx_queue_config(dev, 0);
1279 ret = eth_err(port_id, diag);
1283 /* Initialize Rx profiling if enabled at compilation time. */
1284 diag = __rte_eth_dev_profile_init(port_id, dev);
1286 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1288 rte_eth_dev_rx_queue_config(dev, 0);
1289 rte_eth_dev_tx_queue_config(dev, 0);
1290 ret = eth_err(port_id, diag);
1297 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1303 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1305 if (dev->data->dev_started) {
1306 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1307 dev->data->port_id);
1311 rte_eth_dev_rx_queue_config(dev, 0);
1312 rte_eth_dev_tx_queue_config(dev, 0);
1314 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1318 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1319 struct rte_eth_dev_info *dev_info)
1321 struct rte_ether_addr *addr;
1326 /* replay MAC address configuration including default MAC */
1327 addr = &dev->data->mac_addrs[0];
1328 if (*dev->dev_ops->mac_addr_set != NULL)
1329 (*dev->dev_ops->mac_addr_set)(dev, addr);
1330 else if (*dev->dev_ops->mac_addr_add != NULL)
1331 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1333 if (*dev->dev_ops->mac_addr_add != NULL) {
1334 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1335 addr = &dev->data->mac_addrs[i];
1337 /* skip zero address */
1338 if (rte_is_zero_ether_addr(addr))
1342 pool_mask = dev->data->mac_pool_sel[i];
1345 if (pool_mask & 1ULL)
1346 (*dev->dev_ops->mac_addr_add)(dev,
1350 } while (pool_mask);
1356 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1357 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1359 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1360 rte_eth_dev_mac_restore(dev, dev_info);
1362 /* replay promiscuous configuration */
1363 if (rte_eth_promiscuous_get(port_id) == 1)
1364 rte_eth_promiscuous_enable(port_id);
1365 else if (rte_eth_promiscuous_get(port_id) == 0)
1366 rte_eth_promiscuous_disable(port_id);
1368 /* replay all multicast configuration */
1369 if (rte_eth_allmulticast_get(port_id) == 1)
1370 rte_eth_allmulticast_enable(port_id);
1371 else if (rte_eth_allmulticast_get(port_id) == 0)
1372 rte_eth_allmulticast_disable(port_id);
1376 rte_eth_dev_start(uint16_t port_id)
1378 struct rte_eth_dev *dev;
1379 struct rte_eth_dev_info dev_info;
1382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1384 dev = &rte_eth_devices[port_id];
1386 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1388 if (dev->data->dev_started != 0) {
1389 RTE_ETHDEV_LOG(INFO,
1390 "Device with port_id=%"PRIu16" already started\n",
1395 rte_eth_dev_info_get(port_id, &dev_info);
1397 /* Lets restore MAC now if device does not support live change */
1398 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1399 rte_eth_dev_mac_restore(dev, &dev_info);
1401 diag = (*dev->dev_ops->dev_start)(dev);
1403 dev->data->dev_started = 1;
1405 return eth_err(port_id, diag);
1407 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1409 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1410 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1411 (*dev->dev_ops->link_update)(dev, 0);
1417 rte_eth_dev_stop(uint16_t port_id)
1419 struct rte_eth_dev *dev;
1421 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1422 dev = &rte_eth_devices[port_id];
1424 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1426 if (dev->data->dev_started == 0) {
1427 RTE_ETHDEV_LOG(INFO,
1428 "Device with port_id=%"PRIu16" already stopped\n",
1433 dev->data->dev_started = 0;
1434 (*dev->dev_ops->dev_stop)(dev);
1438 rte_eth_dev_set_link_up(uint16_t port_id)
1440 struct rte_eth_dev *dev;
1442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1444 dev = &rte_eth_devices[port_id];
1446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1447 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1451 rte_eth_dev_set_link_down(uint16_t port_id)
1453 struct rte_eth_dev *dev;
1455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1457 dev = &rte_eth_devices[port_id];
1459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1460 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1464 rte_eth_dev_close(uint16_t port_id)
1466 struct rte_eth_dev *dev;
1468 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1469 dev = &rte_eth_devices[port_id];
1471 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1472 dev->data->dev_started = 0;
1473 (*dev->dev_ops->dev_close)(dev);
1475 /* check behaviour flag - temporary for PMD migration */
1476 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1477 /* new behaviour: send event + reset state + free all data */
1478 rte_eth_dev_release_port(dev);
1481 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1482 "The driver %s should migrate to the new behaviour.\n",
1483 dev->device->driver->name);
1484 /* old behaviour: only free queue arrays */
1485 dev->data->nb_rx_queues = 0;
1486 rte_free(dev->data->rx_queues);
1487 dev->data->rx_queues = NULL;
1488 dev->data->nb_tx_queues = 0;
1489 rte_free(dev->data->tx_queues);
1490 dev->data->tx_queues = NULL;
1494 rte_eth_dev_reset(uint16_t port_id)
1496 struct rte_eth_dev *dev;
1499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1500 dev = &rte_eth_devices[port_id];
1502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1504 rte_eth_dev_stop(port_id);
1505 ret = dev->dev_ops->dev_reset(dev);
1507 return eth_err(port_id, ret);
1510 int __rte_experimental
1511 rte_eth_dev_is_removed(uint16_t port_id)
1513 struct rte_eth_dev *dev;
1516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1518 dev = &rte_eth_devices[port_id];
1520 if (dev->state == RTE_ETH_DEV_REMOVED)
1523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1525 ret = dev->dev_ops->is_removed(dev);
1527 /* Device is physically removed. */
1528 dev->state = RTE_ETH_DEV_REMOVED;
1534 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1535 uint16_t nb_rx_desc, unsigned int socket_id,
1536 const struct rte_eth_rxconf *rx_conf,
1537 struct rte_mempool *mp)
1540 uint32_t mbp_buf_size;
1541 struct rte_eth_dev *dev;
1542 struct rte_eth_dev_info dev_info;
1543 struct rte_eth_rxconf local_conf;
1546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1548 dev = &rte_eth_devices[port_id];
1549 if (rx_queue_id >= dev->data->nb_rx_queues) {
1550 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1558 * Check the size of the mbuf data buffer.
1559 * This value must be provided in the private data of the memory pool.
1560 * First check that the memory pool has a valid private data.
1562 rte_eth_dev_info_get(port_id, &dev_info);
1563 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1564 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1565 mp->name, (int)mp->private_data_size,
1566 (int)sizeof(struct rte_pktmbuf_pool_private));
1569 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1571 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1573 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1574 mp->name, (int)mbp_buf_size,
1575 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1576 (int)RTE_PKTMBUF_HEADROOM,
1577 (int)dev_info.min_rx_bufsize);
1581 /* Use default specified by driver, if nb_rx_desc is zero */
1582 if (nb_rx_desc == 0) {
1583 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1584 /* If driver default is also zero, fall back on EAL default */
1585 if (nb_rx_desc == 0)
1586 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1589 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1590 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1591 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1594 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1595 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1596 dev_info.rx_desc_lim.nb_min,
1597 dev_info.rx_desc_lim.nb_align);
1601 if (dev->data->dev_started &&
1602 !(dev_info.dev_capa &
1603 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1606 if (dev->data->dev_started &&
1607 (dev->data->rx_queue_state[rx_queue_id] !=
1608 RTE_ETH_QUEUE_STATE_STOPPED))
1611 rxq = dev->data->rx_queues;
1612 if (rxq[rx_queue_id]) {
1613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1615 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1616 rxq[rx_queue_id] = NULL;
1619 if (rx_conf == NULL)
1620 rx_conf = &dev_info.default_rxconf;
1622 local_conf = *rx_conf;
1625 * If an offloading has already been enabled in
1626 * rte_eth_dev_configure(), it has been enabled on all queues,
1627 * so there is no need to enable it in this queue again.
1628 * The local_conf.offloads input to underlying PMD only carries
1629 * those offloadings which are only enabled on this queue and
1630 * not enabled on all queues.
1632 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1635 * New added offloadings for this queue are those not enabled in
1636 * rte_eth_dev_configure() and they must be per-queue type.
1637 * A pure per-port offloading can't be enabled on a queue while
1638 * disabled on another queue. A pure per-port offloading can't
1639 * be enabled for any queue as new added one if it hasn't been
1640 * enabled in rte_eth_dev_configure().
1642 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1643 local_conf.offloads) {
1645 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1646 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1647 port_id, rx_queue_id, local_conf.offloads,
1648 dev_info.rx_queue_offload_capa,
1653 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1654 socket_id, &local_conf, mp);
1656 if (!dev->data->min_rx_buf_size ||
1657 dev->data->min_rx_buf_size > mbp_buf_size)
1658 dev->data->min_rx_buf_size = mbp_buf_size;
1661 return eth_err(port_id, ret);
1665 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1666 uint16_t nb_tx_desc, unsigned int socket_id,
1667 const struct rte_eth_txconf *tx_conf)
1669 struct rte_eth_dev *dev;
1670 struct rte_eth_dev_info dev_info;
1671 struct rte_eth_txconf local_conf;
1674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1676 dev = &rte_eth_devices[port_id];
1677 if (tx_queue_id >= dev->data->nb_tx_queues) {
1678 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1685 rte_eth_dev_info_get(port_id, &dev_info);
1687 /* Use default specified by driver, if nb_tx_desc is zero */
1688 if (nb_tx_desc == 0) {
1689 nb_tx_desc = dev_info.default_txportconf.ring_size;
1690 /* If driver default is zero, fall back on EAL default */
1691 if (nb_tx_desc == 0)
1692 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1694 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1695 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1696 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1698 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1699 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1700 dev_info.tx_desc_lim.nb_min,
1701 dev_info.tx_desc_lim.nb_align);
1705 if (dev->data->dev_started &&
1706 !(dev_info.dev_capa &
1707 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1710 if (dev->data->dev_started &&
1711 (dev->data->tx_queue_state[tx_queue_id] !=
1712 RTE_ETH_QUEUE_STATE_STOPPED))
1715 txq = dev->data->tx_queues;
1716 if (txq[tx_queue_id]) {
1717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1719 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1720 txq[tx_queue_id] = NULL;
1723 if (tx_conf == NULL)
1724 tx_conf = &dev_info.default_txconf;
1726 local_conf = *tx_conf;
1729 * If an offloading has already been enabled in
1730 * rte_eth_dev_configure(), it has been enabled on all queues,
1731 * so there is no need to enable it in this queue again.
1732 * The local_conf.offloads input to underlying PMD only carries
1733 * those offloadings which are only enabled on this queue and
1734 * not enabled on all queues.
1736 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1739 * New added offloadings for this queue are those not enabled in
1740 * rte_eth_dev_configure() and they must be per-queue type.
1741 * A pure per-port offloading can't be enabled on a queue while
1742 * disabled on another queue. A pure per-port offloading can't
1743 * be enabled for any queue as new added one if it hasn't been
1744 * enabled in rte_eth_dev_configure().
1746 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1747 local_conf.offloads) {
1749 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1750 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1751 port_id, tx_queue_id, local_conf.offloads,
1752 dev_info.tx_queue_offload_capa,
1757 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1758 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1762 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1763 void *userdata __rte_unused)
1767 for (i = 0; i < unsent; i++)
1768 rte_pktmbuf_free(pkts[i]);
1772 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1775 uint64_t *count = userdata;
1778 for (i = 0; i < unsent; i++)
1779 rte_pktmbuf_free(pkts[i]);
1785 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1786 buffer_tx_error_fn cbfn, void *userdata)
1788 buffer->error_callback = cbfn;
1789 buffer->error_userdata = userdata;
1794 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1801 buffer->size = size;
1802 if (buffer->error_callback == NULL) {
1803 ret = rte_eth_tx_buffer_set_err_callback(
1804 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1811 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1813 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1816 /* Validate Input Data. Bail if not valid or not supported. */
1817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1820 /* Call driver to free pending mbufs. */
1821 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1823 return eth_err(port_id, ret);
1827 rte_eth_promiscuous_enable(uint16_t port_id)
1829 struct rte_eth_dev *dev;
1831 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1832 dev = &rte_eth_devices[port_id];
1834 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1835 (*dev->dev_ops->promiscuous_enable)(dev);
1836 dev->data->promiscuous = 1;
1840 rte_eth_promiscuous_disable(uint16_t port_id)
1842 struct rte_eth_dev *dev;
1844 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1845 dev = &rte_eth_devices[port_id];
1847 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1848 dev->data->promiscuous = 0;
1849 (*dev->dev_ops->promiscuous_disable)(dev);
1853 rte_eth_promiscuous_get(uint16_t port_id)
1855 struct rte_eth_dev *dev;
1857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1859 dev = &rte_eth_devices[port_id];
1860 return dev->data->promiscuous;
1864 rte_eth_allmulticast_enable(uint16_t port_id)
1866 struct rte_eth_dev *dev;
1868 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1869 dev = &rte_eth_devices[port_id];
1871 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1872 (*dev->dev_ops->allmulticast_enable)(dev);
1873 dev->data->all_multicast = 1;
1877 rte_eth_allmulticast_disable(uint16_t port_id)
1879 struct rte_eth_dev *dev;
1881 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1882 dev = &rte_eth_devices[port_id];
1884 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1885 dev->data->all_multicast = 0;
1886 (*dev->dev_ops->allmulticast_disable)(dev);
1890 rte_eth_allmulticast_get(uint16_t port_id)
1892 struct rte_eth_dev *dev;
1894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1896 dev = &rte_eth_devices[port_id];
1897 return dev->data->all_multicast;
1901 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1903 struct rte_eth_dev *dev;
1905 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1906 dev = &rte_eth_devices[port_id];
1908 if (dev->data->dev_conf.intr_conf.lsc &&
1909 dev->data->dev_started)
1910 rte_eth_linkstatus_get(dev, eth_link);
1912 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1913 (*dev->dev_ops->link_update)(dev, 1);
1914 *eth_link = dev->data->dev_link;
1919 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1921 struct rte_eth_dev *dev;
1923 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1924 dev = &rte_eth_devices[port_id];
1926 if (dev->data->dev_conf.intr_conf.lsc &&
1927 dev->data->dev_started)
1928 rte_eth_linkstatus_get(dev, eth_link);
1930 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1931 (*dev->dev_ops->link_update)(dev, 0);
1932 *eth_link = dev->data->dev_link;
1937 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1939 struct rte_eth_dev *dev;
1941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1943 dev = &rte_eth_devices[port_id];
1944 memset(stats, 0, sizeof(*stats));
1946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1947 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1948 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1952 rte_eth_stats_reset(uint16_t port_id)
1954 struct rte_eth_dev *dev;
1956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1957 dev = &rte_eth_devices[port_id];
1959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1960 (*dev->dev_ops->stats_reset)(dev);
1961 dev->data->rx_mbuf_alloc_failed = 0;
1967 get_xstats_basic_count(struct rte_eth_dev *dev)
1969 uint16_t nb_rxqs, nb_txqs;
1972 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1973 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1975 count = RTE_NB_STATS;
1976 count += nb_rxqs * RTE_NB_RXQ_STATS;
1977 count += nb_txqs * RTE_NB_TXQ_STATS;
1983 get_xstats_count(uint16_t port_id)
1985 struct rte_eth_dev *dev;
1988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1989 dev = &rte_eth_devices[port_id];
1990 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1991 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1994 return eth_err(port_id, count);
1996 if (dev->dev_ops->xstats_get_names != NULL) {
1997 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1999 return eth_err(port_id, count);
2004 count += get_xstats_basic_count(dev);
2010 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2013 int cnt_xstats, idx_xstat;
2015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2018 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2023 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2028 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2029 if (cnt_xstats < 0) {
2030 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2034 /* Get id-name lookup table */
2035 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2037 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2038 port_id, xstats_names, cnt_xstats, NULL)) {
2039 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2043 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2044 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2053 /* retrieve basic stats names */
2055 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2056 struct rte_eth_xstat_name *xstats_names)
2058 int cnt_used_entries = 0;
2059 uint32_t idx, id_queue;
2062 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2063 snprintf(xstats_names[cnt_used_entries].name,
2064 sizeof(xstats_names[0].name),
2065 "%s", rte_stats_strings[idx].name);
2068 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2069 for (id_queue = 0; id_queue < num_q; id_queue++) {
2070 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2071 snprintf(xstats_names[cnt_used_entries].name,
2072 sizeof(xstats_names[0].name),
2074 id_queue, rte_rxq_stats_strings[idx].name);
2079 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2080 for (id_queue = 0; id_queue < num_q; id_queue++) {
2081 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2082 snprintf(xstats_names[cnt_used_entries].name,
2083 sizeof(xstats_names[0].name),
2085 id_queue, rte_txq_stats_strings[idx].name);
2089 return cnt_used_entries;
2092 /* retrieve ethdev extended statistics names */
2094 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2095 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2098 struct rte_eth_xstat_name *xstats_names_copy;
2099 unsigned int no_basic_stat_requested = 1;
2100 unsigned int no_ext_stat_requested = 1;
2101 unsigned int expected_entries;
2102 unsigned int basic_count;
2103 struct rte_eth_dev *dev;
2107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2108 dev = &rte_eth_devices[port_id];
2110 basic_count = get_xstats_basic_count(dev);
2111 ret = get_xstats_count(port_id);
2114 expected_entries = (unsigned int)ret;
2116 /* Return max number of stats if no ids given */
2119 return expected_entries;
2120 else if (xstats_names && size < expected_entries)
2121 return expected_entries;
2124 if (ids && !xstats_names)
2127 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2128 uint64_t ids_copy[size];
2130 for (i = 0; i < size; i++) {
2131 if (ids[i] < basic_count) {
2132 no_basic_stat_requested = 0;
2137 * Convert ids to xstats ids that PMD knows.
2138 * ids known by user are basic + extended stats.
2140 ids_copy[i] = ids[i] - basic_count;
2143 if (no_basic_stat_requested)
2144 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2145 xstats_names, ids_copy, size);
2148 /* Retrieve all stats */
2150 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2152 if (num_stats < 0 || num_stats > (int)expected_entries)
2155 return expected_entries;
2158 xstats_names_copy = calloc(expected_entries,
2159 sizeof(struct rte_eth_xstat_name));
2161 if (!xstats_names_copy) {
2162 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2167 for (i = 0; i < size; i++) {
2168 if (ids[i] >= basic_count) {
2169 no_ext_stat_requested = 0;
2175 /* Fill xstats_names_copy structure */
2176 if (ids && no_ext_stat_requested) {
2177 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2179 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2182 free(xstats_names_copy);
2188 for (i = 0; i < size; i++) {
2189 if (ids[i] >= expected_entries) {
2190 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2191 free(xstats_names_copy);
2194 xstats_names[i] = xstats_names_copy[ids[i]];
2197 free(xstats_names_copy);
2202 rte_eth_xstats_get_names(uint16_t port_id,
2203 struct rte_eth_xstat_name *xstats_names,
2206 struct rte_eth_dev *dev;
2207 int cnt_used_entries;
2208 int cnt_expected_entries;
2209 int cnt_driver_entries;
2211 cnt_expected_entries = get_xstats_count(port_id);
2212 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2213 (int)size < cnt_expected_entries)
2214 return cnt_expected_entries;
2216 /* port_id checked in get_xstats_count() */
2217 dev = &rte_eth_devices[port_id];
2219 cnt_used_entries = rte_eth_basic_stats_get_names(
2222 if (dev->dev_ops->xstats_get_names != NULL) {
2223 /* If there are any driver-specific xstats, append them
2226 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2228 xstats_names + cnt_used_entries,
2229 size - cnt_used_entries);
2230 if (cnt_driver_entries < 0)
2231 return eth_err(port_id, cnt_driver_entries);
2232 cnt_used_entries += cnt_driver_entries;
2235 return cnt_used_entries;
2240 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2242 struct rte_eth_dev *dev;
2243 struct rte_eth_stats eth_stats;
2244 unsigned int count = 0, i, q;
2245 uint64_t val, *stats_ptr;
2246 uint16_t nb_rxqs, nb_txqs;
2249 ret = rte_eth_stats_get(port_id, ð_stats);
2253 dev = &rte_eth_devices[port_id];
2255 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2256 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2259 for (i = 0; i < RTE_NB_STATS; i++) {
2260 stats_ptr = RTE_PTR_ADD(ð_stats,
2261 rte_stats_strings[i].offset);
2263 xstats[count++].value = val;
2267 for (q = 0; q < nb_rxqs; q++) {
2268 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2269 stats_ptr = RTE_PTR_ADD(ð_stats,
2270 rte_rxq_stats_strings[i].offset +
2271 q * sizeof(uint64_t));
2273 xstats[count++].value = val;
2278 for (q = 0; q < nb_txqs; q++) {
2279 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2280 stats_ptr = RTE_PTR_ADD(ð_stats,
2281 rte_txq_stats_strings[i].offset +
2282 q * sizeof(uint64_t));
2284 xstats[count++].value = val;
2290 /* retrieve ethdev extended statistics */
2292 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2293 uint64_t *values, unsigned int size)
2295 unsigned int no_basic_stat_requested = 1;
2296 unsigned int no_ext_stat_requested = 1;
2297 unsigned int num_xstats_filled;
2298 unsigned int basic_count;
2299 uint16_t expected_entries;
2300 struct rte_eth_dev *dev;
2304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2305 ret = get_xstats_count(port_id);
2308 expected_entries = (uint16_t)ret;
2309 struct rte_eth_xstat xstats[expected_entries];
2310 dev = &rte_eth_devices[port_id];
2311 basic_count = get_xstats_basic_count(dev);
2313 /* Return max number of stats if no ids given */
2316 return expected_entries;
2317 else if (values && size < expected_entries)
2318 return expected_entries;
2324 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2325 unsigned int basic_count = get_xstats_basic_count(dev);
2326 uint64_t ids_copy[size];
2328 for (i = 0; i < size; i++) {
2329 if (ids[i] < basic_count) {
2330 no_basic_stat_requested = 0;
2335 * Convert ids to xstats ids that PMD knows.
2336 * ids known by user are basic + extended stats.
2338 ids_copy[i] = ids[i] - basic_count;
2341 if (no_basic_stat_requested)
2342 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2347 for (i = 0; i < size; i++) {
2348 if (ids[i] >= basic_count) {
2349 no_ext_stat_requested = 0;
2355 /* Fill the xstats structure */
2356 if (ids && no_ext_stat_requested)
2357 ret = rte_eth_basic_stats_get(port_id, xstats);
2359 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2363 num_xstats_filled = (unsigned int)ret;
2365 /* Return all stats */
2367 for (i = 0; i < num_xstats_filled; i++)
2368 values[i] = xstats[i].value;
2369 return expected_entries;
2373 for (i = 0; i < size; i++) {
2374 if (ids[i] >= expected_entries) {
2375 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2378 values[i] = xstats[ids[i]].value;
2384 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2387 struct rte_eth_dev *dev;
2388 unsigned int count = 0, i;
2389 signed int xcount = 0;
2390 uint16_t nb_rxqs, nb_txqs;
2393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2395 dev = &rte_eth_devices[port_id];
2397 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2398 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2400 /* Return generic statistics */
2401 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2402 (nb_txqs * RTE_NB_TXQ_STATS);
2404 /* implemented by the driver */
2405 if (dev->dev_ops->xstats_get != NULL) {
2406 /* Retrieve the xstats from the driver at the end of the
2409 xcount = (*dev->dev_ops->xstats_get)(dev,
2410 xstats ? xstats + count : NULL,
2411 (n > count) ? n - count : 0);
2414 return eth_err(port_id, xcount);
2417 if (n < count + xcount || xstats == NULL)
2418 return count + xcount;
2420 /* now fill the xstats structure */
2421 ret = rte_eth_basic_stats_get(port_id, xstats);
2426 for (i = 0; i < count; i++)
2428 /* add an offset to driver-specific stats */
2429 for ( ; i < count + xcount; i++)
2430 xstats[i].id += count;
2432 return count + xcount;
2435 /* reset ethdev extended statistics */
2437 rte_eth_xstats_reset(uint16_t port_id)
2439 struct rte_eth_dev *dev;
2441 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2442 dev = &rte_eth_devices[port_id];
2444 /* implemented by the driver */
2445 if (dev->dev_ops->xstats_reset != NULL) {
2446 (*dev->dev_ops->xstats_reset)(dev);
2450 /* fallback to default */
2451 rte_eth_stats_reset(port_id);
2455 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2458 struct rte_eth_dev *dev;
2460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2462 dev = &rte_eth_devices[port_id];
2464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2466 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2469 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2472 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2475 return (*dev->dev_ops->queue_stats_mapping_set)
2476 (dev, queue_id, stat_idx, is_rx);
2481 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2484 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2485 stat_idx, STAT_QMAP_TX));
2490 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2493 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2494 stat_idx, STAT_QMAP_RX));
2498 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2500 struct rte_eth_dev *dev;
2502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2503 dev = &rte_eth_devices[port_id];
2505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2506 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2507 fw_version, fw_size));
2511 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2513 struct rte_eth_dev *dev;
2514 const struct rte_eth_desc_lim lim = {
2515 .nb_max = UINT16_MAX,
2520 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2521 dev = &rte_eth_devices[port_id];
2523 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2524 dev_info->rx_desc_lim = lim;
2525 dev_info->tx_desc_lim = lim;
2526 dev_info->device = dev->device;
2528 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2529 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2530 dev_info->driver_name = dev->device->driver->name;
2531 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2532 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2534 dev_info->dev_flags = &dev->data->dev_flags;
2538 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2539 uint32_t *ptypes, int num)
2542 struct rte_eth_dev *dev;
2543 const uint32_t *all_ptypes;
2545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2546 dev = &rte_eth_devices[port_id];
2547 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2548 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2553 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2554 if (all_ptypes[i] & ptype_mask) {
2556 ptypes[j] = all_ptypes[i];
2564 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
2566 struct rte_eth_dev *dev;
2568 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2569 dev = &rte_eth_devices[port_id];
2570 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2575 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2577 struct rte_eth_dev *dev;
2579 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2581 dev = &rte_eth_devices[port_id];
2582 *mtu = dev->data->mtu;
2587 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2590 struct rte_eth_dev *dev;
2592 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2593 dev = &rte_eth_devices[port_id];
2594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2596 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2598 dev->data->mtu = mtu;
2600 return eth_err(port_id, ret);
2604 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2606 struct rte_eth_dev *dev;
2609 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2610 dev = &rte_eth_devices[port_id];
2611 if (!(dev->data->dev_conf.rxmode.offloads &
2612 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2613 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2618 if (vlan_id > 4095) {
2619 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2625 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2627 struct rte_vlan_filter_conf *vfc;
2631 vfc = &dev->data->vlan_filter_conf;
2632 vidx = vlan_id / 64;
2633 vbit = vlan_id % 64;
2636 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2638 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2641 return eth_err(port_id, ret);
2645 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2648 struct rte_eth_dev *dev;
2650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2651 dev = &rte_eth_devices[port_id];
2652 if (rx_queue_id >= dev->data->nb_rx_queues) {
2653 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2658 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2664 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2665 enum rte_vlan_type vlan_type,
2668 struct rte_eth_dev *dev;
2670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2671 dev = &rte_eth_devices[port_id];
2672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2674 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2679 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2681 struct rte_eth_dev *dev;
2685 uint64_t orig_offloads;
2687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2688 dev = &rte_eth_devices[port_id];
2690 /* save original values in case of failure */
2691 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2693 /*check which option changed by application*/
2694 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2695 org = !!(dev->data->dev_conf.rxmode.offloads &
2696 DEV_RX_OFFLOAD_VLAN_STRIP);
2699 dev->data->dev_conf.rxmode.offloads |=
2700 DEV_RX_OFFLOAD_VLAN_STRIP;
2702 dev->data->dev_conf.rxmode.offloads &=
2703 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2704 mask |= ETH_VLAN_STRIP_MASK;
2707 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2708 org = !!(dev->data->dev_conf.rxmode.offloads &
2709 DEV_RX_OFFLOAD_VLAN_FILTER);
2712 dev->data->dev_conf.rxmode.offloads |=
2713 DEV_RX_OFFLOAD_VLAN_FILTER;
2715 dev->data->dev_conf.rxmode.offloads &=
2716 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2717 mask |= ETH_VLAN_FILTER_MASK;
2720 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2721 org = !!(dev->data->dev_conf.rxmode.offloads &
2722 DEV_RX_OFFLOAD_VLAN_EXTEND);
2725 dev->data->dev_conf.rxmode.offloads |=
2726 DEV_RX_OFFLOAD_VLAN_EXTEND;
2728 dev->data->dev_conf.rxmode.offloads &=
2729 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2730 mask |= ETH_VLAN_EXTEND_MASK;
2737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2738 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2740 /* hit an error restore original values */
2741 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2744 return eth_err(port_id, ret);
2748 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2750 struct rte_eth_dev *dev;
2753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2754 dev = &rte_eth_devices[port_id];
2756 if (dev->data->dev_conf.rxmode.offloads &
2757 DEV_RX_OFFLOAD_VLAN_STRIP)
2758 ret |= ETH_VLAN_STRIP_OFFLOAD;
2760 if (dev->data->dev_conf.rxmode.offloads &
2761 DEV_RX_OFFLOAD_VLAN_FILTER)
2762 ret |= ETH_VLAN_FILTER_OFFLOAD;
2764 if (dev->data->dev_conf.rxmode.offloads &
2765 DEV_RX_OFFLOAD_VLAN_EXTEND)
2766 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2772 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2774 struct rte_eth_dev *dev;
2776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2777 dev = &rte_eth_devices[port_id];
2778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2780 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2784 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2786 struct rte_eth_dev *dev;
2788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2789 dev = &rte_eth_devices[port_id];
2790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2791 memset(fc_conf, 0, sizeof(*fc_conf));
2792 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2796 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2798 struct rte_eth_dev *dev;
2800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2801 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2802 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2806 dev = &rte_eth_devices[port_id];
2807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2808 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2812 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2813 struct rte_eth_pfc_conf *pfc_conf)
2815 struct rte_eth_dev *dev;
2817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2818 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2819 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2823 dev = &rte_eth_devices[port_id];
2824 /* High water, low water validation are device specific */
2825 if (*dev->dev_ops->priority_flow_ctrl_set)
2826 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2832 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2840 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2841 for (i = 0; i < num; i++) {
2842 if (reta_conf[i].mask)
2850 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2854 uint16_t i, idx, shift;
2860 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2864 for (i = 0; i < reta_size; i++) {
2865 idx = i / RTE_RETA_GROUP_SIZE;
2866 shift = i % RTE_RETA_GROUP_SIZE;
2867 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2868 (reta_conf[idx].reta[shift] >= max_rxq)) {
2870 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2872 reta_conf[idx].reta[shift], max_rxq);
2881 rte_eth_dev_rss_reta_update(uint16_t port_id,
2882 struct rte_eth_rss_reta_entry64 *reta_conf,
2885 struct rte_eth_dev *dev;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2889 /* Check mask bits */
2890 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2894 dev = &rte_eth_devices[port_id];
2896 /* Check entry value */
2897 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2898 dev->data->nb_rx_queues);
2902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2903 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2908 rte_eth_dev_rss_reta_query(uint16_t port_id,
2909 struct rte_eth_rss_reta_entry64 *reta_conf,
2912 struct rte_eth_dev *dev;
2915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2917 /* Check mask bits */
2918 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2922 dev = &rte_eth_devices[port_id];
2923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2924 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2929 rte_eth_dev_rss_hash_update(uint16_t port_id,
2930 struct rte_eth_rss_conf *rss_conf)
2932 struct rte_eth_dev *dev;
2933 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2936 dev = &rte_eth_devices[port_id];
2937 rte_eth_dev_info_get(port_id, &dev_info);
2938 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2939 dev_info.flow_type_rss_offloads) {
2941 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2942 port_id, rss_conf->rss_hf,
2943 dev_info.flow_type_rss_offloads);
2946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2947 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2952 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2953 struct rte_eth_rss_conf *rss_conf)
2955 struct rte_eth_dev *dev;
2957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2958 dev = &rte_eth_devices[port_id];
2959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2960 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2965 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2966 struct rte_eth_udp_tunnel *udp_tunnel)
2968 struct rte_eth_dev *dev;
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2971 if (udp_tunnel == NULL) {
2972 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2976 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2977 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2981 dev = &rte_eth_devices[port_id];
2982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2983 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2988 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2989 struct rte_eth_udp_tunnel *udp_tunnel)
2991 struct rte_eth_dev *dev;
2993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2994 dev = &rte_eth_devices[port_id];
2996 if (udp_tunnel == NULL) {
2997 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3001 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3002 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3007 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3012 rte_eth_led_on(uint16_t port_id)
3014 struct rte_eth_dev *dev;
3016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3017 dev = &rte_eth_devices[port_id];
3018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3019 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3023 rte_eth_led_off(uint16_t port_id)
3025 struct rte_eth_dev *dev;
3027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3028 dev = &rte_eth_devices[port_id];
3029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3030 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3034 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3038 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3040 struct rte_eth_dev_info dev_info;
3041 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3045 rte_eth_dev_info_get(port_id, &dev_info);
3047 for (i = 0; i < dev_info.max_mac_addrs; i++)
3048 if (memcmp(addr, &dev->data->mac_addrs[i], RTE_ETHER_ADDR_LEN) == 0)
3054 static const struct rte_ether_addr null_mac_addr;
3057 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3060 struct rte_eth_dev *dev;
3065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3066 dev = &rte_eth_devices[port_id];
3067 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3069 if (rte_is_zero_ether_addr(addr)) {
3070 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3074 if (pool >= ETH_64_POOLS) {
3075 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3079 index = get_mac_addr_index(port_id, addr);
3081 index = get_mac_addr_index(port_id, &null_mac_addr);
3083 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3088 pool_mask = dev->data->mac_pool_sel[index];
3090 /* Check if both MAC address and pool is already there, and do nothing */
3091 if (pool_mask & (1ULL << pool))
3096 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3099 /* Update address in NIC data structure */
3100 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3102 /* Update pool bitmap in NIC data structure */
3103 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3106 return eth_err(port_id, ret);
3110 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3112 struct rte_eth_dev *dev;
3115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3116 dev = &rte_eth_devices[port_id];
3117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3119 index = get_mac_addr_index(port_id, addr);
3122 "Port %u: Cannot remove default MAC address\n",
3125 } else if (index < 0)
3126 return 0; /* Do nothing if address wasn't found */
3129 (*dev->dev_ops->mac_addr_remove)(dev, index);
3131 /* Update address in NIC data structure */
3132 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3134 /* reset pool bitmap */
3135 dev->data->mac_pool_sel[index] = 0;
3141 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3143 struct rte_eth_dev *dev;
3146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3148 if (!rte_is_valid_assigned_ether_addr(addr))
3151 dev = &rte_eth_devices[port_id];
3152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3154 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3158 /* Update default address in NIC data structure */
3159 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3166 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3170 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3172 struct rte_eth_dev_info dev_info;
3173 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3176 rte_eth_dev_info_get(port_id, &dev_info);
3177 if (!dev->data->hash_mac_addrs)
3180 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3181 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3182 RTE_ETHER_ADDR_LEN) == 0)
3189 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3194 struct rte_eth_dev *dev;
3196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3198 dev = &rte_eth_devices[port_id];
3199 if (rte_is_zero_ether_addr(addr)) {
3200 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3205 index = get_hash_mac_addr_index(port_id, addr);
3206 /* Check if it's already there, and do nothing */
3207 if ((index >= 0) && on)
3213 "Port %u: the MAC address was not set in UTA\n",
3218 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3220 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3227 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3229 /* Update address in NIC data structure */
3231 rte_ether_addr_copy(addr,
3232 &dev->data->hash_mac_addrs[index]);
3234 rte_ether_addr_copy(&null_mac_addr,
3235 &dev->data->hash_mac_addrs[index]);
3238 return eth_err(port_id, ret);
3242 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3244 struct rte_eth_dev *dev;
3246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3248 dev = &rte_eth_devices[port_id];
3250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3251 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3255 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3258 struct rte_eth_dev *dev;
3259 struct rte_eth_dev_info dev_info;
3260 struct rte_eth_link link;
3262 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3264 dev = &rte_eth_devices[port_id];
3265 rte_eth_dev_info_get(port_id, &dev_info);
3266 link = dev->data->dev_link;
3268 if (queue_idx > dev_info.max_tx_queues) {
3270 "Set queue rate limit:port %u: invalid queue id=%u\n",
3271 port_id, queue_idx);
3275 if (tx_rate > link.link_speed) {
3277 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3278 tx_rate, link.link_speed);
3282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3283 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3284 queue_idx, tx_rate));
3288 rte_eth_mirror_rule_set(uint16_t port_id,
3289 struct rte_eth_mirror_conf *mirror_conf,
3290 uint8_t rule_id, uint8_t on)
3292 struct rte_eth_dev *dev;
3294 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3295 if (mirror_conf->rule_type == 0) {
3296 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3300 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3301 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3306 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3307 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3308 (mirror_conf->pool_mask == 0)) {
3310 "Invalid mirror pool, pool mask can not be 0\n");
3314 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3315 mirror_conf->vlan.vlan_mask == 0) {
3317 "Invalid vlan mask, vlan mask can not be 0\n");
3321 dev = &rte_eth_devices[port_id];
3322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3324 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3325 mirror_conf, rule_id, on));
3329 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3331 struct rte_eth_dev *dev;
3333 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3335 dev = &rte_eth_devices[port_id];
3336 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3338 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3342 RTE_INIT(eth_dev_init_cb_lists)
3346 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3347 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3351 rte_eth_dev_callback_register(uint16_t port_id,
3352 enum rte_eth_event_type event,
3353 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3355 struct rte_eth_dev *dev;
3356 struct rte_eth_dev_callback *user_cb;
3357 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3363 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3364 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3368 if (port_id == RTE_ETH_ALL) {
3370 last_port = RTE_MAX_ETHPORTS - 1;
3372 next_port = last_port = port_id;
3375 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3378 dev = &rte_eth_devices[next_port];
3380 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3381 if (user_cb->cb_fn == cb_fn &&
3382 user_cb->cb_arg == cb_arg &&
3383 user_cb->event == event) {
3388 /* create a new callback. */
3389 if (user_cb == NULL) {
3390 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3391 sizeof(struct rte_eth_dev_callback), 0);
3392 if (user_cb != NULL) {
3393 user_cb->cb_fn = cb_fn;
3394 user_cb->cb_arg = cb_arg;
3395 user_cb->event = event;
3396 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3399 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3400 rte_eth_dev_callback_unregister(port_id, event,
3406 } while (++next_port <= last_port);
3408 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3413 rte_eth_dev_callback_unregister(uint16_t port_id,
3414 enum rte_eth_event_type event,
3415 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3418 struct rte_eth_dev *dev;
3419 struct rte_eth_dev_callback *cb, *next;
3420 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3426 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3427 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3431 if (port_id == RTE_ETH_ALL) {
3433 last_port = RTE_MAX_ETHPORTS - 1;
3435 next_port = last_port = port_id;
3438 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3441 dev = &rte_eth_devices[next_port];
3443 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3446 next = TAILQ_NEXT(cb, next);
3448 if (cb->cb_fn != cb_fn || cb->event != event ||
3449 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3453 * if this callback is not executing right now,
3456 if (cb->active == 0) {
3457 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3463 } while (++next_port <= last_port);
3465 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3470 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3471 enum rte_eth_event_type event, void *ret_param)
3473 struct rte_eth_dev_callback *cb_lst;
3474 struct rte_eth_dev_callback dev_cb;
3477 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3478 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3479 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3483 if (ret_param != NULL)
3484 dev_cb.ret_param = ret_param;
3486 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3487 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3488 dev_cb.cb_arg, dev_cb.ret_param);
3489 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3492 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3497 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3502 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3504 dev->state = RTE_ETH_DEV_ATTACHED;
3508 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3511 struct rte_eth_dev *dev;
3512 struct rte_intr_handle *intr_handle;
3516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3518 dev = &rte_eth_devices[port_id];
3520 if (!dev->intr_handle) {
3521 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3525 intr_handle = dev->intr_handle;
3526 if (!intr_handle->intr_vec) {
3527 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3531 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3532 vec = intr_handle->intr_vec[qid];
3533 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3534 if (rc && rc != -EEXIST) {
3536 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3537 port_id, qid, op, epfd, vec);
3544 int __rte_experimental
3545 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3547 struct rte_intr_handle *intr_handle;
3548 struct rte_eth_dev *dev;
3549 unsigned int efd_idx;
3553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3555 dev = &rte_eth_devices[port_id];
3557 if (queue_id >= dev->data->nb_rx_queues) {
3558 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3562 if (!dev->intr_handle) {
3563 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3567 intr_handle = dev->intr_handle;
3568 if (!intr_handle->intr_vec) {
3569 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3573 vec = intr_handle->intr_vec[queue_id];
3574 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3575 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3576 fd = intr_handle->efds[efd_idx];
3581 const struct rte_memzone *
3582 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3583 uint16_t queue_id, size_t size, unsigned align,
3586 char z_name[RTE_MEMZONE_NAMESIZE];
3587 const struct rte_memzone *mz;
3590 rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3591 dev->data->port_id, queue_id, ring_name);
3592 if (rc >= RTE_MEMZONE_NAMESIZE) {
3593 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
3594 rte_errno = ENAMETOOLONG;
3598 mz = rte_memzone_lookup(z_name);
3602 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3603 RTE_MEMZONE_IOVA_CONTIG, align);
3606 int __rte_experimental
3607 rte_eth_dev_create(struct rte_device *device, const char *name,
3608 size_t priv_data_size,
3609 ethdev_bus_specific_init ethdev_bus_specific_init,
3610 void *bus_init_params,
3611 ethdev_init_t ethdev_init, void *init_params)
3613 struct rte_eth_dev *ethdev;
3616 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3618 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3619 ethdev = rte_eth_dev_allocate(name);
3623 if (priv_data_size) {
3624 ethdev->data->dev_private = rte_zmalloc_socket(
3625 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3628 if (!ethdev->data->dev_private) {
3629 RTE_LOG(ERR, EAL, "failed to allocate private data");
3635 ethdev = rte_eth_dev_attach_secondary(name);
3637 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3638 "ethdev doesn't exist");
3643 ethdev->device = device;
3645 if (ethdev_bus_specific_init) {
3646 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3649 "ethdev bus specific initialisation failed");
3654 retval = ethdev_init(ethdev, init_params);
3656 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3660 rte_eth_dev_probing_finish(ethdev);
3665 rte_eth_dev_release_port(ethdev);
3669 int __rte_experimental
3670 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3671 ethdev_uninit_t ethdev_uninit)
3675 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3679 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3681 ret = ethdev_uninit(ethdev);
3685 return rte_eth_dev_release_port(ethdev);
3689 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3690 int epfd, int op, void *data)
3693 struct rte_eth_dev *dev;
3694 struct rte_intr_handle *intr_handle;
3697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3699 dev = &rte_eth_devices[port_id];
3700 if (queue_id >= dev->data->nb_rx_queues) {
3701 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3705 if (!dev->intr_handle) {
3706 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3710 intr_handle = dev->intr_handle;
3711 if (!intr_handle->intr_vec) {
3712 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3716 vec = intr_handle->intr_vec[queue_id];
3717 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3718 if (rc && rc != -EEXIST) {
3720 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3721 port_id, queue_id, op, epfd, vec);
3729 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3732 struct rte_eth_dev *dev;
3734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3736 dev = &rte_eth_devices[port_id];
3738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3739 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3744 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3747 struct rte_eth_dev *dev;
3749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3751 dev = &rte_eth_devices[port_id];
3753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3754 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3760 rte_eth_dev_filter_supported(uint16_t port_id,
3761 enum rte_filter_type filter_type)
3763 struct rte_eth_dev *dev;
3765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3767 dev = &rte_eth_devices[port_id];
3768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3769 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3770 RTE_ETH_FILTER_NOP, NULL);
3774 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3775 enum rte_filter_op filter_op, void *arg)
3777 struct rte_eth_dev *dev;
3779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3781 dev = &rte_eth_devices[port_id];
3782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3783 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3787 const struct rte_eth_rxtx_callback *
3788 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3789 rte_rx_callback_fn fn, void *user_param)
3791 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3792 rte_errno = ENOTSUP;
3795 /* check input parameters */
3796 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3797 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3801 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3809 cb->param = user_param;
3811 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3812 /* Add the callbacks in fifo order. */
3813 struct rte_eth_rxtx_callback *tail =
3814 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3817 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3824 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3829 const struct rte_eth_rxtx_callback *
3830 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3831 rte_rx_callback_fn fn, void *user_param)
3833 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3834 rte_errno = ENOTSUP;
3837 /* check input parameters */
3838 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3839 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3844 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3852 cb->param = user_param;
3854 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3855 /* Add the callbacks at fisrt position*/
3856 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3858 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3859 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3864 const struct rte_eth_rxtx_callback *
3865 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3866 rte_tx_callback_fn fn, void *user_param)
3868 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3869 rte_errno = ENOTSUP;
3872 /* check input parameters */
3873 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3874 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3879 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3887 cb->param = user_param;
3889 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3890 /* Add the callbacks in fifo order. */
3891 struct rte_eth_rxtx_callback *tail =
3892 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3895 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3902 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3908 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3909 const struct rte_eth_rxtx_callback *user_cb)
3911 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3914 /* Check input parameters. */
3915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3916 if (user_cb == NULL ||
3917 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3920 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3921 struct rte_eth_rxtx_callback *cb;
3922 struct rte_eth_rxtx_callback **prev_cb;
3925 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3926 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3927 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3929 if (cb == user_cb) {
3930 /* Remove the user cb from the callback list. */
3931 *prev_cb = cb->next;
3936 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3942 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3943 const struct rte_eth_rxtx_callback *user_cb)
3945 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3948 /* Check input parameters. */
3949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3950 if (user_cb == NULL ||
3951 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3954 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3956 struct rte_eth_rxtx_callback *cb;
3957 struct rte_eth_rxtx_callback **prev_cb;
3959 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3960 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3961 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3963 if (cb == user_cb) {
3964 /* Remove the user cb from the callback list. */
3965 *prev_cb = cb->next;
3970 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3976 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3977 struct rte_eth_rxq_info *qinfo)
3979 struct rte_eth_dev *dev;
3981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3986 dev = &rte_eth_devices[port_id];
3987 if (queue_id >= dev->data->nb_rx_queues) {
3988 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3994 memset(qinfo, 0, sizeof(*qinfo));
3995 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4000 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4001 struct rte_eth_txq_info *qinfo)
4003 struct rte_eth_dev *dev;
4005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4010 dev = &rte_eth_devices[port_id];
4011 if (queue_id >= dev->data->nb_tx_queues) {
4012 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4018 memset(qinfo, 0, sizeof(*qinfo));
4019 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4025 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4026 struct rte_ether_addr *mc_addr_set,
4027 uint32_t nb_mc_addr)
4029 struct rte_eth_dev *dev;
4031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4033 dev = &rte_eth_devices[port_id];
4034 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4035 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4036 mc_addr_set, nb_mc_addr));
4040 rte_eth_timesync_enable(uint16_t port_id)
4042 struct rte_eth_dev *dev;
4044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4045 dev = &rte_eth_devices[port_id];
4047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4048 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4052 rte_eth_timesync_disable(uint16_t port_id)
4054 struct rte_eth_dev *dev;
4056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4057 dev = &rte_eth_devices[port_id];
4059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4060 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4064 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4067 struct rte_eth_dev *dev;
4069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4070 dev = &rte_eth_devices[port_id];
4072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4073 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4074 (dev, timestamp, flags));
4078 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4079 struct timespec *timestamp)
4081 struct rte_eth_dev *dev;
4083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4084 dev = &rte_eth_devices[port_id];
4086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4087 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4092 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4097 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4100 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4105 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4107 struct rte_eth_dev *dev;
4109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4110 dev = &rte_eth_devices[port_id];
4112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4113 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4118 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4120 struct rte_eth_dev *dev;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4123 dev = &rte_eth_devices[port_id];
4125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4126 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4131 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4133 struct rte_eth_dev *dev;
4135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4137 dev = &rte_eth_devices[port_id];
4138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4139 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4143 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4145 struct rte_eth_dev *dev;
4147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4149 dev = &rte_eth_devices[port_id];
4150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4151 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4155 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4157 struct rte_eth_dev *dev;
4159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4161 dev = &rte_eth_devices[port_id];
4162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4163 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4167 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4169 struct rte_eth_dev *dev;
4171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4173 dev = &rte_eth_devices[port_id];
4174 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4175 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4178 int __rte_experimental
4179 rte_eth_dev_get_module_info(uint16_t port_id,
4180 struct rte_eth_dev_module_info *modinfo)
4182 struct rte_eth_dev *dev;
4184 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4186 dev = &rte_eth_devices[port_id];
4187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4188 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4191 int __rte_experimental
4192 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4193 struct rte_dev_eeprom_info *info)
4195 struct rte_eth_dev *dev;
4197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4201 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4205 rte_eth_dev_get_dcb_info(uint16_t port_id,
4206 struct rte_eth_dcb_info *dcb_info)
4208 struct rte_eth_dev *dev;
4210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4212 dev = &rte_eth_devices[port_id];
4213 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4215 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4216 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4220 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4221 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4223 struct rte_eth_dev *dev;
4225 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4226 if (l2_tunnel == NULL) {
4227 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4231 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4232 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4236 dev = &rte_eth_devices[port_id];
4237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4239 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4244 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4245 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4249 struct rte_eth_dev *dev;
4251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4253 if (l2_tunnel == NULL) {
4254 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4258 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4259 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4264 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4268 dev = &rte_eth_devices[port_id];
4269 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4271 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4272 l2_tunnel, mask, en));
4276 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4277 const struct rte_eth_desc_lim *desc_lim)
4279 if (desc_lim->nb_align != 0)
4280 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4282 if (desc_lim->nb_max != 0)
4283 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4285 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4289 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4290 uint16_t *nb_rx_desc,
4291 uint16_t *nb_tx_desc)
4293 struct rte_eth_dev *dev;
4294 struct rte_eth_dev_info dev_info;
4296 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4298 dev = &rte_eth_devices[port_id];
4299 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4301 rte_eth_dev_info_get(port_id, &dev_info);
4303 if (nb_rx_desc != NULL)
4304 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4306 if (nb_tx_desc != NULL)
4307 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4313 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4315 struct rte_eth_dev *dev;
4317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4322 dev = &rte_eth_devices[port_id];
4324 if (*dev->dev_ops->pool_ops_supported == NULL)
4325 return 1; /* all pools are supported */
4327 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4331 * A set of values to describe the possible states of a switch domain.
4333 enum rte_eth_switch_domain_state {
4334 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4335 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4339 * Array of switch domains available for allocation. Array is sized to
4340 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4341 * ethdev ports in a single process.
4343 static struct rte_eth_dev_switch {
4344 enum rte_eth_switch_domain_state state;
4345 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4347 int __rte_experimental
4348 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4352 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4354 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4355 i < RTE_MAX_ETHPORTS; i++) {
4356 if (rte_eth_switch_domains[i].state ==
4357 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4358 rte_eth_switch_domains[i].state =
4359 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4368 int __rte_experimental
4369 rte_eth_switch_domain_free(uint16_t domain_id)
4371 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4372 domain_id >= RTE_MAX_ETHPORTS)
4375 if (rte_eth_switch_domains[domain_id].state !=
4376 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4379 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4385 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4388 struct rte_kvargs_pair *pair;
4391 arglist->str = strdup(str_in);
4392 if (arglist->str == NULL)
4395 letter = arglist->str;
4398 pair = &arglist->pairs[0];
4401 case 0: /* Initial */
4404 else if (*letter == '\0')
4411 case 1: /* Parsing key */
4412 if (*letter == '=') {
4414 pair->value = letter + 1;
4416 } else if (*letter == ',' || *letter == '\0')
4421 case 2: /* Parsing value */
4424 else if (*letter == ',') {
4427 pair = &arglist->pairs[arglist->count];
4429 } else if (*letter == '\0') {
4432 pair = &arglist->pairs[arglist->count];
4437 case 3: /* Parsing list */
4440 else if (*letter == '\0')
4448 int __rte_experimental
4449 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4451 struct rte_kvargs args;
4452 struct rte_kvargs_pair *pair;
4456 memset(eth_da, 0, sizeof(*eth_da));
4458 result = rte_eth_devargs_tokenise(&args, dargs);
4462 for (i = 0; i < args.count; i++) {
4463 pair = &args.pairs[i];
4464 if (strcmp("representor", pair->key) == 0) {
4465 result = rte_eth_devargs_parse_list(pair->value,
4466 rte_eth_devargs_parse_representor_ports,
4480 RTE_INIT(ethdev_init_log)
4482 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4483 if (rte_eth_dev_logtype >= 0)
4484 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);