1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
505 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
511 * Attach to a port already registered by the primary process, which
512 * makes sure that the same device would have the same port id both
513 * in the primary and secondary process.
516 rte_eth_dev_attach_secondary(const char *name)
519 struct rte_eth_dev *eth_dev = NULL;
521 rte_eth_dev_shared_data_prepare();
523 /* Synchronize port attachment to primary port creation and release. */
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
530 if (i == RTE_MAX_ETHPORTS) {
532 "Device %s is not driven by the primary process\n",
535 eth_dev = eth_dev_get(i);
536 RTE_ASSERT(eth_dev->data->port_id == i);
539 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
549 rte_eth_dev_shared_data_prepare();
551 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552 rte_eth_dev_callback_process(eth_dev,
553 RTE_ETH_EVENT_DESTROY, NULL);
555 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557 eth_dev->state = RTE_ETH_DEV_UNUSED;
559 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
560 rte_free(eth_dev->data->rx_queues);
561 rte_free(eth_dev->data->tx_queues);
562 rte_free(eth_dev->data->mac_addrs);
563 rte_free(eth_dev->data->hash_mac_addrs);
564 rte_free(eth_dev->data->dev_private);
565 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
568 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
574 rte_eth_dev_is_valid_port(uint16_t port_id)
576 if (port_id >= RTE_MAX_ETHPORTS ||
577 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
584 rte_eth_is_valid_owner_id(uint64_t owner_id)
586 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
587 rte_eth_dev_shared_data->next_owner_id <= owner_id)
593 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
595 port_id = rte_eth_find_next(port_id);
596 while (port_id < RTE_MAX_ETHPORTS &&
597 rte_eth_devices[port_id].data->owner.id != owner_id)
598 port_id = rte_eth_find_next(port_id + 1);
604 rte_eth_dev_owner_new(uint64_t *owner_id)
606 rte_eth_dev_shared_data_prepare();
608 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
610 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
612 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
617 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
618 const struct rte_eth_dev_owner *new_owner)
620 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
621 struct rte_eth_dev_owner *port_owner;
623 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
624 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
629 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
630 !rte_eth_is_valid_owner_id(old_owner_id)) {
632 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
633 old_owner_id, new_owner->id);
637 port_owner = &rte_eth_devices[port_id].data->owner;
638 if (port_owner->id != old_owner_id) {
640 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
641 port_id, port_owner->name, port_owner->id);
645 /* can not truncate (same structure) */
646 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
648 port_owner->id = new_owner->id;
650 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
651 port_id, new_owner->name, new_owner->id);
657 rte_eth_dev_owner_set(const uint16_t port_id,
658 const struct rte_eth_dev_owner *owner)
662 rte_eth_dev_shared_data_prepare();
664 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
666 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
668 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
673 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
675 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
676 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
679 rte_eth_dev_shared_data_prepare();
681 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
683 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
685 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
690 rte_eth_dev_owner_delete(const uint64_t owner_id)
695 rte_eth_dev_shared_data_prepare();
697 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699 if (rte_eth_is_valid_owner_id(owner_id)) {
700 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
701 if (rte_eth_devices[port_id].data->owner.id == owner_id)
702 memset(&rte_eth_devices[port_id].data->owner, 0,
703 sizeof(struct rte_eth_dev_owner));
704 RTE_ETHDEV_LOG(NOTICE,
705 "All port owners owned by %016"PRIx64" identifier have removed\n",
709 "Invalid owner id=%016"PRIx64"\n",
714 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
720 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
723 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
725 rte_eth_dev_shared_data_prepare();
727 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
729 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
730 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
734 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
737 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
742 rte_eth_dev_socket_id(uint16_t port_id)
744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
745 return rte_eth_devices[port_id].data->numa_node;
749 rte_eth_dev_get_sec_ctx(uint16_t port_id)
751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
752 return rte_eth_devices[port_id].security_ctx;
756 rte_eth_dev_count_avail(void)
763 RTE_ETH_FOREACH_DEV(p)
770 rte_eth_dev_count_total(void)
772 uint16_t port, count = 0;
774 RTE_ETH_FOREACH_VALID_DEV(port)
781 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
792 /* shouldn't check 'rte_eth_devices[i].data',
793 * because it might be overwritten by VDEV PMD */
794 tmp = rte_eth_dev_shared_data->data[port_id].name;
800 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
805 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
809 RTE_ETH_FOREACH_VALID_DEV(pid)
810 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
819 eth_err(uint16_t port_id, int ret)
823 if (rte_eth_dev_is_removed(port_id))
829 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
831 uint16_t old_nb_queues = dev->data->nb_rx_queues;
835 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
836 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
837 sizeof(dev->data->rx_queues[0]) * nb_queues,
838 RTE_CACHE_LINE_SIZE);
839 if (dev->data->rx_queues == NULL) {
840 dev->data->nb_rx_queues = 0;
843 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
846 rxq = dev->data->rx_queues;
848 for (i = nb_queues; i < old_nb_queues; i++)
849 (*dev->dev_ops->rx_queue_release)(rxq[i]);
850 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
851 RTE_CACHE_LINE_SIZE);
854 if (nb_queues > old_nb_queues) {
855 uint16_t new_qs = nb_queues - old_nb_queues;
857 memset(rxq + old_nb_queues, 0,
858 sizeof(rxq[0]) * new_qs);
861 dev->data->rx_queues = rxq;
863 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
866 rxq = dev->data->rx_queues;
868 for (i = nb_queues; i < old_nb_queues; i++)
869 (*dev->dev_ops->rx_queue_release)(rxq[i]);
871 rte_free(dev->data->rx_queues);
872 dev->data->rx_queues = NULL;
874 dev->data->nb_rx_queues = nb_queues;
879 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
881 struct rte_eth_dev *dev;
883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
885 dev = &rte_eth_devices[port_id];
886 if (!dev->data->dev_started) {
888 "Port %u must be started before start any queue\n",
893 if (rx_queue_id >= dev->data->nb_rx_queues) {
894 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
900 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
902 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
903 rx_queue_id, port_id);
907 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
909 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
910 rx_queue_id, port_id);
914 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
920 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
922 struct rte_eth_dev *dev;
924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926 dev = &rte_eth_devices[port_id];
927 if (rx_queue_id >= dev->data->nb_rx_queues) {
928 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
934 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
936 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
937 rx_queue_id, port_id);
941 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
943 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
944 rx_queue_id, port_id);
948 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
953 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
955 struct rte_eth_dev *dev;
957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
959 dev = &rte_eth_devices[port_id];
960 if (!dev->data->dev_started) {
962 "Port %u must be started before start any queue\n",
967 if (tx_queue_id >= dev->data->nb_tx_queues) {
968 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
974 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
976 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
977 tx_queue_id, port_id);
981 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
983 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
984 tx_queue_id, port_id);
988 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
992 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
994 struct rte_eth_dev *dev;
996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
998 dev = &rte_eth_devices[port_id];
999 if (tx_queue_id >= dev->data->nb_tx_queues) {
1000 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1006 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1007 RTE_ETHDEV_LOG(INFO,
1008 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1009 tx_queue_id, port_id);
1013 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1014 RTE_ETHDEV_LOG(INFO,
1015 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1016 tx_queue_id, port_id);
1020 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1025 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1027 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1031 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1032 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1033 sizeof(dev->data->tx_queues[0]) * nb_queues,
1034 RTE_CACHE_LINE_SIZE);
1035 if (dev->data->tx_queues == NULL) {
1036 dev->data->nb_tx_queues = 0;
1039 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1040 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1042 txq = dev->data->tx_queues;
1044 for (i = nb_queues; i < old_nb_queues; i++)
1045 (*dev->dev_ops->tx_queue_release)(txq[i]);
1046 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1047 RTE_CACHE_LINE_SIZE);
1050 if (nb_queues > old_nb_queues) {
1051 uint16_t new_qs = nb_queues - old_nb_queues;
1053 memset(txq + old_nb_queues, 0,
1054 sizeof(txq[0]) * new_qs);
1057 dev->data->tx_queues = txq;
1059 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1062 txq = dev->data->tx_queues;
1064 for (i = nb_queues; i < old_nb_queues; i++)
1065 (*dev->dev_ops->tx_queue_release)(txq[i]);
1067 rte_free(dev->data->tx_queues);
1068 dev->data->tx_queues = NULL;
1070 dev->data->nb_tx_queues = nb_queues;
1075 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1078 case ETH_SPEED_NUM_10M:
1079 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1080 case ETH_SPEED_NUM_100M:
1081 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1082 case ETH_SPEED_NUM_1G:
1083 return ETH_LINK_SPEED_1G;
1084 case ETH_SPEED_NUM_2_5G:
1085 return ETH_LINK_SPEED_2_5G;
1086 case ETH_SPEED_NUM_5G:
1087 return ETH_LINK_SPEED_5G;
1088 case ETH_SPEED_NUM_10G:
1089 return ETH_LINK_SPEED_10G;
1090 case ETH_SPEED_NUM_20G:
1091 return ETH_LINK_SPEED_20G;
1092 case ETH_SPEED_NUM_25G:
1093 return ETH_LINK_SPEED_25G;
1094 case ETH_SPEED_NUM_40G:
1095 return ETH_LINK_SPEED_40G;
1096 case ETH_SPEED_NUM_50G:
1097 return ETH_LINK_SPEED_50G;
1098 case ETH_SPEED_NUM_56G:
1099 return ETH_LINK_SPEED_56G;
1100 case ETH_SPEED_NUM_100G:
1101 return ETH_LINK_SPEED_100G;
1102 case ETH_SPEED_NUM_200G:
1103 return ETH_LINK_SPEED_200G;
1110 rte_eth_dev_rx_offload_name(uint64_t offload)
1112 const char *name = "UNKNOWN";
1115 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1116 if (offload == rte_rx_offload_names[i].offload) {
1117 name = rte_rx_offload_names[i].name;
1126 rte_eth_dev_tx_offload_name(uint64_t offload)
1128 const char *name = "UNKNOWN";
1131 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1132 if (offload == rte_tx_offload_names[i].offload) {
1133 name = rte_tx_offload_names[i].name;
1142 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1143 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1147 if (dev_info_size == 0) {
1148 if (config_size != max_rx_pkt_len) {
1149 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1150 " %u != %u is not allowed\n",
1151 port_id, config_size, max_rx_pkt_len);
1154 } else if (config_size > dev_info_size) {
1155 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1156 "> max allowed value %u\n", port_id, config_size,
1159 } else if (config_size < RTE_ETHER_MIN_LEN) {
1160 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1161 "< min allowed value %u\n", port_id, config_size,
1162 (unsigned int)RTE_ETHER_MIN_LEN);
1169 * Validate offloads that are requested through rte_eth_dev_configure against
1170 * the offloads successfully set by the ethernet device.
1173 * The port identifier of the Ethernet device.
1174 * @param req_offloads
1175 * The offloads that have been requested through `rte_eth_dev_configure`.
1176 * @param set_offloads
1177 * The offloads successfully set by the ethernet device.
1178 * @param offload_type
1179 * The offload type i.e. Rx/Tx string.
1180 * @param offload_name
1181 * The function that prints the offload name.
1183 * - (0) if validation successful.
1184 * - (-EINVAL) if requested offload has been silently disabled.
1188 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1189 uint64_t set_offloads, const char *offload_type,
1190 const char *(*offload_name)(uint64_t))
1192 uint64_t offloads_diff = req_offloads ^ set_offloads;
1196 while (offloads_diff != 0) {
1197 /* Check if any offload is requested but not enabled. */
1198 offload = 1ULL << __builtin_ctzll(offloads_diff);
1199 if (offload & req_offloads) {
1201 "Port %u failed to enable %s offload %s\n",
1202 port_id, offload_type, offload_name(offload));
1206 /* Check if offload couldn't be disabled. */
1207 if (offload & set_offloads) {
1208 RTE_ETHDEV_LOG(DEBUG,
1209 "Port %u %s offload %s is not requested but enabled\n",
1210 port_id, offload_type, offload_name(offload));
1213 offloads_diff &= ~offload;
1220 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1221 const struct rte_eth_conf *dev_conf)
1223 struct rte_eth_dev *dev;
1224 struct rte_eth_dev_info dev_info;
1225 struct rte_eth_conf orig_conf;
1229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1231 dev = &rte_eth_devices[port_id];
1233 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1235 if (dev->data->dev_started) {
1237 "Port %u must be stopped to allow configuration\n",
1242 /* Store original config, as rollback required on failure */
1243 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1246 * Copy the dev_conf parameter into the dev structure.
1247 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1249 if (dev_conf != &dev->data->dev_conf)
1250 memcpy(&dev->data->dev_conf, dev_conf,
1251 sizeof(dev->data->dev_conf));
1253 ret = rte_eth_dev_info_get(port_id, &dev_info);
1257 /* If number of queues specified by application for both Rx and Tx is
1258 * zero, use driver preferred values. This cannot be done individually
1259 * as it is valid for either Tx or Rx (but not both) to be zero.
1260 * If driver does not provide any preferred valued, fall back on
1263 if (nb_rx_q == 0 && nb_tx_q == 0) {
1264 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1266 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1267 nb_tx_q = dev_info.default_txportconf.nb_queues;
1269 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1272 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1274 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1275 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1280 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1282 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1283 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1289 * Check that the numbers of RX and TX queues are not greater
1290 * than the maximum number of RX and TX queues supported by the
1291 * configured device.
1293 if (nb_rx_q > dev_info.max_rx_queues) {
1294 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1295 port_id, nb_rx_q, dev_info.max_rx_queues);
1300 if (nb_tx_q > dev_info.max_tx_queues) {
1301 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1302 port_id, nb_tx_q, dev_info.max_tx_queues);
1307 /* Check that the device supports requested interrupts */
1308 if ((dev_conf->intr_conf.lsc == 1) &&
1309 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1310 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1311 dev->device->driver->name);
1315 if ((dev_conf->intr_conf.rmv == 1) &&
1316 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1317 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1318 dev->device->driver->name);
1324 * If jumbo frames are enabled, check that the maximum RX packet
1325 * length is supported by the configured device.
1327 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1328 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1330 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1331 port_id, dev_conf->rxmode.max_rx_pkt_len,
1332 dev_info.max_rx_pktlen);
1335 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1337 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1338 port_id, dev_conf->rxmode.max_rx_pkt_len,
1339 (unsigned int)RTE_ETHER_MIN_LEN);
1344 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1345 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1346 /* Use default value */
1347 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1352 * If LRO is enabled, check that the maximum aggregated packet
1353 * size is supported by the configured device.
1355 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1356 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1357 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1358 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1359 ret = check_lro_pkt_size(port_id,
1360 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1361 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1362 dev_info.max_lro_pkt_size);
1367 /* Any requested offloading must be within its device capabilities */
1368 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1369 dev_conf->rxmode.offloads) {
1371 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1372 "capabilities 0x%"PRIx64" in %s()\n",
1373 port_id, dev_conf->rxmode.offloads,
1374 dev_info.rx_offload_capa,
1379 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1380 dev_conf->txmode.offloads) {
1382 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1383 "capabilities 0x%"PRIx64" in %s()\n",
1384 port_id, dev_conf->txmode.offloads,
1385 dev_info.tx_offload_capa,
1391 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1392 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1394 /* Check that device supports requested rss hash functions. */
1395 if ((dev_info.flow_type_rss_offloads |
1396 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1397 dev_info.flow_type_rss_offloads) {
1399 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1400 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1401 dev_info.flow_type_rss_offloads);
1406 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1407 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1408 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1410 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1412 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1418 * Setup new number of RX/TX queues and reconfigure device.
1420 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1423 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1429 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1432 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1434 rte_eth_dev_rx_queue_config(dev, 0);
1439 diag = (*dev->dev_ops->dev_configure)(dev);
1441 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1443 ret = eth_err(port_id, diag);
1447 /* Initialize Rx profiling if enabled at compilation time. */
1448 diag = __rte_eth_dev_profile_init(port_id, dev);
1450 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1452 ret = eth_err(port_id, diag);
1456 /* Validate Rx offloads. */
1457 diag = validate_offloads(port_id,
1458 dev_conf->rxmode.offloads,
1459 dev->data->dev_conf.rxmode.offloads, "Rx",
1460 rte_eth_dev_rx_offload_name);
1466 /* Validate Tx offloads. */
1467 diag = validate_offloads(port_id,
1468 dev_conf->txmode.offloads,
1469 dev->data->dev_conf.txmode.offloads, "Tx",
1470 rte_eth_dev_tx_offload_name);
1476 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1479 rte_eth_dev_rx_queue_config(dev, 0);
1480 rte_eth_dev_tx_queue_config(dev, 0);
1482 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1484 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1489 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1491 if (dev->data->dev_started) {
1492 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1493 dev->data->port_id);
1497 rte_eth_dev_rx_queue_config(dev, 0);
1498 rte_eth_dev_tx_queue_config(dev, 0);
1500 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1504 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1505 struct rte_eth_dev_info *dev_info)
1507 struct rte_ether_addr *addr;
1512 /* replay MAC address configuration including default MAC */
1513 addr = &dev->data->mac_addrs[0];
1514 if (*dev->dev_ops->mac_addr_set != NULL)
1515 (*dev->dev_ops->mac_addr_set)(dev, addr);
1516 else if (*dev->dev_ops->mac_addr_add != NULL)
1517 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1519 if (*dev->dev_ops->mac_addr_add != NULL) {
1520 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1521 addr = &dev->data->mac_addrs[i];
1523 /* skip zero address */
1524 if (rte_is_zero_ether_addr(addr))
1528 pool_mask = dev->data->mac_pool_sel[i];
1531 if (pool_mask & 1ULL)
1532 (*dev->dev_ops->mac_addr_add)(dev,
1536 } while (pool_mask);
1542 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1543 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1547 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1548 rte_eth_dev_mac_restore(dev, dev_info);
1550 /* replay promiscuous configuration */
1552 * use callbacks directly since we don't need port_id check and
1553 * would like to bypass the same value set
1555 if (rte_eth_promiscuous_get(port_id) == 1 &&
1556 *dev->dev_ops->promiscuous_enable != NULL) {
1557 ret = eth_err(port_id,
1558 (*dev->dev_ops->promiscuous_enable)(dev));
1559 if (ret != 0 && ret != -ENOTSUP) {
1561 "Failed to enable promiscuous mode for device (port %u): %s\n",
1562 port_id, rte_strerror(-ret));
1565 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1566 *dev->dev_ops->promiscuous_disable != NULL) {
1567 ret = eth_err(port_id,
1568 (*dev->dev_ops->promiscuous_disable)(dev));
1569 if (ret != 0 && ret != -ENOTSUP) {
1571 "Failed to disable promiscuous mode for device (port %u): %s\n",
1572 port_id, rte_strerror(-ret));
1577 /* replay all multicast configuration */
1579 * use callbacks directly since we don't need port_id check and
1580 * would like to bypass the same value set
1582 if (rte_eth_allmulticast_get(port_id) == 1 &&
1583 *dev->dev_ops->allmulticast_enable != NULL) {
1584 ret = eth_err(port_id,
1585 (*dev->dev_ops->allmulticast_enable)(dev));
1586 if (ret != 0 && ret != -ENOTSUP) {
1588 "Failed to enable allmulticast mode for device (port %u): %s\n",
1589 port_id, rte_strerror(-ret));
1592 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1593 *dev->dev_ops->allmulticast_disable != NULL) {
1594 ret = eth_err(port_id,
1595 (*dev->dev_ops->allmulticast_disable)(dev));
1596 if (ret != 0 && ret != -ENOTSUP) {
1598 "Failed to disable allmulticast mode for device (port %u): %s\n",
1599 port_id, rte_strerror(-ret));
1608 rte_eth_dev_start(uint16_t port_id)
1610 struct rte_eth_dev *dev;
1611 struct rte_eth_dev_info dev_info;
1615 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1617 dev = &rte_eth_devices[port_id];
1619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1621 if (dev->data->dev_started != 0) {
1622 RTE_ETHDEV_LOG(INFO,
1623 "Device with port_id=%"PRIu16" already started\n",
1628 ret = rte_eth_dev_info_get(port_id, &dev_info);
1632 /* Lets restore MAC now if device does not support live change */
1633 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1634 rte_eth_dev_mac_restore(dev, &dev_info);
1636 diag = (*dev->dev_ops->dev_start)(dev);
1638 dev->data->dev_started = 1;
1640 return eth_err(port_id, diag);
1642 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1645 "Error during restoring configuration for device (port %u): %s\n",
1646 port_id, rte_strerror(-ret));
1647 rte_eth_dev_stop(port_id);
1651 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1653 (*dev->dev_ops->link_update)(dev, 0);
1656 rte_ethdev_trace_start(port_id);
1661 rte_eth_dev_stop(uint16_t port_id)
1663 struct rte_eth_dev *dev;
1665 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1666 dev = &rte_eth_devices[port_id];
1668 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1670 if (dev->data->dev_started == 0) {
1671 RTE_ETHDEV_LOG(INFO,
1672 "Device with port_id=%"PRIu16" already stopped\n",
1677 dev->data->dev_started = 0;
1678 (*dev->dev_ops->dev_stop)(dev);
1679 rte_ethdev_trace_stop(port_id);
1683 rte_eth_dev_set_link_up(uint16_t port_id)
1685 struct rte_eth_dev *dev;
1687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1689 dev = &rte_eth_devices[port_id];
1691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1692 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1696 rte_eth_dev_set_link_down(uint16_t port_id)
1698 struct rte_eth_dev *dev;
1700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1702 dev = &rte_eth_devices[port_id];
1704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1705 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1709 rte_eth_dev_close(uint16_t port_id)
1711 struct rte_eth_dev *dev;
1713 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1714 dev = &rte_eth_devices[port_id];
1716 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1717 dev->data->dev_started = 0;
1718 (*dev->dev_ops->dev_close)(dev);
1720 rte_ethdev_trace_close(port_id);
1721 /* check behaviour flag - temporary for PMD migration */
1722 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1723 /* new behaviour: send event + reset state + free all data */
1724 rte_eth_dev_release_port(dev);
1727 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1728 "The driver %s should migrate to the new behaviour.\n",
1729 dev->device->driver->name);
1730 /* old behaviour: only free queue arrays */
1731 dev->data->nb_rx_queues = 0;
1732 rte_free(dev->data->rx_queues);
1733 dev->data->rx_queues = NULL;
1734 dev->data->nb_tx_queues = 0;
1735 rte_free(dev->data->tx_queues);
1736 dev->data->tx_queues = NULL;
1740 rte_eth_dev_reset(uint16_t port_id)
1742 struct rte_eth_dev *dev;
1745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1746 dev = &rte_eth_devices[port_id];
1748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1750 rte_eth_dev_stop(port_id);
1751 ret = dev->dev_ops->dev_reset(dev);
1753 return eth_err(port_id, ret);
1757 rte_eth_dev_is_removed(uint16_t port_id)
1759 struct rte_eth_dev *dev;
1762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1764 dev = &rte_eth_devices[port_id];
1766 if (dev->state == RTE_ETH_DEV_REMOVED)
1769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1771 ret = dev->dev_ops->is_removed(dev);
1773 /* Device is physically removed. */
1774 dev->state = RTE_ETH_DEV_REMOVED;
1780 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1781 uint16_t nb_rx_desc, unsigned int socket_id,
1782 const struct rte_eth_rxconf *rx_conf,
1783 struct rte_mempool *mp)
1786 uint32_t mbp_buf_size;
1787 struct rte_eth_dev *dev;
1788 struct rte_eth_dev_info dev_info;
1789 struct rte_eth_rxconf local_conf;
1792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1794 dev = &rte_eth_devices[port_id];
1795 if (rx_queue_id >= dev->data->nb_rx_queues) {
1796 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1801 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1808 * Check the size of the mbuf data buffer.
1809 * This value must be provided in the private data of the memory pool.
1810 * First check that the memory pool has a valid private data.
1812 ret = rte_eth_dev_info_get(port_id, &dev_info);
1816 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1817 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1818 mp->name, (int)mp->private_data_size,
1819 (int)sizeof(struct rte_pktmbuf_pool_private));
1822 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1824 if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1826 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1827 mp->name, (int)mbp_buf_size,
1828 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1829 (int)RTE_PKTMBUF_HEADROOM,
1830 (int)dev_info.min_rx_bufsize);
1834 /* Use default specified by driver, if nb_rx_desc is zero */
1835 if (nb_rx_desc == 0) {
1836 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1837 /* If driver default is also zero, fall back on EAL default */
1838 if (nb_rx_desc == 0)
1839 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1842 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1843 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1844 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1847 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1848 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1849 dev_info.rx_desc_lim.nb_min,
1850 dev_info.rx_desc_lim.nb_align);
1854 if (dev->data->dev_started &&
1855 !(dev_info.dev_capa &
1856 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1859 if (dev->data->dev_started &&
1860 (dev->data->rx_queue_state[rx_queue_id] !=
1861 RTE_ETH_QUEUE_STATE_STOPPED))
1864 rxq = dev->data->rx_queues;
1865 if (rxq[rx_queue_id]) {
1866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1868 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1869 rxq[rx_queue_id] = NULL;
1872 if (rx_conf == NULL)
1873 rx_conf = &dev_info.default_rxconf;
1875 local_conf = *rx_conf;
1878 * If an offloading has already been enabled in
1879 * rte_eth_dev_configure(), it has been enabled on all queues,
1880 * so there is no need to enable it in this queue again.
1881 * The local_conf.offloads input to underlying PMD only carries
1882 * those offloadings which are only enabled on this queue and
1883 * not enabled on all queues.
1885 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1888 * New added offloadings for this queue are those not enabled in
1889 * rte_eth_dev_configure() and they must be per-queue type.
1890 * A pure per-port offloading can't be enabled on a queue while
1891 * disabled on another queue. A pure per-port offloading can't
1892 * be enabled for any queue as new added one if it hasn't been
1893 * enabled in rte_eth_dev_configure().
1895 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1896 local_conf.offloads) {
1898 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1899 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1900 port_id, rx_queue_id, local_conf.offloads,
1901 dev_info.rx_queue_offload_capa,
1907 * If LRO is enabled, check that the maximum aggregated packet
1908 * size is supported by the configured device.
1910 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1911 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1912 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1913 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1914 int ret = check_lro_pkt_size(port_id,
1915 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1916 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1917 dev_info.max_lro_pkt_size);
1922 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1923 socket_id, &local_conf, mp);
1925 if (!dev->data->min_rx_buf_size ||
1926 dev->data->min_rx_buf_size > mbp_buf_size)
1927 dev->data->min_rx_buf_size = mbp_buf_size;
1930 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1932 return eth_err(port_id, ret);
1936 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1937 uint16_t nb_rx_desc,
1938 const struct rte_eth_hairpin_conf *conf)
1941 struct rte_eth_dev *dev;
1942 struct rte_eth_hairpin_cap cap;
1947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1949 dev = &rte_eth_devices[port_id];
1950 if (rx_queue_id >= dev->data->nb_rx_queues) {
1951 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1954 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1959 /* if nb_rx_desc is zero use max number of desc from the driver. */
1960 if (nb_rx_desc == 0)
1961 nb_rx_desc = cap.max_nb_desc;
1962 if (nb_rx_desc > cap.max_nb_desc) {
1964 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1965 nb_rx_desc, cap.max_nb_desc);
1968 if (conf->peer_count > cap.max_rx_2_tx) {
1970 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1971 conf->peer_count, cap.max_rx_2_tx);
1974 if (conf->peer_count == 0) {
1976 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1980 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1981 cap.max_nb_queues != UINT16_MAX; i++) {
1982 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1985 if (count > cap.max_nb_queues) {
1986 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1990 if (dev->data->dev_started)
1992 rxq = dev->data->rx_queues;
1993 if (rxq[rx_queue_id] != NULL) {
1994 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1996 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1997 rxq[rx_queue_id] = NULL;
1999 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2002 dev->data->rx_queue_state[rx_queue_id] =
2003 RTE_ETH_QUEUE_STATE_HAIRPIN;
2004 return eth_err(port_id, ret);
2008 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2009 uint16_t nb_tx_desc, unsigned int socket_id,
2010 const struct rte_eth_txconf *tx_conf)
2012 struct rte_eth_dev *dev;
2013 struct rte_eth_dev_info dev_info;
2014 struct rte_eth_txconf local_conf;
2018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2020 dev = &rte_eth_devices[port_id];
2021 if (tx_queue_id >= dev->data->nb_tx_queues) {
2022 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2028 ret = rte_eth_dev_info_get(port_id, &dev_info);
2032 /* Use default specified by driver, if nb_tx_desc is zero */
2033 if (nb_tx_desc == 0) {
2034 nb_tx_desc = dev_info.default_txportconf.ring_size;
2035 /* If driver default is zero, fall back on EAL default */
2036 if (nb_tx_desc == 0)
2037 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2039 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2040 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2041 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2043 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2044 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2045 dev_info.tx_desc_lim.nb_min,
2046 dev_info.tx_desc_lim.nb_align);
2050 if (dev->data->dev_started &&
2051 !(dev_info.dev_capa &
2052 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2055 if (dev->data->dev_started &&
2056 (dev->data->tx_queue_state[tx_queue_id] !=
2057 RTE_ETH_QUEUE_STATE_STOPPED))
2060 txq = dev->data->tx_queues;
2061 if (txq[tx_queue_id]) {
2062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2064 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2065 txq[tx_queue_id] = NULL;
2068 if (tx_conf == NULL)
2069 tx_conf = &dev_info.default_txconf;
2071 local_conf = *tx_conf;
2074 * If an offloading has already been enabled in
2075 * rte_eth_dev_configure(), it has been enabled on all queues,
2076 * so there is no need to enable it in this queue again.
2077 * The local_conf.offloads input to underlying PMD only carries
2078 * those offloadings which are only enabled on this queue and
2079 * not enabled on all queues.
2081 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2084 * New added offloadings for this queue are those not enabled in
2085 * rte_eth_dev_configure() and they must be per-queue type.
2086 * A pure per-port offloading can't be enabled on a queue while
2087 * disabled on another queue. A pure per-port offloading can't
2088 * be enabled for any queue as new added one if it hasn't been
2089 * enabled in rte_eth_dev_configure().
2091 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2092 local_conf.offloads) {
2094 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2095 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2096 port_id, tx_queue_id, local_conf.offloads,
2097 dev_info.tx_queue_offload_capa,
2102 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2103 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2104 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2108 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2109 uint16_t nb_tx_desc,
2110 const struct rte_eth_hairpin_conf *conf)
2112 struct rte_eth_dev *dev;
2113 struct rte_eth_hairpin_cap cap;
2119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2120 dev = &rte_eth_devices[port_id];
2121 if (tx_queue_id >= dev->data->nb_tx_queues) {
2122 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2125 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2130 /* if nb_rx_desc is zero use max number of desc from the driver. */
2131 if (nb_tx_desc == 0)
2132 nb_tx_desc = cap.max_nb_desc;
2133 if (nb_tx_desc > cap.max_nb_desc) {
2135 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2136 nb_tx_desc, cap.max_nb_desc);
2139 if (conf->peer_count > cap.max_tx_2_rx) {
2141 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2142 conf->peer_count, cap.max_tx_2_rx);
2145 if (conf->peer_count == 0) {
2147 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2151 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2152 cap.max_nb_queues != UINT16_MAX; i++) {
2153 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2156 if (count > cap.max_nb_queues) {
2157 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2161 if (dev->data->dev_started)
2163 txq = dev->data->tx_queues;
2164 if (txq[tx_queue_id] != NULL) {
2165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2167 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2168 txq[tx_queue_id] = NULL;
2170 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2171 (dev, tx_queue_id, nb_tx_desc, conf);
2173 dev->data->tx_queue_state[tx_queue_id] =
2174 RTE_ETH_QUEUE_STATE_HAIRPIN;
2175 return eth_err(port_id, ret);
2179 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2180 void *userdata __rte_unused)
2184 for (i = 0; i < unsent; i++)
2185 rte_pktmbuf_free(pkts[i]);
2189 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2192 uint64_t *count = userdata;
2195 for (i = 0; i < unsent; i++)
2196 rte_pktmbuf_free(pkts[i]);
2202 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2203 buffer_tx_error_fn cbfn, void *userdata)
2205 buffer->error_callback = cbfn;
2206 buffer->error_userdata = userdata;
2211 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2218 buffer->size = size;
2219 if (buffer->error_callback == NULL) {
2220 ret = rte_eth_tx_buffer_set_err_callback(
2221 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2228 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2230 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2233 /* Validate Input Data. Bail if not valid or not supported. */
2234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2237 /* Call driver to free pending mbufs. */
2238 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2240 return eth_err(port_id, ret);
2244 rte_eth_promiscuous_enable(uint16_t port_id)
2246 struct rte_eth_dev *dev;
2249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2250 dev = &rte_eth_devices[port_id];
2252 if (dev->data->promiscuous == 1)
2255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2257 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2258 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2260 return eth_err(port_id, diag);
2264 rte_eth_promiscuous_disable(uint16_t port_id)
2266 struct rte_eth_dev *dev;
2269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2270 dev = &rte_eth_devices[port_id];
2272 if (dev->data->promiscuous == 0)
2275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2277 dev->data->promiscuous = 0;
2278 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2280 dev->data->promiscuous = 1;
2282 return eth_err(port_id, diag);
2286 rte_eth_promiscuous_get(uint16_t port_id)
2288 struct rte_eth_dev *dev;
2290 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2292 dev = &rte_eth_devices[port_id];
2293 return dev->data->promiscuous;
2297 rte_eth_allmulticast_enable(uint16_t port_id)
2299 struct rte_eth_dev *dev;
2302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2303 dev = &rte_eth_devices[port_id];
2305 if (dev->data->all_multicast == 1)
2308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2309 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2310 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2312 return eth_err(port_id, diag);
2316 rte_eth_allmulticast_disable(uint16_t port_id)
2318 struct rte_eth_dev *dev;
2321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2322 dev = &rte_eth_devices[port_id];
2324 if (dev->data->all_multicast == 0)
2327 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2328 dev->data->all_multicast = 0;
2329 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2331 dev->data->all_multicast = 1;
2333 return eth_err(port_id, diag);
2337 rte_eth_allmulticast_get(uint16_t port_id)
2339 struct rte_eth_dev *dev;
2341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2343 dev = &rte_eth_devices[port_id];
2344 return dev->data->all_multicast;
2348 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2350 struct rte_eth_dev *dev;
2352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2353 dev = &rte_eth_devices[port_id];
2355 if (dev->data->dev_conf.intr_conf.lsc &&
2356 dev->data->dev_started)
2357 rte_eth_linkstatus_get(dev, eth_link);
2359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2360 (*dev->dev_ops->link_update)(dev, 1);
2361 *eth_link = dev->data->dev_link;
2368 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2370 struct rte_eth_dev *dev;
2372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2373 dev = &rte_eth_devices[port_id];
2375 if (dev->data->dev_conf.intr_conf.lsc &&
2376 dev->data->dev_started)
2377 rte_eth_linkstatus_get(dev, eth_link);
2379 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2380 (*dev->dev_ops->link_update)(dev, 0);
2381 *eth_link = dev->data->dev_link;
2388 rte_eth_link_speed_to_str(uint32_t link_speed)
2390 switch (link_speed) {
2391 case ETH_SPEED_NUM_NONE: return "None";
2392 case ETH_SPEED_NUM_10M: return "10 Mbps";
2393 case ETH_SPEED_NUM_100M: return "100 Mbps";
2394 case ETH_SPEED_NUM_1G: return "1 Gbps";
2395 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2396 case ETH_SPEED_NUM_5G: return "5 Gbps";
2397 case ETH_SPEED_NUM_10G: return "10 Gbps";
2398 case ETH_SPEED_NUM_20G: return "20 Gbps";
2399 case ETH_SPEED_NUM_25G: return "25 Gbps";
2400 case ETH_SPEED_NUM_40G: return "40 Gbps";
2401 case ETH_SPEED_NUM_50G: return "50 Gbps";
2402 case ETH_SPEED_NUM_56G: return "56 Gbps";
2403 case ETH_SPEED_NUM_100G: return "100 Gbps";
2404 case ETH_SPEED_NUM_200G: return "200 Gbps";
2405 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2406 default: return "Invalid";
2411 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2413 if (eth_link->link_status == ETH_LINK_DOWN)
2414 return snprintf(str, len, "Link down");
2416 return snprintf(str, len, "Link up at %s %s %s",
2417 rte_eth_link_speed_to_str(eth_link->link_speed),
2418 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2420 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2421 "Autoneg" : "Fixed");
2425 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2427 struct rte_eth_dev *dev;
2429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2431 dev = &rte_eth_devices[port_id];
2432 memset(stats, 0, sizeof(*stats));
2434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2435 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2436 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2440 rte_eth_stats_reset(uint16_t port_id)
2442 struct rte_eth_dev *dev;
2445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2446 dev = &rte_eth_devices[port_id];
2448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2449 ret = (*dev->dev_ops->stats_reset)(dev);
2451 return eth_err(port_id, ret);
2453 dev->data->rx_mbuf_alloc_failed = 0;
2459 get_xstats_basic_count(struct rte_eth_dev *dev)
2461 uint16_t nb_rxqs, nb_txqs;
2464 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2465 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2467 count = RTE_NB_STATS;
2468 count += nb_rxqs * RTE_NB_RXQ_STATS;
2469 count += nb_txqs * RTE_NB_TXQ_STATS;
2475 get_xstats_count(uint16_t port_id)
2477 struct rte_eth_dev *dev;
2480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2481 dev = &rte_eth_devices[port_id];
2482 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2483 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2486 return eth_err(port_id, count);
2488 if (dev->dev_ops->xstats_get_names != NULL) {
2489 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2491 return eth_err(port_id, count);
2496 count += get_xstats_basic_count(dev);
2502 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2505 int cnt_xstats, idx_xstat;
2507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2510 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2515 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2520 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2521 if (cnt_xstats < 0) {
2522 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2526 /* Get id-name lookup table */
2527 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2529 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2530 port_id, xstats_names, cnt_xstats, NULL)) {
2531 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2535 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2536 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2545 /* retrieve basic stats names */
2547 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2548 struct rte_eth_xstat_name *xstats_names)
2550 int cnt_used_entries = 0;
2551 uint32_t idx, id_queue;
2554 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2555 strlcpy(xstats_names[cnt_used_entries].name,
2556 rte_stats_strings[idx].name,
2557 sizeof(xstats_names[0].name));
2560 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2561 for (id_queue = 0; id_queue < num_q; id_queue++) {
2562 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2563 snprintf(xstats_names[cnt_used_entries].name,
2564 sizeof(xstats_names[0].name),
2566 id_queue, rte_rxq_stats_strings[idx].name);
2571 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2572 for (id_queue = 0; id_queue < num_q; id_queue++) {
2573 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2574 snprintf(xstats_names[cnt_used_entries].name,
2575 sizeof(xstats_names[0].name),
2577 id_queue, rte_txq_stats_strings[idx].name);
2581 return cnt_used_entries;
2584 /* retrieve ethdev extended statistics names */
2586 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2587 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2590 struct rte_eth_xstat_name *xstats_names_copy;
2591 unsigned int no_basic_stat_requested = 1;
2592 unsigned int no_ext_stat_requested = 1;
2593 unsigned int expected_entries;
2594 unsigned int basic_count;
2595 struct rte_eth_dev *dev;
2599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600 dev = &rte_eth_devices[port_id];
2602 basic_count = get_xstats_basic_count(dev);
2603 ret = get_xstats_count(port_id);
2606 expected_entries = (unsigned int)ret;
2608 /* Return max number of stats if no ids given */
2611 return expected_entries;
2612 else if (xstats_names && size < expected_entries)
2613 return expected_entries;
2616 if (ids && !xstats_names)
2619 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2620 uint64_t ids_copy[size];
2622 for (i = 0; i < size; i++) {
2623 if (ids[i] < basic_count) {
2624 no_basic_stat_requested = 0;
2629 * Convert ids to xstats ids that PMD knows.
2630 * ids known by user are basic + extended stats.
2632 ids_copy[i] = ids[i] - basic_count;
2635 if (no_basic_stat_requested)
2636 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2637 xstats_names, ids_copy, size);
2640 /* Retrieve all stats */
2642 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2644 if (num_stats < 0 || num_stats > (int)expected_entries)
2647 return expected_entries;
2650 xstats_names_copy = calloc(expected_entries,
2651 sizeof(struct rte_eth_xstat_name));
2653 if (!xstats_names_copy) {
2654 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2659 for (i = 0; i < size; i++) {
2660 if (ids[i] >= basic_count) {
2661 no_ext_stat_requested = 0;
2667 /* Fill xstats_names_copy structure */
2668 if (ids && no_ext_stat_requested) {
2669 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2671 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2674 free(xstats_names_copy);
2680 for (i = 0; i < size; i++) {
2681 if (ids[i] >= expected_entries) {
2682 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2683 free(xstats_names_copy);
2686 xstats_names[i] = xstats_names_copy[ids[i]];
2689 free(xstats_names_copy);
2694 rte_eth_xstats_get_names(uint16_t port_id,
2695 struct rte_eth_xstat_name *xstats_names,
2698 struct rte_eth_dev *dev;
2699 int cnt_used_entries;
2700 int cnt_expected_entries;
2701 int cnt_driver_entries;
2703 cnt_expected_entries = get_xstats_count(port_id);
2704 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2705 (int)size < cnt_expected_entries)
2706 return cnt_expected_entries;
2708 /* port_id checked in get_xstats_count() */
2709 dev = &rte_eth_devices[port_id];
2711 cnt_used_entries = rte_eth_basic_stats_get_names(
2714 if (dev->dev_ops->xstats_get_names != NULL) {
2715 /* If there are any driver-specific xstats, append them
2718 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2720 xstats_names + cnt_used_entries,
2721 size - cnt_used_entries);
2722 if (cnt_driver_entries < 0)
2723 return eth_err(port_id, cnt_driver_entries);
2724 cnt_used_entries += cnt_driver_entries;
2727 return cnt_used_entries;
2732 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2734 struct rte_eth_dev *dev;
2735 struct rte_eth_stats eth_stats;
2736 unsigned int count = 0, i, q;
2737 uint64_t val, *stats_ptr;
2738 uint16_t nb_rxqs, nb_txqs;
2741 ret = rte_eth_stats_get(port_id, ð_stats);
2745 dev = &rte_eth_devices[port_id];
2747 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2748 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2751 for (i = 0; i < RTE_NB_STATS; i++) {
2752 stats_ptr = RTE_PTR_ADD(ð_stats,
2753 rte_stats_strings[i].offset);
2755 xstats[count++].value = val;
2759 for (q = 0; q < nb_rxqs; q++) {
2760 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2761 stats_ptr = RTE_PTR_ADD(ð_stats,
2762 rte_rxq_stats_strings[i].offset +
2763 q * sizeof(uint64_t));
2765 xstats[count++].value = val;
2770 for (q = 0; q < nb_txqs; q++) {
2771 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2772 stats_ptr = RTE_PTR_ADD(ð_stats,
2773 rte_txq_stats_strings[i].offset +
2774 q * sizeof(uint64_t));
2776 xstats[count++].value = val;
2782 /* retrieve ethdev extended statistics */
2784 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2785 uint64_t *values, unsigned int size)
2787 unsigned int no_basic_stat_requested = 1;
2788 unsigned int no_ext_stat_requested = 1;
2789 unsigned int num_xstats_filled;
2790 unsigned int basic_count;
2791 uint16_t expected_entries;
2792 struct rte_eth_dev *dev;
2796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2797 ret = get_xstats_count(port_id);
2800 expected_entries = (uint16_t)ret;
2801 struct rte_eth_xstat xstats[expected_entries];
2802 dev = &rte_eth_devices[port_id];
2803 basic_count = get_xstats_basic_count(dev);
2805 /* Return max number of stats if no ids given */
2808 return expected_entries;
2809 else if (values && size < expected_entries)
2810 return expected_entries;
2816 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2817 unsigned int basic_count = get_xstats_basic_count(dev);
2818 uint64_t ids_copy[size];
2820 for (i = 0; i < size; i++) {
2821 if (ids[i] < basic_count) {
2822 no_basic_stat_requested = 0;
2827 * Convert ids to xstats ids that PMD knows.
2828 * ids known by user are basic + extended stats.
2830 ids_copy[i] = ids[i] - basic_count;
2833 if (no_basic_stat_requested)
2834 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2839 for (i = 0; i < size; i++) {
2840 if (ids[i] >= basic_count) {
2841 no_ext_stat_requested = 0;
2847 /* Fill the xstats structure */
2848 if (ids && no_ext_stat_requested)
2849 ret = rte_eth_basic_stats_get(port_id, xstats);
2851 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2855 num_xstats_filled = (unsigned int)ret;
2857 /* Return all stats */
2859 for (i = 0; i < num_xstats_filled; i++)
2860 values[i] = xstats[i].value;
2861 return expected_entries;
2865 for (i = 0; i < size; i++) {
2866 if (ids[i] >= expected_entries) {
2867 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2870 values[i] = xstats[ids[i]].value;
2876 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2879 struct rte_eth_dev *dev;
2880 unsigned int count = 0, i;
2881 signed int xcount = 0;
2882 uint16_t nb_rxqs, nb_txqs;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2887 dev = &rte_eth_devices[port_id];
2889 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2890 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2892 /* Return generic statistics */
2893 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2894 (nb_txqs * RTE_NB_TXQ_STATS);
2896 /* implemented by the driver */
2897 if (dev->dev_ops->xstats_get != NULL) {
2898 /* Retrieve the xstats from the driver at the end of the
2901 xcount = (*dev->dev_ops->xstats_get)(dev,
2902 xstats ? xstats + count : NULL,
2903 (n > count) ? n - count : 0);
2906 return eth_err(port_id, xcount);
2909 if (n < count + xcount || xstats == NULL)
2910 return count + xcount;
2912 /* now fill the xstats structure */
2913 ret = rte_eth_basic_stats_get(port_id, xstats);
2918 for (i = 0; i < count; i++)
2920 /* add an offset to driver-specific stats */
2921 for ( ; i < count + xcount; i++)
2922 xstats[i].id += count;
2924 return count + xcount;
2927 /* reset ethdev extended statistics */
2929 rte_eth_xstats_reset(uint16_t port_id)
2931 struct rte_eth_dev *dev;
2933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2934 dev = &rte_eth_devices[port_id];
2936 /* implemented by the driver */
2937 if (dev->dev_ops->xstats_reset != NULL)
2938 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2940 /* fallback to default */
2941 return rte_eth_stats_reset(port_id);
2945 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2948 struct rte_eth_dev *dev;
2950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2952 dev = &rte_eth_devices[port_id];
2954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2956 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2959 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2962 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2965 return (*dev->dev_ops->queue_stats_mapping_set)
2966 (dev, queue_id, stat_idx, is_rx);
2971 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2974 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2975 stat_idx, STAT_QMAP_TX));
2980 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2983 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2984 stat_idx, STAT_QMAP_RX));
2988 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2990 struct rte_eth_dev *dev;
2992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2993 dev = &rte_eth_devices[port_id];
2995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2996 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2997 fw_version, fw_size));
3001 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3003 struct rte_eth_dev *dev;
3004 const struct rte_eth_desc_lim lim = {
3005 .nb_max = UINT16_MAX,
3008 .nb_seg_max = UINT16_MAX,
3009 .nb_mtu_seg_max = UINT16_MAX,
3014 * Init dev_info before port_id check since caller does not have
3015 * return status and does not know if get is successful or not.
3017 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3018 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3021 dev = &rte_eth_devices[port_id];
3023 dev_info->rx_desc_lim = lim;
3024 dev_info->tx_desc_lim = lim;
3025 dev_info->device = dev->device;
3026 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3027 dev_info->max_mtu = UINT16_MAX;
3029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3030 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3032 /* Cleanup already filled in device information */
3033 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3034 return eth_err(port_id, diag);
3037 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3038 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3039 RTE_MAX_QUEUES_PER_PORT);
3040 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3041 RTE_MAX_QUEUES_PER_PORT);
3043 dev_info->driver_name = dev->device->driver->name;
3044 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3045 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3047 dev_info->dev_flags = &dev->data->dev_flags;
3053 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3054 uint32_t *ptypes, int num)
3057 struct rte_eth_dev *dev;
3058 const uint32_t *all_ptypes;
3060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3061 dev = &rte_eth_devices[port_id];
3062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3063 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3068 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3069 if (all_ptypes[i] & ptype_mask) {
3071 ptypes[j] = all_ptypes[i];
3079 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3080 uint32_t *set_ptypes, unsigned int num)
3082 const uint32_t valid_ptype_masks[] = {
3086 RTE_PTYPE_TUNNEL_MASK,
3087 RTE_PTYPE_INNER_L2_MASK,
3088 RTE_PTYPE_INNER_L3_MASK,
3089 RTE_PTYPE_INNER_L4_MASK,
3091 const uint32_t *all_ptypes;
3092 struct rte_eth_dev *dev;
3093 uint32_t unused_mask;
3097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3098 dev = &rte_eth_devices[port_id];
3100 if (num > 0 && set_ptypes == NULL)
3103 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3104 *dev->dev_ops->dev_ptypes_set == NULL) {
3109 if (ptype_mask == 0) {
3110 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3115 unused_mask = ptype_mask;
3116 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3117 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3118 if (mask && mask != valid_ptype_masks[i]) {
3122 unused_mask &= ~valid_ptype_masks[i];
3130 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3131 if (all_ptypes == NULL) {
3137 * Accommodate as many set_ptypes as possible. If the supplied
3138 * set_ptypes array is insufficient fill it partially.
3140 for (i = 0, j = 0; set_ptypes != NULL &&
3141 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3142 if (ptype_mask & all_ptypes[i]) {
3144 set_ptypes[j] = all_ptypes[i];
3152 if (set_ptypes != NULL && j < num)
3153 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3155 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3159 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3165 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3167 struct rte_eth_dev *dev;
3169 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3170 dev = &rte_eth_devices[port_id];
3171 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3177 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3179 struct rte_eth_dev *dev;
3181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3183 dev = &rte_eth_devices[port_id];
3184 *mtu = dev->data->mtu;
3189 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3192 struct rte_eth_dev_info dev_info;
3193 struct rte_eth_dev *dev;
3195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3196 dev = &rte_eth_devices[port_id];
3197 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3200 * Check if the device supports dev_infos_get, if it does not
3201 * skip min_mtu/max_mtu validation here as this requires values
3202 * that are populated within the call to rte_eth_dev_info_get()
3203 * which relies on dev->dev_ops->dev_infos_get.
3205 if (*dev->dev_ops->dev_infos_get != NULL) {
3206 ret = rte_eth_dev_info_get(port_id, &dev_info);
3210 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3214 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3216 dev->data->mtu = mtu;
3218 return eth_err(port_id, ret);
3222 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3224 struct rte_eth_dev *dev;
3227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3228 dev = &rte_eth_devices[port_id];
3229 if (!(dev->data->dev_conf.rxmode.offloads &
3230 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3231 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3236 if (vlan_id > 4095) {
3237 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3243 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3245 struct rte_vlan_filter_conf *vfc;
3249 vfc = &dev->data->vlan_filter_conf;
3250 vidx = vlan_id / 64;
3251 vbit = vlan_id % 64;
3254 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3256 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3259 return eth_err(port_id, ret);
3263 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3266 struct rte_eth_dev *dev;
3268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269 dev = &rte_eth_devices[port_id];
3270 if (rx_queue_id >= dev->data->nb_rx_queues) {
3271 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3275 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3276 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3282 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3283 enum rte_vlan_type vlan_type,
3286 struct rte_eth_dev *dev;
3288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3289 dev = &rte_eth_devices[port_id];
3290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3292 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3297 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3299 struct rte_eth_dev_info dev_info;
3300 struct rte_eth_dev *dev;
3304 uint64_t orig_offloads;
3305 uint64_t dev_offloads;
3306 uint64_t new_offloads;
3308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3309 dev = &rte_eth_devices[port_id];
3311 /* save original values in case of failure */
3312 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3313 dev_offloads = orig_offloads;
3315 /* check which option changed by application */
3316 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3317 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3320 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3322 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3323 mask |= ETH_VLAN_STRIP_MASK;
3326 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3327 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3330 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3332 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3333 mask |= ETH_VLAN_FILTER_MASK;
3336 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3337 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3340 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3342 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3343 mask |= ETH_VLAN_EXTEND_MASK;
3346 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3347 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3350 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3352 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3353 mask |= ETH_QINQ_STRIP_MASK;
3360 ret = rte_eth_dev_info_get(port_id, &dev_info);
3364 /* Rx VLAN offloading must be within its device capabilities */
3365 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3366 new_offloads = dev_offloads & ~orig_offloads;
3368 "Ethdev port_id=%u requested new added VLAN offloads "
3369 "0x%" PRIx64 " must be within Rx offloads capabilities "
3370 "0x%" PRIx64 " in %s()\n",
3371 port_id, new_offloads, dev_info.rx_offload_capa,
3376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3377 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3378 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3380 /* hit an error restore original values */
3381 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3384 return eth_err(port_id, ret);
3388 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3390 struct rte_eth_dev *dev;
3391 uint64_t *dev_offloads;
3394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3395 dev = &rte_eth_devices[port_id];
3396 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3398 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3399 ret |= ETH_VLAN_STRIP_OFFLOAD;
3401 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3402 ret |= ETH_VLAN_FILTER_OFFLOAD;
3404 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3405 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3407 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3408 ret |= ETH_QINQ_STRIP_OFFLOAD;
3414 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3416 struct rte_eth_dev *dev;
3418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3419 dev = &rte_eth_devices[port_id];
3420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3422 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3426 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3428 struct rte_eth_dev *dev;
3430 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3431 dev = &rte_eth_devices[port_id];
3432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3433 memset(fc_conf, 0, sizeof(*fc_conf));
3434 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3438 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3440 struct rte_eth_dev *dev;
3442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3443 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3444 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3448 dev = &rte_eth_devices[port_id];
3449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3450 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3454 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3455 struct rte_eth_pfc_conf *pfc_conf)
3457 struct rte_eth_dev *dev;
3459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3460 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3461 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3465 dev = &rte_eth_devices[port_id];
3466 /* High water, low water validation are device specific */
3467 if (*dev->dev_ops->priority_flow_ctrl_set)
3468 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3474 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3482 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3483 for (i = 0; i < num; i++) {
3484 if (reta_conf[i].mask)
3492 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3496 uint16_t i, idx, shift;
3502 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3506 for (i = 0; i < reta_size; i++) {
3507 idx = i / RTE_RETA_GROUP_SIZE;
3508 shift = i % RTE_RETA_GROUP_SIZE;
3509 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3510 (reta_conf[idx].reta[shift] >= max_rxq)) {
3512 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3514 reta_conf[idx].reta[shift], max_rxq);
3523 rte_eth_dev_rss_reta_update(uint16_t port_id,
3524 struct rte_eth_rss_reta_entry64 *reta_conf,
3527 struct rte_eth_dev *dev;
3530 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3531 /* Check mask bits */
3532 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3536 dev = &rte_eth_devices[port_id];
3538 /* Check entry value */
3539 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3540 dev->data->nb_rx_queues);
3544 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3545 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3550 rte_eth_dev_rss_reta_query(uint16_t port_id,
3551 struct rte_eth_rss_reta_entry64 *reta_conf,
3554 struct rte_eth_dev *dev;
3557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3559 /* Check mask bits */
3560 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3564 dev = &rte_eth_devices[port_id];
3565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3566 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3571 rte_eth_dev_rss_hash_update(uint16_t port_id,
3572 struct rte_eth_rss_conf *rss_conf)
3574 struct rte_eth_dev *dev;
3575 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3580 ret = rte_eth_dev_info_get(port_id, &dev_info);
3584 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3586 dev = &rte_eth_devices[port_id];
3587 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3588 dev_info.flow_type_rss_offloads) {
3590 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3591 port_id, rss_conf->rss_hf,
3592 dev_info.flow_type_rss_offloads);
3595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3596 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3601 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3602 struct rte_eth_rss_conf *rss_conf)
3604 struct rte_eth_dev *dev;
3606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3607 dev = &rte_eth_devices[port_id];
3608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3609 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3614 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3615 struct rte_eth_udp_tunnel *udp_tunnel)
3617 struct rte_eth_dev *dev;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3620 if (udp_tunnel == NULL) {
3621 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3625 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3626 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3630 dev = &rte_eth_devices[port_id];
3631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3632 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3637 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3638 struct rte_eth_udp_tunnel *udp_tunnel)
3640 struct rte_eth_dev *dev;
3642 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3643 dev = &rte_eth_devices[port_id];
3645 if (udp_tunnel == NULL) {
3646 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3650 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3651 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3655 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3656 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3661 rte_eth_led_on(uint16_t port_id)
3663 struct rte_eth_dev *dev;
3665 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3666 dev = &rte_eth_devices[port_id];
3667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3668 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3672 rte_eth_led_off(uint16_t port_id)
3674 struct rte_eth_dev *dev;
3676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3677 dev = &rte_eth_devices[port_id];
3678 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3679 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3683 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3687 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3689 struct rte_eth_dev_info dev_info;
3690 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3694 ret = rte_eth_dev_info_get(port_id, &dev_info);
3698 for (i = 0; i < dev_info.max_mac_addrs; i++)
3699 if (memcmp(addr, &dev->data->mac_addrs[i],
3700 RTE_ETHER_ADDR_LEN) == 0)
3706 static const struct rte_ether_addr null_mac_addr;
3709 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3712 struct rte_eth_dev *dev;
3717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3718 dev = &rte_eth_devices[port_id];
3719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3721 if (rte_is_zero_ether_addr(addr)) {
3722 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3726 if (pool >= ETH_64_POOLS) {
3727 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3731 index = get_mac_addr_index(port_id, addr);
3733 index = get_mac_addr_index(port_id, &null_mac_addr);
3735 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3740 pool_mask = dev->data->mac_pool_sel[index];
3742 /* Check if both MAC address and pool is already there, and do nothing */
3743 if (pool_mask & (1ULL << pool))
3748 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3751 /* Update address in NIC data structure */
3752 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3754 /* Update pool bitmap in NIC data structure */
3755 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3758 return eth_err(port_id, ret);
3762 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3764 struct rte_eth_dev *dev;
3767 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3768 dev = &rte_eth_devices[port_id];
3769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3771 index = get_mac_addr_index(port_id, addr);
3774 "Port %u: Cannot remove default MAC address\n",
3777 } else if (index < 0)
3778 return 0; /* Do nothing if address wasn't found */
3781 (*dev->dev_ops->mac_addr_remove)(dev, index);
3783 /* Update address in NIC data structure */
3784 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3786 /* reset pool bitmap */
3787 dev->data->mac_pool_sel[index] = 0;
3793 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3795 struct rte_eth_dev *dev;
3798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3800 if (!rte_is_valid_assigned_ether_addr(addr))
3803 dev = &rte_eth_devices[port_id];
3804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3806 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3810 /* Update default address in NIC data structure */
3811 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3818 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3822 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3824 struct rte_eth_dev_info dev_info;
3825 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3829 ret = rte_eth_dev_info_get(port_id, &dev_info);
3833 if (!dev->data->hash_mac_addrs)
3836 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3837 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3838 RTE_ETHER_ADDR_LEN) == 0)
3845 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3850 struct rte_eth_dev *dev;
3852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3854 dev = &rte_eth_devices[port_id];
3855 if (rte_is_zero_ether_addr(addr)) {
3856 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3861 index = get_hash_mac_addr_index(port_id, addr);
3862 /* Check if it's already there, and do nothing */
3863 if ((index >= 0) && on)
3869 "Port %u: the MAC address was not set in UTA\n",
3874 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3876 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3883 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3885 /* Update address in NIC data structure */
3887 rte_ether_addr_copy(addr,
3888 &dev->data->hash_mac_addrs[index]);
3890 rte_ether_addr_copy(&null_mac_addr,
3891 &dev->data->hash_mac_addrs[index]);
3894 return eth_err(port_id, ret);
3898 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3900 struct rte_eth_dev *dev;
3902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3904 dev = &rte_eth_devices[port_id];
3906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3907 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3911 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3914 struct rte_eth_dev *dev;
3915 struct rte_eth_dev_info dev_info;
3916 struct rte_eth_link link;
3919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3921 ret = rte_eth_dev_info_get(port_id, &dev_info);
3925 dev = &rte_eth_devices[port_id];
3926 link = dev->data->dev_link;
3928 if (queue_idx > dev_info.max_tx_queues) {
3930 "Set queue rate limit:port %u: invalid queue id=%u\n",
3931 port_id, queue_idx);
3935 if (tx_rate > link.link_speed) {
3937 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3938 tx_rate, link.link_speed);
3942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3943 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3944 queue_idx, tx_rate));
3948 rte_eth_mirror_rule_set(uint16_t port_id,
3949 struct rte_eth_mirror_conf *mirror_conf,
3950 uint8_t rule_id, uint8_t on)
3952 struct rte_eth_dev *dev;
3954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3955 if (mirror_conf->rule_type == 0) {
3956 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3960 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3961 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3966 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3967 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3968 (mirror_conf->pool_mask == 0)) {
3970 "Invalid mirror pool, pool mask can not be 0\n");
3974 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3975 mirror_conf->vlan.vlan_mask == 0) {
3977 "Invalid vlan mask, vlan mask can not be 0\n");
3981 dev = &rte_eth_devices[port_id];
3982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3984 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3985 mirror_conf, rule_id, on));
3989 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3991 struct rte_eth_dev *dev;
3993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3995 dev = &rte_eth_devices[port_id];
3996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3998 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4002 RTE_INIT(eth_dev_init_cb_lists)
4006 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4007 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4011 rte_eth_dev_callback_register(uint16_t port_id,
4012 enum rte_eth_event_type event,
4013 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4015 struct rte_eth_dev *dev;
4016 struct rte_eth_dev_callback *user_cb;
4017 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4023 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4024 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4028 if (port_id == RTE_ETH_ALL) {
4030 last_port = RTE_MAX_ETHPORTS - 1;
4032 next_port = last_port = port_id;
4035 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4038 dev = &rte_eth_devices[next_port];
4040 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4041 if (user_cb->cb_fn == cb_fn &&
4042 user_cb->cb_arg == cb_arg &&
4043 user_cb->event == event) {
4048 /* create a new callback. */
4049 if (user_cb == NULL) {
4050 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4051 sizeof(struct rte_eth_dev_callback), 0);
4052 if (user_cb != NULL) {
4053 user_cb->cb_fn = cb_fn;
4054 user_cb->cb_arg = cb_arg;
4055 user_cb->event = event;
4056 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4059 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4060 rte_eth_dev_callback_unregister(port_id, event,
4066 } while (++next_port <= last_port);
4068 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4073 rte_eth_dev_callback_unregister(uint16_t port_id,
4074 enum rte_eth_event_type event,
4075 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4078 struct rte_eth_dev *dev;
4079 struct rte_eth_dev_callback *cb, *next;
4080 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4086 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4087 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4091 if (port_id == RTE_ETH_ALL) {
4093 last_port = RTE_MAX_ETHPORTS - 1;
4095 next_port = last_port = port_id;
4098 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4101 dev = &rte_eth_devices[next_port];
4103 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4106 next = TAILQ_NEXT(cb, next);
4108 if (cb->cb_fn != cb_fn || cb->event != event ||
4109 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4113 * if this callback is not executing right now,
4116 if (cb->active == 0) {
4117 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4123 } while (++next_port <= last_port);
4125 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4130 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4131 enum rte_eth_event_type event, void *ret_param)
4133 struct rte_eth_dev_callback *cb_lst;
4134 struct rte_eth_dev_callback dev_cb;
4137 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4138 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4139 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4143 if (ret_param != NULL)
4144 dev_cb.ret_param = ret_param;
4146 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4147 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4148 dev_cb.cb_arg, dev_cb.ret_param);
4149 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4152 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4157 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4162 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4164 dev->state = RTE_ETH_DEV_ATTACHED;
4168 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4171 struct rte_eth_dev *dev;
4172 struct rte_intr_handle *intr_handle;
4176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4178 dev = &rte_eth_devices[port_id];
4180 if (!dev->intr_handle) {
4181 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4185 intr_handle = dev->intr_handle;
4186 if (!intr_handle->intr_vec) {
4187 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4191 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4192 vec = intr_handle->intr_vec[qid];
4193 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4194 if (rc && rc != -EEXIST) {
4196 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4197 port_id, qid, op, epfd, vec);
4205 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4207 struct rte_intr_handle *intr_handle;
4208 struct rte_eth_dev *dev;
4209 unsigned int efd_idx;
4213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4215 dev = &rte_eth_devices[port_id];
4217 if (queue_id >= dev->data->nb_rx_queues) {
4218 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4222 if (!dev->intr_handle) {
4223 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4227 intr_handle = dev->intr_handle;
4228 if (!intr_handle->intr_vec) {
4229 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4233 vec = intr_handle->intr_vec[queue_id];
4234 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4235 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4236 fd = intr_handle->efds[efd_idx];
4242 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4243 const char *ring_name)
4245 return snprintf(name, len, "eth_p%d_q%d_%s",
4246 port_id, queue_id, ring_name);
4249 const struct rte_memzone *
4250 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4251 uint16_t queue_id, size_t size, unsigned align,
4254 char z_name[RTE_MEMZONE_NAMESIZE];
4255 const struct rte_memzone *mz;
4258 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4259 queue_id, ring_name);
4260 if (rc >= RTE_MEMZONE_NAMESIZE) {
4261 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4262 rte_errno = ENAMETOOLONG;
4266 mz = rte_memzone_lookup(z_name);
4268 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4270 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4272 "memzone %s does not justify the requested attributes\n",
4280 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4281 RTE_MEMZONE_IOVA_CONTIG, align);
4285 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4288 char z_name[RTE_MEMZONE_NAMESIZE];
4289 const struct rte_memzone *mz;
4292 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4293 queue_id, ring_name);
4294 if (rc >= RTE_MEMZONE_NAMESIZE) {
4295 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4296 return -ENAMETOOLONG;
4299 mz = rte_memzone_lookup(z_name);
4301 rc = rte_memzone_free(mz);
4309 rte_eth_dev_create(struct rte_device *device, const char *name,
4310 size_t priv_data_size,
4311 ethdev_bus_specific_init ethdev_bus_specific_init,
4312 void *bus_init_params,
4313 ethdev_init_t ethdev_init, void *init_params)
4315 struct rte_eth_dev *ethdev;
4318 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4320 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4321 ethdev = rte_eth_dev_allocate(name);
4325 if (priv_data_size) {
4326 ethdev->data->dev_private = rte_zmalloc_socket(
4327 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4330 if (!ethdev->data->dev_private) {
4332 "failed to allocate private data\n");
4338 ethdev = rte_eth_dev_attach_secondary(name);
4341 "secondary process attach failed, ethdev doesn't exist\n");
4346 ethdev->device = device;
4348 if (ethdev_bus_specific_init) {
4349 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4352 "ethdev bus specific initialisation failed\n");
4357 retval = ethdev_init(ethdev, init_params);
4359 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4363 rte_eth_dev_probing_finish(ethdev);
4368 rte_eth_dev_release_port(ethdev);
4373 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4374 ethdev_uninit_t ethdev_uninit)
4378 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4382 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4384 ret = ethdev_uninit(ethdev);
4388 return rte_eth_dev_release_port(ethdev);
4392 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4393 int epfd, int op, void *data)
4396 struct rte_eth_dev *dev;
4397 struct rte_intr_handle *intr_handle;
4400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4402 dev = &rte_eth_devices[port_id];
4403 if (queue_id >= dev->data->nb_rx_queues) {
4404 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4408 if (!dev->intr_handle) {
4409 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4413 intr_handle = dev->intr_handle;
4414 if (!intr_handle->intr_vec) {
4415 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4419 vec = intr_handle->intr_vec[queue_id];
4420 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4421 if (rc && rc != -EEXIST) {
4423 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4424 port_id, queue_id, op, epfd, vec);
4432 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4435 struct rte_eth_dev *dev;
4437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4439 dev = &rte_eth_devices[port_id];
4441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4442 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4447 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4450 struct rte_eth_dev *dev;
4452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4454 dev = &rte_eth_devices[port_id];
4456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4457 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4463 rte_eth_dev_filter_supported(uint16_t port_id,
4464 enum rte_filter_type filter_type)
4466 struct rte_eth_dev *dev;
4468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4470 dev = &rte_eth_devices[port_id];
4471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4472 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4473 RTE_ETH_FILTER_NOP, NULL);
4477 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4478 enum rte_filter_op filter_op, void *arg)
4480 struct rte_eth_dev *dev;
4482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4484 dev = &rte_eth_devices[port_id];
4485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4486 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4490 const struct rte_eth_rxtx_callback *
4491 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4492 rte_rx_callback_fn fn, void *user_param)
4494 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4495 rte_errno = ENOTSUP;
4498 struct rte_eth_dev *dev;
4500 /* check input parameters */
4501 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4502 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4506 dev = &rte_eth_devices[port_id];
4507 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4511 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4519 cb->param = user_param;
4521 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4522 /* Add the callbacks in fifo order. */
4523 struct rte_eth_rxtx_callback *tail =
4524 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4527 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4534 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4539 const struct rte_eth_rxtx_callback *
4540 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4541 rte_rx_callback_fn fn, void *user_param)
4543 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4544 rte_errno = ENOTSUP;
4547 /* check input parameters */
4548 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4549 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4554 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4562 cb->param = user_param;
4564 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4565 /* Add the callbacks at first position */
4566 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4568 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4569 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4574 const struct rte_eth_rxtx_callback *
4575 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4576 rte_tx_callback_fn fn, void *user_param)
4578 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4579 rte_errno = ENOTSUP;
4582 struct rte_eth_dev *dev;
4584 /* check input parameters */
4585 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4586 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4591 dev = &rte_eth_devices[port_id];
4592 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4597 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4605 cb->param = user_param;
4607 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4608 /* Add the callbacks in fifo order. */
4609 struct rte_eth_rxtx_callback *tail =
4610 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4613 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4620 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4626 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4627 const struct rte_eth_rxtx_callback *user_cb)
4629 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4632 /* Check input parameters. */
4633 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4634 if (user_cb == NULL ||
4635 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4638 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4639 struct rte_eth_rxtx_callback *cb;
4640 struct rte_eth_rxtx_callback **prev_cb;
4643 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4644 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4645 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4647 if (cb == user_cb) {
4648 /* Remove the user cb from the callback list. */
4649 *prev_cb = cb->next;
4654 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4660 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4661 const struct rte_eth_rxtx_callback *user_cb)
4663 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4666 /* Check input parameters. */
4667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4668 if (user_cb == NULL ||
4669 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4672 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4674 struct rte_eth_rxtx_callback *cb;
4675 struct rte_eth_rxtx_callback **prev_cb;
4677 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4678 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4679 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4681 if (cb == user_cb) {
4682 /* Remove the user cb from the callback list. */
4683 *prev_cb = cb->next;
4688 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4694 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4695 struct rte_eth_rxq_info *qinfo)
4697 struct rte_eth_dev *dev;
4699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4704 dev = &rte_eth_devices[port_id];
4705 if (queue_id >= dev->data->nb_rx_queues) {
4706 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4710 if (dev->data->rx_queues[queue_id] == NULL) {
4712 "Rx queue %"PRIu16" of device with port_id=%"
4713 PRIu16" has not been setup\n",
4718 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4719 RTE_ETHDEV_LOG(INFO,
4720 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4727 memset(qinfo, 0, sizeof(*qinfo));
4728 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4733 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4734 struct rte_eth_txq_info *qinfo)
4736 struct rte_eth_dev *dev;
4738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4743 dev = &rte_eth_devices[port_id];
4744 if (queue_id >= dev->data->nb_tx_queues) {
4745 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4749 if (dev->data->tx_queues[queue_id] == NULL) {
4751 "Tx queue %"PRIu16" of device with port_id=%"
4752 PRIu16" has not been setup\n",
4757 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4758 RTE_ETHDEV_LOG(INFO,
4759 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4764 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4766 memset(qinfo, 0, sizeof(*qinfo));
4767 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4773 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4774 struct rte_eth_burst_mode *mode)
4776 struct rte_eth_dev *dev;
4778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4783 dev = &rte_eth_devices[port_id];
4785 if (queue_id >= dev->data->nb_rx_queues) {
4786 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4790 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4791 memset(mode, 0, sizeof(*mode));
4792 return eth_err(port_id,
4793 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4797 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4798 struct rte_eth_burst_mode *mode)
4800 struct rte_eth_dev *dev;
4802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4807 dev = &rte_eth_devices[port_id];
4809 if (queue_id >= dev->data->nb_tx_queues) {
4810 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4814 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4815 memset(mode, 0, sizeof(*mode));
4816 return eth_err(port_id,
4817 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4821 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4822 struct rte_ether_addr *mc_addr_set,
4823 uint32_t nb_mc_addr)
4825 struct rte_eth_dev *dev;
4827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4829 dev = &rte_eth_devices[port_id];
4830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4831 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4832 mc_addr_set, nb_mc_addr));
4836 rte_eth_timesync_enable(uint16_t port_id)
4838 struct rte_eth_dev *dev;
4840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4841 dev = &rte_eth_devices[port_id];
4843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4844 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4848 rte_eth_timesync_disable(uint16_t port_id)
4850 struct rte_eth_dev *dev;
4852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4853 dev = &rte_eth_devices[port_id];
4855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4856 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4860 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4863 struct rte_eth_dev *dev;
4865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4866 dev = &rte_eth_devices[port_id];
4868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4869 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4870 (dev, timestamp, flags));
4874 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4875 struct timespec *timestamp)
4877 struct rte_eth_dev *dev;
4879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4880 dev = &rte_eth_devices[port_id];
4882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4883 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4888 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4890 struct rte_eth_dev *dev;
4892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4893 dev = &rte_eth_devices[port_id];
4895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4896 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4901 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4903 struct rte_eth_dev *dev;
4905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4906 dev = &rte_eth_devices[port_id];
4908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4909 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4914 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4916 struct rte_eth_dev *dev;
4918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4919 dev = &rte_eth_devices[port_id];
4921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4922 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4927 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4929 struct rte_eth_dev *dev;
4931 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4932 dev = &rte_eth_devices[port_id];
4934 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4935 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4939 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4941 struct rte_eth_dev *dev;
4943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4945 dev = &rte_eth_devices[port_id];
4946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4947 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4951 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4953 struct rte_eth_dev *dev;
4955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4957 dev = &rte_eth_devices[port_id];
4958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4959 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4963 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4965 struct rte_eth_dev *dev;
4967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4969 dev = &rte_eth_devices[port_id];
4970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4971 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4975 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4977 struct rte_eth_dev *dev;
4979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4981 dev = &rte_eth_devices[port_id];
4982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4983 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4987 rte_eth_dev_get_module_info(uint16_t port_id,
4988 struct rte_eth_dev_module_info *modinfo)
4990 struct rte_eth_dev *dev;
4992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4994 dev = &rte_eth_devices[port_id];
4995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4996 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5000 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5001 struct rte_dev_eeprom_info *info)
5003 struct rte_eth_dev *dev;
5005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5007 dev = &rte_eth_devices[port_id];
5008 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5009 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5013 rte_eth_dev_get_dcb_info(uint16_t port_id,
5014 struct rte_eth_dcb_info *dcb_info)
5016 struct rte_eth_dev *dev;
5018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5020 dev = &rte_eth_devices[port_id];
5021 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5024 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5028 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5029 struct rte_eth_l2_tunnel_conf *l2_tunnel)
5031 struct rte_eth_dev *dev;
5033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5034 if (l2_tunnel == NULL) {
5035 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5039 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5040 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5044 dev = &rte_eth_devices[port_id];
5045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5047 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5052 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5053 struct rte_eth_l2_tunnel_conf *l2_tunnel,
5057 struct rte_eth_dev *dev;
5059 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5061 if (l2_tunnel == NULL) {
5062 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5066 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5067 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5072 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5076 dev = &rte_eth_devices[port_id];
5077 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5079 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5080 l2_tunnel, mask, en));
5084 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5085 const struct rte_eth_desc_lim *desc_lim)
5087 if (desc_lim->nb_align != 0)
5088 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5090 if (desc_lim->nb_max != 0)
5091 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5093 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5097 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5098 uint16_t *nb_rx_desc,
5099 uint16_t *nb_tx_desc)
5101 struct rte_eth_dev_info dev_info;
5104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5106 ret = rte_eth_dev_info_get(port_id, &dev_info);
5110 if (nb_rx_desc != NULL)
5111 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5113 if (nb_tx_desc != NULL)
5114 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5120 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5121 struct rte_eth_hairpin_cap *cap)
5123 struct rte_eth_dev *dev;
5125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5127 dev = &rte_eth_devices[port_id];
5128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5129 memset(cap, 0, sizeof(*cap));
5130 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5134 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5136 if (dev->data->rx_queue_state[queue_id] ==
5137 RTE_ETH_QUEUE_STATE_HAIRPIN)
5143 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5145 if (dev->data->tx_queue_state[queue_id] ==
5146 RTE_ETH_QUEUE_STATE_HAIRPIN)
5152 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5154 struct rte_eth_dev *dev;
5156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5161 dev = &rte_eth_devices[port_id];
5163 if (*dev->dev_ops->pool_ops_supported == NULL)
5164 return 1; /* all pools are supported */
5166 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5170 * A set of values to describe the possible states of a switch domain.
5172 enum rte_eth_switch_domain_state {
5173 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5174 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5178 * Array of switch domains available for allocation. Array is sized to
5179 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5180 * ethdev ports in a single process.
5182 static struct rte_eth_dev_switch {
5183 enum rte_eth_switch_domain_state state;
5184 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5187 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5191 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5193 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5194 if (rte_eth_switch_domains[i].state ==
5195 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5196 rte_eth_switch_domains[i].state =
5197 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5207 rte_eth_switch_domain_free(uint16_t domain_id)
5209 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5210 domain_id >= RTE_MAX_ETHPORTS)
5213 if (rte_eth_switch_domains[domain_id].state !=
5214 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5217 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5223 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5226 struct rte_kvargs_pair *pair;
5229 arglist->str = strdup(str_in);
5230 if (arglist->str == NULL)
5233 letter = arglist->str;
5236 pair = &arglist->pairs[0];
5239 case 0: /* Initial */
5242 else if (*letter == '\0')
5249 case 1: /* Parsing key */
5250 if (*letter == '=') {
5252 pair->value = letter + 1;
5254 } else if (*letter == ',' || *letter == '\0')
5259 case 2: /* Parsing value */
5262 else if (*letter == ',') {
5265 pair = &arglist->pairs[arglist->count];
5267 } else if (*letter == '\0') {
5270 pair = &arglist->pairs[arglist->count];
5275 case 3: /* Parsing list */
5278 else if (*letter == '\0')
5287 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5289 struct rte_kvargs args;
5290 struct rte_kvargs_pair *pair;
5294 memset(eth_da, 0, sizeof(*eth_da));
5296 result = rte_eth_devargs_tokenise(&args, dargs);
5300 for (i = 0; i < args.count; i++) {
5301 pair = &args.pairs[i];
5302 if (strcmp("representor", pair->key) == 0) {
5303 result = rte_eth_devargs_parse_list(pair->value,
5304 rte_eth_devargs_parse_representor_ports,
5319 handle_port_list(const char *cmd __rte_unused,
5320 const char *params __rte_unused,
5321 struct rte_tel_data *d)
5325 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5326 RTE_ETH_FOREACH_DEV(port_id)
5327 rte_tel_data_add_array_int(d, port_id);
5332 handle_port_xstats(const char *cmd __rte_unused,
5334 struct rte_tel_data *d)
5336 struct rte_eth_xstat *eth_xstats;
5337 struct rte_eth_xstat_name *xstat_names;
5338 int port_id, num_xstats;
5341 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5344 port_id = atoi(params);
5345 if (!rte_eth_dev_is_valid_port(port_id))
5348 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5352 /* use one malloc for both names and stats */
5353 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5354 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5355 if (eth_xstats == NULL)
5357 xstat_names = (void *)ð_xstats[num_xstats];
5359 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5360 if (ret < 0 || ret > num_xstats) {
5365 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5366 if (ret < 0 || ret > num_xstats) {
5371 rte_tel_data_start_dict(d);
5372 for (i = 0; i < num_xstats; i++)
5373 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5374 eth_xstats[i].value);
5379 handle_port_link_status(const char *cmd __rte_unused,
5381 struct rte_tel_data *d)
5383 static const char *status_str = "status";
5385 struct rte_eth_link link;
5387 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5390 port_id = atoi(params);
5391 if (!rte_eth_dev_is_valid_port(port_id))
5394 ret = rte_eth_link_get(port_id, &link);
5398 rte_tel_data_start_dict(d);
5399 if (!link.link_status) {
5400 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5403 rte_tel_data_add_dict_string(d, status_str, "UP");
5404 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5405 rte_tel_data_add_dict_string(d, "duplex",
5406 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5407 "full-duplex" : "half-duplex");
5411 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5413 RTE_INIT(ethdev_init_telemetry)
5415 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5416 "Returns list of available ethdev ports. Takes no parameters");
5417 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5418 "Returns the extended stats for a port. Parameters: int port_id");
5419 rte_telemetry_register_cmd("/ethdev/link_status",
5420 handle_port_link_status,
5421 "Returns the link status for a port. Parameters: int port_id");