1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_kvargs.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "rte_ethdev_driver.h"
42 #include "ethdev_profile.h"
44 static int ethdev_logtype;
46 #define ethdev_log(level, fmt, ...) \
47 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint8_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
128 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
129 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
130 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 #undef RTE_TX_OFFLOAD_BIT2STR
165 * The user application callback description.
167 * It contains callback address to be registered by user application,
168 * the pointer to the parameters for callback, and the event type.
170 struct rte_eth_dev_callback {
171 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
172 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
173 void *cb_arg; /**< Parameter for callback */
174 void *ret_param; /**< Return parameter */
175 enum rte_eth_event_type event; /**< Interrupt event type */
176 uint32_t active; /**< Callback is executing */
185 rte_eth_find_next(uint16_t port_id)
187 while (port_id < RTE_MAX_ETHPORTS &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
192 if (port_id >= RTE_MAX_ETHPORTS)
193 return RTE_MAX_ETHPORTS;
199 rte_eth_dev_shared_data_prepare(void)
201 const unsigned flags = 0;
202 const struct rte_memzone *mz;
204 rte_spinlock_lock(&rte_eth_shared_data_lock);
206 if (rte_eth_dev_shared_data == NULL) {
207 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
208 /* Allocate port data and ownership shared memory. */
209 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
210 sizeof(*rte_eth_dev_shared_data),
211 rte_socket_id(), flags);
213 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
215 rte_panic("Cannot allocate ethdev shared data\n");
217 rte_eth_dev_shared_data = mz->addr;
218 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
219 rte_eth_dev_shared_data->next_owner_id =
220 RTE_ETH_DEV_NO_OWNER + 1;
221 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
222 memset(rte_eth_dev_shared_data->data, 0,
223 sizeof(rte_eth_dev_shared_data->data));
227 rte_spinlock_unlock(&rte_eth_shared_data_lock);
231 rte_eth_dev_allocated(const char *name)
235 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
236 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
237 strcmp(rte_eth_devices[i].data->name, name) == 0)
238 return &rte_eth_devices[i];
244 rte_eth_dev_find_free_port(void)
248 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
249 /* Using shared name field to find a free port. */
250 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
251 RTE_ASSERT(rte_eth_devices[i].state ==
256 return RTE_MAX_ETHPORTS;
259 static struct rte_eth_dev *
260 eth_dev_get(uint16_t port_id)
262 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
264 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
265 eth_dev->state = RTE_ETH_DEV_ATTACHED;
267 eth_dev_last_created_port = port_id;
273 rte_eth_dev_allocate(const char *name)
276 struct rte_eth_dev *eth_dev = NULL;
278 rte_eth_dev_shared_data_prepare();
280 /* Synchronize port creation between primary and secondary threads. */
281 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
283 port_id = rte_eth_dev_find_free_port();
284 if (port_id == RTE_MAX_ETHPORTS) {
285 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
289 if (rte_eth_dev_allocated(name) != NULL) {
291 "Ethernet Device with name %s already allocated!",
296 eth_dev = eth_dev_get(port_id);
297 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
298 eth_dev->data->port_id = port_id;
299 eth_dev->data->mtu = ETHER_MTU;
302 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
305 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
311 * Attach to a port already registered by the primary process, which
312 * makes sure that the same device would have the same port id both
313 * in the primary and secondary process.
316 rte_eth_dev_attach_secondary(const char *name)
319 struct rte_eth_dev *eth_dev = NULL;
321 rte_eth_dev_shared_data_prepare();
323 /* Synchronize port attachment to primary port creation and release. */
324 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
326 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
327 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
330 if (i == RTE_MAX_ETHPORTS) {
332 "device %s is not driven by the primary process\n",
335 eth_dev = eth_dev_get(i);
336 RTE_ASSERT(eth_dev->data->port_id == i);
339 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
344 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
349 rte_eth_dev_shared_data_prepare();
351 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
353 eth_dev->state = RTE_ETH_DEV_UNUSED;
355 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
359 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
365 rte_eth_dev_is_valid_port(uint16_t port_id)
367 if (port_id >= RTE_MAX_ETHPORTS ||
368 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
375 rte_eth_is_valid_owner_id(uint64_t owner_id)
377 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
378 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
379 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016"PRIX64".\n", owner_id);
386 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
388 while (port_id < RTE_MAX_ETHPORTS &&
389 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
390 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
391 rte_eth_devices[port_id].data->owner.id != owner_id))
394 if (port_id >= RTE_MAX_ETHPORTS)
395 return RTE_MAX_ETHPORTS;
400 int __rte_experimental
401 rte_eth_dev_owner_new(uint64_t *owner_id)
403 rte_eth_dev_shared_data_prepare();
405 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
407 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
409 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
414 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
415 const struct rte_eth_dev_owner *new_owner)
417 struct rte_eth_dev_owner *port_owner;
420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
422 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
423 !rte_eth_is_valid_owner_id(old_owner_id))
426 port_owner = &rte_eth_devices[port_id].data->owner;
427 if (port_owner->id != old_owner_id) {
428 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
429 " by %s_%016"PRIX64".\n", port_id,
430 port_owner->name, port_owner->id);
434 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
436 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
437 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
440 port_owner->id = new_owner->id;
442 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016"PRIX64".\n", port_id,
443 new_owner->name, new_owner->id);
448 int __rte_experimental
449 rte_eth_dev_owner_set(const uint16_t port_id,
450 const struct rte_eth_dev_owner *owner)
454 rte_eth_dev_shared_data_prepare();
456 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
458 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
460 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
464 int __rte_experimental
465 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
467 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
468 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
471 rte_eth_dev_shared_data_prepare();
473 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
475 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
477 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
481 void __rte_experimental
482 rte_eth_dev_owner_delete(const uint64_t owner_id)
486 rte_eth_dev_shared_data_prepare();
488 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
490 if (rte_eth_is_valid_owner_id(owner_id)) {
491 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
492 memset(&rte_eth_devices[port_id].data->owner, 0,
493 sizeof(struct rte_eth_dev_owner));
494 RTE_PMD_DEBUG_TRACE("All port owners owned by %016"PRIX64
495 " identifier have removed.\n", owner_id);
498 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
501 int __rte_experimental
502 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
506 rte_eth_dev_shared_data_prepare();
508 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
510 if (!rte_eth_dev_is_valid_port(port_id)) {
511 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
514 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
518 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
523 rte_eth_dev_socket_id(uint16_t port_id)
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
526 return rte_eth_devices[port_id].data->numa_node;
530 rte_eth_dev_get_sec_ctx(uint16_t port_id)
532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
533 return rte_eth_devices[port_id].security_ctx;
537 rte_eth_dev_count(void)
539 return rte_eth_dev_count_avail();
543 rte_eth_dev_count_avail(void)
550 RTE_ETH_FOREACH_DEV(p)
556 uint16_t __rte_experimental
557 rte_eth_dev_count_total(void)
559 uint16_t port, count = 0;
561 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
562 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
569 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
576 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
580 /* shouldn't check 'rte_eth_devices[i].data',
581 * because it might be overwritten by VDEV PMD */
582 tmp = rte_eth_dev_shared_data->data[port_id].name;
588 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
593 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
597 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
598 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
599 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
609 eth_err(uint16_t port_id, int ret)
613 if (rte_eth_dev_is_removed(port_id))
618 /* attach the new device, then store port_id of the device */
620 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
622 int current = rte_eth_dev_count_total();
623 struct rte_devargs da;
626 memset(&da, 0, sizeof(da));
628 if ((devargs == NULL) || (port_id == NULL)) {
634 if (rte_devargs_parse(&da, "%s", devargs))
637 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
641 /* no point looking at the port count if no port exists */
642 if (!rte_eth_dev_count_total()) {
643 ethdev_log(ERR, "No port found for device (%s)", da.name);
648 /* if nothing happened, there is a bug here, since some driver told us
649 * it did attach a device, but did not create a port.
650 * FIXME: race condition in case of plug-out of another device
652 if (current == rte_eth_dev_count_total()) {
657 *port_id = eth_dev_last_created_port;
665 /* detach the device, then store the name of the device */
667 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
669 struct rte_device *dev;
674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
676 dev_flags = rte_eth_devices[port_id].data->dev_flags;
677 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
679 "Port %" PRIu16 " is bonded, cannot detach", port_id);
683 dev = rte_eth_devices[port_id].device;
687 bus = rte_bus_find_by_device(dev);
691 ret = rte_eal_hotplug_remove(bus->name, dev->name);
695 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
700 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
702 uint16_t old_nb_queues = dev->data->nb_rx_queues;
706 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
707 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
708 sizeof(dev->data->rx_queues[0]) * nb_queues,
709 RTE_CACHE_LINE_SIZE);
710 if (dev->data->rx_queues == NULL) {
711 dev->data->nb_rx_queues = 0;
714 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
717 rxq = dev->data->rx_queues;
719 for (i = nb_queues; i < old_nb_queues; i++)
720 (*dev->dev_ops->rx_queue_release)(rxq[i]);
721 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
722 RTE_CACHE_LINE_SIZE);
725 if (nb_queues > old_nb_queues) {
726 uint16_t new_qs = nb_queues - old_nb_queues;
728 memset(rxq + old_nb_queues, 0,
729 sizeof(rxq[0]) * new_qs);
732 dev->data->rx_queues = rxq;
734 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
737 rxq = dev->data->rx_queues;
739 for (i = nb_queues; i < old_nb_queues; i++)
740 (*dev->dev_ops->rx_queue_release)(rxq[i]);
742 rte_free(dev->data->rx_queues);
743 dev->data->rx_queues = NULL;
745 dev->data->nb_rx_queues = nb_queues;
750 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
752 struct rte_eth_dev *dev;
754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
756 dev = &rte_eth_devices[port_id];
757 if (!dev->data->dev_started) {
759 "port %d must be started before start any queue\n", port_id);
763 if (rx_queue_id >= dev->data->nb_rx_queues) {
764 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
770 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
771 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
772 " already started\n",
773 rx_queue_id, port_id);
777 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
783 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
785 struct rte_eth_dev *dev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 dev = &rte_eth_devices[port_id];
790 if (rx_queue_id >= dev->data->nb_rx_queues) {
791 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
797 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
798 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
799 " already stopped\n",
800 rx_queue_id, port_id);
804 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
809 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
811 struct rte_eth_dev *dev;
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
815 dev = &rte_eth_devices[port_id];
816 if (!dev->data->dev_started) {
818 "port %d must be started before start any queue\n", port_id);
822 if (tx_queue_id >= dev->data->nb_tx_queues) {
823 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
829 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
830 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
831 " already started\n",
832 tx_queue_id, port_id);
836 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
842 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
844 struct rte_eth_dev *dev;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 dev = &rte_eth_devices[port_id];
849 if (tx_queue_id >= dev->data->nb_tx_queues) {
850 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
856 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
857 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
858 " already stopped\n",
859 tx_queue_id, port_id);
863 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
868 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
870 uint16_t old_nb_queues = dev->data->nb_tx_queues;
874 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
875 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
876 sizeof(dev->data->tx_queues[0]) * nb_queues,
877 RTE_CACHE_LINE_SIZE);
878 if (dev->data->tx_queues == NULL) {
879 dev->data->nb_tx_queues = 0;
882 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
885 txq = dev->data->tx_queues;
887 for (i = nb_queues; i < old_nb_queues; i++)
888 (*dev->dev_ops->tx_queue_release)(txq[i]);
889 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
890 RTE_CACHE_LINE_SIZE);
893 if (nb_queues > old_nb_queues) {
894 uint16_t new_qs = nb_queues - old_nb_queues;
896 memset(txq + old_nb_queues, 0,
897 sizeof(txq[0]) * new_qs);
900 dev->data->tx_queues = txq;
902 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
905 txq = dev->data->tx_queues;
907 for (i = nb_queues; i < old_nb_queues; i++)
908 (*dev->dev_ops->tx_queue_release)(txq[i]);
910 rte_free(dev->data->tx_queues);
911 dev->data->tx_queues = NULL;
913 dev->data->nb_tx_queues = nb_queues;
918 rte_eth_speed_bitflag(uint32_t speed, int duplex)
921 case ETH_SPEED_NUM_10M:
922 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
923 case ETH_SPEED_NUM_100M:
924 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
925 case ETH_SPEED_NUM_1G:
926 return ETH_LINK_SPEED_1G;
927 case ETH_SPEED_NUM_2_5G:
928 return ETH_LINK_SPEED_2_5G;
929 case ETH_SPEED_NUM_5G:
930 return ETH_LINK_SPEED_5G;
931 case ETH_SPEED_NUM_10G:
932 return ETH_LINK_SPEED_10G;
933 case ETH_SPEED_NUM_20G:
934 return ETH_LINK_SPEED_20G;
935 case ETH_SPEED_NUM_25G:
936 return ETH_LINK_SPEED_25G;
937 case ETH_SPEED_NUM_40G:
938 return ETH_LINK_SPEED_40G;
939 case ETH_SPEED_NUM_50G:
940 return ETH_LINK_SPEED_50G;
941 case ETH_SPEED_NUM_56G:
942 return ETH_LINK_SPEED_56G;
943 case ETH_SPEED_NUM_100G:
944 return ETH_LINK_SPEED_100G;
951 * A conversion function from rxmode bitfield API.
954 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
955 uint64_t *rx_offloads)
957 uint64_t offloads = 0;
959 if (rxmode->header_split == 1)
960 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
961 if (rxmode->hw_ip_checksum == 1)
962 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
963 if (rxmode->hw_vlan_filter == 1)
964 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
965 if (rxmode->hw_vlan_strip == 1)
966 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
967 if (rxmode->hw_vlan_extend == 1)
968 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
969 if (rxmode->jumbo_frame == 1)
970 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
971 if (rxmode->hw_strip_crc == 1)
972 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
973 if (rxmode->enable_scatter == 1)
974 offloads |= DEV_RX_OFFLOAD_SCATTER;
975 if (rxmode->enable_lro == 1)
976 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
977 if (rxmode->hw_timestamp == 1)
978 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
979 if (rxmode->security == 1)
980 offloads |= DEV_RX_OFFLOAD_SECURITY;
982 *rx_offloads = offloads;
985 const char * __rte_experimental
986 rte_eth_dev_rx_offload_name(uint64_t offload)
988 const char *name = "UNKNOWN";
991 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
992 if (offload == rte_rx_offload_names[i].offload) {
993 name = rte_rx_offload_names[i].name;
1001 const char * __rte_experimental
1002 rte_eth_dev_tx_offload_name(uint64_t offload)
1004 const char *name = "UNKNOWN";
1007 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1008 if (offload == rte_tx_offload_names[i].offload) {
1009 name = rte_tx_offload_names[i].name;
1018 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1019 const struct rte_eth_conf *dev_conf)
1021 struct rte_eth_dev *dev;
1022 struct rte_eth_dev_info dev_info;
1023 struct rte_eth_conf local_conf = *dev_conf;
1026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1028 dev = &rte_eth_devices[port_id];
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1033 rte_eth_dev_info_get(port_id, &dev_info);
1035 /* If number of queues specified by application for both Rx and Tx is
1036 * zero, use driver preferred values. This cannot be done individually
1037 * as it is valid for either Tx or Rx (but not both) to be zero.
1038 * If driver does not provide any preferred valued, fall back on
1041 if (nb_rx_q == 0 && nb_tx_q == 0) {
1042 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1044 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1045 nb_tx_q = dev_info.default_txportconf.nb_queues;
1047 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1050 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1051 RTE_PMD_DEBUG_TRACE(
1052 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1053 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1057 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1058 RTE_PMD_DEBUG_TRACE(
1059 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1060 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1064 if (dev->data->dev_started) {
1065 RTE_PMD_DEBUG_TRACE(
1066 "port %d must be stopped to allow configuration\n", port_id);
1071 * Convert between the offloads API to enable PMDs to support
1074 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1075 rte_eth_convert_rx_offload_bitfield(
1076 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1078 /* Copy the dev_conf parameter into the dev structure */
1079 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1082 * Check that the numbers of RX and TX queues are not greater
1083 * than the maximum number of RX and TX queues supported by the
1084 * configured device.
1086 if (nb_rx_q > dev_info.max_rx_queues) {
1087 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1088 port_id, nb_rx_q, dev_info.max_rx_queues);
1092 if (nb_tx_q > dev_info.max_tx_queues) {
1093 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1094 port_id, nb_tx_q, dev_info.max_tx_queues);
1098 /* Check that the device supports requested interrupts */
1099 if ((dev_conf->intr_conf.lsc == 1) &&
1100 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1101 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1102 dev->device->driver->name);
1105 if ((dev_conf->intr_conf.rmv == 1) &&
1106 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1107 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1108 dev->device->driver->name);
1113 * If jumbo frames are enabled, check that the maximum RX packet
1114 * length is supported by the configured device.
1116 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1117 if (dev_conf->rxmode.max_rx_pkt_len >
1118 dev_info.max_rx_pktlen) {
1119 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1120 " > max valid value %u\n",
1122 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1123 (unsigned)dev_info.max_rx_pktlen);
1125 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1126 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1127 " < min valid value %u\n",
1129 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1130 (unsigned)ETHER_MIN_LEN);
1134 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1135 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1136 /* Use default value */
1137 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1141 /* Any requested offloading must be within its device capabilities */
1142 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1143 local_conf.rxmode.offloads) {
1144 ethdev_log(ERR, "ethdev port_id=%d requested Rx offloads "
1145 "0x%" PRIx64 " doesn't match Rx offloads "
1146 "capabilities 0x%" PRIx64 " in %s()\n",
1148 local_conf.rxmode.offloads,
1149 dev_info.rx_offload_capa,
1151 /* Will return -EINVAL in the next release */
1153 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1154 local_conf.txmode.offloads) {
1155 ethdev_log(ERR, "ethdev port_id=%d requested Tx offloads "
1156 "0x%" PRIx64 " doesn't match Tx offloads "
1157 "capabilities 0x%" PRIx64 " in %s()\n",
1159 local_conf.txmode.offloads,
1160 dev_info.tx_offload_capa,
1162 /* Will return -EINVAL in the next release */
1165 /* Check that device supports requested rss hash functions. */
1166 if ((dev_info.flow_type_rss_offloads |
1167 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1168 dev_info.flow_type_rss_offloads) {
1169 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1170 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1172 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1173 dev_info.flow_type_rss_offloads);
1177 * Setup new number of RX/TX queues and reconfigure device.
1179 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1181 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1186 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1188 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1190 rte_eth_dev_rx_queue_config(dev, 0);
1194 diag = (*dev->dev_ops->dev_configure)(dev);
1196 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1198 rte_eth_dev_rx_queue_config(dev, 0);
1199 rte_eth_dev_tx_queue_config(dev, 0);
1200 return eth_err(port_id, diag);
1203 /* Initialize Rx profiling if enabled at compilation time. */
1204 diag = __rte_eth_profile_rx_init(port_id, dev);
1206 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1208 rte_eth_dev_rx_queue_config(dev, 0);
1209 rte_eth_dev_tx_queue_config(dev, 0);
1210 return eth_err(port_id, diag);
1217 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1219 if (dev->data->dev_started) {
1220 RTE_PMD_DEBUG_TRACE(
1221 "port %d must be stopped to allow reset\n",
1222 dev->data->port_id);
1226 rte_eth_dev_rx_queue_config(dev, 0);
1227 rte_eth_dev_tx_queue_config(dev, 0);
1229 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1233 rte_eth_dev_config_restore(uint16_t port_id)
1235 struct rte_eth_dev *dev;
1236 struct rte_eth_dev_info dev_info;
1237 struct ether_addr *addr;
1242 dev = &rte_eth_devices[port_id];
1244 rte_eth_dev_info_get(port_id, &dev_info);
1246 /* replay MAC address configuration including default MAC */
1247 addr = &dev->data->mac_addrs[0];
1248 if (*dev->dev_ops->mac_addr_set != NULL)
1249 (*dev->dev_ops->mac_addr_set)(dev, addr);
1250 else if (*dev->dev_ops->mac_addr_add != NULL)
1251 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1253 if (*dev->dev_ops->mac_addr_add != NULL) {
1254 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1255 addr = &dev->data->mac_addrs[i];
1257 /* skip zero address */
1258 if (is_zero_ether_addr(addr))
1262 pool_mask = dev->data->mac_pool_sel[i];
1265 if (pool_mask & 1ULL)
1266 (*dev->dev_ops->mac_addr_add)(dev,
1270 } while (pool_mask);
1274 /* replay promiscuous configuration */
1275 if (rte_eth_promiscuous_get(port_id) == 1)
1276 rte_eth_promiscuous_enable(port_id);
1277 else if (rte_eth_promiscuous_get(port_id) == 0)
1278 rte_eth_promiscuous_disable(port_id);
1280 /* replay all multicast configuration */
1281 if (rte_eth_allmulticast_get(port_id) == 1)
1282 rte_eth_allmulticast_enable(port_id);
1283 else if (rte_eth_allmulticast_get(port_id) == 0)
1284 rte_eth_allmulticast_disable(port_id);
1288 rte_eth_dev_start(uint16_t port_id)
1290 struct rte_eth_dev *dev;
1293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1295 dev = &rte_eth_devices[port_id];
1297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1299 if (dev->data->dev_started != 0) {
1300 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1301 " already started\n",
1306 diag = (*dev->dev_ops->dev_start)(dev);
1308 dev->data->dev_started = 1;
1310 return eth_err(port_id, diag);
1312 rte_eth_dev_config_restore(port_id);
1314 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1316 (*dev->dev_ops->link_update)(dev, 0);
1322 rte_eth_dev_stop(uint16_t port_id)
1324 struct rte_eth_dev *dev;
1326 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1327 dev = &rte_eth_devices[port_id];
1329 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1331 if (dev->data->dev_started == 0) {
1332 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1333 " already stopped\n",
1338 dev->data->dev_started = 0;
1339 (*dev->dev_ops->dev_stop)(dev);
1343 rte_eth_dev_set_link_up(uint16_t port_id)
1345 struct rte_eth_dev *dev;
1347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1349 dev = &rte_eth_devices[port_id];
1351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1352 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1356 rte_eth_dev_set_link_down(uint16_t port_id)
1358 struct rte_eth_dev *dev;
1360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1362 dev = &rte_eth_devices[port_id];
1364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1365 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1369 rte_eth_dev_close(uint16_t port_id)
1371 struct rte_eth_dev *dev;
1373 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1374 dev = &rte_eth_devices[port_id];
1376 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1377 dev->data->dev_started = 0;
1378 (*dev->dev_ops->dev_close)(dev);
1380 dev->data->nb_rx_queues = 0;
1381 rte_free(dev->data->rx_queues);
1382 dev->data->rx_queues = NULL;
1383 dev->data->nb_tx_queues = 0;
1384 rte_free(dev->data->tx_queues);
1385 dev->data->tx_queues = NULL;
1389 rte_eth_dev_reset(uint16_t port_id)
1391 struct rte_eth_dev *dev;
1394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1395 dev = &rte_eth_devices[port_id];
1397 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1399 rte_eth_dev_stop(port_id);
1400 ret = dev->dev_ops->dev_reset(dev);
1402 return eth_err(port_id, ret);
1405 int __rte_experimental
1406 rte_eth_dev_is_removed(uint16_t port_id)
1408 struct rte_eth_dev *dev;
1411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1413 dev = &rte_eth_devices[port_id];
1415 if (dev->state == RTE_ETH_DEV_REMOVED)
1418 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1420 ret = dev->dev_ops->is_removed(dev);
1422 /* Device is physically removed. */
1423 dev->state = RTE_ETH_DEV_REMOVED;
1429 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1430 uint16_t nb_rx_desc, unsigned int socket_id,
1431 const struct rte_eth_rxconf *rx_conf,
1432 struct rte_mempool *mp)
1435 uint32_t mbp_buf_size;
1436 struct rte_eth_dev *dev;
1437 struct rte_eth_dev_info dev_info;
1438 struct rte_eth_rxconf local_conf;
1441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1443 dev = &rte_eth_devices[port_id];
1444 if (rx_queue_id >= dev->data->nb_rx_queues) {
1445 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1453 * Check the size of the mbuf data buffer.
1454 * This value must be provided in the private data of the memory pool.
1455 * First check that the memory pool has a valid private data.
1457 rte_eth_dev_info_get(port_id, &dev_info);
1458 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1459 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1460 mp->name, (int) mp->private_data_size,
1461 (int) sizeof(struct rte_pktmbuf_pool_private));
1464 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1466 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1467 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1468 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1472 (int)(RTE_PKTMBUF_HEADROOM +
1473 dev_info.min_rx_bufsize),
1474 (int)RTE_PKTMBUF_HEADROOM,
1475 (int)dev_info.min_rx_bufsize);
1479 /* Use default specified by driver, if nb_rx_desc is zero */
1480 if (nb_rx_desc == 0) {
1481 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1482 /* If driver default is also zero, fall back on EAL default */
1483 if (nb_rx_desc == 0)
1484 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1487 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1488 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1489 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1491 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1492 "should be: <= %hu, = %hu, and a product of %hu\n",
1494 dev_info.rx_desc_lim.nb_max,
1495 dev_info.rx_desc_lim.nb_min,
1496 dev_info.rx_desc_lim.nb_align);
1500 if (dev->data->dev_started &&
1501 !(dev_info.dev_capa &
1502 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1505 if (dev->data->rx_queue_state[rx_queue_id] !=
1506 RTE_ETH_QUEUE_STATE_STOPPED)
1509 rxq = dev->data->rx_queues;
1510 if (rxq[rx_queue_id]) {
1511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1513 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1514 rxq[rx_queue_id] = NULL;
1517 if (rx_conf == NULL)
1518 rx_conf = &dev_info.default_rxconf;
1520 local_conf = *rx_conf;
1521 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1523 * Reflect port offloads to queue offloads in order for
1524 * offloads to not be discarded.
1526 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1527 &local_conf.offloads);
1531 * If an offloading has already been enabled in
1532 * rte_eth_dev_configure(), it has been enabled on all queues,
1533 * so there is no need to enable it in this queue again.
1534 * The local_conf.offloads input to underlying PMD only carries
1535 * those offloadings which are only enabled on this queue and
1536 * not enabled on all queues.
1538 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1541 * New added offloadings for this queue are those not enabled in
1542 * rte_eth_dev_configure() and they must be per-queue type.
1543 * A pure per-port offloading can't be enabled on a queue while
1544 * disabled on another queue. A pure per-port offloading can't
1545 * be enabled for any queue as new added one if it hasn't been
1546 * enabled in rte_eth_dev_configure().
1548 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1549 local_conf.offloads) {
1550 ethdev_log(ERR, "Ethdev port_id=%d rx_queue_id=%d, new "
1551 "added offloads 0x%" PRIx64 " must be "
1552 "within pre-queue offload capabilities 0x%"
1553 PRIx64 " in %s()\n",
1556 local_conf.offloads,
1557 dev_info.rx_queue_offload_capa,
1559 /* Will return -EINVAL in the next release */
1562 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1563 socket_id, &local_conf, mp);
1565 if (!dev->data->min_rx_buf_size ||
1566 dev->data->min_rx_buf_size > mbp_buf_size)
1567 dev->data->min_rx_buf_size = mbp_buf_size;
1570 return eth_err(port_id, ret);
1574 * Convert from tx offloads to txq_flags.
1577 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1581 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1582 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1583 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1584 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1585 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1586 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1587 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1588 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1589 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1590 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1591 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1592 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1598 * A conversion function from txq_flags API.
1601 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1603 uint64_t offloads = 0;
1605 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1606 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1607 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1608 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1609 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1610 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1611 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1612 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1613 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1614 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1615 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1616 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1617 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1619 *tx_offloads = offloads;
1623 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1624 uint16_t nb_tx_desc, unsigned int socket_id,
1625 const struct rte_eth_txconf *tx_conf)
1627 struct rte_eth_dev *dev;
1628 struct rte_eth_dev_info dev_info;
1629 struct rte_eth_txconf local_conf;
1632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1634 dev = &rte_eth_devices[port_id];
1635 if (tx_queue_id >= dev->data->nb_tx_queues) {
1636 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1640 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1641 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1643 rte_eth_dev_info_get(port_id, &dev_info);
1645 /* Use default specified by driver, if nb_tx_desc is zero */
1646 if (nb_tx_desc == 0) {
1647 nb_tx_desc = dev_info.default_txportconf.ring_size;
1648 /* If driver default is zero, fall back on EAL default */
1649 if (nb_tx_desc == 0)
1650 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1652 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1653 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1654 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1655 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1656 "should be: <= %hu, = %hu, and a product of %hu\n",
1658 dev_info.tx_desc_lim.nb_max,
1659 dev_info.tx_desc_lim.nb_min,
1660 dev_info.tx_desc_lim.nb_align);
1664 if (dev->data->dev_started &&
1665 !(dev_info.dev_capa &
1666 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1669 if (dev->data->tx_queue_state[tx_queue_id] !=
1670 RTE_ETH_QUEUE_STATE_STOPPED)
1673 txq = dev->data->tx_queues;
1674 if (txq[tx_queue_id]) {
1675 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1677 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1678 txq[tx_queue_id] = NULL;
1681 if (tx_conf == NULL)
1682 tx_conf = &dev_info.default_txconf;
1685 * Convert between the offloads API to enable PMDs to support
1688 local_conf = *tx_conf;
1689 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1690 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1691 &local_conf.offloads);
1695 * If an offloading has already been enabled in
1696 * rte_eth_dev_configure(), it has been enabled on all queues,
1697 * so there is no need to enable it in this queue again.
1698 * The local_conf.offloads input to underlying PMD only carries
1699 * those offloadings which are only enabled on this queue and
1700 * not enabled on all queues.
1702 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1705 * New added offloadings for this queue are those not enabled in
1706 * rte_eth_dev_configure() and they must be per-queue type.
1707 * A pure per-port offloading can't be enabled on a queue while
1708 * disabled on another queue. A pure per-port offloading can't
1709 * be enabled for any queue as new added one if it hasn't been
1710 * enabled in rte_eth_dev_configure().
1712 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1713 local_conf.offloads) {
1714 ethdev_log(ERR, "Ethdev port_id=%d tx_queue_id=%d, new "
1715 "added offloads 0x%" PRIx64 " must be "
1716 "within pre-queue offload capabilities 0x%"
1717 PRIx64 " in %s()\n",
1720 local_conf.offloads,
1721 dev_info.tx_queue_offload_capa,
1723 /* Will return -EINVAL in the next release */
1726 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1727 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1731 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1732 void *userdata __rte_unused)
1736 for (i = 0; i < unsent; i++)
1737 rte_pktmbuf_free(pkts[i]);
1741 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1744 uint64_t *count = userdata;
1747 for (i = 0; i < unsent; i++)
1748 rte_pktmbuf_free(pkts[i]);
1754 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1755 buffer_tx_error_fn cbfn, void *userdata)
1757 buffer->error_callback = cbfn;
1758 buffer->error_userdata = userdata;
1763 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1770 buffer->size = size;
1771 if (buffer->error_callback == NULL) {
1772 ret = rte_eth_tx_buffer_set_err_callback(
1773 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1780 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1782 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1785 /* Validate Input Data. Bail if not valid or not supported. */
1786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1787 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1789 /* Call driver to free pending mbufs. */
1790 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1792 return eth_err(port_id, ret);
1796 rte_eth_promiscuous_enable(uint16_t port_id)
1798 struct rte_eth_dev *dev;
1800 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1801 dev = &rte_eth_devices[port_id];
1803 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1804 (*dev->dev_ops->promiscuous_enable)(dev);
1805 dev->data->promiscuous = 1;
1809 rte_eth_promiscuous_disable(uint16_t port_id)
1811 struct rte_eth_dev *dev;
1813 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1814 dev = &rte_eth_devices[port_id];
1816 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1817 dev->data->promiscuous = 0;
1818 (*dev->dev_ops->promiscuous_disable)(dev);
1822 rte_eth_promiscuous_get(uint16_t port_id)
1824 struct rte_eth_dev *dev;
1826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1828 dev = &rte_eth_devices[port_id];
1829 return dev->data->promiscuous;
1833 rte_eth_allmulticast_enable(uint16_t port_id)
1835 struct rte_eth_dev *dev;
1837 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1838 dev = &rte_eth_devices[port_id];
1840 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1841 (*dev->dev_ops->allmulticast_enable)(dev);
1842 dev->data->all_multicast = 1;
1846 rte_eth_allmulticast_disable(uint16_t port_id)
1848 struct rte_eth_dev *dev;
1850 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1851 dev = &rte_eth_devices[port_id];
1853 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1854 dev->data->all_multicast = 0;
1855 (*dev->dev_ops->allmulticast_disable)(dev);
1859 rte_eth_allmulticast_get(uint16_t port_id)
1861 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1865 dev = &rte_eth_devices[port_id];
1866 return dev->data->all_multicast;
1870 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1872 struct rte_eth_dev *dev;
1874 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1875 dev = &rte_eth_devices[port_id];
1877 if (dev->data->dev_conf.intr_conf.lsc &&
1878 dev->data->dev_started)
1879 rte_eth_linkstatus_get(dev, eth_link);
1881 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1882 (*dev->dev_ops->link_update)(dev, 1);
1883 *eth_link = dev->data->dev_link;
1888 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1890 struct rte_eth_dev *dev;
1892 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1893 dev = &rte_eth_devices[port_id];
1895 if (dev->data->dev_conf.intr_conf.lsc &&
1896 dev->data->dev_started)
1897 rte_eth_linkstatus_get(dev, eth_link);
1899 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1900 (*dev->dev_ops->link_update)(dev, 0);
1901 *eth_link = dev->data->dev_link;
1906 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1908 struct rte_eth_dev *dev;
1910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1912 dev = &rte_eth_devices[port_id];
1913 memset(stats, 0, sizeof(*stats));
1915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1916 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1917 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1921 rte_eth_stats_reset(uint16_t port_id)
1923 struct rte_eth_dev *dev;
1925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1926 dev = &rte_eth_devices[port_id];
1928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1929 (*dev->dev_ops->stats_reset)(dev);
1930 dev->data->rx_mbuf_alloc_failed = 0;
1936 get_xstats_basic_count(struct rte_eth_dev *dev)
1938 uint16_t nb_rxqs, nb_txqs;
1941 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1942 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1944 count = RTE_NB_STATS;
1945 count += nb_rxqs * RTE_NB_RXQ_STATS;
1946 count += nb_txqs * RTE_NB_TXQ_STATS;
1952 get_xstats_count(uint16_t port_id)
1954 struct rte_eth_dev *dev;
1957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1958 dev = &rte_eth_devices[port_id];
1959 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1960 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1963 return eth_err(port_id, count);
1965 if (dev->dev_ops->xstats_get_names != NULL) {
1966 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1968 return eth_err(port_id, count);
1973 count += get_xstats_basic_count(dev);
1979 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1982 int cnt_xstats, idx_xstat;
1984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1987 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1992 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1997 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1998 if (cnt_xstats < 0) {
1999 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
2003 /* Get id-name lookup table */
2004 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2006 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2007 port_id, xstats_names, cnt_xstats, NULL)) {
2008 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
2012 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2013 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2022 /* retrieve basic stats names */
2024 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2025 struct rte_eth_xstat_name *xstats_names)
2027 int cnt_used_entries = 0;
2028 uint32_t idx, id_queue;
2031 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2032 snprintf(xstats_names[cnt_used_entries].name,
2033 sizeof(xstats_names[0].name),
2034 "%s", rte_stats_strings[idx].name);
2037 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2038 for (id_queue = 0; id_queue < num_q; id_queue++) {
2039 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2040 snprintf(xstats_names[cnt_used_entries].name,
2041 sizeof(xstats_names[0].name),
2043 id_queue, rte_rxq_stats_strings[idx].name);
2048 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2049 for (id_queue = 0; id_queue < num_q; id_queue++) {
2050 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2051 snprintf(xstats_names[cnt_used_entries].name,
2052 sizeof(xstats_names[0].name),
2054 id_queue, rte_txq_stats_strings[idx].name);
2058 return cnt_used_entries;
2061 /* retrieve ethdev extended statistics names */
2063 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2064 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2067 struct rte_eth_xstat_name *xstats_names_copy;
2068 unsigned int no_basic_stat_requested = 1;
2069 unsigned int no_ext_stat_requested = 1;
2070 unsigned int expected_entries;
2071 unsigned int basic_count;
2072 struct rte_eth_dev *dev;
2076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2077 dev = &rte_eth_devices[port_id];
2079 basic_count = get_xstats_basic_count(dev);
2080 ret = get_xstats_count(port_id);
2083 expected_entries = (unsigned int)ret;
2085 /* Return max number of stats if no ids given */
2088 return expected_entries;
2089 else if (xstats_names && size < expected_entries)
2090 return expected_entries;
2093 if (ids && !xstats_names)
2096 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2097 uint64_t ids_copy[size];
2099 for (i = 0; i < size; i++) {
2100 if (ids[i] < basic_count) {
2101 no_basic_stat_requested = 0;
2106 * Convert ids to xstats ids that PMD knows.
2107 * ids known by user are basic + extended stats.
2109 ids_copy[i] = ids[i] - basic_count;
2112 if (no_basic_stat_requested)
2113 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2114 xstats_names, ids_copy, size);
2117 /* Retrieve all stats */
2119 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2121 if (num_stats < 0 || num_stats > (int)expected_entries)
2124 return expected_entries;
2127 xstats_names_copy = calloc(expected_entries,
2128 sizeof(struct rte_eth_xstat_name));
2130 if (!xstats_names_copy) {
2131 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2136 for (i = 0; i < size; i++) {
2137 if (ids[i] >= basic_count) {
2138 no_ext_stat_requested = 0;
2144 /* Fill xstats_names_copy structure */
2145 if (ids && no_ext_stat_requested) {
2146 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2148 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2151 free(xstats_names_copy);
2157 for (i = 0; i < size; i++) {
2158 if (ids[i] >= expected_entries) {
2159 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2160 free(xstats_names_copy);
2163 xstats_names[i] = xstats_names_copy[ids[i]];
2166 free(xstats_names_copy);
2171 rte_eth_xstats_get_names(uint16_t port_id,
2172 struct rte_eth_xstat_name *xstats_names,
2175 struct rte_eth_dev *dev;
2176 int cnt_used_entries;
2177 int cnt_expected_entries;
2178 int cnt_driver_entries;
2180 cnt_expected_entries = get_xstats_count(port_id);
2181 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2182 (int)size < cnt_expected_entries)
2183 return cnt_expected_entries;
2185 /* port_id checked in get_xstats_count() */
2186 dev = &rte_eth_devices[port_id];
2188 cnt_used_entries = rte_eth_basic_stats_get_names(
2191 if (dev->dev_ops->xstats_get_names != NULL) {
2192 /* If there are any driver-specific xstats, append them
2195 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2197 xstats_names + cnt_used_entries,
2198 size - cnt_used_entries);
2199 if (cnt_driver_entries < 0)
2200 return eth_err(port_id, cnt_driver_entries);
2201 cnt_used_entries += cnt_driver_entries;
2204 return cnt_used_entries;
2209 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2211 struct rte_eth_dev *dev;
2212 struct rte_eth_stats eth_stats;
2213 unsigned int count = 0, i, q;
2214 uint64_t val, *stats_ptr;
2215 uint16_t nb_rxqs, nb_txqs;
2218 ret = rte_eth_stats_get(port_id, ð_stats);
2222 dev = &rte_eth_devices[port_id];
2224 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2225 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2228 for (i = 0; i < RTE_NB_STATS; i++) {
2229 stats_ptr = RTE_PTR_ADD(ð_stats,
2230 rte_stats_strings[i].offset);
2232 xstats[count++].value = val;
2236 for (q = 0; q < nb_rxqs; q++) {
2237 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2238 stats_ptr = RTE_PTR_ADD(ð_stats,
2239 rte_rxq_stats_strings[i].offset +
2240 q * sizeof(uint64_t));
2242 xstats[count++].value = val;
2247 for (q = 0; q < nb_txqs; q++) {
2248 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2249 stats_ptr = RTE_PTR_ADD(ð_stats,
2250 rte_txq_stats_strings[i].offset +
2251 q * sizeof(uint64_t));
2253 xstats[count++].value = val;
2259 /* retrieve ethdev extended statistics */
2261 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2262 uint64_t *values, unsigned int size)
2264 unsigned int no_basic_stat_requested = 1;
2265 unsigned int no_ext_stat_requested = 1;
2266 unsigned int num_xstats_filled;
2267 unsigned int basic_count;
2268 uint16_t expected_entries;
2269 struct rte_eth_dev *dev;
2273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2274 ret = get_xstats_count(port_id);
2277 expected_entries = (uint16_t)ret;
2278 struct rte_eth_xstat xstats[expected_entries];
2279 dev = &rte_eth_devices[port_id];
2280 basic_count = get_xstats_basic_count(dev);
2282 /* Return max number of stats if no ids given */
2285 return expected_entries;
2286 else if (values && size < expected_entries)
2287 return expected_entries;
2293 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2294 unsigned int basic_count = get_xstats_basic_count(dev);
2295 uint64_t ids_copy[size];
2297 for (i = 0; i < size; i++) {
2298 if (ids[i] < basic_count) {
2299 no_basic_stat_requested = 0;
2304 * Convert ids to xstats ids that PMD knows.
2305 * ids known by user are basic + extended stats.
2307 ids_copy[i] = ids[i] - basic_count;
2310 if (no_basic_stat_requested)
2311 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2316 for (i = 0; i < size; i++) {
2317 if (ids[i] >= basic_count) {
2318 no_ext_stat_requested = 0;
2324 /* Fill the xstats structure */
2325 if (ids && no_ext_stat_requested)
2326 ret = rte_eth_basic_stats_get(port_id, xstats);
2328 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2332 num_xstats_filled = (unsigned int)ret;
2334 /* Return all stats */
2336 for (i = 0; i < num_xstats_filled; i++)
2337 values[i] = xstats[i].value;
2338 return expected_entries;
2342 for (i = 0; i < size; i++) {
2343 if (ids[i] >= expected_entries) {
2344 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2347 values[i] = xstats[ids[i]].value;
2353 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2356 struct rte_eth_dev *dev;
2357 unsigned int count = 0, i;
2358 signed int xcount = 0;
2359 uint16_t nb_rxqs, nb_txqs;
2362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2364 dev = &rte_eth_devices[port_id];
2366 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2367 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2369 /* Return generic statistics */
2370 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2371 (nb_txqs * RTE_NB_TXQ_STATS);
2373 /* implemented by the driver */
2374 if (dev->dev_ops->xstats_get != NULL) {
2375 /* Retrieve the xstats from the driver at the end of the
2378 xcount = (*dev->dev_ops->xstats_get)(dev,
2379 xstats ? xstats + count : NULL,
2380 (n > count) ? n - count : 0);
2383 return eth_err(port_id, xcount);
2386 if (n < count + xcount || xstats == NULL)
2387 return count + xcount;
2389 /* now fill the xstats structure */
2390 ret = rte_eth_basic_stats_get(port_id, xstats);
2395 for (i = 0; i < count; i++)
2397 /* add an offset to driver-specific stats */
2398 for ( ; i < count + xcount; i++)
2399 xstats[i].id += count;
2401 return count + xcount;
2404 /* reset ethdev extended statistics */
2406 rte_eth_xstats_reset(uint16_t port_id)
2408 struct rte_eth_dev *dev;
2410 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2411 dev = &rte_eth_devices[port_id];
2413 /* implemented by the driver */
2414 if (dev->dev_ops->xstats_reset != NULL) {
2415 (*dev->dev_ops->xstats_reset)(dev);
2419 /* fallback to default */
2420 rte_eth_stats_reset(port_id);
2424 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2427 struct rte_eth_dev *dev;
2429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2431 dev = &rte_eth_devices[port_id];
2433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2434 return (*dev->dev_ops->queue_stats_mapping_set)
2435 (dev, queue_id, stat_idx, is_rx);
2440 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2443 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2444 stat_idx, STAT_QMAP_TX));
2449 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2452 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2453 stat_idx, STAT_QMAP_RX));
2457 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2459 struct rte_eth_dev *dev;
2461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2462 dev = &rte_eth_devices[port_id];
2464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2465 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2466 fw_version, fw_size));
2470 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2472 struct rte_eth_dev *dev;
2473 struct rte_eth_txconf *txconf;
2474 const struct rte_eth_desc_lim lim = {
2475 .nb_max = UINT16_MAX,
2480 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2481 dev = &rte_eth_devices[port_id];
2483 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2484 dev_info->rx_desc_lim = lim;
2485 dev_info->tx_desc_lim = lim;
2486 dev_info->device = dev->device;
2488 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2489 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2490 dev_info->driver_name = dev->device->driver->name;
2491 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2492 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2494 dev_info->dev_flags = &dev->data->dev_flags;
2495 txconf = &dev_info->default_txconf;
2496 /* convert offload to txq_flags to support legacy app */
2497 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2501 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2502 uint32_t *ptypes, int num)
2505 struct rte_eth_dev *dev;
2506 const uint32_t *all_ptypes;
2508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2509 dev = &rte_eth_devices[port_id];
2510 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2511 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2516 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2517 if (all_ptypes[i] & ptype_mask) {
2519 ptypes[j] = all_ptypes[i];
2527 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2529 struct rte_eth_dev *dev;
2531 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2532 dev = &rte_eth_devices[port_id];
2533 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2538 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2540 struct rte_eth_dev *dev;
2542 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2544 dev = &rte_eth_devices[port_id];
2545 *mtu = dev->data->mtu;
2550 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2553 struct rte_eth_dev *dev;
2555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2556 dev = &rte_eth_devices[port_id];
2557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2559 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2561 dev->data->mtu = mtu;
2563 return eth_err(port_id, ret);
2567 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2569 struct rte_eth_dev *dev;
2572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2573 dev = &rte_eth_devices[port_id];
2574 if (!(dev->data->dev_conf.rxmode.offloads &
2575 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2576 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2580 if (vlan_id > 4095) {
2581 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2582 port_id, (unsigned) vlan_id);
2585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2587 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2589 struct rte_vlan_filter_conf *vfc;
2593 vfc = &dev->data->vlan_filter_conf;
2594 vidx = vlan_id / 64;
2595 vbit = vlan_id % 64;
2598 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2600 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2603 return eth_err(port_id, ret);
2607 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2610 struct rte_eth_dev *dev;
2612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2614 if (rx_queue_id >= dev->data->nb_rx_queues) {
2615 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2620 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2626 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2627 enum rte_vlan_type vlan_type,
2630 struct rte_eth_dev *dev;
2632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2633 dev = &rte_eth_devices[port_id];
2634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2636 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2641 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2643 struct rte_eth_dev *dev;
2647 uint64_t orig_offloads;
2649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2650 dev = &rte_eth_devices[port_id];
2652 /* save original values in case of failure */
2653 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2655 /*check which option changed by application*/
2656 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2657 org = !!(dev->data->dev_conf.rxmode.offloads &
2658 DEV_RX_OFFLOAD_VLAN_STRIP);
2661 dev->data->dev_conf.rxmode.offloads |=
2662 DEV_RX_OFFLOAD_VLAN_STRIP;
2664 dev->data->dev_conf.rxmode.offloads &=
2665 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2666 mask |= ETH_VLAN_STRIP_MASK;
2669 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2670 org = !!(dev->data->dev_conf.rxmode.offloads &
2671 DEV_RX_OFFLOAD_VLAN_FILTER);
2674 dev->data->dev_conf.rxmode.offloads |=
2675 DEV_RX_OFFLOAD_VLAN_FILTER;
2677 dev->data->dev_conf.rxmode.offloads &=
2678 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2679 mask |= ETH_VLAN_FILTER_MASK;
2682 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2683 org = !!(dev->data->dev_conf.rxmode.offloads &
2684 DEV_RX_OFFLOAD_VLAN_EXTEND);
2687 dev->data->dev_conf.rxmode.offloads |=
2688 DEV_RX_OFFLOAD_VLAN_EXTEND;
2690 dev->data->dev_conf.rxmode.offloads &=
2691 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2692 mask |= ETH_VLAN_EXTEND_MASK;
2699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2700 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2702 /* hit an error restore original values */
2703 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2706 return eth_err(port_id, ret);
2710 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2712 struct rte_eth_dev *dev;
2715 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2716 dev = &rte_eth_devices[port_id];
2718 if (dev->data->dev_conf.rxmode.offloads &
2719 DEV_RX_OFFLOAD_VLAN_STRIP)
2720 ret |= ETH_VLAN_STRIP_OFFLOAD;
2722 if (dev->data->dev_conf.rxmode.offloads &
2723 DEV_RX_OFFLOAD_VLAN_FILTER)
2724 ret |= ETH_VLAN_FILTER_OFFLOAD;
2726 if (dev->data->dev_conf.rxmode.offloads &
2727 DEV_RX_OFFLOAD_VLAN_EXTEND)
2728 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2734 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2736 struct rte_eth_dev *dev;
2738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2739 dev = &rte_eth_devices[port_id];
2740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2742 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2746 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2751 dev = &rte_eth_devices[port_id];
2752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2753 memset(fc_conf, 0, sizeof(*fc_conf));
2754 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2758 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2760 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2764 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2768 dev = &rte_eth_devices[port_id];
2769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2770 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2774 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2775 struct rte_eth_pfc_conf *pfc_conf)
2777 struct rte_eth_dev *dev;
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2781 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2785 dev = &rte_eth_devices[port_id];
2786 /* High water, low water validation are device specific */
2787 if (*dev->dev_ops->priority_flow_ctrl_set)
2788 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2794 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2802 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2803 for (i = 0; i < num; i++) {
2804 if (reta_conf[i].mask)
2812 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2816 uint16_t i, idx, shift;
2822 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2826 for (i = 0; i < reta_size; i++) {
2827 idx = i / RTE_RETA_GROUP_SIZE;
2828 shift = i % RTE_RETA_GROUP_SIZE;
2829 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2830 (reta_conf[idx].reta[shift] >= max_rxq)) {
2831 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2832 "the maximum rxq index: %u\n", idx, shift,
2833 reta_conf[idx].reta[shift], max_rxq);
2842 rte_eth_dev_rss_reta_update(uint16_t port_id,
2843 struct rte_eth_rss_reta_entry64 *reta_conf,
2846 struct rte_eth_dev *dev;
2849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2850 /* Check mask bits */
2851 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2855 dev = &rte_eth_devices[port_id];
2857 /* Check entry value */
2858 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2859 dev->data->nb_rx_queues);
2863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2864 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2869 rte_eth_dev_rss_reta_query(uint16_t port_id,
2870 struct rte_eth_rss_reta_entry64 *reta_conf,
2873 struct rte_eth_dev *dev;
2876 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2878 /* Check mask bits */
2879 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2883 dev = &rte_eth_devices[port_id];
2884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2885 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2890 rte_eth_dev_rss_hash_update(uint16_t port_id,
2891 struct rte_eth_rss_conf *rss_conf)
2893 struct rte_eth_dev *dev;
2894 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2897 dev = &rte_eth_devices[port_id];
2898 rte_eth_dev_info_get(port_id, &dev_info);
2899 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2900 dev_info.flow_type_rss_offloads) {
2901 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2902 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2905 dev_info.flow_type_rss_offloads);
2907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2908 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2913 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2914 struct rte_eth_rss_conf *rss_conf)
2916 struct rte_eth_dev *dev;
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2919 dev = &rte_eth_devices[port_id];
2920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2921 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2926 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2927 struct rte_eth_udp_tunnel *udp_tunnel)
2929 struct rte_eth_dev *dev;
2931 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2932 if (udp_tunnel == NULL) {
2933 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2937 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2938 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2942 dev = &rte_eth_devices[port_id];
2943 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2944 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2949 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2950 struct rte_eth_udp_tunnel *udp_tunnel)
2952 struct rte_eth_dev *dev;
2954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2955 dev = &rte_eth_devices[port_id];
2957 if (udp_tunnel == NULL) {
2958 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2962 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2963 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2968 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2973 rte_eth_led_on(uint16_t port_id)
2975 struct rte_eth_dev *dev;
2977 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2978 dev = &rte_eth_devices[port_id];
2979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2980 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2984 rte_eth_led_off(uint16_t port_id)
2986 struct rte_eth_dev *dev;
2988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2989 dev = &rte_eth_devices[port_id];
2990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2991 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2995 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2999 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3001 struct rte_eth_dev_info dev_info;
3002 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3006 rte_eth_dev_info_get(port_id, &dev_info);
3008 for (i = 0; i < dev_info.max_mac_addrs; i++)
3009 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3015 static const struct ether_addr null_mac_addr;
3018 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3021 struct rte_eth_dev *dev;
3026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3027 dev = &rte_eth_devices[port_id];
3028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3030 if (is_zero_ether_addr(addr)) {
3031 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3035 if (pool >= ETH_64_POOLS) {
3036 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
3040 index = get_mac_addr_index(port_id, addr);
3042 index = get_mac_addr_index(port_id, &null_mac_addr);
3044 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3049 pool_mask = dev->data->mac_pool_sel[index];
3051 /* Check if both MAC address and pool is already there, and do nothing */
3052 if (pool_mask & (1ULL << pool))
3057 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3060 /* Update address in NIC data structure */
3061 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3063 /* Update pool bitmap in NIC data structure */
3064 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3067 return eth_err(port_id, ret);
3071 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3073 struct rte_eth_dev *dev;
3076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3077 dev = &rte_eth_devices[port_id];
3078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3080 index = get_mac_addr_index(port_id, addr);
3082 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3084 } else if (index < 0)
3085 return 0; /* Do nothing if address wasn't found */
3088 (*dev->dev_ops->mac_addr_remove)(dev, index);
3090 /* Update address in NIC data structure */
3091 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3093 /* reset pool bitmap */
3094 dev->data->mac_pool_sel[index] = 0;
3100 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3102 struct rte_eth_dev *dev;
3105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3107 if (!is_valid_assigned_ether_addr(addr))
3110 dev = &rte_eth_devices[port_id];
3111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3113 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3117 /* Update default address in NIC data structure */
3118 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3125 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3129 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3131 struct rte_eth_dev_info dev_info;
3132 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3135 rte_eth_dev_info_get(port_id, &dev_info);
3136 if (!dev->data->hash_mac_addrs)
3139 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3140 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3141 ETHER_ADDR_LEN) == 0)
3148 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3153 struct rte_eth_dev *dev;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3158 if (is_zero_ether_addr(addr)) {
3159 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3164 index = get_hash_mac_addr_index(port_id, addr);
3165 /* Check if it's already there, and do nothing */
3166 if ((index >= 0) && on)
3171 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3172 "set in UTA\n", port_id);
3176 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3178 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3185 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3187 /* Update address in NIC data structure */
3189 ether_addr_copy(addr,
3190 &dev->data->hash_mac_addrs[index]);
3192 ether_addr_copy(&null_mac_addr,
3193 &dev->data->hash_mac_addrs[index]);
3196 return eth_err(port_id, ret);
3200 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3202 struct rte_eth_dev *dev;
3204 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3206 dev = &rte_eth_devices[port_id];
3208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3209 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3213 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3216 struct rte_eth_dev *dev;
3217 struct rte_eth_dev_info dev_info;
3218 struct rte_eth_link link;
3220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3222 dev = &rte_eth_devices[port_id];
3223 rte_eth_dev_info_get(port_id, &dev_info);
3224 link = dev->data->dev_link;
3226 if (queue_idx > dev_info.max_tx_queues) {
3227 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3228 "invalid queue id=%d\n", port_id, queue_idx);
3232 if (tx_rate > link.link_speed) {
3233 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3234 "bigger than link speed= %d\n",
3235 tx_rate, link.link_speed);
3239 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3240 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3241 queue_idx, tx_rate));
3245 rte_eth_mirror_rule_set(uint16_t port_id,
3246 struct rte_eth_mirror_conf *mirror_conf,
3247 uint8_t rule_id, uint8_t on)
3249 struct rte_eth_dev *dev;
3251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3252 if (mirror_conf->rule_type == 0) {
3253 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3257 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3258 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3263 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3264 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3265 (mirror_conf->pool_mask == 0)) {
3266 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3270 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3271 mirror_conf->vlan.vlan_mask == 0) {
3272 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3276 dev = &rte_eth_devices[port_id];
3277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3279 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3280 mirror_conf, rule_id, on));
3284 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3286 struct rte_eth_dev *dev;
3288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3290 dev = &rte_eth_devices[port_id];
3291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3293 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3297 RTE_INIT(eth_dev_init_cb_lists)
3301 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3302 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3306 rte_eth_dev_callback_register(uint16_t port_id,
3307 enum rte_eth_event_type event,
3308 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3310 struct rte_eth_dev *dev;
3311 struct rte_eth_dev_callback *user_cb;
3312 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3318 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3319 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3323 if (port_id == RTE_ETH_ALL) {
3325 last_port = RTE_MAX_ETHPORTS - 1;
3327 next_port = last_port = port_id;
3330 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3333 dev = &rte_eth_devices[next_port];
3335 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3336 if (user_cb->cb_fn == cb_fn &&
3337 user_cb->cb_arg == cb_arg &&
3338 user_cb->event == event) {
3343 /* create a new callback. */
3344 if (user_cb == NULL) {
3345 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3346 sizeof(struct rte_eth_dev_callback), 0);
3347 if (user_cb != NULL) {
3348 user_cb->cb_fn = cb_fn;
3349 user_cb->cb_arg = cb_arg;
3350 user_cb->event = event;
3351 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3354 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3355 rte_eth_dev_callback_unregister(port_id, event,
3361 } while (++next_port <= last_port);
3363 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3368 rte_eth_dev_callback_unregister(uint16_t port_id,
3369 enum rte_eth_event_type event,
3370 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3373 struct rte_eth_dev *dev;
3374 struct rte_eth_dev_callback *cb, *next;
3375 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3381 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3382 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3386 if (port_id == RTE_ETH_ALL) {
3388 last_port = RTE_MAX_ETHPORTS - 1;
3390 next_port = last_port = port_id;
3393 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3396 dev = &rte_eth_devices[next_port];
3398 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3401 next = TAILQ_NEXT(cb, next);
3403 if (cb->cb_fn != cb_fn || cb->event != event ||
3404 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3408 * if this callback is not executing right now,
3411 if (cb->active == 0) {
3412 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3418 } while (++next_port <= last_port);
3420 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3425 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3426 enum rte_eth_event_type event, void *ret_param)
3428 struct rte_eth_dev_callback *cb_lst;
3429 struct rte_eth_dev_callback dev_cb;
3432 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3433 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3434 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3438 if (ret_param != NULL)
3439 dev_cb.ret_param = ret_param;
3441 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3442 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3443 dev_cb.cb_arg, dev_cb.ret_param);
3444 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3447 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3452 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3459 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3462 struct rte_eth_dev *dev;
3463 struct rte_intr_handle *intr_handle;
3467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3469 dev = &rte_eth_devices[port_id];
3471 if (!dev->intr_handle) {
3472 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3476 intr_handle = dev->intr_handle;
3477 if (!intr_handle->intr_vec) {
3478 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3482 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3483 vec = intr_handle->intr_vec[qid];
3484 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3485 if (rc && rc != -EEXIST) {
3486 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3487 " op %d epfd %d vec %u\n",
3488 port_id, qid, op, epfd, vec);
3495 const struct rte_memzone *
3496 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3497 uint16_t queue_id, size_t size, unsigned align,
3500 char z_name[RTE_MEMZONE_NAMESIZE];
3501 const struct rte_memzone *mz;
3503 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3504 dev->device->driver->name, ring_name,
3505 dev->data->port_id, queue_id);
3507 mz = rte_memzone_lookup(z_name);
3511 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3512 RTE_MEMZONE_IOVA_CONTIG, align);
3515 int __rte_experimental
3516 rte_eth_dev_create(struct rte_device *device, const char *name,
3517 size_t priv_data_size,
3518 ethdev_bus_specific_init ethdev_bus_specific_init,
3519 void *bus_init_params,
3520 ethdev_init_t ethdev_init, void *init_params)
3522 struct rte_eth_dev *ethdev;
3525 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3527 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3528 ethdev = rte_eth_dev_allocate(name);
3534 if (priv_data_size) {
3535 ethdev->data->dev_private = rte_zmalloc_socket(
3536 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3539 if (!ethdev->data->dev_private) {
3540 RTE_LOG(ERR, EAL, "failed to allocate private data");
3546 ethdev = rte_eth_dev_attach_secondary(name);
3548 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3549 "ethdev doesn't exist");
3555 ethdev->device = device;
3557 if (ethdev_bus_specific_init) {
3558 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3561 "ethdev bus specific initialisation failed");
3566 retval = ethdev_init(ethdev, init_params);
3568 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3572 rte_eth_dev_probing_finish(ethdev);
3576 /* free ports private data if primary process */
3577 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3578 rte_free(ethdev->data->dev_private);
3580 rte_eth_dev_release_port(ethdev);
3585 int __rte_experimental
3586 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3587 ethdev_uninit_t ethdev_uninit)
3591 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3595 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3596 if (ethdev_uninit) {
3597 ret = ethdev_uninit(ethdev);
3602 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3603 rte_free(ethdev->data->dev_private);
3605 ethdev->data->dev_private = NULL;
3607 return rte_eth_dev_release_port(ethdev);
3611 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3612 int epfd, int op, void *data)
3615 struct rte_eth_dev *dev;
3616 struct rte_intr_handle *intr_handle;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3621 dev = &rte_eth_devices[port_id];
3622 if (queue_id >= dev->data->nb_rx_queues) {
3623 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3627 if (!dev->intr_handle) {
3628 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3632 intr_handle = dev->intr_handle;
3633 if (!intr_handle->intr_vec) {
3634 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3638 vec = intr_handle->intr_vec[queue_id];
3639 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3640 if (rc && rc != -EEXIST) {
3641 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3642 " op %d epfd %d vec %u\n",
3643 port_id, queue_id, op, epfd, vec);
3651 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3654 struct rte_eth_dev *dev;
3656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3658 dev = &rte_eth_devices[port_id];
3660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3661 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3666 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3669 struct rte_eth_dev *dev;
3671 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3673 dev = &rte_eth_devices[port_id];
3675 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3676 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3682 rte_eth_dev_filter_supported(uint16_t port_id,
3683 enum rte_filter_type filter_type)
3685 struct rte_eth_dev *dev;
3687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3689 dev = &rte_eth_devices[port_id];
3690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3691 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3692 RTE_ETH_FILTER_NOP, NULL);
3696 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3697 enum rte_filter_op filter_op, void *arg)
3699 struct rte_eth_dev *dev;
3701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3703 dev = &rte_eth_devices[port_id];
3704 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3705 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3709 const struct rte_eth_rxtx_callback *
3710 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3711 rte_rx_callback_fn fn, void *user_param)
3713 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3714 rte_errno = ENOTSUP;
3717 /* check input parameters */
3718 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3719 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3723 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3731 cb->param = user_param;
3733 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3734 /* Add the callbacks in fifo order. */
3735 struct rte_eth_rxtx_callback *tail =
3736 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3739 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3746 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3751 const struct rte_eth_rxtx_callback *
3752 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3753 rte_rx_callback_fn fn, void *user_param)
3755 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3756 rte_errno = ENOTSUP;
3759 /* check input parameters */
3760 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3761 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3766 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3774 cb->param = user_param;
3776 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3777 /* Add the callbacks at fisrt position*/
3778 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3780 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3781 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3786 const struct rte_eth_rxtx_callback *
3787 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3788 rte_tx_callback_fn fn, void *user_param)
3790 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3791 rte_errno = ENOTSUP;
3794 /* check input parameters */
3795 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3796 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3801 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3809 cb->param = user_param;
3811 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3812 /* Add the callbacks in fifo order. */
3813 struct rte_eth_rxtx_callback *tail =
3814 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3817 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3824 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3830 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3831 const struct rte_eth_rxtx_callback *user_cb)
3833 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3836 /* Check input parameters. */
3837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3838 if (user_cb == NULL ||
3839 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3842 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3843 struct rte_eth_rxtx_callback *cb;
3844 struct rte_eth_rxtx_callback **prev_cb;
3847 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3848 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3849 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3851 if (cb == user_cb) {
3852 /* Remove the user cb from the callback list. */
3853 *prev_cb = cb->next;
3858 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3864 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3865 const struct rte_eth_rxtx_callback *user_cb)
3867 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3870 /* Check input parameters. */
3871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3872 if (user_cb == NULL ||
3873 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3876 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3878 struct rte_eth_rxtx_callback *cb;
3879 struct rte_eth_rxtx_callback **prev_cb;
3881 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3882 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3883 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3885 if (cb == user_cb) {
3886 /* Remove the user cb from the callback list. */
3887 *prev_cb = cb->next;
3892 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3898 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3899 struct rte_eth_rxq_info *qinfo)
3901 struct rte_eth_dev *dev;
3903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3908 dev = &rte_eth_devices[port_id];
3909 if (queue_id >= dev->data->nb_rx_queues) {
3910 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3916 memset(qinfo, 0, sizeof(*qinfo));
3917 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3922 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3923 struct rte_eth_txq_info *qinfo)
3925 struct rte_eth_dev *dev;
3926 struct rte_eth_txconf *txconf = &qinfo->conf;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3933 dev = &rte_eth_devices[port_id];
3934 if (queue_id >= dev->data->nb_tx_queues) {
3935 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3941 memset(qinfo, 0, sizeof(*qinfo));
3942 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3943 /* convert offload to txq_flags to support legacy app */
3944 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3950 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3951 struct ether_addr *mc_addr_set,
3952 uint32_t nb_mc_addr)
3954 struct rte_eth_dev *dev;
3956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3958 dev = &rte_eth_devices[port_id];
3959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3960 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3961 mc_addr_set, nb_mc_addr));
3965 rte_eth_timesync_enable(uint16_t port_id)
3967 struct rte_eth_dev *dev;
3969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3970 dev = &rte_eth_devices[port_id];
3972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3973 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3977 rte_eth_timesync_disable(uint16_t port_id)
3979 struct rte_eth_dev *dev;
3981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 dev = &rte_eth_devices[port_id];
3984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3985 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3989 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3992 struct rte_eth_dev *dev;
3994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3995 dev = &rte_eth_devices[port_id];
3997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3998 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3999 (dev, timestamp, flags));
4003 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4004 struct timespec *timestamp)
4006 struct rte_eth_dev *dev;
4008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4009 dev = &rte_eth_devices[port_id];
4011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4012 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4017 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4019 struct rte_eth_dev *dev;
4021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4022 dev = &rte_eth_devices[port_id];
4024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4025 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4030 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4032 struct rte_eth_dev *dev;
4034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4035 dev = &rte_eth_devices[port_id];
4037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4038 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4043 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4045 struct rte_eth_dev *dev;
4047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4048 dev = &rte_eth_devices[port_id];
4050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4051 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4056 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4058 struct rte_eth_dev *dev;
4060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4062 dev = &rte_eth_devices[port_id];
4063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4064 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4068 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4070 struct rte_eth_dev *dev;
4072 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4074 dev = &rte_eth_devices[port_id];
4075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4076 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4080 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4082 struct rte_eth_dev *dev;
4084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4086 dev = &rte_eth_devices[port_id];
4087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4088 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4092 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4098 dev = &rte_eth_devices[port_id];
4099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4100 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4103 int __rte_experimental
4104 rte_eth_dev_get_module_info(uint16_t port_id,
4105 struct rte_eth_dev_module_info *modinfo)
4107 struct rte_eth_dev *dev;
4109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4111 dev = &rte_eth_devices[port_id];
4112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4113 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4116 int __rte_experimental
4117 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4118 struct rte_dev_eeprom_info *info)
4120 struct rte_eth_dev *dev;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4124 dev = &rte_eth_devices[port_id];
4125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4126 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4130 rte_eth_dev_get_dcb_info(uint16_t port_id,
4131 struct rte_eth_dcb_info *dcb_info)
4133 struct rte_eth_dev *dev;
4135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4137 dev = &rte_eth_devices[port_id];
4138 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4141 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4145 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4146 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4148 struct rte_eth_dev *dev;
4150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4151 if (l2_tunnel == NULL) {
4152 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4156 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4157 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4161 dev = &rte_eth_devices[port_id];
4162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4164 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4169 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4170 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4174 struct rte_eth_dev *dev;
4176 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4178 if (l2_tunnel == NULL) {
4179 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4183 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4184 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4189 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4193 dev = &rte_eth_devices[port_id];
4194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4196 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4197 l2_tunnel, mask, en));
4201 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4202 const struct rte_eth_desc_lim *desc_lim)
4204 if (desc_lim->nb_align != 0)
4205 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4207 if (desc_lim->nb_max != 0)
4208 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4210 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4214 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4215 uint16_t *nb_rx_desc,
4216 uint16_t *nb_tx_desc)
4218 struct rte_eth_dev *dev;
4219 struct rte_eth_dev_info dev_info;
4221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4223 dev = &rte_eth_devices[port_id];
4224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4226 rte_eth_dev_info_get(port_id, &dev_info);
4228 if (nb_rx_desc != NULL)
4229 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4231 if (nb_tx_desc != NULL)
4232 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4238 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4240 struct rte_eth_dev *dev;
4242 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4247 dev = &rte_eth_devices[port_id];
4249 if (*dev->dev_ops->pool_ops_supported == NULL)
4250 return 1; /* all pools are supported */
4252 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4256 * A set of values to describe the possible states of a switch domain.
4258 enum rte_eth_switch_domain_state {
4259 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4260 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4264 * Array of switch domains available for allocation. Array is sized to
4265 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4266 * ethdev ports in a single process.
4268 struct rte_eth_dev_switch {
4269 enum rte_eth_switch_domain_state state;
4270 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4272 int __rte_experimental
4273 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4277 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4279 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4280 i < RTE_MAX_ETHPORTS; i++) {
4281 if (rte_eth_switch_domains[i].state ==
4282 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4283 rte_eth_switch_domains[i].state =
4284 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4293 int __rte_experimental
4294 rte_eth_switch_domain_free(uint16_t domain_id)
4296 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4297 domain_id >= RTE_MAX_ETHPORTS)
4300 if (rte_eth_switch_domains[domain_id].state !=
4301 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4304 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4309 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4312 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4315 struct rte_kvargs_pair *pair;
4318 arglist->str = strdup(str_in);
4319 if (arglist->str == NULL)
4322 letter = arglist->str;
4325 pair = &arglist->pairs[0];
4328 case 0: /* Initial */
4331 else if (*letter == '\0')
4338 case 1: /* Parsing key */
4339 if (*letter == '=') {
4341 pair->value = letter + 1;
4343 } else if (*letter == ',' || *letter == '\0')
4348 case 2: /* Parsing value */
4351 else if (*letter == ',') {
4354 pair = &arglist->pairs[arglist->count];
4356 } else if (*letter == '\0') {
4359 pair = &arglist->pairs[arglist->count];
4364 case 3: /* Parsing list */
4367 else if (*letter == '\0')
4376 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4384 /* Single element, not a list */
4385 return callback(str, data);
4387 /* Sanity check, then strip the brackets */
4388 str_start = &str[strlen(str) - 1];
4389 if (*str_start != ']') {
4390 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4396 /* Process list elements */
4406 } else if (state == 1) {
4407 if (*str == ',' || *str == '\0') {
4408 if (str > str_start) {
4409 /* Non-empty string fragment */
4411 result = callback(str_start, data);
4424 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4425 const uint16_t max_list)
4427 uint16_t lo, hi, val;
4430 result = sscanf(str, "%hu-%hu", &lo, &hi);
4432 if (*len_list >= max_list)
4434 list[(*len_list)++] = lo;
4435 } else if (result == 2) {
4436 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4438 for (val = lo; val <= hi; val++) {
4439 if (*len_list >= max_list)
4441 list[(*len_list)++] = val;
4450 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4452 struct rte_eth_devargs *eth_da = data;
4454 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4455 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4458 int __rte_experimental
4459 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4461 struct rte_kvargs args;
4462 struct rte_kvargs_pair *pair;
4466 memset(eth_da, 0, sizeof(*eth_da));
4468 result = rte_eth_devargs_tokenise(&args, dargs);
4472 for (i = 0; i < args.count; i++) {
4473 pair = &args.pairs[i];
4474 if (strcmp("representor", pair->key) == 0) {
4475 result = rte_eth_devargs_parse_list(pair->value,
4476 rte_eth_devargs_parse_representor_ports,
4490 RTE_INIT(ethdev_init_log);
4492 ethdev_init_log(void)
4494 ethdev_logtype = rte_log_register("lib.ethdev");
4495 if (ethdev_logtype >= 0)
4496 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);