1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
131 #undef RTE_RX_OFFLOAD_BIT2STR
133 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
134 { DEV_TX_OFFLOAD_##_name, #_name }
136 static const struct {
139 } rte_tx_offload_names[] = {
140 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
141 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
142 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
149 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
154 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
155 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
156 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
157 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
158 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
159 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 #undef RTE_TX_OFFLOAD_BIT2STR
165 * The user application callback description.
167 * It contains callback address to be registered by user application,
168 * the pointer to the parameters for callback, and the event type.
170 struct rte_eth_dev_callback {
171 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
172 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
173 void *cb_arg; /**< Parameter for callback */
174 void *ret_param; /**< Return parameter */
175 enum rte_eth_event_type event; /**< Interrupt event type */
176 uint32_t active; /**< Callback is executing */
185 rte_eth_find_next(uint16_t port_id)
187 while (port_id < RTE_MAX_ETHPORTS &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
192 if (port_id >= RTE_MAX_ETHPORTS)
193 return RTE_MAX_ETHPORTS;
199 rte_eth_dev_shared_data_prepare(void)
201 const unsigned flags = 0;
202 const struct rte_memzone *mz;
204 rte_spinlock_lock(&rte_eth_shared_data_lock);
206 if (rte_eth_dev_shared_data == NULL) {
207 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
208 /* Allocate port data and ownership shared memory. */
209 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
210 sizeof(*rte_eth_dev_shared_data),
211 rte_socket_id(), flags);
213 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
215 rte_panic("Cannot allocate ethdev shared data\n");
217 rte_eth_dev_shared_data = mz->addr;
218 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
219 rte_eth_dev_shared_data->next_owner_id =
220 RTE_ETH_DEV_NO_OWNER + 1;
221 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
222 memset(rte_eth_dev_shared_data->data, 0,
223 sizeof(rte_eth_dev_shared_data->data));
227 rte_spinlock_unlock(&rte_eth_shared_data_lock);
231 is_allocated(const struct rte_eth_dev *ethdev)
233 return ethdev->data->name[0] != '\0';
236 static struct rte_eth_dev *
237 _rte_eth_dev_allocated(const char *name)
241 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
242 if (rte_eth_devices[i].data != NULL &&
243 strcmp(rte_eth_devices[i].data->name, name) == 0)
244 return &rte_eth_devices[i];
250 rte_eth_dev_allocated(const char *name)
252 struct rte_eth_dev *ethdev;
254 rte_eth_dev_shared_data_prepare();
256 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
258 ethdev = _rte_eth_dev_allocated(name);
260 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
266 rte_eth_dev_find_free_port(void)
270 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
271 /* Using shared name field to find a free port. */
272 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
273 RTE_ASSERT(rte_eth_devices[i].state ==
278 return RTE_MAX_ETHPORTS;
281 static struct rte_eth_dev *
282 eth_dev_get(uint16_t port_id)
284 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
286 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
288 eth_dev_last_created_port = port_id;
294 rte_eth_dev_allocate(const char *name)
297 struct rte_eth_dev *eth_dev = NULL;
299 rte_eth_dev_shared_data_prepare();
301 /* Synchronize port creation between primary and secondary threads. */
302 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
304 if (_rte_eth_dev_allocated(name) != NULL) {
306 "Ethernet device with name %s already allocated\n",
311 port_id = rte_eth_dev_find_free_port();
312 if (port_id == RTE_MAX_ETHPORTS) {
314 "Reached maximum number of Ethernet ports\n");
318 eth_dev = eth_dev_get(port_id);
319 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
320 eth_dev->data->port_id = port_id;
321 eth_dev->data->mtu = ETHER_MTU;
324 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
330 * Attach to a port already registered by the primary process, which
331 * makes sure that the same device would have the same port id both
332 * in the primary and secondary process.
335 rte_eth_dev_attach_secondary(const char *name)
338 struct rte_eth_dev *eth_dev = NULL;
340 rte_eth_dev_shared_data_prepare();
342 /* Synchronize port attachment to primary port creation and release. */
343 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
345 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
346 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
349 if (i == RTE_MAX_ETHPORTS) {
351 "Device %s is not driven by the primary process\n",
354 eth_dev = eth_dev_get(i);
355 RTE_ASSERT(eth_dev->data->port_id == i);
358 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
363 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
368 rte_eth_dev_shared_data_prepare();
370 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
372 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
374 eth_dev->state = RTE_ETH_DEV_UNUSED;
376 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
378 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
384 rte_eth_dev_is_valid_port(uint16_t port_id)
386 if (port_id >= RTE_MAX_ETHPORTS ||
387 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
394 rte_eth_is_valid_owner_id(uint64_t owner_id)
396 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
397 rte_eth_dev_shared_data->next_owner_id <= owner_id)
403 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
405 while (port_id < RTE_MAX_ETHPORTS &&
406 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
407 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
408 rte_eth_devices[port_id].data->owner.id != owner_id))
411 if (port_id >= RTE_MAX_ETHPORTS)
412 return RTE_MAX_ETHPORTS;
417 int __rte_experimental
418 rte_eth_dev_owner_new(uint64_t *owner_id)
420 rte_eth_dev_shared_data_prepare();
422 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
424 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
426 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
431 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
432 const struct rte_eth_dev_owner *new_owner)
434 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
435 struct rte_eth_dev_owner *port_owner;
438 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
439 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
444 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
445 !rte_eth_is_valid_owner_id(old_owner_id)) {
447 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
448 old_owner_id, new_owner->id);
452 port_owner = &rte_eth_devices[port_id].data->owner;
453 if (port_owner->id != old_owner_id) {
455 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
456 port_id, port_owner->name, port_owner->id);
460 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
462 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
463 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
466 port_owner->id = new_owner->id;
468 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
469 port_id, new_owner->name, new_owner->id);
474 int __rte_experimental
475 rte_eth_dev_owner_set(const uint16_t port_id,
476 const struct rte_eth_dev_owner *owner)
480 rte_eth_dev_shared_data_prepare();
482 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
486 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
490 int __rte_experimental
491 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
493 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
494 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
497 rte_eth_dev_shared_data_prepare();
499 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
501 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
503 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
507 void __rte_experimental
508 rte_eth_dev_owner_delete(const uint64_t owner_id)
512 rte_eth_dev_shared_data_prepare();
514 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
516 if (rte_eth_is_valid_owner_id(owner_id)) {
517 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
518 if (rte_eth_devices[port_id].data->owner.id == owner_id)
519 memset(&rte_eth_devices[port_id].data->owner, 0,
520 sizeof(struct rte_eth_dev_owner));
521 RTE_ETHDEV_LOG(NOTICE,
522 "All port owners owned by %016"PRIx64" identifier have removed\n",
526 "Invalid owner id=%016"PRIx64"\n",
530 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
533 int __rte_experimental
534 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
537 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
539 rte_eth_dev_shared_data_prepare();
541 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
543 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
544 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
548 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
551 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
556 rte_eth_dev_socket_id(uint16_t port_id)
558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
559 return rte_eth_devices[port_id].data->numa_node;
563 rte_eth_dev_get_sec_ctx(uint16_t port_id)
565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
566 return rte_eth_devices[port_id].security_ctx;
570 rte_eth_dev_count(void)
572 return rte_eth_dev_count_avail();
576 rte_eth_dev_count_avail(void)
583 RTE_ETH_FOREACH_DEV(p)
589 uint16_t __rte_experimental
590 rte_eth_dev_count_total(void)
592 uint16_t port, count = 0;
594 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
595 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
602 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
609 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
613 /* shouldn't check 'rte_eth_devices[i].data',
614 * because it might be overwritten by VDEV PMD */
615 tmp = rte_eth_dev_shared_data->data[port_id].name;
621 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
626 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
630 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
631 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
632 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
642 eth_err(uint16_t port_id, int ret)
646 if (rte_eth_dev_is_removed(port_id))
651 /* attach the new device, then store port_id of the device */
653 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
655 int current = rte_eth_dev_count_total();
656 struct rte_devargs da;
659 memset(&da, 0, sizeof(da));
661 if ((devargs == NULL) || (port_id == NULL)) {
667 if (rte_devargs_parse(&da, devargs))
670 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
674 /* no point looking at the port count if no port exists */
675 if (!rte_eth_dev_count_total()) {
676 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
681 /* if nothing happened, there is a bug here, since some driver told us
682 * it did attach a device, but did not create a port.
683 * FIXME: race condition in case of plug-out of another device
685 if (current == rte_eth_dev_count_total()) {
690 *port_id = eth_dev_last_created_port;
698 /* detach the device, then store the name of the device */
700 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
702 struct rte_device *dev;
707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
709 dev_flags = rte_eth_devices[port_id].data->dev_flags;
710 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
712 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
716 dev = rte_eth_devices[port_id].device;
720 bus = rte_bus_find_by_device(dev);
724 ret = rte_eal_hotplug_remove(bus->name, dev->name);
728 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
733 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
735 uint16_t old_nb_queues = dev->data->nb_rx_queues;
739 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
740 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
741 sizeof(dev->data->rx_queues[0]) * nb_queues,
742 RTE_CACHE_LINE_SIZE);
743 if (dev->data->rx_queues == NULL) {
744 dev->data->nb_rx_queues = 0;
747 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
750 rxq = dev->data->rx_queues;
752 for (i = nb_queues; i < old_nb_queues; i++)
753 (*dev->dev_ops->rx_queue_release)(rxq[i]);
754 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
755 RTE_CACHE_LINE_SIZE);
758 if (nb_queues > old_nb_queues) {
759 uint16_t new_qs = nb_queues - old_nb_queues;
761 memset(rxq + old_nb_queues, 0,
762 sizeof(rxq[0]) * new_qs);
765 dev->data->rx_queues = rxq;
767 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
770 rxq = dev->data->rx_queues;
772 for (i = nb_queues; i < old_nb_queues; i++)
773 (*dev->dev_ops->rx_queue_release)(rxq[i]);
775 rte_free(dev->data->rx_queues);
776 dev->data->rx_queues = NULL;
778 dev->data->nb_rx_queues = nb_queues;
783 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
785 struct rte_eth_dev *dev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 dev = &rte_eth_devices[port_id];
790 if (!dev->data->dev_started) {
792 "Port %u must be started before start any queue\n",
797 if (rx_queue_id >= dev->data->nb_rx_queues) {
798 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
804 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
806 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
807 rx_queue_id, port_id);
811 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
817 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
819 struct rte_eth_dev *dev;
821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
823 dev = &rte_eth_devices[port_id];
824 if (rx_queue_id >= dev->data->nb_rx_queues) {
825 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
829 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
831 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
833 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
834 rx_queue_id, port_id);
838 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
843 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
845 struct rte_eth_dev *dev;
847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
849 dev = &rte_eth_devices[port_id];
850 if (!dev->data->dev_started) {
852 "Port %u must be started before start any queue\n",
857 if (tx_queue_id >= dev->data->nb_tx_queues) {
858 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
864 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
866 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
867 tx_queue_id, port_id);
871 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
875 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
877 struct rte_eth_dev *dev;
879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
881 dev = &rte_eth_devices[port_id];
882 if (tx_queue_id >= dev->data->nb_tx_queues) {
883 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
887 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
889 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
891 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
892 tx_queue_id, port_id);
896 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
901 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
903 uint16_t old_nb_queues = dev->data->nb_tx_queues;
907 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
908 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
909 sizeof(dev->data->tx_queues[0]) * nb_queues,
910 RTE_CACHE_LINE_SIZE);
911 if (dev->data->tx_queues == NULL) {
912 dev->data->nb_tx_queues = 0;
915 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
918 txq = dev->data->tx_queues;
920 for (i = nb_queues; i < old_nb_queues; i++)
921 (*dev->dev_ops->tx_queue_release)(txq[i]);
922 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
923 RTE_CACHE_LINE_SIZE);
926 if (nb_queues > old_nb_queues) {
927 uint16_t new_qs = nb_queues - old_nb_queues;
929 memset(txq + old_nb_queues, 0,
930 sizeof(txq[0]) * new_qs);
933 dev->data->tx_queues = txq;
935 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
938 txq = dev->data->tx_queues;
940 for (i = nb_queues; i < old_nb_queues; i++)
941 (*dev->dev_ops->tx_queue_release)(txq[i]);
943 rte_free(dev->data->tx_queues);
944 dev->data->tx_queues = NULL;
946 dev->data->nb_tx_queues = nb_queues;
951 rte_eth_speed_bitflag(uint32_t speed, int duplex)
954 case ETH_SPEED_NUM_10M:
955 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
956 case ETH_SPEED_NUM_100M:
957 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
958 case ETH_SPEED_NUM_1G:
959 return ETH_LINK_SPEED_1G;
960 case ETH_SPEED_NUM_2_5G:
961 return ETH_LINK_SPEED_2_5G;
962 case ETH_SPEED_NUM_5G:
963 return ETH_LINK_SPEED_5G;
964 case ETH_SPEED_NUM_10G:
965 return ETH_LINK_SPEED_10G;
966 case ETH_SPEED_NUM_20G:
967 return ETH_LINK_SPEED_20G;
968 case ETH_SPEED_NUM_25G:
969 return ETH_LINK_SPEED_25G;
970 case ETH_SPEED_NUM_40G:
971 return ETH_LINK_SPEED_40G;
972 case ETH_SPEED_NUM_50G:
973 return ETH_LINK_SPEED_50G;
974 case ETH_SPEED_NUM_56G:
975 return ETH_LINK_SPEED_56G;
976 case ETH_SPEED_NUM_100G:
977 return ETH_LINK_SPEED_100G;
983 const char * __rte_experimental
984 rte_eth_dev_rx_offload_name(uint64_t offload)
986 const char *name = "UNKNOWN";
989 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
990 if (offload == rte_rx_offload_names[i].offload) {
991 name = rte_rx_offload_names[i].name;
999 const char * __rte_experimental
1000 rte_eth_dev_tx_offload_name(uint64_t offload)
1002 const char *name = "UNKNOWN";
1005 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1006 if (offload == rte_tx_offload_names[i].offload) {
1007 name = rte_tx_offload_names[i].name;
1016 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1017 const struct rte_eth_conf *dev_conf)
1019 struct rte_eth_dev *dev;
1020 struct rte_eth_dev_info dev_info;
1021 struct rte_eth_conf local_conf = *dev_conf;
1024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1026 dev = &rte_eth_devices[port_id];
1028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1031 rte_eth_dev_info_get(port_id, &dev_info);
1033 /* If number of queues specified by application for both Rx and Tx is
1034 * zero, use driver preferred values. This cannot be done individually
1035 * as it is valid for either Tx or Rx (but not both) to be zero.
1036 * If driver does not provide any preferred valued, fall back on
1039 if (nb_rx_q == 0 && nb_tx_q == 0) {
1040 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1042 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1043 nb_tx_q = dev_info.default_txportconf.nb_queues;
1045 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1048 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1050 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1051 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1055 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1057 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1058 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1062 if (dev->data->dev_started) {
1064 "Port %u must be stopped to allow configuration\n",
1069 /* Copy the dev_conf parameter into the dev structure */
1070 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1073 * Check that the numbers of RX and TX queues are not greater
1074 * than the maximum number of RX and TX queues supported by the
1075 * configured device.
1077 if (nb_rx_q > dev_info.max_rx_queues) {
1078 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1079 port_id, nb_rx_q, dev_info.max_rx_queues);
1083 if (nb_tx_q > dev_info.max_tx_queues) {
1084 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1085 port_id, nb_tx_q, dev_info.max_tx_queues);
1089 /* Check that the device supports requested interrupts */
1090 if ((dev_conf->intr_conf.lsc == 1) &&
1091 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1092 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1093 dev->device->driver->name);
1096 if ((dev_conf->intr_conf.rmv == 1) &&
1097 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1098 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1099 dev->device->driver->name);
1104 * If jumbo frames are enabled, check that the maximum RX packet
1105 * length is supported by the configured device.
1107 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1108 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1110 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1111 port_id, dev_conf->rxmode.max_rx_pkt_len,
1112 dev_info.max_rx_pktlen);
1114 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1116 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1117 port_id, dev_conf->rxmode.max_rx_pkt_len,
1118 (unsigned)ETHER_MIN_LEN);
1122 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1123 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1124 /* Use default value */
1125 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1129 /* Any requested offloading must be within its device capabilities */
1130 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1131 local_conf.rxmode.offloads) {
1133 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1134 "capabilities 0x%"PRIx64" in %s()\n",
1135 port_id, local_conf.rxmode.offloads,
1136 dev_info.rx_offload_capa,
1140 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1141 local_conf.txmode.offloads) {
1143 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1144 "capabilities 0x%"PRIx64" in %s()\n",
1145 port_id, local_conf.txmode.offloads,
1146 dev_info.tx_offload_capa,
1151 /* Check that device supports requested rss hash functions. */
1152 if ((dev_info.flow_type_rss_offloads |
1153 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1154 dev_info.flow_type_rss_offloads) {
1156 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1157 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1158 dev_info.flow_type_rss_offloads);
1163 * Setup new number of RX/TX queues and reconfigure device.
1165 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1168 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1173 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1176 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1178 rte_eth_dev_rx_queue_config(dev, 0);
1182 diag = (*dev->dev_ops->dev_configure)(dev);
1184 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1186 rte_eth_dev_rx_queue_config(dev, 0);
1187 rte_eth_dev_tx_queue_config(dev, 0);
1188 return eth_err(port_id, diag);
1191 /* Initialize Rx profiling if enabled at compilation time. */
1192 diag = __rte_eth_dev_profile_init(port_id, dev);
1194 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1196 rte_eth_dev_rx_queue_config(dev, 0);
1197 rte_eth_dev_tx_queue_config(dev, 0);
1198 return eth_err(port_id, diag);
1205 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1207 if (dev->data->dev_started) {
1208 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1209 dev->data->port_id);
1213 rte_eth_dev_rx_queue_config(dev, 0);
1214 rte_eth_dev_tx_queue_config(dev, 0);
1216 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1220 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1221 struct rte_eth_dev_info *dev_info)
1223 struct ether_addr *addr;
1228 /* replay MAC address configuration including default MAC */
1229 addr = &dev->data->mac_addrs[0];
1230 if (*dev->dev_ops->mac_addr_set != NULL)
1231 (*dev->dev_ops->mac_addr_set)(dev, addr);
1232 else if (*dev->dev_ops->mac_addr_add != NULL)
1233 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1235 if (*dev->dev_ops->mac_addr_add != NULL) {
1236 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1237 addr = &dev->data->mac_addrs[i];
1239 /* skip zero address */
1240 if (is_zero_ether_addr(addr))
1244 pool_mask = dev->data->mac_pool_sel[i];
1247 if (pool_mask & 1ULL)
1248 (*dev->dev_ops->mac_addr_add)(dev,
1252 } while (pool_mask);
1258 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1259 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1261 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1262 rte_eth_dev_mac_restore(dev, dev_info);
1264 /* replay promiscuous configuration */
1265 if (rte_eth_promiscuous_get(port_id) == 1)
1266 rte_eth_promiscuous_enable(port_id);
1267 else if (rte_eth_promiscuous_get(port_id) == 0)
1268 rte_eth_promiscuous_disable(port_id);
1270 /* replay all multicast configuration */
1271 if (rte_eth_allmulticast_get(port_id) == 1)
1272 rte_eth_allmulticast_enable(port_id);
1273 else if (rte_eth_allmulticast_get(port_id) == 0)
1274 rte_eth_allmulticast_disable(port_id);
1278 rte_eth_dev_start(uint16_t port_id)
1280 struct rte_eth_dev *dev;
1281 struct rte_eth_dev_info dev_info;
1284 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1286 dev = &rte_eth_devices[port_id];
1288 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1290 if (dev->data->dev_started != 0) {
1291 RTE_ETHDEV_LOG(INFO,
1292 "Device with port_id=%"PRIu16" already started\n",
1297 rte_eth_dev_info_get(port_id, &dev_info);
1299 /* Lets restore MAC now if device does not support live change */
1300 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1301 rte_eth_dev_mac_restore(dev, &dev_info);
1303 diag = (*dev->dev_ops->dev_start)(dev);
1305 dev->data->dev_started = 1;
1307 return eth_err(port_id, diag);
1309 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1311 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1312 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1313 (*dev->dev_ops->link_update)(dev, 0);
1319 rte_eth_dev_stop(uint16_t port_id)
1321 struct rte_eth_dev *dev;
1323 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1324 dev = &rte_eth_devices[port_id];
1326 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1328 if (dev->data->dev_started == 0) {
1329 RTE_ETHDEV_LOG(INFO,
1330 "Device with port_id=%"PRIu16" already stopped\n",
1335 dev->data->dev_started = 0;
1336 (*dev->dev_ops->dev_stop)(dev);
1340 rte_eth_dev_set_link_up(uint16_t port_id)
1342 struct rte_eth_dev *dev;
1344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1346 dev = &rte_eth_devices[port_id];
1348 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1349 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1353 rte_eth_dev_set_link_down(uint16_t port_id)
1355 struct rte_eth_dev *dev;
1357 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1359 dev = &rte_eth_devices[port_id];
1361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1362 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1366 rte_eth_dev_close(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1370 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1371 dev = &rte_eth_devices[port_id];
1373 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1374 dev->data->dev_started = 0;
1375 (*dev->dev_ops->dev_close)(dev);
1377 dev->data->nb_rx_queues = 0;
1378 rte_free(dev->data->rx_queues);
1379 dev->data->rx_queues = NULL;
1380 dev->data->nb_tx_queues = 0;
1381 rte_free(dev->data->tx_queues);
1382 dev->data->tx_queues = NULL;
1386 rte_eth_dev_reset(uint16_t port_id)
1388 struct rte_eth_dev *dev;
1391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1392 dev = &rte_eth_devices[port_id];
1394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1396 rte_eth_dev_stop(port_id);
1397 ret = dev->dev_ops->dev_reset(dev);
1399 return eth_err(port_id, ret);
1402 int __rte_experimental
1403 rte_eth_dev_is_removed(uint16_t port_id)
1405 struct rte_eth_dev *dev;
1408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1410 dev = &rte_eth_devices[port_id];
1412 if (dev->state == RTE_ETH_DEV_REMOVED)
1415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1417 ret = dev->dev_ops->is_removed(dev);
1419 /* Device is physically removed. */
1420 dev->state = RTE_ETH_DEV_REMOVED;
1426 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1427 uint16_t nb_rx_desc, unsigned int socket_id,
1428 const struct rte_eth_rxconf *rx_conf,
1429 struct rte_mempool *mp)
1432 uint32_t mbp_buf_size;
1433 struct rte_eth_dev *dev;
1434 struct rte_eth_dev_info dev_info;
1435 struct rte_eth_rxconf local_conf;
1438 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1440 dev = &rte_eth_devices[port_id];
1441 if (rx_queue_id >= dev->data->nb_rx_queues) {
1442 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1450 * Check the size of the mbuf data buffer.
1451 * This value must be provided in the private data of the memory pool.
1452 * First check that the memory pool has a valid private data.
1454 rte_eth_dev_info_get(port_id, &dev_info);
1455 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1456 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1457 mp->name, (int)mp->private_data_size,
1458 (int)sizeof(struct rte_pktmbuf_pool_private));
1461 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1463 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1465 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1466 mp->name, (int)mbp_buf_size,
1467 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1468 (int)RTE_PKTMBUF_HEADROOM,
1469 (int)dev_info.min_rx_bufsize);
1473 /* Use default specified by driver, if nb_rx_desc is zero */
1474 if (nb_rx_desc == 0) {
1475 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1476 /* If driver default is also zero, fall back on EAL default */
1477 if (nb_rx_desc == 0)
1478 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1481 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1482 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1483 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1486 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1487 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1488 dev_info.rx_desc_lim.nb_min,
1489 dev_info.rx_desc_lim.nb_align);
1493 if (dev->data->dev_started &&
1494 !(dev_info.dev_capa &
1495 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1498 if (dev->data->dev_started &&
1499 (dev->data->rx_queue_state[rx_queue_id] !=
1500 RTE_ETH_QUEUE_STATE_STOPPED))
1503 rxq = dev->data->rx_queues;
1504 if (rxq[rx_queue_id]) {
1505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1507 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1508 rxq[rx_queue_id] = NULL;
1511 if (rx_conf == NULL)
1512 rx_conf = &dev_info.default_rxconf;
1514 local_conf = *rx_conf;
1517 * If an offloading has already been enabled in
1518 * rte_eth_dev_configure(), it has been enabled on all queues,
1519 * so there is no need to enable it in this queue again.
1520 * The local_conf.offloads input to underlying PMD only carries
1521 * those offloadings which are only enabled on this queue and
1522 * not enabled on all queues.
1524 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1527 * New added offloadings for this queue are those not enabled in
1528 * rte_eth_dev_configure() and they must be per-queue type.
1529 * A pure per-port offloading can't be enabled on a queue while
1530 * disabled on another queue. A pure per-port offloading can't
1531 * be enabled for any queue as new added one if it hasn't been
1532 * enabled in rte_eth_dev_configure().
1534 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1535 local_conf.offloads) {
1537 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1538 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1539 port_id, rx_queue_id, local_conf.offloads,
1540 dev_info.rx_queue_offload_capa,
1545 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1546 socket_id, &local_conf, mp);
1548 if (!dev->data->min_rx_buf_size ||
1549 dev->data->min_rx_buf_size > mbp_buf_size)
1550 dev->data->min_rx_buf_size = mbp_buf_size;
1553 return eth_err(port_id, ret);
1557 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1558 uint16_t nb_tx_desc, unsigned int socket_id,
1559 const struct rte_eth_txconf *tx_conf)
1561 struct rte_eth_dev *dev;
1562 struct rte_eth_dev_info dev_info;
1563 struct rte_eth_txconf local_conf;
1566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1568 dev = &rte_eth_devices[port_id];
1569 if (tx_queue_id >= dev->data->nb_tx_queues) {
1570 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1577 rte_eth_dev_info_get(port_id, &dev_info);
1579 /* Use default specified by driver, if nb_tx_desc is zero */
1580 if (nb_tx_desc == 0) {
1581 nb_tx_desc = dev_info.default_txportconf.ring_size;
1582 /* If driver default is zero, fall back on EAL default */
1583 if (nb_tx_desc == 0)
1584 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1586 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1587 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1588 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1590 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1591 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1592 dev_info.tx_desc_lim.nb_min,
1593 dev_info.tx_desc_lim.nb_align);
1597 if (dev->data->dev_started &&
1598 !(dev_info.dev_capa &
1599 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1602 if (dev->data->dev_started &&
1603 (dev->data->tx_queue_state[tx_queue_id] !=
1604 RTE_ETH_QUEUE_STATE_STOPPED))
1607 txq = dev->data->tx_queues;
1608 if (txq[tx_queue_id]) {
1609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1611 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1612 txq[tx_queue_id] = NULL;
1615 if (tx_conf == NULL)
1616 tx_conf = &dev_info.default_txconf;
1618 local_conf = *tx_conf;
1621 * If an offloading has already been enabled in
1622 * rte_eth_dev_configure(), it has been enabled on all queues,
1623 * so there is no need to enable it in this queue again.
1624 * The local_conf.offloads input to underlying PMD only carries
1625 * those offloadings which are only enabled on this queue and
1626 * not enabled on all queues.
1628 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1631 * New added offloadings for this queue are those not enabled in
1632 * rte_eth_dev_configure() and they must be per-queue type.
1633 * A pure per-port offloading can't be enabled on a queue while
1634 * disabled on another queue. A pure per-port offloading can't
1635 * be enabled for any queue as new added one if it hasn't been
1636 * enabled in rte_eth_dev_configure().
1638 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1639 local_conf.offloads) {
1641 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1642 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1643 port_id, tx_queue_id, local_conf.offloads,
1644 dev_info.tx_queue_offload_capa,
1649 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1650 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1654 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1655 void *userdata __rte_unused)
1659 for (i = 0; i < unsent; i++)
1660 rte_pktmbuf_free(pkts[i]);
1664 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1667 uint64_t *count = userdata;
1670 for (i = 0; i < unsent; i++)
1671 rte_pktmbuf_free(pkts[i]);
1677 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1678 buffer_tx_error_fn cbfn, void *userdata)
1680 buffer->error_callback = cbfn;
1681 buffer->error_userdata = userdata;
1686 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1693 buffer->size = size;
1694 if (buffer->error_callback == NULL) {
1695 ret = rte_eth_tx_buffer_set_err_callback(
1696 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1703 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1705 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1708 /* Validate Input Data. Bail if not valid or not supported. */
1709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1710 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1712 /* Call driver to free pending mbufs. */
1713 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1715 return eth_err(port_id, ret);
1719 rte_eth_promiscuous_enable(uint16_t port_id)
1721 struct rte_eth_dev *dev;
1723 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1724 dev = &rte_eth_devices[port_id];
1726 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1727 (*dev->dev_ops->promiscuous_enable)(dev);
1728 dev->data->promiscuous = 1;
1732 rte_eth_promiscuous_disable(uint16_t port_id)
1734 struct rte_eth_dev *dev;
1736 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1737 dev = &rte_eth_devices[port_id];
1739 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1740 dev->data->promiscuous = 0;
1741 (*dev->dev_ops->promiscuous_disable)(dev);
1745 rte_eth_promiscuous_get(uint16_t port_id)
1747 struct rte_eth_dev *dev;
1749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1751 dev = &rte_eth_devices[port_id];
1752 return dev->data->promiscuous;
1756 rte_eth_allmulticast_enable(uint16_t port_id)
1758 struct rte_eth_dev *dev;
1760 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1761 dev = &rte_eth_devices[port_id];
1763 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1764 (*dev->dev_ops->allmulticast_enable)(dev);
1765 dev->data->all_multicast = 1;
1769 rte_eth_allmulticast_disable(uint16_t port_id)
1771 struct rte_eth_dev *dev;
1773 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1774 dev = &rte_eth_devices[port_id];
1776 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1777 dev->data->all_multicast = 0;
1778 (*dev->dev_ops->allmulticast_disable)(dev);
1782 rte_eth_allmulticast_get(uint16_t port_id)
1784 struct rte_eth_dev *dev;
1786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1788 dev = &rte_eth_devices[port_id];
1789 return dev->data->all_multicast;
1793 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1795 struct rte_eth_dev *dev;
1797 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1798 dev = &rte_eth_devices[port_id];
1800 if (dev->data->dev_conf.intr_conf.lsc &&
1801 dev->data->dev_started)
1802 rte_eth_linkstatus_get(dev, eth_link);
1804 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1805 (*dev->dev_ops->link_update)(dev, 1);
1806 *eth_link = dev->data->dev_link;
1811 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1813 struct rte_eth_dev *dev;
1815 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1816 dev = &rte_eth_devices[port_id];
1818 if (dev->data->dev_conf.intr_conf.lsc &&
1819 dev->data->dev_started)
1820 rte_eth_linkstatus_get(dev, eth_link);
1822 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1823 (*dev->dev_ops->link_update)(dev, 0);
1824 *eth_link = dev->data->dev_link;
1829 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1831 struct rte_eth_dev *dev;
1833 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1835 dev = &rte_eth_devices[port_id];
1836 memset(stats, 0, sizeof(*stats));
1838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1839 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1840 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1844 rte_eth_stats_reset(uint16_t port_id)
1846 struct rte_eth_dev *dev;
1848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1849 dev = &rte_eth_devices[port_id];
1851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1852 (*dev->dev_ops->stats_reset)(dev);
1853 dev->data->rx_mbuf_alloc_failed = 0;
1859 get_xstats_basic_count(struct rte_eth_dev *dev)
1861 uint16_t nb_rxqs, nb_txqs;
1864 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1865 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1867 count = RTE_NB_STATS;
1868 count += nb_rxqs * RTE_NB_RXQ_STATS;
1869 count += nb_txqs * RTE_NB_TXQ_STATS;
1875 get_xstats_count(uint16_t port_id)
1877 struct rte_eth_dev *dev;
1880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1881 dev = &rte_eth_devices[port_id];
1882 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1883 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1886 return eth_err(port_id, count);
1888 if (dev->dev_ops->xstats_get_names != NULL) {
1889 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1891 return eth_err(port_id, count);
1896 count += get_xstats_basic_count(dev);
1902 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1905 int cnt_xstats, idx_xstat;
1907 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1910 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1915 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1920 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1921 if (cnt_xstats < 0) {
1922 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1926 /* Get id-name lookup table */
1927 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1929 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1930 port_id, xstats_names, cnt_xstats, NULL)) {
1931 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1935 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1936 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1945 /* retrieve basic stats names */
1947 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1948 struct rte_eth_xstat_name *xstats_names)
1950 int cnt_used_entries = 0;
1951 uint32_t idx, id_queue;
1954 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1955 snprintf(xstats_names[cnt_used_entries].name,
1956 sizeof(xstats_names[0].name),
1957 "%s", rte_stats_strings[idx].name);
1960 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1961 for (id_queue = 0; id_queue < num_q; id_queue++) {
1962 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1963 snprintf(xstats_names[cnt_used_entries].name,
1964 sizeof(xstats_names[0].name),
1966 id_queue, rte_rxq_stats_strings[idx].name);
1971 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1972 for (id_queue = 0; id_queue < num_q; id_queue++) {
1973 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1974 snprintf(xstats_names[cnt_used_entries].name,
1975 sizeof(xstats_names[0].name),
1977 id_queue, rte_txq_stats_strings[idx].name);
1981 return cnt_used_entries;
1984 /* retrieve ethdev extended statistics names */
1986 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1987 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1990 struct rte_eth_xstat_name *xstats_names_copy;
1991 unsigned int no_basic_stat_requested = 1;
1992 unsigned int no_ext_stat_requested = 1;
1993 unsigned int expected_entries;
1994 unsigned int basic_count;
1995 struct rte_eth_dev *dev;
1999 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2000 dev = &rte_eth_devices[port_id];
2002 basic_count = get_xstats_basic_count(dev);
2003 ret = get_xstats_count(port_id);
2006 expected_entries = (unsigned int)ret;
2008 /* Return max number of stats if no ids given */
2011 return expected_entries;
2012 else if (xstats_names && size < expected_entries)
2013 return expected_entries;
2016 if (ids && !xstats_names)
2019 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2020 uint64_t ids_copy[size];
2022 for (i = 0; i < size; i++) {
2023 if (ids[i] < basic_count) {
2024 no_basic_stat_requested = 0;
2029 * Convert ids to xstats ids that PMD knows.
2030 * ids known by user are basic + extended stats.
2032 ids_copy[i] = ids[i] - basic_count;
2035 if (no_basic_stat_requested)
2036 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2037 xstats_names, ids_copy, size);
2040 /* Retrieve all stats */
2042 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2044 if (num_stats < 0 || num_stats > (int)expected_entries)
2047 return expected_entries;
2050 xstats_names_copy = calloc(expected_entries,
2051 sizeof(struct rte_eth_xstat_name));
2053 if (!xstats_names_copy) {
2054 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2059 for (i = 0; i < size; i++) {
2060 if (ids[i] >= basic_count) {
2061 no_ext_stat_requested = 0;
2067 /* Fill xstats_names_copy structure */
2068 if (ids && no_ext_stat_requested) {
2069 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2071 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2074 free(xstats_names_copy);
2080 for (i = 0; i < size; i++) {
2081 if (ids[i] >= expected_entries) {
2082 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2083 free(xstats_names_copy);
2086 xstats_names[i] = xstats_names_copy[ids[i]];
2089 free(xstats_names_copy);
2094 rte_eth_xstats_get_names(uint16_t port_id,
2095 struct rte_eth_xstat_name *xstats_names,
2098 struct rte_eth_dev *dev;
2099 int cnt_used_entries;
2100 int cnt_expected_entries;
2101 int cnt_driver_entries;
2103 cnt_expected_entries = get_xstats_count(port_id);
2104 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2105 (int)size < cnt_expected_entries)
2106 return cnt_expected_entries;
2108 /* port_id checked in get_xstats_count() */
2109 dev = &rte_eth_devices[port_id];
2111 cnt_used_entries = rte_eth_basic_stats_get_names(
2114 if (dev->dev_ops->xstats_get_names != NULL) {
2115 /* If there are any driver-specific xstats, append them
2118 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2120 xstats_names + cnt_used_entries,
2121 size - cnt_used_entries);
2122 if (cnt_driver_entries < 0)
2123 return eth_err(port_id, cnt_driver_entries);
2124 cnt_used_entries += cnt_driver_entries;
2127 return cnt_used_entries;
2132 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2134 struct rte_eth_dev *dev;
2135 struct rte_eth_stats eth_stats;
2136 unsigned int count = 0, i, q;
2137 uint64_t val, *stats_ptr;
2138 uint16_t nb_rxqs, nb_txqs;
2141 ret = rte_eth_stats_get(port_id, ð_stats);
2145 dev = &rte_eth_devices[port_id];
2147 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2148 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2151 for (i = 0; i < RTE_NB_STATS; i++) {
2152 stats_ptr = RTE_PTR_ADD(ð_stats,
2153 rte_stats_strings[i].offset);
2155 xstats[count++].value = val;
2159 for (q = 0; q < nb_rxqs; q++) {
2160 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2161 stats_ptr = RTE_PTR_ADD(ð_stats,
2162 rte_rxq_stats_strings[i].offset +
2163 q * sizeof(uint64_t));
2165 xstats[count++].value = val;
2170 for (q = 0; q < nb_txqs; q++) {
2171 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2172 stats_ptr = RTE_PTR_ADD(ð_stats,
2173 rte_txq_stats_strings[i].offset +
2174 q * sizeof(uint64_t));
2176 xstats[count++].value = val;
2182 /* retrieve ethdev extended statistics */
2184 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2185 uint64_t *values, unsigned int size)
2187 unsigned int no_basic_stat_requested = 1;
2188 unsigned int no_ext_stat_requested = 1;
2189 unsigned int num_xstats_filled;
2190 unsigned int basic_count;
2191 uint16_t expected_entries;
2192 struct rte_eth_dev *dev;
2196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2197 ret = get_xstats_count(port_id);
2200 expected_entries = (uint16_t)ret;
2201 struct rte_eth_xstat xstats[expected_entries];
2202 dev = &rte_eth_devices[port_id];
2203 basic_count = get_xstats_basic_count(dev);
2205 /* Return max number of stats if no ids given */
2208 return expected_entries;
2209 else if (values && size < expected_entries)
2210 return expected_entries;
2216 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2217 unsigned int basic_count = get_xstats_basic_count(dev);
2218 uint64_t ids_copy[size];
2220 for (i = 0; i < size; i++) {
2221 if (ids[i] < basic_count) {
2222 no_basic_stat_requested = 0;
2227 * Convert ids to xstats ids that PMD knows.
2228 * ids known by user are basic + extended stats.
2230 ids_copy[i] = ids[i] - basic_count;
2233 if (no_basic_stat_requested)
2234 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2239 for (i = 0; i < size; i++) {
2240 if (ids[i] >= basic_count) {
2241 no_ext_stat_requested = 0;
2247 /* Fill the xstats structure */
2248 if (ids && no_ext_stat_requested)
2249 ret = rte_eth_basic_stats_get(port_id, xstats);
2251 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2255 num_xstats_filled = (unsigned int)ret;
2257 /* Return all stats */
2259 for (i = 0; i < num_xstats_filled; i++)
2260 values[i] = xstats[i].value;
2261 return expected_entries;
2265 for (i = 0; i < size; i++) {
2266 if (ids[i] >= expected_entries) {
2267 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2270 values[i] = xstats[ids[i]].value;
2276 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2279 struct rte_eth_dev *dev;
2280 unsigned int count = 0, i;
2281 signed int xcount = 0;
2282 uint16_t nb_rxqs, nb_txqs;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2287 dev = &rte_eth_devices[port_id];
2289 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2290 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2292 /* Return generic statistics */
2293 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2294 (nb_txqs * RTE_NB_TXQ_STATS);
2296 /* implemented by the driver */
2297 if (dev->dev_ops->xstats_get != NULL) {
2298 /* Retrieve the xstats from the driver at the end of the
2301 xcount = (*dev->dev_ops->xstats_get)(dev,
2302 xstats ? xstats + count : NULL,
2303 (n > count) ? n - count : 0);
2306 return eth_err(port_id, xcount);
2309 if (n < count + xcount || xstats == NULL)
2310 return count + xcount;
2312 /* now fill the xstats structure */
2313 ret = rte_eth_basic_stats_get(port_id, xstats);
2318 for (i = 0; i < count; i++)
2320 /* add an offset to driver-specific stats */
2321 for ( ; i < count + xcount; i++)
2322 xstats[i].id += count;
2324 return count + xcount;
2327 /* reset ethdev extended statistics */
2329 rte_eth_xstats_reset(uint16_t port_id)
2331 struct rte_eth_dev *dev;
2333 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2334 dev = &rte_eth_devices[port_id];
2336 /* implemented by the driver */
2337 if (dev->dev_ops->xstats_reset != NULL) {
2338 (*dev->dev_ops->xstats_reset)(dev);
2342 /* fallback to default */
2343 rte_eth_stats_reset(port_id);
2347 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2350 struct rte_eth_dev *dev;
2352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2354 dev = &rte_eth_devices[port_id];
2356 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2358 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2361 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2364 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2367 return (*dev->dev_ops->queue_stats_mapping_set)
2368 (dev, queue_id, stat_idx, is_rx);
2373 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2376 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2377 stat_idx, STAT_QMAP_TX));
2382 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2385 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2386 stat_idx, STAT_QMAP_RX));
2390 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2392 struct rte_eth_dev *dev;
2394 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2395 dev = &rte_eth_devices[port_id];
2397 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2398 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2399 fw_version, fw_size));
2403 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2405 struct rte_eth_dev *dev;
2406 const struct rte_eth_desc_lim lim = {
2407 .nb_max = UINT16_MAX,
2412 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2413 dev = &rte_eth_devices[port_id];
2415 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2416 dev_info->rx_desc_lim = lim;
2417 dev_info->tx_desc_lim = lim;
2418 dev_info->device = dev->device;
2420 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2421 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2422 dev_info->driver_name = dev->device->driver->name;
2423 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2424 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2426 dev_info->dev_flags = &dev->data->dev_flags;
2430 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2431 uint32_t *ptypes, int num)
2434 struct rte_eth_dev *dev;
2435 const uint32_t *all_ptypes;
2437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2438 dev = &rte_eth_devices[port_id];
2439 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2440 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2445 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2446 if (all_ptypes[i] & ptype_mask) {
2448 ptypes[j] = all_ptypes[i];
2456 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2458 struct rte_eth_dev *dev;
2460 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2461 dev = &rte_eth_devices[port_id];
2462 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2467 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2469 struct rte_eth_dev *dev;
2471 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2473 dev = &rte_eth_devices[port_id];
2474 *mtu = dev->data->mtu;
2479 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2482 struct rte_eth_dev *dev;
2484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2485 dev = &rte_eth_devices[port_id];
2486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2488 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2490 dev->data->mtu = mtu;
2492 return eth_err(port_id, ret);
2496 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2498 struct rte_eth_dev *dev;
2501 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2502 dev = &rte_eth_devices[port_id];
2503 if (!(dev->data->dev_conf.rxmode.offloads &
2504 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2505 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2510 if (vlan_id > 4095) {
2511 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2517 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2519 struct rte_vlan_filter_conf *vfc;
2523 vfc = &dev->data->vlan_filter_conf;
2524 vidx = vlan_id / 64;
2525 vbit = vlan_id % 64;
2528 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2530 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2533 return eth_err(port_id, ret);
2537 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2540 struct rte_eth_dev *dev;
2542 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2543 dev = &rte_eth_devices[port_id];
2544 if (rx_queue_id >= dev->data->nb_rx_queues) {
2545 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2549 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2550 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2556 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2557 enum rte_vlan_type vlan_type,
2560 struct rte_eth_dev *dev;
2562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2563 dev = &rte_eth_devices[port_id];
2564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2566 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2571 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2573 struct rte_eth_dev *dev;
2577 uint64_t orig_offloads;
2579 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2580 dev = &rte_eth_devices[port_id];
2582 /* save original values in case of failure */
2583 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2585 /*check which option changed by application*/
2586 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2587 org = !!(dev->data->dev_conf.rxmode.offloads &
2588 DEV_RX_OFFLOAD_VLAN_STRIP);
2591 dev->data->dev_conf.rxmode.offloads |=
2592 DEV_RX_OFFLOAD_VLAN_STRIP;
2594 dev->data->dev_conf.rxmode.offloads &=
2595 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2596 mask |= ETH_VLAN_STRIP_MASK;
2599 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2600 org = !!(dev->data->dev_conf.rxmode.offloads &
2601 DEV_RX_OFFLOAD_VLAN_FILTER);
2604 dev->data->dev_conf.rxmode.offloads |=
2605 DEV_RX_OFFLOAD_VLAN_FILTER;
2607 dev->data->dev_conf.rxmode.offloads &=
2608 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2609 mask |= ETH_VLAN_FILTER_MASK;
2612 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2613 org = !!(dev->data->dev_conf.rxmode.offloads &
2614 DEV_RX_OFFLOAD_VLAN_EXTEND);
2617 dev->data->dev_conf.rxmode.offloads |=
2618 DEV_RX_OFFLOAD_VLAN_EXTEND;
2620 dev->data->dev_conf.rxmode.offloads &=
2621 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2622 mask |= ETH_VLAN_EXTEND_MASK;
2629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2630 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2632 /* hit an error restore original values */
2633 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2636 return eth_err(port_id, ret);
2640 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2642 struct rte_eth_dev *dev;
2645 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2646 dev = &rte_eth_devices[port_id];
2648 if (dev->data->dev_conf.rxmode.offloads &
2649 DEV_RX_OFFLOAD_VLAN_STRIP)
2650 ret |= ETH_VLAN_STRIP_OFFLOAD;
2652 if (dev->data->dev_conf.rxmode.offloads &
2653 DEV_RX_OFFLOAD_VLAN_FILTER)
2654 ret |= ETH_VLAN_FILTER_OFFLOAD;
2656 if (dev->data->dev_conf.rxmode.offloads &
2657 DEV_RX_OFFLOAD_VLAN_EXTEND)
2658 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2664 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2666 struct rte_eth_dev *dev;
2668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2669 dev = &rte_eth_devices[port_id];
2670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2672 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2676 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2678 struct rte_eth_dev *dev;
2680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2681 dev = &rte_eth_devices[port_id];
2682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2683 memset(fc_conf, 0, sizeof(*fc_conf));
2684 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2688 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2690 struct rte_eth_dev *dev;
2692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2694 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2698 dev = &rte_eth_devices[port_id];
2699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2700 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2704 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2705 struct rte_eth_pfc_conf *pfc_conf)
2707 struct rte_eth_dev *dev;
2709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2710 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2711 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2715 dev = &rte_eth_devices[port_id];
2716 /* High water, low water validation are device specific */
2717 if (*dev->dev_ops->priority_flow_ctrl_set)
2718 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2724 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2732 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2733 for (i = 0; i < num; i++) {
2734 if (reta_conf[i].mask)
2742 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2746 uint16_t i, idx, shift;
2752 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2756 for (i = 0; i < reta_size; i++) {
2757 idx = i / RTE_RETA_GROUP_SIZE;
2758 shift = i % RTE_RETA_GROUP_SIZE;
2759 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2760 (reta_conf[idx].reta[shift] >= max_rxq)) {
2762 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2764 reta_conf[idx].reta[shift], max_rxq);
2773 rte_eth_dev_rss_reta_update(uint16_t port_id,
2774 struct rte_eth_rss_reta_entry64 *reta_conf,
2777 struct rte_eth_dev *dev;
2780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2781 /* Check mask bits */
2782 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2786 dev = &rte_eth_devices[port_id];
2788 /* Check entry value */
2789 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2790 dev->data->nb_rx_queues);
2794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2795 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2800 rte_eth_dev_rss_reta_query(uint16_t port_id,
2801 struct rte_eth_rss_reta_entry64 *reta_conf,
2804 struct rte_eth_dev *dev;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 /* Check mask bits */
2810 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2814 dev = &rte_eth_devices[port_id];
2815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2816 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2821 rte_eth_dev_rss_hash_update(uint16_t port_id,
2822 struct rte_eth_rss_conf *rss_conf)
2824 struct rte_eth_dev *dev;
2825 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2828 dev = &rte_eth_devices[port_id];
2829 rte_eth_dev_info_get(port_id, &dev_info);
2830 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2831 dev_info.flow_type_rss_offloads) {
2833 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2834 port_id, rss_conf->rss_hf,
2835 dev_info.flow_type_rss_offloads);
2838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2839 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2844 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2845 struct rte_eth_rss_conf *rss_conf)
2847 struct rte_eth_dev *dev;
2849 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2850 dev = &rte_eth_devices[port_id];
2851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2852 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2857 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2858 struct rte_eth_udp_tunnel *udp_tunnel)
2860 struct rte_eth_dev *dev;
2862 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2863 if (udp_tunnel == NULL) {
2864 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2868 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2869 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2873 dev = &rte_eth_devices[port_id];
2874 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2875 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2880 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2881 struct rte_eth_udp_tunnel *udp_tunnel)
2883 struct rte_eth_dev *dev;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2886 dev = &rte_eth_devices[port_id];
2888 if (udp_tunnel == NULL) {
2889 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2893 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2894 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2898 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2899 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2904 rte_eth_led_on(uint16_t port_id)
2906 struct rte_eth_dev *dev;
2908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2909 dev = &rte_eth_devices[port_id];
2910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2911 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2915 rte_eth_led_off(uint16_t port_id)
2917 struct rte_eth_dev *dev;
2919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2920 dev = &rte_eth_devices[port_id];
2921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2922 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2926 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2930 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2932 struct rte_eth_dev_info dev_info;
2933 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2937 rte_eth_dev_info_get(port_id, &dev_info);
2939 for (i = 0; i < dev_info.max_mac_addrs; i++)
2940 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2946 static const struct ether_addr null_mac_addr;
2949 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2952 struct rte_eth_dev *dev;
2957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2958 dev = &rte_eth_devices[port_id];
2959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2961 if (is_zero_ether_addr(addr)) {
2962 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2966 if (pool >= ETH_64_POOLS) {
2967 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2971 index = get_mac_addr_index(port_id, addr);
2973 index = get_mac_addr_index(port_id, &null_mac_addr);
2975 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2980 pool_mask = dev->data->mac_pool_sel[index];
2982 /* Check if both MAC address and pool is already there, and do nothing */
2983 if (pool_mask & (1ULL << pool))
2988 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2991 /* Update address in NIC data structure */
2992 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2994 /* Update pool bitmap in NIC data structure */
2995 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2998 return eth_err(port_id, ret);
3002 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3004 struct rte_eth_dev *dev;
3007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3008 dev = &rte_eth_devices[port_id];
3009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3011 index = get_mac_addr_index(port_id, addr);
3014 "Port %u: Cannot remove default MAC address\n",
3017 } else if (index < 0)
3018 return 0; /* Do nothing if address wasn't found */
3021 (*dev->dev_ops->mac_addr_remove)(dev, index);
3023 /* Update address in NIC data structure */
3024 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3026 /* reset pool bitmap */
3027 dev->data->mac_pool_sel[index] = 0;
3033 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3035 struct rte_eth_dev *dev;
3038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3040 if (!is_valid_assigned_ether_addr(addr))
3043 dev = &rte_eth_devices[port_id];
3044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3046 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3050 /* Update default address in NIC data structure */
3051 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3058 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3062 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3064 struct rte_eth_dev_info dev_info;
3065 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3068 rte_eth_dev_info_get(port_id, &dev_info);
3069 if (!dev->data->hash_mac_addrs)
3072 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3073 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3074 ETHER_ADDR_LEN) == 0)
3081 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3086 struct rte_eth_dev *dev;
3088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3090 dev = &rte_eth_devices[port_id];
3091 if (is_zero_ether_addr(addr)) {
3092 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3097 index = get_hash_mac_addr_index(port_id, addr);
3098 /* Check if it's already there, and do nothing */
3099 if ((index >= 0) && on)
3105 "Port %u: the MAC address was not set in UTA\n",
3110 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3112 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3119 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3121 /* Update address in NIC data structure */
3123 ether_addr_copy(addr,
3124 &dev->data->hash_mac_addrs[index]);
3126 ether_addr_copy(&null_mac_addr,
3127 &dev->data->hash_mac_addrs[index]);
3130 return eth_err(port_id, ret);
3134 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3136 struct rte_eth_dev *dev;
3138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3140 dev = &rte_eth_devices[port_id];
3142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3143 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3147 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3150 struct rte_eth_dev *dev;
3151 struct rte_eth_dev_info dev_info;
3152 struct rte_eth_link link;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3157 rte_eth_dev_info_get(port_id, &dev_info);
3158 link = dev->data->dev_link;
3160 if (queue_idx > dev_info.max_tx_queues) {
3162 "Set queue rate limit:port %u: invalid queue id=%u\n",
3163 port_id, queue_idx);
3167 if (tx_rate > link.link_speed) {
3169 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3170 tx_rate, link.link_speed);
3174 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3175 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3176 queue_idx, tx_rate));
3180 rte_eth_mirror_rule_set(uint16_t port_id,
3181 struct rte_eth_mirror_conf *mirror_conf,
3182 uint8_t rule_id, uint8_t on)
3184 struct rte_eth_dev *dev;
3186 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3187 if (mirror_conf->rule_type == 0) {
3188 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3192 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3193 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3198 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3199 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3200 (mirror_conf->pool_mask == 0)) {
3202 "Invalid mirror pool, pool mask can not be 0\n");
3206 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3207 mirror_conf->vlan.vlan_mask == 0) {
3209 "Invalid vlan mask, vlan mask can not be 0\n");
3213 dev = &rte_eth_devices[port_id];
3214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3216 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3217 mirror_conf, rule_id, on));
3221 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3223 struct rte_eth_dev *dev;
3225 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3227 dev = &rte_eth_devices[port_id];
3228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3230 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3234 RTE_INIT(eth_dev_init_cb_lists)
3238 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3239 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3243 rte_eth_dev_callback_register(uint16_t port_id,
3244 enum rte_eth_event_type event,
3245 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3247 struct rte_eth_dev *dev;
3248 struct rte_eth_dev_callback *user_cb;
3249 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3255 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3256 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3260 if (port_id == RTE_ETH_ALL) {
3262 last_port = RTE_MAX_ETHPORTS - 1;
3264 next_port = last_port = port_id;
3267 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3270 dev = &rte_eth_devices[next_port];
3272 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3273 if (user_cb->cb_fn == cb_fn &&
3274 user_cb->cb_arg == cb_arg &&
3275 user_cb->event == event) {
3280 /* create a new callback. */
3281 if (user_cb == NULL) {
3282 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3283 sizeof(struct rte_eth_dev_callback), 0);
3284 if (user_cb != NULL) {
3285 user_cb->cb_fn = cb_fn;
3286 user_cb->cb_arg = cb_arg;
3287 user_cb->event = event;
3288 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3291 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3292 rte_eth_dev_callback_unregister(port_id, event,
3298 } while (++next_port <= last_port);
3300 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3305 rte_eth_dev_callback_unregister(uint16_t port_id,
3306 enum rte_eth_event_type event,
3307 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3310 struct rte_eth_dev *dev;
3311 struct rte_eth_dev_callback *cb, *next;
3312 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3318 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3319 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3323 if (port_id == RTE_ETH_ALL) {
3325 last_port = RTE_MAX_ETHPORTS - 1;
3327 next_port = last_port = port_id;
3330 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3333 dev = &rte_eth_devices[next_port];
3335 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3338 next = TAILQ_NEXT(cb, next);
3340 if (cb->cb_fn != cb_fn || cb->event != event ||
3341 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3345 * if this callback is not executing right now,
3348 if (cb->active == 0) {
3349 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3355 } while (++next_port <= last_port);
3357 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3362 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3363 enum rte_eth_event_type event, void *ret_param)
3365 struct rte_eth_dev_callback *cb_lst;
3366 struct rte_eth_dev_callback dev_cb;
3369 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3370 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3371 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3375 if (ret_param != NULL)
3376 dev_cb.ret_param = ret_param;
3378 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3379 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3380 dev_cb.cb_arg, dev_cb.ret_param);
3381 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3384 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3389 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3394 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3396 dev->state = RTE_ETH_DEV_ATTACHED;
3400 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3403 struct rte_eth_dev *dev;
3404 struct rte_intr_handle *intr_handle;
3408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3410 dev = &rte_eth_devices[port_id];
3412 if (!dev->intr_handle) {
3413 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3417 intr_handle = dev->intr_handle;
3418 if (!intr_handle->intr_vec) {
3419 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3423 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3424 vec = intr_handle->intr_vec[qid];
3425 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3426 if (rc && rc != -EEXIST) {
3428 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3429 port_id, qid, op, epfd, vec);
3436 const struct rte_memzone *
3437 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3438 uint16_t queue_id, size_t size, unsigned align,
3441 char z_name[RTE_MEMZONE_NAMESIZE];
3442 const struct rte_memzone *mz;
3444 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3445 dev->device->driver->name, ring_name,
3446 dev->data->port_id, queue_id);
3448 mz = rte_memzone_lookup(z_name);
3452 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3453 RTE_MEMZONE_IOVA_CONTIG, align);
3456 int __rte_experimental
3457 rte_eth_dev_create(struct rte_device *device, const char *name,
3458 size_t priv_data_size,
3459 ethdev_bus_specific_init ethdev_bus_specific_init,
3460 void *bus_init_params,
3461 ethdev_init_t ethdev_init, void *init_params)
3463 struct rte_eth_dev *ethdev;
3466 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3468 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3469 ethdev = rte_eth_dev_allocate(name);
3473 if (priv_data_size) {
3474 ethdev->data->dev_private = rte_zmalloc_socket(
3475 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3478 if (!ethdev->data->dev_private) {
3479 RTE_LOG(ERR, EAL, "failed to allocate private data");
3481 goto data_alloc_failed;
3485 ethdev = rte_eth_dev_attach_secondary(name);
3487 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3488 "ethdev doesn't exist");
3493 ethdev->device = device;
3495 if (ethdev_bus_specific_init) {
3496 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3499 "ethdev bus specific initialisation failed");
3504 retval = ethdev_init(ethdev, init_params);
3506 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3510 rte_eth_dev_probing_finish(ethdev);
3514 /* free ports private data if primary process */
3515 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3516 rte_free(ethdev->data->dev_private);
3519 rte_eth_dev_release_port(ethdev);
3524 int __rte_experimental
3525 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3526 ethdev_uninit_t ethdev_uninit)
3530 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3534 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3535 if (ethdev_uninit) {
3536 ret = ethdev_uninit(ethdev);
3541 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3542 rte_free(ethdev->data->dev_private);
3544 ethdev->data->dev_private = NULL;
3546 return rte_eth_dev_release_port(ethdev);
3550 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3551 int epfd, int op, void *data)
3554 struct rte_eth_dev *dev;
3555 struct rte_intr_handle *intr_handle;
3558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3560 dev = &rte_eth_devices[port_id];
3561 if (queue_id >= dev->data->nb_rx_queues) {
3562 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3566 if (!dev->intr_handle) {
3567 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3571 intr_handle = dev->intr_handle;
3572 if (!intr_handle->intr_vec) {
3573 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3577 vec = intr_handle->intr_vec[queue_id];
3578 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3579 if (rc && rc != -EEXIST) {
3581 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3582 port_id, queue_id, op, epfd, vec);
3590 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3593 struct rte_eth_dev *dev;
3595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3597 dev = &rte_eth_devices[port_id];
3599 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3600 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3605 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3608 struct rte_eth_dev *dev;
3610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 dev = &rte_eth_devices[port_id];
3614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3615 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3621 rte_eth_dev_filter_supported(uint16_t port_id,
3622 enum rte_filter_type filter_type)
3624 struct rte_eth_dev *dev;
3626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3628 dev = &rte_eth_devices[port_id];
3629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3630 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3631 RTE_ETH_FILTER_NOP, NULL);
3635 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3636 enum rte_filter_op filter_op, void *arg)
3638 struct rte_eth_dev *dev;
3640 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3642 dev = &rte_eth_devices[port_id];
3643 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3644 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3648 const struct rte_eth_rxtx_callback *
3649 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3650 rte_rx_callback_fn fn, void *user_param)
3652 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3653 rte_errno = ENOTSUP;
3656 /* check input parameters */
3657 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3658 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3662 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3670 cb->param = user_param;
3672 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3673 /* Add the callbacks in fifo order. */
3674 struct rte_eth_rxtx_callback *tail =
3675 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3678 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3685 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3690 const struct rte_eth_rxtx_callback *
3691 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3692 rte_rx_callback_fn fn, void *user_param)
3694 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3695 rte_errno = ENOTSUP;
3698 /* check input parameters */
3699 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3700 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3705 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3713 cb->param = user_param;
3715 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3716 /* Add the callbacks at fisrt position*/
3717 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3719 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3720 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3725 const struct rte_eth_rxtx_callback *
3726 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3727 rte_tx_callback_fn fn, void *user_param)
3729 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3730 rte_errno = ENOTSUP;
3733 /* check input parameters */
3734 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3735 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3740 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3748 cb->param = user_param;
3750 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3751 /* Add the callbacks in fifo order. */
3752 struct rte_eth_rxtx_callback *tail =
3753 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3756 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3763 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3769 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3770 const struct rte_eth_rxtx_callback *user_cb)
3772 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3775 /* Check input parameters. */
3776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3777 if (user_cb == NULL ||
3778 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3781 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3782 struct rte_eth_rxtx_callback *cb;
3783 struct rte_eth_rxtx_callback **prev_cb;
3786 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3787 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3788 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3790 if (cb == user_cb) {
3791 /* Remove the user cb from the callback list. */
3792 *prev_cb = cb->next;
3797 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3803 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3804 const struct rte_eth_rxtx_callback *user_cb)
3806 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3809 /* Check input parameters. */
3810 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3811 if (user_cb == NULL ||
3812 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3815 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3817 struct rte_eth_rxtx_callback *cb;
3818 struct rte_eth_rxtx_callback **prev_cb;
3820 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3821 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3822 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3824 if (cb == user_cb) {
3825 /* Remove the user cb from the callback list. */
3826 *prev_cb = cb->next;
3831 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3837 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3838 struct rte_eth_rxq_info *qinfo)
3840 struct rte_eth_dev *dev;
3842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3847 dev = &rte_eth_devices[port_id];
3848 if (queue_id >= dev->data->nb_rx_queues) {
3849 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3855 memset(qinfo, 0, sizeof(*qinfo));
3856 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3861 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3862 struct rte_eth_txq_info *qinfo)
3864 struct rte_eth_dev *dev;
3866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3871 dev = &rte_eth_devices[port_id];
3872 if (queue_id >= dev->data->nb_tx_queues) {
3873 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3879 memset(qinfo, 0, sizeof(*qinfo));
3880 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3886 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3887 struct ether_addr *mc_addr_set,
3888 uint32_t nb_mc_addr)
3890 struct rte_eth_dev *dev;
3892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3894 dev = &rte_eth_devices[port_id];
3895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3896 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3897 mc_addr_set, nb_mc_addr));
3901 rte_eth_timesync_enable(uint16_t port_id)
3903 struct rte_eth_dev *dev;
3905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3906 dev = &rte_eth_devices[port_id];
3908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3909 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3913 rte_eth_timesync_disable(uint16_t port_id)
3915 struct rte_eth_dev *dev;
3917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3918 dev = &rte_eth_devices[port_id];
3920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3921 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3925 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3928 struct rte_eth_dev *dev;
3930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3931 dev = &rte_eth_devices[port_id];
3933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3934 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3935 (dev, timestamp, flags));
3939 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3940 struct timespec *timestamp)
3942 struct rte_eth_dev *dev;
3944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3945 dev = &rte_eth_devices[port_id];
3947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3948 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3953 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3955 struct rte_eth_dev *dev;
3957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3958 dev = &rte_eth_devices[port_id];
3960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3961 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3966 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3968 struct rte_eth_dev *dev;
3970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3971 dev = &rte_eth_devices[port_id];
3973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3974 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3979 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3981 struct rte_eth_dev *dev;
3983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3984 dev = &rte_eth_devices[port_id];
3986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3987 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3992 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3994 struct rte_eth_dev *dev;
3996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3998 dev = &rte_eth_devices[port_id];
3999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4000 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4004 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4006 struct rte_eth_dev *dev;
4008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4010 dev = &rte_eth_devices[port_id];
4011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4012 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4016 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4018 struct rte_eth_dev *dev;
4020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4022 dev = &rte_eth_devices[port_id];
4023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4024 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4028 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4030 struct rte_eth_dev *dev;
4032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4034 dev = &rte_eth_devices[port_id];
4035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4036 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4039 int __rte_experimental
4040 rte_eth_dev_get_module_info(uint16_t port_id,
4041 struct rte_eth_dev_module_info *modinfo)
4043 struct rte_eth_dev *dev;
4045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4047 dev = &rte_eth_devices[port_id];
4048 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4049 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4052 int __rte_experimental
4053 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4054 struct rte_dev_eeprom_info *info)
4056 struct rte_eth_dev *dev;
4058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4060 dev = &rte_eth_devices[port_id];
4061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4062 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4066 rte_eth_dev_get_dcb_info(uint16_t port_id,
4067 struct rte_eth_dcb_info *dcb_info)
4069 struct rte_eth_dev *dev;
4071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4073 dev = &rte_eth_devices[port_id];
4074 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4076 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4077 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4081 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4082 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4084 struct rte_eth_dev *dev;
4086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4087 if (l2_tunnel == NULL) {
4088 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4092 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4093 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4097 dev = &rte_eth_devices[port_id];
4098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4100 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4105 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4106 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4110 struct rte_eth_dev *dev;
4112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4114 if (l2_tunnel == NULL) {
4115 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4119 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4120 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4125 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4129 dev = &rte_eth_devices[port_id];
4130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4132 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4133 l2_tunnel, mask, en));
4137 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4138 const struct rte_eth_desc_lim *desc_lim)
4140 if (desc_lim->nb_align != 0)
4141 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4143 if (desc_lim->nb_max != 0)
4144 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4146 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4150 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4151 uint16_t *nb_rx_desc,
4152 uint16_t *nb_tx_desc)
4154 struct rte_eth_dev *dev;
4155 struct rte_eth_dev_info dev_info;
4157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4159 dev = &rte_eth_devices[port_id];
4160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4162 rte_eth_dev_info_get(port_id, &dev_info);
4164 if (nb_rx_desc != NULL)
4165 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4167 if (nb_tx_desc != NULL)
4168 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4174 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4176 struct rte_eth_dev *dev;
4178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4183 dev = &rte_eth_devices[port_id];
4185 if (*dev->dev_ops->pool_ops_supported == NULL)
4186 return 1; /* all pools are supported */
4188 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4192 * A set of values to describe the possible states of a switch domain.
4194 enum rte_eth_switch_domain_state {
4195 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4196 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4200 * Array of switch domains available for allocation. Array is sized to
4201 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4202 * ethdev ports in a single process.
4204 struct rte_eth_dev_switch {
4205 enum rte_eth_switch_domain_state state;
4206 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4208 int __rte_experimental
4209 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4213 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4215 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4216 i < RTE_MAX_ETHPORTS; i++) {
4217 if (rte_eth_switch_domains[i].state ==
4218 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4219 rte_eth_switch_domains[i].state =
4220 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4229 int __rte_experimental
4230 rte_eth_switch_domain_free(uint16_t domain_id)
4232 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4233 domain_id >= RTE_MAX_ETHPORTS)
4236 if (rte_eth_switch_domains[domain_id].state !=
4237 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4240 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4245 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4248 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4251 struct rte_kvargs_pair *pair;
4254 arglist->str = strdup(str_in);
4255 if (arglist->str == NULL)
4258 letter = arglist->str;
4261 pair = &arglist->pairs[0];
4264 case 0: /* Initial */
4267 else if (*letter == '\0')
4274 case 1: /* Parsing key */
4275 if (*letter == '=') {
4277 pair->value = letter + 1;
4279 } else if (*letter == ',' || *letter == '\0')
4284 case 2: /* Parsing value */
4287 else if (*letter == ',') {
4290 pair = &arglist->pairs[arglist->count];
4292 } else if (*letter == '\0') {
4295 pair = &arglist->pairs[arglist->count];
4300 case 3: /* Parsing list */
4303 else if (*letter == '\0')
4312 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4320 /* Single element, not a list */
4321 return callback(str, data);
4323 /* Sanity check, then strip the brackets */
4324 str_start = &str[strlen(str) - 1];
4325 if (*str_start != ']') {
4326 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4332 /* Process list elements */
4342 } else if (state == 1) {
4343 if (*str == ',' || *str == '\0') {
4344 if (str > str_start) {
4345 /* Non-empty string fragment */
4347 result = callback(str_start, data);
4360 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4361 const uint16_t max_list)
4363 uint16_t lo, hi, val;
4366 result = sscanf(str, "%hu-%hu", &lo, &hi);
4368 if (*len_list >= max_list)
4370 list[(*len_list)++] = lo;
4371 } else if (result == 2) {
4372 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4374 for (val = lo; val <= hi; val++) {
4375 if (*len_list >= max_list)
4377 list[(*len_list)++] = val;
4386 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4388 struct rte_eth_devargs *eth_da = data;
4390 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4391 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4394 int __rte_experimental
4395 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4397 struct rte_kvargs args;
4398 struct rte_kvargs_pair *pair;
4402 memset(eth_da, 0, sizeof(*eth_da));
4404 result = rte_eth_devargs_tokenise(&args, dargs);
4408 for (i = 0; i < args.count; i++) {
4409 pair = &args.pairs[i];
4410 if (strcmp("representor", pair->key) == 0) {
4411 result = rte_eth_devargs_parse_list(pair->value,
4412 rte_eth_devargs_parse_representor_ports,
4426 RTE_INIT(ethdev_init_log)
4428 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4429 if (rte_eth_dev_logtype >= 0)
4430 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);