1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
503 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
506 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
512 * Attach to a port already registered by the primary process, which
513 * makes sure that the same device would have the same port id both
514 * in the primary and secondary process.
517 rte_eth_dev_attach_secondary(const char *name)
520 struct rte_eth_dev *eth_dev = NULL;
522 rte_eth_dev_shared_data_prepare();
524 /* Synchronize port attachment to primary port creation and release. */
525 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
527 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
531 if (i == RTE_MAX_ETHPORTS) {
533 "Device %s is not driven by the primary process\n",
536 eth_dev = eth_dev_get(i);
537 RTE_ASSERT(eth_dev->data->port_id == i);
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
550 rte_eth_dev_shared_data_prepare();
552 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553 rte_eth_dev_callback_process(eth_dev,
554 RTE_ETH_EVENT_DESTROY, NULL);
556 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
558 eth_dev->state = RTE_ETH_DEV_UNUSED;
559 eth_dev->device = NULL;
560 eth_dev->intr_handle = NULL;
562 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
563 rte_free(eth_dev->data->rx_queues);
564 rte_free(eth_dev->data->tx_queues);
565 rte_free(eth_dev->data->mac_addrs);
566 rte_free(eth_dev->data->hash_mac_addrs);
567 rte_free(eth_dev->data->dev_private);
568 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
569 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
572 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
578 rte_eth_dev_is_valid_port(uint16_t port_id)
580 if (port_id >= RTE_MAX_ETHPORTS ||
581 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
588 rte_eth_is_valid_owner_id(uint64_t owner_id)
590 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
591 rte_eth_dev_shared_data->next_owner_id <= owner_id)
597 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
599 port_id = rte_eth_find_next(port_id);
600 while (port_id < RTE_MAX_ETHPORTS &&
601 rte_eth_devices[port_id].data->owner.id != owner_id)
602 port_id = rte_eth_find_next(port_id + 1);
608 rte_eth_dev_owner_new(uint64_t *owner_id)
610 rte_eth_dev_shared_data_prepare();
612 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
614 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
616 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
621 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
622 const struct rte_eth_dev_owner *new_owner)
624 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
625 struct rte_eth_dev_owner *port_owner;
627 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
628 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
633 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
634 !rte_eth_is_valid_owner_id(old_owner_id)) {
636 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
637 old_owner_id, new_owner->id);
641 port_owner = &rte_eth_devices[port_id].data->owner;
642 if (port_owner->id != old_owner_id) {
644 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
645 port_id, port_owner->name, port_owner->id);
649 /* can not truncate (same structure) */
650 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
652 port_owner->id = new_owner->id;
654 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
655 port_id, new_owner->name, new_owner->id);
661 rte_eth_dev_owner_set(const uint16_t port_id,
662 const struct rte_eth_dev_owner *owner)
666 rte_eth_dev_shared_data_prepare();
668 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
670 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
672 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
677 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
679 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
680 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
683 rte_eth_dev_shared_data_prepare();
685 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
687 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
689 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
694 rte_eth_dev_owner_delete(const uint64_t owner_id)
699 rte_eth_dev_shared_data_prepare();
701 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
703 if (rte_eth_is_valid_owner_id(owner_id)) {
704 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
705 if (rte_eth_devices[port_id].data->owner.id == owner_id)
706 memset(&rte_eth_devices[port_id].data->owner, 0,
707 sizeof(struct rte_eth_dev_owner));
708 RTE_ETHDEV_LOG(NOTICE,
709 "All port owners owned by %016"PRIx64" identifier have removed\n",
713 "Invalid owner id=%016"PRIx64"\n",
718 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
724 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
727 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
729 rte_eth_dev_shared_data_prepare();
731 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
733 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
734 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
738 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
741 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
746 rte_eth_dev_socket_id(uint16_t port_id)
748 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
749 return rte_eth_devices[port_id].data->numa_node;
753 rte_eth_dev_get_sec_ctx(uint16_t port_id)
755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
756 return rte_eth_devices[port_id].security_ctx;
760 rte_eth_dev_count_avail(void)
767 RTE_ETH_FOREACH_DEV(p)
774 rte_eth_dev_count_total(void)
776 uint16_t port, count = 0;
778 RTE_ETH_FOREACH_VALID_DEV(port)
785 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
792 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
796 /* shouldn't check 'rte_eth_devices[i].data',
797 * because it might be overwritten by VDEV PMD */
798 tmp = rte_eth_dev_shared_data->data[port_id].name;
804 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
809 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
813 RTE_ETH_FOREACH_VALID_DEV(pid)
814 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
823 eth_err(uint16_t port_id, int ret)
827 if (rte_eth_dev_is_removed(port_id))
833 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
835 uint16_t old_nb_queues = dev->data->nb_rx_queues;
839 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
840 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
841 sizeof(dev->data->rx_queues[0]) * nb_queues,
842 RTE_CACHE_LINE_SIZE);
843 if (dev->data->rx_queues == NULL) {
844 dev->data->nb_rx_queues = 0;
847 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
850 rxq = dev->data->rx_queues;
852 for (i = nb_queues; i < old_nb_queues; i++)
853 (*dev->dev_ops->rx_queue_release)(rxq[i]);
854 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
855 RTE_CACHE_LINE_SIZE);
858 if (nb_queues > old_nb_queues) {
859 uint16_t new_qs = nb_queues - old_nb_queues;
861 memset(rxq + old_nb_queues, 0,
862 sizeof(rxq[0]) * new_qs);
865 dev->data->rx_queues = rxq;
867 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
870 rxq = dev->data->rx_queues;
872 for (i = nb_queues; i < old_nb_queues; i++)
873 (*dev->dev_ops->rx_queue_release)(rxq[i]);
875 rte_free(dev->data->rx_queues);
876 dev->data->rx_queues = NULL;
878 dev->data->nb_rx_queues = nb_queues;
883 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
885 struct rte_eth_dev *dev;
887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
889 dev = &rte_eth_devices[port_id];
890 if (!dev->data->dev_started) {
892 "Port %u must be started before start any queue\n",
897 if (rx_queue_id >= dev->data->nb_rx_queues) {
898 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
904 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
906 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
907 rx_queue_id, port_id);
911 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
913 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
914 rx_queue_id, port_id);
918 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
924 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
926 struct rte_eth_dev *dev;
928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
930 dev = &rte_eth_devices[port_id];
931 if (rx_queue_id >= dev->data->nb_rx_queues) {
932 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
938 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
940 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
941 rx_queue_id, port_id);
945 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
947 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
948 rx_queue_id, port_id);
952 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
957 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
959 struct rte_eth_dev *dev;
961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
963 dev = &rte_eth_devices[port_id];
964 if (!dev->data->dev_started) {
966 "Port %u must be started before start any queue\n",
971 if (tx_queue_id >= dev->data->nb_tx_queues) {
972 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
976 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
978 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
980 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
981 tx_queue_id, port_id);
985 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
987 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
988 tx_queue_id, port_id);
992 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
996 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
998 struct rte_eth_dev *dev;
1000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1002 dev = &rte_eth_devices[port_id];
1003 if (tx_queue_id >= dev->data->nb_tx_queues) {
1004 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1008 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1010 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1011 RTE_ETHDEV_LOG(INFO,
1012 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1013 tx_queue_id, port_id);
1017 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1018 RTE_ETHDEV_LOG(INFO,
1019 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1020 tx_queue_id, port_id);
1024 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1029 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1031 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1035 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1036 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1037 sizeof(dev->data->tx_queues[0]) * nb_queues,
1038 RTE_CACHE_LINE_SIZE);
1039 if (dev->data->tx_queues == NULL) {
1040 dev->data->nb_tx_queues = 0;
1043 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1046 txq = dev->data->tx_queues;
1048 for (i = nb_queues; i < old_nb_queues; i++)
1049 (*dev->dev_ops->tx_queue_release)(txq[i]);
1050 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1051 RTE_CACHE_LINE_SIZE);
1054 if (nb_queues > old_nb_queues) {
1055 uint16_t new_qs = nb_queues - old_nb_queues;
1057 memset(txq + old_nb_queues, 0,
1058 sizeof(txq[0]) * new_qs);
1061 dev->data->tx_queues = txq;
1063 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1066 txq = dev->data->tx_queues;
1068 for (i = nb_queues; i < old_nb_queues; i++)
1069 (*dev->dev_ops->tx_queue_release)(txq[i]);
1071 rte_free(dev->data->tx_queues);
1072 dev->data->tx_queues = NULL;
1074 dev->data->nb_tx_queues = nb_queues;
1079 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1082 case ETH_SPEED_NUM_10M:
1083 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1084 case ETH_SPEED_NUM_100M:
1085 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1086 case ETH_SPEED_NUM_1G:
1087 return ETH_LINK_SPEED_1G;
1088 case ETH_SPEED_NUM_2_5G:
1089 return ETH_LINK_SPEED_2_5G;
1090 case ETH_SPEED_NUM_5G:
1091 return ETH_LINK_SPEED_5G;
1092 case ETH_SPEED_NUM_10G:
1093 return ETH_LINK_SPEED_10G;
1094 case ETH_SPEED_NUM_20G:
1095 return ETH_LINK_SPEED_20G;
1096 case ETH_SPEED_NUM_25G:
1097 return ETH_LINK_SPEED_25G;
1098 case ETH_SPEED_NUM_40G:
1099 return ETH_LINK_SPEED_40G;
1100 case ETH_SPEED_NUM_50G:
1101 return ETH_LINK_SPEED_50G;
1102 case ETH_SPEED_NUM_56G:
1103 return ETH_LINK_SPEED_56G;
1104 case ETH_SPEED_NUM_100G:
1105 return ETH_LINK_SPEED_100G;
1106 case ETH_SPEED_NUM_200G:
1107 return ETH_LINK_SPEED_200G;
1114 rte_eth_dev_rx_offload_name(uint64_t offload)
1116 const char *name = "UNKNOWN";
1119 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1120 if (offload == rte_rx_offload_names[i].offload) {
1121 name = rte_rx_offload_names[i].name;
1130 rte_eth_dev_tx_offload_name(uint64_t offload)
1132 const char *name = "UNKNOWN";
1135 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1136 if (offload == rte_tx_offload_names[i].offload) {
1137 name = rte_tx_offload_names[i].name;
1146 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1147 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1151 if (dev_info_size == 0) {
1152 if (config_size != max_rx_pkt_len) {
1153 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1154 " %u != %u is not allowed\n",
1155 port_id, config_size, max_rx_pkt_len);
1158 } else if (config_size > dev_info_size) {
1159 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1160 "> max allowed value %u\n", port_id, config_size,
1163 } else if (config_size < RTE_ETHER_MIN_LEN) {
1164 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1165 "< min allowed value %u\n", port_id, config_size,
1166 (unsigned int)RTE_ETHER_MIN_LEN);
1173 * Validate offloads that are requested through rte_eth_dev_configure against
1174 * the offloads successfully set by the ethernet device.
1177 * The port identifier of the Ethernet device.
1178 * @param req_offloads
1179 * The offloads that have been requested through `rte_eth_dev_configure`.
1180 * @param set_offloads
1181 * The offloads successfully set by the ethernet device.
1182 * @param offload_type
1183 * The offload type i.e. Rx/Tx string.
1184 * @param offload_name
1185 * The function that prints the offload name.
1187 * - (0) if validation successful.
1188 * - (-EINVAL) if requested offload has been silently disabled.
1192 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1193 uint64_t set_offloads, const char *offload_type,
1194 const char *(*offload_name)(uint64_t))
1196 uint64_t offloads_diff = req_offloads ^ set_offloads;
1200 while (offloads_diff != 0) {
1201 /* Check if any offload is requested but not enabled. */
1202 offload = 1ULL << __builtin_ctzll(offloads_diff);
1203 if (offload & req_offloads) {
1205 "Port %u failed to enable %s offload %s\n",
1206 port_id, offload_type, offload_name(offload));
1210 /* Check if offload couldn't be disabled. */
1211 if (offload & set_offloads) {
1212 RTE_ETHDEV_LOG(DEBUG,
1213 "Port %u %s offload %s is not requested but enabled\n",
1214 port_id, offload_type, offload_name(offload));
1217 offloads_diff &= ~offload;
1224 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1225 const struct rte_eth_conf *dev_conf)
1227 struct rte_eth_dev *dev;
1228 struct rte_eth_dev_info dev_info;
1229 struct rte_eth_conf orig_conf;
1233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1235 dev = &rte_eth_devices[port_id];
1237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1239 if (dev->data->dev_started) {
1241 "Port %u must be stopped to allow configuration\n",
1246 /* Store original config, as rollback required on failure */
1247 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1250 * Copy the dev_conf parameter into the dev structure.
1251 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1253 if (dev_conf != &dev->data->dev_conf)
1254 memcpy(&dev->data->dev_conf, dev_conf,
1255 sizeof(dev->data->dev_conf));
1257 ret = rte_eth_dev_info_get(port_id, &dev_info);
1261 /* If number of queues specified by application for both Rx and Tx is
1262 * zero, use driver preferred values. This cannot be done individually
1263 * as it is valid for either Tx or Rx (but not both) to be zero.
1264 * If driver does not provide any preferred valued, fall back on
1267 if (nb_rx_q == 0 && nb_tx_q == 0) {
1268 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1270 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1271 nb_tx_q = dev_info.default_txportconf.nb_queues;
1273 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1276 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1278 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1279 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1284 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1286 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1287 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1293 * Check that the numbers of RX and TX queues are not greater
1294 * than the maximum number of RX and TX queues supported by the
1295 * configured device.
1297 if (nb_rx_q > dev_info.max_rx_queues) {
1298 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1299 port_id, nb_rx_q, dev_info.max_rx_queues);
1304 if (nb_tx_q > dev_info.max_tx_queues) {
1305 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1306 port_id, nb_tx_q, dev_info.max_tx_queues);
1311 /* Check that the device supports requested interrupts */
1312 if ((dev_conf->intr_conf.lsc == 1) &&
1313 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1314 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1315 dev->device->driver->name);
1319 if ((dev_conf->intr_conf.rmv == 1) &&
1320 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1321 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1322 dev->device->driver->name);
1328 * If jumbo frames are enabled, check that the maximum RX packet
1329 * length is supported by the configured device.
1331 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1332 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1334 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1335 port_id, dev_conf->rxmode.max_rx_pkt_len,
1336 dev_info.max_rx_pktlen);
1339 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1341 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1342 port_id, dev_conf->rxmode.max_rx_pkt_len,
1343 (unsigned int)RTE_ETHER_MIN_LEN);
1348 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1349 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1350 /* Use default value */
1351 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1356 * If LRO is enabled, check that the maximum aggregated packet
1357 * size is supported by the configured device.
1359 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1360 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1361 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1362 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1363 ret = check_lro_pkt_size(port_id,
1364 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1365 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1366 dev_info.max_lro_pkt_size);
1371 /* Any requested offloading must be within its device capabilities */
1372 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1373 dev_conf->rxmode.offloads) {
1375 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1376 "capabilities 0x%"PRIx64" in %s()\n",
1377 port_id, dev_conf->rxmode.offloads,
1378 dev_info.rx_offload_capa,
1383 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1384 dev_conf->txmode.offloads) {
1386 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1387 "capabilities 0x%"PRIx64" in %s()\n",
1388 port_id, dev_conf->txmode.offloads,
1389 dev_info.tx_offload_capa,
1395 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1396 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1398 /* Check that device supports requested rss hash functions. */
1399 if ((dev_info.flow_type_rss_offloads |
1400 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1401 dev_info.flow_type_rss_offloads) {
1403 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1404 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1405 dev_info.flow_type_rss_offloads);
1410 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1411 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1412 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1414 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1416 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1422 * Setup new number of RX/TX queues and reconfigure device.
1424 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1427 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1433 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1436 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1438 rte_eth_dev_rx_queue_config(dev, 0);
1443 diag = (*dev->dev_ops->dev_configure)(dev);
1445 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1447 ret = eth_err(port_id, diag);
1451 /* Initialize Rx profiling if enabled at compilation time. */
1452 diag = __rte_eth_dev_profile_init(port_id, dev);
1454 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1456 ret = eth_err(port_id, diag);
1460 /* Validate Rx offloads. */
1461 diag = validate_offloads(port_id,
1462 dev_conf->rxmode.offloads,
1463 dev->data->dev_conf.rxmode.offloads, "Rx",
1464 rte_eth_dev_rx_offload_name);
1470 /* Validate Tx offloads. */
1471 diag = validate_offloads(port_id,
1472 dev_conf->txmode.offloads,
1473 dev->data->dev_conf.txmode.offloads, "Tx",
1474 rte_eth_dev_tx_offload_name);
1480 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1483 rte_eth_dev_rx_queue_config(dev, 0);
1484 rte_eth_dev_tx_queue_config(dev, 0);
1486 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1488 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1493 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1495 if (dev->data->dev_started) {
1496 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1497 dev->data->port_id);
1501 rte_eth_dev_rx_queue_config(dev, 0);
1502 rte_eth_dev_tx_queue_config(dev, 0);
1504 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1508 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1509 struct rte_eth_dev_info *dev_info)
1511 struct rte_ether_addr *addr;
1516 /* replay MAC address configuration including default MAC */
1517 addr = &dev->data->mac_addrs[0];
1518 if (*dev->dev_ops->mac_addr_set != NULL)
1519 (*dev->dev_ops->mac_addr_set)(dev, addr);
1520 else if (*dev->dev_ops->mac_addr_add != NULL)
1521 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1523 if (*dev->dev_ops->mac_addr_add != NULL) {
1524 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1525 addr = &dev->data->mac_addrs[i];
1527 /* skip zero address */
1528 if (rte_is_zero_ether_addr(addr))
1532 pool_mask = dev->data->mac_pool_sel[i];
1535 if (pool_mask & 1ULL)
1536 (*dev->dev_ops->mac_addr_add)(dev,
1540 } while (pool_mask);
1546 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1547 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1551 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1552 rte_eth_dev_mac_restore(dev, dev_info);
1554 /* replay promiscuous configuration */
1556 * use callbacks directly since we don't need port_id check and
1557 * would like to bypass the same value set
1559 if (rte_eth_promiscuous_get(port_id) == 1 &&
1560 *dev->dev_ops->promiscuous_enable != NULL) {
1561 ret = eth_err(port_id,
1562 (*dev->dev_ops->promiscuous_enable)(dev));
1563 if (ret != 0 && ret != -ENOTSUP) {
1565 "Failed to enable promiscuous mode for device (port %u): %s\n",
1566 port_id, rte_strerror(-ret));
1569 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1570 *dev->dev_ops->promiscuous_disable != NULL) {
1571 ret = eth_err(port_id,
1572 (*dev->dev_ops->promiscuous_disable)(dev));
1573 if (ret != 0 && ret != -ENOTSUP) {
1575 "Failed to disable promiscuous mode for device (port %u): %s\n",
1576 port_id, rte_strerror(-ret));
1581 /* replay all multicast configuration */
1583 * use callbacks directly since we don't need port_id check and
1584 * would like to bypass the same value set
1586 if (rte_eth_allmulticast_get(port_id) == 1 &&
1587 *dev->dev_ops->allmulticast_enable != NULL) {
1588 ret = eth_err(port_id,
1589 (*dev->dev_ops->allmulticast_enable)(dev));
1590 if (ret != 0 && ret != -ENOTSUP) {
1592 "Failed to enable allmulticast mode for device (port %u): %s\n",
1593 port_id, rte_strerror(-ret));
1596 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1597 *dev->dev_ops->allmulticast_disable != NULL) {
1598 ret = eth_err(port_id,
1599 (*dev->dev_ops->allmulticast_disable)(dev));
1600 if (ret != 0 && ret != -ENOTSUP) {
1602 "Failed to disable allmulticast mode for device (port %u): %s\n",
1603 port_id, rte_strerror(-ret));
1612 rte_eth_dev_start(uint16_t port_id)
1614 struct rte_eth_dev *dev;
1615 struct rte_eth_dev_info dev_info;
1619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1621 dev = &rte_eth_devices[port_id];
1623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1625 if (dev->data->dev_started != 0) {
1626 RTE_ETHDEV_LOG(INFO,
1627 "Device with port_id=%"PRIu16" already started\n",
1632 ret = rte_eth_dev_info_get(port_id, &dev_info);
1636 /* Lets restore MAC now if device does not support live change */
1637 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1638 rte_eth_dev_mac_restore(dev, &dev_info);
1640 diag = (*dev->dev_ops->dev_start)(dev);
1642 dev->data->dev_started = 1;
1644 return eth_err(port_id, diag);
1646 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1649 "Error during restoring configuration for device (port %u): %s\n",
1650 port_id, rte_strerror(-ret));
1651 rte_eth_dev_stop(port_id);
1655 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1656 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1657 (*dev->dev_ops->link_update)(dev, 0);
1660 rte_ethdev_trace_start(port_id);
1665 rte_eth_dev_stop(uint16_t port_id)
1667 struct rte_eth_dev *dev;
1669 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1670 dev = &rte_eth_devices[port_id];
1672 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1674 if (dev->data->dev_started == 0) {
1675 RTE_ETHDEV_LOG(INFO,
1676 "Device with port_id=%"PRIu16" already stopped\n",
1681 dev->data->dev_started = 0;
1682 (*dev->dev_ops->dev_stop)(dev);
1683 rte_ethdev_trace_stop(port_id);
1687 rte_eth_dev_set_link_up(uint16_t port_id)
1689 struct rte_eth_dev *dev;
1691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1693 dev = &rte_eth_devices[port_id];
1695 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1696 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1700 rte_eth_dev_set_link_down(uint16_t port_id)
1702 struct rte_eth_dev *dev;
1704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1706 dev = &rte_eth_devices[port_id];
1708 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1709 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1713 rte_eth_dev_close(uint16_t port_id)
1715 struct rte_eth_dev *dev;
1717 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1718 dev = &rte_eth_devices[port_id];
1720 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1721 dev->data->dev_started = 0;
1722 (*dev->dev_ops->dev_close)(dev);
1724 rte_ethdev_trace_close(port_id);
1725 rte_eth_dev_release_port(dev);
1729 rte_eth_dev_reset(uint16_t port_id)
1731 struct rte_eth_dev *dev;
1734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1735 dev = &rte_eth_devices[port_id];
1737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1739 rte_eth_dev_stop(port_id);
1740 ret = dev->dev_ops->dev_reset(dev);
1742 return eth_err(port_id, ret);
1746 rte_eth_dev_is_removed(uint16_t port_id)
1748 struct rte_eth_dev *dev;
1751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1753 dev = &rte_eth_devices[port_id];
1755 if (dev->state == RTE_ETH_DEV_REMOVED)
1758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1760 ret = dev->dev_ops->is_removed(dev);
1762 /* Device is physically removed. */
1763 dev->state = RTE_ETH_DEV_REMOVED;
1769 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1770 uint16_t nb_rx_desc, unsigned int socket_id,
1771 const struct rte_eth_rxconf *rx_conf,
1772 struct rte_mempool *mp)
1775 uint32_t mbp_buf_size;
1776 struct rte_eth_dev *dev;
1777 struct rte_eth_dev_info dev_info;
1778 struct rte_eth_rxconf local_conf;
1781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1783 dev = &rte_eth_devices[port_id];
1784 if (rx_queue_id >= dev->data->nb_rx_queues) {
1785 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1790 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1797 * Check the size of the mbuf data buffer.
1798 * This value must be provided in the private data of the memory pool.
1799 * First check that the memory pool has a valid private data.
1801 ret = rte_eth_dev_info_get(port_id, &dev_info);
1805 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1806 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1807 mp->name, (int)mp->private_data_size,
1808 (int)sizeof(struct rte_pktmbuf_pool_private));
1811 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1813 if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1815 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1816 mp->name, (int)mbp_buf_size,
1817 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1818 (int)RTE_PKTMBUF_HEADROOM,
1819 (int)dev_info.min_rx_bufsize);
1823 /* Use default specified by driver, if nb_rx_desc is zero */
1824 if (nb_rx_desc == 0) {
1825 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1826 /* If driver default is also zero, fall back on EAL default */
1827 if (nb_rx_desc == 0)
1828 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1831 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1832 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1833 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1836 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1837 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1838 dev_info.rx_desc_lim.nb_min,
1839 dev_info.rx_desc_lim.nb_align);
1843 if (dev->data->dev_started &&
1844 !(dev_info.dev_capa &
1845 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1848 if (dev->data->dev_started &&
1849 (dev->data->rx_queue_state[rx_queue_id] !=
1850 RTE_ETH_QUEUE_STATE_STOPPED))
1853 rxq = dev->data->rx_queues;
1854 if (rxq[rx_queue_id]) {
1855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1857 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1858 rxq[rx_queue_id] = NULL;
1861 if (rx_conf == NULL)
1862 rx_conf = &dev_info.default_rxconf;
1864 local_conf = *rx_conf;
1867 * If an offloading has already been enabled in
1868 * rte_eth_dev_configure(), it has been enabled on all queues,
1869 * so there is no need to enable it in this queue again.
1870 * The local_conf.offloads input to underlying PMD only carries
1871 * those offloadings which are only enabled on this queue and
1872 * not enabled on all queues.
1874 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1877 * New added offloadings for this queue are those not enabled in
1878 * rte_eth_dev_configure() and they must be per-queue type.
1879 * A pure per-port offloading can't be enabled on a queue while
1880 * disabled on another queue. A pure per-port offloading can't
1881 * be enabled for any queue as new added one if it hasn't been
1882 * enabled in rte_eth_dev_configure().
1884 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1885 local_conf.offloads) {
1887 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1888 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1889 port_id, rx_queue_id, local_conf.offloads,
1890 dev_info.rx_queue_offload_capa,
1896 * If LRO is enabled, check that the maximum aggregated packet
1897 * size is supported by the configured device.
1899 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1900 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1901 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1902 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1903 int ret = check_lro_pkt_size(port_id,
1904 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1905 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1906 dev_info.max_lro_pkt_size);
1911 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1912 socket_id, &local_conf, mp);
1914 if (!dev->data->min_rx_buf_size ||
1915 dev->data->min_rx_buf_size > mbp_buf_size)
1916 dev->data->min_rx_buf_size = mbp_buf_size;
1919 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1921 return eth_err(port_id, ret);
1925 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1926 uint16_t nb_rx_desc,
1927 const struct rte_eth_hairpin_conf *conf)
1930 struct rte_eth_dev *dev;
1931 struct rte_eth_hairpin_cap cap;
1936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1938 dev = &rte_eth_devices[port_id];
1939 if (rx_queue_id >= dev->data->nb_rx_queues) {
1940 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1943 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1948 /* if nb_rx_desc is zero use max number of desc from the driver. */
1949 if (nb_rx_desc == 0)
1950 nb_rx_desc = cap.max_nb_desc;
1951 if (nb_rx_desc > cap.max_nb_desc) {
1953 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1954 nb_rx_desc, cap.max_nb_desc);
1957 if (conf->peer_count > cap.max_rx_2_tx) {
1959 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1960 conf->peer_count, cap.max_rx_2_tx);
1963 if (conf->peer_count == 0) {
1965 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1969 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1970 cap.max_nb_queues != UINT16_MAX; i++) {
1971 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1974 if (count > cap.max_nb_queues) {
1975 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1979 if (dev->data->dev_started)
1981 rxq = dev->data->rx_queues;
1982 if (rxq[rx_queue_id] != NULL) {
1983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1985 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1986 rxq[rx_queue_id] = NULL;
1988 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1991 dev->data->rx_queue_state[rx_queue_id] =
1992 RTE_ETH_QUEUE_STATE_HAIRPIN;
1993 return eth_err(port_id, ret);
1997 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1998 uint16_t nb_tx_desc, unsigned int socket_id,
1999 const struct rte_eth_txconf *tx_conf)
2001 struct rte_eth_dev *dev;
2002 struct rte_eth_dev_info dev_info;
2003 struct rte_eth_txconf local_conf;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2009 dev = &rte_eth_devices[port_id];
2010 if (tx_queue_id >= dev->data->nb_tx_queues) {
2011 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2017 ret = rte_eth_dev_info_get(port_id, &dev_info);
2021 /* Use default specified by driver, if nb_tx_desc is zero */
2022 if (nb_tx_desc == 0) {
2023 nb_tx_desc = dev_info.default_txportconf.ring_size;
2024 /* If driver default is zero, fall back on EAL default */
2025 if (nb_tx_desc == 0)
2026 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2028 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2029 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2030 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2032 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2033 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2034 dev_info.tx_desc_lim.nb_min,
2035 dev_info.tx_desc_lim.nb_align);
2039 if (dev->data->dev_started &&
2040 !(dev_info.dev_capa &
2041 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2044 if (dev->data->dev_started &&
2045 (dev->data->tx_queue_state[tx_queue_id] !=
2046 RTE_ETH_QUEUE_STATE_STOPPED))
2049 txq = dev->data->tx_queues;
2050 if (txq[tx_queue_id]) {
2051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2053 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2054 txq[tx_queue_id] = NULL;
2057 if (tx_conf == NULL)
2058 tx_conf = &dev_info.default_txconf;
2060 local_conf = *tx_conf;
2063 * If an offloading has already been enabled in
2064 * rte_eth_dev_configure(), it has been enabled on all queues,
2065 * so there is no need to enable it in this queue again.
2066 * The local_conf.offloads input to underlying PMD only carries
2067 * those offloadings which are only enabled on this queue and
2068 * not enabled on all queues.
2070 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2073 * New added offloadings for this queue are those not enabled in
2074 * rte_eth_dev_configure() and they must be per-queue type.
2075 * A pure per-port offloading can't be enabled on a queue while
2076 * disabled on another queue. A pure per-port offloading can't
2077 * be enabled for any queue as new added one if it hasn't been
2078 * enabled in rte_eth_dev_configure().
2080 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2081 local_conf.offloads) {
2083 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2084 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2085 port_id, tx_queue_id, local_conf.offloads,
2086 dev_info.tx_queue_offload_capa,
2091 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2092 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2093 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2097 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2098 uint16_t nb_tx_desc,
2099 const struct rte_eth_hairpin_conf *conf)
2101 struct rte_eth_dev *dev;
2102 struct rte_eth_hairpin_cap cap;
2108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2109 dev = &rte_eth_devices[port_id];
2110 if (tx_queue_id >= dev->data->nb_tx_queues) {
2111 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2114 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2119 /* if nb_rx_desc is zero use max number of desc from the driver. */
2120 if (nb_tx_desc == 0)
2121 nb_tx_desc = cap.max_nb_desc;
2122 if (nb_tx_desc > cap.max_nb_desc) {
2124 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2125 nb_tx_desc, cap.max_nb_desc);
2128 if (conf->peer_count > cap.max_tx_2_rx) {
2130 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2131 conf->peer_count, cap.max_tx_2_rx);
2134 if (conf->peer_count == 0) {
2136 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2140 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2141 cap.max_nb_queues != UINT16_MAX; i++) {
2142 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2145 if (count > cap.max_nb_queues) {
2146 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2150 if (dev->data->dev_started)
2152 txq = dev->data->tx_queues;
2153 if (txq[tx_queue_id] != NULL) {
2154 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2156 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2157 txq[tx_queue_id] = NULL;
2159 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2160 (dev, tx_queue_id, nb_tx_desc, conf);
2162 dev->data->tx_queue_state[tx_queue_id] =
2163 RTE_ETH_QUEUE_STATE_HAIRPIN;
2164 return eth_err(port_id, ret);
2168 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2169 void *userdata __rte_unused)
2171 rte_pktmbuf_free_bulk(pkts, unsent);
2175 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2178 uint64_t *count = userdata;
2180 rte_pktmbuf_free_bulk(pkts, unsent);
2185 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2186 buffer_tx_error_fn cbfn, void *userdata)
2188 buffer->error_callback = cbfn;
2189 buffer->error_userdata = userdata;
2194 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2201 buffer->size = size;
2202 if (buffer->error_callback == NULL) {
2203 ret = rte_eth_tx_buffer_set_err_callback(
2204 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2211 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2213 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2216 /* Validate Input Data. Bail if not valid or not supported. */
2217 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2218 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2220 /* Call driver to free pending mbufs. */
2221 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2223 return eth_err(port_id, ret);
2227 rte_eth_promiscuous_enable(uint16_t port_id)
2229 struct rte_eth_dev *dev;
2232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2233 dev = &rte_eth_devices[port_id];
2235 if (dev->data->promiscuous == 1)
2238 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2240 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2241 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2243 return eth_err(port_id, diag);
2247 rte_eth_promiscuous_disable(uint16_t port_id)
2249 struct rte_eth_dev *dev;
2252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2253 dev = &rte_eth_devices[port_id];
2255 if (dev->data->promiscuous == 0)
2258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2260 dev->data->promiscuous = 0;
2261 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2263 dev->data->promiscuous = 1;
2265 return eth_err(port_id, diag);
2269 rte_eth_promiscuous_get(uint16_t port_id)
2271 struct rte_eth_dev *dev;
2273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2275 dev = &rte_eth_devices[port_id];
2276 return dev->data->promiscuous;
2280 rte_eth_allmulticast_enable(uint16_t port_id)
2282 struct rte_eth_dev *dev;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 dev = &rte_eth_devices[port_id];
2288 if (dev->data->all_multicast == 1)
2291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2292 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2293 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2295 return eth_err(port_id, diag);
2299 rte_eth_allmulticast_disable(uint16_t port_id)
2301 struct rte_eth_dev *dev;
2304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2305 dev = &rte_eth_devices[port_id];
2307 if (dev->data->all_multicast == 0)
2310 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2311 dev->data->all_multicast = 0;
2312 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2314 dev->data->all_multicast = 1;
2316 return eth_err(port_id, diag);
2320 rte_eth_allmulticast_get(uint16_t port_id)
2322 struct rte_eth_dev *dev;
2324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2326 dev = &rte_eth_devices[port_id];
2327 return dev->data->all_multicast;
2331 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2333 struct rte_eth_dev *dev;
2335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2336 dev = &rte_eth_devices[port_id];
2338 if (dev->data->dev_conf.intr_conf.lsc &&
2339 dev->data->dev_started)
2340 rte_eth_linkstatus_get(dev, eth_link);
2342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2343 (*dev->dev_ops->link_update)(dev, 1);
2344 *eth_link = dev->data->dev_link;
2351 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2353 struct rte_eth_dev *dev;
2355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2356 dev = &rte_eth_devices[port_id];
2358 if (dev->data->dev_conf.intr_conf.lsc &&
2359 dev->data->dev_started)
2360 rte_eth_linkstatus_get(dev, eth_link);
2362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2363 (*dev->dev_ops->link_update)(dev, 0);
2364 *eth_link = dev->data->dev_link;
2371 rte_eth_link_speed_to_str(uint32_t link_speed)
2373 switch (link_speed) {
2374 case ETH_SPEED_NUM_NONE: return "None";
2375 case ETH_SPEED_NUM_10M: return "10 Mbps";
2376 case ETH_SPEED_NUM_100M: return "100 Mbps";
2377 case ETH_SPEED_NUM_1G: return "1 Gbps";
2378 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2379 case ETH_SPEED_NUM_5G: return "5 Gbps";
2380 case ETH_SPEED_NUM_10G: return "10 Gbps";
2381 case ETH_SPEED_NUM_20G: return "20 Gbps";
2382 case ETH_SPEED_NUM_25G: return "25 Gbps";
2383 case ETH_SPEED_NUM_40G: return "40 Gbps";
2384 case ETH_SPEED_NUM_50G: return "50 Gbps";
2385 case ETH_SPEED_NUM_56G: return "56 Gbps";
2386 case ETH_SPEED_NUM_100G: return "100 Gbps";
2387 case ETH_SPEED_NUM_200G: return "200 Gbps";
2388 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2389 default: return "Invalid";
2394 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2396 if (eth_link->link_status == ETH_LINK_DOWN)
2397 return snprintf(str, len, "Link down");
2399 return snprintf(str, len, "Link up at %s %s %s",
2400 rte_eth_link_speed_to_str(eth_link->link_speed),
2401 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2403 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2404 "Autoneg" : "Fixed");
2408 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2410 struct rte_eth_dev *dev;
2412 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2414 dev = &rte_eth_devices[port_id];
2415 memset(stats, 0, sizeof(*stats));
2417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2418 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2419 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2423 rte_eth_stats_reset(uint16_t port_id)
2425 struct rte_eth_dev *dev;
2428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2429 dev = &rte_eth_devices[port_id];
2431 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2432 ret = (*dev->dev_ops->stats_reset)(dev);
2434 return eth_err(port_id, ret);
2436 dev->data->rx_mbuf_alloc_failed = 0;
2442 get_xstats_basic_count(struct rte_eth_dev *dev)
2444 uint16_t nb_rxqs, nb_txqs;
2447 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2448 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2450 count = RTE_NB_STATS;
2451 count += nb_rxqs * RTE_NB_RXQ_STATS;
2452 count += nb_txqs * RTE_NB_TXQ_STATS;
2458 get_xstats_count(uint16_t port_id)
2460 struct rte_eth_dev *dev;
2463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2464 dev = &rte_eth_devices[port_id];
2465 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2466 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2469 return eth_err(port_id, count);
2471 if (dev->dev_ops->xstats_get_names != NULL) {
2472 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2474 return eth_err(port_id, count);
2479 count += get_xstats_basic_count(dev);
2485 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2488 int cnt_xstats, idx_xstat;
2490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2493 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2498 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2503 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2504 if (cnt_xstats < 0) {
2505 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2509 /* Get id-name lookup table */
2510 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2512 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2513 port_id, xstats_names, cnt_xstats, NULL)) {
2514 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2518 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2519 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2528 /* retrieve basic stats names */
2530 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2531 struct rte_eth_xstat_name *xstats_names)
2533 int cnt_used_entries = 0;
2534 uint32_t idx, id_queue;
2537 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2538 strlcpy(xstats_names[cnt_used_entries].name,
2539 rte_stats_strings[idx].name,
2540 sizeof(xstats_names[0].name));
2543 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2544 for (id_queue = 0; id_queue < num_q; id_queue++) {
2545 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2546 snprintf(xstats_names[cnt_used_entries].name,
2547 sizeof(xstats_names[0].name),
2549 id_queue, rte_rxq_stats_strings[idx].name);
2554 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2555 for (id_queue = 0; id_queue < num_q; id_queue++) {
2556 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2557 snprintf(xstats_names[cnt_used_entries].name,
2558 sizeof(xstats_names[0].name),
2560 id_queue, rte_txq_stats_strings[idx].name);
2564 return cnt_used_entries;
2567 /* retrieve ethdev extended statistics names */
2569 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2570 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2573 struct rte_eth_xstat_name *xstats_names_copy;
2574 unsigned int no_basic_stat_requested = 1;
2575 unsigned int no_ext_stat_requested = 1;
2576 unsigned int expected_entries;
2577 unsigned int basic_count;
2578 struct rte_eth_dev *dev;
2582 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2583 dev = &rte_eth_devices[port_id];
2585 basic_count = get_xstats_basic_count(dev);
2586 ret = get_xstats_count(port_id);
2589 expected_entries = (unsigned int)ret;
2591 /* Return max number of stats if no ids given */
2594 return expected_entries;
2595 else if (xstats_names && size < expected_entries)
2596 return expected_entries;
2599 if (ids && !xstats_names)
2602 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2603 uint64_t ids_copy[size];
2605 for (i = 0; i < size; i++) {
2606 if (ids[i] < basic_count) {
2607 no_basic_stat_requested = 0;
2612 * Convert ids to xstats ids that PMD knows.
2613 * ids known by user are basic + extended stats.
2615 ids_copy[i] = ids[i] - basic_count;
2618 if (no_basic_stat_requested)
2619 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2620 xstats_names, ids_copy, size);
2623 /* Retrieve all stats */
2625 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2627 if (num_stats < 0 || num_stats > (int)expected_entries)
2630 return expected_entries;
2633 xstats_names_copy = calloc(expected_entries,
2634 sizeof(struct rte_eth_xstat_name));
2636 if (!xstats_names_copy) {
2637 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2642 for (i = 0; i < size; i++) {
2643 if (ids[i] >= basic_count) {
2644 no_ext_stat_requested = 0;
2650 /* Fill xstats_names_copy structure */
2651 if (ids && no_ext_stat_requested) {
2652 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2654 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2657 free(xstats_names_copy);
2663 for (i = 0; i < size; i++) {
2664 if (ids[i] >= expected_entries) {
2665 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2666 free(xstats_names_copy);
2669 xstats_names[i] = xstats_names_copy[ids[i]];
2672 free(xstats_names_copy);
2677 rte_eth_xstats_get_names(uint16_t port_id,
2678 struct rte_eth_xstat_name *xstats_names,
2681 struct rte_eth_dev *dev;
2682 int cnt_used_entries;
2683 int cnt_expected_entries;
2684 int cnt_driver_entries;
2686 cnt_expected_entries = get_xstats_count(port_id);
2687 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2688 (int)size < cnt_expected_entries)
2689 return cnt_expected_entries;
2691 /* port_id checked in get_xstats_count() */
2692 dev = &rte_eth_devices[port_id];
2694 cnt_used_entries = rte_eth_basic_stats_get_names(
2697 if (dev->dev_ops->xstats_get_names != NULL) {
2698 /* If there are any driver-specific xstats, append them
2701 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2703 xstats_names + cnt_used_entries,
2704 size - cnt_used_entries);
2705 if (cnt_driver_entries < 0)
2706 return eth_err(port_id, cnt_driver_entries);
2707 cnt_used_entries += cnt_driver_entries;
2710 return cnt_used_entries;
2715 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2717 struct rte_eth_dev *dev;
2718 struct rte_eth_stats eth_stats;
2719 unsigned int count = 0, i, q;
2720 uint64_t val, *stats_ptr;
2721 uint16_t nb_rxqs, nb_txqs;
2724 ret = rte_eth_stats_get(port_id, ð_stats);
2728 dev = &rte_eth_devices[port_id];
2730 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2731 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2734 for (i = 0; i < RTE_NB_STATS; i++) {
2735 stats_ptr = RTE_PTR_ADD(ð_stats,
2736 rte_stats_strings[i].offset);
2738 xstats[count++].value = val;
2742 for (q = 0; q < nb_rxqs; q++) {
2743 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2744 stats_ptr = RTE_PTR_ADD(ð_stats,
2745 rte_rxq_stats_strings[i].offset +
2746 q * sizeof(uint64_t));
2748 xstats[count++].value = val;
2753 for (q = 0; q < nb_txqs; q++) {
2754 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2755 stats_ptr = RTE_PTR_ADD(ð_stats,
2756 rte_txq_stats_strings[i].offset +
2757 q * sizeof(uint64_t));
2759 xstats[count++].value = val;
2765 /* retrieve ethdev extended statistics */
2767 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2768 uint64_t *values, unsigned int size)
2770 unsigned int no_basic_stat_requested = 1;
2771 unsigned int no_ext_stat_requested = 1;
2772 unsigned int num_xstats_filled;
2773 unsigned int basic_count;
2774 uint16_t expected_entries;
2775 struct rte_eth_dev *dev;
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 ret = get_xstats_count(port_id);
2783 expected_entries = (uint16_t)ret;
2784 struct rte_eth_xstat xstats[expected_entries];
2785 dev = &rte_eth_devices[port_id];
2786 basic_count = get_xstats_basic_count(dev);
2788 /* Return max number of stats if no ids given */
2791 return expected_entries;
2792 else if (values && size < expected_entries)
2793 return expected_entries;
2799 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2800 unsigned int basic_count = get_xstats_basic_count(dev);
2801 uint64_t ids_copy[size];
2803 for (i = 0; i < size; i++) {
2804 if (ids[i] < basic_count) {
2805 no_basic_stat_requested = 0;
2810 * Convert ids to xstats ids that PMD knows.
2811 * ids known by user are basic + extended stats.
2813 ids_copy[i] = ids[i] - basic_count;
2816 if (no_basic_stat_requested)
2817 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2822 for (i = 0; i < size; i++) {
2823 if (ids[i] >= basic_count) {
2824 no_ext_stat_requested = 0;
2830 /* Fill the xstats structure */
2831 if (ids && no_ext_stat_requested)
2832 ret = rte_eth_basic_stats_get(port_id, xstats);
2834 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2838 num_xstats_filled = (unsigned int)ret;
2840 /* Return all stats */
2842 for (i = 0; i < num_xstats_filled; i++)
2843 values[i] = xstats[i].value;
2844 return expected_entries;
2848 for (i = 0; i < size; i++) {
2849 if (ids[i] >= expected_entries) {
2850 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2853 values[i] = xstats[ids[i]].value;
2859 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2862 struct rte_eth_dev *dev;
2863 unsigned int count = 0, i;
2864 signed int xcount = 0;
2865 uint16_t nb_rxqs, nb_txqs;
2868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2870 dev = &rte_eth_devices[port_id];
2872 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2873 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2875 /* Return generic statistics */
2876 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2877 (nb_txqs * RTE_NB_TXQ_STATS);
2879 /* implemented by the driver */
2880 if (dev->dev_ops->xstats_get != NULL) {
2881 /* Retrieve the xstats from the driver at the end of the
2884 xcount = (*dev->dev_ops->xstats_get)(dev,
2885 xstats ? xstats + count : NULL,
2886 (n > count) ? n - count : 0);
2889 return eth_err(port_id, xcount);
2892 if (n < count + xcount || xstats == NULL)
2893 return count + xcount;
2895 /* now fill the xstats structure */
2896 ret = rte_eth_basic_stats_get(port_id, xstats);
2901 for (i = 0; i < count; i++)
2903 /* add an offset to driver-specific stats */
2904 for ( ; i < count + xcount; i++)
2905 xstats[i].id += count;
2907 return count + xcount;
2910 /* reset ethdev extended statistics */
2912 rte_eth_xstats_reset(uint16_t port_id)
2914 struct rte_eth_dev *dev;
2916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2917 dev = &rte_eth_devices[port_id];
2919 /* implemented by the driver */
2920 if (dev->dev_ops->xstats_reset != NULL)
2921 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2923 /* fallback to default */
2924 return rte_eth_stats_reset(port_id);
2928 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2931 struct rte_eth_dev *dev;
2933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2935 dev = &rte_eth_devices[port_id];
2937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2939 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2942 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2945 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2948 return (*dev->dev_ops->queue_stats_mapping_set)
2949 (dev, queue_id, stat_idx, is_rx);
2954 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2957 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2958 stat_idx, STAT_QMAP_TX));
2963 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2966 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2967 stat_idx, STAT_QMAP_RX));
2971 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2973 struct rte_eth_dev *dev;
2975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2976 dev = &rte_eth_devices[port_id];
2978 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2979 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2980 fw_version, fw_size));
2984 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2986 struct rte_eth_dev *dev;
2987 const struct rte_eth_desc_lim lim = {
2988 .nb_max = UINT16_MAX,
2991 .nb_seg_max = UINT16_MAX,
2992 .nb_mtu_seg_max = UINT16_MAX,
2997 * Init dev_info before port_id check since caller does not have
2998 * return status and does not know if get is successful or not.
3000 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3001 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3004 dev = &rte_eth_devices[port_id];
3006 dev_info->rx_desc_lim = lim;
3007 dev_info->tx_desc_lim = lim;
3008 dev_info->device = dev->device;
3009 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3010 dev_info->max_mtu = UINT16_MAX;
3012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3013 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3015 /* Cleanup already filled in device information */
3016 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3017 return eth_err(port_id, diag);
3020 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3021 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3022 RTE_MAX_QUEUES_PER_PORT);
3023 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3024 RTE_MAX_QUEUES_PER_PORT);
3026 dev_info->driver_name = dev->device->driver->name;
3027 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3028 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3030 dev_info->dev_flags = &dev->data->dev_flags;
3036 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3037 uint32_t *ptypes, int num)
3040 struct rte_eth_dev *dev;
3041 const uint32_t *all_ptypes;
3043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3044 dev = &rte_eth_devices[port_id];
3045 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3046 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3051 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3052 if (all_ptypes[i] & ptype_mask) {
3054 ptypes[j] = all_ptypes[i];
3062 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3063 uint32_t *set_ptypes, unsigned int num)
3065 const uint32_t valid_ptype_masks[] = {
3069 RTE_PTYPE_TUNNEL_MASK,
3070 RTE_PTYPE_INNER_L2_MASK,
3071 RTE_PTYPE_INNER_L3_MASK,
3072 RTE_PTYPE_INNER_L4_MASK,
3074 const uint32_t *all_ptypes;
3075 struct rte_eth_dev *dev;
3076 uint32_t unused_mask;
3080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3081 dev = &rte_eth_devices[port_id];
3083 if (num > 0 && set_ptypes == NULL)
3086 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3087 *dev->dev_ops->dev_ptypes_set == NULL) {
3092 if (ptype_mask == 0) {
3093 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3098 unused_mask = ptype_mask;
3099 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3100 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3101 if (mask && mask != valid_ptype_masks[i]) {
3105 unused_mask &= ~valid_ptype_masks[i];
3113 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3114 if (all_ptypes == NULL) {
3120 * Accommodate as many set_ptypes as possible. If the supplied
3121 * set_ptypes array is insufficient fill it partially.
3123 for (i = 0, j = 0; set_ptypes != NULL &&
3124 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3125 if (ptype_mask & all_ptypes[i]) {
3127 set_ptypes[j] = all_ptypes[i];
3135 if (set_ptypes != NULL && j < num)
3136 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3138 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3142 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3148 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3150 struct rte_eth_dev *dev;
3152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3153 dev = &rte_eth_devices[port_id];
3154 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3160 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3162 struct rte_eth_dev *dev;
3164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3166 dev = &rte_eth_devices[port_id];
3167 *mtu = dev->data->mtu;
3172 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3175 struct rte_eth_dev_info dev_info;
3176 struct rte_eth_dev *dev;
3178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3179 dev = &rte_eth_devices[port_id];
3180 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3183 * Check if the device supports dev_infos_get, if it does not
3184 * skip min_mtu/max_mtu validation here as this requires values
3185 * that are populated within the call to rte_eth_dev_info_get()
3186 * which relies on dev->dev_ops->dev_infos_get.
3188 if (*dev->dev_ops->dev_infos_get != NULL) {
3189 ret = rte_eth_dev_info_get(port_id, &dev_info);
3193 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3197 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3199 dev->data->mtu = mtu;
3201 return eth_err(port_id, ret);
3205 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3207 struct rte_eth_dev *dev;
3210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3211 dev = &rte_eth_devices[port_id];
3212 if (!(dev->data->dev_conf.rxmode.offloads &
3213 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3214 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3219 if (vlan_id > 4095) {
3220 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3226 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3228 struct rte_vlan_filter_conf *vfc;
3232 vfc = &dev->data->vlan_filter_conf;
3233 vidx = vlan_id / 64;
3234 vbit = vlan_id % 64;
3237 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3239 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3242 return eth_err(port_id, ret);
3246 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3249 struct rte_eth_dev *dev;
3251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3252 dev = &rte_eth_devices[port_id];
3253 if (rx_queue_id >= dev->data->nb_rx_queues) {
3254 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3259 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3265 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3266 enum rte_vlan_type vlan_type,
3269 struct rte_eth_dev *dev;
3271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3272 dev = &rte_eth_devices[port_id];
3273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3275 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3280 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3282 struct rte_eth_dev_info dev_info;
3283 struct rte_eth_dev *dev;
3287 uint64_t orig_offloads;
3288 uint64_t dev_offloads;
3289 uint64_t new_offloads;
3291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3292 dev = &rte_eth_devices[port_id];
3294 /* save original values in case of failure */
3295 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3296 dev_offloads = orig_offloads;
3298 /* check which option changed by application */
3299 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3300 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3303 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3305 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3306 mask |= ETH_VLAN_STRIP_MASK;
3309 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3310 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3313 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3315 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3316 mask |= ETH_VLAN_FILTER_MASK;
3319 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3320 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3323 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3325 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3326 mask |= ETH_VLAN_EXTEND_MASK;
3329 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3330 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3333 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3335 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3336 mask |= ETH_QINQ_STRIP_MASK;
3343 ret = rte_eth_dev_info_get(port_id, &dev_info);
3347 /* Rx VLAN offloading must be within its device capabilities */
3348 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3349 new_offloads = dev_offloads & ~orig_offloads;
3351 "Ethdev port_id=%u requested new added VLAN offloads "
3352 "0x%" PRIx64 " must be within Rx offloads capabilities "
3353 "0x%" PRIx64 " in %s()\n",
3354 port_id, new_offloads, dev_info.rx_offload_capa,
3359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3360 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3361 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3363 /* hit an error restore original values */
3364 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3367 return eth_err(port_id, ret);
3371 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3373 struct rte_eth_dev *dev;
3374 uint64_t *dev_offloads;
3377 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3378 dev = &rte_eth_devices[port_id];
3379 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3381 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3382 ret |= ETH_VLAN_STRIP_OFFLOAD;
3384 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3385 ret |= ETH_VLAN_FILTER_OFFLOAD;
3387 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3388 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3390 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3391 ret |= ETH_QINQ_STRIP_OFFLOAD;
3397 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3399 struct rte_eth_dev *dev;
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3402 dev = &rte_eth_devices[port_id];
3403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3405 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3409 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3411 struct rte_eth_dev *dev;
3413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3414 dev = &rte_eth_devices[port_id];
3415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3416 memset(fc_conf, 0, sizeof(*fc_conf));
3417 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3421 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3423 struct rte_eth_dev *dev;
3425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3426 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3427 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3431 dev = &rte_eth_devices[port_id];
3432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3433 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3437 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3438 struct rte_eth_pfc_conf *pfc_conf)
3440 struct rte_eth_dev *dev;
3442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3443 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3444 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3448 dev = &rte_eth_devices[port_id];
3449 /* High water, low water validation are device specific */
3450 if (*dev->dev_ops->priority_flow_ctrl_set)
3451 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3457 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3465 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3466 for (i = 0; i < num; i++) {
3467 if (reta_conf[i].mask)
3475 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3479 uint16_t i, idx, shift;
3485 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3489 for (i = 0; i < reta_size; i++) {
3490 idx = i / RTE_RETA_GROUP_SIZE;
3491 shift = i % RTE_RETA_GROUP_SIZE;
3492 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3493 (reta_conf[idx].reta[shift] >= max_rxq)) {
3495 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3497 reta_conf[idx].reta[shift], max_rxq);
3506 rte_eth_dev_rss_reta_update(uint16_t port_id,
3507 struct rte_eth_rss_reta_entry64 *reta_conf,
3510 struct rte_eth_dev *dev;
3513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3514 /* Check mask bits */
3515 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3519 dev = &rte_eth_devices[port_id];
3521 /* Check entry value */
3522 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3523 dev->data->nb_rx_queues);
3527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3528 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3533 rte_eth_dev_rss_reta_query(uint16_t port_id,
3534 struct rte_eth_rss_reta_entry64 *reta_conf,
3537 struct rte_eth_dev *dev;
3540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3542 /* Check mask bits */
3543 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3547 dev = &rte_eth_devices[port_id];
3548 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3549 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3554 rte_eth_dev_rss_hash_update(uint16_t port_id,
3555 struct rte_eth_rss_conf *rss_conf)
3557 struct rte_eth_dev *dev;
3558 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3563 ret = rte_eth_dev_info_get(port_id, &dev_info);
3567 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3569 dev = &rte_eth_devices[port_id];
3570 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3571 dev_info.flow_type_rss_offloads) {
3573 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3574 port_id, rss_conf->rss_hf,
3575 dev_info.flow_type_rss_offloads);
3578 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3579 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3584 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3585 struct rte_eth_rss_conf *rss_conf)
3587 struct rte_eth_dev *dev;
3589 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3590 dev = &rte_eth_devices[port_id];
3591 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3592 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3597 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3598 struct rte_eth_udp_tunnel *udp_tunnel)
3600 struct rte_eth_dev *dev;
3602 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3603 if (udp_tunnel == NULL) {
3604 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3608 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3609 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3613 dev = &rte_eth_devices[port_id];
3614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3615 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3620 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3621 struct rte_eth_udp_tunnel *udp_tunnel)
3623 struct rte_eth_dev *dev;
3625 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3626 dev = &rte_eth_devices[port_id];
3628 if (udp_tunnel == NULL) {
3629 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3633 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3634 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3639 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3644 rte_eth_led_on(uint16_t port_id)
3646 struct rte_eth_dev *dev;
3648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3649 dev = &rte_eth_devices[port_id];
3650 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3651 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3655 rte_eth_led_off(uint16_t port_id)
3657 struct rte_eth_dev *dev;
3659 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3660 dev = &rte_eth_devices[port_id];
3661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3662 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3666 rte_eth_fec_get_capability(uint16_t port_id,
3667 struct rte_eth_fec_capa *speed_fec_capa,
3670 struct rte_eth_dev *dev;
3673 if (speed_fec_capa == NULL && num > 0)
3676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3677 dev = &rte_eth_devices[port_id];
3678 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
3679 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
3685 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
3687 struct rte_eth_dev *dev;
3689 if (fec_capa == NULL)
3692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3693 dev = &rte_eth_devices[port_id];
3694 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
3695 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
3699 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
3701 struct rte_eth_dev *dev;
3703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3704 dev = &rte_eth_devices[port_id];
3705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
3706 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
3710 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3714 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3716 struct rte_eth_dev_info dev_info;
3717 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3721 ret = rte_eth_dev_info_get(port_id, &dev_info);
3725 for (i = 0; i < dev_info.max_mac_addrs; i++)
3726 if (memcmp(addr, &dev->data->mac_addrs[i],
3727 RTE_ETHER_ADDR_LEN) == 0)
3733 static const struct rte_ether_addr null_mac_addr;
3736 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3739 struct rte_eth_dev *dev;
3744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3745 dev = &rte_eth_devices[port_id];
3746 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3748 if (rte_is_zero_ether_addr(addr)) {
3749 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3753 if (pool >= ETH_64_POOLS) {
3754 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3758 index = get_mac_addr_index(port_id, addr);
3760 index = get_mac_addr_index(port_id, &null_mac_addr);
3762 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3767 pool_mask = dev->data->mac_pool_sel[index];
3769 /* Check if both MAC address and pool is already there, and do nothing */
3770 if (pool_mask & (1ULL << pool))
3775 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3778 /* Update address in NIC data structure */
3779 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3781 /* Update pool bitmap in NIC data structure */
3782 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3785 return eth_err(port_id, ret);
3789 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3791 struct rte_eth_dev *dev;
3794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3795 dev = &rte_eth_devices[port_id];
3796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3798 index = get_mac_addr_index(port_id, addr);
3801 "Port %u: Cannot remove default MAC address\n",
3804 } else if (index < 0)
3805 return 0; /* Do nothing if address wasn't found */
3808 (*dev->dev_ops->mac_addr_remove)(dev, index);
3810 /* Update address in NIC data structure */
3811 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3813 /* reset pool bitmap */
3814 dev->data->mac_pool_sel[index] = 0;
3820 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3822 struct rte_eth_dev *dev;
3825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3827 if (!rte_is_valid_assigned_ether_addr(addr))
3830 dev = &rte_eth_devices[port_id];
3831 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3833 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3837 /* Update default address in NIC data structure */
3838 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3845 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3849 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3851 struct rte_eth_dev_info dev_info;
3852 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3856 ret = rte_eth_dev_info_get(port_id, &dev_info);
3860 if (!dev->data->hash_mac_addrs)
3863 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3864 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3865 RTE_ETHER_ADDR_LEN) == 0)
3872 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3877 struct rte_eth_dev *dev;
3879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3881 dev = &rte_eth_devices[port_id];
3882 if (rte_is_zero_ether_addr(addr)) {
3883 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3888 index = get_hash_mac_addr_index(port_id, addr);
3889 /* Check if it's already there, and do nothing */
3890 if ((index >= 0) && on)
3896 "Port %u: the MAC address was not set in UTA\n",
3901 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3903 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3910 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3912 /* Update address in NIC data structure */
3914 rte_ether_addr_copy(addr,
3915 &dev->data->hash_mac_addrs[index]);
3917 rte_ether_addr_copy(&null_mac_addr,
3918 &dev->data->hash_mac_addrs[index]);
3921 return eth_err(port_id, ret);
3925 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3927 struct rte_eth_dev *dev;
3929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3931 dev = &rte_eth_devices[port_id];
3933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3934 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3938 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3941 struct rte_eth_dev *dev;
3942 struct rte_eth_dev_info dev_info;
3943 struct rte_eth_link link;
3946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3948 ret = rte_eth_dev_info_get(port_id, &dev_info);
3952 dev = &rte_eth_devices[port_id];
3953 link = dev->data->dev_link;
3955 if (queue_idx > dev_info.max_tx_queues) {
3957 "Set queue rate limit:port %u: invalid queue id=%u\n",
3958 port_id, queue_idx);
3962 if (tx_rate > link.link_speed) {
3964 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3965 tx_rate, link.link_speed);
3969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3970 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3971 queue_idx, tx_rate));
3975 rte_eth_mirror_rule_set(uint16_t port_id,
3976 struct rte_eth_mirror_conf *mirror_conf,
3977 uint8_t rule_id, uint8_t on)
3979 struct rte_eth_dev *dev;
3981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 if (mirror_conf->rule_type == 0) {
3983 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3987 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3988 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3993 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3994 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3995 (mirror_conf->pool_mask == 0)) {
3997 "Invalid mirror pool, pool mask can not be 0\n");
4001 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4002 mirror_conf->vlan.vlan_mask == 0) {
4004 "Invalid vlan mask, vlan mask can not be 0\n");
4008 dev = &rte_eth_devices[port_id];
4009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4011 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4012 mirror_conf, rule_id, on));
4016 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4018 struct rte_eth_dev *dev;
4020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4022 dev = &rte_eth_devices[port_id];
4023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4025 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4029 RTE_INIT(eth_dev_init_cb_lists)
4033 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4034 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4038 rte_eth_dev_callback_register(uint16_t port_id,
4039 enum rte_eth_event_type event,
4040 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4042 struct rte_eth_dev *dev;
4043 struct rte_eth_dev_callback *user_cb;
4044 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4050 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4051 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4055 if (port_id == RTE_ETH_ALL) {
4057 last_port = RTE_MAX_ETHPORTS - 1;
4059 next_port = last_port = port_id;
4062 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4065 dev = &rte_eth_devices[next_port];
4067 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4068 if (user_cb->cb_fn == cb_fn &&
4069 user_cb->cb_arg == cb_arg &&
4070 user_cb->event == event) {
4075 /* create a new callback. */
4076 if (user_cb == NULL) {
4077 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4078 sizeof(struct rte_eth_dev_callback), 0);
4079 if (user_cb != NULL) {
4080 user_cb->cb_fn = cb_fn;
4081 user_cb->cb_arg = cb_arg;
4082 user_cb->event = event;
4083 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4086 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4087 rte_eth_dev_callback_unregister(port_id, event,
4093 } while (++next_port <= last_port);
4095 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4100 rte_eth_dev_callback_unregister(uint16_t port_id,
4101 enum rte_eth_event_type event,
4102 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4105 struct rte_eth_dev *dev;
4106 struct rte_eth_dev_callback *cb, *next;
4107 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4113 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4114 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4118 if (port_id == RTE_ETH_ALL) {
4120 last_port = RTE_MAX_ETHPORTS - 1;
4122 next_port = last_port = port_id;
4125 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4128 dev = &rte_eth_devices[next_port];
4130 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4133 next = TAILQ_NEXT(cb, next);
4135 if (cb->cb_fn != cb_fn || cb->event != event ||
4136 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4140 * if this callback is not executing right now,
4143 if (cb->active == 0) {
4144 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4150 } while (++next_port <= last_port);
4152 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4157 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4158 enum rte_eth_event_type event, void *ret_param)
4160 struct rte_eth_dev_callback *cb_lst;
4161 struct rte_eth_dev_callback dev_cb;
4164 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4165 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4166 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4170 if (ret_param != NULL)
4171 dev_cb.ret_param = ret_param;
4173 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4174 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4175 dev_cb.cb_arg, dev_cb.ret_param);
4176 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4179 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4184 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4189 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4191 dev->state = RTE_ETH_DEV_ATTACHED;
4195 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4198 struct rte_eth_dev *dev;
4199 struct rte_intr_handle *intr_handle;
4203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4205 dev = &rte_eth_devices[port_id];
4207 if (!dev->intr_handle) {
4208 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4212 intr_handle = dev->intr_handle;
4213 if (!intr_handle->intr_vec) {
4214 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4218 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4219 vec = intr_handle->intr_vec[qid];
4220 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4221 if (rc && rc != -EEXIST) {
4223 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4224 port_id, qid, op, epfd, vec);
4232 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4234 struct rte_intr_handle *intr_handle;
4235 struct rte_eth_dev *dev;
4236 unsigned int efd_idx;
4240 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4242 dev = &rte_eth_devices[port_id];
4244 if (queue_id >= dev->data->nb_rx_queues) {
4245 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4249 if (!dev->intr_handle) {
4250 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4254 intr_handle = dev->intr_handle;
4255 if (!intr_handle->intr_vec) {
4256 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4260 vec = intr_handle->intr_vec[queue_id];
4261 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4262 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4263 fd = intr_handle->efds[efd_idx];
4269 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4270 const char *ring_name)
4272 return snprintf(name, len, "eth_p%d_q%d_%s",
4273 port_id, queue_id, ring_name);
4276 const struct rte_memzone *
4277 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4278 uint16_t queue_id, size_t size, unsigned align,
4281 char z_name[RTE_MEMZONE_NAMESIZE];
4282 const struct rte_memzone *mz;
4285 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4286 queue_id, ring_name);
4287 if (rc >= RTE_MEMZONE_NAMESIZE) {
4288 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4289 rte_errno = ENAMETOOLONG;
4293 mz = rte_memzone_lookup(z_name);
4295 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4297 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4299 "memzone %s does not justify the requested attributes\n",
4307 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4308 RTE_MEMZONE_IOVA_CONTIG, align);
4312 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4315 char z_name[RTE_MEMZONE_NAMESIZE];
4316 const struct rte_memzone *mz;
4319 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4320 queue_id, ring_name);
4321 if (rc >= RTE_MEMZONE_NAMESIZE) {
4322 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4323 return -ENAMETOOLONG;
4326 mz = rte_memzone_lookup(z_name);
4328 rc = rte_memzone_free(mz);
4336 rte_eth_dev_create(struct rte_device *device, const char *name,
4337 size_t priv_data_size,
4338 ethdev_bus_specific_init ethdev_bus_specific_init,
4339 void *bus_init_params,
4340 ethdev_init_t ethdev_init, void *init_params)
4342 struct rte_eth_dev *ethdev;
4345 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4347 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4348 ethdev = rte_eth_dev_allocate(name);
4352 if (priv_data_size) {
4353 ethdev->data->dev_private = rte_zmalloc_socket(
4354 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4357 if (!ethdev->data->dev_private) {
4359 "failed to allocate private data\n");
4365 ethdev = rte_eth_dev_attach_secondary(name);
4368 "secondary process attach failed, ethdev doesn't exist\n");
4373 ethdev->device = device;
4375 if (ethdev_bus_specific_init) {
4376 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4379 "ethdev bus specific initialisation failed\n");
4384 retval = ethdev_init(ethdev, init_params);
4386 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4390 rte_eth_dev_probing_finish(ethdev);
4395 rte_eth_dev_release_port(ethdev);
4400 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4401 ethdev_uninit_t ethdev_uninit)
4405 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4409 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4411 ret = ethdev_uninit(ethdev);
4415 return rte_eth_dev_release_port(ethdev);
4419 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4420 int epfd, int op, void *data)
4423 struct rte_eth_dev *dev;
4424 struct rte_intr_handle *intr_handle;
4427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4429 dev = &rte_eth_devices[port_id];
4430 if (queue_id >= dev->data->nb_rx_queues) {
4431 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4435 if (!dev->intr_handle) {
4436 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4440 intr_handle = dev->intr_handle;
4441 if (!intr_handle->intr_vec) {
4442 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4446 vec = intr_handle->intr_vec[queue_id];
4447 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4448 if (rc && rc != -EEXIST) {
4450 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4451 port_id, queue_id, op, epfd, vec);
4459 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4462 struct rte_eth_dev *dev;
4464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4466 dev = &rte_eth_devices[port_id];
4468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4469 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4474 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4477 struct rte_eth_dev *dev;
4479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4481 dev = &rte_eth_devices[port_id];
4483 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4484 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4490 rte_eth_dev_filter_supported(uint16_t port_id,
4491 enum rte_filter_type filter_type)
4493 struct rte_eth_dev *dev;
4495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4497 dev = &rte_eth_devices[port_id];
4498 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4499 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4500 RTE_ETH_FILTER_NOP, NULL);
4504 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4505 enum rte_filter_op filter_op, void *arg)
4507 struct rte_eth_dev *dev;
4509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4511 dev = &rte_eth_devices[port_id];
4512 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4513 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4517 const struct rte_eth_rxtx_callback *
4518 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4519 rte_rx_callback_fn fn, void *user_param)
4521 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4522 rte_errno = ENOTSUP;
4525 struct rte_eth_dev *dev;
4527 /* check input parameters */
4528 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4529 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4533 dev = &rte_eth_devices[port_id];
4534 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4538 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4546 cb->param = user_param;
4548 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4549 /* Add the callbacks in fifo order. */
4550 struct rte_eth_rxtx_callback *tail =
4551 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4554 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4561 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4566 const struct rte_eth_rxtx_callback *
4567 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4568 rte_rx_callback_fn fn, void *user_param)
4570 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4571 rte_errno = ENOTSUP;
4574 /* check input parameters */
4575 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4576 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4581 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4589 cb->param = user_param;
4591 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4592 /* Add the callbacks at first position */
4593 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4595 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4596 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4601 const struct rte_eth_rxtx_callback *
4602 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4603 rte_tx_callback_fn fn, void *user_param)
4605 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4606 rte_errno = ENOTSUP;
4609 struct rte_eth_dev *dev;
4611 /* check input parameters */
4612 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4613 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4618 dev = &rte_eth_devices[port_id];
4619 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4624 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4632 cb->param = user_param;
4634 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4635 /* Add the callbacks in fifo order. */
4636 struct rte_eth_rxtx_callback *tail =
4637 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4640 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4647 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4653 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4654 const struct rte_eth_rxtx_callback *user_cb)
4656 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4659 /* Check input parameters. */
4660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4661 if (user_cb == NULL ||
4662 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4665 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4666 struct rte_eth_rxtx_callback *cb;
4667 struct rte_eth_rxtx_callback **prev_cb;
4670 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4671 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4672 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4674 if (cb == user_cb) {
4675 /* Remove the user cb from the callback list. */
4676 *prev_cb = cb->next;
4681 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4687 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4688 const struct rte_eth_rxtx_callback *user_cb)
4690 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4693 /* Check input parameters. */
4694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4695 if (user_cb == NULL ||
4696 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4699 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4701 struct rte_eth_rxtx_callback *cb;
4702 struct rte_eth_rxtx_callback **prev_cb;
4704 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4705 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4706 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4708 if (cb == user_cb) {
4709 /* Remove the user cb from the callback list. */
4710 *prev_cb = cb->next;
4715 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4721 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4722 struct rte_eth_rxq_info *qinfo)
4724 struct rte_eth_dev *dev;
4726 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4731 dev = &rte_eth_devices[port_id];
4732 if (queue_id >= dev->data->nb_rx_queues) {
4733 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4737 if (dev->data->rx_queues == NULL ||
4738 dev->data->rx_queues[queue_id] == NULL) {
4740 "Rx queue %"PRIu16" of device with port_id=%"
4741 PRIu16" has not been setup\n",
4746 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4747 RTE_ETHDEV_LOG(INFO,
4748 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4755 memset(qinfo, 0, sizeof(*qinfo));
4756 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4761 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4762 struct rte_eth_txq_info *qinfo)
4764 struct rte_eth_dev *dev;
4766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4771 dev = &rte_eth_devices[port_id];
4772 if (queue_id >= dev->data->nb_tx_queues) {
4773 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4777 if (dev->data->tx_queues == NULL ||
4778 dev->data->tx_queues[queue_id] == NULL) {
4780 "Tx queue %"PRIu16" of device with port_id=%"
4781 PRIu16" has not been setup\n",
4786 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4787 RTE_ETHDEV_LOG(INFO,
4788 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4795 memset(qinfo, 0, sizeof(*qinfo));
4796 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4802 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4803 struct rte_eth_burst_mode *mode)
4805 struct rte_eth_dev *dev;
4807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4812 dev = &rte_eth_devices[port_id];
4814 if (queue_id >= dev->data->nb_rx_queues) {
4815 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4820 memset(mode, 0, sizeof(*mode));
4821 return eth_err(port_id,
4822 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4826 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4827 struct rte_eth_burst_mode *mode)
4829 struct rte_eth_dev *dev;
4831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4836 dev = &rte_eth_devices[port_id];
4838 if (queue_id >= dev->data->nb_tx_queues) {
4839 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4844 memset(mode, 0, sizeof(*mode));
4845 return eth_err(port_id,
4846 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4850 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4851 struct rte_ether_addr *mc_addr_set,
4852 uint32_t nb_mc_addr)
4854 struct rte_eth_dev *dev;
4856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4858 dev = &rte_eth_devices[port_id];
4859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4860 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4861 mc_addr_set, nb_mc_addr));
4865 rte_eth_timesync_enable(uint16_t port_id)
4867 struct rte_eth_dev *dev;
4869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4870 dev = &rte_eth_devices[port_id];
4872 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4873 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4877 rte_eth_timesync_disable(uint16_t port_id)
4879 struct rte_eth_dev *dev;
4881 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4882 dev = &rte_eth_devices[port_id];
4884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4885 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4889 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4892 struct rte_eth_dev *dev;
4894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4895 dev = &rte_eth_devices[port_id];
4897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4898 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4899 (dev, timestamp, flags));
4903 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4904 struct timespec *timestamp)
4906 struct rte_eth_dev *dev;
4908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4909 dev = &rte_eth_devices[port_id];
4911 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4912 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4917 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4919 struct rte_eth_dev *dev;
4921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4922 dev = &rte_eth_devices[port_id];
4924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4925 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4930 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4932 struct rte_eth_dev *dev;
4934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4935 dev = &rte_eth_devices[port_id];
4937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4938 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4943 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4945 struct rte_eth_dev *dev;
4947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4948 dev = &rte_eth_devices[port_id];
4950 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4951 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4956 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4958 struct rte_eth_dev *dev;
4960 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4961 dev = &rte_eth_devices[port_id];
4963 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4964 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4968 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4970 struct rte_eth_dev *dev;
4972 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4974 dev = &rte_eth_devices[port_id];
4975 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4976 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4980 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4982 struct rte_eth_dev *dev;
4984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4986 dev = &rte_eth_devices[port_id];
4987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4988 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4992 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4994 struct rte_eth_dev *dev;
4996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4998 dev = &rte_eth_devices[port_id];
4999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5000 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5004 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5006 struct rte_eth_dev *dev;
5008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5010 dev = &rte_eth_devices[port_id];
5011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5012 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5016 rte_eth_dev_get_module_info(uint16_t port_id,
5017 struct rte_eth_dev_module_info *modinfo)
5019 struct rte_eth_dev *dev;
5021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5023 dev = &rte_eth_devices[port_id];
5024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5025 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5029 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5030 struct rte_dev_eeprom_info *info)
5032 struct rte_eth_dev *dev;
5034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5036 dev = &rte_eth_devices[port_id];
5037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5038 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5042 rte_eth_dev_get_dcb_info(uint16_t port_id,
5043 struct rte_eth_dcb_info *dcb_info)
5045 struct rte_eth_dev *dev;
5047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5049 dev = &rte_eth_devices[port_id];
5050 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5053 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5057 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5058 struct rte_eth_l2_tunnel_conf *l2_tunnel)
5060 struct rte_eth_dev *dev;
5062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5063 if (l2_tunnel == NULL) {
5064 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5068 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5069 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5073 dev = &rte_eth_devices[port_id];
5074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5076 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5081 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5082 struct rte_eth_l2_tunnel_conf *l2_tunnel,
5086 struct rte_eth_dev *dev;
5088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5090 if (l2_tunnel == NULL) {
5091 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5095 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5096 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5101 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5105 dev = &rte_eth_devices[port_id];
5106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5108 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5109 l2_tunnel, mask, en));
5113 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5114 const struct rte_eth_desc_lim *desc_lim)
5116 if (desc_lim->nb_align != 0)
5117 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5119 if (desc_lim->nb_max != 0)
5120 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5122 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5126 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5127 uint16_t *nb_rx_desc,
5128 uint16_t *nb_tx_desc)
5130 struct rte_eth_dev_info dev_info;
5133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5135 ret = rte_eth_dev_info_get(port_id, &dev_info);
5139 if (nb_rx_desc != NULL)
5140 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5142 if (nb_tx_desc != NULL)
5143 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5149 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5150 struct rte_eth_hairpin_cap *cap)
5152 struct rte_eth_dev *dev;
5154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5156 dev = &rte_eth_devices[port_id];
5157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5158 memset(cap, 0, sizeof(*cap));
5159 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5163 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5165 if (dev->data->rx_queue_state[queue_id] ==
5166 RTE_ETH_QUEUE_STATE_HAIRPIN)
5172 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5174 if (dev->data->tx_queue_state[queue_id] ==
5175 RTE_ETH_QUEUE_STATE_HAIRPIN)
5181 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5183 struct rte_eth_dev *dev;
5185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5190 dev = &rte_eth_devices[port_id];
5192 if (*dev->dev_ops->pool_ops_supported == NULL)
5193 return 1; /* all pools are supported */
5195 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5199 * A set of values to describe the possible states of a switch domain.
5201 enum rte_eth_switch_domain_state {
5202 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5203 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5207 * Array of switch domains available for allocation. Array is sized to
5208 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5209 * ethdev ports in a single process.
5211 static struct rte_eth_dev_switch {
5212 enum rte_eth_switch_domain_state state;
5213 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5216 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5220 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5222 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5223 if (rte_eth_switch_domains[i].state ==
5224 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5225 rte_eth_switch_domains[i].state =
5226 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5236 rte_eth_switch_domain_free(uint16_t domain_id)
5238 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5239 domain_id >= RTE_MAX_ETHPORTS)
5242 if (rte_eth_switch_domains[domain_id].state !=
5243 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5246 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5252 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5255 struct rte_kvargs_pair *pair;
5258 arglist->str = strdup(str_in);
5259 if (arglist->str == NULL)
5262 letter = arglist->str;
5265 pair = &arglist->pairs[0];
5268 case 0: /* Initial */
5271 else if (*letter == '\0')
5278 case 1: /* Parsing key */
5279 if (*letter == '=') {
5281 pair->value = letter + 1;
5283 } else if (*letter == ',' || *letter == '\0')
5288 case 2: /* Parsing value */
5291 else if (*letter == ',') {
5294 pair = &arglist->pairs[arglist->count];
5296 } else if (*letter == '\0') {
5299 pair = &arglist->pairs[arglist->count];
5304 case 3: /* Parsing list */
5307 else if (*letter == '\0')
5316 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5318 struct rte_kvargs args;
5319 struct rte_kvargs_pair *pair;
5323 memset(eth_da, 0, sizeof(*eth_da));
5325 result = rte_eth_devargs_tokenise(&args, dargs);
5329 for (i = 0; i < args.count; i++) {
5330 pair = &args.pairs[i];
5331 if (strcmp("representor", pair->key) == 0) {
5332 result = rte_eth_devargs_parse_list(pair->value,
5333 rte_eth_devargs_parse_representor_ports,
5348 handle_port_list(const char *cmd __rte_unused,
5349 const char *params __rte_unused,
5350 struct rte_tel_data *d)
5354 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5355 RTE_ETH_FOREACH_DEV(port_id)
5356 rte_tel_data_add_array_int(d, port_id);
5361 add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5362 const char *stat_name)
5365 struct rte_tel_data *q_data = rte_tel_data_alloc();
5366 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5367 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5368 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5369 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5372 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5375 handle_port_stats(const char *cmd __rte_unused,
5377 struct rte_tel_data *d)
5379 struct rte_eth_stats stats;
5382 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5385 port_id = atoi(params);
5386 if (!rte_eth_dev_is_valid_port(port_id))
5389 ret = rte_eth_stats_get(port_id, &stats);
5393 rte_tel_data_start_dict(d);
5394 ADD_DICT_STAT(stats, ipackets);
5395 ADD_DICT_STAT(stats, opackets);
5396 ADD_DICT_STAT(stats, ibytes);
5397 ADD_DICT_STAT(stats, obytes);
5398 ADD_DICT_STAT(stats, imissed);
5399 ADD_DICT_STAT(stats, ierrors);
5400 ADD_DICT_STAT(stats, oerrors);
5401 ADD_DICT_STAT(stats, rx_nombuf);
5402 add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5403 add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5404 add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5405 add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5406 add_port_queue_stats(d, stats.q_errors, "q_errors");
5412 handle_port_xstats(const char *cmd __rte_unused,
5414 struct rte_tel_data *d)
5416 struct rte_eth_xstat *eth_xstats;
5417 struct rte_eth_xstat_name *xstat_names;
5418 int port_id, num_xstats;
5422 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5425 port_id = strtoul(params, &end_param, 0);
5426 if (*end_param != '\0')
5427 RTE_ETHDEV_LOG(NOTICE,
5428 "Extra parameters passed to ethdev telemetry command, ignoring");
5429 if (!rte_eth_dev_is_valid_port(port_id))
5432 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5436 /* use one malloc for both names and stats */
5437 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5438 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5439 if (eth_xstats == NULL)
5441 xstat_names = (void *)ð_xstats[num_xstats];
5443 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5444 if (ret < 0 || ret > num_xstats) {
5449 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5450 if (ret < 0 || ret > num_xstats) {
5455 rte_tel_data_start_dict(d);
5456 for (i = 0; i < num_xstats; i++)
5457 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5458 eth_xstats[i].value);
5463 handle_port_link_status(const char *cmd __rte_unused,
5465 struct rte_tel_data *d)
5467 static const char *status_str = "status";
5469 struct rte_eth_link link;
5472 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5475 port_id = strtoul(params, &end_param, 0);
5476 if (*end_param != '\0')
5477 RTE_ETHDEV_LOG(NOTICE,
5478 "Extra parameters passed to ethdev telemetry command, ignoring");
5479 if (!rte_eth_dev_is_valid_port(port_id))
5482 ret = rte_eth_link_get(port_id, &link);
5486 rte_tel_data_start_dict(d);
5487 if (!link.link_status) {
5488 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5491 rte_tel_data_add_dict_string(d, status_str, "UP");
5492 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5493 rte_tel_data_add_dict_string(d, "duplex",
5494 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5495 "full-duplex" : "half-duplex");
5499 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5501 RTE_INIT(ethdev_init_telemetry)
5503 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5504 "Returns list of available ethdev ports. Takes no parameters");
5505 rte_telemetry_register_cmd("/ethdev/stats", handle_port_stats,
5506 "Returns the common stats for a port. Parameters: int port_id");
5507 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5508 "Returns the extended stats for a port. Parameters: int port_id");
5509 rte_telemetry_register_cmd("/ethdev/link_status",
5510 handle_port_link_status,
5511 "Returns the link status for a port. Parameters: int port_id");