1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 is_allocated(const struct rte_eth_dev *ethdev)
232 return ethdev->data->name[0] != '\0';
235 static struct rte_eth_dev *
236 _rte_eth_dev_allocated(const char *name)
240 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
241 if (rte_eth_devices[i].data != NULL &&
242 strcmp(rte_eth_devices[i].data->name, name) == 0)
243 return &rte_eth_devices[i];
249 rte_eth_dev_allocated(const char *name)
251 struct rte_eth_dev *ethdev;
253 rte_eth_dev_shared_data_prepare();
255 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
257 ethdev = _rte_eth_dev_allocated(name);
259 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
265 rte_eth_dev_find_free_port(void)
269 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
270 /* Using shared name field to find a free port. */
271 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
272 RTE_ASSERT(rte_eth_devices[i].state ==
277 return RTE_MAX_ETHPORTS;
280 static struct rte_eth_dev *
281 eth_dev_get(uint16_t port_id)
283 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
285 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
287 eth_dev_last_created_port = port_id;
293 rte_eth_dev_allocate(const char *name)
296 struct rte_eth_dev *eth_dev = NULL;
298 rte_eth_dev_shared_data_prepare();
300 /* Synchronize port creation between primary and secondary threads. */
301 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
303 if (_rte_eth_dev_allocated(name) != NULL) {
305 "Ethernet device with name %s already allocated\n",
310 port_id = rte_eth_dev_find_free_port();
311 if (port_id == RTE_MAX_ETHPORTS) {
313 "Reached maximum number of Ethernet ports\n");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "Device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
371 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
373 eth_dev->state = RTE_ETH_DEV_UNUSED;
375 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
377 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id)
402 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
404 while (port_id < RTE_MAX_ETHPORTS &&
405 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
406 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
407 rte_eth_devices[port_id].data->owner.id != owner_id))
410 if (port_id >= RTE_MAX_ETHPORTS)
411 return RTE_MAX_ETHPORTS;
416 int __rte_experimental
417 rte_eth_dev_owner_new(uint64_t *owner_id)
419 rte_eth_dev_shared_data_prepare();
421 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
423 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
425 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
430 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
431 const struct rte_eth_dev_owner *new_owner)
433 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
434 struct rte_eth_dev_owner *port_owner;
437 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
438 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
443 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
444 !rte_eth_is_valid_owner_id(old_owner_id)) {
446 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
447 old_owner_id, new_owner->id);
451 port_owner = &rte_eth_devices[port_id].data->owner;
452 if (port_owner->id != old_owner_id) {
454 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
455 port_id, port_owner->name, port_owner->id);
459 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
461 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
462 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
465 port_owner->id = new_owner->id;
467 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
468 port_id, new_owner->name, new_owner->id);
473 int __rte_experimental
474 rte_eth_dev_owner_set(const uint16_t port_id,
475 const struct rte_eth_dev_owner *owner)
479 rte_eth_dev_shared_data_prepare();
481 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
483 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
485 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
489 int __rte_experimental
490 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
492 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
493 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
496 rte_eth_dev_shared_data_prepare();
498 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
500 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
502 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
506 void __rte_experimental
507 rte_eth_dev_owner_delete(const uint64_t owner_id)
511 rte_eth_dev_shared_data_prepare();
513 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
515 if (rte_eth_is_valid_owner_id(owner_id)) {
516 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
517 if (rte_eth_devices[port_id].data->owner.id == owner_id)
518 memset(&rte_eth_devices[port_id].data->owner, 0,
519 sizeof(struct rte_eth_dev_owner));
520 RTE_ETHDEV_LOG(NOTICE,
521 "All port owners owned by %016"PRIx64" identifier have removed\n",
525 "Invalid owner id=%016"PRIx64"\n",
529 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
532 int __rte_experimental
533 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
536 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
538 rte_eth_dev_shared_data_prepare();
540 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
542 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
543 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
547 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
550 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
555 rte_eth_dev_socket_id(uint16_t port_id)
557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
558 return rte_eth_devices[port_id].data->numa_node;
562 rte_eth_dev_get_sec_ctx(uint16_t port_id)
564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
565 return rte_eth_devices[port_id].security_ctx;
569 rte_eth_dev_count(void)
571 return rte_eth_dev_count_avail();
575 rte_eth_dev_count_avail(void)
582 RTE_ETH_FOREACH_DEV(p)
588 uint16_t __rte_experimental
589 rte_eth_dev_count_total(void)
591 uint16_t port, count = 0;
593 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
594 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
601 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
608 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
612 /* shouldn't check 'rte_eth_devices[i].data',
613 * because it might be overwritten by VDEV PMD */
614 tmp = rte_eth_dev_shared_data->data[port_id].name;
620 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
625 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
629 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
630 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
631 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
641 eth_err(uint16_t port_id, int ret)
645 if (rte_eth_dev_is_removed(port_id))
650 /* attach the new device, then store port_id of the device */
652 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
654 int current = rte_eth_dev_count_total();
655 struct rte_devargs da;
658 memset(&da, 0, sizeof(da));
660 if ((devargs == NULL) || (port_id == NULL)) {
666 if (rte_devargs_parse(&da, devargs))
669 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
673 /* no point looking at the port count if no port exists */
674 if (!rte_eth_dev_count_total()) {
675 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
680 /* if nothing happened, there is a bug here, since some driver told us
681 * it did attach a device, but did not create a port.
682 * FIXME: race condition in case of plug-out of another device
684 if (current == rte_eth_dev_count_total()) {
689 *port_id = eth_dev_last_created_port;
697 /* detach the device, then store the name of the device */
699 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
701 struct rte_device *dev;
706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
708 dev_flags = rte_eth_devices[port_id].data->dev_flags;
709 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
711 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
715 dev = rte_eth_devices[port_id].device;
719 bus = rte_bus_find_by_device(dev);
723 ret = rte_eal_hotplug_remove(bus->name, dev->name);
727 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
732 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
734 uint16_t old_nb_queues = dev->data->nb_rx_queues;
738 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
739 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
740 sizeof(dev->data->rx_queues[0]) * nb_queues,
741 RTE_CACHE_LINE_SIZE);
742 if (dev->data->rx_queues == NULL) {
743 dev->data->nb_rx_queues = 0;
746 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
749 rxq = dev->data->rx_queues;
751 for (i = nb_queues; i < old_nb_queues; i++)
752 (*dev->dev_ops->rx_queue_release)(rxq[i]);
753 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
754 RTE_CACHE_LINE_SIZE);
757 if (nb_queues > old_nb_queues) {
758 uint16_t new_qs = nb_queues - old_nb_queues;
760 memset(rxq + old_nb_queues, 0,
761 sizeof(rxq[0]) * new_qs);
764 dev->data->rx_queues = rxq;
766 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
769 rxq = dev->data->rx_queues;
771 for (i = nb_queues; i < old_nb_queues; i++)
772 (*dev->dev_ops->rx_queue_release)(rxq[i]);
774 rte_free(dev->data->rx_queues);
775 dev->data->rx_queues = NULL;
777 dev->data->nb_rx_queues = nb_queues;
782 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
784 struct rte_eth_dev *dev;
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 dev = &rte_eth_devices[port_id];
789 if (!dev->data->dev_started) {
791 "Port %u must be started before start any queue\n",
796 if (rx_queue_id >= dev->data->nb_rx_queues) {
797 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
803 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
805 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
806 rx_queue_id, port_id);
810 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
816 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
818 struct rte_eth_dev *dev;
820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
822 dev = &rte_eth_devices[port_id];
823 if (rx_queue_id >= dev->data->nb_rx_queues) {
824 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
830 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
832 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
833 rx_queue_id, port_id);
837 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
842 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
844 struct rte_eth_dev *dev;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 dev = &rte_eth_devices[port_id];
849 if (!dev->data->dev_started) {
851 "Port %u must be started before start any queue\n",
856 if (tx_queue_id >= dev->data->nb_tx_queues) {
857 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
863 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
865 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
866 tx_queue_id, port_id);
870 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
874 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
876 struct rte_eth_dev *dev;
878 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
880 dev = &rte_eth_devices[port_id];
881 if (tx_queue_id >= dev->data->nb_tx_queues) {
882 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
888 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
890 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
891 tx_queue_id, port_id);
895 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
900 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
902 uint16_t old_nb_queues = dev->data->nb_tx_queues;
906 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
907 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
908 sizeof(dev->data->tx_queues[0]) * nb_queues,
909 RTE_CACHE_LINE_SIZE);
910 if (dev->data->tx_queues == NULL) {
911 dev->data->nb_tx_queues = 0;
914 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
917 txq = dev->data->tx_queues;
919 for (i = nb_queues; i < old_nb_queues; i++)
920 (*dev->dev_ops->tx_queue_release)(txq[i]);
921 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
922 RTE_CACHE_LINE_SIZE);
925 if (nb_queues > old_nb_queues) {
926 uint16_t new_qs = nb_queues - old_nb_queues;
928 memset(txq + old_nb_queues, 0,
929 sizeof(txq[0]) * new_qs);
932 dev->data->tx_queues = txq;
934 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
937 txq = dev->data->tx_queues;
939 for (i = nb_queues; i < old_nb_queues; i++)
940 (*dev->dev_ops->tx_queue_release)(txq[i]);
942 rte_free(dev->data->tx_queues);
943 dev->data->tx_queues = NULL;
945 dev->data->nb_tx_queues = nb_queues;
950 rte_eth_speed_bitflag(uint32_t speed, int duplex)
953 case ETH_SPEED_NUM_10M:
954 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
955 case ETH_SPEED_NUM_100M:
956 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
957 case ETH_SPEED_NUM_1G:
958 return ETH_LINK_SPEED_1G;
959 case ETH_SPEED_NUM_2_5G:
960 return ETH_LINK_SPEED_2_5G;
961 case ETH_SPEED_NUM_5G:
962 return ETH_LINK_SPEED_5G;
963 case ETH_SPEED_NUM_10G:
964 return ETH_LINK_SPEED_10G;
965 case ETH_SPEED_NUM_20G:
966 return ETH_LINK_SPEED_20G;
967 case ETH_SPEED_NUM_25G:
968 return ETH_LINK_SPEED_25G;
969 case ETH_SPEED_NUM_40G:
970 return ETH_LINK_SPEED_40G;
971 case ETH_SPEED_NUM_50G:
972 return ETH_LINK_SPEED_50G;
973 case ETH_SPEED_NUM_56G:
974 return ETH_LINK_SPEED_56G;
975 case ETH_SPEED_NUM_100G:
976 return ETH_LINK_SPEED_100G;
982 const char * __rte_experimental
983 rte_eth_dev_rx_offload_name(uint64_t offload)
985 const char *name = "UNKNOWN";
988 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
989 if (offload == rte_rx_offload_names[i].offload) {
990 name = rte_rx_offload_names[i].name;
998 const char * __rte_experimental
999 rte_eth_dev_tx_offload_name(uint64_t offload)
1001 const char *name = "UNKNOWN";
1004 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1005 if (offload == rte_tx_offload_names[i].offload) {
1006 name = rte_tx_offload_names[i].name;
1015 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1016 const struct rte_eth_conf *dev_conf)
1018 struct rte_eth_dev *dev;
1019 struct rte_eth_dev_info dev_info;
1020 struct rte_eth_conf local_conf = *dev_conf;
1023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1025 dev = &rte_eth_devices[port_id];
1027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1030 rte_eth_dev_info_get(port_id, &dev_info);
1032 /* If number of queues specified by application for both Rx and Tx is
1033 * zero, use driver preferred values. This cannot be done individually
1034 * as it is valid for either Tx or Rx (but not both) to be zero.
1035 * If driver does not provide any preferred valued, fall back on
1038 if (nb_rx_q == 0 && nb_tx_q == 0) {
1039 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1041 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1042 nb_tx_q = dev_info.default_txportconf.nb_queues;
1044 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1047 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1049 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1050 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1054 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1056 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1057 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1061 if (dev->data->dev_started) {
1063 "Port %u must be stopped to allow configuration\n",
1068 /* Copy the dev_conf parameter into the dev structure */
1069 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1072 * Check that the numbers of RX and TX queues are not greater
1073 * than the maximum number of RX and TX queues supported by the
1074 * configured device.
1076 if (nb_rx_q > dev_info.max_rx_queues) {
1077 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1078 port_id, nb_rx_q, dev_info.max_rx_queues);
1082 if (nb_tx_q > dev_info.max_tx_queues) {
1083 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1084 port_id, nb_tx_q, dev_info.max_tx_queues);
1088 /* Check that the device supports requested interrupts */
1089 if ((dev_conf->intr_conf.lsc == 1) &&
1090 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1091 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1092 dev->device->driver->name);
1095 if ((dev_conf->intr_conf.rmv == 1) &&
1096 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1097 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1098 dev->device->driver->name);
1103 * If jumbo frames are enabled, check that the maximum RX packet
1104 * length is supported by the configured device.
1106 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1107 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1109 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1110 port_id, dev_conf->rxmode.max_rx_pkt_len,
1111 dev_info.max_rx_pktlen);
1113 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1115 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1116 port_id, dev_conf->rxmode.max_rx_pkt_len,
1117 (unsigned)ETHER_MIN_LEN);
1121 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1122 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1123 /* Use default value */
1124 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1128 /* Any requested offloading must be within its device capabilities */
1129 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1130 local_conf.rxmode.offloads) {
1132 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1133 "capabilities 0x%"PRIx64" in %s()\n",
1134 port_id, local_conf.rxmode.offloads,
1135 dev_info.rx_offload_capa,
1139 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1140 local_conf.txmode.offloads) {
1142 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1143 "capabilities 0x%"PRIx64" in %s()\n",
1144 port_id, local_conf.txmode.offloads,
1145 dev_info.tx_offload_capa,
1150 if ((local_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP) &&
1151 (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
1153 "Port id=%u not allowed to set both CRC STRIP and KEEP CRC offload flags\n",
1158 /* Check that device supports requested rss hash functions. */
1159 if ((dev_info.flow_type_rss_offloads |
1160 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1161 dev_info.flow_type_rss_offloads) {
1163 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1164 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1165 dev_info.flow_type_rss_offloads);
1170 * Setup new number of RX/TX queues and reconfigure device.
1172 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1175 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1180 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1183 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1185 rte_eth_dev_rx_queue_config(dev, 0);
1189 diag = (*dev->dev_ops->dev_configure)(dev);
1191 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1193 rte_eth_dev_rx_queue_config(dev, 0);
1194 rte_eth_dev_tx_queue_config(dev, 0);
1195 return eth_err(port_id, diag);
1198 /* Initialize Rx profiling if enabled at compilation time. */
1199 diag = __rte_eth_dev_profile_init(port_id, dev);
1201 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1203 rte_eth_dev_rx_queue_config(dev, 0);
1204 rte_eth_dev_tx_queue_config(dev, 0);
1205 return eth_err(port_id, diag);
1212 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1214 if (dev->data->dev_started) {
1215 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1216 dev->data->port_id);
1220 rte_eth_dev_rx_queue_config(dev, 0);
1221 rte_eth_dev_tx_queue_config(dev, 0);
1223 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1227 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1228 struct rte_eth_dev_info *dev_info)
1230 struct ether_addr *addr;
1235 /* replay MAC address configuration including default MAC */
1236 addr = &dev->data->mac_addrs[0];
1237 if (*dev->dev_ops->mac_addr_set != NULL)
1238 (*dev->dev_ops->mac_addr_set)(dev, addr);
1239 else if (*dev->dev_ops->mac_addr_add != NULL)
1240 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1242 if (*dev->dev_ops->mac_addr_add != NULL) {
1243 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1244 addr = &dev->data->mac_addrs[i];
1246 /* skip zero address */
1247 if (is_zero_ether_addr(addr))
1251 pool_mask = dev->data->mac_pool_sel[i];
1254 if (pool_mask & 1ULL)
1255 (*dev->dev_ops->mac_addr_add)(dev,
1259 } while (pool_mask);
1265 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1266 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1268 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1269 rte_eth_dev_mac_restore(dev, dev_info);
1271 /* replay promiscuous configuration */
1272 if (rte_eth_promiscuous_get(port_id) == 1)
1273 rte_eth_promiscuous_enable(port_id);
1274 else if (rte_eth_promiscuous_get(port_id) == 0)
1275 rte_eth_promiscuous_disable(port_id);
1277 /* replay all multicast configuration */
1278 if (rte_eth_allmulticast_get(port_id) == 1)
1279 rte_eth_allmulticast_enable(port_id);
1280 else if (rte_eth_allmulticast_get(port_id) == 0)
1281 rte_eth_allmulticast_disable(port_id);
1285 rte_eth_dev_start(uint16_t port_id)
1287 struct rte_eth_dev *dev;
1288 struct rte_eth_dev_info dev_info;
1291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1293 dev = &rte_eth_devices[port_id];
1295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1297 if (dev->data->dev_started != 0) {
1298 RTE_ETHDEV_LOG(INFO,
1299 "Device with port_id=%"PRIu16" already started\n",
1304 rte_eth_dev_info_get(port_id, &dev_info);
1306 /* Lets restore MAC now if device does not support live change */
1307 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1308 rte_eth_dev_mac_restore(dev, &dev_info);
1310 diag = (*dev->dev_ops->dev_start)(dev);
1312 dev->data->dev_started = 1;
1314 return eth_err(port_id, diag);
1316 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1318 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1320 (*dev->dev_ops->link_update)(dev, 0);
1326 rte_eth_dev_stop(uint16_t port_id)
1328 struct rte_eth_dev *dev;
1330 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1331 dev = &rte_eth_devices[port_id];
1333 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1335 if (dev->data->dev_started == 0) {
1336 RTE_ETHDEV_LOG(INFO,
1337 "Device with port_id=%"PRIu16" already stopped\n",
1342 dev->data->dev_started = 0;
1343 (*dev->dev_ops->dev_stop)(dev);
1347 rte_eth_dev_set_link_up(uint16_t port_id)
1349 struct rte_eth_dev *dev;
1351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1353 dev = &rte_eth_devices[port_id];
1355 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1356 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1360 rte_eth_dev_set_link_down(uint16_t port_id)
1362 struct rte_eth_dev *dev;
1364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1366 dev = &rte_eth_devices[port_id];
1368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1369 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1373 rte_eth_dev_close(uint16_t port_id)
1375 struct rte_eth_dev *dev;
1377 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1378 dev = &rte_eth_devices[port_id];
1380 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1381 dev->data->dev_started = 0;
1382 (*dev->dev_ops->dev_close)(dev);
1384 dev->data->nb_rx_queues = 0;
1385 rte_free(dev->data->rx_queues);
1386 dev->data->rx_queues = NULL;
1387 dev->data->nb_tx_queues = 0;
1388 rte_free(dev->data->tx_queues);
1389 dev->data->tx_queues = NULL;
1393 rte_eth_dev_reset(uint16_t port_id)
1395 struct rte_eth_dev *dev;
1398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1399 dev = &rte_eth_devices[port_id];
1401 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1403 rte_eth_dev_stop(port_id);
1404 ret = dev->dev_ops->dev_reset(dev);
1406 return eth_err(port_id, ret);
1409 int __rte_experimental
1410 rte_eth_dev_is_removed(uint16_t port_id)
1412 struct rte_eth_dev *dev;
1415 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1417 dev = &rte_eth_devices[port_id];
1419 if (dev->state == RTE_ETH_DEV_REMOVED)
1422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1424 ret = dev->dev_ops->is_removed(dev);
1426 /* Device is physically removed. */
1427 dev->state = RTE_ETH_DEV_REMOVED;
1433 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1434 uint16_t nb_rx_desc, unsigned int socket_id,
1435 const struct rte_eth_rxconf *rx_conf,
1436 struct rte_mempool *mp)
1439 uint32_t mbp_buf_size;
1440 struct rte_eth_dev *dev;
1441 struct rte_eth_dev_info dev_info;
1442 struct rte_eth_rxconf local_conf;
1445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1447 dev = &rte_eth_devices[port_id];
1448 if (rx_queue_id >= dev->data->nb_rx_queues) {
1449 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1454 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1457 * Check the size of the mbuf data buffer.
1458 * This value must be provided in the private data of the memory pool.
1459 * First check that the memory pool has a valid private data.
1461 rte_eth_dev_info_get(port_id, &dev_info);
1462 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1463 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1464 mp->name, (int)mp->private_data_size,
1465 (int)sizeof(struct rte_pktmbuf_pool_private));
1468 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1470 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1472 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1473 mp->name, (int)mbp_buf_size,
1474 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1475 (int)RTE_PKTMBUF_HEADROOM,
1476 (int)dev_info.min_rx_bufsize);
1480 /* Use default specified by driver, if nb_rx_desc is zero */
1481 if (nb_rx_desc == 0) {
1482 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1483 /* If driver default is also zero, fall back on EAL default */
1484 if (nb_rx_desc == 0)
1485 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1488 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1489 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1490 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1493 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1494 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1495 dev_info.rx_desc_lim.nb_min,
1496 dev_info.rx_desc_lim.nb_align);
1500 if (dev->data->dev_started &&
1501 !(dev_info.dev_capa &
1502 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1505 if (dev->data->dev_started &&
1506 (dev->data->rx_queue_state[rx_queue_id] !=
1507 RTE_ETH_QUEUE_STATE_STOPPED))
1510 rxq = dev->data->rx_queues;
1511 if (rxq[rx_queue_id]) {
1512 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1514 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1515 rxq[rx_queue_id] = NULL;
1518 if (rx_conf == NULL)
1519 rx_conf = &dev_info.default_rxconf;
1521 local_conf = *rx_conf;
1524 * If an offloading has already been enabled in
1525 * rte_eth_dev_configure(), it has been enabled on all queues,
1526 * so there is no need to enable it in this queue again.
1527 * The local_conf.offloads input to underlying PMD only carries
1528 * those offloadings which are only enabled on this queue and
1529 * not enabled on all queues.
1531 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1534 * New added offloadings for this queue are those not enabled in
1535 * rte_eth_dev_configure() and they must be per-queue type.
1536 * A pure per-port offloading can't be enabled on a queue while
1537 * disabled on another queue. A pure per-port offloading can't
1538 * be enabled for any queue as new added one if it hasn't been
1539 * enabled in rte_eth_dev_configure().
1541 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1542 local_conf.offloads) {
1544 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1545 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1546 port_id, rx_queue_id, local_conf.offloads,
1547 dev_info.rx_queue_offload_capa,
1552 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1553 socket_id, &local_conf, mp);
1555 if (!dev->data->min_rx_buf_size ||
1556 dev->data->min_rx_buf_size > mbp_buf_size)
1557 dev->data->min_rx_buf_size = mbp_buf_size;
1560 return eth_err(port_id, ret);
1564 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1565 uint16_t nb_tx_desc, unsigned int socket_id,
1566 const struct rte_eth_txconf *tx_conf)
1568 struct rte_eth_dev *dev;
1569 struct rte_eth_dev_info dev_info;
1570 struct rte_eth_txconf local_conf;
1573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1575 dev = &rte_eth_devices[port_id];
1576 if (tx_queue_id >= dev->data->nb_tx_queues) {
1577 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1584 rte_eth_dev_info_get(port_id, &dev_info);
1586 /* Use default specified by driver, if nb_tx_desc is zero */
1587 if (nb_tx_desc == 0) {
1588 nb_tx_desc = dev_info.default_txportconf.ring_size;
1589 /* If driver default is zero, fall back on EAL default */
1590 if (nb_tx_desc == 0)
1591 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1593 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1594 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1595 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1597 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1598 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1599 dev_info.tx_desc_lim.nb_min,
1600 dev_info.tx_desc_lim.nb_align);
1604 if (dev->data->dev_started &&
1605 !(dev_info.dev_capa &
1606 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1609 if (dev->data->dev_started &&
1610 (dev->data->tx_queue_state[tx_queue_id] !=
1611 RTE_ETH_QUEUE_STATE_STOPPED))
1614 txq = dev->data->tx_queues;
1615 if (txq[tx_queue_id]) {
1616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1618 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1619 txq[tx_queue_id] = NULL;
1622 if (tx_conf == NULL)
1623 tx_conf = &dev_info.default_txconf;
1625 local_conf = *tx_conf;
1628 * If an offloading has already been enabled in
1629 * rte_eth_dev_configure(), it has been enabled on all queues,
1630 * so there is no need to enable it in this queue again.
1631 * The local_conf.offloads input to underlying PMD only carries
1632 * those offloadings which are only enabled on this queue and
1633 * not enabled on all queues.
1635 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1638 * New added offloadings for this queue are those not enabled in
1639 * rte_eth_dev_configure() and they must be per-queue type.
1640 * A pure per-port offloading can't be enabled on a queue while
1641 * disabled on another queue. A pure per-port offloading can't
1642 * be enabled for any queue as new added one if it hasn't been
1643 * enabled in rte_eth_dev_configure().
1645 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1646 local_conf.offloads) {
1648 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1649 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1650 port_id, tx_queue_id, local_conf.offloads,
1651 dev_info.tx_queue_offload_capa,
1656 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1657 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1661 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1662 void *userdata __rte_unused)
1666 for (i = 0; i < unsent; i++)
1667 rte_pktmbuf_free(pkts[i]);
1671 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1674 uint64_t *count = userdata;
1677 for (i = 0; i < unsent; i++)
1678 rte_pktmbuf_free(pkts[i]);
1684 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1685 buffer_tx_error_fn cbfn, void *userdata)
1687 buffer->error_callback = cbfn;
1688 buffer->error_userdata = userdata;
1693 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1700 buffer->size = size;
1701 if (buffer->error_callback == NULL) {
1702 ret = rte_eth_tx_buffer_set_err_callback(
1703 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1710 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1712 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1715 /* Validate Input Data. Bail if not valid or not supported. */
1716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1719 /* Call driver to free pending mbufs. */
1720 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1722 return eth_err(port_id, ret);
1726 rte_eth_promiscuous_enable(uint16_t port_id)
1728 struct rte_eth_dev *dev;
1730 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1731 dev = &rte_eth_devices[port_id];
1733 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1734 (*dev->dev_ops->promiscuous_enable)(dev);
1735 dev->data->promiscuous = 1;
1739 rte_eth_promiscuous_disable(uint16_t port_id)
1741 struct rte_eth_dev *dev;
1743 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1744 dev = &rte_eth_devices[port_id];
1746 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1747 dev->data->promiscuous = 0;
1748 (*dev->dev_ops->promiscuous_disable)(dev);
1752 rte_eth_promiscuous_get(uint16_t port_id)
1754 struct rte_eth_dev *dev;
1756 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1758 dev = &rte_eth_devices[port_id];
1759 return dev->data->promiscuous;
1763 rte_eth_allmulticast_enable(uint16_t port_id)
1765 struct rte_eth_dev *dev;
1767 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1768 dev = &rte_eth_devices[port_id];
1770 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1771 (*dev->dev_ops->allmulticast_enable)(dev);
1772 dev->data->all_multicast = 1;
1776 rte_eth_allmulticast_disable(uint16_t port_id)
1778 struct rte_eth_dev *dev;
1780 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1781 dev = &rte_eth_devices[port_id];
1783 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1784 dev->data->all_multicast = 0;
1785 (*dev->dev_ops->allmulticast_disable)(dev);
1789 rte_eth_allmulticast_get(uint16_t port_id)
1791 struct rte_eth_dev *dev;
1793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1795 dev = &rte_eth_devices[port_id];
1796 return dev->data->all_multicast;
1800 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1802 struct rte_eth_dev *dev;
1804 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1805 dev = &rte_eth_devices[port_id];
1807 if (dev->data->dev_conf.intr_conf.lsc &&
1808 dev->data->dev_started)
1809 rte_eth_linkstatus_get(dev, eth_link);
1811 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1812 (*dev->dev_ops->link_update)(dev, 1);
1813 *eth_link = dev->data->dev_link;
1818 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1820 struct rte_eth_dev *dev;
1822 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1823 dev = &rte_eth_devices[port_id];
1825 if (dev->data->dev_conf.intr_conf.lsc &&
1826 dev->data->dev_started)
1827 rte_eth_linkstatus_get(dev, eth_link);
1829 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1830 (*dev->dev_ops->link_update)(dev, 0);
1831 *eth_link = dev->data->dev_link;
1836 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1838 struct rte_eth_dev *dev;
1840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1842 dev = &rte_eth_devices[port_id];
1843 memset(stats, 0, sizeof(*stats));
1845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1846 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1847 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1851 rte_eth_stats_reset(uint16_t port_id)
1853 struct rte_eth_dev *dev;
1855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1856 dev = &rte_eth_devices[port_id];
1858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1859 (*dev->dev_ops->stats_reset)(dev);
1860 dev->data->rx_mbuf_alloc_failed = 0;
1866 get_xstats_basic_count(struct rte_eth_dev *dev)
1868 uint16_t nb_rxqs, nb_txqs;
1871 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1872 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1874 count = RTE_NB_STATS;
1875 count += nb_rxqs * RTE_NB_RXQ_STATS;
1876 count += nb_txqs * RTE_NB_TXQ_STATS;
1882 get_xstats_count(uint16_t port_id)
1884 struct rte_eth_dev *dev;
1887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1888 dev = &rte_eth_devices[port_id];
1889 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1890 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1893 return eth_err(port_id, count);
1895 if (dev->dev_ops->xstats_get_names != NULL) {
1896 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1898 return eth_err(port_id, count);
1903 count += get_xstats_basic_count(dev);
1909 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1912 int cnt_xstats, idx_xstat;
1914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1917 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1922 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1927 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1928 if (cnt_xstats < 0) {
1929 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1933 /* Get id-name lookup table */
1934 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1936 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1937 port_id, xstats_names, cnt_xstats, NULL)) {
1938 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1942 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1943 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1952 /* retrieve basic stats names */
1954 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1955 struct rte_eth_xstat_name *xstats_names)
1957 int cnt_used_entries = 0;
1958 uint32_t idx, id_queue;
1961 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1962 snprintf(xstats_names[cnt_used_entries].name,
1963 sizeof(xstats_names[0].name),
1964 "%s", rte_stats_strings[idx].name);
1967 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1968 for (id_queue = 0; id_queue < num_q; id_queue++) {
1969 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1970 snprintf(xstats_names[cnt_used_entries].name,
1971 sizeof(xstats_names[0].name),
1973 id_queue, rte_rxq_stats_strings[idx].name);
1978 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1979 for (id_queue = 0; id_queue < num_q; id_queue++) {
1980 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1981 snprintf(xstats_names[cnt_used_entries].name,
1982 sizeof(xstats_names[0].name),
1984 id_queue, rte_txq_stats_strings[idx].name);
1988 return cnt_used_entries;
1991 /* retrieve ethdev extended statistics names */
1993 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1994 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1997 struct rte_eth_xstat_name *xstats_names_copy;
1998 unsigned int no_basic_stat_requested = 1;
1999 unsigned int no_ext_stat_requested = 1;
2000 unsigned int expected_entries;
2001 unsigned int basic_count;
2002 struct rte_eth_dev *dev;
2006 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2007 dev = &rte_eth_devices[port_id];
2009 basic_count = get_xstats_basic_count(dev);
2010 ret = get_xstats_count(port_id);
2013 expected_entries = (unsigned int)ret;
2015 /* Return max number of stats if no ids given */
2018 return expected_entries;
2019 else if (xstats_names && size < expected_entries)
2020 return expected_entries;
2023 if (ids && !xstats_names)
2026 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2027 uint64_t ids_copy[size];
2029 for (i = 0; i < size; i++) {
2030 if (ids[i] < basic_count) {
2031 no_basic_stat_requested = 0;
2036 * Convert ids to xstats ids that PMD knows.
2037 * ids known by user are basic + extended stats.
2039 ids_copy[i] = ids[i] - basic_count;
2042 if (no_basic_stat_requested)
2043 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2044 xstats_names, ids_copy, size);
2047 /* Retrieve all stats */
2049 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2051 if (num_stats < 0 || num_stats > (int)expected_entries)
2054 return expected_entries;
2057 xstats_names_copy = calloc(expected_entries,
2058 sizeof(struct rte_eth_xstat_name));
2060 if (!xstats_names_copy) {
2061 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2066 for (i = 0; i < size; i++) {
2067 if (ids[i] >= basic_count) {
2068 no_ext_stat_requested = 0;
2074 /* Fill xstats_names_copy structure */
2075 if (ids && no_ext_stat_requested) {
2076 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2078 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2081 free(xstats_names_copy);
2087 for (i = 0; i < size; i++) {
2088 if (ids[i] >= expected_entries) {
2089 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2090 free(xstats_names_copy);
2093 xstats_names[i] = xstats_names_copy[ids[i]];
2096 free(xstats_names_copy);
2101 rte_eth_xstats_get_names(uint16_t port_id,
2102 struct rte_eth_xstat_name *xstats_names,
2105 struct rte_eth_dev *dev;
2106 int cnt_used_entries;
2107 int cnt_expected_entries;
2108 int cnt_driver_entries;
2110 cnt_expected_entries = get_xstats_count(port_id);
2111 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2112 (int)size < cnt_expected_entries)
2113 return cnt_expected_entries;
2115 /* port_id checked in get_xstats_count() */
2116 dev = &rte_eth_devices[port_id];
2118 cnt_used_entries = rte_eth_basic_stats_get_names(
2121 if (dev->dev_ops->xstats_get_names != NULL) {
2122 /* If there are any driver-specific xstats, append them
2125 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2127 xstats_names + cnt_used_entries,
2128 size - cnt_used_entries);
2129 if (cnt_driver_entries < 0)
2130 return eth_err(port_id, cnt_driver_entries);
2131 cnt_used_entries += cnt_driver_entries;
2134 return cnt_used_entries;
2139 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2141 struct rte_eth_dev *dev;
2142 struct rte_eth_stats eth_stats;
2143 unsigned int count = 0, i, q;
2144 uint64_t val, *stats_ptr;
2145 uint16_t nb_rxqs, nb_txqs;
2148 ret = rte_eth_stats_get(port_id, ð_stats);
2152 dev = &rte_eth_devices[port_id];
2154 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2155 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2158 for (i = 0; i < RTE_NB_STATS; i++) {
2159 stats_ptr = RTE_PTR_ADD(ð_stats,
2160 rte_stats_strings[i].offset);
2162 xstats[count++].value = val;
2166 for (q = 0; q < nb_rxqs; q++) {
2167 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2168 stats_ptr = RTE_PTR_ADD(ð_stats,
2169 rte_rxq_stats_strings[i].offset +
2170 q * sizeof(uint64_t));
2172 xstats[count++].value = val;
2177 for (q = 0; q < nb_txqs; q++) {
2178 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2179 stats_ptr = RTE_PTR_ADD(ð_stats,
2180 rte_txq_stats_strings[i].offset +
2181 q * sizeof(uint64_t));
2183 xstats[count++].value = val;
2189 /* retrieve ethdev extended statistics */
2191 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2192 uint64_t *values, unsigned int size)
2194 unsigned int no_basic_stat_requested = 1;
2195 unsigned int no_ext_stat_requested = 1;
2196 unsigned int num_xstats_filled;
2197 unsigned int basic_count;
2198 uint16_t expected_entries;
2199 struct rte_eth_dev *dev;
2203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2204 ret = get_xstats_count(port_id);
2207 expected_entries = (uint16_t)ret;
2208 struct rte_eth_xstat xstats[expected_entries];
2209 dev = &rte_eth_devices[port_id];
2210 basic_count = get_xstats_basic_count(dev);
2212 /* Return max number of stats if no ids given */
2215 return expected_entries;
2216 else if (values && size < expected_entries)
2217 return expected_entries;
2223 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2224 unsigned int basic_count = get_xstats_basic_count(dev);
2225 uint64_t ids_copy[size];
2227 for (i = 0; i < size; i++) {
2228 if (ids[i] < basic_count) {
2229 no_basic_stat_requested = 0;
2234 * Convert ids to xstats ids that PMD knows.
2235 * ids known by user are basic + extended stats.
2237 ids_copy[i] = ids[i] - basic_count;
2240 if (no_basic_stat_requested)
2241 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2246 for (i = 0; i < size; i++) {
2247 if (ids[i] >= basic_count) {
2248 no_ext_stat_requested = 0;
2254 /* Fill the xstats structure */
2255 if (ids && no_ext_stat_requested)
2256 ret = rte_eth_basic_stats_get(port_id, xstats);
2258 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2262 num_xstats_filled = (unsigned int)ret;
2264 /* Return all stats */
2266 for (i = 0; i < num_xstats_filled; i++)
2267 values[i] = xstats[i].value;
2268 return expected_entries;
2272 for (i = 0; i < size; i++) {
2273 if (ids[i] >= expected_entries) {
2274 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2277 values[i] = xstats[ids[i]].value;
2283 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2286 struct rte_eth_dev *dev;
2287 unsigned int count = 0, i;
2288 signed int xcount = 0;
2289 uint16_t nb_rxqs, nb_txqs;
2292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2294 dev = &rte_eth_devices[port_id];
2296 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2297 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2299 /* Return generic statistics */
2300 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2301 (nb_txqs * RTE_NB_TXQ_STATS);
2303 /* implemented by the driver */
2304 if (dev->dev_ops->xstats_get != NULL) {
2305 /* Retrieve the xstats from the driver at the end of the
2308 xcount = (*dev->dev_ops->xstats_get)(dev,
2309 xstats ? xstats + count : NULL,
2310 (n > count) ? n - count : 0);
2313 return eth_err(port_id, xcount);
2316 if (n < count + xcount || xstats == NULL)
2317 return count + xcount;
2319 /* now fill the xstats structure */
2320 ret = rte_eth_basic_stats_get(port_id, xstats);
2325 for (i = 0; i < count; i++)
2327 /* add an offset to driver-specific stats */
2328 for ( ; i < count + xcount; i++)
2329 xstats[i].id += count;
2331 return count + xcount;
2334 /* reset ethdev extended statistics */
2336 rte_eth_xstats_reset(uint16_t port_id)
2338 struct rte_eth_dev *dev;
2340 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2341 dev = &rte_eth_devices[port_id];
2343 /* implemented by the driver */
2344 if (dev->dev_ops->xstats_reset != NULL) {
2345 (*dev->dev_ops->xstats_reset)(dev);
2349 /* fallback to default */
2350 rte_eth_stats_reset(port_id);
2354 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2357 struct rte_eth_dev *dev;
2359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2361 dev = &rte_eth_devices[port_id];
2363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2365 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2368 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2371 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2374 return (*dev->dev_ops->queue_stats_mapping_set)
2375 (dev, queue_id, stat_idx, is_rx);
2380 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2383 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2384 stat_idx, STAT_QMAP_TX));
2389 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2392 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2393 stat_idx, STAT_QMAP_RX));
2397 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2399 struct rte_eth_dev *dev;
2401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2402 dev = &rte_eth_devices[port_id];
2404 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2405 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2406 fw_version, fw_size));
2410 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2412 struct rte_eth_dev *dev;
2413 const struct rte_eth_desc_lim lim = {
2414 .nb_max = UINT16_MAX,
2419 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2420 dev = &rte_eth_devices[port_id];
2422 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2423 dev_info->rx_desc_lim = lim;
2424 dev_info->tx_desc_lim = lim;
2425 dev_info->device = dev->device;
2427 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2428 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2429 dev_info->driver_name = dev->device->driver->name;
2430 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2431 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2433 dev_info->dev_flags = &dev->data->dev_flags;
2437 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2438 uint32_t *ptypes, int num)
2441 struct rte_eth_dev *dev;
2442 const uint32_t *all_ptypes;
2444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2445 dev = &rte_eth_devices[port_id];
2446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2447 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2452 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2453 if (all_ptypes[i] & ptype_mask) {
2455 ptypes[j] = all_ptypes[i];
2463 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2465 struct rte_eth_dev *dev;
2467 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2468 dev = &rte_eth_devices[port_id];
2469 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2474 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2476 struct rte_eth_dev *dev;
2478 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2480 dev = &rte_eth_devices[port_id];
2481 *mtu = dev->data->mtu;
2486 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2489 struct rte_eth_dev *dev;
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2492 dev = &rte_eth_devices[port_id];
2493 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2495 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2497 dev->data->mtu = mtu;
2499 return eth_err(port_id, ret);
2503 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2505 struct rte_eth_dev *dev;
2508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2509 dev = &rte_eth_devices[port_id];
2510 if (!(dev->data->dev_conf.rxmode.offloads &
2511 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2512 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2517 if (vlan_id > 4095) {
2518 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2524 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2526 struct rte_vlan_filter_conf *vfc;
2530 vfc = &dev->data->vlan_filter_conf;
2531 vidx = vlan_id / 64;
2532 vbit = vlan_id % 64;
2535 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2537 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2540 return eth_err(port_id, ret);
2544 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2547 struct rte_eth_dev *dev;
2549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2550 dev = &rte_eth_devices[port_id];
2551 if (rx_queue_id >= dev->data->nb_rx_queues) {
2552 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2557 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2563 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2564 enum rte_vlan_type vlan_type,
2567 struct rte_eth_dev *dev;
2569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2570 dev = &rte_eth_devices[port_id];
2571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2573 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2578 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2580 struct rte_eth_dev *dev;
2584 uint64_t orig_offloads;
2586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2587 dev = &rte_eth_devices[port_id];
2589 /* save original values in case of failure */
2590 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2592 /*check which option changed by application*/
2593 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2594 org = !!(dev->data->dev_conf.rxmode.offloads &
2595 DEV_RX_OFFLOAD_VLAN_STRIP);
2598 dev->data->dev_conf.rxmode.offloads |=
2599 DEV_RX_OFFLOAD_VLAN_STRIP;
2601 dev->data->dev_conf.rxmode.offloads &=
2602 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2603 mask |= ETH_VLAN_STRIP_MASK;
2606 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2607 org = !!(dev->data->dev_conf.rxmode.offloads &
2608 DEV_RX_OFFLOAD_VLAN_FILTER);
2611 dev->data->dev_conf.rxmode.offloads |=
2612 DEV_RX_OFFLOAD_VLAN_FILTER;
2614 dev->data->dev_conf.rxmode.offloads &=
2615 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2616 mask |= ETH_VLAN_FILTER_MASK;
2619 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2620 org = !!(dev->data->dev_conf.rxmode.offloads &
2621 DEV_RX_OFFLOAD_VLAN_EXTEND);
2624 dev->data->dev_conf.rxmode.offloads |=
2625 DEV_RX_OFFLOAD_VLAN_EXTEND;
2627 dev->data->dev_conf.rxmode.offloads &=
2628 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2629 mask |= ETH_VLAN_EXTEND_MASK;
2636 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2637 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2639 /* hit an error restore original values */
2640 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2643 return eth_err(port_id, ret);
2647 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2649 struct rte_eth_dev *dev;
2652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2653 dev = &rte_eth_devices[port_id];
2655 if (dev->data->dev_conf.rxmode.offloads &
2656 DEV_RX_OFFLOAD_VLAN_STRIP)
2657 ret |= ETH_VLAN_STRIP_OFFLOAD;
2659 if (dev->data->dev_conf.rxmode.offloads &
2660 DEV_RX_OFFLOAD_VLAN_FILTER)
2661 ret |= ETH_VLAN_FILTER_OFFLOAD;
2663 if (dev->data->dev_conf.rxmode.offloads &
2664 DEV_RX_OFFLOAD_VLAN_EXTEND)
2665 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2671 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2673 struct rte_eth_dev *dev;
2675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2676 dev = &rte_eth_devices[port_id];
2677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2679 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2683 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2685 struct rte_eth_dev *dev;
2687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2688 dev = &rte_eth_devices[port_id];
2689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2690 memset(fc_conf, 0, sizeof(*fc_conf));
2691 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2695 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2697 struct rte_eth_dev *dev;
2699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2700 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2701 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2705 dev = &rte_eth_devices[port_id];
2706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2707 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2711 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2712 struct rte_eth_pfc_conf *pfc_conf)
2714 struct rte_eth_dev *dev;
2716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2717 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2718 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2722 dev = &rte_eth_devices[port_id];
2723 /* High water, low water validation are device specific */
2724 if (*dev->dev_ops->priority_flow_ctrl_set)
2725 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2731 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2739 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2740 for (i = 0; i < num; i++) {
2741 if (reta_conf[i].mask)
2749 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2753 uint16_t i, idx, shift;
2759 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2763 for (i = 0; i < reta_size; i++) {
2764 idx = i / RTE_RETA_GROUP_SIZE;
2765 shift = i % RTE_RETA_GROUP_SIZE;
2766 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2767 (reta_conf[idx].reta[shift] >= max_rxq)) {
2769 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2771 reta_conf[idx].reta[shift], max_rxq);
2780 rte_eth_dev_rss_reta_update(uint16_t port_id,
2781 struct rte_eth_rss_reta_entry64 *reta_conf,
2784 struct rte_eth_dev *dev;
2787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2788 /* Check mask bits */
2789 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2793 dev = &rte_eth_devices[port_id];
2795 /* Check entry value */
2796 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2797 dev->data->nb_rx_queues);
2801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2802 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2807 rte_eth_dev_rss_reta_query(uint16_t port_id,
2808 struct rte_eth_rss_reta_entry64 *reta_conf,
2811 struct rte_eth_dev *dev;
2814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2816 /* Check mask bits */
2817 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2821 dev = &rte_eth_devices[port_id];
2822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2823 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2828 rte_eth_dev_rss_hash_update(uint16_t port_id,
2829 struct rte_eth_rss_conf *rss_conf)
2831 struct rte_eth_dev *dev;
2832 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2834 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2835 dev = &rte_eth_devices[port_id];
2836 rte_eth_dev_info_get(port_id, &dev_info);
2837 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2838 dev_info.flow_type_rss_offloads) {
2840 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2841 port_id, rss_conf->rss_hf,
2842 dev_info.flow_type_rss_offloads);
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2846 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2851 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2852 struct rte_eth_rss_conf *rss_conf)
2854 struct rte_eth_dev *dev;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2857 dev = &rte_eth_devices[port_id];
2858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2859 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2864 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2865 struct rte_eth_udp_tunnel *udp_tunnel)
2867 struct rte_eth_dev *dev;
2869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2870 if (udp_tunnel == NULL) {
2871 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2875 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2876 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2880 dev = &rte_eth_devices[port_id];
2881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2882 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2887 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2888 struct rte_eth_udp_tunnel *udp_tunnel)
2890 struct rte_eth_dev *dev;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 dev = &rte_eth_devices[port_id];
2895 if (udp_tunnel == NULL) {
2896 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2900 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2901 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2905 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2906 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2911 rte_eth_led_on(uint16_t port_id)
2913 struct rte_eth_dev *dev;
2915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2916 dev = &rte_eth_devices[port_id];
2917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2918 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2922 rte_eth_led_off(uint16_t port_id)
2924 struct rte_eth_dev *dev;
2926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2927 dev = &rte_eth_devices[port_id];
2928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2929 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2933 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2937 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2939 struct rte_eth_dev_info dev_info;
2940 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2943 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2944 rte_eth_dev_info_get(port_id, &dev_info);
2946 for (i = 0; i < dev_info.max_mac_addrs; i++)
2947 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2953 static const struct ether_addr null_mac_addr;
2956 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2959 struct rte_eth_dev *dev;
2964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2965 dev = &rte_eth_devices[port_id];
2966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2968 if (is_zero_ether_addr(addr)) {
2969 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2973 if (pool >= ETH_64_POOLS) {
2974 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2978 index = get_mac_addr_index(port_id, addr);
2980 index = get_mac_addr_index(port_id, &null_mac_addr);
2982 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2987 pool_mask = dev->data->mac_pool_sel[index];
2989 /* Check if both MAC address and pool is already there, and do nothing */
2990 if (pool_mask & (1ULL << pool))
2995 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2998 /* Update address in NIC data structure */
2999 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3001 /* Update pool bitmap in NIC data structure */
3002 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3005 return eth_err(port_id, ret);
3009 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3011 struct rte_eth_dev *dev;
3014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3015 dev = &rte_eth_devices[port_id];
3016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3018 index = get_mac_addr_index(port_id, addr);
3021 "Port %u: Cannot remove default MAC address\n",
3024 } else if (index < 0)
3025 return 0; /* Do nothing if address wasn't found */
3028 (*dev->dev_ops->mac_addr_remove)(dev, index);
3030 /* Update address in NIC data structure */
3031 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3033 /* reset pool bitmap */
3034 dev->data->mac_pool_sel[index] = 0;
3040 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3042 struct rte_eth_dev *dev;
3045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3047 if (!is_valid_assigned_ether_addr(addr))
3050 dev = &rte_eth_devices[port_id];
3051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3053 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3057 /* Update default address in NIC data structure */
3058 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3065 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3069 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3071 struct rte_eth_dev_info dev_info;
3072 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3075 rte_eth_dev_info_get(port_id, &dev_info);
3076 if (!dev->data->hash_mac_addrs)
3079 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3080 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3081 ETHER_ADDR_LEN) == 0)
3088 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3093 struct rte_eth_dev *dev;
3095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3097 dev = &rte_eth_devices[port_id];
3098 if (is_zero_ether_addr(addr)) {
3099 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3104 index = get_hash_mac_addr_index(port_id, addr);
3105 /* Check if it's already there, and do nothing */
3106 if ((index >= 0) && on)
3112 "Port %u: the MAC address was not set in UTA\n",
3117 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3119 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3125 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3126 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3128 /* Update address in NIC data structure */
3130 ether_addr_copy(addr,
3131 &dev->data->hash_mac_addrs[index]);
3133 ether_addr_copy(&null_mac_addr,
3134 &dev->data->hash_mac_addrs[index]);
3137 return eth_err(port_id, ret);
3141 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3143 struct rte_eth_dev *dev;
3145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3147 dev = &rte_eth_devices[port_id];
3149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3150 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3154 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3157 struct rte_eth_dev *dev;
3158 struct rte_eth_dev_info dev_info;
3159 struct rte_eth_link link;
3161 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3163 dev = &rte_eth_devices[port_id];
3164 rte_eth_dev_info_get(port_id, &dev_info);
3165 link = dev->data->dev_link;
3167 if (queue_idx > dev_info.max_tx_queues) {
3169 "Set queue rate limit:port %u: invalid queue id=%u\n",
3170 port_id, queue_idx);
3174 if (tx_rate > link.link_speed) {
3176 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3177 tx_rate, link.link_speed);
3181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3182 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3183 queue_idx, tx_rate));
3187 rte_eth_mirror_rule_set(uint16_t port_id,
3188 struct rte_eth_mirror_conf *mirror_conf,
3189 uint8_t rule_id, uint8_t on)
3191 struct rte_eth_dev *dev;
3193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3194 if (mirror_conf->rule_type == 0) {
3195 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3199 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3200 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3205 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3206 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3207 (mirror_conf->pool_mask == 0)) {
3209 "Invalid mirror pool, pool mask can not be 0\n");
3213 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3214 mirror_conf->vlan.vlan_mask == 0) {
3216 "Invalid vlan mask, vlan mask can not be 0\n");
3220 dev = &rte_eth_devices[port_id];
3221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3223 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3224 mirror_conf, rule_id, on));
3228 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3230 struct rte_eth_dev *dev;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3234 dev = &rte_eth_devices[port_id];
3235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3237 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3241 RTE_INIT(eth_dev_init_cb_lists)
3245 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3246 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3250 rte_eth_dev_callback_register(uint16_t port_id,
3251 enum rte_eth_event_type event,
3252 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3254 struct rte_eth_dev *dev;
3255 struct rte_eth_dev_callback *user_cb;
3256 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3262 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3263 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3267 if (port_id == RTE_ETH_ALL) {
3269 last_port = RTE_MAX_ETHPORTS - 1;
3271 next_port = last_port = port_id;
3274 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3277 dev = &rte_eth_devices[next_port];
3279 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3280 if (user_cb->cb_fn == cb_fn &&
3281 user_cb->cb_arg == cb_arg &&
3282 user_cb->event == event) {
3287 /* create a new callback. */
3288 if (user_cb == NULL) {
3289 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3290 sizeof(struct rte_eth_dev_callback), 0);
3291 if (user_cb != NULL) {
3292 user_cb->cb_fn = cb_fn;
3293 user_cb->cb_arg = cb_arg;
3294 user_cb->event = event;
3295 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3298 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3299 rte_eth_dev_callback_unregister(port_id, event,
3305 } while (++next_port <= last_port);
3307 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3312 rte_eth_dev_callback_unregister(uint16_t port_id,
3313 enum rte_eth_event_type event,
3314 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3317 struct rte_eth_dev *dev;
3318 struct rte_eth_dev_callback *cb, *next;
3319 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3325 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3326 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3330 if (port_id == RTE_ETH_ALL) {
3332 last_port = RTE_MAX_ETHPORTS - 1;
3334 next_port = last_port = port_id;
3337 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3340 dev = &rte_eth_devices[next_port];
3342 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3345 next = TAILQ_NEXT(cb, next);
3347 if (cb->cb_fn != cb_fn || cb->event != event ||
3348 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3352 * if this callback is not executing right now,
3355 if (cb->active == 0) {
3356 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3362 } while (++next_port <= last_port);
3364 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3369 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3370 enum rte_eth_event_type event, void *ret_param)
3372 struct rte_eth_dev_callback *cb_lst;
3373 struct rte_eth_dev_callback dev_cb;
3376 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3377 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3378 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3382 if (ret_param != NULL)
3383 dev_cb.ret_param = ret_param;
3385 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3386 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3387 dev_cb.cb_arg, dev_cb.ret_param);
3388 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3391 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3396 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3401 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3403 dev->state = RTE_ETH_DEV_ATTACHED;
3407 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3410 struct rte_eth_dev *dev;
3411 struct rte_intr_handle *intr_handle;
3415 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3417 dev = &rte_eth_devices[port_id];
3419 if (!dev->intr_handle) {
3420 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3424 intr_handle = dev->intr_handle;
3425 if (!intr_handle->intr_vec) {
3426 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3430 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3431 vec = intr_handle->intr_vec[qid];
3432 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3433 if (rc && rc != -EEXIST) {
3435 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3436 port_id, qid, op, epfd, vec);
3443 const struct rte_memzone *
3444 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3445 uint16_t queue_id, size_t size, unsigned align,
3448 char z_name[RTE_MEMZONE_NAMESIZE];
3449 const struct rte_memzone *mz;
3451 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3452 dev->device->driver->name, ring_name,
3453 dev->data->port_id, queue_id);
3455 mz = rte_memzone_lookup(z_name);
3459 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3460 RTE_MEMZONE_IOVA_CONTIG, align);
3463 int __rte_experimental
3464 rte_eth_dev_create(struct rte_device *device, const char *name,
3465 size_t priv_data_size,
3466 ethdev_bus_specific_init ethdev_bus_specific_init,
3467 void *bus_init_params,
3468 ethdev_init_t ethdev_init, void *init_params)
3470 struct rte_eth_dev *ethdev;
3473 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3475 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3476 ethdev = rte_eth_dev_allocate(name);
3482 if (priv_data_size) {
3483 ethdev->data->dev_private = rte_zmalloc_socket(
3484 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3487 if (!ethdev->data->dev_private) {
3488 RTE_LOG(ERR, EAL, "failed to allocate private data");
3494 ethdev = rte_eth_dev_attach_secondary(name);
3496 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3497 "ethdev doesn't exist");
3503 ethdev->device = device;
3505 if (ethdev_bus_specific_init) {
3506 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3509 "ethdev bus specific initialisation failed");
3514 retval = ethdev_init(ethdev, init_params);
3516 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3520 rte_eth_dev_probing_finish(ethdev);
3524 /* free ports private data if primary process */
3525 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3526 rte_free(ethdev->data->dev_private);
3528 rte_eth_dev_release_port(ethdev);
3533 int __rte_experimental
3534 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3535 ethdev_uninit_t ethdev_uninit)
3539 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3543 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3544 if (ethdev_uninit) {
3545 ret = ethdev_uninit(ethdev);
3550 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3551 rte_free(ethdev->data->dev_private);
3553 ethdev->data->dev_private = NULL;
3555 return rte_eth_dev_release_port(ethdev);
3559 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3560 int epfd, int op, void *data)
3563 struct rte_eth_dev *dev;
3564 struct rte_intr_handle *intr_handle;
3567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3569 dev = &rte_eth_devices[port_id];
3570 if (queue_id >= dev->data->nb_rx_queues) {
3571 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3575 if (!dev->intr_handle) {
3576 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3580 intr_handle = dev->intr_handle;
3581 if (!intr_handle->intr_vec) {
3582 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3586 vec = intr_handle->intr_vec[queue_id];
3587 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3588 if (rc && rc != -EEXIST) {
3590 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3591 port_id, queue_id, op, epfd, vec);
3599 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3602 struct rte_eth_dev *dev;
3604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3606 dev = &rte_eth_devices[port_id];
3608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3609 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3614 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3617 struct rte_eth_dev *dev;
3619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3621 dev = &rte_eth_devices[port_id];
3623 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3624 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3630 rte_eth_dev_filter_supported(uint16_t port_id,
3631 enum rte_filter_type filter_type)
3633 struct rte_eth_dev *dev;
3635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3637 dev = &rte_eth_devices[port_id];
3638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3639 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3640 RTE_ETH_FILTER_NOP, NULL);
3644 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3645 enum rte_filter_op filter_op, void *arg)
3647 struct rte_eth_dev *dev;
3649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3651 dev = &rte_eth_devices[port_id];
3652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3653 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3657 const struct rte_eth_rxtx_callback *
3658 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3659 rte_rx_callback_fn fn, void *user_param)
3661 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3662 rte_errno = ENOTSUP;
3665 /* check input parameters */
3666 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3667 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3671 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3679 cb->param = user_param;
3681 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3682 /* Add the callbacks in fifo order. */
3683 struct rte_eth_rxtx_callback *tail =
3684 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3687 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3694 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3699 const struct rte_eth_rxtx_callback *
3700 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3701 rte_rx_callback_fn fn, void *user_param)
3703 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3704 rte_errno = ENOTSUP;
3707 /* check input parameters */
3708 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3709 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3714 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3722 cb->param = user_param;
3724 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3725 /* Add the callbacks at fisrt position*/
3726 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3728 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3729 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3734 const struct rte_eth_rxtx_callback *
3735 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3736 rte_tx_callback_fn fn, void *user_param)
3738 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3739 rte_errno = ENOTSUP;
3742 /* check input parameters */
3743 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3744 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3749 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3757 cb->param = user_param;
3759 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3760 /* Add the callbacks in fifo order. */
3761 struct rte_eth_rxtx_callback *tail =
3762 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3765 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3772 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3778 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3779 const struct rte_eth_rxtx_callback *user_cb)
3781 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3784 /* Check input parameters. */
3785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3786 if (user_cb == NULL ||
3787 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3790 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3791 struct rte_eth_rxtx_callback *cb;
3792 struct rte_eth_rxtx_callback **prev_cb;
3795 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3796 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3797 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3799 if (cb == user_cb) {
3800 /* Remove the user cb from the callback list. */
3801 *prev_cb = cb->next;
3806 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3812 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3813 const struct rte_eth_rxtx_callback *user_cb)
3815 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3818 /* Check input parameters. */
3819 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3820 if (user_cb == NULL ||
3821 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3824 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3826 struct rte_eth_rxtx_callback *cb;
3827 struct rte_eth_rxtx_callback **prev_cb;
3829 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3830 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3831 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3833 if (cb == user_cb) {
3834 /* Remove the user cb from the callback list. */
3835 *prev_cb = cb->next;
3840 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3846 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3847 struct rte_eth_rxq_info *qinfo)
3849 struct rte_eth_dev *dev;
3851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3856 dev = &rte_eth_devices[port_id];
3857 if (queue_id >= dev->data->nb_rx_queues) {
3858 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3864 memset(qinfo, 0, sizeof(*qinfo));
3865 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3870 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3871 struct rte_eth_txq_info *qinfo)
3873 struct rte_eth_dev *dev;
3875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3880 dev = &rte_eth_devices[port_id];
3881 if (queue_id >= dev->data->nb_tx_queues) {
3882 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3888 memset(qinfo, 0, sizeof(*qinfo));
3889 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3895 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3896 struct ether_addr *mc_addr_set,
3897 uint32_t nb_mc_addr)
3899 struct rte_eth_dev *dev;
3901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3903 dev = &rte_eth_devices[port_id];
3904 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3905 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3906 mc_addr_set, nb_mc_addr));
3910 rte_eth_timesync_enable(uint16_t port_id)
3912 struct rte_eth_dev *dev;
3914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3915 dev = &rte_eth_devices[port_id];
3917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3918 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3922 rte_eth_timesync_disable(uint16_t port_id)
3924 struct rte_eth_dev *dev;
3926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3927 dev = &rte_eth_devices[port_id];
3929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3930 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3934 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3937 struct rte_eth_dev *dev;
3939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3940 dev = &rte_eth_devices[port_id];
3942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3943 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3944 (dev, timestamp, flags));
3948 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3949 struct timespec *timestamp)
3951 struct rte_eth_dev *dev;
3953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3954 dev = &rte_eth_devices[port_id];
3956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3957 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3962 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3964 struct rte_eth_dev *dev;
3966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3967 dev = &rte_eth_devices[port_id];
3969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3970 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3975 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3977 struct rte_eth_dev *dev;
3979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3980 dev = &rte_eth_devices[port_id];
3982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3983 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3988 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3990 struct rte_eth_dev *dev;
3992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3993 dev = &rte_eth_devices[port_id];
3995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3996 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4001 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4003 struct rte_eth_dev *dev;
4005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4007 dev = &rte_eth_devices[port_id];
4008 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4009 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4013 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4015 struct rte_eth_dev *dev;
4017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4019 dev = &rte_eth_devices[port_id];
4020 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4021 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4025 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4027 struct rte_eth_dev *dev;
4029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4031 dev = &rte_eth_devices[port_id];
4032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4033 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4037 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4039 struct rte_eth_dev *dev;
4041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4043 dev = &rte_eth_devices[port_id];
4044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4045 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4048 int __rte_experimental
4049 rte_eth_dev_get_module_info(uint16_t port_id,
4050 struct rte_eth_dev_module_info *modinfo)
4052 struct rte_eth_dev *dev;
4054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4056 dev = &rte_eth_devices[port_id];
4057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4058 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4061 int __rte_experimental
4062 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4063 struct rte_dev_eeprom_info *info)
4065 struct rte_eth_dev *dev;
4067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4069 dev = &rte_eth_devices[port_id];
4070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4071 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4075 rte_eth_dev_get_dcb_info(uint16_t port_id,
4076 struct rte_eth_dcb_info *dcb_info)
4078 struct rte_eth_dev *dev;
4080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4082 dev = &rte_eth_devices[port_id];
4083 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4086 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4090 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4091 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4093 struct rte_eth_dev *dev;
4095 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4096 if (l2_tunnel == NULL) {
4097 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4101 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4102 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4106 dev = &rte_eth_devices[port_id];
4107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4109 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4114 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4115 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4119 struct rte_eth_dev *dev;
4121 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4123 if (l2_tunnel == NULL) {
4124 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4128 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4129 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4134 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4138 dev = &rte_eth_devices[port_id];
4139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4141 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4142 l2_tunnel, mask, en));
4146 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4147 const struct rte_eth_desc_lim *desc_lim)
4149 if (desc_lim->nb_align != 0)
4150 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4152 if (desc_lim->nb_max != 0)
4153 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4155 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4159 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4160 uint16_t *nb_rx_desc,
4161 uint16_t *nb_tx_desc)
4163 struct rte_eth_dev *dev;
4164 struct rte_eth_dev_info dev_info;
4166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4168 dev = &rte_eth_devices[port_id];
4169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4171 rte_eth_dev_info_get(port_id, &dev_info);
4173 if (nb_rx_desc != NULL)
4174 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4176 if (nb_tx_desc != NULL)
4177 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4183 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4185 struct rte_eth_dev *dev;
4187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4192 dev = &rte_eth_devices[port_id];
4194 if (*dev->dev_ops->pool_ops_supported == NULL)
4195 return 1; /* all pools are supported */
4197 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4201 * A set of values to describe the possible states of a switch domain.
4203 enum rte_eth_switch_domain_state {
4204 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4205 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4209 * Array of switch domains available for allocation. Array is sized to
4210 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4211 * ethdev ports in a single process.
4213 struct rte_eth_dev_switch {
4214 enum rte_eth_switch_domain_state state;
4215 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4217 int __rte_experimental
4218 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4222 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4224 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4225 i < RTE_MAX_ETHPORTS; i++) {
4226 if (rte_eth_switch_domains[i].state ==
4227 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4228 rte_eth_switch_domains[i].state =
4229 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4238 int __rte_experimental
4239 rte_eth_switch_domain_free(uint16_t domain_id)
4241 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4242 domain_id >= RTE_MAX_ETHPORTS)
4245 if (rte_eth_switch_domains[domain_id].state !=
4246 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4249 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4254 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4257 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4260 struct rte_kvargs_pair *pair;
4263 arglist->str = strdup(str_in);
4264 if (arglist->str == NULL)
4267 letter = arglist->str;
4270 pair = &arglist->pairs[0];
4273 case 0: /* Initial */
4276 else if (*letter == '\0')
4283 case 1: /* Parsing key */
4284 if (*letter == '=') {
4286 pair->value = letter + 1;
4288 } else if (*letter == ',' || *letter == '\0')
4293 case 2: /* Parsing value */
4296 else if (*letter == ',') {
4299 pair = &arglist->pairs[arglist->count];
4301 } else if (*letter == '\0') {
4304 pair = &arglist->pairs[arglist->count];
4309 case 3: /* Parsing list */
4312 else if (*letter == '\0')
4321 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4329 /* Single element, not a list */
4330 return callback(str, data);
4332 /* Sanity check, then strip the brackets */
4333 str_start = &str[strlen(str) - 1];
4334 if (*str_start != ']') {
4335 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4341 /* Process list elements */
4351 } else if (state == 1) {
4352 if (*str == ',' || *str == '\0') {
4353 if (str > str_start) {
4354 /* Non-empty string fragment */
4356 result = callback(str_start, data);
4369 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4370 const uint16_t max_list)
4372 uint16_t lo, hi, val;
4375 result = sscanf(str, "%hu-%hu", &lo, &hi);
4377 if (*len_list >= max_list)
4379 list[(*len_list)++] = lo;
4380 } else if (result == 2) {
4381 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4383 for (val = lo; val <= hi; val++) {
4384 if (*len_list >= max_list)
4386 list[(*len_list)++] = val;
4395 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4397 struct rte_eth_devargs *eth_da = data;
4399 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4400 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4403 int __rte_experimental
4404 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4406 struct rte_kvargs args;
4407 struct rte_kvargs_pair *pair;
4411 memset(eth_da, 0, sizeof(*eth_da));
4413 result = rte_eth_devargs_tokenise(&args, dargs);
4417 for (i = 0; i < args.count; i++) {
4418 pair = &args.pairs[i];
4419 if (strcmp("representor", pair->key) == 0) {
4420 result = rte_eth_devargs_parse_list(pair->value,
4421 rte_eth_devargs_parse_representor_ports,
4435 RTE_INIT(ethdev_init_log)
4437 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4438 if (rte_eth_dev_logtype >= 0)
4439 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);