1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_kvargs.h>
39 #include "rte_ether.h"
40 #include "rte_ethdev.h"
41 #include "rte_ethdev_driver.h"
42 #include "ethdev_profile.h"
44 static int ethdev_logtype;
46 #define ethdev_log(level, fmt, ...) \
47 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint8_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
128 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
129 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
130 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 #undef RTE_TX_OFFLOAD_BIT2STR
165 * The user application callback description.
167 * It contains callback address to be registered by user application,
168 * the pointer to the parameters for callback, and the event type.
170 struct rte_eth_dev_callback {
171 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
172 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
173 void *cb_arg; /**< Parameter for callback */
174 void *ret_param; /**< Return parameter */
175 enum rte_eth_event_type event; /**< Interrupt event type */
176 uint32_t active; /**< Callback is executing */
185 rte_eth_find_next(uint16_t port_id)
187 while (port_id < RTE_MAX_ETHPORTS &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
192 if (port_id >= RTE_MAX_ETHPORTS)
193 return RTE_MAX_ETHPORTS;
199 rte_eth_dev_shared_data_prepare(void)
201 const unsigned flags = 0;
202 const struct rte_memzone *mz;
204 rte_spinlock_lock(&rte_eth_shared_data_lock);
206 if (rte_eth_dev_shared_data == NULL) {
207 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
208 /* Allocate port data and ownership shared memory. */
209 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
210 sizeof(*rte_eth_dev_shared_data),
211 rte_socket_id(), flags);
213 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
215 rte_panic("Cannot allocate ethdev shared data\n");
217 rte_eth_dev_shared_data = mz->addr;
218 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
219 rte_eth_dev_shared_data->next_owner_id =
220 RTE_ETH_DEV_NO_OWNER + 1;
221 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
222 memset(rte_eth_dev_shared_data->data, 0,
223 sizeof(rte_eth_dev_shared_data->data));
227 rte_spinlock_unlock(&rte_eth_shared_data_lock);
231 rte_eth_dev_allocated(const char *name)
235 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
236 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
237 strcmp(rte_eth_devices[i].data->name, name) == 0)
238 return &rte_eth_devices[i];
244 rte_eth_dev_find_free_port(void)
248 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
249 /* Using shared name field to find a free port. */
250 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
251 RTE_ASSERT(rte_eth_devices[i].state ==
256 return RTE_MAX_ETHPORTS;
259 static struct rte_eth_dev *
260 eth_dev_get(uint16_t port_id)
262 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
264 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
265 eth_dev->state = RTE_ETH_DEV_ATTACHED;
267 eth_dev_last_created_port = port_id;
273 rte_eth_dev_allocate(const char *name)
276 struct rte_eth_dev *eth_dev = NULL;
278 rte_eth_dev_shared_data_prepare();
280 /* Synchronize port creation between primary and secondary threads. */
281 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
283 port_id = rte_eth_dev_find_free_port();
284 if (port_id == RTE_MAX_ETHPORTS) {
285 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
289 if (rte_eth_dev_allocated(name) != NULL) {
291 "Ethernet Device with name %s already allocated!",
296 eth_dev = eth_dev_get(port_id);
297 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
298 eth_dev->data->port_id = port_id;
299 eth_dev->data->mtu = ETHER_MTU;
302 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
305 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
311 * Attach to a port already registered by the primary process, which
312 * makes sure that the same device would have the same port id both
313 * in the primary and secondary process.
316 rte_eth_dev_attach_secondary(const char *name)
319 struct rte_eth_dev *eth_dev = NULL;
321 rte_eth_dev_shared_data_prepare();
323 /* Synchronize port attachment to primary port creation and release. */
324 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
326 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
327 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
330 if (i == RTE_MAX_ETHPORTS) {
332 "device %s is not driven by the primary process\n",
335 eth_dev = eth_dev_get(i);
336 RTE_ASSERT(eth_dev->data->port_id == i);
339 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
344 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
349 rte_eth_dev_shared_data_prepare();
351 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
353 eth_dev->state = RTE_ETH_DEV_UNUSED;
355 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
359 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
365 rte_eth_dev_is_valid_port(uint16_t port_id)
367 if (port_id >= RTE_MAX_ETHPORTS ||
368 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
375 rte_eth_is_valid_owner_id(uint64_t owner_id)
377 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
378 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
379 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
386 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
388 while (port_id < RTE_MAX_ETHPORTS &&
389 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
390 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
391 rte_eth_devices[port_id].data->owner.id != owner_id))
394 if (port_id >= RTE_MAX_ETHPORTS)
395 return RTE_MAX_ETHPORTS;
400 int __rte_experimental
401 rte_eth_dev_owner_new(uint64_t *owner_id)
403 rte_eth_dev_shared_data_prepare();
405 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
407 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
409 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
414 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
415 const struct rte_eth_dev_owner *new_owner)
417 struct rte_eth_dev_owner *port_owner;
420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
422 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
423 !rte_eth_is_valid_owner_id(old_owner_id))
426 port_owner = &rte_eth_devices[port_id].data->owner;
427 if (port_owner->id != old_owner_id) {
428 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
429 " by %s_%016lX.\n", port_id,
430 port_owner->name, port_owner->id);
434 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
436 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
437 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
440 port_owner->id = new_owner->id;
442 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
443 new_owner->name, new_owner->id);
448 int __rte_experimental
449 rte_eth_dev_owner_set(const uint16_t port_id,
450 const struct rte_eth_dev_owner *owner)
454 rte_eth_dev_shared_data_prepare();
456 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
458 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
460 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
464 int __rte_experimental
465 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
467 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
468 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
471 rte_eth_dev_shared_data_prepare();
473 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
475 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
477 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
481 void __rte_experimental
482 rte_eth_dev_owner_delete(const uint64_t owner_id)
486 rte_eth_dev_shared_data_prepare();
488 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
490 if (rte_eth_is_valid_owner_id(owner_id)) {
491 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
492 memset(&rte_eth_devices[port_id].data->owner, 0,
493 sizeof(struct rte_eth_dev_owner));
494 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
495 " have removed.\n", owner_id);
498 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
501 int __rte_experimental
502 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
506 rte_eth_dev_shared_data_prepare();
508 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
510 if (!rte_eth_dev_is_valid_port(port_id)) {
511 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
514 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
518 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
523 rte_eth_dev_socket_id(uint16_t port_id)
525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
526 return rte_eth_devices[port_id].data->numa_node;
530 rte_eth_dev_get_sec_ctx(uint16_t port_id)
532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
533 return rte_eth_devices[port_id].security_ctx;
537 rte_eth_dev_count(void)
539 return rte_eth_dev_count_avail();
543 rte_eth_dev_count_avail(void)
550 RTE_ETH_FOREACH_DEV(p)
556 uint16_t __rte_experimental
557 rte_eth_dev_count_total(void)
559 uint16_t port, count = 0;
561 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
562 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
569 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
576 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
580 /* shouldn't check 'rte_eth_devices[i].data',
581 * because it might be overwritten by VDEV PMD */
582 tmp = rte_eth_dev_shared_data->data[port_id].name;
588 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
593 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
597 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
598 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
599 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
609 eth_err(uint16_t port_id, int ret)
613 if (rte_eth_dev_is_removed(port_id))
618 /* attach the new device, then store port_id of the device */
620 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
622 int current = rte_eth_dev_count_total();
623 struct rte_devargs da;
626 memset(&da, 0, sizeof(da));
628 if ((devargs == NULL) || (port_id == NULL)) {
634 if (rte_devargs_parse(&da, "%s", devargs))
637 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
641 /* no point looking at the port count if no port exists */
642 if (!rte_eth_dev_count_total()) {
643 ethdev_log(ERR, "No port found for device (%s)", da.name);
648 /* if nothing happened, there is a bug here, since some driver told us
649 * it did attach a device, but did not create a port.
650 * FIXME: race condition in case of plug-out of another device
652 if (current == rte_eth_dev_count_total()) {
657 *port_id = eth_dev_last_created_port;
665 /* detach the device, then store the name of the device */
667 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
669 struct rte_device *dev;
674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
676 dev_flags = rte_eth_devices[port_id].data->dev_flags;
677 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
679 "Port %" PRIu16 " is bonded, cannot detach", port_id);
683 dev = rte_eth_devices[port_id].device;
687 bus = rte_bus_find_by_device(dev);
691 ret = rte_eal_hotplug_remove(bus->name, dev->name);
695 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
700 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
702 uint16_t old_nb_queues = dev->data->nb_rx_queues;
706 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
707 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
708 sizeof(dev->data->rx_queues[0]) * nb_queues,
709 RTE_CACHE_LINE_SIZE);
710 if (dev->data->rx_queues == NULL) {
711 dev->data->nb_rx_queues = 0;
714 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
717 rxq = dev->data->rx_queues;
719 for (i = nb_queues; i < old_nb_queues; i++)
720 (*dev->dev_ops->rx_queue_release)(rxq[i]);
721 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
722 RTE_CACHE_LINE_SIZE);
725 if (nb_queues > old_nb_queues) {
726 uint16_t new_qs = nb_queues - old_nb_queues;
728 memset(rxq + old_nb_queues, 0,
729 sizeof(rxq[0]) * new_qs);
732 dev->data->rx_queues = rxq;
734 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
737 rxq = dev->data->rx_queues;
739 for (i = nb_queues; i < old_nb_queues; i++)
740 (*dev->dev_ops->rx_queue_release)(rxq[i]);
742 rte_free(dev->data->rx_queues);
743 dev->data->rx_queues = NULL;
745 dev->data->nb_rx_queues = nb_queues;
750 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
752 struct rte_eth_dev *dev;
754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
756 dev = &rte_eth_devices[port_id];
757 if (!dev->data->dev_started) {
759 "port %d must be started before start any queue\n", port_id);
763 if (rx_queue_id >= dev->data->nb_rx_queues) {
764 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
770 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
771 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
772 " already started\n",
773 rx_queue_id, port_id);
777 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
783 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
785 struct rte_eth_dev *dev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
789 dev = &rte_eth_devices[port_id];
790 if (rx_queue_id >= dev->data->nb_rx_queues) {
791 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
797 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
798 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
799 " already stopped\n",
800 rx_queue_id, port_id);
804 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
809 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
811 struct rte_eth_dev *dev;
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
815 dev = &rte_eth_devices[port_id];
816 if (!dev->data->dev_started) {
818 "port %d must be started before start any queue\n", port_id);
822 if (tx_queue_id >= dev->data->nb_tx_queues) {
823 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
829 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
830 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
831 " already started\n",
832 tx_queue_id, port_id);
836 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
842 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
844 struct rte_eth_dev *dev;
846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
848 dev = &rte_eth_devices[port_id];
849 if (tx_queue_id >= dev->data->nb_tx_queues) {
850 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
854 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
856 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
857 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
858 " already stopped\n",
859 tx_queue_id, port_id);
863 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
868 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
870 uint16_t old_nb_queues = dev->data->nb_tx_queues;
874 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
875 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
876 sizeof(dev->data->tx_queues[0]) * nb_queues,
877 RTE_CACHE_LINE_SIZE);
878 if (dev->data->tx_queues == NULL) {
879 dev->data->nb_tx_queues = 0;
882 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
885 txq = dev->data->tx_queues;
887 for (i = nb_queues; i < old_nb_queues; i++)
888 (*dev->dev_ops->tx_queue_release)(txq[i]);
889 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
890 RTE_CACHE_LINE_SIZE);
893 if (nb_queues > old_nb_queues) {
894 uint16_t new_qs = nb_queues - old_nb_queues;
896 memset(txq + old_nb_queues, 0,
897 sizeof(txq[0]) * new_qs);
900 dev->data->tx_queues = txq;
902 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
905 txq = dev->data->tx_queues;
907 for (i = nb_queues; i < old_nb_queues; i++)
908 (*dev->dev_ops->tx_queue_release)(txq[i]);
910 rte_free(dev->data->tx_queues);
911 dev->data->tx_queues = NULL;
913 dev->data->nb_tx_queues = nb_queues;
918 rte_eth_speed_bitflag(uint32_t speed, int duplex)
921 case ETH_SPEED_NUM_10M:
922 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
923 case ETH_SPEED_NUM_100M:
924 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
925 case ETH_SPEED_NUM_1G:
926 return ETH_LINK_SPEED_1G;
927 case ETH_SPEED_NUM_2_5G:
928 return ETH_LINK_SPEED_2_5G;
929 case ETH_SPEED_NUM_5G:
930 return ETH_LINK_SPEED_5G;
931 case ETH_SPEED_NUM_10G:
932 return ETH_LINK_SPEED_10G;
933 case ETH_SPEED_NUM_20G:
934 return ETH_LINK_SPEED_20G;
935 case ETH_SPEED_NUM_25G:
936 return ETH_LINK_SPEED_25G;
937 case ETH_SPEED_NUM_40G:
938 return ETH_LINK_SPEED_40G;
939 case ETH_SPEED_NUM_50G:
940 return ETH_LINK_SPEED_50G;
941 case ETH_SPEED_NUM_56G:
942 return ETH_LINK_SPEED_56G;
943 case ETH_SPEED_NUM_100G:
944 return ETH_LINK_SPEED_100G;
951 * A conversion function from rxmode bitfield API.
954 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
955 uint64_t *rx_offloads)
957 uint64_t offloads = 0;
959 if (rxmode->header_split == 1)
960 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
961 if (rxmode->hw_ip_checksum == 1)
962 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
963 if (rxmode->hw_vlan_filter == 1)
964 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
965 if (rxmode->hw_vlan_strip == 1)
966 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
967 if (rxmode->hw_vlan_extend == 1)
968 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
969 if (rxmode->jumbo_frame == 1)
970 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
971 if (rxmode->hw_strip_crc == 1)
972 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
973 if (rxmode->enable_scatter == 1)
974 offloads |= DEV_RX_OFFLOAD_SCATTER;
975 if (rxmode->enable_lro == 1)
976 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
977 if (rxmode->hw_timestamp == 1)
978 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
979 if (rxmode->security == 1)
980 offloads |= DEV_RX_OFFLOAD_SECURITY;
982 *rx_offloads = offloads;
985 const char * __rte_experimental
986 rte_eth_dev_rx_offload_name(uint64_t offload)
988 const char *name = "UNKNOWN";
991 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
992 if (offload == rte_rx_offload_names[i].offload) {
993 name = rte_rx_offload_names[i].name;
1001 const char * __rte_experimental
1002 rte_eth_dev_tx_offload_name(uint64_t offload)
1004 const char *name = "UNKNOWN";
1007 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1008 if (offload == rte_tx_offload_names[i].offload) {
1009 name = rte_tx_offload_names[i].name;
1018 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1019 const struct rte_eth_conf *dev_conf)
1021 struct rte_eth_dev *dev;
1022 struct rte_eth_dev_info dev_info;
1023 struct rte_eth_conf local_conf = *dev_conf;
1026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1028 dev = &rte_eth_devices[port_id];
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1031 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1033 /* If number of queues specified by application for both Rx and Tx is
1034 * zero, use driver preferred values. This cannot be done individually
1035 * as it is valid for either Tx or Rx (but not both) to be zero.
1036 * If driver does not provide any preferred valued, fall back on
1039 if (nb_rx_q == 0 && nb_tx_q == 0) {
1040 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1042 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1043 nb_tx_q = dev_info.default_txportconf.nb_queues;
1045 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1048 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1049 RTE_PMD_DEBUG_TRACE(
1050 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1051 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1055 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1056 RTE_PMD_DEBUG_TRACE(
1057 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1058 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1065 if (dev->data->dev_started) {
1066 RTE_PMD_DEBUG_TRACE(
1067 "port %d must be stopped to allow configuration\n", port_id);
1072 * Convert between the offloads API to enable PMDs to support
1075 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1076 rte_eth_convert_rx_offload_bitfield(
1077 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1079 /* Copy the dev_conf parameter into the dev structure */
1080 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1083 * Check that the numbers of RX and TX queues are not greater
1084 * than the maximum number of RX and TX queues supported by the
1085 * configured device.
1087 if (nb_rx_q > dev_info.max_rx_queues) {
1088 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1089 port_id, nb_rx_q, dev_info.max_rx_queues);
1093 if (nb_tx_q > dev_info.max_tx_queues) {
1094 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1095 port_id, nb_tx_q, dev_info.max_tx_queues);
1099 /* Check that the device supports requested interrupts */
1100 if ((dev_conf->intr_conf.lsc == 1) &&
1101 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1102 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1103 dev->device->driver->name);
1106 if ((dev_conf->intr_conf.rmv == 1) &&
1107 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1108 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1109 dev->device->driver->name);
1114 * If jumbo frames are enabled, check that the maximum RX packet
1115 * length is supported by the configured device.
1117 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1118 if (dev_conf->rxmode.max_rx_pkt_len >
1119 dev_info.max_rx_pktlen) {
1120 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1121 " > max valid value %u\n",
1123 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1124 (unsigned)dev_info.max_rx_pktlen);
1126 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1127 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1128 " < min valid value %u\n",
1130 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1131 (unsigned)ETHER_MIN_LEN);
1135 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1136 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1137 /* Use default value */
1138 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1142 /* Check that device supports requested rss hash functions. */
1143 if ((dev_info.flow_type_rss_offloads |
1144 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1145 dev_info.flow_type_rss_offloads) {
1146 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1147 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1149 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1150 dev_info.flow_type_rss_offloads);
1154 * Setup new number of RX/TX queues and reconfigure device.
1156 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1158 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1163 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1165 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1167 rte_eth_dev_rx_queue_config(dev, 0);
1171 diag = (*dev->dev_ops->dev_configure)(dev);
1173 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1175 rte_eth_dev_rx_queue_config(dev, 0);
1176 rte_eth_dev_tx_queue_config(dev, 0);
1177 return eth_err(port_id, diag);
1180 /* Initialize Rx profiling if enabled at compilation time. */
1181 diag = __rte_eth_profile_rx_init(port_id, dev);
1183 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1185 rte_eth_dev_rx_queue_config(dev, 0);
1186 rte_eth_dev_tx_queue_config(dev, 0);
1187 return eth_err(port_id, diag);
1194 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1196 if (dev->data->dev_started) {
1197 RTE_PMD_DEBUG_TRACE(
1198 "port %d must be stopped to allow reset\n",
1199 dev->data->port_id);
1203 rte_eth_dev_rx_queue_config(dev, 0);
1204 rte_eth_dev_tx_queue_config(dev, 0);
1206 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1210 rte_eth_dev_config_restore(uint16_t port_id)
1212 struct rte_eth_dev *dev;
1213 struct rte_eth_dev_info dev_info;
1214 struct ether_addr *addr;
1219 dev = &rte_eth_devices[port_id];
1221 rte_eth_dev_info_get(port_id, &dev_info);
1223 /* replay MAC address configuration including default MAC */
1224 addr = &dev->data->mac_addrs[0];
1225 if (*dev->dev_ops->mac_addr_set != NULL)
1226 (*dev->dev_ops->mac_addr_set)(dev, addr);
1227 else if (*dev->dev_ops->mac_addr_add != NULL)
1228 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1230 if (*dev->dev_ops->mac_addr_add != NULL) {
1231 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1232 addr = &dev->data->mac_addrs[i];
1234 /* skip zero address */
1235 if (is_zero_ether_addr(addr))
1239 pool_mask = dev->data->mac_pool_sel[i];
1242 if (pool_mask & 1ULL)
1243 (*dev->dev_ops->mac_addr_add)(dev,
1247 } while (pool_mask);
1251 /* replay promiscuous configuration */
1252 if (rte_eth_promiscuous_get(port_id) == 1)
1253 rte_eth_promiscuous_enable(port_id);
1254 else if (rte_eth_promiscuous_get(port_id) == 0)
1255 rte_eth_promiscuous_disable(port_id);
1257 /* replay all multicast configuration */
1258 if (rte_eth_allmulticast_get(port_id) == 1)
1259 rte_eth_allmulticast_enable(port_id);
1260 else if (rte_eth_allmulticast_get(port_id) == 0)
1261 rte_eth_allmulticast_disable(port_id);
1265 rte_eth_dev_start(uint16_t port_id)
1267 struct rte_eth_dev *dev;
1270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1272 dev = &rte_eth_devices[port_id];
1274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1276 if (dev->data->dev_started != 0) {
1277 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1278 " already started\n",
1283 diag = (*dev->dev_ops->dev_start)(dev);
1285 dev->data->dev_started = 1;
1287 return eth_err(port_id, diag);
1289 rte_eth_dev_config_restore(port_id);
1291 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1293 (*dev->dev_ops->link_update)(dev, 0);
1299 rte_eth_dev_stop(uint16_t port_id)
1301 struct rte_eth_dev *dev;
1303 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1304 dev = &rte_eth_devices[port_id];
1306 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1308 if (dev->data->dev_started == 0) {
1309 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1310 " already stopped\n",
1315 dev->data->dev_started = 0;
1316 (*dev->dev_ops->dev_stop)(dev);
1320 rte_eth_dev_set_link_up(uint16_t port_id)
1322 struct rte_eth_dev *dev;
1324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1326 dev = &rte_eth_devices[port_id];
1328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1329 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1333 rte_eth_dev_set_link_down(uint16_t port_id)
1335 struct rte_eth_dev *dev;
1337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1339 dev = &rte_eth_devices[port_id];
1341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1342 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1346 rte_eth_dev_close(uint16_t port_id)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1351 dev = &rte_eth_devices[port_id];
1353 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1354 dev->data->dev_started = 0;
1355 (*dev->dev_ops->dev_close)(dev);
1357 dev->data->nb_rx_queues = 0;
1358 rte_free(dev->data->rx_queues);
1359 dev->data->rx_queues = NULL;
1360 dev->data->nb_tx_queues = 0;
1361 rte_free(dev->data->tx_queues);
1362 dev->data->tx_queues = NULL;
1366 rte_eth_dev_reset(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1376 rte_eth_dev_stop(port_id);
1377 ret = dev->dev_ops->dev_reset(dev);
1379 return eth_err(port_id, ret);
1382 int __rte_experimental
1383 rte_eth_dev_is_removed(uint16_t port_id)
1385 struct rte_eth_dev *dev;
1388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1390 dev = &rte_eth_devices[port_id];
1392 if (dev->state == RTE_ETH_DEV_REMOVED)
1395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1397 ret = dev->dev_ops->is_removed(dev);
1399 /* Device is physically removed. */
1400 dev->state = RTE_ETH_DEV_REMOVED;
1406 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1407 uint16_t nb_rx_desc, unsigned int socket_id,
1408 const struct rte_eth_rxconf *rx_conf,
1409 struct rte_mempool *mp)
1412 uint32_t mbp_buf_size;
1413 struct rte_eth_dev *dev;
1414 struct rte_eth_dev_info dev_info;
1415 struct rte_eth_rxconf local_conf;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1420 dev = &rte_eth_devices[port_id];
1421 if (rx_queue_id >= dev->data->nb_rx_queues) {
1422 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1426 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1430 * Check the size of the mbuf data buffer.
1431 * This value must be provided in the private data of the memory pool.
1432 * First check that the memory pool has a valid private data.
1434 rte_eth_dev_info_get(port_id, &dev_info);
1435 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1436 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1437 mp->name, (int) mp->private_data_size,
1438 (int) sizeof(struct rte_pktmbuf_pool_private));
1441 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1443 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1444 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1445 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1449 (int)(RTE_PKTMBUF_HEADROOM +
1450 dev_info.min_rx_bufsize),
1451 (int)RTE_PKTMBUF_HEADROOM,
1452 (int)dev_info.min_rx_bufsize);
1456 /* Use default specified by driver, if nb_rx_desc is zero */
1457 if (nb_rx_desc == 0) {
1458 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1459 /* If driver default is also zero, fall back on EAL default */
1460 if (nb_rx_desc == 0)
1461 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1464 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1465 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1466 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1468 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1469 "should be: <= %hu, = %hu, and a product of %hu\n",
1471 dev_info.rx_desc_lim.nb_max,
1472 dev_info.rx_desc_lim.nb_min,
1473 dev_info.rx_desc_lim.nb_align);
1477 if (dev->data->dev_started &&
1478 !(dev_info.dev_capa &
1479 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1482 if (dev->data->rx_queue_state[rx_queue_id] !=
1483 RTE_ETH_QUEUE_STATE_STOPPED)
1486 rxq = dev->data->rx_queues;
1487 if (rxq[rx_queue_id]) {
1488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1490 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1491 rxq[rx_queue_id] = NULL;
1494 if (rx_conf == NULL)
1495 rx_conf = &dev_info.default_rxconf;
1497 local_conf = *rx_conf;
1498 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1500 * Reflect port offloads to queue offloads in order for
1501 * offloads to not be discarded.
1503 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1504 &local_conf.offloads);
1507 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1508 socket_id, &local_conf, mp);
1510 if (!dev->data->min_rx_buf_size ||
1511 dev->data->min_rx_buf_size > mbp_buf_size)
1512 dev->data->min_rx_buf_size = mbp_buf_size;
1515 return eth_err(port_id, ret);
1519 * Convert from tx offloads to txq_flags.
1522 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1526 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1527 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1528 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1529 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1530 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1531 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1532 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1533 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1534 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1535 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1536 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1537 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1543 * A conversion function from txq_flags API.
1546 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1548 uint64_t offloads = 0;
1550 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1551 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1552 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1553 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1554 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1555 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1556 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1557 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1558 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1559 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1560 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1561 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1562 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1564 *tx_offloads = offloads;
1568 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1569 uint16_t nb_tx_desc, unsigned int socket_id,
1570 const struct rte_eth_txconf *tx_conf)
1572 struct rte_eth_dev *dev;
1573 struct rte_eth_dev_info dev_info;
1574 struct rte_eth_txconf local_conf;
1577 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1579 dev = &rte_eth_devices[port_id];
1580 if (tx_queue_id >= dev->data->nb_tx_queues) {
1581 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1586 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1588 rte_eth_dev_info_get(port_id, &dev_info);
1590 /* Use default specified by driver, if nb_tx_desc is zero */
1591 if (nb_tx_desc == 0) {
1592 nb_tx_desc = dev_info.default_txportconf.ring_size;
1593 /* If driver default is zero, fall back on EAL default */
1594 if (nb_tx_desc == 0)
1595 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1597 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1598 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1599 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1600 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1601 "should be: <= %hu, = %hu, and a product of %hu\n",
1603 dev_info.tx_desc_lim.nb_max,
1604 dev_info.tx_desc_lim.nb_min,
1605 dev_info.tx_desc_lim.nb_align);
1609 if (dev->data->dev_started &&
1610 !(dev_info.dev_capa &
1611 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1614 if (dev->data->tx_queue_state[tx_queue_id] !=
1615 RTE_ETH_QUEUE_STATE_STOPPED)
1618 txq = dev->data->tx_queues;
1619 if (txq[tx_queue_id]) {
1620 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1622 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1623 txq[tx_queue_id] = NULL;
1626 if (tx_conf == NULL)
1627 tx_conf = &dev_info.default_txconf;
1630 * Convert between the offloads API to enable PMDs to support
1633 local_conf = *tx_conf;
1634 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1635 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1636 &local_conf.offloads);
1639 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1640 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1644 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1645 void *userdata __rte_unused)
1649 for (i = 0; i < unsent; i++)
1650 rte_pktmbuf_free(pkts[i]);
1654 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1657 uint64_t *count = userdata;
1660 for (i = 0; i < unsent; i++)
1661 rte_pktmbuf_free(pkts[i]);
1667 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1668 buffer_tx_error_fn cbfn, void *userdata)
1670 buffer->error_callback = cbfn;
1671 buffer->error_userdata = userdata;
1676 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1683 buffer->size = size;
1684 if (buffer->error_callback == NULL) {
1685 ret = rte_eth_tx_buffer_set_err_callback(
1686 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1693 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1695 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1698 /* Validate Input Data. Bail if not valid or not supported. */
1699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1702 /* Call driver to free pending mbufs. */
1703 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1705 return eth_err(port_id, ret);
1709 rte_eth_promiscuous_enable(uint16_t port_id)
1711 struct rte_eth_dev *dev;
1713 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1714 dev = &rte_eth_devices[port_id];
1716 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1717 (*dev->dev_ops->promiscuous_enable)(dev);
1718 dev->data->promiscuous = 1;
1722 rte_eth_promiscuous_disable(uint16_t port_id)
1724 struct rte_eth_dev *dev;
1726 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1727 dev = &rte_eth_devices[port_id];
1729 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1730 dev->data->promiscuous = 0;
1731 (*dev->dev_ops->promiscuous_disable)(dev);
1735 rte_eth_promiscuous_get(uint16_t port_id)
1737 struct rte_eth_dev *dev;
1739 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1741 dev = &rte_eth_devices[port_id];
1742 return dev->data->promiscuous;
1746 rte_eth_allmulticast_enable(uint16_t port_id)
1748 struct rte_eth_dev *dev;
1750 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1751 dev = &rte_eth_devices[port_id];
1753 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1754 (*dev->dev_ops->allmulticast_enable)(dev);
1755 dev->data->all_multicast = 1;
1759 rte_eth_allmulticast_disable(uint16_t port_id)
1761 struct rte_eth_dev *dev;
1763 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1764 dev = &rte_eth_devices[port_id];
1766 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1767 dev->data->all_multicast = 0;
1768 (*dev->dev_ops->allmulticast_disable)(dev);
1772 rte_eth_allmulticast_get(uint16_t port_id)
1774 struct rte_eth_dev *dev;
1776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1778 dev = &rte_eth_devices[port_id];
1779 return dev->data->all_multicast;
1783 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1785 struct rte_eth_dev *dev;
1787 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1788 dev = &rte_eth_devices[port_id];
1790 if (dev->data->dev_conf.intr_conf.lsc &&
1791 dev->data->dev_started)
1792 rte_eth_linkstatus_get(dev, eth_link);
1794 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1795 (*dev->dev_ops->link_update)(dev, 1);
1796 *eth_link = dev->data->dev_link;
1801 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1803 struct rte_eth_dev *dev;
1805 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1806 dev = &rte_eth_devices[port_id];
1808 if (dev->data->dev_conf.intr_conf.lsc &&
1809 dev->data->dev_started)
1810 rte_eth_linkstatus_get(dev, eth_link);
1812 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1813 (*dev->dev_ops->link_update)(dev, 0);
1814 *eth_link = dev->data->dev_link;
1819 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1821 struct rte_eth_dev *dev;
1823 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1825 dev = &rte_eth_devices[port_id];
1826 memset(stats, 0, sizeof(*stats));
1828 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1829 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1830 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1834 rte_eth_stats_reset(uint16_t port_id)
1836 struct rte_eth_dev *dev;
1838 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1839 dev = &rte_eth_devices[port_id];
1841 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1842 (*dev->dev_ops->stats_reset)(dev);
1843 dev->data->rx_mbuf_alloc_failed = 0;
1849 get_xstats_basic_count(struct rte_eth_dev *dev)
1851 uint16_t nb_rxqs, nb_txqs;
1854 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1855 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1857 count = RTE_NB_STATS;
1858 count += nb_rxqs * RTE_NB_RXQ_STATS;
1859 count += nb_txqs * RTE_NB_TXQ_STATS;
1865 get_xstats_count(uint16_t port_id)
1867 struct rte_eth_dev *dev;
1870 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1871 dev = &rte_eth_devices[port_id];
1872 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1873 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1876 return eth_err(port_id, count);
1878 if (dev->dev_ops->xstats_get_names != NULL) {
1879 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1881 return eth_err(port_id, count);
1886 count += get_xstats_basic_count(dev);
1892 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1895 int cnt_xstats, idx_xstat;
1897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1900 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1905 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1910 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1911 if (cnt_xstats < 0) {
1912 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1916 /* Get id-name lookup table */
1917 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1919 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1920 port_id, xstats_names, cnt_xstats, NULL)) {
1921 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1925 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1926 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1935 /* retrieve basic stats names */
1937 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1938 struct rte_eth_xstat_name *xstats_names)
1940 int cnt_used_entries = 0;
1941 uint32_t idx, id_queue;
1944 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1945 snprintf(xstats_names[cnt_used_entries].name,
1946 sizeof(xstats_names[0].name),
1947 "%s", rte_stats_strings[idx].name);
1950 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1951 for (id_queue = 0; id_queue < num_q; id_queue++) {
1952 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1953 snprintf(xstats_names[cnt_used_entries].name,
1954 sizeof(xstats_names[0].name),
1956 id_queue, rte_rxq_stats_strings[idx].name);
1961 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1962 for (id_queue = 0; id_queue < num_q; id_queue++) {
1963 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1964 snprintf(xstats_names[cnt_used_entries].name,
1965 sizeof(xstats_names[0].name),
1967 id_queue, rte_txq_stats_strings[idx].name);
1971 return cnt_used_entries;
1974 /* retrieve ethdev extended statistics names */
1976 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1977 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1980 struct rte_eth_xstat_name *xstats_names_copy;
1981 unsigned int no_basic_stat_requested = 1;
1982 unsigned int no_ext_stat_requested = 1;
1983 unsigned int expected_entries;
1984 unsigned int basic_count;
1985 struct rte_eth_dev *dev;
1989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1990 dev = &rte_eth_devices[port_id];
1992 basic_count = get_xstats_basic_count(dev);
1993 ret = get_xstats_count(port_id);
1996 expected_entries = (unsigned int)ret;
1998 /* Return max number of stats if no ids given */
2001 return expected_entries;
2002 else if (xstats_names && size < expected_entries)
2003 return expected_entries;
2006 if (ids && !xstats_names)
2009 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2010 uint64_t ids_copy[size];
2012 for (i = 0; i < size; i++) {
2013 if (ids[i] < basic_count) {
2014 no_basic_stat_requested = 0;
2019 * Convert ids to xstats ids that PMD knows.
2020 * ids known by user are basic + extended stats.
2022 ids_copy[i] = ids[i] - basic_count;
2025 if (no_basic_stat_requested)
2026 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2027 xstats_names, ids_copy, size);
2030 /* Retrieve all stats */
2032 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2034 if (num_stats < 0 || num_stats > (int)expected_entries)
2037 return expected_entries;
2040 xstats_names_copy = calloc(expected_entries,
2041 sizeof(struct rte_eth_xstat_name));
2043 if (!xstats_names_copy) {
2044 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2049 for (i = 0; i < size; i++) {
2050 if (ids[i] >= basic_count) {
2051 no_ext_stat_requested = 0;
2057 /* Fill xstats_names_copy structure */
2058 if (ids && no_ext_stat_requested) {
2059 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2061 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2064 free(xstats_names_copy);
2070 for (i = 0; i < size; i++) {
2071 if (ids[i] >= expected_entries) {
2072 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2073 free(xstats_names_copy);
2076 xstats_names[i] = xstats_names_copy[ids[i]];
2079 free(xstats_names_copy);
2084 rte_eth_xstats_get_names(uint16_t port_id,
2085 struct rte_eth_xstat_name *xstats_names,
2088 struct rte_eth_dev *dev;
2089 int cnt_used_entries;
2090 int cnt_expected_entries;
2091 int cnt_driver_entries;
2093 cnt_expected_entries = get_xstats_count(port_id);
2094 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2095 (int)size < cnt_expected_entries)
2096 return cnt_expected_entries;
2098 /* port_id checked in get_xstats_count() */
2099 dev = &rte_eth_devices[port_id];
2101 cnt_used_entries = rte_eth_basic_stats_get_names(
2104 if (dev->dev_ops->xstats_get_names != NULL) {
2105 /* If there are any driver-specific xstats, append them
2108 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2110 xstats_names + cnt_used_entries,
2111 size - cnt_used_entries);
2112 if (cnt_driver_entries < 0)
2113 return eth_err(port_id, cnt_driver_entries);
2114 cnt_used_entries += cnt_driver_entries;
2117 return cnt_used_entries;
2122 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2124 struct rte_eth_dev *dev;
2125 struct rte_eth_stats eth_stats;
2126 unsigned int count = 0, i, q;
2127 uint64_t val, *stats_ptr;
2128 uint16_t nb_rxqs, nb_txqs;
2131 ret = rte_eth_stats_get(port_id, ð_stats);
2135 dev = &rte_eth_devices[port_id];
2137 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2138 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2141 for (i = 0; i < RTE_NB_STATS; i++) {
2142 stats_ptr = RTE_PTR_ADD(ð_stats,
2143 rte_stats_strings[i].offset);
2145 xstats[count++].value = val;
2149 for (q = 0; q < nb_rxqs; q++) {
2150 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2151 stats_ptr = RTE_PTR_ADD(ð_stats,
2152 rte_rxq_stats_strings[i].offset +
2153 q * sizeof(uint64_t));
2155 xstats[count++].value = val;
2160 for (q = 0; q < nb_txqs; q++) {
2161 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2162 stats_ptr = RTE_PTR_ADD(ð_stats,
2163 rte_txq_stats_strings[i].offset +
2164 q * sizeof(uint64_t));
2166 xstats[count++].value = val;
2172 /* retrieve ethdev extended statistics */
2174 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2175 uint64_t *values, unsigned int size)
2177 unsigned int no_basic_stat_requested = 1;
2178 unsigned int no_ext_stat_requested = 1;
2179 unsigned int num_xstats_filled;
2180 unsigned int basic_count;
2181 uint16_t expected_entries;
2182 struct rte_eth_dev *dev;
2186 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2187 ret = get_xstats_count(port_id);
2190 expected_entries = (uint16_t)ret;
2191 struct rte_eth_xstat xstats[expected_entries];
2192 dev = &rte_eth_devices[port_id];
2193 basic_count = get_xstats_basic_count(dev);
2195 /* Return max number of stats if no ids given */
2198 return expected_entries;
2199 else if (values && size < expected_entries)
2200 return expected_entries;
2206 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2207 unsigned int basic_count = get_xstats_basic_count(dev);
2208 uint64_t ids_copy[size];
2210 for (i = 0; i < size; i++) {
2211 if (ids[i] < basic_count) {
2212 no_basic_stat_requested = 0;
2217 * Convert ids to xstats ids that PMD knows.
2218 * ids known by user are basic + extended stats.
2220 ids_copy[i] = ids[i] - basic_count;
2223 if (no_basic_stat_requested)
2224 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2229 for (i = 0; i < size; i++) {
2230 if (ids[i] >= basic_count) {
2231 no_ext_stat_requested = 0;
2237 /* Fill the xstats structure */
2238 if (ids && no_ext_stat_requested)
2239 ret = rte_eth_basic_stats_get(port_id, xstats);
2241 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2245 num_xstats_filled = (unsigned int)ret;
2247 /* Return all stats */
2249 for (i = 0; i < num_xstats_filled; i++)
2250 values[i] = xstats[i].value;
2251 return expected_entries;
2255 for (i = 0; i < size; i++) {
2256 if (ids[i] >= expected_entries) {
2257 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2260 values[i] = xstats[ids[i]].value;
2266 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2269 struct rte_eth_dev *dev;
2270 unsigned int count = 0, i;
2271 signed int xcount = 0;
2272 uint16_t nb_rxqs, nb_txqs;
2275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2277 dev = &rte_eth_devices[port_id];
2279 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2280 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2282 /* Return generic statistics */
2283 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2284 (nb_txqs * RTE_NB_TXQ_STATS);
2286 /* implemented by the driver */
2287 if (dev->dev_ops->xstats_get != NULL) {
2288 /* Retrieve the xstats from the driver at the end of the
2291 xcount = (*dev->dev_ops->xstats_get)(dev,
2292 xstats ? xstats + count : NULL,
2293 (n > count) ? n - count : 0);
2296 return eth_err(port_id, xcount);
2299 if (n < count + xcount || xstats == NULL)
2300 return count + xcount;
2302 /* now fill the xstats structure */
2303 ret = rte_eth_basic_stats_get(port_id, xstats);
2308 for (i = 0; i < count; i++)
2310 /* add an offset to driver-specific stats */
2311 for ( ; i < count + xcount; i++)
2312 xstats[i].id += count;
2314 return count + xcount;
2317 /* reset ethdev extended statistics */
2319 rte_eth_xstats_reset(uint16_t port_id)
2321 struct rte_eth_dev *dev;
2323 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2324 dev = &rte_eth_devices[port_id];
2326 /* implemented by the driver */
2327 if (dev->dev_ops->xstats_reset != NULL) {
2328 (*dev->dev_ops->xstats_reset)(dev);
2332 /* fallback to default */
2333 rte_eth_stats_reset(port_id);
2337 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2340 struct rte_eth_dev *dev;
2342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2344 dev = &rte_eth_devices[port_id];
2346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2347 return (*dev->dev_ops->queue_stats_mapping_set)
2348 (dev, queue_id, stat_idx, is_rx);
2353 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2356 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2357 stat_idx, STAT_QMAP_TX));
2362 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2365 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2366 stat_idx, STAT_QMAP_RX));
2370 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2372 struct rte_eth_dev *dev;
2374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2375 dev = &rte_eth_devices[port_id];
2377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2378 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2379 fw_version, fw_size));
2383 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2385 struct rte_eth_dev *dev;
2386 struct rte_eth_txconf *txconf;
2387 const struct rte_eth_desc_lim lim = {
2388 .nb_max = UINT16_MAX,
2393 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2394 dev = &rte_eth_devices[port_id];
2396 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2397 dev_info->rx_desc_lim = lim;
2398 dev_info->tx_desc_lim = lim;
2399 dev_info->device = dev->device;
2401 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2402 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2403 dev_info->driver_name = dev->device->driver->name;
2404 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2405 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2407 dev_info->dev_flags = &dev->data->dev_flags;
2408 txconf = &dev_info->default_txconf;
2409 /* convert offload to txq_flags to support legacy app */
2410 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2414 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2415 uint32_t *ptypes, int num)
2418 struct rte_eth_dev *dev;
2419 const uint32_t *all_ptypes;
2421 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2422 dev = &rte_eth_devices[port_id];
2423 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2424 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2429 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2430 if (all_ptypes[i] & ptype_mask) {
2432 ptypes[j] = all_ptypes[i];
2440 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2442 struct rte_eth_dev *dev;
2444 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2445 dev = &rte_eth_devices[port_id];
2446 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2451 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2453 struct rte_eth_dev *dev;
2455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2457 dev = &rte_eth_devices[port_id];
2458 *mtu = dev->data->mtu;
2463 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2466 struct rte_eth_dev *dev;
2468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2469 dev = &rte_eth_devices[port_id];
2470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2472 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2474 dev->data->mtu = mtu;
2476 return eth_err(port_id, ret);
2480 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2482 struct rte_eth_dev *dev;
2485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2486 dev = &rte_eth_devices[port_id];
2487 if (!(dev->data->dev_conf.rxmode.offloads &
2488 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2489 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2493 if (vlan_id > 4095) {
2494 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2495 port_id, (unsigned) vlan_id);
2498 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2500 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2502 struct rte_vlan_filter_conf *vfc;
2506 vfc = &dev->data->vlan_filter_conf;
2507 vidx = vlan_id / 64;
2508 vbit = vlan_id % 64;
2511 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2513 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2516 return eth_err(port_id, ret);
2520 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2523 struct rte_eth_dev *dev;
2525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2526 dev = &rte_eth_devices[port_id];
2527 if (rx_queue_id >= dev->data->nb_rx_queues) {
2528 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2532 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2533 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2539 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2540 enum rte_vlan_type vlan_type,
2543 struct rte_eth_dev *dev;
2545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2546 dev = &rte_eth_devices[port_id];
2547 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2549 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2554 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2556 struct rte_eth_dev *dev;
2560 uint64_t orig_offloads;
2562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2563 dev = &rte_eth_devices[port_id];
2565 /* save original values in case of failure */
2566 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2568 /*check which option changed by application*/
2569 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2570 org = !!(dev->data->dev_conf.rxmode.offloads &
2571 DEV_RX_OFFLOAD_VLAN_STRIP);
2574 dev->data->dev_conf.rxmode.offloads |=
2575 DEV_RX_OFFLOAD_VLAN_STRIP;
2577 dev->data->dev_conf.rxmode.offloads &=
2578 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2579 mask |= ETH_VLAN_STRIP_MASK;
2582 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2583 org = !!(dev->data->dev_conf.rxmode.offloads &
2584 DEV_RX_OFFLOAD_VLAN_FILTER);
2587 dev->data->dev_conf.rxmode.offloads |=
2588 DEV_RX_OFFLOAD_VLAN_FILTER;
2590 dev->data->dev_conf.rxmode.offloads &=
2591 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2592 mask |= ETH_VLAN_FILTER_MASK;
2595 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2596 org = !!(dev->data->dev_conf.rxmode.offloads &
2597 DEV_RX_OFFLOAD_VLAN_EXTEND);
2600 dev->data->dev_conf.rxmode.offloads |=
2601 DEV_RX_OFFLOAD_VLAN_EXTEND;
2603 dev->data->dev_conf.rxmode.offloads &=
2604 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2605 mask |= ETH_VLAN_EXTEND_MASK;
2612 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2613 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2615 /* hit an error restore original values */
2616 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2619 return eth_err(port_id, ret);
2623 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2625 struct rte_eth_dev *dev;
2628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2629 dev = &rte_eth_devices[port_id];
2631 if (dev->data->dev_conf.rxmode.offloads &
2632 DEV_RX_OFFLOAD_VLAN_STRIP)
2633 ret |= ETH_VLAN_STRIP_OFFLOAD;
2635 if (dev->data->dev_conf.rxmode.offloads &
2636 DEV_RX_OFFLOAD_VLAN_FILTER)
2637 ret |= ETH_VLAN_FILTER_OFFLOAD;
2639 if (dev->data->dev_conf.rxmode.offloads &
2640 DEV_RX_OFFLOAD_VLAN_EXTEND)
2641 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2647 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2649 struct rte_eth_dev *dev;
2651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2652 dev = &rte_eth_devices[port_id];
2653 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2655 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2659 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2661 struct rte_eth_dev *dev;
2663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2664 dev = &rte_eth_devices[port_id];
2665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2666 memset(fc_conf, 0, sizeof(*fc_conf));
2667 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2671 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2673 struct rte_eth_dev *dev;
2675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2676 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2677 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2681 dev = &rte_eth_devices[port_id];
2682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2683 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2687 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2688 struct rte_eth_pfc_conf *pfc_conf)
2690 struct rte_eth_dev *dev;
2692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2693 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2694 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2698 dev = &rte_eth_devices[port_id];
2699 /* High water, low water validation are device specific */
2700 if (*dev->dev_ops->priority_flow_ctrl_set)
2701 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2707 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2715 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2716 for (i = 0; i < num; i++) {
2717 if (reta_conf[i].mask)
2725 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2729 uint16_t i, idx, shift;
2735 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2739 for (i = 0; i < reta_size; i++) {
2740 idx = i / RTE_RETA_GROUP_SIZE;
2741 shift = i % RTE_RETA_GROUP_SIZE;
2742 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2743 (reta_conf[idx].reta[shift] >= max_rxq)) {
2744 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2745 "the maximum rxq index: %u\n", idx, shift,
2746 reta_conf[idx].reta[shift], max_rxq);
2755 rte_eth_dev_rss_reta_update(uint16_t port_id,
2756 struct rte_eth_rss_reta_entry64 *reta_conf,
2759 struct rte_eth_dev *dev;
2762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2763 /* Check mask bits */
2764 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2768 dev = &rte_eth_devices[port_id];
2770 /* Check entry value */
2771 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2772 dev->data->nb_rx_queues);
2776 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2777 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2782 rte_eth_dev_rss_reta_query(uint16_t port_id,
2783 struct rte_eth_rss_reta_entry64 *reta_conf,
2786 struct rte_eth_dev *dev;
2789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2791 /* Check mask bits */
2792 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2796 dev = &rte_eth_devices[port_id];
2797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2798 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2803 rte_eth_dev_rss_hash_update(uint16_t port_id,
2804 struct rte_eth_rss_conf *rss_conf)
2806 struct rte_eth_dev *dev;
2807 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2810 dev = &rte_eth_devices[port_id];
2811 rte_eth_dev_info_get(port_id, &dev_info);
2812 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2813 dev_info.flow_type_rss_offloads) {
2814 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2815 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2818 dev_info.flow_type_rss_offloads);
2820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2821 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2826 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2827 struct rte_eth_rss_conf *rss_conf)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2832 dev = &rte_eth_devices[port_id];
2833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2834 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2839 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2840 struct rte_eth_udp_tunnel *udp_tunnel)
2842 struct rte_eth_dev *dev;
2844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2845 if (udp_tunnel == NULL) {
2846 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2850 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2851 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2855 dev = &rte_eth_devices[port_id];
2856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2857 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2862 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2863 struct rte_eth_udp_tunnel *udp_tunnel)
2865 struct rte_eth_dev *dev;
2867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2868 dev = &rte_eth_devices[port_id];
2870 if (udp_tunnel == NULL) {
2871 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2875 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2876 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2881 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2886 rte_eth_led_on(uint16_t port_id)
2888 struct rte_eth_dev *dev;
2890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2891 dev = &rte_eth_devices[port_id];
2892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2893 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2897 rte_eth_led_off(uint16_t port_id)
2899 struct rte_eth_dev *dev;
2901 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2902 dev = &rte_eth_devices[port_id];
2903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2904 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2908 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2912 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2914 struct rte_eth_dev_info dev_info;
2915 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2919 rte_eth_dev_info_get(port_id, &dev_info);
2921 for (i = 0; i < dev_info.max_mac_addrs; i++)
2922 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2928 static const struct ether_addr null_mac_addr;
2931 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2934 struct rte_eth_dev *dev;
2939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2940 dev = &rte_eth_devices[port_id];
2941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2943 if (is_zero_ether_addr(addr)) {
2944 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2948 if (pool >= ETH_64_POOLS) {
2949 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2953 index = get_mac_addr_index(port_id, addr);
2955 index = get_mac_addr_index(port_id, &null_mac_addr);
2957 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2962 pool_mask = dev->data->mac_pool_sel[index];
2964 /* Check if both MAC address and pool is already there, and do nothing */
2965 if (pool_mask & (1ULL << pool))
2970 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2973 /* Update address in NIC data structure */
2974 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2976 /* Update pool bitmap in NIC data structure */
2977 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2980 return eth_err(port_id, ret);
2984 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2986 struct rte_eth_dev *dev;
2989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2990 dev = &rte_eth_devices[port_id];
2991 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2993 index = get_mac_addr_index(port_id, addr);
2995 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2997 } else if (index < 0)
2998 return 0; /* Do nothing if address wasn't found */
3001 (*dev->dev_ops->mac_addr_remove)(dev, index);
3003 /* Update address in NIC data structure */
3004 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3006 /* reset pool bitmap */
3007 dev->data->mac_pool_sel[index] = 0;
3013 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3015 struct rte_eth_dev *dev;
3018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3020 if (!is_valid_assigned_ether_addr(addr))
3023 dev = &rte_eth_devices[port_id];
3024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3026 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3030 /* Update default address in NIC data structure */
3031 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3038 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3042 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3044 struct rte_eth_dev_info dev_info;
3045 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3048 rte_eth_dev_info_get(port_id, &dev_info);
3049 if (!dev->data->hash_mac_addrs)
3052 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3053 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3054 ETHER_ADDR_LEN) == 0)
3061 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3066 struct rte_eth_dev *dev;
3068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3070 dev = &rte_eth_devices[port_id];
3071 if (is_zero_ether_addr(addr)) {
3072 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3077 index = get_hash_mac_addr_index(port_id, addr);
3078 /* Check if it's already there, and do nothing */
3079 if ((index >= 0) && on)
3084 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3085 "set in UTA\n", port_id);
3089 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3091 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3098 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3100 /* Update address in NIC data structure */
3102 ether_addr_copy(addr,
3103 &dev->data->hash_mac_addrs[index]);
3105 ether_addr_copy(&null_mac_addr,
3106 &dev->data->hash_mac_addrs[index]);
3109 return eth_err(port_id, ret);
3113 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3115 struct rte_eth_dev *dev;
3117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 dev = &rte_eth_devices[port_id];
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3122 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3126 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3129 struct rte_eth_dev *dev;
3130 struct rte_eth_dev_info dev_info;
3131 struct rte_eth_link link;
3133 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3135 dev = &rte_eth_devices[port_id];
3136 rte_eth_dev_info_get(port_id, &dev_info);
3137 link = dev->data->dev_link;
3139 if (queue_idx > dev_info.max_tx_queues) {
3140 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3141 "invalid queue id=%d\n", port_id, queue_idx);
3145 if (tx_rate > link.link_speed) {
3146 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3147 "bigger than link speed= %d\n",
3148 tx_rate, link.link_speed);
3152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3153 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3154 queue_idx, tx_rate));
3158 rte_eth_mirror_rule_set(uint16_t port_id,
3159 struct rte_eth_mirror_conf *mirror_conf,
3160 uint8_t rule_id, uint8_t on)
3162 struct rte_eth_dev *dev;
3164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3165 if (mirror_conf->rule_type == 0) {
3166 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3170 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3171 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3176 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3177 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3178 (mirror_conf->pool_mask == 0)) {
3179 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3183 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3184 mirror_conf->vlan.vlan_mask == 0) {
3185 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3189 dev = &rte_eth_devices[port_id];
3190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3192 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3193 mirror_conf, rule_id, on));
3197 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3199 struct rte_eth_dev *dev;
3201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3203 dev = &rte_eth_devices[port_id];
3204 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3206 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3210 RTE_INIT(eth_dev_init_cb_lists)
3214 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3215 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3219 rte_eth_dev_callback_register(uint16_t port_id,
3220 enum rte_eth_event_type event,
3221 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3223 struct rte_eth_dev *dev;
3224 struct rte_eth_dev_callback *user_cb;
3225 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3231 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3232 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3236 if (port_id == RTE_ETH_ALL) {
3238 last_port = RTE_MAX_ETHPORTS - 1;
3240 next_port = last_port = port_id;
3243 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3246 dev = &rte_eth_devices[next_port];
3248 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3249 if (user_cb->cb_fn == cb_fn &&
3250 user_cb->cb_arg == cb_arg &&
3251 user_cb->event == event) {
3256 /* create a new callback. */
3257 if (user_cb == NULL) {
3258 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3259 sizeof(struct rte_eth_dev_callback), 0);
3260 if (user_cb != NULL) {
3261 user_cb->cb_fn = cb_fn;
3262 user_cb->cb_arg = cb_arg;
3263 user_cb->event = event;
3264 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3267 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3268 rte_eth_dev_callback_unregister(port_id, event,
3274 } while (++next_port <= last_port);
3276 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3281 rte_eth_dev_callback_unregister(uint16_t port_id,
3282 enum rte_eth_event_type event,
3283 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3286 struct rte_eth_dev *dev;
3287 struct rte_eth_dev_callback *cb, *next;
3288 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3294 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3295 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3299 if (port_id == RTE_ETH_ALL) {
3301 last_port = RTE_MAX_ETHPORTS - 1;
3303 next_port = last_port = port_id;
3306 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3309 dev = &rte_eth_devices[next_port];
3311 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3314 next = TAILQ_NEXT(cb, next);
3316 if (cb->cb_fn != cb_fn || cb->event != event ||
3317 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3321 * if this callback is not executing right now,
3324 if (cb->active == 0) {
3325 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3331 } while (++next_port <= last_port);
3333 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3338 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3339 enum rte_eth_event_type event, void *ret_param)
3341 struct rte_eth_dev_callback *cb_lst;
3342 struct rte_eth_dev_callback dev_cb;
3345 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3346 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3347 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3351 if (ret_param != NULL)
3352 dev_cb.ret_param = ret_param;
3354 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3355 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3356 dev_cb.cb_arg, dev_cb.ret_param);
3357 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3360 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3365 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3368 struct rte_eth_dev *dev;
3369 struct rte_intr_handle *intr_handle;
3373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3375 dev = &rte_eth_devices[port_id];
3377 if (!dev->intr_handle) {
3378 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3382 intr_handle = dev->intr_handle;
3383 if (!intr_handle->intr_vec) {
3384 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3388 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3389 vec = intr_handle->intr_vec[qid];
3390 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3391 if (rc && rc != -EEXIST) {
3392 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3393 " op %d epfd %d vec %u\n",
3394 port_id, qid, op, epfd, vec);
3401 const struct rte_memzone *
3402 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3403 uint16_t queue_id, size_t size, unsigned align,
3406 char z_name[RTE_MEMZONE_NAMESIZE];
3407 const struct rte_memzone *mz;
3409 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3410 dev->device->driver->name, ring_name,
3411 dev->data->port_id, queue_id);
3413 mz = rte_memzone_lookup(z_name);
3417 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3418 RTE_MEMZONE_IOVA_CONTIG, align);
3421 int __rte_experimental
3422 rte_eth_dev_create(struct rte_device *device, const char *name,
3423 size_t priv_data_size,
3424 ethdev_bus_specific_init ethdev_bus_specific_init,
3425 void *bus_init_params,
3426 ethdev_init_t ethdev_init, void *init_params)
3428 struct rte_eth_dev *ethdev;
3431 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3433 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3434 ethdev = rte_eth_dev_allocate(name);
3440 if (priv_data_size) {
3441 ethdev->data->dev_private = rte_zmalloc_socket(
3442 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3445 if (!ethdev->data->dev_private) {
3446 RTE_LOG(ERR, EAL, "failed to allocate private data");
3452 ethdev = rte_eth_dev_attach_secondary(name);
3454 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3455 "ethdev doesn't exist");
3461 ethdev->device = device;
3463 if (ethdev_bus_specific_init) {
3464 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3467 "ethdev bus specific initialisation failed");
3472 retval = ethdev_init(ethdev, init_params);
3474 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3480 /* free ports private data if primary process */
3481 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3482 rte_free(ethdev->data->dev_private);
3484 rte_eth_dev_release_port(ethdev);
3489 int __rte_experimental
3490 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3491 ethdev_uninit_t ethdev_uninit)
3495 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3499 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3500 if (ethdev_uninit) {
3501 ret = ethdev_uninit(ethdev);
3506 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3507 rte_free(ethdev->data->dev_private);
3509 ethdev->data->dev_private = NULL;
3511 return rte_eth_dev_release_port(ethdev);
3515 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3516 int epfd, int op, void *data)
3519 struct rte_eth_dev *dev;
3520 struct rte_intr_handle *intr_handle;
3523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3525 dev = &rte_eth_devices[port_id];
3526 if (queue_id >= dev->data->nb_rx_queues) {
3527 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3531 if (!dev->intr_handle) {
3532 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3536 intr_handle = dev->intr_handle;
3537 if (!intr_handle->intr_vec) {
3538 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3542 vec = intr_handle->intr_vec[queue_id];
3543 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3544 if (rc && rc != -EEXIST) {
3545 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3546 " op %d epfd %d vec %u\n",
3547 port_id, queue_id, op, epfd, vec);
3555 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3558 struct rte_eth_dev *dev;
3560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3562 dev = &rte_eth_devices[port_id];
3564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3565 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3570 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3573 struct rte_eth_dev *dev;
3575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3577 dev = &rte_eth_devices[port_id];
3579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3580 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3586 rte_eth_dev_filter_supported(uint16_t port_id,
3587 enum rte_filter_type filter_type)
3589 struct rte_eth_dev *dev;
3591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3593 dev = &rte_eth_devices[port_id];
3594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3595 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3596 RTE_ETH_FILTER_NOP, NULL);
3600 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3601 enum rte_filter_op filter_op, void *arg)
3603 struct rte_eth_dev *dev;
3605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3607 dev = &rte_eth_devices[port_id];
3608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3609 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3613 const struct rte_eth_rxtx_callback *
3614 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3615 rte_rx_callback_fn fn, void *user_param)
3617 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3618 rte_errno = ENOTSUP;
3621 /* check input parameters */
3622 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3623 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3627 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3635 cb->param = user_param;
3637 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3638 /* Add the callbacks in fifo order. */
3639 struct rte_eth_rxtx_callback *tail =
3640 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3643 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3650 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3655 const struct rte_eth_rxtx_callback *
3656 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3657 rte_rx_callback_fn fn, void *user_param)
3659 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3660 rte_errno = ENOTSUP;
3663 /* check input parameters */
3664 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3665 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3670 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3678 cb->param = user_param;
3680 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3681 /* Add the callbacks at fisrt position*/
3682 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3684 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3685 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3690 const struct rte_eth_rxtx_callback *
3691 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3692 rte_tx_callback_fn fn, void *user_param)
3694 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3695 rte_errno = ENOTSUP;
3698 /* check input parameters */
3699 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3700 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3705 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3713 cb->param = user_param;
3715 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3716 /* Add the callbacks in fifo order. */
3717 struct rte_eth_rxtx_callback *tail =
3718 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3721 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3728 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3734 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3735 const struct rte_eth_rxtx_callback *user_cb)
3737 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3740 /* Check input parameters. */
3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3742 if (user_cb == NULL ||
3743 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3746 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3747 struct rte_eth_rxtx_callback *cb;
3748 struct rte_eth_rxtx_callback **prev_cb;
3751 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3752 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3753 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3755 if (cb == user_cb) {
3756 /* Remove the user cb from the callback list. */
3757 *prev_cb = cb->next;
3762 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3768 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3769 const struct rte_eth_rxtx_callback *user_cb)
3771 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3774 /* Check input parameters. */
3775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3776 if (user_cb == NULL ||
3777 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3780 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3782 struct rte_eth_rxtx_callback *cb;
3783 struct rte_eth_rxtx_callback **prev_cb;
3785 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3786 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3787 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3789 if (cb == user_cb) {
3790 /* Remove the user cb from the callback list. */
3791 *prev_cb = cb->next;
3796 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3802 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3803 struct rte_eth_rxq_info *qinfo)
3805 struct rte_eth_dev *dev;
3807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3812 dev = &rte_eth_devices[port_id];
3813 if (queue_id >= dev->data->nb_rx_queues) {
3814 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3820 memset(qinfo, 0, sizeof(*qinfo));
3821 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3826 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3827 struct rte_eth_txq_info *qinfo)
3829 struct rte_eth_dev *dev;
3830 struct rte_eth_txconf *txconf = &qinfo->conf;
3832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3837 dev = &rte_eth_devices[port_id];
3838 if (queue_id >= dev->data->nb_tx_queues) {
3839 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3845 memset(qinfo, 0, sizeof(*qinfo));
3846 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3847 /* convert offload to txq_flags to support legacy app */
3848 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3854 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3855 struct ether_addr *mc_addr_set,
3856 uint32_t nb_mc_addr)
3858 struct rte_eth_dev *dev;
3860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3862 dev = &rte_eth_devices[port_id];
3863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3864 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3865 mc_addr_set, nb_mc_addr));
3869 rte_eth_timesync_enable(uint16_t port_id)
3871 struct rte_eth_dev *dev;
3873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3874 dev = &rte_eth_devices[port_id];
3876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3877 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3881 rte_eth_timesync_disable(uint16_t port_id)
3883 struct rte_eth_dev *dev;
3885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3886 dev = &rte_eth_devices[port_id];
3888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3889 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3893 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3896 struct rte_eth_dev *dev;
3898 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3899 dev = &rte_eth_devices[port_id];
3901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3902 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3903 (dev, timestamp, flags));
3907 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3908 struct timespec *timestamp)
3910 struct rte_eth_dev *dev;
3912 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3913 dev = &rte_eth_devices[port_id];
3915 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3916 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3921 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3923 struct rte_eth_dev *dev;
3925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3926 dev = &rte_eth_devices[port_id];
3928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3929 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3934 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3936 struct rte_eth_dev *dev;
3938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3939 dev = &rte_eth_devices[port_id];
3941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3942 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3947 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3949 struct rte_eth_dev *dev;
3951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3952 dev = &rte_eth_devices[port_id];
3954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3955 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3960 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3962 struct rte_eth_dev *dev;
3964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3966 dev = &rte_eth_devices[port_id];
3967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3968 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3972 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3974 struct rte_eth_dev *dev;
3976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3978 dev = &rte_eth_devices[port_id];
3979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3980 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3984 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3986 struct rte_eth_dev *dev;
3988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3990 dev = &rte_eth_devices[port_id];
3991 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3992 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3996 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3998 struct rte_eth_dev *dev;
4000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4002 dev = &rte_eth_devices[port_id];
4003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4004 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4007 int __rte_experimental
4008 rte_eth_dev_get_module_info(uint16_t port_id,
4009 struct rte_eth_dev_module_info *modinfo)
4011 struct rte_eth_dev *dev;
4013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4015 dev = &rte_eth_devices[port_id];
4016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4017 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4020 int __rte_experimental
4021 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4022 struct rte_dev_eeprom_info *info)
4024 struct rte_eth_dev *dev;
4026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4028 dev = &rte_eth_devices[port_id];
4029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4030 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4034 rte_eth_dev_get_dcb_info(uint16_t port_id,
4035 struct rte_eth_dcb_info *dcb_info)
4037 struct rte_eth_dev *dev;
4039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4041 dev = &rte_eth_devices[port_id];
4042 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4044 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4045 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4049 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4050 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4052 struct rte_eth_dev *dev;
4054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4055 if (l2_tunnel == NULL) {
4056 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4060 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4061 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4065 dev = &rte_eth_devices[port_id];
4066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4068 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4073 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4074 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4078 struct rte_eth_dev *dev;
4080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4082 if (l2_tunnel == NULL) {
4083 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4087 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4088 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4093 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4097 dev = &rte_eth_devices[port_id];
4098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4100 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4101 l2_tunnel, mask, en));
4105 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4106 const struct rte_eth_desc_lim *desc_lim)
4108 if (desc_lim->nb_align != 0)
4109 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4111 if (desc_lim->nb_max != 0)
4112 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4114 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4118 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4119 uint16_t *nb_rx_desc,
4120 uint16_t *nb_tx_desc)
4122 struct rte_eth_dev *dev;
4123 struct rte_eth_dev_info dev_info;
4125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4127 dev = &rte_eth_devices[port_id];
4128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4130 rte_eth_dev_info_get(port_id, &dev_info);
4132 if (nb_rx_desc != NULL)
4133 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4135 if (nb_tx_desc != NULL)
4136 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4142 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4144 struct rte_eth_dev *dev;
4146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4151 dev = &rte_eth_devices[port_id];
4153 if (*dev->dev_ops->pool_ops_supported == NULL)
4154 return 1; /* all pools are supported */
4156 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4160 * A set of values to describe the possible states of a switch domain.
4162 enum rte_eth_switch_domain_state {
4163 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4164 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4168 * Array of switch domains available for allocation. Array is sized to
4169 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4170 * ethdev ports in a single process.
4172 struct rte_eth_dev_switch {
4173 enum rte_eth_switch_domain_state state;
4174 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4176 int __rte_experimental
4177 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4181 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4183 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4184 i < RTE_MAX_ETHPORTS; i++) {
4185 if (rte_eth_switch_domains[i].state ==
4186 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4187 rte_eth_switch_domains[i].state =
4188 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4197 int __rte_experimental
4198 rte_eth_switch_domain_free(uint16_t domain_id)
4200 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4201 domain_id >= RTE_MAX_ETHPORTS)
4204 if (rte_eth_switch_domains[domain_id].state !=
4205 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4208 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4213 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4216 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4219 struct rte_kvargs_pair *pair;
4222 arglist->str = strdup(str_in);
4223 if (arglist->str == NULL)
4226 letter = arglist->str;
4229 pair = &arglist->pairs[0];
4232 case 0: /* Initial */
4235 else if (*letter == '\0')
4242 case 1: /* Parsing key */
4243 if (*letter == '=') {
4245 pair->value = letter + 1;
4247 } else if (*letter == ',' || *letter == '\0')
4252 case 2: /* Parsing value */
4255 else if (*letter == ',') {
4258 pair = &arglist->pairs[arglist->count];
4260 } else if (*letter == '\0') {
4263 pair = &arglist->pairs[arglist->count];
4268 case 3: /* Parsing list */
4271 else if (*letter == '\0')
4280 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4288 /* Single element, not a list */
4289 return callback(str, data);
4291 /* Sanity check, then strip the brackets */
4292 str_start = &str[strlen(str) - 1];
4293 if (*str_start != ']') {
4294 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4300 /* Process list elements */
4310 } else if (state == 1) {
4311 if (*str == ',' || *str == '\0') {
4312 if (str > str_start) {
4313 /* Non-empty string fragment */
4315 result = callback(str_start, data);
4328 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4329 const uint16_t max_list)
4331 uint16_t lo, hi, val;
4334 result = sscanf(str, "%hu-%hu", &lo, &hi);
4336 if (*len_list >= max_list)
4338 list[(*len_list)++] = lo;
4339 } else if (result == 2) {
4340 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4342 for (val = lo; val <= hi; val++) {
4343 if (*len_list >= max_list)
4345 list[(*len_list)++] = val;
4354 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4356 struct rte_eth_devargs *eth_da = data;
4358 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4359 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4362 int __rte_experimental
4363 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4365 struct rte_kvargs args;
4366 struct rte_kvargs_pair *pair;
4370 memset(eth_da, 0, sizeof(*eth_da));
4372 result = rte_eth_devargs_tokenise(&args, dargs);
4376 for (i = 0; i < args.count; i++) {
4377 pair = &args.pairs[i];
4378 if (strcmp("representor", pair->key) == 0) {
4379 result = rte_eth_devargs_parse_list(pair->value,
4380 rte_eth_devargs_parse_representor_ports,
4394 RTE_INIT(ethdev_init_log);
4396 ethdev_init_log(void)
4398 ethdev_logtype = rte_log_register("lib.ethdev");
4399 if (ethdev_logtype >= 0)
4400 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);