1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_find_next(uint16_t port_id)
190 while (port_id < RTE_MAX_ETHPORTS &&
191 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
192 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
195 if (port_id >= RTE_MAX_ETHPORTS)
196 return RTE_MAX_ETHPORTS;
202 rte_eth_dev_shared_data_prepare(void)
204 const unsigned flags = 0;
205 const struct rte_memzone *mz;
207 rte_spinlock_lock(&rte_eth_shared_data_lock);
209 if (rte_eth_dev_shared_data == NULL) {
210 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
211 /* Allocate port data and ownership shared memory. */
212 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
213 sizeof(*rte_eth_dev_shared_data),
214 rte_socket_id(), flags);
216 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
218 rte_panic("Cannot allocate ethdev shared data\n");
220 rte_eth_dev_shared_data = mz->addr;
221 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
222 rte_eth_dev_shared_data->next_owner_id =
223 RTE_ETH_DEV_NO_OWNER + 1;
224 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
225 memset(rte_eth_dev_shared_data->data, 0,
226 sizeof(rte_eth_dev_shared_data->data));
230 rte_spinlock_unlock(&rte_eth_shared_data_lock);
234 is_allocated(const struct rte_eth_dev *ethdev)
236 return ethdev->data->name[0] != '\0';
239 static struct rte_eth_dev *
240 _rte_eth_dev_allocated(const char *name)
244 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
245 if (rte_eth_devices[i].data != NULL &&
246 strcmp(rte_eth_devices[i].data->name, name) == 0)
247 return &rte_eth_devices[i];
253 rte_eth_dev_allocated(const char *name)
255 struct rte_eth_dev *ethdev;
257 rte_eth_dev_shared_data_prepare();
259 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
261 ethdev = _rte_eth_dev_allocated(name);
263 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
269 rte_eth_dev_find_free_port(void)
273 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
274 /* Using shared name field to find a free port. */
275 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
276 RTE_ASSERT(rte_eth_devices[i].state ==
281 return RTE_MAX_ETHPORTS;
284 static struct rte_eth_dev *
285 eth_dev_get(uint16_t port_id)
287 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
289 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
291 eth_dev_last_created_port = port_id;
297 rte_eth_dev_allocate(const char *name)
300 struct rte_eth_dev *eth_dev = NULL;
302 rte_eth_dev_shared_data_prepare();
304 /* Synchronize port creation between primary and secondary threads. */
305 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
307 if (_rte_eth_dev_allocated(name) != NULL) {
309 "Ethernet device with name %s already allocated\n",
314 port_id = rte_eth_dev_find_free_port();
315 if (port_id == RTE_MAX_ETHPORTS) {
317 "Reached maximum number of Ethernet ports\n");
321 eth_dev = eth_dev_get(port_id);
322 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
323 eth_dev->data->port_id = port_id;
324 eth_dev->data->mtu = ETHER_MTU;
327 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
333 * Attach to a port already registered by the primary process, which
334 * makes sure that the same device would have the same port id both
335 * in the primary and secondary process.
338 rte_eth_dev_attach_secondary(const char *name)
341 struct rte_eth_dev *eth_dev = NULL;
343 rte_eth_dev_shared_data_prepare();
345 /* Synchronize port attachment to primary port creation and release. */
346 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
348 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
349 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
352 if (i == RTE_MAX_ETHPORTS) {
354 "Device %s is not driven by the primary process\n",
357 eth_dev = eth_dev_get(i);
358 RTE_ASSERT(eth_dev->data->port_id == i);
361 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
366 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
371 rte_eth_dev_shared_data_prepare();
373 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
375 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
377 eth_dev->state = RTE_ETH_DEV_UNUSED;
379 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380 rte_free(eth_dev->data->rx_queues);
381 rte_free(eth_dev->data->tx_queues);
382 rte_free(eth_dev->data->mac_addrs);
383 rte_free(eth_dev->data->hash_mac_addrs);
384 rte_free(eth_dev->data->dev_private);
385 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
388 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
394 rte_eth_dev_is_valid_port(uint16_t port_id)
396 if (port_id >= RTE_MAX_ETHPORTS ||
397 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
404 rte_eth_is_valid_owner_id(uint64_t owner_id)
406 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
407 rte_eth_dev_shared_data->next_owner_id <= owner_id)
413 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
415 while (port_id < RTE_MAX_ETHPORTS &&
416 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
417 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
418 rte_eth_devices[port_id].data->owner.id != owner_id))
421 if (port_id >= RTE_MAX_ETHPORTS)
422 return RTE_MAX_ETHPORTS;
427 int __rte_experimental
428 rte_eth_dev_owner_new(uint64_t *owner_id)
430 rte_eth_dev_shared_data_prepare();
432 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
434 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
436 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
441 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
442 const struct rte_eth_dev_owner *new_owner)
444 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
445 struct rte_eth_dev_owner *port_owner;
448 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
449 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
454 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
455 !rte_eth_is_valid_owner_id(old_owner_id)) {
457 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
458 old_owner_id, new_owner->id);
462 port_owner = &rte_eth_devices[port_id].data->owner;
463 if (port_owner->id != old_owner_id) {
465 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
466 port_id, port_owner->name, port_owner->id);
470 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
472 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
473 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
476 port_owner->id = new_owner->id;
478 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
479 port_id, new_owner->name, new_owner->id);
484 int __rte_experimental
485 rte_eth_dev_owner_set(const uint16_t port_id,
486 const struct rte_eth_dev_owner *owner)
490 rte_eth_dev_shared_data_prepare();
492 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
494 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
496 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
503 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
504 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
507 rte_eth_dev_shared_data_prepare();
509 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
511 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
513 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
517 void __rte_experimental
518 rte_eth_dev_owner_delete(const uint64_t owner_id)
522 rte_eth_dev_shared_data_prepare();
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 if (rte_eth_is_valid_owner_id(owner_id)) {
527 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
528 if (rte_eth_devices[port_id].data->owner.id == owner_id)
529 memset(&rte_eth_devices[port_id].data->owner, 0,
530 sizeof(struct rte_eth_dev_owner));
531 RTE_ETHDEV_LOG(NOTICE,
532 "All port owners owned by %016"PRIx64" identifier have removed\n",
536 "Invalid owner id=%016"PRIx64"\n",
540 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
543 int __rte_experimental
544 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
547 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
549 rte_eth_dev_shared_data_prepare();
551 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
553 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
554 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
558 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
561 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
566 rte_eth_dev_socket_id(uint16_t port_id)
568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
569 return rte_eth_devices[port_id].data->numa_node;
573 rte_eth_dev_get_sec_ctx(uint16_t port_id)
575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
576 return rte_eth_devices[port_id].security_ctx;
580 rte_eth_dev_count(void)
582 return rte_eth_dev_count_avail();
586 rte_eth_dev_count_avail(void)
593 RTE_ETH_FOREACH_DEV(p)
599 uint16_t __rte_experimental
600 rte_eth_dev_count_total(void)
602 uint16_t port, count = 0;
604 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
605 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
612 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
616 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
619 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
623 /* shouldn't check 'rte_eth_devices[i].data',
624 * because it might be overwritten by VDEV PMD */
625 tmp = rte_eth_dev_shared_data->data[port_id].name;
631 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
636 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
640 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
641 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
642 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
652 eth_err(uint16_t port_id, int ret)
656 if (rte_eth_dev_is_removed(port_id))
661 /* attach the new device, then store port_id of the device */
663 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
665 int current = rte_eth_dev_count_total();
666 struct rte_devargs da;
669 memset(&da, 0, sizeof(da));
671 if ((devargs == NULL) || (port_id == NULL)) {
677 if (rte_devargs_parse(&da, devargs))
680 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
684 /* no point looking at the port count if no port exists */
685 if (!rte_eth_dev_count_total()) {
686 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
691 /* if nothing happened, there is a bug here, since some driver told us
692 * it did attach a device, but did not create a port.
693 * FIXME: race condition in case of plug-out of another device
695 if (current == rte_eth_dev_count_total()) {
700 *port_id = eth_dev_last_created_port;
708 /* detach the device, then store the name of the device */
710 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
712 struct rte_device *dev;
717 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
719 dev_flags = rte_eth_devices[port_id].data->dev_flags;
720 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
722 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
726 dev = rte_eth_devices[port_id].device;
730 bus = rte_bus_find_by_device(dev);
734 ret = rte_eal_hotplug_remove(bus->name, dev->name);
738 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
743 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
745 uint16_t old_nb_queues = dev->data->nb_rx_queues;
749 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
750 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
751 sizeof(dev->data->rx_queues[0]) * nb_queues,
752 RTE_CACHE_LINE_SIZE);
753 if (dev->data->rx_queues == NULL) {
754 dev->data->nb_rx_queues = 0;
757 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
760 rxq = dev->data->rx_queues;
762 for (i = nb_queues; i < old_nb_queues; i++)
763 (*dev->dev_ops->rx_queue_release)(rxq[i]);
764 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
765 RTE_CACHE_LINE_SIZE);
768 if (nb_queues > old_nb_queues) {
769 uint16_t new_qs = nb_queues - old_nb_queues;
771 memset(rxq + old_nb_queues, 0,
772 sizeof(rxq[0]) * new_qs);
775 dev->data->rx_queues = rxq;
777 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
780 rxq = dev->data->rx_queues;
782 for (i = nb_queues; i < old_nb_queues; i++)
783 (*dev->dev_ops->rx_queue_release)(rxq[i]);
785 rte_free(dev->data->rx_queues);
786 dev->data->rx_queues = NULL;
788 dev->data->nb_rx_queues = nb_queues;
793 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
795 struct rte_eth_dev *dev;
797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
799 dev = &rte_eth_devices[port_id];
800 if (!dev->data->dev_started) {
802 "Port %u must be started before start any queue\n",
807 if (rx_queue_id >= dev->data->nb_rx_queues) {
808 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
812 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
814 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
816 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
817 rx_queue_id, port_id);
821 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
827 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
829 struct rte_eth_dev *dev;
831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
833 dev = &rte_eth_devices[port_id];
834 if (rx_queue_id >= dev->data->nb_rx_queues) {
835 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
839 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
841 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
843 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
844 rx_queue_id, port_id);
848 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
853 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
855 struct rte_eth_dev *dev;
857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
859 dev = &rte_eth_devices[port_id];
860 if (!dev->data->dev_started) {
862 "Port %u must be started before start any queue\n",
867 if (tx_queue_id >= dev->data->nb_tx_queues) {
868 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
872 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
874 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
876 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
877 tx_queue_id, port_id);
881 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
885 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
887 struct rte_eth_dev *dev;
889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
891 dev = &rte_eth_devices[port_id];
892 if (tx_queue_id >= dev->data->nb_tx_queues) {
893 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
899 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
901 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
902 tx_queue_id, port_id);
906 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
911 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
913 uint16_t old_nb_queues = dev->data->nb_tx_queues;
917 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
918 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
919 sizeof(dev->data->tx_queues[0]) * nb_queues,
920 RTE_CACHE_LINE_SIZE);
921 if (dev->data->tx_queues == NULL) {
922 dev->data->nb_tx_queues = 0;
925 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
928 txq = dev->data->tx_queues;
930 for (i = nb_queues; i < old_nb_queues; i++)
931 (*dev->dev_ops->tx_queue_release)(txq[i]);
932 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
933 RTE_CACHE_LINE_SIZE);
936 if (nb_queues > old_nb_queues) {
937 uint16_t new_qs = nb_queues - old_nb_queues;
939 memset(txq + old_nb_queues, 0,
940 sizeof(txq[0]) * new_qs);
943 dev->data->tx_queues = txq;
945 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
948 txq = dev->data->tx_queues;
950 for (i = nb_queues; i < old_nb_queues; i++)
951 (*dev->dev_ops->tx_queue_release)(txq[i]);
953 rte_free(dev->data->tx_queues);
954 dev->data->tx_queues = NULL;
956 dev->data->nb_tx_queues = nb_queues;
961 rte_eth_speed_bitflag(uint32_t speed, int duplex)
964 case ETH_SPEED_NUM_10M:
965 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
966 case ETH_SPEED_NUM_100M:
967 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
968 case ETH_SPEED_NUM_1G:
969 return ETH_LINK_SPEED_1G;
970 case ETH_SPEED_NUM_2_5G:
971 return ETH_LINK_SPEED_2_5G;
972 case ETH_SPEED_NUM_5G:
973 return ETH_LINK_SPEED_5G;
974 case ETH_SPEED_NUM_10G:
975 return ETH_LINK_SPEED_10G;
976 case ETH_SPEED_NUM_20G:
977 return ETH_LINK_SPEED_20G;
978 case ETH_SPEED_NUM_25G:
979 return ETH_LINK_SPEED_25G;
980 case ETH_SPEED_NUM_40G:
981 return ETH_LINK_SPEED_40G;
982 case ETH_SPEED_NUM_50G:
983 return ETH_LINK_SPEED_50G;
984 case ETH_SPEED_NUM_56G:
985 return ETH_LINK_SPEED_56G;
986 case ETH_SPEED_NUM_100G:
987 return ETH_LINK_SPEED_100G;
993 const char * __rte_experimental
994 rte_eth_dev_rx_offload_name(uint64_t offload)
996 const char *name = "UNKNOWN";
999 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1000 if (offload == rte_rx_offload_names[i].offload) {
1001 name = rte_rx_offload_names[i].name;
1009 const char * __rte_experimental
1010 rte_eth_dev_tx_offload_name(uint64_t offload)
1012 const char *name = "UNKNOWN";
1015 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1016 if (offload == rte_tx_offload_names[i].offload) {
1017 name = rte_tx_offload_names[i].name;
1026 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1027 const struct rte_eth_conf *dev_conf)
1029 struct rte_eth_dev *dev;
1030 struct rte_eth_dev_info dev_info;
1031 struct rte_eth_conf local_conf = *dev_conf;
1034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1036 dev = &rte_eth_devices[port_id];
1038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1041 rte_eth_dev_info_get(port_id, &dev_info);
1043 /* If number of queues specified by application for both Rx and Tx is
1044 * zero, use driver preferred values. This cannot be done individually
1045 * as it is valid for either Tx or Rx (but not both) to be zero.
1046 * If driver does not provide any preferred valued, fall back on
1049 if (nb_rx_q == 0 && nb_tx_q == 0) {
1050 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1052 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1053 nb_tx_q = dev_info.default_txportconf.nb_queues;
1055 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1058 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1060 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1061 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1065 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1067 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1068 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1072 if (dev->data->dev_started) {
1074 "Port %u must be stopped to allow configuration\n",
1079 /* Copy the dev_conf parameter into the dev structure */
1080 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1083 * Check that the numbers of RX and TX queues are not greater
1084 * than the maximum number of RX and TX queues supported by the
1085 * configured device.
1087 if (nb_rx_q > dev_info.max_rx_queues) {
1088 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1089 port_id, nb_rx_q, dev_info.max_rx_queues);
1093 if (nb_tx_q > dev_info.max_tx_queues) {
1094 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1095 port_id, nb_tx_q, dev_info.max_tx_queues);
1099 /* Check that the device supports requested interrupts */
1100 if ((dev_conf->intr_conf.lsc == 1) &&
1101 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1102 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1103 dev->device->driver->name);
1106 if ((dev_conf->intr_conf.rmv == 1) &&
1107 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1108 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1109 dev->device->driver->name);
1114 * If jumbo frames are enabled, check that the maximum RX packet
1115 * length is supported by the configured device.
1117 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1118 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1120 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1121 port_id, dev_conf->rxmode.max_rx_pkt_len,
1122 dev_info.max_rx_pktlen);
1124 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1126 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1127 port_id, dev_conf->rxmode.max_rx_pkt_len,
1128 (unsigned)ETHER_MIN_LEN);
1132 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1133 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1134 /* Use default value */
1135 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1139 /* Any requested offloading must be within its device capabilities */
1140 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1141 local_conf.rxmode.offloads) {
1143 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1144 "capabilities 0x%"PRIx64" in %s()\n",
1145 port_id, local_conf.rxmode.offloads,
1146 dev_info.rx_offload_capa,
1150 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1151 local_conf.txmode.offloads) {
1153 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1154 "capabilities 0x%"PRIx64" in %s()\n",
1155 port_id, local_conf.txmode.offloads,
1156 dev_info.tx_offload_capa,
1161 /* Check that device supports requested rss hash functions. */
1162 if ((dev_info.flow_type_rss_offloads |
1163 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1164 dev_info.flow_type_rss_offloads) {
1166 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1167 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1168 dev_info.flow_type_rss_offloads);
1173 * Setup new number of RX/TX queues and reconfigure device.
1175 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1178 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1183 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1186 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1188 rte_eth_dev_rx_queue_config(dev, 0);
1192 diag = (*dev->dev_ops->dev_configure)(dev);
1194 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1196 rte_eth_dev_rx_queue_config(dev, 0);
1197 rte_eth_dev_tx_queue_config(dev, 0);
1198 return eth_err(port_id, diag);
1201 /* Initialize Rx profiling if enabled at compilation time. */
1202 diag = __rte_eth_dev_profile_init(port_id, dev);
1204 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1206 rte_eth_dev_rx_queue_config(dev, 0);
1207 rte_eth_dev_tx_queue_config(dev, 0);
1208 return eth_err(port_id, diag);
1215 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1217 if (dev->data->dev_started) {
1218 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1219 dev->data->port_id);
1223 rte_eth_dev_rx_queue_config(dev, 0);
1224 rte_eth_dev_tx_queue_config(dev, 0);
1226 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1230 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1231 struct rte_eth_dev_info *dev_info)
1233 struct ether_addr *addr;
1238 /* replay MAC address configuration including default MAC */
1239 addr = &dev->data->mac_addrs[0];
1240 if (*dev->dev_ops->mac_addr_set != NULL)
1241 (*dev->dev_ops->mac_addr_set)(dev, addr);
1242 else if (*dev->dev_ops->mac_addr_add != NULL)
1243 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1245 if (*dev->dev_ops->mac_addr_add != NULL) {
1246 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1247 addr = &dev->data->mac_addrs[i];
1249 /* skip zero address */
1250 if (is_zero_ether_addr(addr))
1254 pool_mask = dev->data->mac_pool_sel[i];
1257 if (pool_mask & 1ULL)
1258 (*dev->dev_ops->mac_addr_add)(dev,
1262 } while (pool_mask);
1268 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1269 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1271 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1272 rte_eth_dev_mac_restore(dev, dev_info);
1274 /* replay promiscuous configuration */
1275 if (rte_eth_promiscuous_get(port_id) == 1)
1276 rte_eth_promiscuous_enable(port_id);
1277 else if (rte_eth_promiscuous_get(port_id) == 0)
1278 rte_eth_promiscuous_disable(port_id);
1280 /* replay all multicast configuration */
1281 if (rte_eth_allmulticast_get(port_id) == 1)
1282 rte_eth_allmulticast_enable(port_id);
1283 else if (rte_eth_allmulticast_get(port_id) == 0)
1284 rte_eth_allmulticast_disable(port_id);
1288 rte_eth_dev_start(uint16_t port_id)
1290 struct rte_eth_dev *dev;
1291 struct rte_eth_dev_info dev_info;
1294 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1296 dev = &rte_eth_devices[port_id];
1298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1300 if (dev->data->dev_started != 0) {
1301 RTE_ETHDEV_LOG(INFO,
1302 "Device with port_id=%"PRIu16" already started\n",
1307 rte_eth_dev_info_get(port_id, &dev_info);
1309 /* Lets restore MAC now if device does not support live change */
1310 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1311 rte_eth_dev_mac_restore(dev, &dev_info);
1313 diag = (*dev->dev_ops->dev_start)(dev);
1315 dev->data->dev_started = 1;
1317 return eth_err(port_id, diag);
1319 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1321 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1323 (*dev->dev_ops->link_update)(dev, 0);
1329 rte_eth_dev_stop(uint16_t port_id)
1331 struct rte_eth_dev *dev;
1333 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1334 dev = &rte_eth_devices[port_id];
1336 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1338 if (dev->data->dev_started == 0) {
1339 RTE_ETHDEV_LOG(INFO,
1340 "Device with port_id=%"PRIu16" already stopped\n",
1345 dev->data->dev_started = 0;
1346 (*dev->dev_ops->dev_stop)(dev);
1350 rte_eth_dev_set_link_up(uint16_t port_id)
1352 struct rte_eth_dev *dev;
1354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1356 dev = &rte_eth_devices[port_id];
1358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1359 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1363 rte_eth_dev_set_link_down(uint16_t port_id)
1365 struct rte_eth_dev *dev;
1367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1369 dev = &rte_eth_devices[port_id];
1371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1372 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1376 rte_eth_dev_close(uint16_t port_id)
1378 struct rte_eth_dev *dev;
1380 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1381 dev = &rte_eth_devices[port_id];
1383 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1384 dev->data->dev_started = 0;
1385 (*dev->dev_ops->dev_close)(dev);
1387 dev->data->nb_rx_queues = 0;
1388 rte_free(dev->data->rx_queues);
1389 dev->data->rx_queues = NULL;
1390 dev->data->nb_tx_queues = 0;
1391 rte_free(dev->data->tx_queues);
1392 dev->data->tx_queues = NULL;
1396 rte_eth_dev_reset(uint16_t port_id)
1398 struct rte_eth_dev *dev;
1401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1402 dev = &rte_eth_devices[port_id];
1404 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1406 rte_eth_dev_stop(port_id);
1407 ret = dev->dev_ops->dev_reset(dev);
1409 return eth_err(port_id, ret);
1412 int __rte_experimental
1413 rte_eth_dev_is_removed(uint16_t port_id)
1415 struct rte_eth_dev *dev;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1420 dev = &rte_eth_devices[port_id];
1422 if (dev->state == RTE_ETH_DEV_REMOVED)
1425 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1427 ret = dev->dev_ops->is_removed(dev);
1429 /* Device is physically removed. */
1430 dev->state = RTE_ETH_DEV_REMOVED;
1436 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1437 uint16_t nb_rx_desc, unsigned int socket_id,
1438 const struct rte_eth_rxconf *rx_conf,
1439 struct rte_mempool *mp)
1442 uint32_t mbp_buf_size;
1443 struct rte_eth_dev *dev;
1444 struct rte_eth_dev_info dev_info;
1445 struct rte_eth_rxconf local_conf;
1448 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1450 dev = &rte_eth_devices[port_id];
1451 if (rx_queue_id >= dev->data->nb_rx_queues) {
1452 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1460 * Check the size of the mbuf data buffer.
1461 * This value must be provided in the private data of the memory pool.
1462 * First check that the memory pool has a valid private data.
1464 rte_eth_dev_info_get(port_id, &dev_info);
1465 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1466 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1467 mp->name, (int)mp->private_data_size,
1468 (int)sizeof(struct rte_pktmbuf_pool_private));
1471 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1473 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1475 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1476 mp->name, (int)mbp_buf_size,
1477 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1478 (int)RTE_PKTMBUF_HEADROOM,
1479 (int)dev_info.min_rx_bufsize);
1483 /* Use default specified by driver, if nb_rx_desc is zero */
1484 if (nb_rx_desc == 0) {
1485 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1486 /* If driver default is also zero, fall back on EAL default */
1487 if (nb_rx_desc == 0)
1488 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1491 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1492 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1493 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1496 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1497 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1498 dev_info.rx_desc_lim.nb_min,
1499 dev_info.rx_desc_lim.nb_align);
1503 if (dev->data->dev_started &&
1504 !(dev_info.dev_capa &
1505 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1508 if (dev->data->dev_started &&
1509 (dev->data->rx_queue_state[rx_queue_id] !=
1510 RTE_ETH_QUEUE_STATE_STOPPED))
1513 rxq = dev->data->rx_queues;
1514 if (rxq[rx_queue_id]) {
1515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1517 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1518 rxq[rx_queue_id] = NULL;
1521 if (rx_conf == NULL)
1522 rx_conf = &dev_info.default_rxconf;
1524 local_conf = *rx_conf;
1527 * If an offloading has already been enabled in
1528 * rte_eth_dev_configure(), it has been enabled on all queues,
1529 * so there is no need to enable it in this queue again.
1530 * The local_conf.offloads input to underlying PMD only carries
1531 * those offloadings which are only enabled on this queue and
1532 * not enabled on all queues.
1534 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1537 * New added offloadings for this queue are those not enabled in
1538 * rte_eth_dev_configure() and they must be per-queue type.
1539 * A pure per-port offloading can't be enabled on a queue while
1540 * disabled on another queue. A pure per-port offloading can't
1541 * be enabled for any queue as new added one if it hasn't been
1542 * enabled in rte_eth_dev_configure().
1544 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1545 local_conf.offloads) {
1547 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1548 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1549 port_id, rx_queue_id, local_conf.offloads,
1550 dev_info.rx_queue_offload_capa,
1555 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1556 socket_id, &local_conf, mp);
1558 if (!dev->data->min_rx_buf_size ||
1559 dev->data->min_rx_buf_size > mbp_buf_size)
1560 dev->data->min_rx_buf_size = mbp_buf_size;
1563 return eth_err(port_id, ret);
1567 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1568 uint16_t nb_tx_desc, unsigned int socket_id,
1569 const struct rte_eth_txconf *tx_conf)
1571 struct rte_eth_dev *dev;
1572 struct rte_eth_dev_info dev_info;
1573 struct rte_eth_txconf local_conf;
1576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1578 dev = &rte_eth_devices[port_id];
1579 if (tx_queue_id >= dev->data->nb_tx_queues) {
1580 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1587 rte_eth_dev_info_get(port_id, &dev_info);
1589 /* Use default specified by driver, if nb_tx_desc is zero */
1590 if (nb_tx_desc == 0) {
1591 nb_tx_desc = dev_info.default_txportconf.ring_size;
1592 /* If driver default is zero, fall back on EAL default */
1593 if (nb_tx_desc == 0)
1594 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1596 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1597 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1598 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1600 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1601 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1602 dev_info.tx_desc_lim.nb_min,
1603 dev_info.tx_desc_lim.nb_align);
1607 if (dev->data->dev_started &&
1608 !(dev_info.dev_capa &
1609 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1612 if (dev->data->dev_started &&
1613 (dev->data->tx_queue_state[tx_queue_id] !=
1614 RTE_ETH_QUEUE_STATE_STOPPED))
1617 txq = dev->data->tx_queues;
1618 if (txq[tx_queue_id]) {
1619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1621 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1622 txq[tx_queue_id] = NULL;
1625 if (tx_conf == NULL)
1626 tx_conf = &dev_info.default_txconf;
1628 local_conf = *tx_conf;
1631 * If an offloading has already been enabled in
1632 * rte_eth_dev_configure(), it has been enabled on all queues,
1633 * so there is no need to enable it in this queue again.
1634 * The local_conf.offloads input to underlying PMD only carries
1635 * those offloadings which are only enabled on this queue and
1636 * not enabled on all queues.
1638 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1641 * New added offloadings for this queue are those not enabled in
1642 * rte_eth_dev_configure() and they must be per-queue type.
1643 * A pure per-port offloading can't be enabled on a queue while
1644 * disabled on another queue. A pure per-port offloading can't
1645 * be enabled for any queue as new added one if it hasn't been
1646 * enabled in rte_eth_dev_configure().
1648 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1649 local_conf.offloads) {
1651 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1652 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1653 port_id, tx_queue_id, local_conf.offloads,
1654 dev_info.tx_queue_offload_capa,
1659 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1660 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1664 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1665 void *userdata __rte_unused)
1669 for (i = 0; i < unsent; i++)
1670 rte_pktmbuf_free(pkts[i]);
1674 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1677 uint64_t *count = userdata;
1680 for (i = 0; i < unsent; i++)
1681 rte_pktmbuf_free(pkts[i]);
1687 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1688 buffer_tx_error_fn cbfn, void *userdata)
1690 buffer->error_callback = cbfn;
1691 buffer->error_userdata = userdata;
1696 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1703 buffer->size = size;
1704 if (buffer->error_callback == NULL) {
1705 ret = rte_eth_tx_buffer_set_err_callback(
1706 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1713 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1715 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1718 /* Validate Input Data. Bail if not valid or not supported. */
1719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1720 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1722 /* Call driver to free pending mbufs. */
1723 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1725 return eth_err(port_id, ret);
1729 rte_eth_promiscuous_enable(uint16_t port_id)
1731 struct rte_eth_dev *dev;
1733 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1734 dev = &rte_eth_devices[port_id];
1736 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1737 (*dev->dev_ops->promiscuous_enable)(dev);
1738 dev->data->promiscuous = 1;
1742 rte_eth_promiscuous_disable(uint16_t port_id)
1744 struct rte_eth_dev *dev;
1746 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1747 dev = &rte_eth_devices[port_id];
1749 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1750 dev->data->promiscuous = 0;
1751 (*dev->dev_ops->promiscuous_disable)(dev);
1755 rte_eth_promiscuous_get(uint16_t port_id)
1757 struct rte_eth_dev *dev;
1759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1761 dev = &rte_eth_devices[port_id];
1762 return dev->data->promiscuous;
1766 rte_eth_allmulticast_enable(uint16_t port_id)
1768 struct rte_eth_dev *dev;
1770 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1771 dev = &rte_eth_devices[port_id];
1773 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1774 (*dev->dev_ops->allmulticast_enable)(dev);
1775 dev->data->all_multicast = 1;
1779 rte_eth_allmulticast_disable(uint16_t port_id)
1781 struct rte_eth_dev *dev;
1783 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1784 dev = &rte_eth_devices[port_id];
1786 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1787 dev->data->all_multicast = 0;
1788 (*dev->dev_ops->allmulticast_disable)(dev);
1792 rte_eth_allmulticast_get(uint16_t port_id)
1794 struct rte_eth_dev *dev;
1796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1798 dev = &rte_eth_devices[port_id];
1799 return dev->data->all_multicast;
1803 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1805 struct rte_eth_dev *dev;
1807 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1808 dev = &rte_eth_devices[port_id];
1810 if (dev->data->dev_conf.intr_conf.lsc &&
1811 dev->data->dev_started)
1812 rte_eth_linkstatus_get(dev, eth_link);
1814 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1815 (*dev->dev_ops->link_update)(dev, 1);
1816 *eth_link = dev->data->dev_link;
1821 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1823 struct rte_eth_dev *dev;
1825 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1826 dev = &rte_eth_devices[port_id];
1828 if (dev->data->dev_conf.intr_conf.lsc &&
1829 dev->data->dev_started)
1830 rte_eth_linkstatus_get(dev, eth_link);
1832 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1833 (*dev->dev_ops->link_update)(dev, 0);
1834 *eth_link = dev->data->dev_link;
1839 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1841 struct rte_eth_dev *dev;
1843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1845 dev = &rte_eth_devices[port_id];
1846 memset(stats, 0, sizeof(*stats));
1848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1849 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1850 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1854 rte_eth_stats_reset(uint16_t port_id)
1856 struct rte_eth_dev *dev;
1858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1859 dev = &rte_eth_devices[port_id];
1861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1862 (*dev->dev_ops->stats_reset)(dev);
1863 dev->data->rx_mbuf_alloc_failed = 0;
1869 get_xstats_basic_count(struct rte_eth_dev *dev)
1871 uint16_t nb_rxqs, nb_txqs;
1874 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1875 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1877 count = RTE_NB_STATS;
1878 count += nb_rxqs * RTE_NB_RXQ_STATS;
1879 count += nb_txqs * RTE_NB_TXQ_STATS;
1885 get_xstats_count(uint16_t port_id)
1887 struct rte_eth_dev *dev;
1890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1891 dev = &rte_eth_devices[port_id];
1892 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1893 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1896 return eth_err(port_id, count);
1898 if (dev->dev_ops->xstats_get_names != NULL) {
1899 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1901 return eth_err(port_id, count);
1906 count += get_xstats_basic_count(dev);
1912 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1915 int cnt_xstats, idx_xstat;
1917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1920 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1925 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1930 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1931 if (cnt_xstats < 0) {
1932 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1936 /* Get id-name lookup table */
1937 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1939 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1940 port_id, xstats_names, cnt_xstats, NULL)) {
1941 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1945 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1946 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1955 /* retrieve basic stats names */
1957 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1958 struct rte_eth_xstat_name *xstats_names)
1960 int cnt_used_entries = 0;
1961 uint32_t idx, id_queue;
1964 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1965 snprintf(xstats_names[cnt_used_entries].name,
1966 sizeof(xstats_names[0].name),
1967 "%s", rte_stats_strings[idx].name);
1970 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1971 for (id_queue = 0; id_queue < num_q; id_queue++) {
1972 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1973 snprintf(xstats_names[cnt_used_entries].name,
1974 sizeof(xstats_names[0].name),
1976 id_queue, rte_rxq_stats_strings[idx].name);
1981 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1982 for (id_queue = 0; id_queue < num_q; id_queue++) {
1983 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1984 snprintf(xstats_names[cnt_used_entries].name,
1985 sizeof(xstats_names[0].name),
1987 id_queue, rte_txq_stats_strings[idx].name);
1991 return cnt_used_entries;
1994 /* retrieve ethdev extended statistics names */
1996 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1997 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2000 struct rte_eth_xstat_name *xstats_names_copy;
2001 unsigned int no_basic_stat_requested = 1;
2002 unsigned int no_ext_stat_requested = 1;
2003 unsigned int expected_entries;
2004 unsigned int basic_count;
2005 struct rte_eth_dev *dev;
2009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2010 dev = &rte_eth_devices[port_id];
2012 basic_count = get_xstats_basic_count(dev);
2013 ret = get_xstats_count(port_id);
2016 expected_entries = (unsigned int)ret;
2018 /* Return max number of stats if no ids given */
2021 return expected_entries;
2022 else if (xstats_names && size < expected_entries)
2023 return expected_entries;
2026 if (ids && !xstats_names)
2029 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2030 uint64_t ids_copy[size];
2032 for (i = 0; i < size; i++) {
2033 if (ids[i] < basic_count) {
2034 no_basic_stat_requested = 0;
2039 * Convert ids to xstats ids that PMD knows.
2040 * ids known by user are basic + extended stats.
2042 ids_copy[i] = ids[i] - basic_count;
2045 if (no_basic_stat_requested)
2046 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2047 xstats_names, ids_copy, size);
2050 /* Retrieve all stats */
2052 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2054 if (num_stats < 0 || num_stats > (int)expected_entries)
2057 return expected_entries;
2060 xstats_names_copy = calloc(expected_entries,
2061 sizeof(struct rte_eth_xstat_name));
2063 if (!xstats_names_copy) {
2064 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2069 for (i = 0; i < size; i++) {
2070 if (ids[i] >= basic_count) {
2071 no_ext_stat_requested = 0;
2077 /* Fill xstats_names_copy structure */
2078 if (ids && no_ext_stat_requested) {
2079 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2081 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2084 free(xstats_names_copy);
2090 for (i = 0; i < size; i++) {
2091 if (ids[i] >= expected_entries) {
2092 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2093 free(xstats_names_copy);
2096 xstats_names[i] = xstats_names_copy[ids[i]];
2099 free(xstats_names_copy);
2104 rte_eth_xstats_get_names(uint16_t port_id,
2105 struct rte_eth_xstat_name *xstats_names,
2108 struct rte_eth_dev *dev;
2109 int cnt_used_entries;
2110 int cnt_expected_entries;
2111 int cnt_driver_entries;
2113 cnt_expected_entries = get_xstats_count(port_id);
2114 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2115 (int)size < cnt_expected_entries)
2116 return cnt_expected_entries;
2118 /* port_id checked in get_xstats_count() */
2119 dev = &rte_eth_devices[port_id];
2121 cnt_used_entries = rte_eth_basic_stats_get_names(
2124 if (dev->dev_ops->xstats_get_names != NULL) {
2125 /* If there are any driver-specific xstats, append them
2128 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2130 xstats_names + cnt_used_entries,
2131 size - cnt_used_entries);
2132 if (cnt_driver_entries < 0)
2133 return eth_err(port_id, cnt_driver_entries);
2134 cnt_used_entries += cnt_driver_entries;
2137 return cnt_used_entries;
2142 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2144 struct rte_eth_dev *dev;
2145 struct rte_eth_stats eth_stats;
2146 unsigned int count = 0, i, q;
2147 uint64_t val, *stats_ptr;
2148 uint16_t nb_rxqs, nb_txqs;
2151 ret = rte_eth_stats_get(port_id, ð_stats);
2155 dev = &rte_eth_devices[port_id];
2157 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2158 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2161 for (i = 0; i < RTE_NB_STATS; i++) {
2162 stats_ptr = RTE_PTR_ADD(ð_stats,
2163 rte_stats_strings[i].offset);
2165 xstats[count++].value = val;
2169 for (q = 0; q < nb_rxqs; q++) {
2170 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2171 stats_ptr = RTE_PTR_ADD(ð_stats,
2172 rte_rxq_stats_strings[i].offset +
2173 q * sizeof(uint64_t));
2175 xstats[count++].value = val;
2180 for (q = 0; q < nb_txqs; q++) {
2181 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2182 stats_ptr = RTE_PTR_ADD(ð_stats,
2183 rte_txq_stats_strings[i].offset +
2184 q * sizeof(uint64_t));
2186 xstats[count++].value = val;
2192 /* retrieve ethdev extended statistics */
2194 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2195 uint64_t *values, unsigned int size)
2197 unsigned int no_basic_stat_requested = 1;
2198 unsigned int no_ext_stat_requested = 1;
2199 unsigned int num_xstats_filled;
2200 unsigned int basic_count;
2201 uint16_t expected_entries;
2202 struct rte_eth_dev *dev;
2206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 ret = get_xstats_count(port_id);
2210 expected_entries = (uint16_t)ret;
2211 struct rte_eth_xstat xstats[expected_entries];
2212 dev = &rte_eth_devices[port_id];
2213 basic_count = get_xstats_basic_count(dev);
2215 /* Return max number of stats if no ids given */
2218 return expected_entries;
2219 else if (values && size < expected_entries)
2220 return expected_entries;
2226 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2227 unsigned int basic_count = get_xstats_basic_count(dev);
2228 uint64_t ids_copy[size];
2230 for (i = 0; i < size; i++) {
2231 if (ids[i] < basic_count) {
2232 no_basic_stat_requested = 0;
2237 * Convert ids to xstats ids that PMD knows.
2238 * ids known by user are basic + extended stats.
2240 ids_copy[i] = ids[i] - basic_count;
2243 if (no_basic_stat_requested)
2244 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2249 for (i = 0; i < size; i++) {
2250 if (ids[i] >= basic_count) {
2251 no_ext_stat_requested = 0;
2257 /* Fill the xstats structure */
2258 if (ids && no_ext_stat_requested)
2259 ret = rte_eth_basic_stats_get(port_id, xstats);
2261 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2265 num_xstats_filled = (unsigned int)ret;
2267 /* Return all stats */
2269 for (i = 0; i < num_xstats_filled; i++)
2270 values[i] = xstats[i].value;
2271 return expected_entries;
2275 for (i = 0; i < size; i++) {
2276 if (ids[i] >= expected_entries) {
2277 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2280 values[i] = xstats[ids[i]].value;
2286 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2289 struct rte_eth_dev *dev;
2290 unsigned int count = 0, i;
2291 signed int xcount = 0;
2292 uint16_t nb_rxqs, nb_txqs;
2295 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2297 dev = &rte_eth_devices[port_id];
2299 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2300 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2302 /* Return generic statistics */
2303 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2304 (nb_txqs * RTE_NB_TXQ_STATS);
2306 /* implemented by the driver */
2307 if (dev->dev_ops->xstats_get != NULL) {
2308 /* Retrieve the xstats from the driver at the end of the
2311 xcount = (*dev->dev_ops->xstats_get)(dev,
2312 xstats ? xstats + count : NULL,
2313 (n > count) ? n - count : 0);
2316 return eth_err(port_id, xcount);
2319 if (n < count + xcount || xstats == NULL)
2320 return count + xcount;
2322 /* now fill the xstats structure */
2323 ret = rte_eth_basic_stats_get(port_id, xstats);
2328 for (i = 0; i < count; i++)
2330 /* add an offset to driver-specific stats */
2331 for ( ; i < count + xcount; i++)
2332 xstats[i].id += count;
2334 return count + xcount;
2337 /* reset ethdev extended statistics */
2339 rte_eth_xstats_reset(uint16_t port_id)
2341 struct rte_eth_dev *dev;
2343 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2344 dev = &rte_eth_devices[port_id];
2346 /* implemented by the driver */
2347 if (dev->dev_ops->xstats_reset != NULL) {
2348 (*dev->dev_ops->xstats_reset)(dev);
2352 /* fallback to default */
2353 rte_eth_stats_reset(port_id);
2357 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2360 struct rte_eth_dev *dev;
2362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2364 dev = &rte_eth_devices[port_id];
2366 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2368 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2371 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2374 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2377 return (*dev->dev_ops->queue_stats_mapping_set)
2378 (dev, queue_id, stat_idx, is_rx);
2383 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2386 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2387 stat_idx, STAT_QMAP_TX));
2392 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2395 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2396 stat_idx, STAT_QMAP_RX));
2400 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2402 struct rte_eth_dev *dev;
2404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2405 dev = &rte_eth_devices[port_id];
2407 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2408 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2409 fw_version, fw_size));
2413 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2415 struct rte_eth_dev *dev;
2416 const struct rte_eth_desc_lim lim = {
2417 .nb_max = UINT16_MAX,
2422 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2423 dev = &rte_eth_devices[port_id];
2425 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2426 dev_info->rx_desc_lim = lim;
2427 dev_info->tx_desc_lim = lim;
2428 dev_info->device = dev->device;
2430 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2431 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2432 dev_info->driver_name = dev->device->driver->name;
2433 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2434 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2436 dev_info->dev_flags = &dev->data->dev_flags;
2440 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2441 uint32_t *ptypes, int num)
2444 struct rte_eth_dev *dev;
2445 const uint32_t *all_ptypes;
2447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2448 dev = &rte_eth_devices[port_id];
2449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2450 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2455 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2456 if (all_ptypes[i] & ptype_mask) {
2458 ptypes[j] = all_ptypes[i];
2466 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2468 struct rte_eth_dev *dev;
2470 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2471 dev = &rte_eth_devices[port_id];
2472 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2477 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2479 struct rte_eth_dev *dev;
2481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2483 dev = &rte_eth_devices[port_id];
2484 *mtu = dev->data->mtu;
2489 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2492 struct rte_eth_dev *dev;
2494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2495 dev = &rte_eth_devices[port_id];
2496 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2498 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2500 dev->data->mtu = mtu;
2502 return eth_err(port_id, ret);
2506 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2508 struct rte_eth_dev *dev;
2511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2512 dev = &rte_eth_devices[port_id];
2513 if (!(dev->data->dev_conf.rxmode.offloads &
2514 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2515 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2520 if (vlan_id > 4095) {
2521 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2527 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2529 struct rte_vlan_filter_conf *vfc;
2533 vfc = &dev->data->vlan_filter_conf;
2534 vidx = vlan_id / 64;
2535 vbit = vlan_id % 64;
2538 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2540 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2543 return eth_err(port_id, ret);
2547 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2550 struct rte_eth_dev *dev;
2552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2553 dev = &rte_eth_devices[port_id];
2554 if (rx_queue_id >= dev->data->nb_rx_queues) {
2555 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2559 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2560 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2566 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2567 enum rte_vlan_type vlan_type,
2570 struct rte_eth_dev *dev;
2572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2573 dev = &rte_eth_devices[port_id];
2574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2576 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2581 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2583 struct rte_eth_dev *dev;
2587 uint64_t orig_offloads;
2589 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2590 dev = &rte_eth_devices[port_id];
2592 /* save original values in case of failure */
2593 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2595 /*check which option changed by application*/
2596 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2597 org = !!(dev->data->dev_conf.rxmode.offloads &
2598 DEV_RX_OFFLOAD_VLAN_STRIP);
2601 dev->data->dev_conf.rxmode.offloads |=
2602 DEV_RX_OFFLOAD_VLAN_STRIP;
2604 dev->data->dev_conf.rxmode.offloads &=
2605 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2606 mask |= ETH_VLAN_STRIP_MASK;
2609 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2610 org = !!(dev->data->dev_conf.rxmode.offloads &
2611 DEV_RX_OFFLOAD_VLAN_FILTER);
2614 dev->data->dev_conf.rxmode.offloads |=
2615 DEV_RX_OFFLOAD_VLAN_FILTER;
2617 dev->data->dev_conf.rxmode.offloads &=
2618 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2619 mask |= ETH_VLAN_FILTER_MASK;
2622 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2623 org = !!(dev->data->dev_conf.rxmode.offloads &
2624 DEV_RX_OFFLOAD_VLAN_EXTEND);
2627 dev->data->dev_conf.rxmode.offloads |=
2628 DEV_RX_OFFLOAD_VLAN_EXTEND;
2630 dev->data->dev_conf.rxmode.offloads &=
2631 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2632 mask |= ETH_VLAN_EXTEND_MASK;
2639 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2640 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2642 /* hit an error restore original values */
2643 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2646 return eth_err(port_id, ret);
2650 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2652 struct rte_eth_dev *dev;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2656 dev = &rte_eth_devices[port_id];
2658 if (dev->data->dev_conf.rxmode.offloads &
2659 DEV_RX_OFFLOAD_VLAN_STRIP)
2660 ret |= ETH_VLAN_STRIP_OFFLOAD;
2662 if (dev->data->dev_conf.rxmode.offloads &
2663 DEV_RX_OFFLOAD_VLAN_FILTER)
2664 ret |= ETH_VLAN_FILTER_OFFLOAD;
2666 if (dev->data->dev_conf.rxmode.offloads &
2667 DEV_RX_OFFLOAD_VLAN_EXTEND)
2668 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2674 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2676 struct rte_eth_dev *dev;
2678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2679 dev = &rte_eth_devices[port_id];
2680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2682 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2686 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2688 struct rte_eth_dev *dev;
2690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2691 dev = &rte_eth_devices[port_id];
2692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2693 memset(fc_conf, 0, sizeof(*fc_conf));
2694 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2698 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2700 struct rte_eth_dev *dev;
2702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2703 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2704 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2708 dev = &rte_eth_devices[port_id];
2709 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2710 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2714 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2715 struct rte_eth_pfc_conf *pfc_conf)
2717 struct rte_eth_dev *dev;
2719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2720 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2721 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2725 dev = &rte_eth_devices[port_id];
2726 /* High water, low water validation are device specific */
2727 if (*dev->dev_ops->priority_flow_ctrl_set)
2728 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2734 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2742 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2743 for (i = 0; i < num; i++) {
2744 if (reta_conf[i].mask)
2752 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2756 uint16_t i, idx, shift;
2762 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2766 for (i = 0; i < reta_size; i++) {
2767 idx = i / RTE_RETA_GROUP_SIZE;
2768 shift = i % RTE_RETA_GROUP_SIZE;
2769 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2770 (reta_conf[idx].reta[shift] >= max_rxq)) {
2772 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2774 reta_conf[idx].reta[shift], max_rxq);
2783 rte_eth_dev_rss_reta_update(uint16_t port_id,
2784 struct rte_eth_rss_reta_entry64 *reta_conf,
2787 struct rte_eth_dev *dev;
2790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2791 /* Check mask bits */
2792 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2796 dev = &rte_eth_devices[port_id];
2798 /* Check entry value */
2799 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2800 dev->data->nb_rx_queues);
2804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2805 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2810 rte_eth_dev_rss_reta_query(uint16_t port_id,
2811 struct rte_eth_rss_reta_entry64 *reta_conf,
2814 struct rte_eth_dev *dev;
2817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2819 /* Check mask bits */
2820 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2824 dev = &rte_eth_devices[port_id];
2825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2826 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2831 rte_eth_dev_rss_hash_update(uint16_t port_id,
2832 struct rte_eth_rss_conf *rss_conf)
2834 struct rte_eth_dev *dev;
2835 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2838 dev = &rte_eth_devices[port_id];
2839 rte_eth_dev_info_get(port_id, &dev_info);
2840 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2841 dev_info.flow_type_rss_offloads) {
2843 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2844 port_id, rss_conf->rss_hf,
2845 dev_info.flow_type_rss_offloads);
2848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2849 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2854 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2855 struct rte_eth_rss_conf *rss_conf)
2857 struct rte_eth_dev *dev;
2859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2860 dev = &rte_eth_devices[port_id];
2861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2862 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2867 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2868 struct rte_eth_udp_tunnel *udp_tunnel)
2870 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 if (udp_tunnel == NULL) {
2874 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2878 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2879 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2883 dev = &rte_eth_devices[port_id];
2884 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2885 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2890 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2891 struct rte_eth_udp_tunnel *udp_tunnel)
2893 struct rte_eth_dev *dev;
2895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2896 dev = &rte_eth_devices[port_id];
2898 if (udp_tunnel == NULL) {
2899 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2903 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2904 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2909 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2914 rte_eth_led_on(uint16_t port_id)
2916 struct rte_eth_dev *dev;
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2919 dev = &rte_eth_devices[port_id];
2920 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2921 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2925 rte_eth_led_off(uint16_t port_id)
2927 struct rte_eth_dev *dev;
2929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2930 dev = &rte_eth_devices[port_id];
2931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2932 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2936 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2940 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2942 struct rte_eth_dev_info dev_info;
2943 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2947 rte_eth_dev_info_get(port_id, &dev_info);
2949 for (i = 0; i < dev_info.max_mac_addrs; i++)
2950 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2956 static const struct ether_addr null_mac_addr;
2959 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2962 struct rte_eth_dev *dev;
2967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2968 dev = &rte_eth_devices[port_id];
2969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2971 if (is_zero_ether_addr(addr)) {
2972 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2976 if (pool >= ETH_64_POOLS) {
2977 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2981 index = get_mac_addr_index(port_id, addr);
2983 index = get_mac_addr_index(port_id, &null_mac_addr);
2985 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2990 pool_mask = dev->data->mac_pool_sel[index];
2992 /* Check if both MAC address and pool is already there, and do nothing */
2993 if (pool_mask & (1ULL << pool))
2998 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3001 /* Update address in NIC data structure */
3002 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3004 /* Update pool bitmap in NIC data structure */
3005 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3008 return eth_err(port_id, ret);
3012 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3014 struct rte_eth_dev *dev;
3017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3018 dev = &rte_eth_devices[port_id];
3019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3021 index = get_mac_addr_index(port_id, addr);
3024 "Port %u: Cannot remove default MAC address\n",
3027 } else if (index < 0)
3028 return 0; /* Do nothing if address wasn't found */
3031 (*dev->dev_ops->mac_addr_remove)(dev, index);
3033 /* Update address in NIC data structure */
3034 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3036 /* reset pool bitmap */
3037 dev->data->mac_pool_sel[index] = 0;
3043 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3045 struct rte_eth_dev *dev;
3048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3050 if (!is_valid_assigned_ether_addr(addr))
3053 dev = &rte_eth_devices[port_id];
3054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3056 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3060 /* Update default address in NIC data structure */
3061 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3068 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3072 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3074 struct rte_eth_dev_info dev_info;
3075 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3078 rte_eth_dev_info_get(port_id, &dev_info);
3079 if (!dev->data->hash_mac_addrs)
3082 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3083 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3084 ETHER_ADDR_LEN) == 0)
3091 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3096 struct rte_eth_dev *dev;
3098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 dev = &rte_eth_devices[port_id];
3101 if (is_zero_ether_addr(addr)) {
3102 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3107 index = get_hash_mac_addr_index(port_id, addr);
3108 /* Check if it's already there, and do nothing */
3109 if ((index >= 0) && on)
3115 "Port %u: the MAC address was not set in UTA\n",
3120 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3122 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3129 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3131 /* Update address in NIC data structure */
3133 ether_addr_copy(addr,
3134 &dev->data->hash_mac_addrs[index]);
3136 ether_addr_copy(&null_mac_addr,
3137 &dev->data->hash_mac_addrs[index]);
3140 return eth_err(port_id, ret);
3144 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3146 struct rte_eth_dev *dev;
3148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3150 dev = &rte_eth_devices[port_id];
3152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3153 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3157 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3160 struct rte_eth_dev *dev;
3161 struct rte_eth_dev_info dev_info;
3162 struct rte_eth_link link;
3164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3166 dev = &rte_eth_devices[port_id];
3167 rte_eth_dev_info_get(port_id, &dev_info);
3168 link = dev->data->dev_link;
3170 if (queue_idx > dev_info.max_tx_queues) {
3172 "Set queue rate limit:port %u: invalid queue id=%u\n",
3173 port_id, queue_idx);
3177 if (tx_rate > link.link_speed) {
3179 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3180 tx_rate, link.link_speed);
3184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3185 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3186 queue_idx, tx_rate));
3190 rte_eth_mirror_rule_set(uint16_t port_id,
3191 struct rte_eth_mirror_conf *mirror_conf,
3192 uint8_t rule_id, uint8_t on)
3194 struct rte_eth_dev *dev;
3196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3197 if (mirror_conf->rule_type == 0) {
3198 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3202 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3203 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3208 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3209 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3210 (mirror_conf->pool_mask == 0)) {
3212 "Invalid mirror pool, pool mask can not be 0\n");
3216 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3217 mirror_conf->vlan.vlan_mask == 0) {
3219 "Invalid vlan mask, vlan mask can not be 0\n");
3223 dev = &rte_eth_devices[port_id];
3224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3226 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3227 mirror_conf, rule_id, on));
3231 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3233 struct rte_eth_dev *dev;
3235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3237 dev = &rte_eth_devices[port_id];
3238 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3240 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3244 RTE_INIT(eth_dev_init_cb_lists)
3248 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3249 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3253 rte_eth_dev_callback_register(uint16_t port_id,
3254 enum rte_eth_event_type event,
3255 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3257 struct rte_eth_dev *dev;
3258 struct rte_eth_dev_callback *user_cb;
3259 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3265 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3266 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3270 if (port_id == RTE_ETH_ALL) {
3272 last_port = RTE_MAX_ETHPORTS - 1;
3274 next_port = last_port = port_id;
3277 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3280 dev = &rte_eth_devices[next_port];
3282 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3283 if (user_cb->cb_fn == cb_fn &&
3284 user_cb->cb_arg == cb_arg &&
3285 user_cb->event == event) {
3290 /* create a new callback. */
3291 if (user_cb == NULL) {
3292 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3293 sizeof(struct rte_eth_dev_callback), 0);
3294 if (user_cb != NULL) {
3295 user_cb->cb_fn = cb_fn;
3296 user_cb->cb_arg = cb_arg;
3297 user_cb->event = event;
3298 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3301 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3302 rte_eth_dev_callback_unregister(port_id, event,
3308 } while (++next_port <= last_port);
3310 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3315 rte_eth_dev_callback_unregister(uint16_t port_id,
3316 enum rte_eth_event_type event,
3317 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3320 struct rte_eth_dev *dev;
3321 struct rte_eth_dev_callback *cb, *next;
3322 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3328 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3329 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3333 if (port_id == RTE_ETH_ALL) {
3335 last_port = RTE_MAX_ETHPORTS - 1;
3337 next_port = last_port = port_id;
3340 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3343 dev = &rte_eth_devices[next_port];
3345 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3348 next = TAILQ_NEXT(cb, next);
3350 if (cb->cb_fn != cb_fn || cb->event != event ||
3351 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3355 * if this callback is not executing right now,
3358 if (cb->active == 0) {
3359 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3365 } while (++next_port <= last_port);
3367 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3372 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3373 enum rte_eth_event_type event, void *ret_param)
3375 struct rte_eth_dev_callback *cb_lst;
3376 struct rte_eth_dev_callback dev_cb;
3379 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3380 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3381 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3385 if (ret_param != NULL)
3386 dev_cb.ret_param = ret_param;
3388 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3389 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3390 dev_cb.cb_arg, dev_cb.ret_param);
3391 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3394 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3399 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3404 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3406 dev->state = RTE_ETH_DEV_ATTACHED;
3410 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3413 struct rte_eth_dev *dev;
3414 struct rte_intr_handle *intr_handle;
3418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3420 dev = &rte_eth_devices[port_id];
3422 if (!dev->intr_handle) {
3423 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3427 intr_handle = dev->intr_handle;
3428 if (!intr_handle->intr_vec) {
3429 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3433 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3434 vec = intr_handle->intr_vec[qid];
3435 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3436 if (rc && rc != -EEXIST) {
3438 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3439 port_id, qid, op, epfd, vec);
3446 int __rte_experimental
3447 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3449 struct rte_intr_handle *intr_handle;
3450 struct rte_eth_dev *dev;
3451 unsigned int efd_idx;
3455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3457 dev = &rte_eth_devices[port_id];
3459 if (queue_id >= dev->data->nb_rx_queues) {
3460 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3464 if (!dev->intr_handle) {
3465 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3469 intr_handle = dev->intr_handle;
3470 if (!intr_handle->intr_vec) {
3471 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3475 vec = intr_handle->intr_vec[queue_id];
3476 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3477 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3478 fd = intr_handle->efds[efd_idx];
3483 const struct rte_memzone *
3484 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3485 uint16_t queue_id, size_t size, unsigned align,
3488 char z_name[RTE_MEMZONE_NAMESIZE];
3489 const struct rte_memzone *mz;
3491 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3492 dev->data->port_id, queue_id, ring_name);
3494 mz = rte_memzone_lookup(z_name);
3498 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3499 RTE_MEMZONE_IOVA_CONTIG, align);
3502 int __rte_experimental
3503 rte_eth_dev_create(struct rte_device *device, const char *name,
3504 size_t priv_data_size,
3505 ethdev_bus_specific_init ethdev_bus_specific_init,
3506 void *bus_init_params,
3507 ethdev_init_t ethdev_init, void *init_params)
3509 struct rte_eth_dev *ethdev;
3512 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3514 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3515 ethdev = rte_eth_dev_allocate(name);
3519 if (priv_data_size) {
3520 ethdev->data->dev_private = rte_zmalloc_socket(
3521 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3524 if (!ethdev->data->dev_private) {
3525 RTE_LOG(ERR, EAL, "failed to allocate private data");
3531 ethdev = rte_eth_dev_attach_secondary(name);
3533 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3534 "ethdev doesn't exist");
3539 ethdev->device = device;
3541 if (ethdev_bus_specific_init) {
3542 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3545 "ethdev bus specific initialisation failed");
3550 retval = ethdev_init(ethdev, init_params);
3552 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3556 rte_eth_dev_probing_finish(ethdev);
3561 rte_eth_dev_release_port(ethdev);
3565 int __rte_experimental
3566 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3567 ethdev_uninit_t ethdev_uninit)
3571 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3575 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3576 if (ethdev_uninit) {
3577 ret = ethdev_uninit(ethdev);
3582 return rte_eth_dev_release_port(ethdev);
3586 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3587 int epfd, int op, void *data)
3590 struct rte_eth_dev *dev;
3591 struct rte_intr_handle *intr_handle;
3594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3596 dev = &rte_eth_devices[port_id];
3597 if (queue_id >= dev->data->nb_rx_queues) {
3598 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3602 if (!dev->intr_handle) {
3603 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3607 intr_handle = dev->intr_handle;
3608 if (!intr_handle->intr_vec) {
3609 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3613 vec = intr_handle->intr_vec[queue_id];
3614 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3615 if (rc && rc != -EEXIST) {
3617 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3618 port_id, queue_id, op, epfd, vec);
3626 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3629 struct rte_eth_dev *dev;
3631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3633 dev = &rte_eth_devices[port_id];
3635 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3636 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3641 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3644 struct rte_eth_dev *dev;
3646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3648 dev = &rte_eth_devices[port_id];
3650 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3651 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3657 rte_eth_dev_filter_supported(uint16_t port_id,
3658 enum rte_filter_type filter_type)
3660 struct rte_eth_dev *dev;
3662 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3664 dev = &rte_eth_devices[port_id];
3665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3666 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3667 RTE_ETH_FILTER_NOP, NULL);
3671 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3672 enum rte_filter_op filter_op, void *arg)
3674 struct rte_eth_dev *dev;
3676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3678 dev = &rte_eth_devices[port_id];
3679 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3680 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3684 const struct rte_eth_rxtx_callback *
3685 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3686 rte_rx_callback_fn fn, void *user_param)
3688 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3689 rte_errno = ENOTSUP;
3692 /* check input parameters */
3693 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3694 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3698 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3706 cb->param = user_param;
3708 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3709 /* Add the callbacks in fifo order. */
3710 struct rte_eth_rxtx_callback *tail =
3711 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3714 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3721 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3726 const struct rte_eth_rxtx_callback *
3727 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3728 rte_rx_callback_fn fn, void *user_param)
3730 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3731 rte_errno = ENOTSUP;
3734 /* check input parameters */
3735 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3736 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3741 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3749 cb->param = user_param;
3751 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3752 /* Add the callbacks at fisrt position*/
3753 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3755 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3756 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3761 const struct rte_eth_rxtx_callback *
3762 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3763 rte_tx_callback_fn fn, void *user_param)
3765 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3766 rte_errno = ENOTSUP;
3769 /* check input parameters */
3770 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3771 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3776 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3784 cb->param = user_param;
3786 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3787 /* Add the callbacks in fifo order. */
3788 struct rte_eth_rxtx_callback *tail =
3789 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3792 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3799 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3805 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3806 const struct rte_eth_rxtx_callback *user_cb)
3808 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3811 /* Check input parameters. */
3812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3813 if (user_cb == NULL ||
3814 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3817 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3818 struct rte_eth_rxtx_callback *cb;
3819 struct rte_eth_rxtx_callback **prev_cb;
3822 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3823 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3824 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3826 if (cb == user_cb) {
3827 /* Remove the user cb from the callback list. */
3828 *prev_cb = cb->next;
3833 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3839 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3840 const struct rte_eth_rxtx_callback *user_cb)
3842 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3845 /* Check input parameters. */
3846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3847 if (user_cb == NULL ||
3848 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3851 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3853 struct rte_eth_rxtx_callback *cb;
3854 struct rte_eth_rxtx_callback **prev_cb;
3856 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3857 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3858 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3860 if (cb == user_cb) {
3861 /* Remove the user cb from the callback list. */
3862 *prev_cb = cb->next;
3867 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3873 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3874 struct rte_eth_rxq_info *qinfo)
3876 struct rte_eth_dev *dev;
3878 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3883 dev = &rte_eth_devices[port_id];
3884 if (queue_id >= dev->data->nb_rx_queues) {
3885 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3891 memset(qinfo, 0, sizeof(*qinfo));
3892 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3897 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3898 struct rte_eth_txq_info *qinfo)
3900 struct rte_eth_dev *dev;
3902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3907 dev = &rte_eth_devices[port_id];
3908 if (queue_id >= dev->data->nb_tx_queues) {
3909 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3913 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3915 memset(qinfo, 0, sizeof(*qinfo));
3916 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3922 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3923 struct ether_addr *mc_addr_set,
3924 uint32_t nb_mc_addr)
3926 struct rte_eth_dev *dev;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3930 dev = &rte_eth_devices[port_id];
3931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3932 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3933 mc_addr_set, nb_mc_addr));
3937 rte_eth_timesync_enable(uint16_t port_id)
3939 struct rte_eth_dev *dev;
3941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3942 dev = &rte_eth_devices[port_id];
3944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3945 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3949 rte_eth_timesync_disable(uint16_t port_id)
3951 struct rte_eth_dev *dev;
3953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3954 dev = &rte_eth_devices[port_id];
3956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3957 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3961 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3964 struct rte_eth_dev *dev;
3966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3967 dev = &rte_eth_devices[port_id];
3969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3970 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3971 (dev, timestamp, flags));
3975 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3976 struct timespec *timestamp)
3978 struct rte_eth_dev *dev;
3980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3981 dev = &rte_eth_devices[port_id];
3983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3984 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3989 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3991 struct rte_eth_dev *dev;
3993 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3994 dev = &rte_eth_devices[port_id];
3996 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3997 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4002 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4004 struct rte_eth_dev *dev;
4006 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4007 dev = &rte_eth_devices[port_id];
4009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4010 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4015 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4017 struct rte_eth_dev *dev;
4019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4020 dev = &rte_eth_devices[port_id];
4022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4023 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4028 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4030 struct rte_eth_dev *dev;
4032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4034 dev = &rte_eth_devices[port_id];
4035 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4036 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4040 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4042 struct rte_eth_dev *dev;
4044 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4046 dev = &rte_eth_devices[port_id];
4047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4048 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4052 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4054 struct rte_eth_dev *dev;
4056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4058 dev = &rte_eth_devices[port_id];
4059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4060 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4064 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4066 struct rte_eth_dev *dev;
4068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4070 dev = &rte_eth_devices[port_id];
4071 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4072 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4075 int __rte_experimental
4076 rte_eth_dev_get_module_info(uint16_t port_id,
4077 struct rte_eth_dev_module_info *modinfo)
4079 struct rte_eth_dev *dev;
4081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4083 dev = &rte_eth_devices[port_id];
4084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4085 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4088 int __rte_experimental
4089 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4090 struct rte_dev_eeprom_info *info)
4092 struct rte_eth_dev *dev;
4094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4096 dev = &rte_eth_devices[port_id];
4097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4098 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4102 rte_eth_dev_get_dcb_info(uint16_t port_id,
4103 struct rte_eth_dcb_info *dcb_info)
4105 struct rte_eth_dev *dev;
4107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4109 dev = &rte_eth_devices[port_id];
4110 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4113 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4117 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4118 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4120 struct rte_eth_dev *dev;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4123 if (l2_tunnel == NULL) {
4124 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4128 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4129 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4133 dev = &rte_eth_devices[port_id];
4134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4136 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4141 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4142 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4146 struct rte_eth_dev *dev;
4148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4150 if (l2_tunnel == NULL) {
4151 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4155 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4156 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4161 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4165 dev = &rte_eth_devices[port_id];
4166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4168 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4169 l2_tunnel, mask, en));
4173 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4174 const struct rte_eth_desc_lim *desc_lim)
4176 if (desc_lim->nb_align != 0)
4177 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4179 if (desc_lim->nb_max != 0)
4180 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4182 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4186 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4187 uint16_t *nb_rx_desc,
4188 uint16_t *nb_tx_desc)
4190 struct rte_eth_dev *dev;
4191 struct rte_eth_dev_info dev_info;
4193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4195 dev = &rte_eth_devices[port_id];
4196 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4198 rte_eth_dev_info_get(port_id, &dev_info);
4200 if (nb_rx_desc != NULL)
4201 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4203 if (nb_tx_desc != NULL)
4204 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4210 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4212 struct rte_eth_dev *dev;
4214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4219 dev = &rte_eth_devices[port_id];
4221 if (*dev->dev_ops->pool_ops_supported == NULL)
4222 return 1; /* all pools are supported */
4224 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4228 * A set of values to describe the possible states of a switch domain.
4230 enum rte_eth_switch_domain_state {
4231 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4232 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4236 * Array of switch domains available for allocation. Array is sized to
4237 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4238 * ethdev ports in a single process.
4240 struct rte_eth_dev_switch {
4241 enum rte_eth_switch_domain_state state;
4242 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4244 int __rte_experimental
4245 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4249 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4251 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4252 i < RTE_MAX_ETHPORTS; i++) {
4253 if (rte_eth_switch_domains[i].state ==
4254 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4255 rte_eth_switch_domains[i].state =
4256 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4265 int __rte_experimental
4266 rte_eth_switch_domain_free(uint16_t domain_id)
4268 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4269 domain_id >= RTE_MAX_ETHPORTS)
4272 if (rte_eth_switch_domains[domain_id].state !=
4273 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4276 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4281 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4284 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4287 struct rte_kvargs_pair *pair;
4290 arglist->str = strdup(str_in);
4291 if (arglist->str == NULL)
4294 letter = arglist->str;
4297 pair = &arglist->pairs[0];
4300 case 0: /* Initial */
4303 else if (*letter == '\0')
4310 case 1: /* Parsing key */
4311 if (*letter == '=') {
4313 pair->value = letter + 1;
4315 } else if (*letter == ',' || *letter == '\0')
4320 case 2: /* Parsing value */
4323 else if (*letter == ',') {
4326 pair = &arglist->pairs[arglist->count];
4328 } else if (*letter == '\0') {
4331 pair = &arglist->pairs[arglist->count];
4336 case 3: /* Parsing list */
4339 else if (*letter == '\0')
4348 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4356 /* Single element, not a list */
4357 return callback(str, data);
4359 /* Sanity check, then strip the brackets */
4360 str_start = &str[strlen(str) - 1];
4361 if (*str_start != ']') {
4362 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4368 /* Process list elements */
4378 } else if (state == 1) {
4379 if (*str == ',' || *str == '\0') {
4380 if (str > str_start) {
4381 /* Non-empty string fragment */
4383 result = callback(str_start, data);
4396 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4397 const uint16_t max_list)
4399 uint16_t lo, hi, val;
4402 result = sscanf(str, "%hu-%hu", &lo, &hi);
4404 if (*len_list >= max_list)
4406 list[(*len_list)++] = lo;
4407 } else if (result == 2) {
4408 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4410 for (val = lo; val <= hi; val++) {
4411 if (*len_list >= max_list)
4413 list[(*len_list)++] = val;
4422 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4424 struct rte_eth_devargs *eth_da = data;
4426 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4427 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4430 int __rte_experimental
4431 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4433 struct rte_kvargs args;
4434 struct rte_kvargs_pair *pair;
4438 memset(eth_da, 0, sizeof(*eth_da));
4440 result = rte_eth_devargs_tokenise(&args, dargs);
4444 for (i = 0; i < args.count; i++) {
4445 pair = &args.pairs[i];
4446 if (strcmp("representor", pair->key) == 0) {
4447 result = rte_eth_devargs_parse_list(pair->value,
4448 rte_eth_devargs_parse_representor_ports,
4462 RTE_INIT(ethdev_init_log)
4464 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4465 if (rte_eth_dev_logtype >= 0)
4466 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);