1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 static int ethdev_logtype;
47 #define ethdev_log(level, fmt, ...) \
48 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
50 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
51 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 static uint8_t eth_dev_last_created_port;
54 /* spinlock for eth device callbacks */
55 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove rx callbacks */
58 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for add/remove tx callbacks */
61 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
63 /* spinlock for shared data allocation */
64 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
66 /* store statistics names and its offset in stats structure */
67 struct rte_eth_xstats_name_off {
68 char name[RTE_ETH_XSTATS_NAME_SIZE];
72 /* Shared memory between primary and secondary processes. */
74 uint64_t next_owner_id;
75 rte_spinlock_t ownership_lock;
76 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
77 } *rte_eth_dev_shared_data;
79 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
80 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
81 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
82 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
83 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
84 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
85 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
86 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
87 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
91 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
93 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
94 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
95 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
96 {"errors", offsetof(struct rte_eth_stats, q_errors)},
99 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
100 sizeof(rte_rxq_stats_strings[0]))
102 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
103 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
104 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
106 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
107 sizeof(rte_txq_stats_strings[0]))
109 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
110 { DEV_RX_OFFLOAD_##_name, #_name }
112 static const struct {
115 } rte_rx_offload_names[] = {
116 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
121 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
123 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
124 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
126 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
127 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
128 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
129 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
130 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
131 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
134 #undef RTE_RX_OFFLOAD_BIT2STR
136 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
137 { DEV_TX_OFFLOAD_##_name, #_name }
139 static const struct {
142 } rte_tx_offload_names[] = {
143 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
144 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
151 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
152 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
157 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
158 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
159 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
160 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
237 static struct rte_eth_dev *
238 _rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if (rte_eth_devices[i].data != NULL &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_allocated(const char *name)
253 struct rte_eth_dev *ethdev;
255 rte_eth_dev_shared_data_prepare();
257 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
259 ethdev = _rte_eth_dev_allocated(name);
261 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
267 rte_eth_dev_find_free_port(void)
271 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
272 /* Using shared name field to find a free port. */
273 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
274 RTE_ASSERT(rte_eth_devices[i].state ==
279 return RTE_MAX_ETHPORTS;
282 static struct rte_eth_dev *
283 eth_dev_get(uint16_t port_id)
285 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
287 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
289 eth_dev_last_created_port = port_id;
295 rte_eth_dev_allocate(const char *name)
298 struct rte_eth_dev *eth_dev = NULL;
300 rte_eth_dev_shared_data_prepare();
302 /* Synchronize port creation between primary and secondary threads. */
303 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
305 if (_rte_eth_dev_allocated(name) != NULL) {
306 ethdev_log(ERR, "Ethernet device with name %s already allocated",
311 port_id = rte_eth_dev_find_free_port();
312 if (port_id == RTE_MAX_ETHPORTS) {
313 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
326 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
332 * Attach to a port already registered by the primary process, which
333 * makes sure that the same device would have the same port id both
334 * in the primary and secondary process.
337 rte_eth_dev_attach_secondary(const char *name)
340 struct rte_eth_dev *eth_dev = NULL;
342 rte_eth_dev_shared_data_prepare();
344 /* Synchronize port attachment to primary port creation and release. */
345 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
347 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
348 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
351 if (i == RTE_MAX_ETHPORTS) {
353 "device %s is not driven by the primary process\n",
356 eth_dev = eth_dev_get(i);
357 RTE_ASSERT(eth_dev->data->port_id == i);
360 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
365 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
370 rte_eth_dev_shared_data_prepare();
372 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
374 eth_dev->state = RTE_ETH_DEV_UNUSED;
376 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
378 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
380 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
386 rte_eth_dev_is_valid_port(uint16_t port_id)
388 if (port_id >= RTE_MAX_ETHPORTS ||
389 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
396 rte_eth_is_valid_owner_id(uint64_t owner_id)
398 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
399 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
400 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016"PRIX64".\n", owner_id);
407 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
409 while (port_id < RTE_MAX_ETHPORTS &&
410 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
411 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
412 rte_eth_devices[port_id].data->owner.id != owner_id))
415 if (port_id >= RTE_MAX_ETHPORTS)
416 return RTE_MAX_ETHPORTS;
421 int __rte_experimental
422 rte_eth_dev_owner_new(uint64_t *owner_id)
424 rte_eth_dev_shared_data_prepare();
426 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
428 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
430 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
435 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
436 const struct rte_eth_dev_owner *new_owner)
438 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
439 struct rte_eth_dev_owner *port_owner;
442 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
443 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
447 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
448 !rte_eth_is_valid_owner_id(old_owner_id))
451 port_owner = &rte_eth_devices[port_id].data->owner;
452 if (port_owner->id != old_owner_id) {
453 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
454 " by %s_%016"PRIX64".\n", port_id,
455 port_owner->name, port_owner->id);
459 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
461 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
462 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
465 port_owner->id = new_owner->id;
467 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016"PRIX64".\n", port_id,
468 new_owner->name, new_owner->id);
473 int __rte_experimental
474 rte_eth_dev_owner_set(const uint16_t port_id,
475 const struct rte_eth_dev_owner *owner)
479 rte_eth_dev_shared_data_prepare();
481 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
483 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
485 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
489 int __rte_experimental
490 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
492 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
493 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
496 rte_eth_dev_shared_data_prepare();
498 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
500 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
502 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
506 void __rte_experimental
507 rte_eth_dev_owner_delete(const uint64_t owner_id)
511 rte_eth_dev_shared_data_prepare();
513 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
515 if (rte_eth_is_valid_owner_id(owner_id)) {
516 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
517 if (rte_eth_devices[port_id].data->owner.id == owner_id)
518 memset(&rte_eth_devices[port_id].data->owner, 0,
519 sizeof(struct rte_eth_dev_owner));
520 RTE_PMD_DEBUG_TRACE("All port owners owned by %016"PRIX64
521 " identifier have removed.\n", owner_id);
524 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
527 int __rte_experimental
528 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
531 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
533 rte_eth_dev_shared_data_prepare();
535 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
537 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
538 RTE_PMD_DEBUG_TRACE("Port id %"PRIu16" is not allocated.\n", port_id);
541 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
544 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
549 rte_eth_dev_socket_id(uint16_t port_id)
551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
552 return rte_eth_devices[port_id].data->numa_node;
556 rte_eth_dev_get_sec_ctx(uint16_t port_id)
558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
559 return rte_eth_devices[port_id].security_ctx;
563 rte_eth_dev_count(void)
565 return rte_eth_dev_count_avail();
569 rte_eth_dev_count_avail(void)
576 RTE_ETH_FOREACH_DEV(p)
582 uint16_t __rte_experimental
583 rte_eth_dev_count_total(void)
585 uint16_t port, count = 0;
587 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
588 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
595 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
602 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
606 /* shouldn't check 'rte_eth_devices[i].data',
607 * because it might be overwritten by VDEV PMD */
608 tmp = rte_eth_dev_shared_data->data[port_id].name;
614 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
619 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
623 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
624 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
625 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
635 eth_err(uint16_t port_id, int ret)
639 if (rte_eth_dev_is_removed(port_id))
644 /* attach the new device, then store port_id of the device */
646 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
648 int current = rte_eth_dev_count_total();
649 struct rte_devargs da;
652 memset(&da, 0, sizeof(da));
654 if ((devargs == NULL) || (port_id == NULL)) {
660 if (rte_devargs_parse(&da, "%s", devargs))
663 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
667 /* no point looking at the port count if no port exists */
668 if (!rte_eth_dev_count_total()) {
669 ethdev_log(ERR, "No port found for device (%s)", da.name);
674 /* if nothing happened, there is a bug here, since some driver told us
675 * it did attach a device, but did not create a port.
676 * FIXME: race condition in case of plug-out of another device
678 if (current == rte_eth_dev_count_total()) {
683 *port_id = eth_dev_last_created_port;
691 /* detach the device, then store the name of the device */
693 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
695 struct rte_device *dev;
700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
702 dev_flags = rte_eth_devices[port_id].data->dev_flags;
703 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
705 "Port %" PRIu16 " is bonded, cannot detach", port_id);
709 dev = rte_eth_devices[port_id].device;
713 bus = rte_bus_find_by_device(dev);
717 ret = rte_eal_hotplug_remove(bus->name, dev->name);
721 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
726 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
728 uint16_t old_nb_queues = dev->data->nb_rx_queues;
732 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
733 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
734 sizeof(dev->data->rx_queues[0]) * nb_queues,
735 RTE_CACHE_LINE_SIZE);
736 if (dev->data->rx_queues == NULL) {
737 dev->data->nb_rx_queues = 0;
740 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
743 rxq = dev->data->rx_queues;
745 for (i = nb_queues; i < old_nb_queues; i++)
746 (*dev->dev_ops->rx_queue_release)(rxq[i]);
747 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
748 RTE_CACHE_LINE_SIZE);
751 if (nb_queues > old_nb_queues) {
752 uint16_t new_qs = nb_queues - old_nb_queues;
754 memset(rxq + old_nb_queues, 0,
755 sizeof(rxq[0]) * new_qs);
758 dev->data->rx_queues = rxq;
760 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
763 rxq = dev->data->rx_queues;
765 for (i = nb_queues; i < old_nb_queues; i++)
766 (*dev->dev_ops->rx_queue_release)(rxq[i]);
768 rte_free(dev->data->rx_queues);
769 dev->data->rx_queues = NULL;
771 dev->data->nb_rx_queues = nb_queues;
776 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
778 struct rte_eth_dev *dev;
780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
782 dev = &rte_eth_devices[port_id];
783 if (!dev->data->dev_started) {
785 "port %d must be started before start any queue\n", port_id);
789 if (rx_queue_id >= dev->data->nb_rx_queues) {
790 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
796 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
797 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
798 " already started\n",
799 rx_queue_id, port_id);
803 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
809 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
811 struct rte_eth_dev *dev;
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
815 dev = &rte_eth_devices[port_id];
816 if (rx_queue_id >= dev->data->nb_rx_queues) {
817 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
823 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
824 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
825 " already stopped\n",
826 rx_queue_id, port_id);
830 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
835 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
837 struct rte_eth_dev *dev;
839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
841 dev = &rte_eth_devices[port_id];
842 if (!dev->data->dev_started) {
844 "port %d must be started before start any queue\n", port_id);
848 if (tx_queue_id >= dev->data->nb_tx_queues) {
849 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
855 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
856 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
857 " already started\n",
858 tx_queue_id, port_id);
862 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
868 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
870 struct rte_eth_dev *dev;
872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
874 dev = &rte_eth_devices[port_id];
875 if (tx_queue_id >= dev->data->nb_tx_queues) {
876 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
882 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
883 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
884 " already stopped\n",
885 tx_queue_id, port_id);
889 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
894 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
896 uint16_t old_nb_queues = dev->data->nb_tx_queues;
900 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
901 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
902 sizeof(dev->data->tx_queues[0]) * nb_queues,
903 RTE_CACHE_LINE_SIZE);
904 if (dev->data->tx_queues == NULL) {
905 dev->data->nb_tx_queues = 0;
908 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
911 txq = dev->data->tx_queues;
913 for (i = nb_queues; i < old_nb_queues; i++)
914 (*dev->dev_ops->tx_queue_release)(txq[i]);
915 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
916 RTE_CACHE_LINE_SIZE);
919 if (nb_queues > old_nb_queues) {
920 uint16_t new_qs = nb_queues - old_nb_queues;
922 memset(txq + old_nb_queues, 0,
923 sizeof(txq[0]) * new_qs);
926 dev->data->tx_queues = txq;
928 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
931 txq = dev->data->tx_queues;
933 for (i = nb_queues; i < old_nb_queues; i++)
934 (*dev->dev_ops->tx_queue_release)(txq[i]);
936 rte_free(dev->data->tx_queues);
937 dev->data->tx_queues = NULL;
939 dev->data->nb_tx_queues = nb_queues;
944 rte_eth_speed_bitflag(uint32_t speed, int duplex)
947 case ETH_SPEED_NUM_10M:
948 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
949 case ETH_SPEED_NUM_100M:
950 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
951 case ETH_SPEED_NUM_1G:
952 return ETH_LINK_SPEED_1G;
953 case ETH_SPEED_NUM_2_5G:
954 return ETH_LINK_SPEED_2_5G;
955 case ETH_SPEED_NUM_5G:
956 return ETH_LINK_SPEED_5G;
957 case ETH_SPEED_NUM_10G:
958 return ETH_LINK_SPEED_10G;
959 case ETH_SPEED_NUM_20G:
960 return ETH_LINK_SPEED_20G;
961 case ETH_SPEED_NUM_25G:
962 return ETH_LINK_SPEED_25G;
963 case ETH_SPEED_NUM_40G:
964 return ETH_LINK_SPEED_40G;
965 case ETH_SPEED_NUM_50G:
966 return ETH_LINK_SPEED_50G;
967 case ETH_SPEED_NUM_56G:
968 return ETH_LINK_SPEED_56G;
969 case ETH_SPEED_NUM_100G:
970 return ETH_LINK_SPEED_100G;
977 * A conversion function from rxmode bitfield API.
980 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
981 uint64_t *rx_offloads)
983 uint64_t offloads = 0;
985 if (rxmode->header_split == 1)
986 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
987 if (rxmode->hw_ip_checksum == 1)
988 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
989 if (rxmode->hw_vlan_filter == 1)
990 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
991 if (rxmode->hw_vlan_strip == 1)
992 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
993 if (rxmode->hw_vlan_extend == 1)
994 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
995 if (rxmode->jumbo_frame == 1)
996 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
997 if (rxmode->hw_strip_crc == 1)
998 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
999 if (rxmode->enable_scatter == 1)
1000 offloads |= DEV_RX_OFFLOAD_SCATTER;
1001 if (rxmode->enable_lro == 1)
1002 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
1003 if (rxmode->hw_timestamp == 1)
1004 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
1005 if (rxmode->security == 1)
1006 offloads |= DEV_RX_OFFLOAD_SECURITY;
1008 *rx_offloads = offloads;
1011 const char * __rte_experimental
1012 rte_eth_dev_rx_offload_name(uint64_t offload)
1014 const char *name = "UNKNOWN";
1017 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1018 if (offload == rte_rx_offload_names[i].offload) {
1019 name = rte_rx_offload_names[i].name;
1027 const char * __rte_experimental
1028 rte_eth_dev_tx_offload_name(uint64_t offload)
1030 const char *name = "UNKNOWN";
1033 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1034 if (offload == rte_tx_offload_names[i].offload) {
1035 name = rte_tx_offload_names[i].name;
1044 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1045 const struct rte_eth_conf *dev_conf)
1047 struct rte_eth_dev *dev;
1048 struct rte_eth_dev_info dev_info;
1049 struct rte_eth_conf local_conf = *dev_conf;
1052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1054 dev = &rte_eth_devices[port_id];
1056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1059 rte_eth_dev_info_get(port_id, &dev_info);
1061 /* If number of queues specified by application for both Rx and Tx is
1062 * zero, use driver preferred values. This cannot be done individually
1063 * as it is valid for either Tx or Rx (but not both) to be zero.
1064 * If driver does not provide any preferred valued, fall back on
1067 if (nb_rx_q == 0 && nb_tx_q == 0) {
1068 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1070 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1071 nb_tx_q = dev_info.default_txportconf.nb_queues;
1073 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1076 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1077 RTE_PMD_DEBUG_TRACE(
1078 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1079 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1083 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1084 RTE_PMD_DEBUG_TRACE(
1085 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1086 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1090 if (dev->data->dev_started) {
1091 RTE_PMD_DEBUG_TRACE(
1092 "port %d must be stopped to allow configuration\n", port_id);
1097 * Convert between the offloads API to enable PMDs to support
1100 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1101 rte_eth_convert_rx_offload_bitfield(
1102 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1104 /* Copy the dev_conf parameter into the dev structure */
1105 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1108 * Check that the numbers of RX and TX queues are not greater
1109 * than the maximum number of RX and TX queues supported by the
1110 * configured device.
1112 if (nb_rx_q > dev_info.max_rx_queues) {
1113 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1114 port_id, nb_rx_q, dev_info.max_rx_queues);
1118 if (nb_tx_q > dev_info.max_tx_queues) {
1119 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1120 port_id, nb_tx_q, dev_info.max_tx_queues);
1124 /* Check that the device supports requested interrupts */
1125 if ((dev_conf->intr_conf.lsc == 1) &&
1126 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1127 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1128 dev->device->driver->name);
1131 if ((dev_conf->intr_conf.rmv == 1) &&
1132 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1133 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1134 dev->device->driver->name);
1139 * If jumbo frames are enabled, check that the maximum RX packet
1140 * length is supported by the configured device.
1142 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1143 if (dev_conf->rxmode.max_rx_pkt_len >
1144 dev_info.max_rx_pktlen) {
1145 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1146 " > max valid value %u\n",
1148 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1149 (unsigned)dev_info.max_rx_pktlen);
1151 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1152 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1153 " < min valid value %u\n",
1155 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1156 (unsigned)ETHER_MIN_LEN);
1160 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1161 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1162 /* Use default value */
1163 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1167 /* Any requested offloading must be within its device capabilities */
1168 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1169 local_conf.rxmode.offloads) {
1170 ethdev_log(ERR, "ethdev port_id=%d requested Rx offloads "
1171 "0x%" PRIx64 " doesn't match Rx offloads "
1172 "capabilities 0x%" PRIx64 " in %s()\n",
1174 local_conf.rxmode.offloads,
1175 dev_info.rx_offload_capa,
1177 /* Will return -EINVAL in the next release */
1179 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1180 local_conf.txmode.offloads) {
1181 ethdev_log(ERR, "ethdev port_id=%d requested Tx offloads "
1182 "0x%" PRIx64 " doesn't match Tx offloads "
1183 "capabilities 0x%" PRIx64 " in %s()\n",
1185 local_conf.txmode.offloads,
1186 dev_info.tx_offload_capa,
1188 /* Will return -EINVAL in the next release */
1191 /* Check that device supports requested rss hash functions. */
1192 if ((dev_info.flow_type_rss_offloads |
1193 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1194 dev_info.flow_type_rss_offloads) {
1195 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1196 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1198 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1199 dev_info.flow_type_rss_offloads);
1203 * Setup new number of RX/TX queues and reconfigure device.
1205 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1207 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1212 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1214 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1216 rte_eth_dev_rx_queue_config(dev, 0);
1220 diag = (*dev->dev_ops->dev_configure)(dev);
1222 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1224 rte_eth_dev_rx_queue_config(dev, 0);
1225 rte_eth_dev_tx_queue_config(dev, 0);
1226 return eth_err(port_id, diag);
1229 /* Initialize Rx profiling if enabled at compilation time. */
1230 diag = __rte_eth_profile_rx_init(port_id, dev);
1232 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1234 rte_eth_dev_rx_queue_config(dev, 0);
1235 rte_eth_dev_tx_queue_config(dev, 0);
1236 return eth_err(port_id, diag);
1243 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1245 if (dev->data->dev_started) {
1246 RTE_PMD_DEBUG_TRACE(
1247 "port %d must be stopped to allow reset\n",
1248 dev->data->port_id);
1252 rte_eth_dev_rx_queue_config(dev, 0);
1253 rte_eth_dev_tx_queue_config(dev, 0);
1255 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1259 rte_eth_dev_config_restore(uint16_t port_id)
1261 struct rte_eth_dev *dev;
1262 struct rte_eth_dev_info dev_info;
1263 struct ether_addr *addr;
1268 dev = &rte_eth_devices[port_id];
1270 rte_eth_dev_info_get(port_id, &dev_info);
1272 /* replay MAC address configuration including default MAC */
1273 addr = &dev->data->mac_addrs[0];
1274 if (*dev->dev_ops->mac_addr_set != NULL)
1275 (*dev->dev_ops->mac_addr_set)(dev, addr);
1276 else if (*dev->dev_ops->mac_addr_add != NULL)
1277 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1279 if (*dev->dev_ops->mac_addr_add != NULL) {
1280 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1281 addr = &dev->data->mac_addrs[i];
1283 /* skip zero address */
1284 if (is_zero_ether_addr(addr))
1288 pool_mask = dev->data->mac_pool_sel[i];
1291 if (pool_mask & 1ULL)
1292 (*dev->dev_ops->mac_addr_add)(dev,
1296 } while (pool_mask);
1300 /* replay promiscuous configuration */
1301 if (rte_eth_promiscuous_get(port_id) == 1)
1302 rte_eth_promiscuous_enable(port_id);
1303 else if (rte_eth_promiscuous_get(port_id) == 0)
1304 rte_eth_promiscuous_disable(port_id);
1306 /* replay all multicast configuration */
1307 if (rte_eth_allmulticast_get(port_id) == 1)
1308 rte_eth_allmulticast_enable(port_id);
1309 else if (rte_eth_allmulticast_get(port_id) == 0)
1310 rte_eth_allmulticast_disable(port_id);
1314 rte_eth_dev_start(uint16_t port_id)
1316 struct rte_eth_dev *dev;
1319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1321 dev = &rte_eth_devices[port_id];
1323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1325 if (dev->data->dev_started != 0) {
1326 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1327 " already started\n",
1332 diag = (*dev->dev_ops->dev_start)(dev);
1334 dev->data->dev_started = 1;
1336 return eth_err(port_id, diag);
1338 rte_eth_dev_config_restore(port_id);
1340 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1342 (*dev->dev_ops->link_update)(dev, 0);
1348 rte_eth_dev_stop(uint16_t port_id)
1350 struct rte_eth_dev *dev;
1352 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1353 dev = &rte_eth_devices[port_id];
1355 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1357 if (dev->data->dev_started == 0) {
1358 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1359 " already stopped\n",
1364 dev->data->dev_started = 0;
1365 (*dev->dev_ops->dev_stop)(dev);
1369 rte_eth_dev_set_link_up(uint16_t port_id)
1371 struct rte_eth_dev *dev;
1373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1375 dev = &rte_eth_devices[port_id];
1377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1378 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1382 rte_eth_dev_set_link_down(uint16_t port_id)
1384 struct rte_eth_dev *dev;
1386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1388 dev = &rte_eth_devices[port_id];
1390 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1391 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1395 rte_eth_dev_close(uint16_t port_id)
1397 struct rte_eth_dev *dev;
1399 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1400 dev = &rte_eth_devices[port_id];
1402 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1403 dev->data->dev_started = 0;
1404 (*dev->dev_ops->dev_close)(dev);
1406 dev->data->nb_rx_queues = 0;
1407 rte_free(dev->data->rx_queues);
1408 dev->data->rx_queues = NULL;
1409 dev->data->nb_tx_queues = 0;
1410 rte_free(dev->data->tx_queues);
1411 dev->data->tx_queues = NULL;
1415 rte_eth_dev_reset(uint16_t port_id)
1417 struct rte_eth_dev *dev;
1420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1421 dev = &rte_eth_devices[port_id];
1423 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1425 rte_eth_dev_stop(port_id);
1426 ret = dev->dev_ops->dev_reset(dev);
1428 return eth_err(port_id, ret);
1431 int __rte_experimental
1432 rte_eth_dev_is_removed(uint16_t port_id)
1434 struct rte_eth_dev *dev;
1437 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1439 dev = &rte_eth_devices[port_id];
1441 if (dev->state == RTE_ETH_DEV_REMOVED)
1444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1446 ret = dev->dev_ops->is_removed(dev);
1448 /* Device is physically removed. */
1449 dev->state = RTE_ETH_DEV_REMOVED;
1455 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1456 uint16_t nb_rx_desc, unsigned int socket_id,
1457 const struct rte_eth_rxconf *rx_conf,
1458 struct rte_mempool *mp)
1461 uint32_t mbp_buf_size;
1462 struct rte_eth_dev *dev;
1463 struct rte_eth_dev_info dev_info;
1464 struct rte_eth_rxconf local_conf;
1467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1469 dev = &rte_eth_devices[port_id];
1470 if (rx_queue_id >= dev->data->nb_rx_queues) {
1471 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1479 * Check the size of the mbuf data buffer.
1480 * This value must be provided in the private data of the memory pool.
1481 * First check that the memory pool has a valid private data.
1483 rte_eth_dev_info_get(port_id, &dev_info);
1484 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1485 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1486 mp->name, (int) mp->private_data_size,
1487 (int) sizeof(struct rte_pktmbuf_pool_private));
1490 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1492 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1493 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1494 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1498 (int)(RTE_PKTMBUF_HEADROOM +
1499 dev_info.min_rx_bufsize),
1500 (int)RTE_PKTMBUF_HEADROOM,
1501 (int)dev_info.min_rx_bufsize);
1505 /* Use default specified by driver, if nb_rx_desc is zero */
1506 if (nb_rx_desc == 0) {
1507 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1508 /* If driver default is also zero, fall back on EAL default */
1509 if (nb_rx_desc == 0)
1510 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1513 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1514 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1515 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1517 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1518 "should be: <= %hu, = %hu, and a product of %hu\n",
1520 dev_info.rx_desc_lim.nb_max,
1521 dev_info.rx_desc_lim.nb_min,
1522 dev_info.rx_desc_lim.nb_align);
1526 if (dev->data->dev_started &&
1527 !(dev_info.dev_capa &
1528 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1531 if (dev->data->rx_queue_state[rx_queue_id] !=
1532 RTE_ETH_QUEUE_STATE_STOPPED)
1535 rxq = dev->data->rx_queues;
1536 if (rxq[rx_queue_id]) {
1537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1539 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1540 rxq[rx_queue_id] = NULL;
1543 if (rx_conf == NULL)
1544 rx_conf = &dev_info.default_rxconf;
1546 local_conf = *rx_conf;
1547 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1549 * Reflect port offloads to queue offloads in order for
1550 * offloads to not be discarded.
1552 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1553 &local_conf.offloads);
1557 * If an offloading has already been enabled in
1558 * rte_eth_dev_configure(), it has been enabled on all queues,
1559 * so there is no need to enable it in this queue again.
1560 * The local_conf.offloads input to underlying PMD only carries
1561 * those offloadings which are only enabled on this queue and
1562 * not enabled on all queues.
1564 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1567 * New added offloadings for this queue are those not enabled in
1568 * rte_eth_dev_configure() and they must be per-queue type.
1569 * A pure per-port offloading can't be enabled on a queue while
1570 * disabled on another queue. A pure per-port offloading can't
1571 * be enabled for any queue as new added one if it hasn't been
1572 * enabled in rte_eth_dev_configure().
1574 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1575 local_conf.offloads) {
1576 ethdev_log(ERR, "Ethdev port_id=%d rx_queue_id=%d, new "
1577 "added offloads 0x%" PRIx64 " must be "
1578 "within pre-queue offload capabilities 0x%"
1579 PRIx64 " in %s()\n",
1582 local_conf.offloads,
1583 dev_info.rx_queue_offload_capa,
1585 /* Will return -EINVAL in the next release */
1588 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1589 socket_id, &local_conf, mp);
1591 if (!dev->data->min_rx_buf_size ||
1592 dev->data->min_rx_buf_size > mbp_buf_size)
1593 dev->data->min_rx_buf_size = mbp_buf_size;
1596 return eth_err(port_id, ret);
1600 * Convert from tx offloads to txq_flags.
1603 rte_eth_convert_tx_offload(const uint64_t tx_offloads, uint32_t *txq_flags)
1607 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1608 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1609 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1610 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1611 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1612 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1613 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1614 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1615 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1616 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1617 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1618 flags |= ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP;
1624 * A conversion function from txq_flags API.
1627 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1629 uint64_t offloads = 0;
1631 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1632 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1633 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1634 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1635 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1636 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1637 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1638 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1639 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1640 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1641 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1642 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1643 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1645 *tx_offloads = offloads;
1649 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1650 uint16_t nb_tx_desc, unsigned int socket_id,
1651 const struct rte_eth_txconf *tx_conf)
1653 struct rte_eth_dev *dev;
1654 struct rte_eth_dev_info dev_info;
1655 struct rte_eth_txconf local_conf;
1658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1660 dev = &rte_eth_devices[port_id];
1661 if (tx_queue_id >= dev->data->nb_tx_queues) {
1662 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1669 rte_eth_dev_info_get(port_id, &dev_info);
1671 /* Use default specified by driver, if nb_tx_desc is zero */
1672 if (nb_tx_desc == 0) {
1673 nb_tx_desc = dev_info.default_txportconf.ring_size;
1674 /* If driver default is zero, fall back on EAL default */
1675 if (nb_tx_desc == 0)
1676 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1678 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1679 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1680 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1681 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1682 "should be: <= %hu, = %hu, and a product of %hu\n",
1684 dev_info.tx_desc_lim.nb_max,
1685 dev_info.tx_desc_lim.nb_min,
1686 dev_info.tx_desc_lim.nb_align);
1690 if (dev->data->dev_started &&
1691 !(dev_info.dev_capa &
1692 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1695 if (dev->data->tx_queue_state[tx_queue_id] !=
1696 RTE_ETH_QUEUE_STATE_STOPPED)
1699 txq = dev->data->tx_queues;
1700 if (txq[tx_queue_id]) {
1701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1703 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1704 txq[tx_queue_id] = NULL;
1707 if (tx_conf == NULL)
1708 tx_conf = &dev_info.default_txconf;
1711 * Convert between the offloads API to enable PMDs to support
1714 local_conf = *tx_conf;
1715 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1716 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1717 &local_conf.offloads);
1721 * If an offloading has already been enabled in
1722 * rte_eth_dev_configure(), it has been enabled on all queues,
1723 * so there is no need to enable it in this queue again.
1724 * The local_conf.offloads input to underlying PMD only carries
1725 * those offloadings which are only enabled on this queue and
1726 * not enabled on all queues.
1728 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1731 * New added offloadings for this queue are those not enabled in
1732 * rte_eth_dev_configure() and they must be per-queue type.
1733 * A pure per-port offloading can't be enabled on a queue while
1734 * disabled on another queue. A pure per-port offloading can't
1735 * be enabled for any queue as new added one if it hasn't been
1736 * enabled in rte_eth_dev_configure().
1738 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1739 local_conf.offloads) {
1740 ethdev_log(ERR, "Ethdev port_id=%d tx_queue_id=%d, new "
1741 "added offloads 0x%" PRIx64 " must be "
1742 "within pre-queue offload capabilities 0x%"
1743 PRIx64 " in %s()\n",
1746 local_conf.offloads,
1747 dev_info.tx_queue_offload_capa,
1749 /* Will return -EINVAL in the next release */
1752 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1753 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1757 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1758 void *userdata __rte_unused)
1762 for (i = 0; i < unsent; i++)
1763 rte_pktmbuf_free(pkts[i]);
1767 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1770 uint64_t *count = userdata;
1773 for (i = 0; i < unsent; i++)
1774 rte_pktmbuf_free(pkts[i]);
1780 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1781 buffer_tx_error_fn cbfn, void *userdata)
1783 buffer->error_callback = cbfn;
1784 buffer->error_userdata = userdata;
1789 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1796 buffer->size = size;
1797 if (buffer->error_callback == NULL) {
1798 ret = rte_eth_tx_buffer_set_err_callback(
1799 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1806 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1808 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1811 /* Validate Input Data. Bail if not valid or not supported. */
1812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1813 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1815 /* Call driver to free pending mbufs. */
1816 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1818 return eth_err(port_id, ret);
1822 rte_eth_promiscuous_enable(uint16_t port_id)
1824 struct rte_eth_dev *dev;
1826 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1827 dev = &rte_eth_devices[port_id];
1829 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1830 (*dev->dev_ops->promiscuous_enable)(dev);
1831 dev->data->promiscuous = 1;
1835 rte_eth_promiscuous_disable(uint16_t port_id)
1837 struct rte_eth_dev *dev;
1839 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1840 dev = &rte_eth_devices[port_id];
1842 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1843 dev->data->promiscuous = 0;
1844 (*dev->dev_ops->promiscuous_disable)(dev);
1848 rte_eth_promiscuous_get(uint16_t port_id)
1850 struct rte_eth_dev *dev;
1852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1854 dev = &rte_eth_devices[port_id];
1855 return dev->data->promiscuous;
1859 rte_eth_allmulticast_enable(uint16_t port_id)
1861 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1864 dev = &rte_eth_devices[port_id];
1866 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1867 (*dev->dev_ops->allmulticast_enable)(dev);
1868 dev->data->all_multicast = 1;
1872 rte_eth_allmulticast_disable(uint16_t port_id)
1874 struct rte_eth_dev *dev;
1876 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1877 dev = &rte_eth_devices[port_id];
1879 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1880 dev->data->all_multicast = 0;
1881 (*dev->dev_ops->allmulticast_disable)(dev);
1885 rte_eth_allmulticast_get(uint16_t port_id)
1887 struct rte_eth_dev *dev;
1889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1891 dev = &rte_eth_devices[port_id];
1892 return dev->data->all_multicast;
1896 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1898 struct rte_eth_dev *dev;
1900 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1901 dev = &rte_eth_devices[port_id];
1903 if (dev->data->dev_conf.intr_conf.lsc &&
1904 dev->data->dev_started)
1905 rte_eth_linkstatus_get(dev, eth_link);
1907 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1908 (*dev->dev_ops->link_update)(dev, 1);
1909 *eth_link = dev->data->dev_link;
1914 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1916 struct rte_eth_dev *dev;
1918 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1919 dev = &rte_eth_devices[port_id];
1921 if (dev->data->dev_conf.intr_conf.lsc &&
1922 dev->data->dev_started)
1923 rte_eth_linkstatus_get(dev, eth_link);
1925 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1926 (*dev->dev_ops->link_update)(dev, 0);
1927 *eth_link = dev->data->dev_link;
1932 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1934 struct rte_eth_dev *dev;
1936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1938 dev = &rte_eth_devices[port_id];
1939 memset(stats, 0, sizeof(*stats));
1941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1942 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1943 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1947 rte_eth_stats_reset(uint16_t port_id)
1949 struct rte_eth_dev *dev;
1951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1952 dev = &rte_eth_devices[port_id];
1954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1955 (*dev->dev_ops->stats_reset)(dev);
1956 dev->data->rx_mbuf_alloc_failed = 0;
1962 get_xstats_basic_count(struct rte_eth_dev *dev)
1964 uint16_t nb_rxqs, nb_txqs;
1967 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1968 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1970 count = RTE_NB_STATS;
1971 count += nb_rxqs * RTE_NB_RXQ_STATS;
1972 count += nb_txqs * RTE_NB_TXQ_STATS;
1978 get_xstats_count(uint16_t port_id)
1980 struct rte_eth_dev *dev;
1983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1984 dev = &rte_eth_devices[port_id];
1985 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1986 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1989 return eth_err(port_id, count);
1991 if (dev->dev_ops->xstats_get_names != NULL) {
1992 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1994 return eth_err(port_id, count);
1999 count += get_xstats_basic_count(dev);
2005 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2008 int cnt_xstats, idx_xstat;
2010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2013 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
2018 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
2023 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2024 if (cnt_xstats < 0) {
2025 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
2029 /* Get id-name lookup table */
2030 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2032 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2033 port_id, xstats_names, cnt_xstats, NULL)) {
2034 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
2038 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2039 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2048 /* retrieve basic stats names */
2050 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2051 struct rte_eth_xstat_name *xstats_names)
2053 int cnt_used_entries = 0;
2054 uint32_t idx, id_queue;
2057 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2058 snprintf(xstats_names[cnt_used_entries].name,
2059 sizeof(xstats_names[0].name),
2060 "%s", rte_stats_strings[idx].name);
2063 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2064 for (id_queue = 0; id_queue < num_q; id_queue++) {
2065 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2066 snprintf(xstats_names[cnt_used_entries].name,
2067 sizeof(xstats_names[0].name),
2069 id_queue, rte_rxq_stats_strings[idx].name);
2074 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2075 for (id_queue = 0; id_queue < num_q; id_queue++) {
2076 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2077 snprintf(xstats_names[cnt_used_entries].name,
2078 sizeof(xstats_names[0].name),
2080 id_queue, rte_txq_stats_strings[idx].name);
2084 return cnt_used_entries;
2087 /* retrieve ethdev extended statistics names */
2089 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2090 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2093 struct rte_eth_xstat_name *xstats_names_copy;
2094 unsigned int no_basic_stat_requested = 1;
2095 unsigned int no_ext_stat_requested = 1;
2096 unsigned int expected_entries;
2097 unsigned int basic_count;
2098 struct rte_eth_dev *dev;
2102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2103 dev = &rte_eth_devices[port_id];
2105 basic_count = get_xstats_basic_count(dev);
2106 ret = get_xstats_count(port_id);
2109 expected_entries = (unsigned int)ret;
2111 /* Return max number of stats if no ids given */
2114 return expected_entries;
2115 else if (xstats_names && size < expected_entries)
2116 return expected_entries;
2119 if (ids && !xstats_names)
2122 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2123 uint64_t ids_copy[size];
2125 for (i = 0; i < size; i++) {
2126 if (ids[i] < basic_count) {
2127 no_basic_stat_requested = 0;
2132 * Convert ids to xstats ids that PMD knows.
2133 * ids known by user are basic + extended stats.
2135 ids_copy[i] = ids[i] - basic_count;
2138 if (no_basic_stat_requested)
2139 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2140 xstats_names, ids_copy, size);
2143 /* Retrieve all stats */
2145 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2147 if (num_stats < 0 || num_stats > (int)expected_entries)
2150 return expected_entries;
2153 xstats_names_copy = calloc(expected_entries,
2154 sizeof(struct rte_eth_xstat_name));
2156 if (!xstats_names_copy) {
2157 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2162 for (i = 0; i < size; i++) {
2163 if (ids[i] >= basic_count) {
2164 no_ext_stat_requested = 0;
2170 /* Fill xstats_names_copy structure */
2171 if (ids && no_ext_stat_requested) {
2172 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2174 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2177 free(xstats_names_copy);
2183 for (i = 0; i < size; i++) {
2184 if (ids[i] >= expected_entries) {
2185 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2186 free(xstats_names_copy);
2189 xstats_names[i] = xstats_names_copy[ids[i]];
2192 free(xstats_names_copy);
2197 rte_eth_xstats_get_names(uint16_t port_id,
2198 struct rte_eth_xstat_name *xstats_names,
2201 struct rte_eth_dev *dev;
2202 int cnt_used_entries;
2203 int cnt_expected_entries;
2204 int cnt_driver_entries;
2206 cnt_expected_entries = get_xstats_count(port_id);
2207 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2208 (int)size < cnt_expected_entries)
2209 return cnt_expected_entries;
2211 /* port_id checked in get_xstats_count() */
2212 dev = &rte_eth_devices[port_id];
2214 cnt_used_entries = rte_eth_basic_stats_get_names(
2217 if (dev->dev_ops->xstats_get_names != NULL) {
2218 /* If there are any driver-specific xstats, append them
2221 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2223 xstats_names + cnt_used_entries,
2224 size - cnt_used_entries);
2225 if (cnt_driver_entries < 0)
2226 return eth_err(port_id, cnt_driver_entries);
2227 cnt_used_entries += cnt_driver_entries;
2230 return cnt_used_entries;
2235 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2237 struct rte_eth_dev *dev;
2238 struct rte_eth_stats eth_stats;
2239 unsigned int count = 0, i, q;
2240 uint64_t val, *stats_ptr;
2241 uint16_t nb_rxqs, nb_txqs;
2244 ret = rte_eth_stats_get(port_id, ð_stats);
2248 dev = &rte_eth_devices[port_id];
2250 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2251 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2254 for (i = 0; i < RTE_NB_STATS; i++) {
2255 stats_ptr = RTE_PTR_ADD(ð_stats,
2256 rte_stats_strings[i].offset);
2258 xstats[count++].value = val;
2262 for (q = 0; q < nb_rxqs; q++) {
2263 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2264 stats_ptr = RTE_PTR_ADD(ð_stats,
2265 rte_rxq_stats_strings[i].offset +
2266 q * sizeof(uint64_t));
2268 xstats[count++].value = val;
2273 for (q = 0; q < nb_txqs; q++) {
2274 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2275 stats_ptr = RTE_PTR_ADD(ð_stats,
2276 rte_txq_stats_strings[i].offset +
2277 q * sizeof(uint64_t));
2279 xstats[count++].value = val;
2285 /* retrieve ethdev extended statistics */
2287 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2288 uint64_t *values, unsigned int size)
2290 unsigned int no_basic_stat_requested = 1;
2291 unsigned int no_ext_stat_requested = 1;
2292 unsigned int num_xstats_filled;
2293 unsigned int basic_count;
2294 uint16_t expected_entries;
2295 struct rte_eth_dev *dev;
2299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2300 ret = get_xstats_count(port_id);
2303 expected_entries = (uint16_t)ret;
2304 struct rte_eth_xstat xstats[expected_entries];
2305 dev = &rte_eth_devices[port_id];
2306 basic_count = get_xstats_basic_count(dev);
2308 /* Return max number of stats if no ids given */
2311 return expected_entries;
2312 else if (values && size < expected_entries)
2313 return expected_entries;
2319 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2320 unsigned int basic_count = get_xstats_basic_count(dev);
2321 uint64_t ids_copy[size];
2323 for (i = 0; i < size; i++) {
2324 if (ids[i] < basic_count) {
2325 no_basic_stat_requested = 0;
2330 * Convert ids to xstats ids that PMD knows.
2331 * ids known by user are basic + extended stats.
2333 ids_copy[i] = ids[i] - basic_count;
2336 if (no_basic_stat_requested)
2337 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2342 for (i = 0; i < size; i++) {
2343 if (ids[i] >= basic_count) {
2344 no_ext_stat_requested = 0;
2350 /* Fill the xstats structure */
2351 if (ids && no_ext_stat_requested)
2352 ret = rte_eth_basic_stats_get(port_id, xstats);
2354 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2358 num_xstats_filled = (unsigned int)ret;
2360 /* Return all stats */
2362 for (i = 0; i < num_xstats_filled; i++)
2363 values[i] = xstats[i].value;
2364 return expected_entries;
2368 for (i = 0; i < size; i++) {
2369 if (ids[i] >= expected_entries) {
2370 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2373 values[i] = xstats[ids[i]].value;
2379 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2382 struct rte_eth_dev *dev;
2383 unsigned int count = 0, i;
2384 signed int xcount = 0;
2385 uint16_t nb_rxqs, nb_txqs;
2388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2390 dev = &rte_eth_devices[port_id];
2392 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2393 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2395 /* Return generic statistics */
2396 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2397 (nb_txqs * RTE_NB_TXQ_STATS);
2399 /* implemented by the driver */
2400 if (dev->dev_ops->xstats_get != NULL) {
2401 /* Retrieve the xstats from the driver at the end of the
2404 xcount = (*dev->dev_ops->xstats_get)(dev,
2405 xstats ? xstats + count : NULL,
2406 (n > count) ? n - count : 0);
2409 return eth_err(port_id, xcount);
2412 if (n < count + xcount || xstats == NULL)
2413 return count + xcount;
2415 /* now fill the xstats structure */
2416 ret = rte_eth_basic_stats_get(port_id, xstats);
2421 for (i = 0; i < count; i++)
2423 /* add an offset to driver-specific stats */
2424 for ( ; i < count + xcount; i++)
2425 xstats[i].id += count;
2427 return count + xcount;
2430 /* reset ethdev extended statistics */
2432 rte_eth_xstats_reset(uint16_t port_id)
2434 struct rte_eth_dev *dev;
2436 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2437 dev = &rte_eth_devices[port_id];
2439 /* implemented by the driver */
2440 if (dev->dev_ops->xstats_reset != NULL) {
2441 (*dev->dev_ops->xstats_reset)(dev);
2445 /* fallback to default */
2446 rte_eth_stats_reset(port_id);
2450 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2453 struct rte_eth_dev *dev;
2455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2457 dev = &rte_eth_devices[port_id];
2459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2460 return (*dev->dev_ops->queue_stats_mapping_set)
2461 (dev, queue_id, stat_idx, is_rx);
2466 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2469 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2470 stat_idx, STAT_QMAP_TX));
2475 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2478 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2479 stat_idx, STAT_QMAP_RX));
2483 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2485 struct rte_eth_dev *dev;
2487 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2488 dev = &rte_eth_devices[port_id];
2490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2491 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2492 fw_version, fw_size));
2496 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2498 struct rte_eth_dev *dev;
2499 struct rte_eth_txconf *txconf;
2500 const struct rte_eth_desc_lim lim = {
2501 .nb_max = UINT16_MAX,
2506 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2507 dev = &rte_eth_devices[port_id];
2509 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2510 dev_info->rx_desc_lim = lim;
2511 dev_info->tx_desc_lim = lim;
2512 dev_info->device = dev->device;
2514 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2515 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2516 dev_info->driver_name = dev->device->driver->name;
2517 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2518 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2520 dev_info->dev_flags = &dev->data->dev_flags;
2521 txconf = &dev_info->default_txconf;
2522 /* convert offload to txq_flags to support legacy app */
2523 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
2527 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2528 uint32_t *ptypes, int num)
2531 struct rte_eth_dev *dev;
2532 const uint32_t *all_ptypes;
2534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2535 dev = &rte_eth_devices[port_id];
2536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2537 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2542 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2543 if (all_ptypes[i] & ptype_mask) {
2545 ptypes[j] = all_ptypes[i];
2553 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2555 struct rte_eth_dev *dev;
2557 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2558 dev = &rte_eth_devices[port_id];
2559 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2564 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2566 struct rte_eth_dev *dev;
2568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2570 dev = &rte_eth_devices[port_id];
2571 *mtu = dev->data->mtu;
2576 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2579 struct rte_eth_dev *dev;
2581 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2582 dev = &rte_eth_devices[port_id];
2583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2585 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2587 dev->data->mtu = mtu;
2589 return eth_err(port_id, ret);
2593 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2595 struct rte_eth_dev *dev;
2598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2599 dev = &rte_eth_devices[port_id];
2600 if (!(dev->data->dev_conf.rxmode.offloads &
2601 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2602 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2606 if (vlan_id > 4095) {
2607 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2608 port_id, (unsigned) vlan_id);
2611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2613 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2615 struct rte_vlan_filter_conf *vfc;
2619 vfc = &dev->data->vlan_filter_conf;
2620 vidx = vlan_id / 64;
2621 vbit = vlan_id % 64;
2624 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2626 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2629 return eth_err(port_id, ret);
2633 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2636 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2639 dev = &rte_eth_devices[port_id];
2640 if (rx_queue_id >= dev->data->nb_rx_queues) {
2641 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2646 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2652 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2653 enum rte_vlan_type vlan_type,
2656 struct rte_eth_dev *dev;
2658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2659 dev = &rte_eth_devices[port_id];
2660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2662 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2667 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2669 struct rte_eth_dev *dev;
2673 uint64_t orig_offloads;
2675 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2676 dev = &rte_eth_devices[port_id];
2678 /* save original values in case of failure */
2679 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2681 /*check which option changed by application*/
2682 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2683 org = !!(dev->data->dev_conf.rxmode.offloads &
2684 DEV_RX_OFFLOAD_VLAN_STRIP);
2687 dev->data->dev_conf.rxmode.offloads |=
2688 DEV_RX_OFFLOAD_VLAN_STRIP;
2690 dev->data->dev_conf.rxmode.offloads &=
2691 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2692 mask |= ETH_VLAN_STRIP_MASK;
2695 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2696 org = !!(dev->data->dev_conf.rxmode.offloads &
2697 DEV_RX_OFFLOAD_VLAN_FILTER);
2700 dev->data->dev_conf.rxmode.offloads |=
2701 DEV_RX_OFFLOAD_VLAN_FILTER;
2703 dev->data->dev_conf.rxmode.offloads &=
2704 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2705 mask |= ETH_VLAN_FILTER_MASK;
2708 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2709 org = !!(dev->data->dev_conf.rxmode.offloads &
2710 DEV_RX_OFFLOAD_VLAN_EXTEND);
2713 dev->data->dev_conf.rxmode.offloads |=
2714 DEV_RX_OFFLOAD_VLAN_EXTEND;
2716 dev->data->dev_conf.rxmode.offloads &=
2717 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2718 mask |= ETH_VLAN_EXTEND_MASK;
2725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2726 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2728 /* hit an error restore original values */
2729 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2732 return eth_err(port_id, ret);
2736 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2738 struct rte_eth_dev *dev;
2741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2742 dev = &rte_eth_devices[port_id];
2744 if (dev->data->dev_conf.rxmode.offloads &
2745 DEV_RX_OFFLOAD_VLAN_STRIP)
2746 ret |= ETH_VLAN_STRIP_OFFLOAD;
2748 if (dev->data->dev_conf.rxmode.offloads &
2749 DEV_RX_OFFLOAD_VLAN_FILTER)
2750 ret |= ETH_VLAN_FILTER_OFFLOAD;
2752 if (dev->data->dev_conf.rxmode.offloads &
2753 DEV_RX_OFFLOAD_VLAN_EXTEND)
2754 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2760 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2762 struct rte_eth_dev *dev;
2764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2768 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2772 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2774 struct rte_eth_dev *dev;
2776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2777 dev = &rte_eth_devices[port_id];
2778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2779 memset(fc_conf, 0, sizeof(*fc_conf));
2780 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2784 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2786 struct rte_eth_dev *dev;
2788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2789 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2790 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2794 dev = &rte_eth_devices[port_id];
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2796 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2800 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2801 struct rte_eth_pfc_conf *pfc_conf)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2806 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2807 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2811 dev = &rte_eth_devices[port_id];
2812 /* High water, low water validation are device specific */
2813 if (*dev->dev_ops->priority_flow_ctrl_set)
2814 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2820 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2828 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2829 for (i = 0; i < num; i++) {
2830 if (reta_conf[i].mask)
2838 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2842 uint16_t i, idx, shift;
2848 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2852 for (i = 0; i < reta_size; i++) {
2853 idx = i / RTE_RETA_GROUP_SIZE;
2854 shift = i % RTE_RETA_GROUP_SIZE;
2855 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2856 (reta_conf[idx].reta[shift] >= max_rxq)) {
2857 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2858 "the maximum rxq index: %u\n", idx, shift,
2859 reta_conf[idx].reta[shift], max_rxq);
2868 rte_eth_dev_rss_reta_update(uint16_t port_id,
2869 struct rte_eth_rss_reta_entry64 *reta_conf,
2872 struct rte_eth_dev *dev;
2875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 /* Check mask bits */
2877 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2881 dev = &rte_eth_devices[port_id];
2883 /* Check entry value */
2884 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2885 dev->data->nb_rx_queues);
2889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2890 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2895 rte_eth_dev_rss_reta_query(uint16_t port_id,
2896 struct rte_eth_rss_reta_entry64 *reta_conf,
2899 struct rte_eth_dev *dev;
2902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2904 /* Check mask bits */
2905 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2909 dev = &rte_eth_devices[port_id];
2910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2911 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2916 rte_eth_dev_rss_hash_update(uint16_t port_id,
2917 struct rte_eth_rss_conf *rss_conf)
2919 struct rte_eth_dev *dev;
2920 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2923 dev = &rte_eth_devices[port_id];
2924 rte_eth_dev_info_get(port_id, &dev_info);
2925 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2926 dev_info.flow_type_rss_offloads) {
2927 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2928 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2931 dev_info.flow_type_rss_offloads);
2933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2934 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2939 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2940 struct rte_eth_rss_conf *rss_conf)
2942 struct rte_eth_dev *dev;
2944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2945 dev = &rte_eth_devices[port_id];
2946 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2947 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2952 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2953 struct rte_eth_udp_tunnel *udp_tunnel)
2955 struct rte_eth_dev *dev;
2957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2958 if (udp_tunnel == NULL) {
2959 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2963 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2964 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2968 dev = &rte_eth_devices[port_id];
2969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2970 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2975 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2976 struct rte_eth_udp_tunnel *udp_tunnel)
2978 struct rte_eth_dev *dev;
2980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2981 dev = &rte_eth_devices[port_id];
2983 if (udp_tunnel == NULL) {
2984 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2988 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2989 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2994 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2999 rte_eth_led_on(uint16_t port_id)
3001 struct rte_eth_dev *dev;
3003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3004 dev = &rte_eth_devices[port_id];
3005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3006 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3010 rte_eth_led_off(uint16_t port_id)
3012 struct rte_eth_dev *dev;
3014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3015 dev = &rte_eth_devices[port_id];
3016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3017 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3021 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3025 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3027 struct rte_eth_dev_info dev_info;
3028 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3032 rte_eth_dev_info_get(port_id, &dev_info);
3034 for (i = 0; i < dev_info.max_mac_addrs; i++)
3035 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3041 static const struct ether_addr null_mac_addr;
3044 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3047 struct rte_eth_dev *dev;
3052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3053 dev = &rte_eth_devices[port_id];
3054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3056 if (is_zero_ether_addr(addr)) {
3057 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3061 if (pool >= ETH_64_POOLS) {
3062 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
3066 index = get_mac_addr_index(port_id, addr);
3068 index = get_mac_addr_index(port_id, &null_mac_addr);
3070 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3075 pool_mask = dev->data->mac_pool_sel[index];
3077 /* Check if both MAC address and pool is already there, and do nothing */
3078 if (pool_mask & (1ULL << pool))
3083 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3086 /* Update address in NIC data structure */
3087 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3089 /* Update pool bitmap in NIC data structure */
3090 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3093 return eth_err(port_id, ret);
3097 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3099 struct rte_eth_dev *dev;
3102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3103 dev = &rte_eth_devices[port_id];
3104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3106 index = get_mac_addr_index(port_id, addr);
3108 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
3110 } else if (index < 0)
3111 return 0; /* Do nothing if address wasn't found */
3114 (*dev->dev_ops->mac_addr_remove)(dev, index);
3116 /* Update address in NIC data structure */
3117 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3119 /* reset pool bitmap */
3120 dev->data->mac_pool_sel[index] = 0;
3126 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3128 struct rte_eth_dev *dev;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3133 if (!is_valid_assigned_ether_addr(addr))
3136 dev = &rte_eth_devices[port_id];
3137 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3139 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3143 /* Update default address in NIC data structure */
3144 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3151 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3155 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3157 struct rte_eth_dev_info dev_info;
3158 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3161 rte_eth_dev_info_get(port_id, &dev_info);
3162 if (!dev->data->hash_mac_addrs)
3165 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3166 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3167 ETHER_ADDR_LEN) == 0)
3174 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3179 struct rte_eth_dev *dev;
3181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3183 dev = &rte_eth_devices[port_id];
3184 if (is_zero_ether_addr(addr)) {
3185 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3190 index = get_hash_mac_addr_index(port_id, addr);
3191 /* Check if it's already there, and do nothing */
3192 if ((index >= 0) && on)
3197 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3198 "set in UTA\n", port_id);
3202 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3204 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3211 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3213 /* Update address in NIC data structure */
3215 ether_addr_copy(addr,
3216 &dev->data->hash_mac_addrs[index]);
3218 ether_addr_copy(&null_mac_addr,
3219 &dev->data->hash_mac_addrs[index]);
3222 return eth_err(port_id, ret);
3226 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3228 struct rte_eth_dev *dev;
3230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232 dev = &rte_eth_devices[port_id];
3234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3235 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3239 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3242 struct rte_eth_dev *dev;
3243 struct rte_eth_dev_info dev_info;
3244 struct rte_eth_link link;
3246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3248 dev = &rte_eth_devices[port_id];
3249 rte_eth_dev_info_get(port_id, &dev_info);
3250 link = dev->data->dev_link;
3252 if (queue_idx > dev_info.max_tx_queues) {
3253 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3254 "invalid queue id=%d\n", port_id, queue_idx);
3258 if (tx_rate > link.link_speed) {
3259 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3260 "bigger than link speed= %d\n",
3261 tx_rate, link.link_speed);
3265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3266 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3267 queue_idx, tx_rate));
3271 rte_eth_mirror_rule_set(uint16_t port_id,
3272 struct rte_eth_mirror_conf *mirror_conf,
3273 uint8_t rule_id, uint8_t on)
3275 struct rte_eth_dev *dev;
3277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3278 if (mirror_conf->rule_type == 0) {
3279 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3283 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3284 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3289 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3290 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3291 (mirror_conf->pool_mask == 0)) {
3292 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3296 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3297 mirror_conf->vlan.vlan_mask == 0) {
3298 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3302 dev = &rte_eth_devices[port_id];
3303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3305 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3306 mirror_conf, rule_id, on));
3310 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3312 struct rte_eth_dev *dev;
3314 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3316 dev = &rte_eth_devices[port_id];
3317 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3319 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3323 RTE_INIT(eth_dev_init_cb_lists)
3327 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3328 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3332 rte_eth_dev_callback_register(uint16_t port_id,
3333 enum rte_eth_event_type event,
3334 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3336 struct rte_eth_dev *dev;
3337 struct rte_eth_dev_callback *user_cb;
3338 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3344 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3345 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3349 if (port_id == RTE_ETH_ALL) {
3351 last_port = RTE_MAX_ETHPORTS - 1;
3353 next_port = last_port = port_id;
3356 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3359 dev = &rte_eth_devices[next_port];
3361 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3362 if (user_cb->cb_fn == cb_fn &&
3363 user_cb->cb_arg == cb_arg &&
3364 user_cb->event == event) {
3369 /* create a new callback. */
3370 if (user_cb == NULL) {
3371 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3372 sizeof(struct rte_eth_dev_callback), 0);
3373 if (user_cb != NULL) {
3374 user_cb->cb_fn = cb_fn;
3375 user_cb->cb_arg = cb_arg;
3376 user_cb->event = event;
3377 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3380 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3381 rte_eth_dev_callback_unregister(port_id, event,
3387 } while (++next_port <= last_port);
3389 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3394 rte_eth_dev_callback_unregister(uint16_t port_id,
3395 enum rte_eth_event_type event,
3396 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3399 struct rte_eth_dev *dev;
3400 struct rte_eth_dev_callback *cb, *next;
3401 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3407 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3408 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3412 if (port_id == RTE_ETH_ALL) {
3414 last_port = RTE_MAX_ETHPORTS - 1;
3416 next_port = last_port = port_id;
3419 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3422 dev = &rte_eth_devices[next_port];
3424 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3427 next = TAILQ_NEXT(cb, next);
3429 if (cb->cb_fn != cb_fn || cb->event != event ||
3430 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3434 * if this callback is not executing right now,
3437 if (cb->active == 0) {
3438 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3444 } while (++next_port <= last_port);
3446 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3451 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3452 enum rte_eth_event_type event, void *ret_param)
3454 struct rte_eth_dev_callback *cb_lst;
3455 struct rte_eth_dev_callback dev_cb;
3458 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3459 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3460 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3464 if (ret_param != NULL)
3465 dev_cb.ret_param = ret_param;
3467 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3468 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3469 dev_cb.cb_arg, dev_cb.ret_param);
3470 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3473 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3478 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3483 dev->state = RTE_ETH_DEV_ATTACHED;
3487 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3490 struct rte_eth_dev *dev;
3491 struct rte_intr_handle *intr_handle;
3495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3497 dev = &rte_eth_devices[port_id];
3499 if (!dev->intr_handle) {
3500 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3504 intr_handle = dev->intr_handle;
3505 if (!intr_handle->intr_vec) {
3506 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3510 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3511 vec = intr_handle->intr_vec[qid];
3512 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3513 if (rc && rc != -EEXIST) {
3514 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3515 " op %d epfd %d vec %u\n",
3516 port_id, qid, op, epfd, vec);
3523 const struct rte_memzone *
3524 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3525 uint16_t queue_id, size_t size, unsigned align,
3528 char z_name[RTE_MEMZONE_NAMESIZE];
3529 const struct rte_memzone *mz;
3531 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3532 dev->device->driver->name, ring_name,
3533 dev->data->port_id, queue_id);
3535 mz = rte_memzone_lookup(z_name);
3539 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3540 RTE_MEMZONE_IOVA_CONTIG, align);
3543 int __rte_experimental
3544 rte_eth_dev_create(struct rte_device *device, const char *name,
3545 size_t priv_data_size,
3546 ethdev_bus_specific_init ethdev_bus_specific_init,
3547 void *bus_init_params,
3548 ethdev_init_t ethdev_init, void *init_params)
3550 struct rte_eth_dev *ethdev;
3553 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3555 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3556 ethdev = rte_eth_dev_allocate(name);
3562 if (priv_data_size) {
3563 ethdev->data->dev_private = rte_zmalloc_socket(
3564 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3567 if (!ethdev->data->dev_private) {
3568 RTE_LOG(ERR, EAL, "failed to allocate private data");
3574 ethdev = rte_eth_dev_attach_secondary(name);
3576 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3577 "ethdev doesn't exist");
3583 ethdev->device = device;
3585 if (ethdev_bus_specific_init) {
3586 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3589 "ethdev bus specific initialisation failed");
3594 retval = ethdev_init(ethdev, init_params);
3596 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3600 rte_eth_dev_probing_finish(ethdev);
3604 /* free ports private data if primary process */
3605 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3606 rte_free(ethdev->data->dev_private);
3608 rte_eth_dev_release_port(ethdev);
3613 int __rte_experimental
3614 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3615 ethdev_uninit_t ethdev_uninit)
3619 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3623 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3624 if (ethdev_uninit) {
3625 ret = ethdev_uninit(ethdev);
3630 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3631 rte_free(ethdev->data->dev_private);
3633 ethdev->data->dev_private = NULL;
3635 return rte_eth_dev_release_port(ethdev);
3639 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3640 int epfd, int op, void *data)
3643 struct rte_eth_dev *dev;
3644 struct rte_intr_handle *intr_handle;
3647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3649 dev = &rte_eth_devices[port_id];
3650 if (queue_id >= dev->data->nb_rx_queues) {
3651 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3655 if (!dev->intr_handle) {
3656 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3660 intr_handle = dev->intr_handle;
3661 if (!intr_handle->intr_vec) {
3662 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3666 vec = intr_handle->intr_vec[queue_id];
3667 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3668 if (rc && rc != -EEXIST) {
3669 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3670 " op %d epfd %d vec %u\n",
3671 port_id, queue_id, op, epfd, vec);
3679 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3682 struct rte_eth_dev *dev;
3684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3686 dev = &rte_eth_devices[port_id];
3688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3689 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3694 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3697 struct rte_eth_dev *dev;
3699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3701 dev = &rte_eth_devices[port_id];
3703 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3704 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3710 rte_eth_dev_filter_supported(uint16_t port_id,
3711 enum rte_filter_type filter_type)
3713 struct rte_eth_dev *dev;
3715 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3717 dev = &rte_eth_devices[port_id];
3718 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3719 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3720 RTE_ETH_FILTER_NOP, NULL);
3724 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3725 enum rte_filter_op filter_op, void *arg)
3727 struct rte_eth_dev *dev;
3729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3731 dev = &rte_eth_devices[port_id];
3732 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3733 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3737 const struct rte_eth_rxtx_callback *
3738 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3739 rte_rx_callback_fn fn, void *user_param)
3741 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3742 rte_errno = ENOTSUP;
3745 /* check input parameters */
3746 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3747 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3751 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3759 cb->param = user_param;
3761 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3762 /* Add the callbacks in fifo order. */
3763 struct rte_eth_rxtx_callback *tail =
3764 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3767 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3774 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3779 const struct rte_eth_rxtx_callback *
3780 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3781 rte_rx_callback_fn fn, void *user_param)
3783 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3784 rte_errno = ENOTSUP;
3787 /* check input parameters */
3788 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3789 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3794 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3802 cb->param = user_param;
3804 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3805 /* Add the callbacks at fisrt position*/
3806 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3808 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3809 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3814 const struct rte_eth_rxtx_callback *
3815 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3816 rte_tx_callback_fn fn, void *user_param)
3818 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3819 rte_errno = ENOTSUP;
3822 /* check input parameters */
3823 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3824 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3829 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3837 cb->param = user_param;
3839 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3840 /* Add the callbacks in fifo order. */
3841 struct rte_eth_rxtx_callback *tail =
3842 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3845 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3852 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3858 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3859 const struct rte_eth_rxtx_callback *user_cb)
3861 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3864 /* Check input parameters. */
3865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3866 if (user_cb == NULL ||
3867 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3870 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3871 struct rte_eth_rxtx_callback *cb;
3872 struct rte_eth_rxtx_callback **prev_cb;
3875 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3876 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3877 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3879 if (cb == user_cb) {
3880 /* Remove the user cb from the callback list. */
3881 *prev_cb = cb->next;
3886 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3892 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3893 const struct rte_eth_rxtx_callback *user_cb)
3895 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3898 /* Check input parameters. */
3899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3900 if (user_cb == NULL ||
3901 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3904 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3906 struct rte_eth_rxtx_callback *cb;
3907 struct rte_eth_rxtx_callback **prev_cb;
3909 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3910 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3911 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3913 if (cb == user_cb) {
3914 /* Remove the user cb from the callback list. */
3915 *prev_cb = cb->next;
3920 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3926 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3927 struct rte_eth_rxq_info *qinfo)
3929 struct rte_eth_dev *dev;
3931 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3936 dev = &rte_eth_devices[port_id];
3937 if (queue_id >= dev->data->nb_rx_queues) {
3938 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3942 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3944 memset(qinfo, 0, sizeof(*qinfo));
3945 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3950 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3951 struct rte_eth_txq_info *qinfo)
3953 struct rte_eth_dev *dev;
3954 struct rte_eth_txconf *txconf = &qinfo->conf;
3956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3961 dev = &rte_eth_devices[port_id];
3962 if (queue_id >= dev->data->nb_tx_queues) {
3963 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3967 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3969 memset(qinfo, 0, sizeof(*qinfo));
3970 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3971 /* convert offload to txq_flags to support legacy app */
3972 rte_eth_convert_tx_offload(txconf->offloads, &txconf->txq_flags);
3978 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3979 struct ether_addr *mc_addr_set,
3980 uint32_t nb_mc_addr)
3982 struct rte_eth_dev *dev;
3984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3986 dev = &rte_eth_devices[port_id];
3987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3988 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3989 mc_addr_set, nb_mc_addr));
3993 rte_eth_timesync_enable(uint16_t port_id)
3995 struct rte_eth_dev *dev;
3997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3998 dev = &rte_eth_devices[port_id];
4000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4001 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4005 rte_eth_timesync_disable(uint16_t port_id)
4007 struct rte_eth_dev *dev;
4009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4010 dev = &rte_eth_devices[port_id];
4012 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4013 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4017 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4020 struct rte_eth_dev *dev;
4022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4023 dev = &rte_eth_devices[port_id];
4025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4026 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4027 (dev, timestamp, flags));
4031 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4032 struct timespec *timestamp)
4034 struct rte_eth_dev *dev;
4036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4037 dev = &rte_eth_devices[port_id];
4039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4040 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4045 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4047 struct rte_eth_dev *dev;
4049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4050 dev = &rte_eth_devices[port_id];
4052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4053 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4058 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4060 struct rte_eth_dev *dev;
4062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4063 dev = &rte_eth_devices[port_id];
4065 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4066 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4071 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4073 struct rte_eth_dev *dev;
4075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4076 dev = &rte_eth_devices[port_id];
4078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4079 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4084 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4086 struct rte_eth_dev *dev;
4088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4090 dev = &rte_eth_devices[port_id];
4091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4092 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4096 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4098 struct rte_eth_dev *dev;
4100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4102 dev = &rte_eth_devices[port_id];
4103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4104 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4108 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4110 struct rte_eth_dev *dev;
4112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4114 dev = &rte_eth_devices[port_id];
4115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4116 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4120 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4122 struct rte_eth_dev *dev;
4124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4126 dev = &rte_eth_devices[port_id];
4127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4128 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4131 int __rte_experimental
4132 rte_eth_dev_get_module_info(uint16_t port_id,
4133 struct rte_eth_dev_module_info *modinfo)
4135 struct rte_eth_dev *dev;
4137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4139 dev = &rte_eth_devices[port_id];
4140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4141 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4144 int __rte_experimental
4145 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4146 struct rte_dev_eeprom_info *info)
4148 struct rte_eth_dev *dev;
4150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4152 dev = &rte_eth_devices[port_id];
4153 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4154 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4158 rte_eth_dev_get_dcb_info(uint16_t port_id,
4159 struct rte_eth_dcb_info *dcb_info)
4161 struct rte_eth_dev *dev;
4163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4165 dev = &rte_eth_devices[port_id];
4166 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4169 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4173 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4174 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4176 struct rte_eth_dev *dev;
4178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4179 if (l2_tunnel == NULL) {
4180 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4184 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4185 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
4189 dev = &rte_eth_devices[port_id];
4190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4192 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4197 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4198 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4202 struct rte_eth_dev *dev;
4204 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4206 if (l2_tunnel == NULL) {
4207 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
4211 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4212 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
4217 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
4221 dev = &rte_eth_devices[port_id];
4222 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4224 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4225 l2_tunnel, mask, en));
4229 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4230 const struct rte_eth_desc_lim *desc_lim)
4232 if (desc_lim->nb_align != 0)
4233 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4235 if (desc_lim->nb_max != 0)
4236 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4238 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4242 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4243 uint16_t *nb_rx_desc,
4244 uint16_t *nb_tx_desc)
4246 struct rte_eth_dev *dev;
4247 struct rte_eth_dev_info dev_info;
4249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4251 dev = &rte_eth_devices[port_id];
4252 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4254 rte_eth_dev_info_get(port_id, &dev_info);
4256 if (nb_rx_desc != NULL)
4257 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4259 if (nb_tx_desc != NULL)
4260 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4266 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4268 struct rte_eth_dev *dev;
4270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4275 dev = &rte_eth_devices[port_id];
4277 if (*dev->dev_ops->pool_ops_supported == NULL)
4278 return 1; /* all pools are supported */
4280 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4284 * A set of values to describe the possible states of a switch domain.
4286 enum rte_eth_switch_domain_state {
4287 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4288 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4292 * Array of switch domains available for allocation. Array is sized to
4293 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4294 * ethdev ports in a single process.
4296 struct rte_eth_dev_switch {
4297 enum rte_eth_switch_domain_state state;
4298 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4300 int __rte_experimental
4301 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4305 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4307 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4308 i < RTE_MAX_ETHPORTS; i++) {
4309 if (rte_eth_switch_domains[i].state ==
4310 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4311 rte_eth_switch_domains[i].state =
4312 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4321 int __rte_experimental
4322 rte_eth_switch_domain_free(uint16_t domain_id)
4324 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4325 domain_id >= RTE_MAX_ETHPORTS)
4328 if (rte_eth_switch_domains[domain_id].state !=
4329 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4332 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4337 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4340 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4343 struct rte_kvargs_pair *pair;
4346 arglist->str = strdup(str_in);
4347 if (arglist->str == NULL)
4350 letter = arglist->str;
4353 pair = &arglist->pairs[0];
4356 case 0: /* Initial */
4359 else if (*letter == '\0')
4366 case 1: /* Parsing key */
4367 if (*letter == '=') {
4369 pair->value = letter + 1;
4371 } else if (*letter == ',' || *letter == '\0')
4376 case 2: /* Parsing value */
4379 else if (*letter == ',') {
4382 pair = &arglist->pairs[arglist->count];
4384 } else if (*letter == '\0') {
4387 pair = &arglist->pairs[arglist->count];
4392 case 3: /* Parsing list */
4395 else if (*letter == '\0')
4404 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4412 /* Single element, not a list */
4413 return callback(str, data);
4415 /* Sanity check, then strip the brackets */
4416 str_start = &str[strlen(str) - 1];
4417 if (*str_start != ']') {
4418 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4424 /* Process list elements */
4434 } else if (state == 1) {
4435 if (*str == ',' || *str == '\0') {
4436 if (str > str_start) {
4437 /* Non-empty string fragment */
4439 result = callback(str_start, data);
4452 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4453 const uint16_t max_list)
4455 uint16_t lo, hi, val;
4458 result = sscanf(str, "%hu-%hu", &lo, &hi);
4460 if (*len_list >= max_list)
4462 list[(*len_list)++] = lo;
4463 } else if (result == 2) {
4464 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4466 for (val = lo; val <= hi; val++) {
4467 if (*len_list >= max_list)
4469 list[(*len_list)++] = val;
4478 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4480 struct rte_eth_devargs *eth_da = data;
4482 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4483 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4486 int __rte_experimental
4487 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4489 struct rte_kvargs args;
4490 struct rte_kvargs_pair *pair;
4494 memset(eth_da, 0, sizeof(*eth_da));
4496 result = rte_eth_devargs_tokenise(&args, dargs);
4500 for (i = 0; i < args.count; i++) {
4501 pair = &args.pairs[i];
4502 if (strcmp("representor", pair->key) == 0) {
4503 result = rte_eth_devargs_parse_list(pair->value,
4504 rte_eth_devargs_parse_representor_ports,
4518 RTE_INIT(ethdev_init_log);
4520 ethdev_init_log(void)
4522 ethdev_logtype = rte_log_register("lib.ethdev");
4523 if (ethdev_logtype >= 0)
4524 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);